Maxim nexpaq / nexpaq_dev

Preliminary main mbed library for nexpaq development

features/mbedtls/src/aesni.c@1:d96dbedaebdb, 2016-11-04 (annotated)

Committer:
nexpaq
Date:
Fri Nov 04 20:54:50 2016 +0000
Revision:
1:d96dbedaebdb
Parent:
0:6c56fb4bc5f0 
Removed extra directories for other platforms

Who changed what in which revision?

UserRevisionLine numberNew contents of line
nexpaq 0:6c56fb4bc5f0 1 /*
nexpaq 0:6c56fb4bc5f0 2 * AES-NI support functions
nexpaq 0:6c56fb4bc5f0 3 *
nexpaq 0:6c56fb4bc5f0 4 * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved
nexpaq 0:6c56fb4bc5f0 5 * SPDX-License-Identifier: Apache-2.0
nexpaq 0:6c56fb4bc5f0 6 *
nexpaq 0:6c56fb4bc5f0 7 * Licensed under the Apache License, Version 2.0 (the "License"); you may
nexpaq 0:6c56fb4bc5f0 8 * not use this file except in compliance with the License.
nexpaq 0:6c56fb4bc5f0 9 * You may obtain a copy of the License at
nexpaq 0:6c56fb4bc5f0 10 *
nexpaq 0:6c56fb4bc5f0 11 * http://www.apache.org/licenses/LICENSE-2.0
nexpaq 0:6c56fb4bc5f0 12 *
nexpaq 0:6c56fb4bc5f0 13 * Unless required by applicable law or agreed to in writing, software
nexpaq 0:6c56fb4bc5f0 14 * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
nexpaq 0:6c56fb4bc5f0 15 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
nexpaq 0:6c56fb4bc5f0 16 * See the License for the specific language governing permissions and
nexpaq 0:6c56fb4bc5f0 17 * limitations under the License.
nexpaq 0:6c56fb4bc5f0 18 *
nexpaq 0:6c56fb4bc5f0 19 * This file is part of mbed TLS (https://tls.mbed.org)
nexpaq 0:6c56fb4bc5f0 20 */
nexpaq 0:6c56fb4bc5f0 21
nexpaq 0:6c56fb4bc5f0 22 /*
nexpaq 0:6c56fb4bc5f0 23 * [AES-WP] http://software.intel.com/en-us/articles/intel-advanced-encryption-standard-aes-instructions-set
nexpaq 0:6c56fb4bc5f0 24 * [CLMUL-WP] http://software.intel.com/en-us/articles/intel-carry-less-multiplication-instruction-and-its-usage-for-computing-the-gcm-mode/
nexpaq 0:6c56fb4bc5f0 25 */
nexpaq 0:6c56fb4bc5f0 26
nexpaq 0:6c56fb4bc5f0 27 #if !defined(MBEDTLS_CONFIG_FILE)
nexpaq 0:6c56fb4bc5f0 28 #include "mbedtls/config.h"
nexpaq 0:6c56fb4bc5f0 29 #else
nexpaq 0:6c56fb4bc5f0 30 #include MBEDTLS_CONFIG_FILE
nexpaq 0:6c56fb4bc5f0 31 #endif
nexpaq 0:6c56fb4bc5f0 32
nexpaq 0:6c56fb4bc5f0 33 #if defined(MBEDTLS_AESNI_C)
nexpaq 0:6c56fb4bc5f0 34
nexpaq 0:6c56fb4bc5f0 35 #include "mbedtls/aesni.h"
nexpaq 0:6c56fb4bc5f0 36
nexpaq 0:6c56fb4bc5f0 37 #include <string.h>
nexpaq 0:6c56fb4bc5f0 38
nexpaq 0:6c56fb4bc5f0 39 #ifndef asm
nexpaq 0:6c56fb4bc5f0 40 #define asm __asm
nexpaq 0:6c56fb4bc5f0 41 #endif
nexpaq 0:6c56fb4bc5f0 42
nexpaq 0:6c56fb4bc5f0 43 #if defined(MBEDTLS_HAVE_X86_64)
nexpaq 0:6c56fb4bc5f0 44
nexpaq 0:6c56fb4bc5f0 45 /*
nexpaq 0:6c56fb4bc5f0 46 * AES-NI support detection routine
nexpaq 0:6c56fb4bc5f0 47 */
nexpaq 0:6c56fb4bc5f0 48 int mbedtls_aesni_has_support( unsigned int what )
nexpaq 0:6c56fb4bc5f0 49 {
nexpaq 0:6c56fb4bc5f0 50 static int done = 0;
nexpaq 0:6c56fb4bc5f0 51 static unsigned int c = 0;
nexpaq 0:6c56fb4bc5f0 52
nexpaq 0:6c56fb4bc5f0 53 if( ! done )
nexpaq 0:6c56fb4bc5f0 54 {
nexpaq 0:6c56fb4bc5f0 55 asm( "movl $1, %%eax \n\t"
nexpaq 0:6c56fb4bc5f0 56 "cpuid \n\t"
nexpaq 0:6c56fb4bc5f0 57 : "=c" (c)
nexpaq 0:6c56fb4bc5f0 58 :
nexpaq 0:6c56fb4bc5f0 59 : "eax", "ebx", "edx" );
nexpaq 0:6c56fb4bc5f0 60 done = 1;
nexpaq 0:6c56fb4bc5f0 61 }
nexpaq 0:6c56fb4bc5f0 62
nexpaq 0:6c56fb4bc5f0 63 return( ( c & what ) != 0 );
nexpaq 0:6c56fb4bc5f0 64 }
nexpaq 0:6c56fb4bc5f0 65
nexpaq 0:6c56fb4bc5f0 66 /*
nexpaq 0:6c56fb4bc5f0 67 * Binutils needs to be at least 2.19 to support AES-NI instructions.
nexpaq 0:6c56fb4bc5f0 68 * Unfortunately, a lot of users have a lower version now (2014-04).
nexpaq 0:6c56fb4bc5f0 69 * Emit bytecode directly in order to support "old" version of gas.
nexpaq 0:6c56fb4bc5f0 70 *
nexpaq 0:6c56fb4bc5f0 71 * Opcodes from the Intel architecture reference manual, vol. 3.
nexpaq 0:6c56fb4bc5f0 72 * We always use registers, so we don't need prefixes for memory operands.
nexpaq 0:6c56fb4bc5f0 73 * Operand macros are in gas order (src, dst) as opposed to Intel order
nexpaq 0:6c56fb4bc5f0 74 * (dst, src) in order to blend better into the surrounding assembly code.
nexpaq 0:6c56fb4bc5f0 75 */
nexpaq 0:6c56fb4bc5f0 76 #define AESDEC ".byte 0x66,0x0F,0x38,0xDE,"
nexpaq 0:6c56fb4bc5f0 77 #define AESDECLAST ".byte 0x66,0x0F,0x38,0xDF,"
nexpaq 0:6c56fb4bc5f0 78 #define AESENC ".byte 0x66,0x0F,0x38,0xDC,"
nexpaq 0:6c56fb4bc5f0 79 #define AESENCLAST ".byte 0x66,0x0F,0x38,0xDD,"
nexpaq 0:6c56fb4bc5f0 80 #define AESIMC ".byte 0x66,0x0F,0x38,0xDB,"
nexpaq 0:6c56fb4bc5f0 81 #define AESKEYGENA ".byte 0x66,0x0F,0x3A,0xDF,"
nexpaq 0:6c56fb4bc5f0 82 #define PCLMULQDQ ".byte 0x66,0x0F,0x3A,0x44,"
nexpaq 0:6c56fb4bc5f0 83
nexpaq 0:6c56fb4bc5f0 84 #define xmm0_xmm0 "0xC0"
nexpaq 0:6c56fb4bc5f0 85 #define xmm0_xmm1 "0xC8"
nexpaq 0:6c56fb4bc5f0 86 #define xmm0_xmm2 "0xD0"
nexpaq 0:6c56fb4bc5f0 87 #define xmm0_xmm3 "0xD8"
nexpaq 0:6c56fb4bc5f0 88 #define xmm0_xmm4 "0xE0"
nexpaq 0:6c56fb4bc5f0 89 #define xmm1_xmm0 "0xC1"
nexpaq 0:6c56fb4bc5f0 90 #define xmm1_xmm2 "0xD1"
nexpaq 0:6c56fb4bc5f0 91
nexpaq 0:6c56fb4bc5f0 92 /*
nexpaq 0:6c56fb4bc5f0 93 * AES-NI AES-ECB block en(de)cryption
nexpaq 0:6c56fb4bc5f0 94 */
nexpaq 0:6c56fb4bc5f0 95 int mbedtls_aesni_crypt_ecb( mbedtls_aes_context *ctx,
nexpaq 0:6c56fb4bc5f0 96 int mode,
nexpaq 0:6c56fb4bc5f0 97 const unsigned char input[16],
nexpaq 0:6c56fb4bc5f0 98 unsigned char output[16] )
nexpaq 0:6c56fb4bc5f0 99 {
nexpaq 0:6c56fb4bc5f0 100 asm( "movdqu (%3), %%xmm0 \n\t" // load input
nexpaq 0:6c56fb4bc5f0 101 "movdqu (%1), %%xmm1 \n\t" // load round key 0
nexpaq 0:6c56fb4bc5f0 102 "pxor %%xmm1, %%xmm0 \n\t" // round 0
nexpaq 0:6c56fb4bc5f0 103 "add $16, %1 \n\t" // point to next round key
nexpaq 0:6c56fb4bc5f0 104 "subl $1, %0 \n\t" // normal rounds = nr - 1
nexpaq 0:6c56fb4bc5f0 105 "test %2, %2 \n\t" // mode?
nexpaq 0:6c56fb4bc5f0 106 "jz 2f \n\t" // 0 = decrypt
nexpaq 0:6c56fb4bc5f0 107
nexpaq 0:6c56fb4bc5f0 108 "1: \n\t" // encryption loop
nexpaq 0:6c56fb4bc5f0 109 "movdqu (%1), %%xmm1 \n\t" // load round key
nexpaq 0:6c56fb4bc5f0 110 AESENC xmm1_xmm0 "\n\t" // do round
nexpaq 0:6c56fb4bc5f0 111 "add $16, %1 \n\t" // point to next round key
nexpaq 0:6c56fb4bc5f0 112 "subl $1, %0 \n\t" // loop
nexpaq 0:6c56fb4bc5f0 113 "jnz 1b \n\t"
nexpaq 0:6c56fb4bc5f0 114 "movdqu (%1), %%xmm1 \n\t" // load round key
nexpaq 0:6c56fb4bc5f0 115 AESENCLAST xmm1_xmm0 "\n\t" // last round
nexpaq 0:6c56fb4bc5f0 116 "jmp 3f \n\t"
nexpaq 0:6c56fb4bc5f0 117
nexpaq 0:6c56fb4bc5f0 118 "2: \n\t" // decryption loop
nexpaq 0:6c56fb4bc5f0 119 "movdqu (%1), %%xmm1 \n\t"
nexpaq 0:6c56fb4bc5f0 120 AESDEC xmm1_xmm0 "\n\t" // do round
nexpaq 0:6c56fb4bc5f0 121 "add $16, %1 \n\t"
nexpaq 0:6c56fb4bc5f0 122 "subl $1, %0 \n\t"
nexpaq 0:6c56fb4bc5f0 123 "jnz 2b \n\t"
nexpaq 0:6c56fb4bc5f0 124 "movdqu (%1), %%xmm1 \n\t" // load round key
nexpaq 0:6c56fb4bc5f0 125 AESDECLAST xmm1_xmm0 "\n\t" // last round
nexpaq 0:6c56fb4bc5f0 126
nexpaq 0:6c56fb4bc5f0 127 "3: \n\t"
nexpaq 0:6c56fb4bc5f0 128 "movdqu %%xmm0, (%4) \n\t" // export output
nexpaq 0:6c56fb4bc5f0 129 :
nexpaq 0:6c56fb4bc5f0 130 : "r" (ctx->nr), "r" (ctx->rk), "r" (mode), "r" (input), "r" (output)
nexpaq 0:6c56fb4bc5f0 131 : "memory", "cc", "xmm0", "xmm1" );
nexpaq 0:6c56fb4bc5f0 132
nexpaq 0:6c56fb4bc5f0 133
nexpaq 0:6c56fb4bc5f0 134 return( 0 );
nexpaq 0:6c56fb4bc5f0 135 }
nexpaq 0:6c56fb4bc5f0 136
nexpaq 0:6c56fb4bc5f0 137 /*
nexpaq 0:6c56fb4bc5f0 138 * GCM multiplication: c = a times b in GF(2^128)
nexpaq 0:6c56fb4bc5f0 139 * Based on [CLMUL-WP] algorithms 1 (with equation 27) and 5.
nexpaq 0:6c56fb4bc5f0 140 */
nexpaq 0:6c56fb4bc5f0 141 void mbedtls_aesni_gcm_mult( unsigned char c[16],
nexpaq 0:6c56fb4bc5f0 142 const unsigned char a[16],
nexpaq 0:6c56fb4bc5f0 143 const unsigned char b[16] )
nexpaq 0:6c56fb4bc5f0 144 {
nexpaq 0:6c56fb4bc5f0 145 unsigned char aa[16], bb[16], cc[16];
nexpaq 0:6c56fb4bc5f0 146 size_t i;
nexpaq 0:6c56fb4bc5f0 147
nexpaq 0:6c56fb4bc5f0 148 /* The inputs are in big-endian order, so byte-reverse them */
nexpaq 0:6c56fb4bc5f0 149 for( i = 0; i < 16; i++ )
nexpaq 0:6c56fb4bc5f0 150 {
nexpaq 0:6c56fb4bc5f0 151 aa[i] = a[15 - i];
nexpaq 0:6c56fb4bc5f0 152 bb[i] = b[15 - i];
nexpaq 0:6c56fb4bc5f0 153 }
nexpaq 0:6c56fb4bc5f0 154
nexpaq 0:6c56fb4bc5f0 155 asm( "movdqu (%0), %%xmm0 \n\t" // a1:a0
nexpaq 0:6c56fb4bc5f0 156 "movdqu (%1), %%xmm1 \n\t" // b1:b0
nexpaq 0:6c56fb4bc5f0 157
nexpaq 0:6c56fb4bc5f0 158 /*
nexpaq 0:6c56fb4bc5f0 159 * Caryless multiplication xmm2:xmm1 = xmm0 * xmm1
nexpaq 0:6c56fb4bc5f0 160 * using [CLMUL-WP] algorithm 1 (p. 13).
nexpaq 0:6c56fb4bc5f0 161 */
nexpaq 0:6c56fb4bc5f0 162 "movdqa %%xmm1, %%xmm2 \n\t" // copy of b1:b0
nexpaq 0:6c56fb4bc5f0 163 "movdqa %%xmm1, %%xmm3 \n\t" // same
nexpaq 0:6c56fb4bc5f0 164 "movdqa %%xmm1, %%xmm4 \n\t" // same
nexpaq 0:6c56fb4bc5f0 165 PCLMULQDQ xmm0_xmm1 ",0x00 \n\t" // a0*b0 = c1:c0
nexpaq 0:6c56fb4bc5f0 166 PCLMULQDQ xmm0_xmm2 ",0x11 \n\t" // a1*b1 = d1:d0
nexpaq 0:6c56fb4bc5f0 167 PCLMULQDQ xmm0_xmm3 ",0x10 \n\t" // a0*b1 = e1:e0
nexpaq 0:6c56fb4bc5f0 168 PCLMULQDQ xmm0_xmm4 ",0x01 \n\t" // a1*b0 = f1:f0
nexpaq 0:6c56fb4bc5f0 169 "pxor %%xmm3, %%xmm4 \n\t" // e1+f1:e0+f0
nexpaq 0:6c56fb4bc5f0 170 "movdqa %%xmm4, %%xmm3 \n\t" // same
nexpaq 0:6c56fb4bc5f0 171 "psrldq $8, %%xmm4 \n\t" // 0:e1+f1
nexpaq 0:6c56fb4bc5f0 172 "pslldq $8, %%xmm3 \n\t" // e0+f0:0
nexpaq 0:6c56fb4bc5f0 173 "pxor %%xmm4, %%xmm2 \n\t" // d1:d0+e1+f1
nexpaq 0:6c56fb4bc5f0 174 "pxor %%xmm3, %%xmm1 \n\t" // c1+e0+f1:c0
nexpaq 0:6c56fb4bc5f0 175
nexpaq 0:6c56fb4bc5f0 176 /*
nexpaq 0:6c56fb4bc5f0 177 * Now shift the result one bit to the left,
nexpaq 0:6c56fb4bc5f0 178 * taking advantage of [CLMUL-WP] eq 27 (p. 20)
nexpaq 0:6c56fb4bc5f0 179 */
nexpaq 0:6c56fb4bc5f0 180 "movdqa %%xmm1, %%xmm3 \n\t" // r1:r0
nexpaq 0:6c56fb4bc5f0 181 "movdqa %%xmm2, %%xmm4 \n\t" // r3:r2
nexpaq 0:6c56fb4bc5f0 182 "psllq $1, %%xmm1 \n\t" // r1<<1:r0<<1
nexpaq 0:6c56fb4bc5f0 183 "psllq $1, %%xmm2 \n\t" // r3<<1:r2<<1
nexpaq 0:6c56fb4bc5f0 184 "psrlq $63, %%xmm3 \n\t" // r1>>63:r0>>63
nexpaq 0:6c56fb4bc5f0 185 "psrlq $63, %%xmm4 \n\t" // r3>>63:r2>>63
nexpaq 0:6c56fb4bc5f0 186 "movdqa %%xmm3, %%xmm5 \n\t" // r1>>63:r0>>63
nexpaq 0:6c56fb4bc5f0 187 "pslldq $8, %%xmm3 \n\t" // r0>>63:0
nexpaq 0:6c56fb4bc5f0 188 "pslldq $8, %%xmm4 \n\t" // r2>>63:0
nexpaq 0:6c56fb4bc5f0 189 "psrldq $8, %%xmm5 \n\t" // 0:r1>>63
nexpaq 0:6c56fb4bc5f0 190 "por %%xmm3, %%xmm1 \n\t" // r1<<1|r0>>63:r0<<1
nexpaq 0:6c56fb4bc5f0 191 "por %%xmm4, %%xmm2 \n\t" // r3<<1|r2>>62:r2<<1
nexpaq 0:6c56fb4bc5f0 192 "por %%xmm5, %%xmm2 \n\t" // r3<<1|r2>>62:r2<<1|r1>>63
nexpaq 0:6c56fb4bc5f0 193
nexpaq 0:6c56fb4bc5f0 194 /*
nexpaq 0:6c56fb4bc5f0 195 * Now reduce modulo the GCM polynomial x^128 + x^7 + x^2 + x + 1
nexpaq 0:6c56fb4bc5f0 196 * using [CLMUL-WP] algorithm 5 (p. 20).
nexpaq 0:6c56fb4bc5f0 197 * Currently xmm2:xmm1 holds x3:x2:x1:x0 (already shifted).
nexpaq 0:6c56fb4bc5f0 198 */
nexpaq 0:6c56fb4bc5f0 199 /* Step 2 (1) */
nexpaq 0:6c56fb4bc5f0 200 "movdqa %%xmm1, %%xmm3 \n\t" // x1:x0
nexpaq 0:6c56fb4bc5f0 201 "movdqa %%xmm1, %%xmm4 \n\t" // same
nexpaq 0:6c56fb4bc5f0 202 "movdqa %%xmm1, %%xmm5 \n\t" // same
nexpaq 0:6c56fb4bc5f0 203 "psllq $63, %%xmm3 \n\t" // x1<<63:x0<<63 = stuff:a
nexpaq 0:6c56fb4bc5f0 204 "psllq $62, %%xmm4 \n\t" // x1<<62:x0<<62 = stuff:b
nexpaq 0:6c56fb4bc5f0 205 "psllq $57, %%xmm5 \n\t" // x1<<57:x0<<57 = stuff:c
nexpaq 0:6c56fb4bc5f0 206
nexpaq 0:6c56fb4bc5f0 207 /* Step 2 (2) */
nexpaq 0:6c56fb4bc5f0 208 "pxor %%xmm4, %%xmm3 \n\t" // stuff:a+b
nexpaq 0:6c56fb4bc5f0 209 "pxor %%xmm5, %%xmm3 \n\t" // stuff:a+b+c
nexpaq 0:6c56fb4bc5f0 210 "pslldq $8, %%xmm3 \n\t" // a+b+c:0
nexpaq 0:6c56fb4bc5f0 211 "pxor %%xmm3, %%xmm1 \n\t" // x1+a+b+c:x0 = d:x0
nexpaq 0:6c56fb4bc5f0 212
nexpaq 0:6c56fb4bc5f0 213 /* Steps 3 and 4 */
nexpaq 0:6c56fb4bc5f0 214 "movdqa %%xmm1,%%xmm0 \n\t" // d:x0
nexpaq 0:6c56fb4bc5f0 215 "movdqa %%xmm1,%%xmm4 \n\t" // same
nexpaq 0:6c56fb4bc5f0 216 "movdqa %%xmm1,%%xmm5 \n\t" // same
nexpaq 0:6c56fb4bc5f0 217 "psrlq $1, %%xmm0 \n\t" // e1:x0>>1 = e1:e0'
nexpaq 0:6c56fb4bc5f0 218 "psrlq $2, %%xmm4 \n\t" // f1:x0>>2 = f1:f0'
nexpaq 0:6c56fb4bc5f0 219 "psrlq $7, %%xmm5 \n\t" // g1:x0>>7 = g1:g0'
nexpaq 0:6c56fb4bc5f0 220 "pxor %%xmm4, %%xmm0 \n\t" // e1+f1:e0'+f0'
nexpaq 0:6c56fb4bc5f0 221 "pxor %%xmm5, %%xmm0 \n\t" // e1+f1+g1:e0'+f0'+g0'
nexpaq 0:6c56fb4bc5f0 222 // e0'+f0'+g0' is almost e0+f0+g0, ex\tcept for some missing
nexpaq 0:6c56fb4bc5f0 223 // bits carried from d. Now get those\t bits back in.
nexpaq 0:6c56fb4bc5f0 224 "movdqa %%xmm1,%%xmm3 \n\t" // d:x0
nexpaq 0:6c56fb4bc5f0 225 "movdqa %%xmm1,%%xmm4 \n\t" // same
nexpaq 0:6c56fb4bc5f0 226 "movdqa %%xmm1,%%xmm5 \n\t" // same
nexpaq 0:6c56fb4bc5f0 227 "psllq $63, %%xmm3 \n\t" // d<<63:stuff
nexpaq 0:6c56fb4bc5f0 228 "psllq $62, %%xmm4 \n\t" // d<<62:stuff
nexpaq 0:6c56fb4bc5f0 229 "psllq $57, %%xmm5 \n\t" // d<<57:stuff
nexpaq 0:6c56fb4bc5f0 230 "pxor %%xmm4, %%xmm3 \n\t" // d<<63+d<<62:stuff
nexpaq 0:6c56fb4bc5f0 231 "pxor %%xmm5, %%xmm3 \n\t" // missing bits of d:stuff
nexpaq 0:6c56fb4bc5f0 232 "psrldq $8, %%xmm3 \n\t" // 0:missing bits of d
nexpaq 0:6c56fb4bc5f0 233 "pxor %%xmm3, %%xmm0 \n\t" // e1+f1+g1:e0+f0+g0
nexpaq 0:6c56fb4bc5f0 234 "pxor %%xmm1, %%xmm0 \n\t" // h1:h0
nexpaq 0:6c56fb4bc5f0 235 "pxor %%xmm2, %%xmm0 \n\t" // x3+h1:x2+h0
nexpaq 0:6c56fb4bc5f0 236
nexpaq 0:6c56fb4bc5f0 237 "movdqu %%xmm0, (%2) \n\t" // done
nexpaq 0:6c56fb4bc5f0 238 :
nexpaq 0:6c56fb4bc5f0 239 : "r" (aa), "r" (bb), "r" (cc)
nexpaq 0:6c56fb4bc5f0 240 : "memory", "cc", "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5" );
nexpaq 0:6c56fb4bc5f0 241
nexpaq 0:6c56fb4bc5f0 242 /* Now byte-reverse the outputs */
nexpaq 0:6c56fb4bc5f0 243 for( i = 0; i < 16; i++ )
nexpaq 0:6c56fb4bc5f0 244 c[i] = cc[15 - i];
nexpaq 0:6c56fb4bc5f0 245
nexpaq 0:6c56fb4bc5f0 246 return;
nexpaq 0:6c56fb4bc5f0 247 }
nexpaq 0:6c56fb4bc5f0 248
nexpaq 0:6c56fb4bc5f0 249 /*
nexpaq 0:6c56fb4bc5f0 250 * Compute decryption round keys from encryption round keys
nexpaq 0:6c56fb4bc5f0 251 */
nexpaq 0:6c56fb4bc5f0 252 void mbedtls_aesni_inverse_key( unsigned char *invkey,
nexpaq 0:6c56fb4bc5f0 253 const unsigned char *fwdkey, int nr )
nexpaq 0:6c56fb4bc5f0 254 {
nexpaq 0:6c56fb4bc5f0 255 unsigned char *ik = invkey;
nexpaq 0:6c56fb4bc5f0 256 const unsigned char *fk = fwdkey + 16 * nr;
nexpaq 0:6c56fb4bc5f0 257
nexpaq 0:6c56fb4bc5f0 258 memcpy( ik, fk, 16 );
nexpaq 0:6c56fb4bc5f0 259
nexpaq 0:6c56fb4bc5f0 260 for( fk -= 16, ik += 16; fk > fwdkey; fk -= 16, ik += 16 )
nexpaq 0:6c56fb4bc5f0 261 asm( "movdqu (%0), %%xmm0 \n\t"
nexpaq 0:6c56fb4bc5f0 262 AESIMC xmm0_xmm0 "\n\t"
nexpaq 0:6c56fb4bc5f0 263 "movdqu %%xmm0, (%1) \n\t"
nexpaq 0:6c56fb4bc5f0 264 :
nexpaq 0:6c56fb4bc5f0 265 : "r" (fk), "r" (ik)
nexpaq 0:6c56fb4bc5f0 266 : "memory", "xmm0" );
nexpaq 0:6c56fb4bc5f0 267
nexpaq 0:6c56fb4bc5f0 268 memcpy( ik, fk, 16 );
nexpaq 0:6c56fb4bc5f0 269 }
nexpaq 0:6c56fb4bc5f0 270
nexpaq 0:6c56fb4bc5f0 271 /*
nexpaq 0:6c56fb4bc5f0 272 * Key expansion, 128-bit case
nexpaq 0:6c56fb4bc5f0 273 */
nexpaq 0:6c56fb4bc5f0 274 static void aesni_setkey_enc_128( unsigned char *rk,
nexpaq 0:6c56fb4bc5f0 275 const unsigned char *key )
nexpaq 0:6c56fb4bc5f0 276 {
nexpaq 0:6c56fb4bc5f0 277 asm( "movdqu (%1), %%xmm0 \n\t" // copy the original key
nexpaq 0:6c56fb4bc5f0 278 "movdqu %%xmm0, (%0) \n\t" // as round key 0
nexpaq 0:6c56fb4bc5f0 279 "jmp 2f \n\t" // skip auxiliary routine
nexpaq 0:6c56fb4bc5f0 280
nexpaq 0:6c56fb4bc5f0 281 /*
nexpaq 0:6c56fb4bc5f0 282 * Finish generating the next round key.
nexpaq 0:6c56fb4bc5f0 283 *
nexpaq 0:6c56fb4bc5f0 284 * On entry xmm0 is r3:r2:r1:r0 and xmm1 is X:stuff:stuff:stuff
nexpaq 0:6c56fb4bc5f0 285 * with X = rot( sub( r3 ) ) ^ RCON.
nexpaq 0:6c56fb4bc5f0 286 *
nexpaq 0:6c56fb4bc5f0 287 * On exit, xmm0 is r7:r6:r5:r4
nexpaq 0:6c56fb4bc5f0 288 * with r4 = X + r0, r5 = r4 + r1, r6 = r5 + r2, r7 = r6 + r3
nexpaq 0:6c56fb4bc5f0 289 * and those are written to the round key buffer.
nexpaq 0:6c56fb4bc5f0 290 */
nexpaq 0:6c56fb4bc5f0 291 "1: \n\t"
nexpaq 0:6c56fb4bc5f0 292 "pshufd $0xff, %%xmm1, %%xmm1 \n\t" // X:X:X:X
nexpaq 0:6c56fb4bc5f0 293 "pxor %%xmm0, %%xmm1 \n\t" // X+r3:X+r2:X+r1:r4
nexpaq 0:6c56fb4bc5f0 294 "pslldq $4, %%xmm0 \n\t" // r2:r1:r0:0
nexpaq 0:6c56fb4bc5f0 295 "pxor %%xmm0, %%xmm1 \n\t" // X+r3+r2:X+r2+r1:r5:r4
nexpaq 0:6c56fb4bc5f0 296 "pslldq $4, %%xmm0 \n\t" // etc
nexpaq 0:6c56fb4bc5f0 297 "pxor %%xmm0, %%xmm1 \n\t"
nexpaq 0:6c56fb4bc5f0 298 "pslldq $4, %%xmm0 \n\t"
nexpaq 0:6c56fb4bc5f0 299 "pxor %%xmm1, %%xmm0 \n\t" // update xmm0 for next time!
nexpaq 0:6c56fb4bc5f0 300 "add $16, %0 \n\t" // point to next round key
nexpaq 0:6c56fb4bc5f0 301 "movdqu %%xmm0, (%0) \n\t" // write it
nexpaq 0:6c56fb4bc5f0 302 "ret \n\t"
nexpaq 0:6c56fb4bc5f0 303
nexpaq 0:6c56fb4bc5f0 304 /* Main "loop" */
nexpaq 0:6c56fb4bc5f0 305 "2: \n\t"
nexpaq 0:6c56fb4bc5f0 306 AESKEYGENA xmm0_xmm1 ",0x01 \n\tcall 1b \n\t"
nexpaq 0:6c56fb4bc5f0 307 AESKEYGENA xmm0_xmm1 ",0x02 \n\tcall 1b \n\t"
nexpaq 0:6c56fb4bc5f0 308 AESKEYGENA xmm0_xmm1 ",0x04 \n\tcall 1b \n\t"
nexpaq 0:6c56fb4bc5f0 309 AESKEYGENA xmm0_xmm1 ",0x08 \n\tcall 1b \n\t"
nexpaq 0:6c56fb4bc5f0 310 AESKEYGENA xmm0_xmm1 ",0x10 \n\tcall 1b \n\t"
nexpaq 0:6c56fb4bc5f0 311 AESKEYGENA xmm0_xmm1 ",0x20 \n\tcall 1b \n\t"
nexpaq 0:6c56fb4bc5f0 312 AESKEYGENA xmm0_xmm1 ",0x40 \n\tcall 1b \n\t"
nexpaq 0:6c56fb4bc5f0 313 AESKEYGENA xmm0_xmm1 ",0x80 \n\tcall 1b \n\t"
nexpaq 0:6c56fb4bc5f0 314 AESKEYGENA xmm0_xmm1 ",0x1B \n\tcall 1b \n\t"
nexpaq 0:6c56fb4bc5f0 315 AESKEYGENA xmm0_xmm1 ",0x36 \n\tcall 1b \n\t"
nexpaq 0:6c56fb4bc5f0 316 :
nexpaq 0:6c56fb4bc5f0 317 : "r" (rk), "r" (key)
nexpaq 0:6c56fb4bc5f0 318 : "memory", "cc", "0" );
nexpaq 0:6c56fb4bc5f0 319 }
nexpaq 0:6c56fb4bc5f0 320
nexpaq 0:6c56fb4bc5f0 321 /*
nexpaq 0:6c56fb4bc5f0 322 * Key expansion, 192-bit case
nexpaq 0:6c56fb4bc5f0 323 */
nexpaq 0:6c56fb4bc5f0 324 static void aesni_setkey_enc_192( unsigned char *rk,
nexpaq 0:6c56fb4bc5f0 325 const unsigned char *key )
nexpaq 0:6c56fb4bc5f0 326 {
nexpaq 0:6c56fb4bc5f0 327 asm( "movdqu (%1), %%xmm0 \n\t" // copy original round key
nexpaq 0:6c56fb4bc5f0 328 "movdqu %%xmm0, (%0) \n\t"
nexpaq 0:6c56fb4bc5f0 329 "add $16, %0 \n\t"
nexpaq 0:6c56fb4bc5f0 330 "movq 16(%1), %%xmm1 \n\t"
nexpaq 0:6c56fb4bc5f0 331 "movq %%xmm1, (%0) \n\t"
nexpaq 0:6c56fb4bc5f0 332 "add $8, %0 \n\t"
nexpaq 0:6c56fb4bc5f0 333 "jmp 2f \n\t" // skip auxiliary routine
nexpaq 0:6c56fb4bc5f0 334
nexpaq 0:6c56fb4bc5f0 335 /*
nexpaq 0:6c56fb4bc5f0 336 * Finish generating the next 6 quarter-keys.
nexpaq 0:6c56fb4bc5f0 337 *
nexpaq 0:6c56fb4bc5f0 338 * On entry xmm0 is r3:r2:r1:r0, xmm1 is stuff:stuff:r5:r4
nexpaq 0:6c56fb4bc5f0 339 * and xmm2 is stuff:stuff:X:stuff with X = rot( sub( r3 ) ) ^ RCON.
nexpaq 0:6c56fb4bc5f0 340 *
nexpaq 0:6c56fb4bc5f0 341 * On exit, xmm0 is r9:r8:r7:r6 and xmm1 is stuff:stuff:r11:r10
nexpaq 0:6c56fb4bc5f0 342 * and those are written to the round key buffer.
nexpaq 0:6c56fb4bc5f0 343 */
nexpaq 0:6c56fb4bc5f0 344 "1: \n\t"
nexpaq 0:6c56fb4bc5f0 345 "pshufd $0x55, %%xmm2, %%xmm2 \n\t" // X:X:X:X
nexpaq 0:6c56fb4bc5f0 346 "pxor %%xmm0, %%xmm2 \n\t" // X+r3:X+r2:X+r1:r4
nexpaq 0:6c56fb4bc5f0 347 "pslldq $4, %%xmm0 \n\t" // etc
nexpaq 0:6c56fb4bc5f0 348 "pxor %%xmm0, %%xmm2 \n\t"
nexpaq 0:6c56fb4bc5f0 349 "pslldq $4, %%xmm0 \n\t"
nexpaq 0:6c56fb4bc5f0 350 "pxor %%xmm0, %%xmm2 \n\t"
nexpaq 0:6c56fb4bc5f0 351 "pslldq $4, %%xmm0 \n\t"
nexpaq 0:6c56fb4bc5f0 352 "pxor %%xmm2, %%xmm0 \n\t" // update xmm0 = r9:r8:r7:r6
nexpaq 0:6c56fb4bc5f0 353 "movdqu %%xmm0, (%0) \n\t"
nexpaq 0:6c56fb4bc5f0 354 "add $16, %0 \n\t"
nexpaq 0:6c56fb4bc5f0 355 "pshufd $0xff, %%xmm0, %%xmm2 \n\t" // r9:r9:r9:r9
nexpaq 0:6c56fb4bc5f0 356 "pxor %%xmm1, %%xmm2 \n\t" // stuff:stuff:r9+r5:r10
nexpaq 0:6c56fb4bc5f0 357 "pslldq $4, %%xmm1 \n\t" // r2:r1:r0:0
nexpaq 0:6c56fb4bc5f0 358 "pxor %%xmm2, %%xmm1 \n\t" // xmm1 = stuff:stuff:r11:r10
nexpaq 0:6c56fb4bc5f0 359 "movq %%xmm1, (%0) \n\t"
nexpaq 0:6c56fb4bc5f0 360 "add $8, %0 \n\t"
nexpaq 0:6c56fb4bc5f0 361 "ret \n\t"
nexpaq 0:6c56fb4bc5f0 362
nexpaq 0:6c56fb4bc5f0 363 "2: \n\t"
nexpaq 0:6c56fb4bc5f0 364 AESKEYGENA xmm1_xmm2 ",0x01 \n\tcall 1b \n\t"
nexpaq 0:6c56fb4bc5f0 365 AESKEYGENA xmm1_xmm2 ",0x02 \n\tcall 1b \n\t"
nexpaq 0:6c56fb4bc5f0 366 AESKEYGENA xmm1_xmm2 ",0x04 \n\tcall 1b \n\t"
nexpaq 0:6c56fb4bc5f0 367 AESKEYGENA xmm1_xmm2 ",0x08 \n\tcall 1b \n\t"
nexpaq 0:6c56fb4bc5f0 368 AESKEYGENA xmm1_xmm2 ",0x10 \n\tcall 1b \n\t"
nexpaq 0:6c56fb4bc5f0 369 AESKEYGENA xmm1_xmm2 ",0x20 \n\tcall 1b \n\t"
nexpaq 0:6c56fb4bc5f0 370 AESKEYGENA xmm1_xmm2 ",0x40 \n\tcall 1b \n\t"
nexpaq 0:6c56fb4bc5f0 371 AESKEYGENA xmm1_xmm2 ",0x80 \n\tcall 1b \n\t"
nexpaq 0:6c56fb4bc5f0 372
nexpaq 0:6c56fb4bc5f0 373 :
nexpaq 0:6c56fb4bc5f0 374 : "r" (rk), "r" (key)
nexpaq 0:6c56fb4bc5f0 375 : "memory", "cc", "0" );
nexpaq 0:6c56fb4bc5f0 376 }
nexpaq 0:6c56fb4bc5f0 377
nexpaq 0:6c56fb4bc5f0 378 /*
nexpaq 0:6c56fb4bc5f0 379 * Key expansion, 256-bit case
nexpaq 0:6c56fb4bc5f0 380 */
nexpaq 0:6c56fb4bc5f0 381 static void aesni_setkey_enc_256( unsigned char *rk,
nexpaq 0:6c56fb4bc5f0 382 const unsigned char *key )
nexpaq 0:6c56fb4bc5f0 383 {
nexpaq 0:6c56fb4bc5f0 384 asm( "movdqu (%1), %%xmm0 \n\t"
nexpaq 0:6c56fb4bc5f0 385 "movdqu %%xmm0, (%0) \n\t"
nexpaq 0:6c56fb4bc5f0 386 "add $16, %0 \n\t"
nexpaq 0:6c56fb4bc5f0 387 "movdqu 16(%1), %%xmm1 \n\t"
nexpaq 0:6c56fb4bc5f0 388 "movdqu %%xmm1, (%0) \n\t"
nexpaq 0:6c56fb4bc5f0 389 "jmp 2f \n\t" // skip auxiliary routine
nexpaq 0:6c56fb4bc5f0 390
nexpaq 0:6c56fb4bc5f0 391 /*
nexpaq 0:6c56fb4bc5f0 392 * Finish generating the next two round keys.
nexpaq 0:6c56fb4bc5f0 393 *
nexpaq 0:6c56fb4bc5f0 394 * On entry xmm0 is r3:r2:r1:r0, xmm1 is r7:r6:r5:r4 and
nexpaq 0:6c56fb4bc5f0 395 * xmm2 is X:stuff:stuff:stuff with X = rot( sub( r7 )) ^ RCON
nexpaq 0:6c56fb4bc5f0 396 *
nexpaq 0:6c56fb4bc5f0 397 * On exit, xmm0 is r11:r10:r9:r8 and xmm1 is r15:r14:r13:r12
nexpaq 0:6c56fb4bc5f0 398 * and those have been written to the output buffer.
nexpaq 0:6c56fb4bc5f0 399 */
nexpaq 0:6c56fb4bc5f0 400 "1: \n\t"
nexpaq 0:6c56fb4bc5f0 401 "pshufd $0xff, %%xmm2, %%xmm2 \n\t"
nexpaq 0:6c56fb4bc5f0 402 "pxor %%xmm0, %%xmm2 \n\t"
nexpaq 0:6c56fb4bc5f0 403 "pslldq $4, %%xmm0 \n\t"
nexpaq 0:6c56fb4bc5f0 404 "pxor %%xmm0, %%xmm2 \n\t"
nexpaq 0:6c56fb4bc5f0 405 "pslldq $4, %%xmm0 \n\t"
nexpaq 0:6c56fb4bc5f0 406 "pxor %%xmm0, %%xmm2 \n\t"
nexpaq 0:6c56fb4bc5f0 407 "pslldq $4, %%xmm0 \n\t"
nexpaq 0:6c56fb4bc5f0 408 "pxor %%xmm2, %%xmm0 \n\t"
nexpaq 0:6c56fb4bc5f0 409 "add $16, %0 \n\t"
nexpaq 0:6c56fb4bc5f0 410 "movdqu %%xmm0, (%0) \n\t"
nexpaq 0:6c56fb4bc5f0 411
nexpaq 0:6c56fb4bc5f0 412 /* Set xmm2 to stuff:Y:stuff:stuff with Y = subword( r11 )
nexpaq 0:6c56fb4bc5f0 413 * and proceed to generate next round key from there */
nexpaq 0:6c56fb4bc5f0 414 AESKEYGENA xmm0_xmm2 ",0x00 \n\t"
nexpaq 0:6c56fb4bc5f0 415 "pshufd $0xaa, %%xmm2, %%xmm2 \n\t"
nexpaq 0:6c56fb4bc5f0 416 "pxor %%xmm1, %%xmm2 \n\t"
nexpaq 0:6c56fb4bc5f0 417 "pslldq $4, %%xmm1 \n\t"
nexpaq 0:6c56fb4bc5f0 418 "pxor %%xmm1, %%xmm2 \n\t"
nexpaq 0:6c56fb4bc5f0 419 "pslldq $4, %%xmm1 \n\t"
nexpaq 0:6c56fb4bc5f0 420 "pxor %%xmm1, %%xmm2 \n\t"
nexpaq 0:6c56fb4bc5f0 421 "pslldq $4, %%xmm1 \n\t"
nexpaq 0:6c56fb4bc5f0 422 "pxor %%xmm2, %%xmm1 \n\t"
nexpaq 0:6c56fb4bc5f0 423 "add $16, %0 \n\t"
nexpaq 0:6c56fb4bc5f0 424 "movdqu %%xmm1, (%0) \n\t"
nexpaq 0:6c56fb4bc5f0 425 "ret \n\t"
nexpaq 0:6c56fb4bc5f0 426
nexpaq 0:6c56fb4bc5f0 427 /*
nexpaq 0:6c56fb4bc5f0 428 * Main "loop" - Generating one more key than necessary,
nexpaq 0:6c56fb4bc5f0 429 * see definition of mbedtls_aes_context.buf
nexpaq 0:6c56fb4bc5f0 430 */
nexpaq 0:6c56fb4bc5f0 431 "2: \n\t"
nexpaq 0:6c56fb4bc5f0 432 AESKEYGENA xmm1_xmm2 ",0x01 \n\tcall 1b \n\t"
nexpaq 0:6c56fb4bc5f0 433 AESKEYGENA xmm1_xmm2 ",0x02 \n\tcall 1b \n\t"
nexpaq 0:6c56fb4bc5f0 434 AESKEYGENA xmm1_xmm2 ",0x04 \n\tcall 1b \n\t"
nexpaq 0:6c56fb4bc5f0 435 AESKEYGENA xmm1_xmm2 ",0x08 \n\tcall 1b \n\t"
nexpaq 0:6c56fb4bc5f0 436 AESKEYGENA xmm1_xmm2 ",0x10 \n\tcall 1b \n\t"
nexpaq 0:6c56fb4bc5f0 437 AESKEYGENA xmm1_xmm2 ",0x20 \n\tcall 1b \n\t"
nexpaq 0:6c56fb4bc5f0 438 AESKEYGENA xmm1_xmm2 ",0x40 \n\tcall 1b \n\t"
nexpaq 0:6c56fb4bc5f0 439 :
nexpaq 0:6c56fb4bc5f0 440 : "r" (rk), "r" (key)
nexpaq 0:6c56fb4bc5f0 441 : "memory", "cc", "0" );
nexpaq 0:6c56fb4bc5f0 442 }
nexpaq 0:6c56fb4bc5f0 443
nexpaq 0:6c56fb4bc5f0 444 /*
nexpaq 0:6c56fb4bc5f0 445 * Key expansion, wrapper
nexpaq 0:6c56fb4bc5f0 446 */
nexpaq 0:6c56fb4bc5f0 447 int mbedtls_aesni_setkey_enc( unsigned char *rk,
nexpaq 0:6c56fb4bc5f0 448 const unsigned char *key,
nexpaq 0:6c56fb4bc5f0 449 size_t bits )
nexpaq 0:6c56fb4bc5f0 450 {
nexpaq 0:6c56fb4bc5f0 451 switch( bits )
nexpaq 0:6c56fb4bc5f0 452 {
nexpaq 0:6c56fb4bc5f0 453 case 128: aesni_setkey_enc_128( rk, key ); break;
nexpaq 0:6c56fb4bc5f0 454 case 192: aesni_setkey_enc_192( rk, key ); break;
nexpaq 0:6c56fb4bc5f0 455 case 256: aesni_setkey_enc_256( rk, key ); break;
nexpaq 0:6c56fb4bc5f0 456 default : return( MBEDTLS_ERR_AES_INVALID_KEY_LENGTH );
nexpaq 0:6c56fb4bc5f0 457 }
nexpaq 0:6c56fb4bc5f0 458
nexpaq 0:6c56fb4bc5f0 459 return( 0 );
nexpaq 0:6c56fb4bc5f0 460 }
nexpaq 0:6c56fb4bc5f0 461
nexpaq 0:6c56fb4bc5f0 462 #endif /* MBEDTLS_HAVE_X86_64 */
nexpaq 0:6c56fb4bc5f0 463
nexpaq 0:6c56fb4bc5f0 464 #endif /* MBEDTLS_AESNI_C */