Maxim nexpaq / nexpaq_dev
Committer:
nexpaq
Date:
Fri Nov 04 20:27:58 2016 +0000
Revision:
0:6c56fb4bc5f0
Moving to library for sharing updates

Who changed what in which revision?

UserRevisionLine numberNew contents of line
nexpaq 0:6c56fb4bc5f0 1 #include "test_env.h"
nexpaq 0:6c56fb4bc5f0 2
nexpaq 0:6c56fb4bc5f0 3 #if defined(TARGET_K64F)
nexpaq 0:6c56fb4bc5f0 4 #define P1_1 (1 << 16)
nexpaq 0:6c56fb4bc5f0 5 #define P1_2 (1 << 17)
nexpaq 0:6c56fb4bc5f0 6 #define PORT_1 PortC
nexpaq 0:6c56fb4bc5f0 7
nexpaq 0:6c56fb4bc5f0 8 #define P2_1 (1 << 2)
nexpaq 0:6c56fb4bc5f0 9 #define P2_2 (1 << 3)
nexpaq 0:6c56fb4bc5f0 10 #define PORT_2 PortC
nexpaq 0:6c56fb4bc5f0 11
nexpaq 0:6c56fb4bc5f0 12 #elif defined(TARGET_K66F)
nexpaq 0:6c56fb4bc5f0 13 #define P1_1 (1 << 3)
nexpaq 0:6c56fb4bc5f0 14 #define P1_2 (1 << 4)
nexpaq 0:6c56fb4bc5f0 15 #define PORT_1 PortC
nexpaq 0:6c56fb4bc5f0 16
nexpaq 0:6c56fb4bc5f0 17 #define P2_1 (1 << 5)
nexpaq 0:6c56fb4bc5f0 18 #define P2_2 (1 << 2)
nexpaq 0:6c56fb4bc5f0 19 #define PORT_2 PortC
nexpaq 0:6c56fb4bc5f0 20
nexpaq 0:6c56fb4bc5f0 21 #elif defined(TARGET_LPC11U24)
nexpaq 0:6c56fb4bc5f0 22 #define P1_1 (1 << 9) // p0.9
nexpaq 0:6c56fb4bc5f0 23 #define P1_2 (1 << 8) // p0.8
nexpaq 0:6c56fb4bc5f0 24 #define PORT_1 Port0
nexpaq 0:6c56fb4bc5f0 25
nexpaq 0:6c56fb4bc5f0 26 #define P2_1 (1 << 24) // p1.24
nexpaq 0:6c56fb4bc5f0 27 #define P2_2 (1 << 25) // p1.25
nexpaq 0:6c56fb4bc5f0 28 #define PORT_2 Port1
nexpaq 0:6c56fb4bc5f0 29
nexpaq 0:6c56fb4bc5f0 30 #elif defined(TARGET_LPC1768) || defined(TARGET_LPC2368)
nexpaq 0:6c56fb4bc5f0 31 #define P1_1 (1 << 9) // p0.9 -> p5
nexpaq 0:6c56fb4bc5f0 32 #define P1_2 (1 << 8) // p0.8 -> p6
nexpaq 0:6c56fb4bc5f0 33 #define PORT_1 Port0
nexpaq 0:6c56fb4bc5f0 34
nexpaq 0:6c56fb4bc5f0 35 #define P2_1 (1 << 1) // p2.1 -> p25
nexpaq 0:6c56fb4bc5f0 36 #define P2_2 (1 << 0) // p2.0 -> p26
nexpaq 0:6c56fb4bc5f0 37 #define PORT_2 Port2
nexpaq 0:6c56fb4bc5f0 38
nexpaq 0:6c56fb4bc5f0 39 #elif defined(TARGET_LPC4088)
nexpaq 0:6c56fb4bc5f0 40 #define P1_1 (1 << 7) // p0.7 -> p13
nexpaq 0:6c56fb4bc5f0 41 #define P1_2 (1 << 6) // p0.6 -> p14
nexpaq 0:6c56fb4bc5f0 42 #define PORT_1 Port0
nexpaq 0:6c56fb4bc5f0 43
nexpaq 0:6c56fb4bc5f0 44 #define P2_1 (1 << 2) // p1.2 -> p30
nexpaq 0:6c56fb4bc5f0 45 #define P2_2 (1 << 3) // p1.3 -> p29
nexpaq 0:6c56fb4bc5f0 46 #define PORT_2 Port1
nexpaq 0:6c56fb4bc5f0 47
nexpaq 0:6c56fb4bc5f0 48 #elif defined(TARGET_LPC1114)
nexpaq 0:6c56fb4bc5f0 49 #define P1_1 (1 << 9) // p0.9
nexpaq 0:6c56fb4bc5f0 50 #define P1_2 (1 << 8) // p0.8
nexpaq 0:6c56fb4bc5f0 51 #define PORT_1 Port0
nexpaq 0:6c56fb4bc5f0 52
nexpaq 0:6c56fb4bc5f0 53 #define P2_1 (1 << 1) // p1.1
nexpaq 0:6c56fb4bc5f0 54 #define P2_2 (1 << 0) // p1.0
nexpaq 0:6c56fb4bc5f0 55 #define PORT_2 Port1
nexpaq 0:6c56fb4bc5f0 56
nexpaq 0:6c56fb4bc5f0 57 #elif defined(TARGET_KL25Z)
nexpaq 0:6c56fb4bc5f0 58 #define P1_1 (1 << 4) // PTA4
nexpaq 0:6c56fb4bc5f0 59 #define P1_2 (1 << 5) // PTA5
nexpaq 0:6c56fb4bc5f0 60 #define PORT_1 PortA
nexpaq 0:6c56fb4bc5f0 61
nexpaq 0:6c56fb4bc5f0 62 #define P2_1 (1 << 5) // PTC5
nexpaq 0:6c56fb4bc5f0 63 #define P2_2 (1 << 6) // PTC6
nexpaq 0:6c56fb4bc5f0 64 #define PORT_2 PortC
nexpaq 0:6c56fb4bc5f0 65
nexpaq 0:6c56fb4bc5f0 66 #elif defined(TARGET_nRF51822)
nexpaq 0:6c56fb4bc5f0 67 #define P1_1 (1 << 4) // p4
nexpaq 0:6c56fb4bc5f0 68 #define P1_2 (1 << 5) // p5
nexpaq 0:6c56fb4bc5f0 69 #define PORT_1 Port0
nexpaq 0:6c56fb4bc5f0 70
nexpaq 0:6c56fb4bc5f0 71 #define P2_1 (1 << 24) // p24
nexpaq 0:6c56fb4bc5f0 72 #define P2_2 (1 << 25) // p25
nexpaq 0:6c56fb4bc5f0 73 #define PORT_2 Port0
nexpaq 0:6c56fb4bc5f0 74
nexpaq 0:6c56fb4bc5f0 75 #elif defined(TARGET_MAXWSNENV)
nexpaq 0:6c56fb4bc5f0 76 #define P1_1 (1 << 0)
nexpaq 0:6c56fb4bc5f0 77 #define P1_2 (1 << 1)
nexpaq 0:6c56fb4bc5f0 78 #define PORT_1 Port0
nexpaq 0:6c56fb4bc5f0 79
nexpaq 0:6c56fb4bc5f0 80 #define P2_1 (1 << 0)
nexpaq 0:6c56fb4bc5f0 81 #define P2_2 (1 << 1)
nexpaq 0:6c56fb4bc5f0 82 #define PORT_2 Port1
nexpaq 0:6c56fb4bc5f0 83
nexpaq 0:6c56fb4bc5f0 84 #elif defined(TARGET_MAX32600MBED)
nexpaq 0:6c56fb4bc5f0 85 #define P1_1 (1 << 0) // P1_0
nexpaq 0:6c56fb4bc5f0 86 #define P1_2 (1 << 1) // P1_1
nexpaq 0:6c56fb4bc5f0 87 #define PORT_1 Port1
nexpaq 0:6c56fb4bc5f0 88
nexpaq 0:6c56fb4bc5f0 89 #define P2_1 (1 << 7) // P4_7
nexpaq 0:6c56fb4bc5f0 90 #define P2_2 (1 << 6) // P4_6
nexpaq 0:6c56fb4bc5f0 91 #define PORT_2 Port4
nexpaq 0:6c56fb4bc5f0 92
nexpaq 0:6c56fb4bc5f0 93 #elif defined(TARGET_NUCLEO_F030R8) || \
nexpaq 0:6c56fb4bc5f0 94 defined(TARGET_NUCLEO_F070RB) || \
nexpaq 0:6c56fb4bc5f0 95 defined(TARGET_NUCLEO_F072RB) || \
nexpaq 0:6c56fb4bc5f0 96 defined(TARGET_NUCLEO_F091RC) || \
nexpaq 0:6c56fb4bc5f0 97 defined(TARGET_NUCLEO_F103RB) || \
nexpaq 0:6c56fb4bc5f0 98 defined(TARGET_NUCLEO_F302R8) || \
nexpaq 0:6c56fb4bc5f0 99 defined(TARGET_NUCLEO_F303RE) || \
nexpaq 0:6c56fb4bc5f0 100 defined(TARGET_NUCLEO_F334R8) || \
nexpaq 0:6c56fb4bc5f0 101 defined(TARGET_NUCLEO_F401RE) || \
nexpaq 0:6c56fb4bc5f0 102 defined(TARGET_NUCLEO_F410RB) || \
nexpaq 0:6c56fb4bc5f0 103 defined(TARGET_NUCLEO_F411RE) || \
nexpaq 0:6c56fb4bc5f0 104 defined(TARGET_NUCLEO_L053R8) || \
nexpaq 0:6c56fb4bc5f0 105 defined(TARGET_NUCLEO_L073RZ) || \
nexpaq 0:6c56fb4bc5f0 106 defined(TARGET_NUCLEO_L152RE)
nexpaq 0:6c56fb4bc5f0 107 #define P1_1 (1 << 6) // PC_6
nexpaq 0:6c56fb4bc5f0 108 #define P1_2 (1 << 5) // PC_5
nexpaq 0:6c56fb4bc5f0 109 #define PORT_1 PortC
nexpaq 0:6c56fb4bc5f0 110
nexpaq 0:6c56fb4bc5f0 111 #define P2_1 (1 << 8) // PB_8
nexpaq 0:6c56fb4bc5f0 112 #define P2_2 (1 << 9) // PB_9
nexpaq 0:6c56fb4bc5f0 113 #define PORT_2 PortB
nexpaq 0:6c56fb4bc5f0 114
nexpaq 0:6c56fb4bc5f0 115 #elif defined(TARGET_EFM32LG_STK3600) || defined(TARGET_EFM32GG_STK3700) || defined(TARGET_EFM32WG_STK3800)
nexpaq 0:6c56fb4bc5f0 116 #define P1_1 (1 << 0) // PD0
nexpaq 0:6c56fb4bc5f0 117 #define P1_2 (1 << 1) // PD1
nexpaq 0:6c56fb4bc5f0 118 #define PORT_1 PortD
nexpaq 0:6c56fb4bc5f0 119
nexpaq 0:6c56fb4bc5f0 120 #define P2_1 (1 << 3) // PC3
nexpaq 0:6c56fb4bc5f0 121 #define P2_2 (1 << 4) // PC4
nexpaq 0:6c56fb4bc5f0 122 #define PORT_2 PortC
nexpaq 0:6c56fb4bc5f0 123
nexpaq 0:6c56fb4bc5f0 124 #elif defined(TARGET_EFM32ZG_STK3200)
nexpaq 0:6c56fb4bc5f0 125 #define P1_1 (1 << 7) // PD7
nexpaq 0:6c56fb4bc5f0 126 #define P1_2 (1 << 6) // PD6
nexpaq 0:6c56fb4bc5f0 127 #define PORT_1 PortD
nexpaq 0:6c56fb4bc5f0 128
nexpaq 0:6c56fb4bc5f0 129 #define P2_1 (1 << 1) // PC1
nexpaq 0:6c56fb4bc5f0 130 #define P2_2 (1 << 2) // PC2
nexpaq 0:6c56fb4bc5f0 131 #define PORT_2 PortC
nexpaq 0:6c56fb4bc5f0 132
nexpaq 0:6c56fb4bc5f0 133 #elif defined(TARGET_EFM32HG_STK3400)
nexpaq 0:6c56fb4bc5f0 134 #define P1_1 (1 << 10) // PE10
nexpaq 0:6c56fb4bc5f0 135 #define P1_2 (1 << 11) // PE11
nexpaq 0:6c56fb4bc5f0 136 #define PORT_1 PortE
nexpaq 0:6c56fb4bc5f0 137
nexpaq 0:6c56fb4bc5f0 138 #define P2_1 (1 << 1) // PC1
nexpaq 0:6c56fb4bc5f0 139 #define P2_2 (1 << 2) // PC2
nexpaq 0:6c56fb4bc5f0 140 #define PORT_2 PortC
nexpaq 0:6c56fb4bc5f0 141
nexpaq 0:6c56fb4bc5f0 142 #elif defined(TARGET_EFM32PG_STK3401)
nexpaq 0:6c56fb4bc5f0 143 #define P1_1 (1 << 6) // PC6
nexpaq 0:6c56fb4bc5f0 144 #define P1_2 (1 << 7) // PC7
nexpaq 0:6c56fb4bc5f0 145 #define PORT_1 PortC
nexpaq 0:6c56fb4bc5f0 146
nexpaq 0:6c56fb4bc5f0 147 #define P2_1 (1 << 3) // PA3
nexpaq 0:6c56fb4bc5f0 148 #define P2_2 (1 << 4) // PA4
nexpaq 0:6c56fb4bc5f0 149 #define PORT_2 PortA
nexpaq 0:6c56fb4bc5f0 150
nexpaq 0:6c56fb4bc5f0 151 #elif defined(TARGET_SAMR21G18A) || defined(TARGET_SAMD21J18A)
nexpaq 0:6c56fb4bc5f0 152 #define P1_1 (1 << 6) /*PA06*/
nexpaq 0:6c56fb4bc5f0 153 #define P1_2 (1 << 7) /*PA07*/
nexpaq 0:6c56fb4bc5f0 154 #define PORT_1 PortA
nexpaq 0:6c56fb4bc5f0 155
nexpaq 0:6c56fb4bc5f0 156 #define P2_1 (1 << 2) /*PB02*/
nexpaq 0:6c56fb4bc5f0 157 #define P2_2 (1 << 3) /*PB03*/
nexpaq 0:6c56fb4bc5f0 158 #define PORT_2 PortB
nexpaq 0:6c56fb4bc5f0 159
nexpaq 0:6c56fb4bc5f0 160 #elif defined(TARGET_SAMD21G18A)
nexpaq 0:6c56fb4bc5f0 161 #define P1_1 (1 << 2) /*PA02*/
nexpaq 0:6c56fb4bc5f0 162 #define P1_2 (1 << 3) /*PA03*/
nexpaq 0:6c56fb4bc5f0 163 #define PORT_1 PortA
nexpaq 0:6c56fb4bc5f0 164
nexpaq 0:6c56fb4bc5f0 165 #define P2_1 (1 << 2) /*PB02*/
nexpaq 0:6c56fb4bc5f0 166 #define P2_2 (1 << 3) /*PB03*/
nexpaq 0:6c56fb4bc5f0 167 #define PORT_2 PortB
nexpaq 0:6c56fb4bc5f0 168
nexpaq 0:6c56fb4bc5f0 169 #elif defined(TARGET_SAML21J18A)
nexpaq 0:6c56fb4bc5f0 170 #define P1_1 (1 << 4) /*PA04*/
nexpaq 0:6c56fb4bc5f0 171 #define P1_2 (1 << 5) /*PA05*/
nexpaq 0:6c56fb4bc5f0 172 #define PORT_1 PortA
nexpaq 0:6c56fb4bc5f0 173
nexpaq 0:6c56fb4bc5f0 174 #define P2_1 (1 << 0) /*PB00*/
nexpaq 0:6c56fb4bc5f0 175 #define P2_2 (1 << 1) /*PB01*/
nexpaq 0:6c56fb4bc5f0 176 #define PORT_2 PortB
nexpaq 0:6c56fb4bc5f0 177
nexpaq 0:6c56fb4bc5f0 178 #elif defined(TARGET_SAMG55J19)
nexpaq 0:6c56fb4bc5f0 179 #define P1_1 (1 << 17) /*PA17*/
nexpaq 0:6c56fb4bc5f0 180 #define P1_2 (1 << 18) /*PA18*/
nexpaq 0:6c56fb4bc5f0 181 #define PORT_1 PortA
nexpaq 0:6c56fb4bc5f0 182
nexpaq 0:6c56fb4bc5f0 183 #define P2_1 (1 << 10) /*PB10*/
nexpaq 0:6c56fb4bc5f0 184 #define P2_2 (1 << 11) /*PB11*/
nexpaq 0:6c56fb4bc5f0 185 #define PORT_2 PortB
nexpaq 0:6c56fb4bc5f0 186
nexpaq 0:6c56fb4bc5f0 187 #elif defined(TARGET_VK_RZ_A1H)
nexpaq 0:6c56fb4bc5f0 188 #define P1_1 (1 << 2) /*P3_2*/
nexpaq 0:6c56fb4bc5f0 189 #define P1_2 (1 << 7) /*P3_7*/
nexpaq 0:6c56fb4bc5f0 190 #define PORT_1 Port3
nexpaq 0:6c56fb4bc5f0 191
nexpaq 0:6c56fb4bc5f0 192 #define P2_1 (1 << 6) /*P5_6*/
nexpaq 0:6c56fb4bc5f0 193 #define P2_2 (1 << 1) /*P5_1*/
nexpaq 0:6c56fb4bc5f0 194 #define PORT_2 Port5
nexpaq 0:6c56fb4bc5f0 195
nexpaq 0:6c56fb4bc5f0 196 #endif
nexpaq 0:6c56fb4bc5f0 197
nexpaq 0:6c56fb4bc5f0 198 #define MASK_1 (P1_1 | P1_2)
nexpaq 0:6c56fb4bc5f0 199 #define MASK_2 (P2_1 | P2_2)
nexpaq 0:6c56fb4bc5f0 200
nexpaq 0:6c56fb4bc5f0 201 PortInOut port1(PORT_1, MASK_1);
nexpaq 0:6c56fb4bc5f0 202 PortInOut port2(PORT_2, MASK_2);
nexpaq 0:6c56fb4bc5f0 203
nexpaq 0:6c56fb4bc5f0 204 int main() {
nexpaq 0:6c56fb4bc5f0 205 MBED_HOSTTEST_TIMEOUT(20);
nexpaq 0:6c56fb4bc5f0 206 MBED_HOSTTEST_SELECT(default_auto);
nexpaq 0:6c56fb4bc5f0 207 MBED_HOSTTEST_DESCRIPTION(PortInOut);
nexpaq 0:6c56fb4bc5f0 208 MBED_HOSTTEST_START("MBED_A11");
nexpaq 0:6c56fb4bc5f0 209
nexpaq 0:6c56fb4bc5f0 210 bool check = true;
nexpaq 0:6c56fb4bc5f0 211
nexpaq 0:6c56fb4bc5f0 212 port1.output();
nexpaq 0:6c56fb4bc5f0 213 port2.input();
nexpaq 0:6c56fb4bc5f0 214
nexpaq 0:6c56fb4bc5f0 215 port1 = MASK_1; wait(0.1);
nexpaq 0:6c56fb4bc5f0 216 if (port2 != MASK_2) check = false;
nexpaq 0:6c56fb4bc5f0 217
nexpaq 0:6c56fb4bc5f0 218 port1 = 0; wait(0.1);
nexpaq 0:6c56fb4bc5f0 219 if (port2 != 0) check = false;
nexpaq 0:6c56fb4bc5f0 220
nexpaq 0:6c56fb4bc5f0 221 port1.input();
nexpaq 0:6c56fb4bc5f0 222 port2.output();
nexpaq 0:6c56fb4bc5f0 223
nexpaq 0:6c56fb4bc5f0 224 port2 = MASK_2; wait(0.1);
nexpaq 0:6c56fb4bc5f0 225 if (port1 != MASK_1) check = false;
nexpaq 0:6c56fb4bc5f0 226
nexpaq 0:6c56fb4bc5f0 227 port2 = 0; wait(0.1);
nexpaq 0:6c56fb4bc5f0 228 if (port1 != 0) check = false;
nexpaq 0:6c56fb4bc5f0 229
nexpaq 0:6c56fb4bc5f0 230 MBED_HOSTTEST_RESULT(check);
nexpaq 0:6c56fb4bc5f0 231 }