philippe s. / mbed-dev

mbed library sources. Supersedes mbed-src. Fixes analogIn and analogOut problems for TARGET_STM32F3. Tested on NUCLEO-F303K8, using 3 analogout and 7 analogin channels simultaneously. Added ability for STM32F334R8 and STM32F303K8 to use all three channels of DAC simultaneously. https://developer.mbed.org/users/StevieWray/code/mbed-dev/ Added ability for TARGET_STM32F3 to use more than one ADC simultaneously. https://developer.mbed.org/questions/67997/NUCLEO-F303K8ADC/

Fork of mbed-dev by mbed official

hal/spi_api.h@70:b3a5af880266, 2016-02-23 (annotated)

Committer:
neurofun
Date:
Tue Feb 23 21:59:35 2016 +0000
Revision:
70:b3a5af880266
Parent:
0:9b334a45a8ff 
Edited DAC routines to allow for the simultaneous use of three channels from two DACs as seen on the STM32F334R8 and STM32F303K8. Edited ADC routines to allow for the simultaneous use of more than one ADC.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /* mbed Microcontroller Library
bogdanm 0:9b334a45a8ff 2 * Copyright (c) 2006-2013 ARM Limited
bogdanm 0:9b334a45a8ff 3 *
bogdanm 0:9b334a45a8ff 4 * Licensed under the Apache License, Version 2.0 (the "License");
bogdanm 0:9b334a45a8ff 5 * you may not use this file except in compliance with the License.
bogdanm 0:9b334a45a8ff 6 * You may obtain a copy of the License at
bogdanm 0:9b334a45a8ff 7 *
bogdanm 0:9b334a45a8ff 8 * http://www.apache.org/licenses/LICENSE-2.0
bogdanm 0:9b334a45a8ff 9 *
bogdanm 0:9b334a45a8ff 10 * Unless required by applicable law or agreed to in writing, software
bogdanm 0:9b334a45a8ff 11 * distributed under the License is distributed on an "AS IS" BASIS,
bogdanm 0:9b334a45a8ff 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
bogdanm 0:9b334a45a8ff 13 * See the License for the specific language governing permissions and
bogdanm 0:9b334a45a8ff 14 * limitations under the License.
bogdanm 0:9b334a45a8ff 15 */
bogdanm 0:9b334a45a8ff 16 #ifndef MBED_SPI_API_H
bogdanm 0:9b334a45a8ff 17 #define MBED_SPI_API_H
bogdanm 0:9b334a45a8ff 18
bogdanm 0:9b334a45a8ff 19 #include "device.h"
bogdanm 0:9b334a45a8ff 20 #include "dma_api.h"
bogdanm 0:9b334a45a8ff 21 #include "buffer.h"
bogdanm 0:9b334a45a8ff 22
bogdanm 0:9b334a45a8ff 23 #if DEVICE_SPI
bogdanm 0:9b334a45a8ff 24
bogdanm 0:9b334a45a8ff 25 #define SPI_EVENT_ERROR (1 << 1)
bogdanm 0:9b334a45a8ff 26 #define SPI_EVENT_COMPLETE (1 << 2)
bogdanm 0:9b334a45a8ff 27 #define SPI_EVENT_RX_OVERFLOW (1 << 3)
bogdanm 0:9b334a45a8ff 28 #define SPI_EVENT_ALL (SPI_EVENT_ERROR | SPI_EVENT_COMPLETE | SPI_EVENT_RX_OVERFLOW)
bogdanm 0:9b334a45a8ff 29
bogdanm 0:9b334a45a8ff 30 #define SPI_EVENT_INTERNAL_TRANSFER_COMPLETE (1 << 30) // internal flag to report an event occurred
bogdanm 0:9b334a45a8ff 31
bogdanm 0:9b334a45a8ff 32 #define SPI_FILL_WORD (0xFFFF)
bogdanm 0:9b334a45a8ff 33
bogdanm 0:9b334a45a8ff 34 #if DEVICE_SPI_ASYNCH
bogdanm 0:9b334a45a8ff 35 /** Asynch spi hal structure
bogdanm 0:9b334a45a8ff 36 */
bogdanm 0:9b334a45a8ff 37 typedef struct {
bogdanm 0:9b334a45a8ff 38 struct spi_s spi; /**< Target specific spi structure */
bogdanm 0:9b334a45a8ff 39 struct buffer_s tx_buff; /**< Tx buffer */
bogdanm 0:9b334a45a8ff 40 struct buffer_s rx_buff; /**< Rx buffer */
bogdanm 0:9b334a45a8ff 41 } spi_t;
bogdanm 0:9b334a45a8ff 42
bogdanm 0:9b334a45a8ff 43 #else
bogdanm 0:9b334a45a8ff 44 /** Non-asynch spi hal structure
bogdanm 0:9b334a45a8ff 45 */
bogdanm 0:9b334a45a8ff 46 typedef struct spi_s spi_t;
bogdanm 0:9b334a45a8ff 47
bogdanm 0:9b334a45a8ff 48 #endif
bogdanm 0:9b334a45a8ff 49
bogdanm 0:9b334a45a8ff 50 #ifdef __cplusplus
bogdanm 0:9b334a45a8ff 51 extern "C" {
bogdanm 0:9b334a45a8ff 52 #endif
bogdanm 0:9b334a45a8ff 53
bogdanm 0:9b334a45a8ff 54 /**
bogdanm 0:9b334a45a8ff 55 * \defgroup GeneralSPI SPI Configuration Functions
bogdanm 0:9b334a45a8ff 56 * @{
bogdanm 0:9b334a45a8ff 57 */
bogdanm 0:9b334a45a8ff 58
bogdanm 0:9b334a45a8ff 59 /** Initialize the SPI peripheral
bogdanm 0:9b334a45a8ff 60 *
bogdanm 0:9b334a45a8ff 61 * Configures the pins used by SPI, sets a default format and frequency, and enables the peripheral
bogdanm 0:9b334a45a8ff 62 * @param[out] obj The SPI object to initialize
bogdanm 0:9b334a45a8ff 63 * @param[in] mosi The pin to use for MOSI
bogdanm 0:9b334a45a8ff 64 * @param[in] miso The pin to use for MISO
bogdanm 0:9b334a45a8ff 65 * @param[in] sclk The pin to use for SCLK
bogdanm 0:9b334a45a8ff 66 * @param[in] ssel The pin to use for SSEL
bogdanm 0:9b334a45a8ff 67 */
bogdanm 0:9b334a45a8ff 68 void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel);
bogdanm 0:9b334a45a8ff 69
bogdanm 0:9b334a45a8ff 70 /** Release a SPI object
bogdanm 0:9b334a45a8ff 71 *
bogdanm 0:9b334a45a8ff 72 * TODO: spi_free is currently unimplemented
bogdanm 0:9b334a45a8ff 73 * This will require reference counting at the C++ level to be safe
bogdanm 0:9b334a45a8ff 74 *
bogdanm 0:9b334a45a8ff 75 * Return the pins owned by the SPI object to their reset state
bogdanm 0:9b334a45a8ff 76 * Disable the SPI peripheral
bogdanm 0:9b334a45a8ff 77 * Disable the SPI clock
bogdanm 0:9b334a45a8ff 78 * @param[in] obj The SPI object to deinitialize
bogdanm 0:9b334a45a8ff 79 */
bogdanm 0:9b334a45a8ff 80 void spi_free(spi_t *obj);
bogdanm 0:9b334a45a8ff 81
bogdanm 0:9b334a45a8ff 82 /** Configure the SPI format
bogdanm 0:9b334a45a8ff 83 *
bogdanm 0:9b334a45a8ff 84 * Set the number of bits per frame, configure clock polarity and phase, shift order and master/slave mode
bogdanm 0:9b334a45a8ff 85 * @param[in,out] obj The SPI object to configure
bogdanm 0:9b334a45a8ff 86 * @param[in] bits The number of bits per frame
bogdanm 0:9b334a45a8ff 87 * @param[in] mode The SPI mode (clock polarity, phase, and shift direction)
bogdanm 0:9b334a45a8ff 88 * @param[in] slave Zero for master mode or non-zero for slave mode
bogdanm 0:9b334a45a8ff 89 */
bogdanm 0:9b334a45a8ff 90 void spi_format(spi_t *obj, int bits, int mode, int slave);
bogdanm 0:9b334a45a8ff 91
bogdanm 0:9b334a45a8ff 92 /** Set the SPI baud rate
bogdanm 0:9b334a45a8ff 93 *
bogdanm 0:9b334a45a8ff 94 * Actual frequency may differ from the desired frequency due to available dividers and bus clock
bogdanm 0:9b334a45a8ff 95 * Configures the SPI peripheral's baud rate
bogdanm 0:9b334a45a8ff 96 * @param[in,out] obj The SPI object to configure
bogdanm 0:9b334a45a8ff 97 * @param[in] hz The baud rate in Hz
bogdanm 0:9b334a45a8ff 98 */
bogdanm 0:9b334a45a8ff 99 void spi_frequency(spi_t *obj, int hz);
bogdanm 0:9b334a45a8ff 100
bogdanm 0:9b334a45a8ff 101 /**@}*/
bogdanm 0:9b334a45a8ff 102 /**
bogdanm 0:9b334a45a8ff 103 * \defgroup SynchSPI Synchronous SPI Hardware Abstraction Layer
bogdanm 0:9b334a45a8ff 104 * @{
bogdanm 0:9b334a45a8ff 105 */
bogdanm 0:9b334a45a8ff 106
bogdanm 0:9b334a45a8ff 107 /** Write a byte out in master mode and receive a value
bogdanm 0:9b334a45a8ff 108 *
bogdanm 0:9b334a45a8ff 109 * @param[in] obj The SPI peripheral to use for sending
bogdanm 0:9b334a45a8ff 110 * @param[in] value The value to send
bogdanm 0:9b334a45a8ff 111 * @return Returns the value received during send
bogdanm 0:9b334a45a8ff 112 */
bogdanm 0:9b334a45a8ff 113 int spi_master_write(spi_t *obj, int value);
bogdanm 0:9b334a45a8ff 114
bogdanm 0:9b334a45a8ff 115 /** Check if a value is available to read
bogdanm 0:9b334a45a8ff 116 *
bogdanm 0:9b334a45a8ff 117 * @param[in] obj The SPI peripheral to check
bogdanm 0:9b334a45a8ff 118 * @return non-zero if a value is available
bogdanm 0:9b334a45a8ff 119 */
bogdanm 0:9b334a45a8ff 120 int spi_slave_receive(spi_t *obj);
bogdanm 0:9b334a45a8ff 121
bogdanm 0:9b334a45a8ff 122 /** Get a received value out of the SPI receive buffer in slave mode
bogdanm 0:9b334a45a8ff 123 *
bogdanm 0:9b334a45a8ff 124 * Blocks until a value is available
bogdanm 0:9b334a45a8ff 125 * @param[in] obj The SPI peripheral to read
bogdanm 0:9b334a45a8ff 126 * @return The value received
bogdanm 0:9b334a45a8ff 127 */
bogdanm 0:9b334a45a8ff 128 int spi_slave_read(spi_t *obj);
bogdanm 0:9b334a45a8ff 129
bogdanm 0:9b334a45a8ff 130 /** Write a value to the SPI peripheral in slave mode
bogdanm 0:9b334a45a8ff 131 *
bogdanm 0:9b334a45a8ff 132 * Blocks until the SPI peripheral can be written to
bogdanm 0:9b334a45a8ff 133 * @param[in] obj The SPI peripheral to write
bogdanm 0:9b334a45a8ff 134 * @param[in] value The value to write
bogdanm 0:9b334a45a8ff 135 */
bogdanm 0:9b334a45a8ff 136 void spi_slave_write(spi_t *obj, int value);
bogdanm 0:9b334a45a8ff 137
bogdanm 0:9b334a45a8ff 138 /** Checks if the specified SPI peripheral is in use
bogdanm 0:9b334a45a8ff 139 *
bogdanm 0:9b334a45a8ff 140 * @param[in] obj The SPI peripheral to check
bogdanm 0:9b334a45a8ff 141 * @return non-zero if the peripheral is currently transmitting
bogdanm 0:9b334a45a8ff 142 */
bogdanm 0:9b334a45a8ff 143 int spi_busy(spi_t *obj);
bogdanm 0:9b334a45a8ff 144
bogdanm 0:9b334a45a8ff 145 /** Get the module number
bogdanm 0:9b334a45a8ff 146 *
bogdanm 0:9b334a45a8ff 147 * @param[in] obj The SPI peripheral to check
bogdanm 0:9b334a45a8ff 148 * @return The module number
bogdanm 0:9b334a45a8ff 149 */
bogdanm 0:9b334a45a8ff 150 uint8_t spi_get_module(spi_t *obj);
bogdanm 0:9b334a45a8ff 151
bogdanm 0:9b334a45a8ff 152 /**@}*/
bogdanm 0:9b334a45a8ff 153
bogdanm 0:9b334a45a8ff 154 #if DEVICE_SPI_ASYNCH
bogdanm 0:9b334a45a8ff 155 /**
bogdanm 0:9b334a45a8ff 156 * \defgroup AsynchSPI Asynchronous SPI Hardware Abstraction Layer
bogdanm 0:9b334a45a8ff 157 * @{
bogdanm 0:9b334a45a8ff 158 */
bogdanm 0:9b334a45a8ff 159
bogdanm 0:9b334a45a8ff 160 /** Begin the SPI transfer. Buffer pointers and lengths are specified in tx_buff and rx_buff
bogdanm 0:9b334a45a8ff 161 *
bogdanm 0:9b334a45a8ff 162 * @param[in] obj The SPI object which holds the transfer information
bogdanm 0:9b334a45a8ff 163 * @param[in] tx The buffer to send
bogdanm 0:9b334a45a8ff 164 * @param[in] tx_length The number of words to transmit
bogdanm 0:9b334a45a8ff 165 * @param[in] rx The buffer to receive
bogdanm 0:9b334a45a8ff 166 * @param[in] rx_length The number of words to receive
bogdanm 0:9b334a45a8ff 167 * @param[in] bit_width The bit width of buffer words
bogdanm 0:9b334a45a8ff 168 * @param[in] event The logical OR of events to be registered
bogdanm 0:9b334a45a8ff 169 * @param[in] handler SPI interrupt handler
bogdanm 0:9b334a45a8ff 170 * @param[in] hint A suggestion for how to use DMA with this transfer
bogdanm 0:9b334a45a8ff 171 */
bogdanm 0:9b334a45a8ff 172 void spi_master_transfer(spi_t *obj, const void *tx, size_t tx_length, void *rx, size_t rx_length, uint8_t bit_width, uint32_t handler, uint32_t event, DMAUsage hint);
bogdanm 0:9b334a45a8ff 173
bogdanm 0:9b334a45a8ff 174 /** The asynchronous IRQ handler
bogdanm 0:9b334a45a8ff 175 *
bogdanm 0:9b334a45a8ff 176 * Reads the received values out of the RX FIFO, writes values into the TX FIFO and checks for transfer termination
bogdanm 0:9b334a45a8ff 177 * conditions, such as buffer overflows or transfer complete.
bogdanm 0:9b334a45a8ff 178 * @param[in] obj The SPI object which holds the transfer information
bogdanm 0:9b334a45a8ff 179 * @return event flags if a transfer termination condition was met or 0 otherwise.
bogdanm 0:9b334a45a8ff 180 */
bogdanm 0:9b334a45a8ff 181 uint32_t spi_irq_handler_asynch(spi_t *obj);
bogdanm 0:9b334a45a8ff 182
bogdanm 0:9b334a45a8ff 183 /** Attempts to determine if the SPI peripheral is already in use.
bogdanm 0:9b334a45a8ff 184 *
bogdanm 0:9b334a45a8ff 185 * If a temporary DMA channel has been allocated, peripheral is in use.
bogdanm 0:9b334a45a8ff 186 * If a permanent DMA channel has been allocated, check if the DMA channel is in use. If not, proceed as though no DMA
bogdanm 0:9b334a45a8ff 187 * channel were allocated.
bogdanm 0:9b334a45a8ff 188 * If no DMA channel is allocated, check whether tx and rx buffers have been assigned. For each assigned buffer, check
bogdanm 0:9b334a45a8ff 189 * if the corresponding buffer position is less than the buffer length. If buffers do not indicate activity, check if
bogdanm 0:9b334a45a8ff 190 * there are any bytes in the FIFOs.
bogdanm 0:9b334a45a8ff 191 * @param[in] obj The SPI object to check for activity
bogdanm 0:9b334a45a8ff 192 * @return non-zero if the SPI port is active or zero if it is not.
bogdanm 0:9b334a45a8ff 193 */
bogdanm 0:9b334a45a8ff 194 uint8_t spi_active(spi_t *obj);
bogdanm 0:9b334a45a8ff 195
bogdanm 0:9b334a45a8ff 196 /** Abort an SPI transfer
bogdanm 0:9b334a45a8ff 197 *
bogdanm 0:9b334a45a8ff 198 * @param obj The SPI peripheral to stop
bogdanm 0:9b334a45a8ff 199 */
bogdanm 0:9b334a45a8ff 200 void spi_abort_asynch(spi_t *obj);
bogdanm 0:9b334a45a8ff 201
bogdanm 0:9b334a45a8ff 202
bogdanm 0:9b334a45a8ff 203 #endif
bogdanm 0:9b334a45a8ff 204
bogdanm 0:9b334a45a8ff 205 /**@}*/
bogdanm 0:9b334a45a8ff 206
bogdanm 0:9b334a45a8ff 207 #ifdef __cplusplus
bogdanm 0:9b334a45a8ff 208 }
bogdanm 0:9b334a45a8ff 209 #endif // __cplusplus
bogdanm 0:9b334a45a8ff 210
bogdanm 0:9b334a45a8ff 211 #endif // SPI_DEVICE
bogdanm 0:9b334a45a8ff 212
bogdanm 0:9b334a45a8ff 213 #endif // MBED_SPI_API_H