philippe s. / mbed-dev

mbed library sources. Supersedes mbed-src. Fixes analogIn and analogOut problems for TARGET_STM32F3. Tested on NUCLEO-F303K8, using 3 analogout and 7 analogin channels simultaneously. Added ability for STM32F334R8 and STM32F303K8 to use all three channels of DAC simultaneously. https://developer.mbed.org/users/StevieWray/code/mbed-dev/ Added ability for TARGET_STM32F3 to use more than one ADC simultaneously. https://developer.mbed.org/questions/67997/NUCLEO-F303K8ADC/

Fork of mbed-dev by mbed official

targets/cmsis/core_cmFunc.h@70:b3a5af880266, 2016-02-23 (annotated)

Committer:
neurofun
Date:
Tue Feb 23 21:59:35 2016 +0000
Revision:
70:b3a5af880266
Parent:
19:112740acecfa 
Edited DAC routines to allow for the simultaneous use of three channels from two DACs as seen on the STM32F334R8 and STM32F303K8. Edited ADC routines to allow for the simultaneous use of more than one ADC.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /**************************************************************************//**
bogdanm 0:9b334a45a8ff 2 * @file core_cmFunc.h
bogdanm 0:9b334a45a8ff 3 * @brief CMSIS Cortex-M Core Function Access Header File
mbed_official 19:112740acecfa 4 * @version V4.10
mbed_official 19:112740acecfa 5 * @date 18. March 2015
bogdanm 0:9b334a45a8ff 6 *
bogdanm 0:9b334a45a8ff 7 * @note
bogdanm 0:9b334a45a8ff 8 *
bogdanm 0:9b334a45a8ff 9 ******************************************************************************/
mbed_official 19:112740acecfa 10 /* Copyright (c) 2009 - 2015 ARM LIMITED
bogdanm 0:9b334a45a8ff 11
bogdanm 0:9b334a45a8ff 12 All rights reserved.
bogdanm 0:9b334a45a8ff 13 Redistribution and use in source and binary forms, with or without
bogdanm 0:9b334a45a8ff 14 modification, are permitted provided that the following conditions are met:
bogdanm 0:9b334a45a8ff 15 - Redistributions of source code must retain the above copyright
bogdanm 0:9b334a45a8ff 16 notice, this list of conditions and the following disclaimer.
bogdanm 0:9b334a45a8ff 17 - Redistributions in binary form must reproduce the above copyright
bogdanm 0:9b334a45a8ff 18 notice, this list of conditions and the following disclaimer in the
bogdanm 0:9b334a45a8ff 19 documentation and/or other materials provided with the distribution.
bogdanm 0:9b334a45a8ff 20 - Neither the name of ARM nor the names of its contributors may be used
bogdanm 0:9b334a45a8ff 21 to endorse or promote products derived from this software without
bogdanm 0:9b334a45a8ff 22 specific prior written permission.
bogdanm 0:9b334a45a8ff 23 *
bogdanm 0:9b334a45a8ff 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 0:9b334a45a8ff 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 0:9b334a45a8ff 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
bogdanm 0:9b334a45a8ff 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
bogdanm 0:9b334a45a8ff 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
bogdanm 0:9b334a45a8ff 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
bogdanm 0:9b334a45a8ff 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
bogdanm 0:9b334a45a8ff 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
bogdanm 0:9b334a45a8ff 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
bogdanm 0:9b334a45a8ff 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
bogdanm 0:9b334a45a8ff 34 POSSIBILITY OF SUCH DAMAGE.
bogdanm 0:9b334a45a8ff 35 ---------------------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 36
bogdanm 0:9b334a45a8ff 37
bogdanm 0:9b334a45a8ff 38 #ifndef __CORE_CMFUNC_H
bogdanm 0:9b334a45a8ff 39 #define __CORE_CMFUNC_H
bogdanm 0:9b334a45a8ff 40
bogdanm 0:9b334a45a8ff 41
bogdanm 0:9b334a45a8ff 42 /* ########################### Core Function Access ########################### */
bogdanm 0:9b334a45a8ff 43 /** \ingroup CMSIS_Core_FunctionInterface
bogdanm 0:9b334a45a8ff 44 \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
bogdanm 0:9b334a45a8ff 45 @{
bogdanm 0:9b334a45a8ff 46 */
bogdanm 0:9b334a45a8ff 47
bogdanm 0:9b334a45a8ff 48 #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
bogdanm 0:9b334a45a8ff 49 /* ARM armcc specific functions */
bogdanm 0:9b334a45a8ff 50
bogdanm 0:9b334a45a8ff 51 #if (__ARMCC_VERSION < 400677)
bogdanm 0:9b334a45a8ff 52 #error "Please use ARM Compiler Toolchain V4.0.677 or later!"
bogdanm 0:9b334a45a8ff 53 #endif
bogdanm 0:9b334a45a8ff 54
bogdanm 0:9b334a45a8ff 55 /* intrinsic void __enable_irq(); */
bogdanm 0:9b334a45a8ff 56 /* intrinsic void __disable_irq(); */
bogdanm 0:9b334a45a8ff 57
bogdanm 0:9b334a45a8ff 58 /** \brief Get Control Register
bogdanm 0:9b334a45a8ff 59
bogdanm 0:9b334a45a8ff 60 This function returns the content of the Control Register.
bogdanm 0:9b334a45a8ff 61
bogdanm 0:9b334a45a8ff 62 \return Control Register value
bogdanm 0:9b334a45a8ff 63 */
bogdanm 0:9b334a45a8ff 64 __STATIC_INLINE uint32_t __get_CONTROL(void)
bogdanm 0:9b334a45a8ff 65 {
bogdanm 0:9b334a45a8ff 66 register uint32_t __regControl __ASM("control");
bogdanm 0:9b334a45a8ff 67 return(__regControl);
bogdanm 0:9b334a45a8ff 68 }
bogdanm 0:9b334a45a8ff 69
bogdanm 0:9b334a45a8ff 70
bogdanm 0:9b334a45a8ff 71 /** \brief Set Control Register
bogdanm 0:9b334a45a8ff 72
bogdanm 0:9b334a45a8ff 73 This function writes the given value to the Control Register.
bogdanm 0:9b334a45a8ff 74
bogdanm 0:9b334a45a8ff 75 \param [in] control Control Register value to set
bogdanm 0:9b334a45a8ff 76 */
bogdanm 0:9b334a45a8ff 77 __STATIC_INLINE void __set_CONTROL(uint32_t control)
bogdanm 0:9b334a45a8ff 78 {
bogdanm 0:9b334a45a8ff 79 register uint32_t __regControl __ASM("control");
bogdanm 0:9b334a45a8ff 80 __regControl = control;
bogdanm 0:9b334a45a8ff 81 }
bogdanm 0:9b334a45a8ff 82
bogdanm 0:9b334a45a8ff 83
bogdanm 0:9b334a45a8ff 84 /** \brief Get IPSR Register
bogdanm 0:9b334a45a8ff 85
bogdanm 0:9b334a45a8ff 86 This function returns the content of the IPSR Register.
bogdanm 0:9b334a45a8ff 87
bogdanm 0:9b334a45a8ff 88 \return IPSR Register value
bogdanm 0:9b334a45a8ff 89 */
bogdanm 0:9b334a45a8ff 90 __STATIC_INLINE uint32_t __get_IPSR(void)
bogdanm 0:9b334a45a8ff 91 {
bogdanm 0:9b334a45a8ff 92 register uint32_t __regIPSR __ASM("ipsr");
bogdanm 0:9b334a45a8ff 93 return(__regIPSR);
bogdanm 0:9b334a45a8ff 94 }
bogdanm 0:9b334a45a8ff 95
bogdanm 0:9b334a45a8ff 96
bogdanm 0:9b334a45a8ff 97 /** \brief Get APSR Register
bogdanm 0:9b334a45a8ff 98
bogdanm 0:9b334a45a8ff 99 This function returns the content of the APSR Register.
bogdanm 0:9b334a45a8ff 100
bogdanm 0:9b334a45a8ff 101 \return APSR Register value
bogdanm 0:9b334a45a8ff 102 */
bogdanm 0:9b334a45a8ff 103 __STATIC_INLINE uint32_t __get_APSR(void)
bogdanm 0:9b334a45a8ff 104 {
bogdanm 0:9b334a45a8ff 105 register uint32_t __regAPSR __ASM("apsr");
bogdanm 0:9b334a45a8ff 106 return(__regAPSR);
bogdanm 0:9b334a45a8ff 107 }
bogdanm 0:9b334a45a8ff 108
bogdanm 0:9b334a45a8ff 109
bogdanm 0:9b334a45a8ff 110 /** \brief Get xPSR Register
bogdanm 0:9b334a45a8ff 111
bogdanm 0:9b334a45a8ff 112 This function returns the content of the xPSR Register.
bogdanm 0:9b334a45a8ff 113
bogdanm 0:9b334a45a8ff 114 \return xPSR Register value
bogdanm 0:9b334a45a8ff 115 */
bogdanm 0:9b334a45a8ff 116 __STATIC_INLINE uint32_t __get_xPSR(void)
bogdanm 0:9b334a45a8ff 117 {
bogdanm 0:9b334a45a8ff 118 register uint32_t __regXPSR __ASM("xpsr");
bogdanm 0:9b334a45a8ff 119 return(__regXPSR);
bogdanm 0:9b334a45a8ff 120 }
bogdanm 0:9b334a45a8ff 121
bogdanm 0:9b334a45a8ff 122
bogdanm 0:9b334a45a8ff 123 /** \brief Get Process Stack Pointer
bogdanm 0:9b334a45a8ff 124
bogdanm 0:9b334a45a8ff 125 This function returns the current value of the Process Stack Pointer (PSP).
bogdanm 0:9b334a45a8ff 126
bogdanm 0:9b334a45a8ff 127 \return PSP Register value
bogdanm 0:9b334a45a8ff 128 */
bogdanm 0:9b334a45a8ff 129 __STATIC_INLINE uint32_t __get_PSP(void)
bogdanm 0:9b334a45a8ff 130 {
bogdanm 0:9b334a45a8ff 131 register uint32_t __regProcessStackPointer __ASM("psp");
bogdanm 0:9b334a45a8ff 132 return(__regProcessStackPointer);
bogdanm 0:9b334a45a8ff 133 }
bogdanm 0:9b334a45a8ff 134
bogdanm 0:9b334a45a8ff 135
bogdanm 0:9b334a45a8ff 136 /** \brief Set Process Stack Pointer
bogdanm 0:9b334a45a8ff 137
bogdanm 0:9b334a45a8ff 138 This function assigns the given value to the Process Stack Pointer (PSP).
bogdanm 0:9b334a45a8ff 139
bogdanm 0:9b334a45a8ff 140 \param [in] topOfProcStack Process Stack Pointer value to set
bogdanm 0:9b334a45a8ff 141 */
bogdanm 0:9b334a45a8ff 142 __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
bogdanm 0:9b334a45a8ff 143 {
bogdanm 0:9b334a45a8ff 144 register uint32_t __regProcessStackPointer __ASM("psp");
bogdanm 0:9b334a45a8ff 145 __regProcessStackPointer = topOfProcStack;
bogdanm 0:9b334a45a8ff 146 }
bogdanm 0:9b334a45a8ff 147
bogdanm 0:9b334a45a8ff 148
bogdanm 0:9b334a45a8ff 149 /** \brief Get Main Stack Pointer
bogdanm 0:9b334a45a8ff 150
bogdanm 0:9b334a45a8ff 151 This function returns the current value of the Main Stack Pointer (MSP).
bogdanm 0:9b334a45a8ff 152
bogdanm 0:9b334a45a8ff 153 \return MSP Register value
bogdanm 0:9b334a45a8ff 154 */
bogdanm 0:9b334a45a8ff 155 __STATIC_INLINE uint32_t __get_MSP(void)
bogdanm 0:9b334a45a8ff 156 {
bogdanm 0:9b334a45a8ff 157 register uint32_t __regMainStackPointer __ASM("msp");
bogdanm 0:9b334a45a8ff 158 return(__regMainStackPointer);
bogdanm 0:9b334a45a8ff 159 }
bogdanm 0:9b334a45a8ff 160
bogdanm 0:9b334a45a8ff 161
bogdanm 0:9b334a45a8ff 162 /** \brief Set Main Stack Pointer
bogdanm 0:9b334a45a8ff 163
bogdanm 0:9b334a45a8ff 164 This function assigns the given value to the Main Stack Pointer (MSP).
bogdanm 0:9b334a45a8ff 165
bogdanm 0:9b334a45a8ff 166 \param [in] topOfMainStack Main Stack Pointer value to set
bogdanm 0:9b334a45a8ff 167 */
bogdanm 0:9b334a45a8ff 168 __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
bogdanm 0:9b334a45a8ff 169 {
bogdanm 0:9b334a45a8ff 170 register uint32_t __regMainStackPointer __ASM("msp");
bogdanm 0:9b334a45a8ff 171 __regMainStackPointer = topOfMainStack;
bogdanm 0:9b334a45a8ff 172 }
bogdanm 0:9b334a45a8ff 173
bogdanm 0:9b334a45a8ff 174
bogdanm 0:9b334a45a8ff 175 /** \brief Get Priority Mask
bogdanm 0:9b334a45a8ff 176
bogdanm 0:9b334a45a8ff 177 This function returns the current state of the priority mask bit from the Priority Mask Register.
bogdanm 0:9b334a45a8ff 178
bogdanm 0:9b334a45a8ff 179 \return Priority Mask value
bogdanm 0:9b334a45a8ff 180 */
bogdanm 0:9b334a45a8ff 181 __STATIC_INLINE uint32_t __get_PRIMASK(void)
bogdanm 0:9b334a45a8ff 182 {
bogdanm 0:9b334a45a8ff 183 register uint32_t __regPriMask __ASM("primask");
bogdanm 0:9b334a45a8ff 184 return(__regPriMask);
bogdanm 0:9b334a45a8ff 185 }
bogdanm 0:9b334a45a8ff 186
bogdanm 0:9b334a45a8ff 187
bogdanm 0:9b334a45a8ff 188 /** \brief Set Priority Mask
bogdanm 0:9b334a45a8ff 189
bogdanm 0:9b334a45a8ff 190 This function assigns the given value to the Priority Mask Register.
bogdanm 0:9b334a45a8ff 191
bogdanm 0:9b334a45a8ff 192 \param [in] priMask Priority Mask
bogdanm 0:9b334a45a8ff 193 */
bogdanm 0:9b334a45a8ff 194 __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
bogdanm 0:9b334a45a8ff 195 {
bogdanm 0:9b334a45a8ff 196 register uint32_t __regPriMask __ASM("primask");
bogdanm 0:9b334a45a8ff 197 __regPriMask = (priMask);
bogdanm 0:9b334a45a8ff 198 }
bogdanm 0:9b334a45a8ff 199
bogdanm 0:9b334a45a8ff 200
mbed_official 19:112740acecfa 201 #if (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300)
bogdanm 0:9b334a45a8ff 202
bogdanm 0:9b334a45a8ff 203 /** \brief Enable FIQ
bogdanm 0:9b334a45a8ff 204
bogdanm 0:9b334a45a8ff 205 This function enables FIQ interrupts by clearing the F-bit in the CPSR.
bogdanm 0:9b334a45a8ff 206 Can only be executed in Privileged modes.
bogdanm 0:9b334a45a8ff 207 */
bogdanm 0:9b334a45a8ff 208 #define __enable_fault_irq __enable_fiq
bogdanm 0:9b334a45a8ff 209
bogdanm 0:9b334a45a8ff 210
bogdanm 0:9b334a45a8ff 211 /** \brief Disable FIQ
bogdanm 0:9b334a45a8ff 212
bogdanm 0:9b334a45a8ff 213 This function disables FIQ interrupts by setting the F-bit in the CPSR.
bogdanm 0:9b334a45a8ff 214 Can only be executed in Privileged modes.
bogdanm 0:9b334a45a8ff 215 */
bogdanm 0:9b334a45a8ff 216 #define __disable_fault_irq __disable_fiq
bogdanm 0:9b334a45a8ff 217
bogdanm 0:9b334a45a8ff 218
bogdanm 0:9b334a45a8ff 219 /** \brief Get Base Priority
bogdanm 0:9b334a45a8ff 220
bogdanm 0:9b334a45a8ff 221 This function returns the current value of the Base Priority register.
bogdanm 0:9b334a45a8ff 222
bogdanm 0:9b334a45a8ff 223 \return Base Priority register value
bogdanm 0:9b334a45a8ff 224 */
bogdanm 0:9b334a45a8ff 225 __STATIC_INLINE uint32_t __get_BASEPRI(void)
bogdanm 0:9b334a45a8ff 226 {
bogdanm 0:9b334a45a8ff 227 register uint32_t __regBasePri __ASM("basepri");
bogdanm 0:9b334a45a8ff 228 return(__regBasePri);
bogdanm 0:9b334a45a8ff 229 }
bogdanm 0:9b334a45a8ff 230
bogdanm 0:9b334a45a8ff 231
bogdanm 0:9b334a45a8ff 232 /** \brief Set Base Priority
bogdanm 0:9b334a45a8ff 233
bogdanm 0:9b334a45a8ff 234 This function assigns the given value to the Base Priority register.
bogdanm 0:9b334a45a8ff 235
bogdanm 0:9b334a45a8ff 236 \param [in] basePri Base Priority value to set
bogdanm 0:9b334a45a8ff 237 */
bogdanm 0:9b334a45a8ff 238 __STATIC_INLINE void __set_BASEPRI(uint32_t basePri)
bogdanm 0:9b334a45a8ff 239 {
bogdanm 0:9b334a45a8ff 240 register uint32_t __regBasePri __ASM("basepri");
bogdanm 0:9b334a45a8ff 241 __regBasePri = (basePri & 0xff);
bogdanm 0:9b334a45a8ff 242 }
bogdanm 0:9b334a45a8ff 243
bogdanm 0:9b334a45a8ff 244
mbed_official 19:112740acecfa 245 /** \brief Set Base Priority with condition
mbed_official 19:112740acecfa 246
mbed_official 19:112740acecfa 247 This function assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
mbed_official 19:112740acecfa 248 or the new value increases the BASEPRI priority level.
mbed_official 19:112740acecfa 249
mbed_official 19:112740acecfa 250 \param [in] basePri Base Priority value to set
mbed_official 19:112740acecfa 251 */
mbed_official 19:112740acecfa 252 __STATIC_INLINE void __set_BASEPRI_MAX(uint32_t basePri)
mbed_official 19:112740acecfa 253 {
mbed_official 19:112740acecfa 254 register uint32_t __regBasePriMax __ASM("basepri_max");
mbed_official 19:112740acecfa 255 __regBasePriMax = (basePri & 0xff);
mbed_official 19:112740acecfa 256 }
mbed_official 19:112740acecfa 257
mbed_official 19:112740acecfa 258
bogdanm 0:9b334a45a8ff 259 /** \brief Get Fault Mask
bogdanm 0:9b334a45a8ff 260
bogdanm 0:9b334a45a8ff 261 This function returns the current value of the Fault Mask register.
bogdanm 0:9b334a45a8ff 262
bogdanm 0:9b334a45a8ff 263 \return Fault Mask register value
bogdanm 0:9b334a45a8ff 264 */
bogdanm 0:9b334a45a8ff 265 __STATIC_INLINE uint32_t __get_FAULTMASK(void)
bogdanm 0:9b334a45a8ff 266 {
bogdanm 0:9b334a45a8ff 267 register uint32_t __regFaultMask __ASM("faultmask");
bogdanm 0:9b334a45a8ff 268 return(__regFaultMask);
bogdanm 0:9b334a45a8ff 269 }
bogdanm 0:9b334a45a8ff 270
bogdanm 0:9b334a45a8ff 271
bogdanm 0:9b334a45a8ff 272 /** \brief Set Fault Mask
bogdanm 0:9b334a45a8ff 273
bogdanm 0:9b334a45a8ff 274 This function assigns the given value to the Fault Mask register.
bogdanm 0:9b334a45a8ff 275
bogdanm 0:9b334a45a8ff 276 \param [in] faultMask Fault Mask value to set
bogdanm 0:9b334a45a8ff 277 */
bogdanm 0:9b334a45a8ff 278 __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
bogdanm 0:9b334a45a8ff 279 {
bogdanm 0:9b334a45a8ff 280 register uint32_t __regFaultMask __ASM("faultmask");
bogdanm 0:9b334a45a8ff 281 __regFaultMask = (faultMask & (uint32_t)1);
bogdanm 0:9b334a45a8ff 282 }
bogdanm 0:9b334a45a8ff 283
mbed_official 19:112740acecfa 284 #endif /* (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300) */
bogdanm 0:9b334a45a8ff 285
bogdanm 0:9b334a45a8ff 286
mbed_official 19:112740acecfa 287 #if (__CORTEX_M == 0x04) || (__CORTEX_M == 0x07)
bogdanm 0:9b334a45a8ff 288
bogdanm 0:9b334a45a8ff 289 /** \brief Get FPSCR
bogdanm 0:9b334a45a8ff 290
bogdanm 0:9b334a45a8ff 291 This function returns the current value of the Floating Point Status/Control register.
bogdanm 0:9b334a45a8ff 292
bogdanm 0:9b334a45a8ff 293 \return Floating Point Status/Control register value
bogdanm 0:9b334a45a8ff 294 */
bogdanm 0:9b334a45a8ff 295 __STATIC_INLINE uint32_t __get_FPSCR(void)
bogdanm 0:9b334a45a8ff 296 {
bogdanm 0:9b334a45a8ff 297 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
bogdanm 0:9b334a45a8ff 298 register uint32_t __regfpscr __ASM("fpscr");
bogdanm 0:9b334a45a8ff 299 return(__regfpscr);
bogdanm 0:9b334a45a8ff 300 #else
bogdanm 0:9b334a45a8ff 301 return(0);
bogdanm 0:9b334a45a8ff 302 #endif
bogdanm 0:9b334a45a8ff 303 }
bogdanm 0:9b334a45a8ff 304
bogdanm 0:9b334a45a8ff 305
bogdanm 0:9b334a45a8ff 306 /** \brief Set FPSCR
bogdanm 0:9b334a45a8ff 307
bogdanm 0:9b334a45a8ff 308 This function assigns the given value to the Floating Point Status/Control register.
bogdanm 0:9b334a45a8ff 309
bogdanm 0:9b334a45a8ff 310 \param [in] fpscr Floating Point Status/Control value to set
bogdanm 0:9b334a45a8ff 311 */
bogdanm 0:9b334a45a8ff 312 __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
bogdanm 0:9b334a45a8ff 313 {
bogdanm 0:9b334a45a8ff 314 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
bogdanm 0:9b334a45a8ff 315 register uint32_t __regfpscr __ASM("fpscr");
bogdanm 0:9b334a45a8ff 316 __regfpscr = (fpscr);
bogdanm 0:9b334a45a8ff 317 #endif
bogdanm 0:9b334a45a8ff 318 }
bogdanm 0:9b334a45a8ff 319
mbed_official 19:112740acecfa 320 #endif /* (__CORTEX_M == 0x04) || (__CORTEX_M == 0x07) */
bogdanm 0:9b334a45a8ff 321
bogdanm 0:9b334a45a8ff 322
bogdanm 0:9b334a45a8ff 323 #elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
bogdanm 0:9b334a45a8ff 324 /* GNU gcc specific functions */
bogdanm 0:9b334a45a8ff 325
bogdanm 0:9b334a45a8ff 326 /** \brief Enable IRQ Interrupts
bogdanm 0:9b334a45a8ff 327
bogdanm 0:9b334a45a8ff 328 This function enables IRQ interrupts by clearing the I-bit in the CPSR.
bogdanm 0:9b334a45a8ff 329 Can only be executed in Privileged modes.
bogdanm 0:9b334a45a8ff 330 */
bogdanm 0:9b334a45a8ff 331 __attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_irq(void)
bogdanm 0:9b334a45a8ff 332 {
bogdanm 0:9b334a45a8ff 333 __ASM volatile ("cpsie i" : : : "memory");
bogdanm 0:9b334a45a8ff 334 }
bogdanm 0:9b334a45a8ff 335
bogdanm 0:9b334a45a8ff 336
bogdanm 0:9b334a45a8ff 337 /** \brief Disable IRQ Interrupts
bogdanm 0:9b334a45a8ff 338
bogdanm 0:9b334a45a8ff 339 This function disables IRQ interrupts by setting the I-bit in the CPSR.
bogdanm 0:9b334a45a8ff 340 Can only be executed in Privileged modes.
bogdanm 0:9b334a45a8ff 341 */
bogdanm 0:9b334a45a8ff 342 __attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_irq(void)
bogdanm 0:9b334a45a8ff 343 {
bogdanm 0:9b334a45a8ff 344 __ASM volatile ("cpsid i" : : : "memory");
bogdanm 0:9b334a45a8ff 345 }
bogdanm 0:9b334a45a8ff 346
bogdanm 0:9b334a45a8ff 347
bogdanm 0:9b334a45a8ff 348 /** \brief Get Control Register
bogdanm 0:9b334a45a8ff 349
bogdanm 0:9b334a45a8ff 350 This function returns the content of the Control Register.
bogdanm 0:9b334a45a8ff 351
bogdanm 0:9b334a45a8ff 352 \return Control Register value
bogdanm 0:9b334a45a8ff 353 */
bogdanm 0:9b334a45a8ff 354 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_CONTROL(void)
bogdanm 0:9b334a45a8ff 355 {
bogdanm 0:9b334a45a8ff 356 uint32_t result;
bogdanm 0:9b334a45a8ff 357
bogdanm 0:9b334a45a8ff 358 __ASM volatile ("MRS %0, control" : "=r" (result) );
bogdanm 0:9b334a45a8ff 359 return(result);
bogdanm 0:9b334a45a8ff 360 }
bogdanm 0:9b334a45a8ff 361
bogdanm 0:9b334a45a8ff 362
bogdanm 0:9b334a45a8ff 363 /** \brief Set Control Register
bogdanm 0:9b334a45a8ff 364
bogdanm 0:9b334a45a8ff 365 This function writes the given value to the Control Register.
bogdanm 0:9b334a45a8ff 366
bogdanm 0:9b334a45a8ff 367 \param [in] control Control Register value to set
bogdanm 0:9b334a45a8ff 368 */
bogdanm 0:9b334a45a8ff 369 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_CONTROL(uint32_t control)
bogdanm 0:9b334a45a8ff 370 {
bogdanm 0:9b334a45a8ff 371 __ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
bogdanm 0:9b334a45a8ff 372 }
bogdanm 0:9b334a45a8ff 373
bogdanm 0:9b334a45a8ff 374
bogdanm 0:9b334a45a8ff 375 /** \brief Get IPSR Register
bogdanm 0:9b334a45a8ff 376
bogdanm 0:9b334a45a8ff 377 This function returns the content of the IPSR Register.
bogdanm 0:9b334a45a8ff 378
bogdanm 0:9b334a45a8ff 379 \return IPSR Register value
bogdanm 0:9b334a45a8ff 380 */
bogdanm 0:9b334a45a8ff 381 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_IPSR(void)
bogdanm 0:9b334a45a8ff 382 {
bogdanm 0:9b334a45a8ff 383 uint32_t result;
bogdanm 0:9b334a45a8ff 384
bogdanm 0:9b334a45a8ff 385 __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
bogdanm 0:9b334a45a8ff 386 return(result);
bogdanm 0:9b334a45a8ff 387 }
bogdanm 0:9b334a45a8ff 388
bogdanm 0:9b334a45a8ff 389
bogdanm 0:9b334a45a8ff 390 /** \brief Get APSR Register
bogdanm 0:9b334a45a8ff 391
bogdanm 0:9b334a45a8ff 392 This function returns the content of the APSR Register.
bogdanm 0:9b334a45a8ff 393
bogdanm 0:9b334a45a8ff 394 \return APSR Register value
bogdanm 0:9b334a45a8ff 395 */
bogdanm 0:9b334a45a8ff 396 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_APSR(void)
bogdanm 0:9b334a45a8ff 397 {
bogdanm 0:9b334a45a8ff 398 uint32_t result;
bogdanm 0:9b334a45a8ff 399
bogdanm 0:9b334a45a8ff 400 __ASM volatile ("MRS %0, apsr" : "=r" (result) );
bogdanm 0:9b334a45a8ff 401 return(result);
bogdanm 0:9b334a45a8ff 402 }
bogdanm 0:9b334a45a8ff 403
bogdanm 0:9b334a45a8ff 404
bogdanm 0:9b334a45a8ff 405 /** \brief Get xPSR Register
bogdanm 0:9b334a45a8ff 406
bogdanm 0:9b334a45a8ff 407 This function returns the content of the xPSR Register.
bogdanm 0:9b334a45a8ff 408
bogdanm 0:9b334a45a8ff 409 \return xPSR Register value
bogdanm 0:9b334a45a8ff 410 */
bogdanm 0:9b334a45a8ff 411 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_xPSR(void)
bogdanm 0:9b334a45a8ff 412 {
bogdanm 0:9b334a45a8ff 413 uint32_t result;
bogdanm 0:9b334a45a8ff 414
bogdanm 0:9b334a45a8ff 415 __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
bogdanm 0:9b334a45a8ff 416 return(result);
bogdanm 0:9b334a45a8ff 417 }
bogdanm 0:9b334a45a8ff 418
bogdanm 0:9b334a45a8ff 419
bogdanm 0:9b334a45a8ff 420 /** \brief Get Process Stack Pointer
bogdanm 0:9b334a45a8ff 421
bogdanm 0:9b334a45a8ff 422 This function returns the current value of the Process Stack Pointer (PSP).
bogdanm 0:9b334a45a8ff 423
bogdanm 0:9b334a45a8ff 424 \return PSP Register value
bogdanm 0:9b334a45a8ff 425 */
bogdanm 0:9b334a45a8ff 426 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PSP(void)
bogdanm 0:9b334a45a8ff 427 {
bogdanm 0:9b334a45a8ff 428 register uint32_t result;
bogdanm 0:9b334a45a8ff 429
bogdanm 0:9b334a45a8ff 430 __ASM volatile ("MRS %0, psp\n" : "=r" (result) );
bogdanm 0:9b334a45a8ff 431 return(result);
bogdanm 0:9b334a45a8ff 432 }
bogdanm 0:9b334a45a8ff 433
bogdanm 0:9b334a45a8ff 434
bogdanm 0:9b334a45a8ff 435 /** \brief Set Process Stack Pointer
bogdanm 0:9b334a45a8ff 436
bogdanm 0:9b334a45a8ff 437 This function assigns the given value to the Process Stack Pointer (PSP).
bogdanm 0:9b334a45a8ff 438
bogdanm 0:9b334a45a8ff 439 \param [in] topOfProcStack Process Stack Pointer value to set
bogdanm 0:9b334a45a8ff 440 */
bogdanm 0:9b334a45a8ff 441 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
bogdanm 0:9b334a45a8ff 442 {
bogdanm 0:9b334a45a8ff 443 __ASM volatile ("MSR psp, %0\n" : : "r" (topOfProcStack) : "sp");
bogdanm 0:9b334a45a8ff 444 }
bogdanm 0:9b334a45a8ff 445
bogdanm 0:9b334a45a8ff 446
bogdanm 0:9b334a45a8ff 447 /** \brief Get Main Stack Pointer
bogdanm 0:9b334a45a8ff 448
bogdanm 0:9b334a45a8ff 449 This function returns the current value of the Main Stack Pointer (MSP).
bogdanm 0:9b334a45a8ff 450
bogdanm 0:9b334a45a8ff 451 \return MSP Register value
bogdanm 0:9b334a45a8ff 452 */
bogdanm 0:9b334a45a8ff 453 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_MSP(void)
bogdanm 0:9b334a45a8ff 454 {
bogdanm 0:9b334a45a8ff 455 register uint32_t result;
bogdanm 0:9b334a45a8ff 456
bogdanm 0:9b334a45a8ff 457 __ASM volatile ("MRS %0, msp\n" : "=r" (result) );
bogdanm 0:9b334a45a8ff 458 return(result);
bogdanm 0:9b334a45a8ff 459 }
bogdanm 0:9b334a45a8ff 460
bogdanm 0:9b334a45a8ff 461
bogdanm 0:9b334a45a8ff 462 /** \brief Set Main Stack Pointer
bogdanm 0:9b334a45a8ff 463
bogdanm 0:9b334a45a8ff 464 This function assigns the given value to the Main Stack Pointer (MSP).
bogdanm 0:9b334a45a8ff 465
bogdanm 0:9b334a45a8ff 466 \param [in] topOfMainStack Main Stack Pointer value to set
bogdanm 0:9b334a45a8ff 467 */
bogdanm 0:9b334a45a8ff 468 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
bogdanm 0:9b334a45a8ff 469 {
bogdanm 0:9b334a45a8ff 470 __ASM volatile ("MSR msp, %0\n" : : "r" (topOfMainStack) : "sp");
bogdanm 0:9b334a45a8ff 471 }
bogdanm 0:9b334a45a8ff 472
bogdanm 0:9b334a45a8ff 473
bogdanm 0:9b334a45a8ff 474 /** \brief Get Priority Mask
bogdanm 0:9b334a45a8ff 475
bogdanm 0:9b334a45a8ff 476 This function returns the current state of the priority mask bit from the Priority Mask Register.
bogdanm 0:9b334a45a8ff 477
bogdanm 0:9b334a45a8ff 478 \return Priority Mask value
bogdanm 0:9b334a45a8ff 479 */
bogdanm 0:9b334a45a8ff 480 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PRIMASK(void)
bogdanm 0:9b334a45a8ff 481 {
bogdanm 0:9b334a45a8ff 482 uint32_t result;
bogdanm 0:9b334a45a8ff 483
bogdanm 0:9b334a45a8ff 484 __ASM volatile ("MRS %0, primask" : "=r" (result) );
bogdanm 0:9b334a45a8ff 485 return(result);
bogdanm 0:9b334a45a8ff 486 }
bogdanm 0:9b334a45a8ff 487
bogdanm 0:9b334a45a8ff 488
bogdanm 0:9b334a45a8ff 489 /** \brief Set Priority Mask
bogdanm 0:9b334a45a8ff 490
bogdanm 0:9b334a45a8ff 491 This function assigns the given value to the Priority Mask Register.
bogdanm 0:9b334a45a8ff 492
bogdanm 0:9b334a45a8ff 493 \param [in] priMask Priority Mask
bogdanm 0:9b334a45a8ff 494 */
bogdanm 0:9b334a45a8ff 495 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
bogdanm 0:9b334a45a8ff 496 {
bogdanm 0:9b334a45a8ff 497 __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
bogdanm 0:9b334a45a8ff 498 }
bogdanm 0:9b334a45a8ff 499
bogdanm 0:9b334a45a8ff 500
bogdanm 0:9b334a45a8ff 501 #if (__CORTEX_M >= 0x03)
bogdanm 0:9b334a45a8ff 502
bogdanm 0:9b334a45a8ff 503 /** \brief Enable FIQ
bogdanm 0:9b334a45a8ff 504
bogdanm 0:9b334a45a8ff 505 This function enables FIQ interrupts by clearing the F-bit in the CPSR.
bogdanm 0:9b334a45a8ff 506 Can only be executed in Privileged modes.
bogdanm 0:9b334a45a8ff 507 */
bogdanm 0:9b334a45a8ff 508 __attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_fault_irq(void)
bogdanm 0:9b334a45a8ff 509 {
bogdanm 0:9b334a45a8ff 510 __ASM volatile ("cpsie f" : : : "memory");
bogdanm 0:9b334a45a8ff 511 }
bogdanm 0:9b334a45a8ff 512
bogdanm 0:9b334a45a8ff 513
bogdanm 0:9b334a45a8ff 514 /** \brief Disable FIQ
bogdanm 0:9b334a45a8ff 515
bogdanm 0:9b334a45a8ff 516 This function disables FIQ interrupts by setting the F-bit in the CPSR.
bogdanm 0:9b334a45a8ff 517 Can only be executed in Privileged modes.
bogdanm 0:9b334a45a8ff 518 */
bogdanm 0:9b334a45a8ff 519 __attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_fault_irq(void)
bogdanm 0:9b334a45a8ff 520 {
bogdanm 0:9b334a45a8ff 521 __ASM volatile ("cpsid f" : : : "memory");
bogdanm 0:9b334a45a8ff 522 }
bogdanm 0:9b334a45a8ff 523
bogdanm 0:9b334a45a8ff 524
bogdanm 0:9b334a45a8ff 525 /** \brief Get Base Priority
bogdanm 0:9b334a45a8ff 526
bogdanm 0:9b334a45a8ff 527 This function returns the current value of the Base Priority register.
bogdanm 0:9b334a45a8ff 528
bogdanm 0:9b334a45a8ff 529 \return Base Priority register value
bogdanm 0:9b334a45a8ff 530 */
bogdanm 0:9b334a45a8ff 531 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_BASEPRI(void)
bogdanm 0:9b334a45a8ff 532 {
bogdanm 0:9b334a45a8ff 533 uint32_t result;
bogdanm 0:9b334a45a8ff 534
mbed_official 19:112740acecfa 535 __ASM volatile ("MRS %0, basepri" : "=r" (result) );
bogdanm 0:9b334a45a8ff 536 return(result);
bogdanm 0:9b334a45a8ff 537 }
bogdanm 0:9b334a45a8ff 538
bogdanm 0:9b334a45a8ff 539
bogdanm 0:9b334a45a8ff 540 /** \brief Set Base Priority
bogdanm 0:9b334a45a8ff 541
bogdanm 0:9b334a45a8ff 542 This function assigns the given value to the Base Priority register.
bogdanm 0:9b334a45a8ff 543
bogdanm 0:9b334a45a8ff 544 \param [in] basePri Base Priority value to set
bogdanm 0:9b334a45a8ff 545 */
bogdanm 0:9b334a45a8ff 546 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_BASEPRI(uint32_t value)
bogdanm 0:9b334a45a8ff 547 {
bogdanm 0:9b334a45a8ff 548 __ASM volatile ("MSR basepri, %0" : : "r" (value) : "memory");
bogdanm 0:9b334a45a8ff 549 }
bogdanm 0:9b334a45a8ff 550
bogdanm 0:9b334a45a8ff 551
mbed_official 19:112740acecfa 552 /** \brief Set Base Priority with condition
mbed_official 19:112740acecfa 553
mbed_official 19:112740acecfa 554 This function assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
mbed_official 19:112740acecfa 555 or the new value increases the BASEPRI priority level.
mbed_official 19:112740acecfa 556
mbed_official 19:112740acecfa 557 \param [in] basePri Base Priority value to set
mbed_official 19:112740acecfa 558 */
mbed_official 19:112740acecfa 559 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_BASEPRI_MAX(uint32_t value)
mbed_official 19:112740acecfa 560 {
mbed_official 19:112740acecfa 561 __ASM volatile ("MSR basepri_max, %0" : : "r" (value) : "memory");
mbed_official 19:112740acecfa 562 }
mbed_official 19:112740acecfa 563
mbed_official 19:112740acecfa 564
bogdanm 0:9b334a45a8ff 565 /** \brief Get Fault Mask
bogdanm 0:9b334a45a8ff 566
bogdanm 0:9b334a45a8ff 567 This function returns the current value of the Fault Mask register.
bogdanm 0:9b334a45a8ff 568
bogdanm 0:9b334a45a8ff 569 \return Fault Mask register value
bogdanm 0:9b334a45a8ff 570 */
bogdanm 0:9b334a45a8ff 571 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FAULTMASK(void)
bogdanm 0:9b334a45a8ff 572 {
bogdanm 0:9b334a45a8ff 573 uint32_t result;
bogdanm 0:9b334a45a8ff 574
bogdanm 0:9b334a45a8ff 575 __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
bogdanm 0:9b334a45a8ff 576 return(result);
bogdanm 0:9b334a45a8ff 577 }
bogdanm 0:9b334a45a8ff 578
bogdanm 0:9b334a45a8ff 579
bogdanm 0:9b334a45a8ff 580 /** \brief Set Fault Mask
bogdanm 0:9b334a45a8ff 581
bogdanm 0:9b334a45a8ff 582 This function assigns the given value to the Fault Mask register.
bogdanm 0:9b334a45a8ff 583
bogdanm 0:9b334a45a8ff 584 \param [in] faultMask Fault Mask value to set
bogdanm 0:9b334a45a8ff 585 */
bogdanm 0:9b334a45a8ff 586 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
bogdanm 0:9b334a45a8ff 587 {
bogdanm 0:9b334a45a8ff 588 __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory");
bogdanm 0:9b334a45a8ff 589 }
bogdanm 0:9b334a45a8ff 590
bogdanm 0:9b334a45a8ff 591 #endif /* (__CORTEX_M >= 0x03) */
bogdanm 0:9b334a45a8ff 592
bogdanm 0:9b334a45a8ff 593
mbed_official 19:112740acecfa 594 #if (__CORTEX_M == 0x04) || (__CORTEX_M == 0x07)
bogdanm 0:9b334a45a8ff 595
bogdanm 0:9b334a45a8ff 596 /** \brief Get FPSCR
bogdanm 0:9b334a45a8ff 597
bogdanm 0:9b334a45a8ff 598 This function returns the current value of the Floating Point Status/Control register.
bogdanm 0:9b334a45a8ff 599
bogdanm 0:9b334a45a8ff 600 \return Floating Point Status/Control register value
bogdanm 0:9b334a45a8ff 601 */
bogdanm 0:9b334a45a8ff 602 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FPSCR(void)
bogdanm 0:9b334a45a8ff 603 {
bogdanm 0:9b334a45a8ff 604 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
bogdanm 0:9b334a45a8ff 605 uint32_t result;
bogdanm 0:9b334a45a8ff 606
bogdanm 0:9b334a45a8ff 607 /* Empty asm statement works as a scheduling barrier */
bogdanm 0:9b334a45a8ff 608 __ASM volatile ("");
bogdanm 0:9b334a45a8ff 609 __ASM volatile ("VMRS %0, fpscr" : "=r" (result) );
bogdanm 0:9b334a45a8ff 610 __ASM volatile ("");
bogdanm 0:9b334a45a8ff 611 return(result);
bogdanm 0:9b334a45a8ff 612 #else
bogdanm 0:9b334a45a8ff 613 return(0);
bogdanm 0:9b334a45a8ff 614 #endif
bogdanm 0:9b334a45a8ff 615 }
bogdanm 0:9b334a45a8ff 616
bogdanm 0:9b334a45a8ff 617
bogdanm 0:9b334a45a8ff 618 /** \brief Set FPSCR
bogdanm 0:9b334a45a8ff 619
bogdanm 0:9b334a45a8ff 620 This function assigns the given value to the Floating Point Status/Control register.
bogdanm 0:9b334a45a8ff 621
bogdanm 0:9b334a45a8ff 622 \param [in] fpscr Floating Point Status/Control value to set
bogdanm 0:9b334a45a8ff 623 */
bogdanm 0:9b334a45a8ff 624 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
bogdanm 0:9b334a45a8ff 625 {
bogdanm 0:9b334a45a8ff 626 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
bogdanm 0:9b334a45a8ff 627 /* Empty asm statement works as a scheduling barrier */
bogdanm 0:9b334a45a8ff 628 __ASM volatile ("");
bogdanm 0:9b334a45a8ff 629 __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc");
bogdanm 0:9b334a45a8ff 630 __ASM volatile ("");
bogdanm 0:9b334a45a8ff 631 #endif
bogdanm 0:9b334a45a8ff 632 }
bogdanm 0:9b334a45a8ff 633
mbed_official 19:112740acecfa 634 #endif /* (__CORTEX_M == 0x04) || (__CORTEX_M == 0x07) */
mbed_official 19:112740acecfa 635
mbed_official 19:112740acecfa 636
mbed_official 19:112740acecfa 637 #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
mbed_official 19:112740acecfa 638 /* IAR iccarm specific functions */
mbed_official 19:112740acecfa 639 #include <cmsis_iar.h>
mbed_official 19:112740acecfa 640
mbed_official 19:112740acecfa 641
mbed_official 19:112740acecfa 642 #elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
mbed_official 19:112740acecfa 643 /* TI CCS specific functions */
mbed_official 19:112740acecfa 644 #include <cmsis_ccs.h>
bogdanm 0:9b334a45a8ff 645
bogdanm 0:9b334a45a8ff 646
bogdanm 0:9b334a45a8ff 647 #elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
bogdanm 0:9b334a45a8ff 648 /* TASKING carm specific functions */
bogdanm 0:9b334a45a8ff 649 /*
bogdanm 0:9b334a45a8ff 650 * The CMSIS functions have been implemented as intrinsics in the compiler.
mbed_official 19:112740acecfa 651 * Please use "carm -?i" to get an up to date list of all intrinsics,
bogdanm 0:9b334a45a8ff 652 * Including the CMSIS ones.
bogdanm 0:9b334a45a8ff 653 */
bogdanm 0:9b334a45a8ff 654
mbed_official 19:112740acecfa 655
mbed_official 19:112740acecfa 656 #elif defined ( __CSMC__ ) /*------------------ COSMIC Compiler -------------------*/
mbed_official 19:112740acecfa 657 /* Cosmic specific functions */
mbed_official 19:112740acecfa 658 #include <cmsis_csm.h>
mbed_official 19:112740acecfa 659
bogdanm 0:9b334a45a8ff 660 #endif
bogdanm 0:9b334a45a8ff 661
bogdanm 0:9b334a45a8ff 662 /*@} end of CMSIS_Core_RegAccFunctions */
bogdanm 0:9b334a45a8ff 663
bogdanm 0:9b334a45a8ff 664 #endif /* __CORE_CMFUNC_H */