fix LPC812 PWM
Fork of mbed-dev by
targets/cmsis/TARGET_STM/TARGET_STM32L1/stm32l1xx_hal_i2s.c@0:9b334a45a8ff, 2015-10-01 (annotated)
- Committer:
- bogdanm
- Date:
- Thu Oct 01 15:25:22 2015 +0300
- Revision:
- 0:9b334a45a8ff
Initial commit on mbed-dev
Replaces mbed-src (now inactive)
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
bogdanm | 0:9b334a45a8ff | 1 | /** |
bogdanm | 0:9b334a45a8ff | 2 | ****************************************************************************** |
bogdanm | 0:9b334a45a8ff | 3 | * @file stm32l1xx_hal_i2s.c |
bogdanm | 0:9b334a45a8ff | 4 | * @author MCD Application Team |
bogdanm | 0:9b334a45a8ff | 5 | * @version V1.0.0 |
bogdanm | 0:9b334a45a8ff | 6 | * @date 5-September-2014 |
bogdanm | 0:9b334a45a8ff | 7 | * @brief I2S HAL module driver. |
bogdanm | 0:9b334a45a8ff | 8 | * This file provides firmware functions to manage the following |
bogdanm | 0:9b334a45a8ff | 9 | * functionalities of the Integrated Interchip Sound (I2S) peripheral: |
bogdanm | 0:9b334a45a8ff | 10 | * + Initialization and de-initialization functions |
bogdanm | 0:9b334a45a8ff | 11 | * + IO operation functions |
bogdanm | 0:9b334a45a8ff | 12 | * + Peripheral State and Errors functions |
bogdanm | 0:9b334a45a8ff | 13 | @verbatim |
bogdanm | 0:9b334a45a8ff | 14 | =============================================================================== |
bogdanm | 0:9b334a45a8ff | 15 | ##### How to use this driver ##### |
bogdanm | 0:9b334a45a8ff | 16 | =============================================================================== |
bogdanm | 0:9b334a45a8ff | 17 | [..] |
bogdanm | 0:9b334a45a8ff | 18 | The I2S HAL driver can be used as follow: |
bogdanm | 0:9b334a45a8ff | 19 | |
bogdanm | 0:9b334a45a8ff | 20 | (#) Declare a I2S_HandleTypeDef handle structure. |
bogdanm | 0:9b334a45a8ff | 21 | (#) Initialize the I2S low level resources by implement the HAL_I2S_MspInit() API: |
bogdanm | 0:9b334a45a8ff | 22 | (##) Enable the SPIx interface clock. |
bogdanm | 0:9b334a45a8ff | 23 | (##) I2S pins configuration: |
bogdanm | 0:9b334a45a8ff | 24 | (+++) Enable the clock for the I2S GPIOs. |
bogdanm | 0:9b334a45a8ff | 25 | (+++) Configure these I2S pins as alternate function. |
bogdanm | 0:9b334a45a8ff | 26 | (##) NVIC configuration if you need to use interrupt process (HAL_I2S_Transmit_IT() |
bogdanm | 0:9b334a45a8ff | 27 | and HAL_I2S_Receive_IT() APIs). |
bogdanm | 0:9b334a45a8ff | 28 | (+++) Configure the I2Sx interrupt priority. |
bogdanm | 0:9b334a45a8ff | 29 | (+++) Enable the NVIC I2S IRQ handle. |
bogdanm | 0:9b334a45a8ff | 30 | (##) DMA Configuration if you need to use DMA process (HAL_I2S_Transmit_DMA() |
bogdanm | 0:9b334a45a8ff | 31 | and HAL_I2S_Receive_DMA() APIs: |
bogdanm | 0:9b334a45a8ff | 32 | (+++) Declare a DMA handle structure for the Tx/Rx Channel. |
bogdanm | 0:9b334a45a8ff | 33 | (+++) Enable the DMAx interface clock. |
bogdanm | 0:9b334a45a8ff | 34 | (+++) Configure the declared DMA handle structure with the required Tx/Rx parameters. |
bogdanm | 0:9b334a45a8ff | 35 | (+++) Configure the DMA Tx/Rx Channel. |
bogdanm | 0:9b334a45a8ff | 36 | (+++) Associate the initilalized DMA handle to the I2S DMA Tx/Rx handle. |
bogdanm | 0:9b334a45a8ff | 37 | (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the |
bogdanm | 0:9b334a45a8ff | 38 | DMA Tx/Rx Channel. |
bogdanm | 0:9b334a45a8ff | 39 | |
bogdanm | 0:9b334a45a8ff | 40 | (#) Program the Mode, Standard, Data Format, MCLK Output, Audio frequency and Polarity |
bogdanm | 0:9b334a45a8ff | 41 | using HAL_I2S_Init() function. |
bogdanm | 0:9b334a45a8ff | 42 | |
bogdanm | 0:9b334a45a8ff | 43 | -@- The specific I2S interrupts (Transmission complete interrupt, |
bogdanm | 0:9b334a45a8ff | 44 | RXNE interrupt and Error Interrupts) will be managed using the macros |
bogdanm | 0:9b334a45a8ff | 45 | __HAL_I2S_ENABLE_IT() and __HAL_I2S_DISABLE_IT() inside the transmit and receive process. |
bogdanm | 0:9b334a45a8ff | 46 | -@- Make sure that either: |
bogdanm | 0:9b334a45a8ff | 47 | (+@) External clock source is configured after setting correctly |
bogdanm | 0:9b334a45a8ff | 48 | the define constant HSE_VALUE in the stm32l1xx_hal_conf.h file. |
bogdanm | 0:9b334a45a8ff | 49 | |
bogdanm | 0:9b334a45a8ff | 50 | (#) Three mode of operations are available within this driver : |
bogdanm | 0:9b334a45a8ff | 51 | |
bogdanm | 0:9b334a45a8ff | 52 | *** Polling mode IO operation *** |
bogdanm | 0:9b334a45a8ff | 53 | ================================= |
bogdanm | 0:9b334a45a8ff | 54 | [..] |
bogdanm | 0:9b334a45a8ff | 55 | (+) Send an amount of data in blocking mode using HAL_I2S_Transmit() |
bogdanm | 0:9b334a45a8ff | 56 | (+) Receive an amount of data in blocking mode using HAL_I2S_Receive() |
bogdanm | 0:9b334a45a8ff | 57 | |
bogdanm | 0:9b334a45a8ff | 58 | *** Interrupt mode IO operation *** |
bogdanm | 0:9b334a45a8ff | 59 | =================================== |
bogdanm | 0:9b334a45a8ff | 60 | [..] |
bogdanm | 0:9b334a45a8ff | 61 | (+) Send an amount of data in non blocking mode using HAL_I2S_Transmit_IT() |
bogdanm | 0:9b334a45a8ff | 62 | (+) At transmission end of half transfer HAL_I2S_TxHalfCpltCallback is executed and user can |
bogdanm | 0:9b334a45a8ff | 63 | add his own code by customization of function pointer HAL_I2S_TxHalfCpltCallback |
bogdanm | 0:9b334a45a8ff | 64 | (+) At transmission end of transfer HAL_I2S_TxCpltCallback is executed and user can |
bogdanm | 0:9b334a45a8ff | 65 | add his own code by customization of function pointer HAL_I2S_TxCpltCallback |
bogdanm | 0:9b334a45a8ff | 66 | (+) Receive an amount of data in non blocking mode using HAL_I2S_Receive_IT() |
bogdanm | 0:9b334a45a8ff | 67 | (+) At reception end of half transfer HAL_I2S_RxHalfCpltCallback is executed and user can |
bogdanm | 0:9b334a45a8ff | 68 | add his own code by customization of function pointer HAL_I2S_RxHalfCpltCallback |
bogdanm | 0:9b334a45a8ff | 69 | (+) At reception end of transfer HAL_I2S_RxCpltCallback is executed and user can |
bogdanm | 0:9b334a45a8ff | 70 | add his own code by customization of function pointer HAL_I2S_RxCpltCallback |
bogdanm | 0:9b334a45a8ff | 71 | (+) In case of transfer Error, HAL_I2S_ErrorCallback() function is executed and user can |
bogdanm | 0:9b334a45a8ff | 72 | add his own code by customization of function pointer HAL_I2S_ErrorCallback |
bogdanm | 0:9b334a45a8ff | 73 | |
bogdanm | 0:9b334a45a8ff | 74 | *** DMA mode IO operation *** |
bogdanm | 0:9b334a45a8ff | 75 | ============================== |
bogdanm | 0:9b334a45a8ff | 76 | [..] |
bogdanm | 0:9b334a45a8ff | 77 | (+) Send an amount of data in non blocking mode (DMA) using HAL_I2S_Transmit_DMA() |
bogdanm | 0:9b334a45a8ff | 78 | (+) At transmission end of half transfer HAL_I2S_TxHalfCpltCallback is executed and user can |
bogdanm | 0:9b334a45a8ff | 79 | add his own code by customization of function pointer HAL_I2S_TxHalfCpltCallback |
bogdanm | 0:9b334a45a8ff | 80 | (+) At transmission end of transfer HAL_I2S_TxCpltCallback is executed and user can |
bogdanm | 0:9b334a45a8ff | 81 | add his own code by customization of function pointer HAL_I2S_TxCpltCallback |
bogdanm | 0:9b334a45a8ff | 82 | (+) Receive an amount of data in non blocking mode (DMA) using HAL_I2S_Receive_DMA() |
bogdanm | 0:9b334a45a8ff | 83 | (+) At reception end of half transfer HAL_I2S_RxHalfCpltCallback is executed and user can |
bogdanm | 0:9b334a45a8ff | 84 | add his own code by customization of function pointer HAL_I2S_RxHalfCpltCallback |
bogdanm | 0:9b334a45a8ff | 85 | (+) At reception end of transfer HAL_I2S_RxCpltCallback is executed and user can |
bogdanm | 0:9b334a45a8ff | 86 | add his own code by customization of function pointer HAL_I2S_RxCpltCallback |
bogdanm | 0:9b334a45a8ff | 87 | (+) In case of transfer Error, HAL_I2S_ErrorCallback() function is executed and user can |
bogdanm | 0:9b334a45a8ff | 88 | add his own code by customization of function pointer HAL_I2S_ErrorCallback |
bogdanm | 0:9b334a45a8ff | 89 | (+) Pause the DMA Transfer using HAL_I2S_DMAPause() |
bogdanm | 0:9b334a45a8ff | 90 | (+) Resume the DMA Transfer using HAL_I2S_DMAResume() |
bogdanm | 0:9b334a45a8ff | 91 | (+) Stop the DMA Transfer using HAL_I2S_DMAStop() |
bogdanm | 0:9b334a45a8ff | 92 | |
bogdanm | 0:9b334a45a8ff | 93 | *** I2S HAL driver macros list *** |
bogdanm | 0:9b334a45a8ff | 94 | ============================================= |
bogdanm | 0:9b334a45a8ff | 95 | [..] |
bogdanm | 0:9b334a45a8ff | 96 | Below the list of most used macros in USART HAL driver. |
bogdanm | 0:9b334a45a8ff | 97 | |
bogdanm | 0:9b334a45a8ff | 98 | (+) __HAL_I2S_ENABLE: Enable the specified SPI peripheral (in I2S mode) |
bogdanm | 0:9b334a45a8ff | 99 | (+) __HAL_I2S_DISABLE: Disable the specified SPI peripheral (in I2S mode) |
bogdanm | 0:9b334a45a8ff | 100 | (+) __HAL_I2S_ENABLE_IT : Enable the specified I2S interrupts |
bogdanm | 0:9b334a45a8ff | 101 | (+) __HAL_I2S_DISABLE_IT : Disable the specified I2S interrupts |
bogdanm | 0:9b334a45a8ff | 102 | (+) __HAL_I2S_GET_FLAG: Check whether the specified I2S flag is set or not |
bogdanm | 0:9b334a45a8ff | 103 | |
bogdanm | 0:9b334a45a8ff | 104 | [..] |
bogdanm | 0:9b334a45a8ff | 105 | (@) You can refer to the I2S HAL driver header file for more useful macros |
bogdanm | 0:9b334a45a8ff | 106 | |
bogdanm | 0:9b334a45a8ff | 107 | @endverbatim |
bogdanm | 0:9b334a45a8ff | 108 | ****************************************************************************** |
bogdanm | 0:9b334a45a8ff | 109 | * @attention |
bogdanm | 0:9b334a45a8ff | 110 | * |
bogdanm | 0:9b334a45a8ff | 111 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
bogdanm | 0:9b334a45a8ff | 112 | * |
bogdanm | 0:9b334a45a8ff | 113 | * Redistribution and use in source and binary forms, with or without modification, |
bogdanm | 0:9b334a45a8ff | 114 | * are permitted provided that the following conditions are met: |
bogdanm | 0:9b334a45a8ff | 115 | * 1. Redistributions of source code must retain the above copyright notice, |
bogdanm | 0:9b334a45a8ff | 116 | * this list of conditions and the following disclaimer. |
bogdanm | 0:9b334a45a8ff | 117 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
bogdanm | 0:9b334a45a8ff | 118 | * this list of conditions and the following disclaimer in the documentation |
bogdanm | 0:9b334a45a8ff | 119 | * and/or other materials provided with the distribution. |
bogdanm | 0:9b334a45a8ff | 120 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
bogdanm | 0:9b334a45a8ff | 121 | * may be used to endorse or promote products derived from this software |
bogdanm | 0:9b334a45a8ff | 122 | * without specific prior written permission. |
bogdanm | 0:9b334a45a8ff | 123 | * |
bogdanm | 0:9b334a45a8ff | 124 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
bogdanm | 0:9b334a45a8ff | 125 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
bogdanm | 0:9b334a45a8ff | 126 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
bogdanm | 0:9b334a45a8ff | 127 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
bogdanm | 0:9b334a45a8ff | 128 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
bogdanm | 0:9b334a45a8ff | 129 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
bogdanm | 0:9b334a45a8ff | 130 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
bogdanm | 0:9b334a45a8ff | 131 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
bogdanm | 0:9b334a45a8ff | 132 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
bogdanm | 0:9b334a45a8ff | 133 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
bogdanm | 0:9b334a45a8ff | 134 | * |
bogdanm | 0:9b334a45a8ff | 135 | ****************************************************************************** |
bogdanm | 0:9b334a45a8ff | 136 | */ |
bogdanm | 0:9b334a45a8ff | 137 | |
bogdanm | 0:9b334a45a8ff | 138 | /* Includes ------------------------------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 139 | #include "stm32l1xx_hal.h" |
bogdanm | 0:9b334a45a8ff | 140 | |
bogdanm | 0:9b334a45a8ff | 141 | /** @addtogroup STM32L1xx_HAL_Driver |
bogdanm | 0:9b334a45a8ff | 142 | * @{ |
bogdanm | 0:9b334a45a8ff | 143 | */ |
bogdanm | 0:9b334a45a8ff | 144 | |
bogdanm | 0:9b334a45a8ff | 145 | /** @defgroup I2S I2S |
bogdanm | 0:9b334a45a8ff | 146 | * @brief I2S HAL module driver |
bogdanm | 0:9b334a45a8ff | 147 | * @{ |
bogdanm | 0:9b334a45a8ff | 148 | */ |
bogdanm | 0:9b334a45a8ff | 149 | |
bogdanm | 0:9b334a45a8ff | 150 | #ifdef HAL_I2S_MODULE_ENABLED |
bogdanm | 0:9b334a45a8ff | 151 | #if defined(STM32L100xC) || \ |
bogdanm | 0:9b334a45a8ff | 152 | defined(STM32L151xC) || defined(STM32L151xCA) || defined(STM32L151xD) || defined(STM32L151xE) || \ |
bogdanm | 0:9b334a45a8ff | 153 | defined(STM32L152xC) || defined(STM32L152xCA) || defined(STM32L152xD) || defined(STM32L152xE) || \ |
bogdanm | 0:9b334a45a8ff | 154 | defined(STM32L162xC) || defined(STM32L162xCA) || defined(STM32L162xD) || defined(STM32L162xE) |
bogdanm | 0:9b334a45a8ff | 155 | |
bogdanm | 0:9b334a45a8ff | 156 | /* Private typedef -----------------------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 157 | /* Private define ------------------------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 158 | /* Private macro -------------------------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 159 | /* Private variables ---------------------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 160 | /* Private function prototypes -----------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 161 | static void I2S_DMATxCplt(DMA_HandleTypeDef *hdma); |
bogdanm | 0:9b334a45a8ff | 162 | static void I2S_DMATxHalfCplt(DMA_HandleTypeDef *hdma); |
bogdanm | 0:9b334a45a8ff | 163 | static void I2S_DMARxCplt(DMA_HandleTypeDef *hdma); |
bogdanm | 0:9b334a45a8ff | 164 | static void I2S_DMARxHalfCplt(DMA_HandleTypeDef *hdma); |
bogdanm | 0:9b334a45a8ff | 165 | static void I2S_DMAError(DMA_HandleTypeDef *hdma); |
bogdanm | 0:9b334a45a8ff | 166 | static void I2S_Transmit_IT(I2S_HandleTypeDef *hi2s); |
bogdanm | 0:9b334a45a8ff | 167 | static void I2S_Receive_IT(I2S_HandleTypeDef *hi2s); |
bogdanm | 0:9b334a45a8ff | 168 | static HAL_StatusTypeDef I2S_WaitFlagStateUntilTimeout(I2S_HandleTypeDef *hi2s, uint32_t Flag, uint32_t Status, uint32_t Timeout); |
bogdanm | 0:9b334a45a8ff | 169 | |
bogdanm | 0:9b334a45a8ff | 170 | /* Private functions ---------------------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 171 | |
bogdanm | 0:9b334a45a8ff | 172 | /** @defgroup I2S_Exported_Functions I2S Exported Functions |
bogdanm | 0:9b334a45a8ff | 173 | * @{ |
bogdanm | 0:9b334a45a8ff | 174 | */ |
bogdanm | 0:9b334a45a8ff | 175 | |
bogdanm | 0:9b334a45a8ff | 176 | /** @defgroup I2S_Exported_Functions_Group1 Initialization and de-initialization functions |
bogdanm | 0:9b334a45a8ff | 177 | * @brief Initialization and Configuration functions |
bogdanm | 0:9b334a45a8ff | 178 | * |
bogdanm | 0:9b334a45a8ff | 179 | @verbatim |
bogdanm | 0:9b334a45a8ff | 180 | =============================================================================== |
bogdanm | 0:9b334a45a8ff | 181 | ##### Initialization and de-initialization functions ##### |
bogdanm | 0:9b334a45a8ff | 182 | =============================================================================== |
bogdanm | 0:9b334a45a8ff | 183 | [..] This subsection provides a set of functions allowing to initialize and |
bogdanm | 0:9b334a45a8ff | 184 | de-initialiaze the I2Sx peripheral in simplex mode: |
bogdanm | 0:9b334a45a8ff | 185 | |
bogdanm | 0:9b334a45a8ff | 186 | (+) User must Implement HAL_I2S_MspInit() function in which he configures |
bogdanm | 0:9b334a45a8ff | 187 | all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC ). |
bogdanm | 0:9b334a45a8ff | 188 | |
bogdanm | 0:9b334a45a8ff | 189 | (+) Call the function HAL_I2S_Init() to configure the selected device with |
bogdanm | 0:9b334a45a8ff | 190 | the selected configuration: |
bogdanm | 0:9b334a45a8ff | 191 | (++) Mode |
bogdanm | 0:9b334a45a8ff | 192 | (++) Standard |
bogdanm | 0:9b334a45a8ff | 193 | (++) Data Format |
bogdanm | 0:9b334a45a8ff | 194 | (++) MCLK Output |
bogdanm | 0:9b334a45a8ff | 195 | (++) Audio frequency |
bogdanm | 0:9b334a45a8ff | 196 | (++) Polarity |
bogdanm | 0:9b334a45a8ff | 197 | |
bogdanm | 0:9b334a45a8ff | 198 | (+) Call the function HAL_I2S_DeInit() to restore the default configuration |
bogdanm | 0:9b334a45a8ff | 199 | of the selected I2Sx periperal. |
bogdanm | 0:9b334a45a8ff | 200 | @endverbatim |
bogdanm | 0:9b334a45a8ff | 201 | * @{ |
bogdanm | 0:9b334a45a8ff | 202 | */ |
bogdanm | 0:9b334a45a8ff | 203 | |
bogdanm | 0:9b334a45a8ff | 204 | /** |
bogdanm | 0:9b334a45a8ff | 205 | * @brief Initializes the I2S according to the specified parameters |
bogdanm | 0:9b334a45a8ff | 206 | * in the I2S_InitTypeDef and create the associated handle. |
bogdanm | 0:9b334a45a8ff | 207 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 208 | * the configuration information for I2S module |
bogdanm | 0:9b334a45a8ff | 209 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 210 | */ |
bogdanm | 0:9b334a45a8ff | 211 | HAL_StatusTypeDef HAL_I2S_Init(I2S_HandleTypeDef *hi2s) |
bogdanm | 0:9b334a45a8ff | 212 | { |
bogdanm | 0:9b334a45a8ff | 213 | uint32_t i2sdiv = 2, i2sodd = 0, packetlength = 1; |
bogdanm | 0:9b334a45a8ff | 214 | uint32_t tmp = 0, i2sclk = 0; |
bogdanm | 0:9b334a45a8ff | 215 | |
bogdanm | 0:9b334a45a8ff | 216 | /* Check the I2S handle allocation */ |
bogdanm | 0:9b334a45a8ff | 217 | if(hi2s == HAL_NULL) |
bogdanm | 0:9b334a45a8ff | 218 | { |
bogdanm | 0:9b334a45a8ff | 219 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 220 | } |
bogdanm | 0:9b334a45a8ff | 221 | |
bogdanm | 0:9b334a45a8ff | 222 | /* Check the I2S parameters */ |
bogdanm | 0:9b334a45a8ff | 223 | assert_param(IS_I2S_ALL_INSTANCE(hi2s->Instance)); |
bogdanm | 0:9b334a45a8ff | 224 | assert_param(IS_I2S_MODE(hi2s->Init.Mode)); |
bogdanm | 0:9b334a45a8ff | 225 | assert_param(IS_I2S_STANDARD(hi2s->Init.Standard)); |
bogdanm | 0:9b334a45a8ff | 226 | assert_param(IS_I2S_DATA_FORMAT(hi2s->Init.DataFormat)); |
bogdanm | 0:9b334a45a8ff | 227 | assert_param(IS_I2S_MCLK_OUTPUT(hi2s->Init.MCLKOutput)); |
bogdanm | 0:9b334a45a8ff | 228 | assert_param(IS_I2S_AUDIO_FREQ(hi2s->Init.AudioFreq)); |
bogdanm | 0:9b334a45a8ff | 229 | assert_param(IS_I2S_CPOL(hi2s->Init.CPOL)); |
bogdanm | 0:9b334a45a8ff | 230 | |
bogdanm | 0:9b334a45a8ff | 231 | if(hi2s->State == HAL_I2S_STATE_RESET) |
bogdanm | 0:9b334a45a8ff | 232 | { |
bogdanm | 0:9b334a45a8ff | 233 | /* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */ |
bogdanm | 0:9b334a45a8ff | 234 | HAL_I2S_MspInit(hi2s); |
bogdanm | 0:9b334a45a8ff | 235 | } |
bogdanm | 0:9b334a45a8ff | 236 | |
bogdanm | 0:9b334a45a8ff | 237 | hi2s->State = HAL_I2S_STATE_BUSY; |
bogdanm | 0:9b334a45a8ff | 238 | |
bogdanm | 0:9b334a45a8ff | 239 | /* If the default value has to be written, reinitialize i2sdiv and i2sodd*/ |
bogdanm | 0:9b334a45a8ff | 240 | if(hi2s->Init.AudioFreq == I2S_AUDIOFREQ_DEFAULT) |
bogdanm | 0:9b334a45a8ff | 241 | { |
bogdanm | 0:9b334a45a8ff | 242 | i2sodd = (uint32_t)0; |
bogdanm | 0:9b334a45a8ff | 243 | i2sdiv = (uint32_t)2; |
bogdanm | 0:9b334a45a8ff | 244 | } |
bogdanm | 0:9b334a45a8ff | 245 | /* If the requested audio frequency is not the default, compute the prescaler */ |
bogdanm | 0:9b334a45a8ff | 246 | else |
bogdanm | 0:9b334a45a8ff | 247 | { |
bogdanm | 0:9b334a45a8ff | 248 | /* Check the frame length (For the Prescaler computing) *******************/ |
bogdanm | 0:9b334a45a8ff | 249 | if(hi2s->Init.DataFormat == I2S_DATAFORMAT_16B) |
bogdanm | 0:9b334a45a8ff | 250 | { |
bogdanm | 0:9b334a45a8ff | 251 | /* Packet length is 16 bits */ |
bogdanm | 0:9b334a45a8ff | 252 | packetlength = 1; |
bogdanm | 0:9b334a45a8ff | 253 | } |
bogdanm | 0:9b334a45a8ff | 254 | else |
bogdanm | 0:9b334a45a8ff | 255 | { |
bogdanm | 0:9b334a45a8ff | 256 | /* Packet length is 32 bits */ |
bogdanm | 0:9b334a45a8ff | 257 | packetlength = 2; |
bogdanm | 0:9b334a45a8ff | 258 | } |
bogdanm | 0:9b334a45a8ff | 259 | |
bogdanm | 0:9b334a45a8ff | 260 | /* Get the source clock value: based on System Clock value */ |
bogdanm | 0:9b334a45a8ff | 261 | i2sclk = HAL_RCC_GetSysClockFreq(); |
bogdanm | 0:9b334a45a8ff | 262 | |
bogdanm | 0:9b334a45a8ff | 263 | /* Compute the Real divider depending on the MCLK output state, with a floating point */ |
bogdanm | 0:9b334a45a8ff | 264 | if(hi2s->Init.MCLKOutput == I2S_MCLKOUTPUT_ENABLE) |
bogdanm | 0:9b334a45a8ff | 265 | { |
bogdanm | 0:9b334a45a8ff | 266 | /* MCLK output is enabled */ |
bogdanm | 0:9b334a45a8ff | 267 | tmp = (uint32_t)(((((i2sclk / 256) * 10) / hi2s->Init.AudioFreq)) + 5); |
bogdanm | 0:9b334a45a8ff | 268 | } |
bogdanm | 0:9b334a45a8ff | 269 | else |
bogdanm | 0:9b334a45a8ff | 270 | { |
bogdanm | 0:9b334a45a8ff | 271 | /* MCLK output is disabled */ |
bogdanm | 0:9b334a45a8ff | 272 | tmp = (uint32_t)(((((i2sclk / (32 * packetlength)) *10 ) / hi2s->Init.AudioFreq)) + 5); |
bogdanm | 0:9b334a45a8ff | 273 | } |
bogdanm | 0:9b334a45a8ff | 274 | |
bogdanm | 0:9b334a45a8ff | 275 | /* Remove the flatting point */ |
bogdanm | 0:9b334a45a8ff | 276 | tmp = tmp / 10; |
bogdanm | 0:9b334a45a8ff | 277 | |
bogdanm | 0:9b334a45a8ff | 278 | /* Check the parity of the divider */ |
bogdanm | 0:9b334a45a8ff | 279 | i2sodd = (uint32_t)(tmp & (uint32_t)1); |
bogdanm | 0:9b334a45a8ff | 280 | |
bogdanm | 0:9b334a45a8ff | 281 | /* Compute the i2sdiv prescaler */ |
bogdanm | 0:9b334a45a8ff | 282 | i2sdiv = (uint32_t)((tmp - i2sodd) / 2); |
bogdanm | 0:9b334a45a8ff | 283 | |
bogdanm | 0:9b334a45a8ff | 284 | /* Get the Mask for the Odd bit (SPI_I2SPR[8]) register */ |
bogdanm | 0:9b334a45a8ff | 285 | i2sodd = (uint32_t) (i2sodd << 8); |
bogdanm | 0:9b334a45a8ff | 286 | } |
bogdanm | 0:9b334a45a8ff | 287 | |
bogdanm | 0:9b334a45a8ff | 288 | /* Test if the divider is 1 or 0 or greater than 0xFF */ |
bogdanm | 0:9b334a45a8ff | 289 | if((i2sdiv < 2) || (i2sdiv > 0xFF)) |
bogdanm | 0:9b334a45a8ff | 290 | { |
bogdanm | 0:9b334a45a8ff | 291 | /* Set the default values */ |
bogdanm | 0:9b334a45a8ff | 292 | i2sdiv = 2; |
bogdanm | 0:9b334a45a8ff | 293 | i2sodd = 0; |
bogdanm | 0:9b334a45a8ff | 294 | } |
bogdanm | 0:9b334a45a8ff | 295 | |
bogdanm | 0:9b334a45a8ff | 296 | /*----------------------- SPIx I2SCFGR & I2SPR Configuration ----------------*/ |
bogdanm | 0:9b334a45a8ff | 297 | /* Clear I2SMOD, I2SE, I2SCFG, PCMSYNC, I2SSTD, CKPOL, DATLEN and CHLEN bits */ |
bogdanm | 0:9b334a45a8ff | 298 | /* And configure the I2S with the I2S_InitStruct values */ |
bogdanm | 0:9b334a45a8ff | 299 | MODIFY_REG( hi2s->Instance->I2SCFGR, (SPI_I2SCFGR_CHLEN | SPI_I2SCFGR_DATLEN |\ |
bogdanm | 0:9b334a45a8ff | 300 | SPI_I2SCFGR_CKPOL | SPI_I2SCFGR_I2SSTD |\ |
bogdanm | 0:9b334a45a8ff | 301 | SPI_I2SCFGR_PCMSYNC | SPI_I2SCFGR_I2SCFG |\ |
bogdanm | 0:9b334a45a8ff | 302 | SPI_I2SCFGR_I2SE | SPI_I2SCFGR_I2SMOD),\ |
bogdanm | 0:9b334a45a8ff | 303 | (SPI_I2SCFGR_I2SMOD | hi2s->Init.Mode |\ |
bogdanm | 0:9b334a45a8ff | 304 | hi2s->Init.Standard | hi2s->Init.DataFormat |\ |
bogdanm | 0:9b334a45a8ff | 305 | hi2s->Init.CPOL)); |
bogdanm | 0:9b334a45a8ff | 306 | |
bogdanm | 0:9b334a45a8ff | 307 | /* Write to SPIx I2SPR register the computed value */ |
bogdanm | 0:9b334a45a8ff | 308 | hi2s->Instance->I2SPR = (uint32_t)((uint32_t)i2sdiv | (uint32_t)(i2sodd | (uint32_t)hi2s->Init.MCLKOutput)); |
bogdanm | 0:9b334a45a8ff | 309 | |
bogdanm | 0:9b334a45a8ff | 310 | hi2s->ErrorCode = HAL_I2S_ERROR_NONE; |
bogdanm | 0:9b334a45a8ff | 311 | hi2s->State= HAL_I2S_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 312 | |
bogdanm | 0:9b334a45a8ff | 313 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 314 | } |
bogdanm | 0:9b334a45a8ff | 315 | |
bogdanm | 0:9b334a45a8ff | 316 | /** |
bogdanm | 0:9b334a45a8ff | 317 | * @brief DeInitializes the I2S peripheral |
bogdanm | 0:9b334a45a8ff | 318 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 319 | * the configuration information for I2S module |
bogdanm | 0:9b334a45a8ff | 320 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 321 | */ |
bogdanm | 0:9b334a45a8ff | 322 | HAL_StatusTypeDef HAL_I2S_DeInit(I2S_HandleTypeDef *hi2s) |
bogdanm | 0:9b334a45a8ff | 323 | { |
bogdanm | 0:9b334a45a8ff | 324 | /* Check the I2S handle allocation */ |
bogdanm | 0:9b334a45a8ff | 325 | if(hi2s == HAL_NULL) |
bogdanm | 0:9b334a45a8ff | 326 | { |
bogdanm | 0:9b334a45a8ff | 327 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 328 | } |
bogdanm | 0:9b334a45a8ff | 329 | |
bogdanm | 0:9b334a45a8ff | 330 | hi2s->State = HAL_I2S_STATE_BUSY; |
bogdanm | 0:9b334a45a8ff | 331 | |
bogdanm | 0:9b334a45a8ff | 332 | /* Disable the I2S Peripheral Clock */ |
bogdanm | 0:9b334a45a8ff | 333 | __HAL_I2S_DISABLE(hi2s); |
bogdanm | 0:9b334a45a8ff | 334 | |
bogdanm | 0:9b334a45a8ff | 335 | /* DeInit the low level hardware: GPIO, CLOCK, NVIC... */ |
bogdanm | 0:9b334a45a8ff | 336 | HAL_I2S_MspDeInit(hi2s); |
bogdanm | 0:9b334a45a8ff | 337 | |
bogdanm | 0:9b334a45a8ff | 338 | hi2s->ErrorCode = HAL_I2S_ERROR_NONE; |
bogdanm | 0:9b334a45a8ff | 339 | hi2s->State = HAL_I2S_STATE_RESET; |
bogdanm | 0:9b334a45a8ff | 340 | |
bogdanm | 0:9b334a45a8ff | 341 | /* Release Lock */ |
bogdanm | 0:9b334a45a8ff | 342 | __HAL_UNLOCK(hi2s); |
bogdanm | 0:9b334a45a8ff | 343 | |
bogdanm | 0:9b334a45a8ff | 344 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 345 | } |
bogdanm | 0:9b334a45a8ff | 346 | |
bogdanm | 0:9b334a45a8ff | 347 | /** |
bogdanm | 0:9b334a45a8ff | 348 | * @brief I2S MSP Init |
bogdanm | 0:9b334a45a8ff | 349 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 350 | * the configuration information for I2S module |
bogdanm | 0:9b334a45a8ff | 351 | * @retval None |
bogdanm | 0:9b334a45a8ff | 352 | */ |
bogdanm | 0:9b334a45a8ff | 353 | __weak void HAL_I2S_MspInit(I2S_HandleTypeDef *hi2s) |
bogdanm | 0:9b334a45a8ff | 354 | { |
bogdanm | 0:9b334a45a8ff | 355 | /* NOTE : This function Should not be modified, when the callback is needed, |
bogdanm | 0:9b334a45a8ff | 356 | the HAL_I2S_MspInit could be implemented in the user file |
bogdanm | 0:9b334a45a8ff | 357 | */ |
bogdanm | 0:9b334a45a8ff | 358 | } |
bogdanm | 0:9b334a45a8ff | 359 | |
bogdanm | 0:9b334a45a8ff | 360 | /** |
bogdanm | 0:9b334a45a8ff | 361 | * @brief I2S MSP DeInit |
bogdanm | 0:9b334a45a8ff | 362 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 363 | * the configuration information for I2S module |
bogdanm | 0:9b334a45a8ff | 364 | * @retval None |
bogdanm | 0:9b334a45a8ff | 365 | */ |
bogdanm | 0:9b334a45a8ff | 366 | __weak void HAL_I2S_MspDeInit(I2S_HandleTypeDef *hi2s) |
bogdanm | 0:9b334a45a8ff | 367 | { |
bogdanm | 0:9b334a45a8ff | 368 | /* NOTE : This function Should not be modified, when the callback is needed, |
bogdanm | 0:9b334a45a8ff | 369 | the HAL_I2S_MspDeInit could be implemented in the user file |
bogdanm | 0:9b334a45a8ff | 370 | */ |
bogdanm | 0:9b334a45a8ff | 371 | } |
bogdanm | 0:9b334a45a8ff | 372 | |
bogdanm | 0:9b334a45a8ff | 373 | /** |
bogdanm | 0:9b334a45a8ff | 374 | * @} |
bogdanm | 0:9b334a45a8ff | 375 | */ |
bogdanm | 0:9b334a45a8ff | 376 | |
bogdanm | 0:9b334a45a8ff | 377 | /** @defgroup I2S_Exported_Functions_Group2 IO operation functions |
bogdanm | 0:9b334a45a8ff | 378 | * @brief Data transfers functions |
bogdanm | 0:9b334a45a8ff | 379 | * |
bogdanm | 0:9b334a45a8ff | 380 | @verbatim |
bogdanm | 0:9b334a45a8ff | 381 | =============================================================================== |
bogdanm | 0:9b334a45a8ff | 382 | ##### IO operation functions ##### |
bogdanm | 0:9b334a45a8ff | 383 | =============================================================================== |
bogdanm | 0:9b334a45a8ff | 384 | [..] |
bogdanm | 0:9b334a45a8ff | 385 | This subsection provides a set of functions allowing to manage the I2S data |
bogdanm | 0:9b334a45a8ff | 386 | transfers. |
bogdanm | 0:9b334a45a8ff | 387 | |
bogdanm | 0:9b334a45a8ff | 388 | (#) There are two modes of transfer: |
bogdanm | 0:9b334a45a8ff | 389 | (++) Blocking mode : The communication is performed in the polling mode. |
bogdanm | 0:9b334a45a8ff | 390 | The status of all data processing is returned by the same function |
bogdanm | 0:9b334a45a8ff | 391 | after finishing transfer. |
bogdanm | 0:9b334a45a8ff | 392 | (++) No-Blocking mode : The communication is performed using Interrupts |
bogdanm | 0:9b334a45a8ff | 393 | or DMA. These functions return the status of the transfer startup. |
bogdanm | 0:9b334a45a8ff | 394 | The end of the data processing will be indicated through the |
bogdanm | 0:9b334a45a8ff | 395 | dedicated I2S IRQ when using Interrupt mode or the DMA IRQ when |
bogdanm | 0:9b334a45a8ff | 396 | using DMA mode. |
bogdanm | 0:9b334a45a8ff | 397 | |
bogdanm | 0:9b334a45a8ff | 398 | (#) Blocking mode functions are : |
bogdanm | 0:9b334a45a8ff | 399 | (++) HAL_I2S_Transmit() |
bogdanm | 0:9b334a45a8ff | 400 | (++) HAL_I2S_Receive() |
bogdanm | 0:9b334a45a8ff | 401 | |
bogdanm | 0:9b334a45a8ff | 402 | (#) No-Blocking mode functions with Interrupt are : |
bogdanm | 0:9b334a45a8ff | 403 | (++) HAL_I2S_Transmit_IT() |
bogdanm | 0:9b334a45a8ff | 404 | (++) HAL_I2S_Receive_IT() |
bogdanm | 0:9b334a45a8ff | 405 | |
bogdanm | 0:9b334a45a8ff | 406 | (#) No-Blocking mode functions with DMA are : |
bogdanm | 0:9b334a45a8ff | 407 | (++) HAL_I2S_Transmit_DMA() |
bogdanm | 0:9b334a45a8ff | 408 | (++) HAL_I2S_Receive_DMA() |
bogdanm | 0:9b334a45a8ff | 409 | |
bogdanm | 0:9b334a45a8ff | 410 | (#) A set of Transfer Complete Callbacks are provided in non Blocking mode: |
bogdanm | 0:9b334a45a8ff | 411 | (++) HAL_I2S_TxCpltCallback() |
bogdanm | 0:9b334a45a8ff | 412 | (++) HAL_I2S_RxCpltCallback() |
bogdanm | 0:9b334a45a8ff | 413 | (++) HAL_I2S_ErrorCallback() |
bogdanm | 0:9b334a45a8ff | 414 | |
bogdanm | 0:9b334a45a8ff | 415 | @endverbatim |
bogdanm | 0:9b334a45a8ff | 416 | * @{ |
bogdanm | 0:9b334a45a8ff | 417 | */ |
bogdanm | 0:9b334a45a8ff | 418 | |
bogdanm | 0:9b334a45a8ff | 419 | /** |
bogdanm | 0:9b334a45a8ff | 420 | * @brief Transmit an amount of data in blocking mode |
bogdanm | 0:9b334a45a8ff | 421 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 422 | * the configuration information for I2S module |
bogdanm | 0:9b334a45a8ff | 423 | * @param pData: a 16-bit pointer to data buffer. |
bogdanm | 0:9b334a45a8ff | 424 | * @param Size: number of data sample to be sent: |
bogdanm | 0:9b334a45a8ff | 425 | * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S |
bogdanm | 0:9b334a45a8ff | 426 | * configuration phase, the Size parameter means the number of 16-bit data length |
bogdanm | 0:9b334a45a8ff | 427 | * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected |
bogdanm | 0:9b334a45a8ff | 428 | * the Size parameter means the number of 16-bit data length. |
bogdanm | 0:9b334a45a8ff | 429 | * @param Timeout: Timeout duration |
bogdanm | 0:9b334a45a8ff | 430 | * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization |
bogdanm | 0:9b334a45a8ff | 431 | * between Master and Slave(example: audio streaming). |
bogdanm | 0:9b334a45a8ff | 432 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 433 | */ |
bogdanm | 0:9b334a45a8ff | 434 | HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout) |
bogdanm | 0:9b334a45a8ff | 435 | { |
bogdanm | 0:9b334a45a8ff | 436 | if((pData == HAL_NULL ) || (Size == 0)) |
bogdanm | 0:9b334a45a8ff | 437 | { |
bogdanm | 0:9b334a45a8ff | 438 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 439 | } |
bogdanm | 0:9b334a45a8ff | 440 | |
bogdanm | 0:9b334a45a8ff | 441 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 442 | __HAL_LOCK(hi2s); |
bogdanm | 0:9b334a45a8ff | 443 | |
bogdanm | 0:9b334a45a8ff | 444 | if(hi2s->State == HAL_I2S_STATE_READY) |
bogdanm | 0:9b334a45a8ff | 445 | { |
bogdanm | 0:9b334a45a8ff | 446 | if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)||\ |
bogdanm | 0:9b334a45a8ff | 447 | ((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B)) |
bogdanm | 0:9b334a45a8ff | 448 | { |
bogdanm | 0:9b334a45a8ff | 449 | hi2s->TxXferSize = (Size << 1); |
bogdanm | 0:9b334a45a8ff | 450 | hi2s->TxXferCount = (Size << 1); |
bogdanm | 0:9b334a45a8ff | 451 | } |
bogdanm | 0:9b334a45a8ff | 452 | else |
bogdanm | 0:9b334a45a8ff | 453 | { |
bogdanm | 0:9b334a45a8ff | 454 | hi2s->TxXferSize = Size; |
bogdanm | 0:9b334a45a8ff | 455 | hi2s->TxXferCount = Size; |
bogdanm | 0:9b334a45a8ff | 456 | } |
bogdanm | 0:9b334a45a8ff | 457 | |
bogdanm | 0:9b334a45a8ff | 458 | /* Set state and reset error code */ |
bogdanm | 0:9b334a45a8ff | 459 | hi2s->ErrorCode = HAL_I2S_ERROR_NONE; |
bogdanm | 0:9b334a45a8ff | 460 | hi2s->State = HAL_I2S_STATE_BUSY_TX; |
bogdanm | 0:9b334a45a8ff | 461 | hi2s->pTxBuffPtr = pData; |
bogdanm | 0:9b334a45a8ff | 462 | |
bogdanm | 0:9b334a45a8ff | 463 | /* Check if the I2S is already enabled */ |
bogdanm | 0:9b334a45a8ff | 464 | if((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE) |
bogdanm | 0:9b334a45a8ff | 465 | { |
bogdanm | 0:9b334a45a8ff | 466 | /* Enable I2S peripheral */ |
bogdanm | 0:9b334a45a8ff | 467 | __HAL_I2S_ENABLE(hi2s); |
bogdanm | 0:9b334a45a8ff | 468 | } |
bogdanm | 0:9b334a45a8ff | 469 | |
bogdanm | 0:9b334a45a8ff | 470 | while(hi2s->TxXferCount > 0) |
bogdanm | 0:9b334a45a8ff | 471 | { |
bogdanm | 0:9b334a45a8ff | 472 | /* Wait until TXE flag is set */ |
bogdanm | 0:9b334a45a8ff | 473 | if (I2S_WaitFlagStateUntilTimeout(hi2s, I2S_FLAG_TXE, RESET, Timeout) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 474 | { |
bogdanm | 0:9b334a45a8ff | 475 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 476 | } |
bogdanm | 0:9b334a45a8ff | 477 | hi2s->Instance->DR = (*hi2s->pTxBuffPtr++); |
bogdanm | 0:9b334a45a8ff | 478 | hi2s->TxXferCount--; |
bogdanm | 0:9b334a45a8ff | 479 | } |
bogdanm | 0:9b334a45a8ff | 480 | |
bogdanm | 0:9b334a45a8ff | 481 | /* Wait until TXE flag is set, to confirm the end of the transcation */ |
bogdanm | 0:9b334a45a8ff | 482 | if (I2S_WaitFlagStateUntilTimeout(hi2s, I2S_FLAG_TXE, RESET, Timeout) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 483 | { |
bogdanm | 0:9b334a45a8ff | 484 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 485 | } |
bogdanm | 0:9b334a45a8ff | 486 | /* Wait until Busy flag is reset */ |
bogdanm | 0:9b334a45a8ff | 487 | if (I2S_WaitFlagStateUntilTimeout(hi2s, I2S_FLAG_BSY, SET, Timeout) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 488 | { |
bogdanm | 0:9b334a45a8ff | 489 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 490 | } |
bogdanm | 0:9b334a45a8ff | 491 | |
bogdanm | 0:9b334a45a8ff | 492 | hi2s->State = HAL_I2S_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 493 | |
bogdanm | 0:9b334a45a8ff | 494 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 495 | __HAL_UNLOCK(hi2s); |
bogdanm | 0:9b334a45a8ff | 496 | |
bogdanm | 0:9b334a45a8ff | 497 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 498 | } |
bogdanm | 0:9b334a45a8ff | 499 | else |
bogdanm | 0:9b334a45a8ff | 500 | { |
bogdanm | 0:9b334a45a8ff | 501 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 502 | __HAL_UNLOCK(hi2s); |
bogdanm | 0:9b334a45a8ff | 503 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 504 | } |
bogdanm | 0:9b334a45a8ff | 505 | } |
bogdanm | 0:9b334a45a8ff | 506 | |
bogdanm | 0:9b334a45a8ff | 507 | /** |
bogdanm | 0:9b334a45a8ff | 508 | * @brief Receive an amount of data in blocking mode |
bogdanm | 0:9b334a45a8ff | 509 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 510 | * the configuration information for I2S module |
bogdanm | 0:9b334a45a8ff | 511 | * @param pData: a 16-bit pointer to data buffer. |
bogdanm | 0:9b334a45a8ff | 512 | * @param Size: number of data sample to be sent: |
bogdanm | 0:9b334a45a8ff | 513 | * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S |
bogdanm | 0:9b334a45a8ff | 514 | * configuration phase, the Size parameter means the number of 16-bit data length |
bogdanm | 0:9b334a45a8ff | 515 | * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected |
bogdanm | 0:9b334a45a8ff | 516 | * the Size parameter means the number of 16-bit data length. |
bogdanm | 0:9b334a45a8ff | 517 | * @param Timeout: Timeout duration |
bogdanm | 0:9b334a45a8ff | 518 | * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization |
bogdanm | 0:9b334a45a8ff | 519 | * between Master and Slave(example: audio streaming). |
bogdanm | 0:9b334a45a8ff | 520 | * @note In I2S Master Receiver mode, just after enabling the peripheral the clock will be generate |
bogdanm | 0:9b334a45a8ff | 521 | * in continouse way and as the I2S is not disabled at the end of the I2S transaction. |
bogdanm | 0:9b334a45a8ff | 522 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 523 | */ |
bogdanm | 0:9b334a45a8ff | 524 | HAL_StatusTypeDef HAL_I2S_Receive(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout) |
bogdanm | 0:9b334a45a8ff | 525 | { |
bogdanm | 0:9b334a45a8ff | 526 | if((pData == HAL_NULL ) || (Size == 0)) |
bogdanm | 0:9b334a45a8ff | 527 | { |
bogdanm | 0:9b334a45a8ff | 528 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 529 | } |
bogdanm | 0:9b334a45a8ff | 530 | |
bogdanm | 0:9b334a45a8ff | 531 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 532 | __HAL_LOCK(hi2s); |
bogdanm | 0:9b334a45a8ff | 533 | |
bogdanm | 0:9b334a45a8ff | 534 | if(hi2s->State == HAL_I2S_STATE_READY) |
bogdanm | 0:9b334a45a8ff | 535 | { |
bogdanm | 0:9b334a45a8ff | 536 | if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)||\ |
bogdanm | 0:9b334a45a8ff | 537 | ((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B)) |
bogdanm | 0:9b334a45a8ff | 538 | { |
bogdanm | 0:9b334a45a8ff | 539 | hi2s->RxXferSize = (Size << 1); |
bogdanm | 0:9b334a45a8ff | 540 | hi2s->RxXferCount = (Size << 1); |
bogdanm | 0:9b334a45a8ff | 541 | } |
bogdanm | 0:9b334a45a8ff | 542 | else |
bogdanm | 0:9b334a45a8ff | 543 | { |
bogdanm | 0:9b334a45a8ff | 544 | hi2s->RxXferSize = Size; |
bogdanm | 0:9b334a45a8ff | 545 | hi2s->RxXferCount = Size; |
bogdanm | 0:9b334a45a8ff | 546 | } |
bogdanm | 0:9b334a45a8ff | 547 | |
bogdanm | 0:9b334a45a8ff | 548 | /* Set state and reset error code */ |
bogdanm | 0:9b334a45a8ff | 549 | hi2s->ErrorCode = HAL_I2S_ERROR_NONE; |
bogdanm | 0:9b334a45a8ff | 550 | hi2s->State = HAL_I2S_STATE_BUSY_RX; |
bogdanm | 0:9b334a45a8ff | 551 | hi2s->pRxBuffPtr = pData; |
bogdanm | 0:9b334a45a8ff | 552 | |
bogdanm | 0:9b334a45a8ff | 553 | /* Check if the I2S is already enabled */ |
bogdanm | 0:9b334a45a8ff | 554 | if((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE) |
bogdanm | 0:9b334a45a8ff | 555 | { |
bogdanm | 0:9b334a45a8ff | 556 | /* Enable I2S peripheral */ |
bogdanm | 0:9b334a45a8ff | 557 | __HAL_I2S_ENABLE(hi2s); |
bogdanm | 0:9b334a45a8ff | 558 | } |
bogdanm | 0:9b334a45a8ff | 559 | |
bogdanm | 0:9b334a45a8ff | 560 | /* Receive data */ |
bogdanm | 0:9b334a45a8ff | 561 | while(hi2s->RxXferCount > 0) |
bogdanm | 0:9b334a45a8ff | 562 | { |
bogdanm | 0:9b334a45a8ff | 563 | /* Wait until RXNE flag is set */ |
bogdanm | 0:9b334a45a8ff | 564 | if (I2S_WaitFlagStateUntilTimeout(hi2s, I2S_FLAG_RXNE, RESET, Timeout) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 565 | { |
bogdanm | 0:9b334a45a8ff | 566 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 567 | } |
bogdanm | 0:9b334a45a8ff | 568 | |
bogdanm | 0:9b334a45a8ff | 569 | (*hi2s->pRxBuffPtr++) = hi2s->Instance->DR; |
bogdanm | 0:9b334a45a8ff | 570 | hi2s->RxXferCount--; |
bogdanm | 0:9b334a45a8ff | 571 | } |
bogdanm | 0:9b334a45a8ff | 572 | |
bogdanm | 0:9b334a45a8ff | 573 | hi2s->State = HAL_I2S_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 574 | |
bogdanm | 0:9b334a45a8ff | 575 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 576 | __HAL_UNLOCK(hi2s); |
bogdanm | 0:9b334a45a8ff | 577 | |
bogdanm | 0:9b334a45a8ff | 578 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 579 | } |
bogdanm | 0:9b334a45a8ff | 580 | else |
bogdanm | 0:9b334a45a8ff | 581 | { |
bogdanm | 0:9b334a45a8ff | 582 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 583 | __HAL_UNLOCK(hi2s); |
bogdanm | 0:9b334a45a8ff | 584 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 585 | } |
bogdanm | 0:9b334a45a8ff | 586 | } |
bogdanm | 0:9b334a45a8ff | 587 | |
bogdanm | 0:9b334a45a8ff | 588 | /** |
bogdanm | 0:9b334a45a8ff | 589 | * @brief Transmit an amount of data in non-blocking mode with Interrupt |
bogdanm | 0:9b334a45a8ff | 590 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 591 | * the configuration information for I2S module |
bogdanm | 0:9b334a45a8ff | 592 | * @param pData: a 16-bit pointer to data buffer. |
bogdanm | 0:9b334a45a8ff | 593 | * @param Size: number of data sample to be sent: |
bogdanm | 0:9b334a45a8ff | 594 | * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S |
bogdanm | 0:9b334a45a8ff | 595 | * configuration phase, the Size parameter means the number of 16-bit data length |
bogdanm | 0:9b334a45a8ff | 596 | * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected |
bogdanm | 0:9b334a45a8ff | 597 | * the Size parameter means the number of 16-bit data length. |
bogdanm | 0:9b334a45a8ff | 598 | * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization |
bogdanm | 0:9b334a45a8ff | 599 | * between Master and Slave(example: audio streaming). |
bogdanm | 0:9b334a45a8ff | 600 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 601 | */ |
bogdanm | 0:9b334a45a8ff | 602 | HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size) |
bogdanm | 0:9b334a45a8ff | 603 | { |
bogdanm | 0:9b334a45a8ff | 604 | if((pData == HAL_NULL) || (Size == 0)) |
bogdanm | 0:9b334a45a8ff | 605 | { |
bogdanm | 0:9b334a45a8ff | 606 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 607 | } |
bogdanm | 0:9b334a45a8ff | 608 | |
bogdanm | 0:9b334a45a8ff | 609 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 610 | __HAL_LOCK(hi2s); |
bogdanm | 0:9b334a45a8ff | 611 | |
bogdanm | 0:9b334a45a8ff | 612 | if(hi2s->State == HAL_I2S_STATE_READY) |
bogdanm | 0:9b334a45a8ff | 613 | { |
bogdanm | 0:9b334a45a8ff | 614 | hi2s->pTxBuffPtr = pData; |
bogdanm | 0:9b334a45a8ff | 615 | hi2s->State = HAL_I2S_STATE_BUSY_TX; |
bogdanm | 0:9b334a45a8ff | 616 | hi2s->ErrorCode = HAL_I2S_ERROR_NONE; |
bogdanm | 0:9b334a45a8ff | 617 | |
bogdanm | 0:9b334a45a8ff | 618 | if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)||\ |
bogdanm | 0:9b334a45a8ff | 619 | ((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B)) |
bogdanm | 0:9b334a45a8ff | 620 | { |
bogdanm | 0:9b334a45a8ff | 621 | hi2s->TxXferSize = (Size << 1); |
bogdanm | 0:9b334a45a8ff | 622 | hi2s->TxXferCount = (Size << 1); |
bogdanm | 0:9b334a45a8ff | 623 | } |
bogdanm | 0:9b334a45a8ff | 624 | else |
bogdanm | 0:9b334a45a8ff | 625 | { |
bogdanm | 0:9b334a45a8ff | 626 | hi2s->TxXferSize = Size; |
bogdanm | 0:9b334a45a8ff | 627 | hi2s->TxXferCount = Size; |
bogdanm | 0:9b334a45a8ff | 628 | } |
bogdanm | 0:9b334a45a8ff | 629 | |
bogdanm | 0:9b334a45a8ff | 630 | /* Enable TXE and ERR interrupt */ |
bogdanm | 0:9b334a45a8ff | 631 | __HAL_I2S_ENABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR)); |
bogdanm | 0:9b334a45a8ff | 632 | |
bogdanm | 0:9b334a45a8ff | 633 | /* Check if the I2S is already enabled */ |
bogdanm | 0:9b334a45a8ff | 634 | if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE) |
bogdanm | 0:9b334a45a8ff | 635 | { |
bogdanm | 0:9b334a45a8ff | 636 | /* Enable I2S peripheral */ |
bogdanm | 0:9b334a45a8ff | 637 | __HAL_I2S_ENABLE(hi2s); |
bogdanm | 0:9b334a45a8ff | 638 | } |
bogdanm | 0:9b334a45a8ff | 639 | |
bogdanm | 0:9b334a45a8ff | 640 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 641 | __HAL_UNLOCK(hi2s); |
bogdanm | 0:9b334a45a8ff | 642 | |
bogdanm | 0:9b334a45a8ff | 643 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 644 | } |
bogdanm | 0:9b334a45a8ff | 645 | else |
bogdanm | 0:9b334a45a8ff | 646 | { |
bogdanm | 0:9b334a45a8ff | 647 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 648 | __HAL_UNLOCK(hi2s); |
bogdanm | 0:9b334a45a8ff | 649 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 650 | } |
bogdanm | 0:9b334a45a8ff | 651 | } |
bogdanm | 0:9b334a45a8ff | 652 | |
bogdanm | 0:9b334a45a8ff | 653 | /** |
bogdanm | 0:9b334a45a8ff | 654 | * @brief Receive an amount of data in non-blocking mode with Interrupt |
bogdanm | 0:9b334a45a8ff | 655 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 656 | * the configuration information for I2S module |
bogdanm | 0:9b334a45a8ff | 657 | * @param pData: a 16-bit pointer to the Receive data buffer. |
bogdanm | 0:9b334a45a8ff | 658 | * @param Size: number of data sample to be sent: |
bogdanm | 0:9b334a45a8ff | 659 | * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S |
bogdanm | 0:9b334a45a8ff | 660 | * configuration phase, the Size parameter means the number of 16-bit data length |
bogdanm | 0:9b334a45a8ff | 661 | * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected |
bogdanm | 0:9b334a45a8ff | 662 | * the Size parameter means the number of 16-bit data length. |
bogdanm | 0:9b334a45a8ff | 663 | * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization |
bogdanm | 0:9b334a45a8ff | 664 | * between Master and Slave(example: audio streaming). |
bogdanm | 0:9b334a45a8ff | 665 | * @note It is recommended to use DMA for the I2S receiver to avoid de-synchronisation |
bogdanm | 0:9b334a45a8ff | 666 | * between Master and Slave otherwise the I2S interrupt should be optimized. |
bogdanm | 0:9b334a45a8ff | 667 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 668 | */ |
bogdanm | 0:9b334a45a8ff | 669 | HAL_StatusTypeDef HAL_I2S_Receive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size) |
bogdanm | 0:9b334a45a8ff | 670 | { |
bogdanm | 0:9b334a45a8ff | 671 | if((pData == HAL_NULL) || (Size == 0)) |
bogdanm | 0:9b334a45a8ff | 672 | { |
bogdanm | 0:9b334a45a8ff | 673 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 674 | } |
bogdanm | 0:9b334a45a8ff | 675 | |
bogdanm | 0:9b334a45a8ff | 676 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 677 | __HAL_LOCK(hi2s); |
bogdanm | 0:9b334a45a8ff | 678 | |
bogdanm | 0:9b334a45a8ff | 679 | if(hi2s->State == HAL_I2S_STATE_READY) |
bogdanm | 0:9b334a45a8ff | 680 | { |
bogdanm | 0:9b334a45a8ff | 681 | hi2s->pRxBuffPtr = pData; |
bogdanm | 0:9b334a45a8ff | 682 | hi2s->State = HAL_I2S_STATE_BUSY_RX; |
bogdanm | 0:9b334a45a8ff | 683 | hi2s->ErrorCode = HAL_I2S_ERROR_NONE; |
bogdanm | 0:9b334a45a8ff | 684 | |
bogdanm | 0:9b334a45a8ff | 685 | if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)||\ |
bogdanm | 0:9b334a45a8ff | 686 | ((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B)) |
bogdanm | 0:9b334a45a8ff | 687 | { |
bogdanm | 0:9b334a45a8ff | 688 | hi2s->RxXferSize = (Size << 1); |
bogdanm | 0:9b334a45a8ff | 689 | hi2s->RxXferCount = (Size << 1); |
bogdanm | 0:9b334a45a8ff | 690 | } |
bogdanm | 0:9b334a45a8ff | 691 | else |
bogdanm | 0:9b334a45a8ff | 692 | { |
bogdanm | 0:9b334a45a8ff | 693 | hi2s->RxXferSize = Size; |
bogdanm | 0:9b334a45a8ff | 694 | hi2s->RxXferCount = Size; |
bogdanm | 0:9b334a45a8ff | 695 | } |
bogdanm | 0:9b334a45a8ff | 696 | |
bogdanm | 0:9b334a45a8ff | 697 | /* Enable TXE and ERR interrupt */ |
bogdanm | 0:9b334a45a8ff | 698 | __HAL_I2S_ENABLE_IT(hi2s, (I2S_IT_RXNE | I2S_IT_ERR)); |
bogdanm | 0:9b334a45a8ff | 699 | |
bogdanm | 0:9b334a45a8ff | 700 | /* Check if the I2S is already enabled */ |
bogdanm | 0:9b334a45a8ff | 701 | if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE) |
bogdanm | 0:9b334a45a8ff | 702 | { |
bogdanm | 0:9b334a45a8ff | 703 | /* Enable I2S peripheral */ |
bogdanm | 0:9b334a45a8ff | 704 | __HAL_I2S_ENABLE(hi2s); |
bogdanm | 0:9b334a45a8ff | 705 | } |
bogdanm | 0:9b334a45a8ff | 706 | |
bogdanm | 0:9b334a45a8ff | 707 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 708 | __HAL_UNLOCK(hi2s); |
bogdanm | 0:9b334a45a8ff | 709 | |
bogdanm | 0:9b334a45a8ff | 710 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 711 | } |
bogdanm | 0:9b334a45a8ff | 712 | else |
bogdanm | 0:9b334a45a8ff | 713 | { |
bogdanm | 0:9b334a45a8ff | 714 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 715 | __HAL_UNLOCK(hi2s); |
bogdanm | 0:9b334a45a8ff | 716 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 717 | } |
bogdanm | 0:9b334a45a8ff | 718 | } |
bogdanm | 0:9b334a45a8ff | 719 | |
bogdanm | 0:9b334a45a8ff | 720 | /** |
bogdanm | 0:9b334a45a8ff | 721 | * @brief Transmit an amount of data in non-blocking mode with DMA |
bogdanm | 0:9b334a45a8ff | 722 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 723 | * the configuration information for I2S module |
bogdanm | 0:9b334a45a8ff | 724 | * @param pData: a 16-bit pointer to the Transmit data buffer. |
bogdanm | 0:9b334a45a8ff | 725 | * @param Size: number of data sample to be sent: |
bogdanm | 0:9b334a45a8ff | 726 | * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S |
bogdanm | 0:9b334a45a8ff | 727 | * configuration phase, the Size parameter means the number of 16-bit data length |
bogdanm | 0:9b334a45a8ff | 728 | * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected |
bogdanm | 0:9b334a45a8ff | 729 | * the Size parameter means the number of 16-bit data length. |
bogdanm | 0:9b334a45a8ff | 730 | * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization |
bogdanm | 0:9b334a45a8ff | 731 | * between Master and Slave(example: audio streaming). |
bogdanm | 0:9b334a45a8ff | 732 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 733 | */ |
bogdanm | 0:9b334a45a8ff | 734 | HAL_StatusTypeDef HAL_I2S_Transmit_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size) |
bogdanm | 0:9b334a45a8ff | 735 | { |
bogdanm | 0:9b334a45a8ff | 736 | if((pData == HAL_NULL) || (Size == 0)) |
bogdanm | 0:9b334a45a8ff | 737 | { |
bogdanm | 0:9b334a45a8ff | 738 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 739 | } |
bogdanm | 0:9b334a45a8ff | 740 | |
bogdanm | 0:9b334a45a8ff | 741 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 742 | __HAL_LOCK(hi2s); |
bogdanm | 0:9b334a45a8ff | 743 | |
bogdanm | 0:9b334a45a8ff | 744 | if(hi2s->State == HAL_I2S_STATE_READY) |
bogdanm | 0:9b334a45a8ff | 745 | { |
bogdanm | 0:9b334a45a8ff | 746 | hi2s->pTxBuffPtr = pData; |
bogdanm | 0:9b334a45a8ff | 747 | hi2s->State = HAL_I2S_STATE_BUSY_TX; |
bogdanm | 0:9b334a45a8ff | 748 | hi2s->ErrorCode = HAL_I2S_ERROR_NONE; |
bogdanm | 0:9b334a45a8ff | 749 | |
bogdanm | 0:9b334a45a8ff | 750 | if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)||\ |
bogdanm | 0:9b334a45a8ff | 751 | ((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B)) |
bogdanm | 0:9b334a45a8ff | 752 | { |
bogdanm | 0:9b334a45a8ff | 753 | hi2s->TxXferSize = (Size << 1); |
bogdanm | 0:9b334a45a8ff | 754 | hi2s->TxXferCount = (Size << 1); |
bogdanm | 0:9b334a45a8ff | 755 | } |
bogdanm | 0:9b334a45a8ff | 756 | else |
bogdanm | 0:9b334a45a8ff | 757 | { |
bogdanm | 0:9b334a45a8ff | 758 | hi2s->TxXferSize = Size; |
bogdanm | 0:9b334a45a8ff | 759 | hi2s->TxXferCount = Size; |
bogdanm | 0:9b334a45a8ff | 760 | } |
bogdanm | 0:9b334a45a8ff | 761 | |
bogdanm | 0:9b334a45a8ff | 762 | /* Set the I2S Tx DMA Half transfert complete callback */ |
bogdanm | 0:9b334a45a8ff | 763 | hi2s->hdmatx->XferHalfCpltCallback = I2S_DMATxHalfCplt; |
bogdanm | 0:9b334a45a8ff | 764 | |
bogdanm | 0:9b334a45a8ff | 765 | /* Set the I2S Tx DMA transfert complete callback */ |
bogdanm | 0:9b334a45a8ff | 766 | hi2s->hdmatx->XferCpltCallback = I2S_DMATxCplt; |
bogdanm | 0:9b334a45a8ff | 767 | |
bogdanm | 0:9b334a45a8ff | 768 | /* Set the DMA error callback */ |
bogdanm | 0:9b334a45a8ff | 769 | hi2s->hdmatx->XferErrorCallback = I2S_DMAError; |
bogdanm | 0:9b334a45a8ff | 770 | |
bogdanm | 0:9b334a45a8ff | 771 | /* Enable the Tx DMA Channel */ |
bogdanm | 0:9b334a45a8ff | 772 | HAL_DMA_Start_IT(hi2s->hdmatx, (uint32_t)hi2s->pTxBuffPtr, (uint32_t)&hi2s->Instance->DR, hi2s->TxXferSize); |
bogdanm | 0:9b334a45a8ff | 773 | |
bogdanm | 0:9b334a45a8ff | 774 | /* Check if the I2S is already enabled */ |
bogdanm | 0:9b334a45a8ff | 775 | if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE) |
bogdanm | 0:9b334a45a8ff | 776 | { |
bogdanm | 0:9b334a45a8ff | 777 | /* Enable I2S peripheral */ |
bogdanm | 0:9b334a45a8ff | 778 | __HAL_I2S_ENABLE(hi2s); |
bogdanm | 0:9b334a45a8ff | 779 | } |
bogdanm | 0:9b334a45a8ff | 780 | |
bogdanm | 0:9b334a45a8ff | 781 | /* Check if the I2S Tx request is already enabled */ |
bogdanm | 0:9b334a45a8ff | 782 | if((hi2s->Instance->CR2 & SPI_CR2_TXDMAEN) != SPI_CR2_TXDMAEN) |
bogdanm | 0:9b334a45a8ff | 783 | { |
bogdanm | 0:9b334a45a8ff | 784 | /* Enable Tx DMA Request */ |
bogdanm | 0:9b334a45a8ff | 785 | SET_BIT(hi2s->Instance->CR2, SPI_CR2_TXDMAEN); |
bogdanm | 0:9b334a45a8ff | 786 | } |
bogdanm | 0:9b334a45a8ff | 787 | |
bogdanm | 0:9b334a45a8ff | 788 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 789 | __HAL_UNLOCK(hi2s); |
bogdanm | 0:9b334a45a8ff | 790 | |
bogdanm | 0:9b334a45a8ff | 791 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 792 | } |
bogdanm | 0:9b334a45a8ff | 793 | else |
bogdanm | 0:9b334a45a8ff | 794 | { |
bogdanm | 0:9b334a45a8ff | 795 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 796 | __HAL_UNLOCK(hi2s); |
bogdanm | 0:9b334a45a8ff | 797 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 798 | } |
bogdanm | 0:9b334a45a8ff | 799 | } |
bogdanm | 0:9b334a45a8ff | 800 | |
bogdanm | 0:9b334a45a8ff | 801 | /** |
bogdanm | 0:9b334a45a8ff | 802 | * @brief Receive an amount of data in non-blocking mode with DMA |
bogdanm | 0:9b334a45a8ff | 803 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 804 | * the configuration information for I2S module |
bogdanm | 0:9b334a45a8ff | 805 | * @param pData: a 16-bit pointer to the Receive data buffer. |
bogdanm | 0:9b334a45a8ff | 806 | * @param Size: number of data sample to be sent: |
bogdanm | 0:9b334a45a8ff | 807 | * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S |
bogdanm | 0:9b334a45a8ff | 808 | * configuration phase, the Size parameter means the number of 16-bit data length |
bogdanm | 0:9b334a45a8ff | 809 | * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected |
bogdanm | 0:9b334a45a8ff | 810 | * the Size parameter means the number of 16-bit data length. |
bogdanm | 0:9b334a45a8ff | 811 | * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization |
bogdanm | 0:9b334a45a8ff | 812 | * between Master and Slave(example: audio streaming). |
bogdanm | 0:9b334a45a8ff | 813 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 814 | */ |
bogdanm | 0:9b334a45a8ff | 815 | HAL_StatusTypeDef HAL_I2S_Receive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size) |
bogdanm | 0:9b334a45a8ff | 816 | { |
bogdanm | 0:9b334a45a8ff | 817 | if((pData == HAL_NULL) || (Size == 0)) |
bogdanm | 0:9b334a45a8ff | 818 | { |
bogdanm | 0:9b334a45a8ff | 819 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 820 | } |
bogdanm | 0:9b334a45a8ff | 821 | |
bogdanm | 0:9b334a45a8ff | 822 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 823 | __HAL_LOCK(hi2s); |
bogdanm | 0:9b334a45a8ff | 824 | |
bogdanm | 0:9b334a45a8ff | 825 | if(hi2s->State == HAL_I2S_STATE_READY) |
bogdanm | 0:9b334a45a8ff | 826 | { |
bogdanm | 0:9b334a45a8ff | 827 | hi2s->pRxBuffPtr = pData; |
bogdanm | 0:9b334a45a8ff | 828 | hi2s->State = HAL_I2S_STATE_BUSY_RX; |
bogdanm | 0:9b334a45a8ff | 829 | hi2s->ErrorCode = HAL_I2S_ERROR_NONE; |
bogdanm | 0:9b334a45a8ff | 830 | |
bogdanm | 0:9b334a45a8ff | 831 | if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)||\ |
bogdanm | 0:9b334a45a8ff | 832 | ((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B)) |
bogdanm | 0:9b334a45a8ff | 833 | { |
bogdanm | 0:9b334a45a8ff | 834 | hi2s->RxXferSize = (Size << 1); |
bogdanm | 0:9b334a45a8ff | 835 | hi2s->RxXferCount = (Size << 1); |
bogdanm | 0:9b334a45a8ff | 836 | } |
bogdanm | 0:9b334a45a8ff | 837 | else |
bogdanm | 0:9b334a45a8ff | 838 | { |
bogdanm | 0:9b334a45a8ff | 839 | hi2s->RxXferSize = Size; |
bogdanm | 0:9b334a45a8ff | 840 | hi2s->RxXferCount = Size; |
bogdanm | 0:9b334a45a8ff | 841 | } |
bogdanm | 0:9b334a45a8ff | 842 | |
bogdanm | 0:9b334a45a8ff | 843 | |
bogdanm | 0:9b334a45a8ff | 844 | /* Set the I2S Rx DMA Half transfert complete callback */ |
bogdanm | 0:9b334a45a8ff | 845 | hi2s->hdmarx->XferHalfCpltCallback = I2S_DMARxHalfCplt; |
bogdanm | 0:9b334a45a8ff | 846 | |
bogdanm | 0:9b334a45a8ff | 847 | /* Set the I2S Rx DMA transfert complete callback */ |
bogdanm | 0:9b334a45a8ff | 848 | hi2s->hdmarx->XferCpltCallback = I2S_DMARxCplt; |
bogdanm | 0:9b334a45a8ff | 849 | |
bogdanm | 0:9b334a45a8ff | 850 | /* Set the DMA error callback */ |
bogdanm | 0:9b334a45a8ff | 851 | hi2s->hdmarx->XferErrorCallback = I2S_DMAError; |
bogdanm | 0:9b334a45a8ff | 852 | |
bogdanm | 0:9b334a45a8ff | 853 | /* Check if Master Receiver mode is selected */ |
bogdanm | 0:9b334a45a8ff | 854 | if((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG) == I2S_MODE_MASTER_RX) |
bogdanm | 0:9b334a45a8ff | 855 | { |
bogdanm | 0:9b334a45a8ff | 856 | /* Clear the Overrun Flag by a read operation to the SPI_DR register followed by a read |
bogdanm | 0:9b334a45a8ff | 857 | access to the SPI_SR register. */ |
bogdanm | 0:9b334a45a8ff | 858 | __HAL_I2S_CLEAR_OVRFLAG(hi2s); |
bogdanm | 0:9b334a45a8ff | 859 | } |
bogdanm | 0:9b334a45a8ff | 860 | |
bogdanm | 0:9b334a45a8ff | 861 | /* Enable the Rx DMA Channel */ |
bogdanm | 0:9b334a45a8ff | 862 | HAL_DMA_Start_IT(hi2s->hdmarx, (uint32_t)&hi2s->Instance->DR, (uint32_t)hi2s->pRxBuffPtr, hi2s->RxXferSize); |
bogdanm | 0:9b334a45a8ff | 863 | |
bogdanm | 0:9b334a45a8ff | 864 | /* Check if the I2S is already enabled */ |
bogdanm | 0:9b334a45a8ff | 865 | if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE) |
bogdanm | 0:9b334a45a8ff | 866 | { |
bogdanm | 0:9b334a45a8ff | 867 | /* Enable I2S peripheral */ |
bogdanm | 0:9b334a45a8ff | 868 | __HAL_I2S_ENABLE(hi2s); |
bogdanm | 0:9b334a45a8ff | 869 | } |
bogdanm | 0:9b334a45a8ff | 870 | |
bogdanm | 0:9b334a45a8ff | 871 | /* Check if the I2S Rx request is already enabled */ |
bogdanm | 0:9b334a45a8ff | 872 | if((hi2s->Instance->CR2 &SPI_CR2_RXDMAEN) != SPI_CR2_RXDMAEN) |
bogdanm | 0:9b334a45a8ff | 873 | { |
bogdanm | 0:9b334a45a8ff | 874 | /* Enable Rx DMA Request */ |
bogdanm | 0:9b334a45a8ff | 875 | SET_BIT(hi2s->Instance->CR2, SPI_CR2_RXDMAEN); |
bogdanm | 0:9b334a45a8ff | 876 | } |
bogdanm | 0:9b334a45a8ff | 877 | |
bogdanm | 0:9b334a45a8ff | 878 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 879 | __HAL_UNLOCK(hi2s); |
bogdanm | 0:9b334a45a8ff | 880 | |
bogdanm | 0:9b334a45a8ff | 881 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 882 | } |
bogdanm | 0:9b334a45a8ff | 883 | else |
bogdanm | 0:9b334a45a8ff | 884 | { |
bogdanm | 0:9b334a45a8ff | 885 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 886 | __HAL_UNLOCK(hi2s); |
bogdanm | 0:9b334a45a8ff | 887 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 888 | } |
bogdanm | 0:9b334a45a8ff | 889 | } |
bogdanm | 0:9b334a45a8ff | 890 | |
bogdanm | 0:9b334a45a8ff | 891 | /** |
bogdanm | 0:9b334a45a8ff | 892 | * @brief Pauses the audio stream playing from the Media. |
bogdanm | 0:9b334a45a8ff | 893 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 894 | * the configuration information for I2S module |
bogdanm | 0:9b334a45a8ff | 895 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 896 | */ |
bogdanm | 0:9b334a45a8ff | 897 | HAL_StatusTypeDef HAL_I2S_DMAPause(I2S_HandleTypeDef *hi2s) |
bogdanm | 0:9b334a45a8ff | 898 | { |
bogdanm | 0:9b334a45a8ff | 899 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 900 | __HAL_LOCK(hi2s); |
bogdanm | 0:9b334a45a8ff | 901 | |
bogdanm | 0:9b334a45a8ff | 902 | if(hi2s->State == HAL_I2S_STATE_BUSY_TX) |
bogdanm | 0:9b334a45a8ff | 903 | { |
bogdanm | 0:9b334a45a8ff | 904 | /* Disable the I2S DMA Tx request */ |
bogdanm | 0:9b334a45a8ff | 905 | CLEAR_BIT(hi2s->Instance->CR2, SPI_CR2_TXDMAEN); |
bogdanm | 0:9b334a45a8ff | 906 | } |
bogdanm | 0:9b334a45a8ff | 907 | else if(hi2s->State == HAL_I2S_STATE_BUSY_RX) |
bogdanm | 0:9b334a45a8ff | 908 | { |
bogdanm | 0:9b334a45a8ff | 909 | /* Disable the I2S DMA Rx request */ |
bogdanm | 0:9b334a45a8ff | 910 | CLEAR_BIT(hi2s->Instance->CR2, SPI_CR2_RXDMAEN); |
bogdanm | 0:9b334a45a8ff | 911 | } |
bogdanm | 0:9b334a45a8ff | 912 | |
bogdanm | 0:9b334a45a8ff | 913 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 914 | __HAL_UNLOCK(hi2s); |
bogdanm | 0:9b334a45a8ff | 915 | |
bogdanm | 0:9b334a45a8ff | 916 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 917 | } |
bogdanm | 0:9b334a45a8ff | 918 | |
bogdanm | 0:9b334a45a8ff | 919 | /** |
bogdanm | 0:9b334a45a8ff | 920 | * @brief Resumes the audio stream playing from the Media. |
bogdanm | 0:9b334a45a8ff | 921 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 922 | * the configuration information for I2S module |
bogdanm | 0:9b334a45a8ff | 923 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 924 | */ |
bogdanm | 0:9b334a45a8ff | 925 | HAL_StatusTypeDef HAL_I2S_DMAResume(I2S_HandleTypeDef *hi2s) |
bogdanm | 0:9b334a45a8ff | 926 | { |
bogdanm | 0:9b334a45a8ff | 927 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 928 | __HAL_LOCK(hi2s); |
bogdanm | 0:9b334a45a8ff | 929 | |
bogdanm | 0:9b334a45a8ff | 930 | if(hi2s->State == HAL_I2S_STATE_BUSY_TX) |
bogdanm | 0:9b334a45a8ff | 931 | { |
bogdanm | 0:9b334a45a8ff | 932 | /* Enable the I2S DMA Tx request */ |
bogdanm | 0:9b334a45a8ff | 933 | SET_BIT(hi2s->Instance->CR2, SPI_CR2_TXDMAEN); |
bogdanm | 0:9b334a45a8ff | 934 | } |
bogdanm | 0:9b334a45a8ff | 935 | else if(hi2s->State == HAL_I2S_STATE_BUSY_RX) |
bogdanm | 0:9b334a45a8ff | 936 | { |
bogdanm | 0:9b334a45a8ff | 937 | /* Enable the I2S DMA Rx request */ |
bogdanm | 0:9b334a45a8ff | 938 | SET_BIT(hi2s->Instance->CR2, SPI_CR2_RXDMAEN); |
bogdanm | 0:9b334a45a8ff | 939 | } |
bogdanm | 0:9b334a45a8ff | 940 | |
bogdanm | 0:9b334a45a8ff | 941 | /* If the I2S peripheral is still not enabled, enable it */ |
bogdanm | 0:9b334a45a8ff | 942 | if ((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SE) == 0) |
bogdanm | 0:9b334a45a8ff | 943 | { |
bogdanm | 0:9b334a45a8ff | 944 | /* Enable I2S peripheral */ |
bogdanm | 0:9b334a45a8ff | 945 | __HAL_I2S_ENABLE(hi2s); |
bogdanm | 0:9b334a45a8ff | 946 | } |
bogdanm | 0:9b334a45a8ff | 947 | |
bogdanm | 0:9b334a45a8ff | 948 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 949 | __HAL_UNLOCK(hi2s); |
bogdanm | 0:9b334a45a8ff | 950 | |
bogdanm | 0:9b334a45a8ff | 951 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 952 | } |
bogdanm | 0:9b334a45a8ff | 953 | |
bogdanm | 0:9b334a45a8ff | 954 | /** |
bogdanm | 0:9b334a45a8ff | 955 | * @brief Resumes the audio stream playing from the Media. |
bogdanm | 0:9b334a45a8ff | 956 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 957 | * the configuration information for I2S module |
bogdanm | 0:9b334a45a8ff | 958 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 959 | */ |
bogdanm | 0:9b334a45a8ff | 960 | HAL_StatusTypeDef HAL_I2S_DMAStop(I2S_HandleTypeDef *hi2s) |
bogdanm | 0:9b334a45a8ff | 961 | { |
bogdanm | 0:9b334a45a8ff | 962 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 963 | __HAL_LOCK(hi2s); |
bogdanm | 0:9b334a45a8ff | 964 | |
bogdanm | 0:9b334a45a8ff | 965 | /* Disable the I2S Tx/Rx DMA requests */ |
bogdanm | 0:9b334a45a8ff | 966 | CLEAR_BIT(hi2s->Instance->CR2, SPI_CR2_TXDMAEN); |
bogdanm | 0:9b334a45a8ff | 967 | CLEAR_BIT(hi2s->Instance->CR2, SPI_CR2_RXDMAEN); |
bogdanm | 0:9b334a45a8ff | 968 | |
bogdanm | 0:9b334a45a8ff | 969 | /* Abort the I2S DMA Channel tx */ |
bogdanm | 0:9b334a45a8ff | 970 | if(hi2s->hdmatx != HAL_NULL) |
bogdanm | 0:9b334a45a8ff | 971 | { |
bogdanm | 0:9b334a45a8ff | 972 | /* Disable the I2S DMA channel */ |
bogdanm | 0:9b334a45a8ff | 973 | __HAL_DMA_DISABLE(hi2s->hdmatx); |
bogdanm | 0:9b334a45a8ff | 974 | HAL_DMA_Abort(hi2s->hdmatx); |
bogdanm | 0:9b334a45a8ff | 975 | } |
bogdanm | 0:9b334a45a8ff | 976 | /* Abort the I2S DMA Channel rx */ |
bogdanm | 0:9b334a45a8ff | 977 | if(hi2s->hdmarx != HAL_NULL) |
bogdanm | 0:9b334a45a8ff | 978 | { |
bogdanm | 0:9b334a45a8ff | 979 | /* Disable the I2S DMA channel */ |
bogdanm | 0:9b334a45a8ff | 980 | __HAL_DMA_DISABLE(hi2s->hdmarx); |
bogdanm | 0:9b334a45a8ff | 981 | HAL_DMA_Abort(hi2s->hdmarx); |
bogdanm | 0:9b334a45a8ff | 982 | } |
bogdanm | 0:9b334a45a8ff | 983 | |
bogdanm | 0:9b334a45a8ff | 984 | /* Disable I2S peripheral */ |
bogdanm | 0:9b334a45a8ff | 985 | __HAL_I2S_DISABLE(hi2s); |
bogdanm | 0:9b334a45a8ff | 986 | |
bogdanm | 0:9b334a45a8ff | 987 | hi2s->State = HAL_I2S_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 988 | |
bogdanm | 0:9b334a45a8ff | 989 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 990 | __HAL_UNLOCK(hi2s); |
bogdanm | 0:9b334a45a8ff | 991 | |
bogdanm | 0:9b334a45a8ff | 992 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 993 | } |
bogdanm | 0:9b334a45a8ff | 994 | |
bogdanm | 0:9b334a45a8ff | 995 | /** |
bogdanm | 0:9b334a45a8ff | 996 | * @brief This function handles I2S interrupt request. |
bogdanm | 0:9b334a45a8ff | 997 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 998 | * the configuration information for I2S module |
bogdanm | 0:9b334a45a8ff | 999 | * @retval None |
bogdanm | 0:9b334a45a8ff | 1000 | */ |
bogdanm | 0:9b334a45a8ff | 1001 | void HAL_I2S_IRQHandler(I2S_HandleTypeDef *hi2s) |
bogdanm | 0:9b334a45a8ff | 1002 | { |
bogdanm | 0:9b334a45a8ff | 1003 | uint32_t i2ssr = hi2s->Instance->SR; |
bogdanm | 0:9b334a45a8ff | 1004 | |
bogdanm | 0:9b334a45a8ff | 1005 | /* I2S in mode Receiver ------------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 1006 | if(((i2ssr & I2S_FLAG_OVR) != I2S_FLAG_OVR) && |
bogdanm | 0:9b334a45a8ff | 1007 | ((i2ssr & I2S_FLAG_RXNE) == I2S_FLAG_RXNE) && (__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_RXNE) != RESET)) |
bogdanm | 0:9b334a45a8ff | 1008 | { |
bogdanm | 0:9b334a45a8ff | 1009 | I2S_Receive_IT(hi2s); |
bogdanm | 0:9b334a45a8ff | 1010 | return; |
bogdanm | 0:9b334a45a8ff | 1011 | } |
bogdanm | 0:9b334a45a8ff | 1012 | |
bogdanm | 0:9b334a45a8ff | 1013 | /* I2S in mode Tramitter -----------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 1014 | if(((i2ssr & I2S_FLAG_TXE) == I2S_FLAG_TXE) && (__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_TXE) != RESET)) |
bogdanm | 0:9b334a45a8ff | 1015 | { |
bogdanm | 0:9b334a45a8ff | 1016 | I2S_Transmit_IT(hi2s); |
bogdanm | 0:9b334a45a8ff | 1017 | return; |
bogdanm | 0:9b334a45a8ff | 1018 | } |
bogdanm | 0:9b334a45a8ff | 1019 | |
bogdanm | 0:9b334a45a8ff | 1020 | /* I2S interrupt error -------------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 1021 | if(__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_ERR) != RESET) |
bogdanm | 0:9b334a45a8ff | 1022 | { |
bogdanm | 0:9b334a45a8ff | 1023 | /* I2S Overrun error interrupt occured ---------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 1024 | if((i2ssr & I2S_FLAG_OVR) == I2S_FLAG_OVR) |
bogdanm | 0:9b334a45a8ff | 1025 | { |
bogdanm | 0:9b334a45a8ff | 1026 | /* Disable RXNE and ERR interrupt */ |
bogdanm | 0:9b334a45a8ff | 1027 | __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_RXNE | I2S_IT_ERR)); |
bogdanm | 0:9b334a45a8ff | 1028 | |
bogdanm | 0:9b334a45a8ff | 1029 | /* Set the error code and execute error callback*/ |
bogdanm | 0:9b334a45a8ff | 1030 | SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_OVR); |
bogdanm | 0:9b334a45a8ff | 1031 | } |
bogdanm | 0:9b334a45a8ff | 1032 | |
bogdanm | 0:9b334a45a8ff | 1033 | /* I2S Underrun error interrupt occured --------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 1034 | if((i2ssr & I2S_FLAG_UDR) == I2S_FLAG_UDR) |
bogdanm | 0:9b334a45a8ff | 1035 | { |
bogdanm | 0:9b334a45a8ff | 1036 | /* Disable TXE and ERR interrupt */ |
bogdanm | 0:9b334a45a8ff | 1037 | __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR)); |
bogdanm | 0:9b334a45a8ff | 1038 | |
bogdanm | 0:9b334a45a8ff | 1039 | /* Set the error code and execute error callback*/ |
bogdanm | 0:9b334a45a8ff | 1040 | SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_UDR); |
bogdanm | 0:9b334a45a8ff | 1041 | } |
bogdanm | 0:9b334a45a8ff | 1042 | |
bogdanm | 0:9b334a45a8ff | 1043 | /* I2S Frame format error interrupt occured --------------------------*/ |
bogdanm | 0:9b334a45a8ff | 1044 | if((i2ssr & I2S_FLAG_FRE) == I2S_FLAG_FRE) |
bogdanm | 0:9b334a45a8ff | 1045 | { |
bogdanm | 0:9b334a45a8ff | 1046 | /* Disable TXE and ERR interrupt */ |
bogdanm | 0:9b334a45a8ff | 1047 | __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_RXNE | I2S_IT_ERR)); |
bogdanm | 0:9b334a45a8ff | 1048 | |
bogdanm | 0:9b334a45a8ff | 1049 | /* Set the error code and execute error callback*/ |
bogdanm | 0:9b334a45a8ff | 1050 | SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_FRE); |
bogdanm | 0:9b334a45a8ff | 1051 | } |
bogdanm | 0:9b334a45a8ff | 1052 | |
bogdanm | 0:9b334a45a8ff | 1053 | /* Set the I2S State ready */ |
bogdanm | 0:9b334a45a8ff | 1054 | hi2s->State = HAL_I2S_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 1055 | /* Call the Error Callback */ |
bogdanm | 0:9b334a45a8ff | 1056 | HAL_I2S_ErrorCallback(hi2s); |
bogdanm | 0:9b334a45a8ff | 1057 | } |
bogdanm | 0:9b334a45a8ff | 1058 | } |
bogdanm | 0:9b334a45a8ff | 1059 | |
bogdanm | 0:9b334a45a8ff | 1060 | /** |
bogdanm | 0:9b334a45a8ff | 1061 | * @brief Tx Transfer Half completed callbacks |
bogdanm | 0:9b334a45a8ff | 1062 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 1063 | * the configuration information for I2S module |
bogdanm | 0:9b334a45a8ff | 1064 | * @retval None |
bogdanm | 0:9b334a45a8ff | 1065 | */ |
bogdanm | 0:9b334a45a8ff | 1066 | __weak void HAL_I2S_TxHalfCpltCallback(I2S_HandleTypeDef *hi2s) |
bogdanm | 0:9b334a45a8ff | 1067 | { |
bogdanm | 0:9b334a45a8ff | 1068 | /* NOTE : This function Should not be modified, when the callback is needed, |
bogdanm | 0:9b334a45a8ff | 1069 | the HAL_I2S_TxHalfCpltCallback could be implemented in the user file |
bogdanm | 0:9b334a45a8ff | 1070 | */ |
bogdanm | 0:9b334a45a8ff | 1071 | } |
bogdanm | 0:9b334a45a8ff | 1072 | |
bogdanm | 0:9b334a45a8ff | 1073 | /** |
bogdanm | 0:9b334a45a8ff | 1074 | * @brief Tx Transfer completed callbacks |
bogdanm | 0:9b334a45a8ff | 1075 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 1076 | * the configuration information for I2S module |
bogdanm | 0:9b334a45a8ff | 1077 | * @retval None |
bogdanm | 0:9b334a45a8ff | 1078 | */ |
bogdanm | 0:9b334a45a8ff | 1079 | __weak void HAL_I2S_TxCpltCallback(I2S_HandleTypeDef *hi2s) |
bogdanm | 0:9b334a45a8ff | 1080 | { |
bogdanm | 0:9b334a45a8ff | 1081 | /* NOTE : This function Should not be modified, when the callback is needed, |
bogdanm | 0:9b334a45a8ff | 1082 | the HAL_I2S_TxCpltCallback could be implemented in the user file |
bogdanm | 0:9b334a45a8ff | 1083 | */ |
bogdanm | 0:9b334a45a8ff | 1084 | } |
bogdanm | 0:9b334a45a8ff | 1085 | |
bogdanm | 0:9b334a45a8ff | 1086 | /** |
bogdanm | 0:9b334a45a8ff | 1087 | * @brief Rx Transfer half completed callbacks |
bogdanm | 0:9b334a45a8ff | 1088 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 1089 | * the configuration information for I2S module |
bogdanm | 0:9b334a45a8ff | 1090 | * @retval None |
bogdanm | 0:9b334a45a8ff | 1091 | */ |
bogdanm | 0:9b334a45a8ff | 1092 | __weak void HAL_I2S_RxHalfCpltCallback(I2S_HandleTypeDef *hi2s) |
bogdanm | 0:9b334a45a8ff | 1093 | { |
bogdanm | 0:9b334a45a8ff | 1094 | /* NOTE : This function Should not be modified, when the callback is needed, |
bogdanm | 0:9b334a45a8ff | 1095 | the HAL_I2S_RxHalfCpltCallback could be implemented in the user file |
bogdanm | 0:9b334a45a8ff | 1096 | */ |
bogdanm | 0:9b334a45a8ff | 1097 | } |
bogdanm | 0:9b334a45a8ff | 1098 | |
bogdanm | 0:9b334a45a8ff | 1099 | /** |
bogdanm | 0:9b334a45a8ff | 1100 | * @brief Rx Transfer completed callbacks |
bogdanm | 0:9b334a45a8ff | 1101 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 1102 | * the configuration information for I2S module |
bogdanm | 0:9b334a45a8ff | 1103 | * @retval None |
bogdanm | 0:9b334a45a8ff | 1104 | */ |
bogdanm | 0:9b334a45a8ff | 1105 | __weak void HAL_I2S_RxCpltCallback(I2S_HandleTypeDef *hi2s) |
bogdanm | 0:9b334a45a8ff | 1106 | { |
bogdanm | 0:9b334a45a8ff | 1107 | /* NOTE : This function Should not be modified, when the callback is needed, |
bogdanm | 0:9b334a45a8ff | 1108 | the HAL_I2S_RxCpltCallback could be implemented in the user file |
bogdanm | 0:9b334a45a8ff | 1109 | */ |
bogdanm | 0:9b334a45a8ff | 1110 | } |
bogdanm | 0:9b334a45a8ff | 1111 | |
bogdanm | 0:9b334a45a8ff | 1112 | /** |
bogdanm | 0:9b334a45a8ff | 1113 | * @brief I2S error callbacks |
bogdanm | 0:9b334a45a8ff | 1114 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 1115 | * the configuration information for I2S module |
bogdanm | 0:9b334a45a8ff | 1116 | * @retval None |
bogdanm | 0:9b334a45a8ff | 1117 | */ |
bogdanm | 0:9b334a45a8ff | 1118 | __weak void HAL_I2S_ErrorCallback(I2S_HandleTypeDef *hi2s) |
bogdanm | 0:9b334a45a8ff | 1119 | { |
bogdanm | 0:9b334a45a8ff | 1120 | /* NOTE : This function Should not be modified, when the callback is needed, |
bogdanm | 0:9b334a45a8ff | 1121 | the HAL_I2S_ErrorCallback could be implemented in the user file |
bogdanm | 0:9b334a45a8ff | 1122 | */ |
bogdanm | 0:9b334a45a8ff | 1123 | } |
bogdanm | 0:9b334a45a8ff | 1124 | |
bogdanm | 0:9b334a45a8ff | 1125 | /** |
bogdanm | 0:9b334a45a8ff | 1126 | * @} |
bogdanm | 0:9b334a45a8ff | 1127 | */ |
bogdanm | 0:9b334a45a8ff | 1128 | |
bogdanm | 0:9b334a45a8ff | 1129 | /** @defgroup I2S_Exported_Functions_Group3 Peripheral State and Errors functions |
bogdanm | 0:9b334a45a8ff | 1130 | * @brief Peripheral State functions |
bogdanm | 0:9b334a45a8ff | 1131 | * |
bogdanm | 0:9b334a45a8ff | 1132 | @verbatim |
bogdanm | 0:9b334a45a8ff | 1133 | =============================================================================== |
bogdanm | 0:9b334a45a8ff | 1134 | ##### Peripheral State and Errors functions ##### |
bogdanm | 0:9b334a45a8ff | 1135 | =============================================================================== |
bogdanm | 0:9b334a45a8ff | 1136 | [..] |
bogdanm | 0:9b334a45a8ff | 1137 | This subsection permits to get in run-time the status of the peripheral |
bogdanm | 0:9b334a45a8ff | 1138 | and the data flow. |
bogdanm | 0:9b334a45a8ff | 1139 | |
bogdanm | 0:9b334a45a8ff | 1140 | @endverbatim |
bogdanm | 0:9b334a45a8ff | 1141 | * @{ |
bogdanm | 0:9b334a45a8ff | 1142 | */ |
bogdanm | 0:9b334a45a8ff | 1143 | |
bogdanm | 0:9b334a45a8ff | 1144 | /** |
bogdanm | 0:9b334a45a8ff | 1145 | * @brief Return the I2S state |
bogdanm | 0:9b334a45a8ff | 1146 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 1147 | * the configuration information for I2S module |
bogdanm | 0:9b334a45a8ff | 1148 | * @retval HAL state |
bogdanm | 0:9b334a45a8ff | 1149 | */ |
bogdanm | 0:9b334a45a8ff | 1150 | HAL_I2S_StateTypeDef HAL_I2S_GetState(I2S_HandleTypeDef *hi2s) |
bogdanm | 0:9b334a45a8ff | 1151 | { |
bogdanm | 0:9b334a45a8ff | 1152 | return hi2s->State; |
bogdanm | 0:9b334a45a8ff | 1153 | } |
bogdanm | 0:9b334a45a8ff | 1154 | |
bogdanm | 0:9b334a45a8ff | 1155 | /** |
bogdanm | 0:9b334a45a8ff | 1156 | * @brief Return the I2S error code |
bogdanm | 0:9b334a45a8ff | 1157 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 1158 | * the configuration information for I2S module |
bogdanm | 0:9b334a45a8ff | 1159 | * @retval I2S Error Code |
bogdanm | 0:9b334a45a8ff | 1160 | */ |
bogdanm | 0:9b334a45a8ff | 1161 | HAL_I2S_ErrorTypeDef HAL_I2S_GetError(I2S_HandleTypeDef *hi2s) |
bogdanm | 0:9b334a45a8ff | 1162 | { |
bogdanm | 0:9b334a45a8ff | 1163 | return hi2s->ErrorCode; |
bogdanm | 0:9b334a45a8ff | 1164 | } |
bogdanm | 0:9b334a45a8ff | 1165 | /** |
bogdanm | 0:9b334a45a8ff | 1166 | * @} |
bogdanm | 0:9b334a45a8ff | 1167 | */ |
bogdanm | 0:9b334a45a8ff | 1168 | |
bogdanm | 0:9b334a45a8ff | 1169 | /** |
bogdanm | 0:9b334a45a8ff | 1170 | * @} |
bogdanm | 0:9b334a45a8ff | 1171 | */ |
bogdanm | 0:9b334a45a8ff | 1172 | |
bogdanm | 0:9b334a45a8ff | 1173 | |
bogdanm | 0:9b334a45a8ff | 1174 | /** @defgroup I2S_Private_Functions I2S Private Functions |
bogdanm | 0:9b334a45a8ff | 1175 | * @{ |
bogdanm | 0:9b334a45a8ff | 1176 | */ |
bogdanm | 0:9b334a45a8ff | 1177 | /** |
bogdanm | 0:9b334a45a8ff | 1178 | * @brief DMA I2S transmit process complete callback |
bogdanm | 0:9b334a45a8ff | 1179 | * @param hdma: pointer to a DMA_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 1180 | * the configuration information for the specified DMA module. |
bogdanm | 0:9b334a45a8ff | 1181 | * @retval None |
bogdanm | 0:9b334a45a8ff | 1182 | */ |
bogdanm | 0:9b334a45a8ff | 1183 | static void I2S_DMATxCplt(DMA_HandleTypeDef *hdma) |
bogdanm | 0:9b334a45a8ff | 1184 | { |
bogdanm | 0:9b334a45a8ff | 1185 | I2S_HandleTypeDef* hi2s = (I2S_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent; |
bogdanm | 0:9b334a45a8ff | 1186 | |
bogdanm | 0:9b334a45a8ff | 1187 | if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0) |
bogdanm | 0:9b334a45a8ff | 1188 | { |
bogdanm | 0:9b334a45a8ff | 1189 | /* Disable Tx DMA Request */ |
bogdanm | 0:9b334a45a8ff | 1190 | CLEAR_BIT(hi2s->Instance->CR2, SPI_CR2_TXDMAEN); |
bogdanm | 0:9b334a45a8ff | 1191 | |
bogdanm | 0:9b334a45a8ff | 1192 | hi2s->TxXferCount = 0; |
bogdanm | 0:9b334a45a8ff | 1193 | hi2s->State = HAL_I2S_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 1194 | } |
bogdanm | 0:9b334a45a8ff | 1195 | HAL_I2S_TxCpltCallback(hi2s); |
bogdanm | 0:9b334a45a8ff | 1196 | } |
bogdanm | 0:9b334a45a8ff | 1197 | |
bogdanm | 0:9b334a45a8ff | 1198 | /** |
bogdanm | 0:9b334a45a8ff | 1199 | * @brief DMA I2S transmit process half complete callback |
bogdanm | 0:9b334a45a8ff | 1200 | * @param hdma: pointer to a DMA_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 1201 | * the configuration information for the specified DMA module. |
bogdanm | 0:9b334a45a8ff | 1202 | * @retval None |
bogdanm | 0:9b334a45a8ff | 1203 | */ |
bogdanm | 0:9b334a45a8ff | 1204 | static void I2S_DMATxHalfCplt(DMA_HandleTypeDef *hdma) |
bogdanm | 0:9b334a45a8ff | 1205 | { |
bogdanm | 0:9b334a45a8ff | 1206 | I2S_HandleTypeDef* hi2s = (I2S_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent; |
bogdanm | 0:9b334a45a8ff | 1207 | |
bogdanm | 0:9b334a45a8ff | 1208 | HAL_I2S_TxHalfCpltCallback(hi2s); |
bogdanm | 0:9b334a45a8ff | 1209 | } |
bogdanm | 0:9b334a45a8ff | 1210 | |
bogdanm | 0:9b334a45a8ff | 1211 | /** |
bogdanm | 0:9b334a45a8ff | 1212 | * @brief DMA I2S receive process complete callback |
bogdanm | 0:9b334a45a8ff | 1213 | * @param hdma: pointer to a DMA_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 1214 | * the configuration information for the specified DMA module. |
bogdanm | 0:9b334a45a8ff | 1215 | * @retval None |
bogdanm | 0:9b334a45a8ff | 1216 | */ |
bogdanm | 0:9b334a45a8ff | 1217 | static void I2S_DMARxCplt(DMA_HandleTypeDef *hdma) |
bogdanm | 0:9b334a45a8ff | 1218 | { |
bogdanm | 0:9b334a45a8ff | 1219 | I2S_HandleTypeDef* hi2s = (I2S_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent; |
bogdanm | 0:9b334a45a8ff | 1220 | |
bogdanm | 0:9b334a45a8ff | 1221 | if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0) |
bogdanm | 0:9b334a45a8ff | 1222 | { |
bogdanm | 0:9b334a45a8ff | 1223 | /* Disable Rx DMA Request */ |
bogdanm | 0:9b334a45a8ff | 1224 | CLEAR_BIT(hi2s->Instance->CR2, SPI_CR2_RXDMAEN); |
bogdanm | 0:9b334a45a8ff | 1225 | hi2s->RxXferCount = 0; |
bogdanm | 0:9b334a45a8ff | 1226 | hi2s->State = HAL_I2S_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 1227 | } |
bogdanm | 0:9b334a45a8ff | 1228 | HAL_I2S_RxCpltCallback(hi2s); |
bogdanm | 0:9b334a45a8ff | 1229 | } |
bogdanm | 0:9b334a45a8ff | 1230 | |
bogdanm | 0:9b334a45a8ff | 1231 | /** |
bogdanm | 0:9b334a45a8ff | 1232 | * @brief DMA I2S receive process half complete callback |
bogdanm | 0:9b334a45a8ff | 1233 | * @param hdma: pointer to a DMA_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 1234 | * the configuration information for the specified DMA module. |
bogdanm | 0:9b334a45a8ff | 1235 | * @retval None |
bogdanm | 0:9b334a45a8ff | 1236 | */ |
bogdanm | 0:9b334a45a8ff | 1237 | static void I2S_DMARxHalfCplt(DMA_HandleTypeDef *hdma) |
bogdanm | 0:9b334a45a8ff | 1238 | { |
bogdanm | 0:9b334a45a8ff | 1239 | I2S_HandleTypeDef* hi2s = (I2S_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent; |
bogdanm | 0:9b334a45a8ff | 1240 | |
bogdanm | 0:9b334a45a8ff | 1241 | HAL_I2S_RxHalfCpltCallback(hi2s); |
bogdanm | 0:9b334a45a8ff | 1242 | } |
bogdanm | 0:9b334a45a8ff | 1243 | |
bogdanm | 0:9b334a45a8ff | 1244 | /** |
bogdanm | 0:9b334a45a8ff | 1245 | * @brief DMA I2S communication error callback |
bogdanm | 0:9b334a45a8ff | 1246 | * @param hdma: pointer to a DMA_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 1247 | * the configuration information for the specified DMA module. |
bogdanm | 0:9b334a45a8ff | 1248 | * @retval None |
bogdanm | 0:9b334a45a8ff | 1249 | */ |
bogdanm | 0:9b334a45a8ff | 1250 | static void I2S_DMAError(DMA_HandleTypeDef *hdma) |
bogdanm | 0:9b334a45a8ff | 1251 | { |
bogdanm | 0:9b334a45a8ff | 1252 | I2S_HandleTypeDef* hi2s = (I2S_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent; |
bogdanm | 0:9b334a45a8ff | 1253 | |
bogdanm | 0:9b334a45a8ff | 1254 | /* Disable Rx and Tx DMA Request */ |
bogdanm | 0:9b334a45a8ff | 1255 | CLEAR_BIT(hi2s->Instance->CR2, (SPI_CR2_RXDMAEN | SPI_CR2_TXDMAEN)); |
bogdanm | 0:9b334a45a8ff | 1256 | hi2s->TxXferCount = 0; |
bogdanm | 0:9b334a45a8ff | 1257 | hi2s->RxXferCount = 0; |
bogdanm | 0:9b334a45a8ff | 1258 | |
bogdanm | 0:9b334a45a8ff | 1259 | hi2s->State= HAL_I2S_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 1260 | |
bogdanm | 0:9b334a45a8ff | 1261 | /* Set the error code and execute error callback*/ |
bogdanm | 0:9b334a45a8ff | 1262 | SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_DMA); |
bogdanm | 0:9b334a45a8ff | 1263 | HAL_I2S_ErrorCallback(hi2s); |
bogdanm | 0:9b334a45a8ff | 1264 | } |
bogdanm | 0:9b334a45a8ff | 1265 | |
bogdanm | 0:9b334a45a8ff | 1266 | /** |
bogdanm | 0:9b334a45a8ff | 1267 | * @brief Transmit an amount of data in non-blocking mode with Interrupt |
bogdanm | 0:9b334a45a8ff | 1268 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 1269 | * the configuration information for I2S module |
bogdanm | 0:9b334a45a8ff | 1270 | * @retval None |
bogdanm | 0:9b334a45a8ff | 1271 | */ |
bogdanm | 0:9b334a45a8ff | 1272 | static void I2S_Transmit_IT(I2S_HandleTypeDef *hi2s) |
bogdanm | 0:9b334a45a8ff | 1273 | { |
bogdanm | 0:9b334a45a8ff | 1274 | /* Transmit data */ |
bogdanm | 0:9b334a45a8ff | 1275 | hi2s->Instance->DR = (*hi2s->pTxBuffPtr++); |
bogdanm | 0:9b334a45a8ff | 1276 | hi2s->TxXferCount--; |
bogdanm | 0:9b334a45a8ff | 1277 | |
bogdanm | 0:9b334a45a8ff | 1278 | if(hi2s->TxXferCount == 0) |
bogdanm | 0:9b334a45a8ff | 1279 | { |
bogdanm | 0:9b334a45a8ff | 1280 | /* Disable TXE and ERR interrupt */ |
bogdanm | 0:9b334a45a8ff | 1281 | __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR)); |
bogdanm | 0:9b334a45a8ff | 1282 | |
bogdanm | 0:9b334a45a8ff | 1283 | hi2s->State = HAL_I2S_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 1284 | HAL_I2S_TxCpltCallback(hi2s); |
bogdanm | 0:9b334a45a8ff | 1285 | } |
bogdanm | 0:9b334a45a8ff | 1286 | } |
bogdanm | 0:9b334a45a8ff | 1287 | |
bogdanm | 0:9b334a45a8ff | 1288 | /** |
bogdanm | 0:9b334a45a8ff | 1289 | * @brief Receive an amount of data in non-blocking mode with Interrupt |
bogdanm | 0:9b334a45a8ff | 1290 | * @param hi2s: I2S handle |
bogdanm | 0:9b334a45a8ff | 1291 | * @retval None |
bogdanm | 0:9b334a45a8ff | 1292 | */ |
bogdanm | 0:9b334a45a8ff | 1293 | static void I2S_Receive_IT(I2S_HandleTypeDef *hi2s) |
bogdanm | 0:9b334a45a8ff | 1294 | { |
bogdanm | 0:9b334a45a8ff | 1295 | /* Receive data */ |
bogdanm | 0:9b334a45a8ff | 1296 | (*hi2s->pRxBuffPtr++) = hi2s->Instance->DR; |
bogdanm | 0:9b334a45a8ff | 1297 | hi2s->RxXferCount--; |
bogdanm | 0:9b334a45a8ff | 1298 | |
bogdanm | 0:9b334a45a8ff | 1299 | if(hi2s->RxXferCount == 0) |
bogdanm | 0:9b334a45a8ff | 1300 | { |
bogdanm | 0:9b334a45a8ff | 1301 | /* Disable RXNE and ERR interrupt */ |
bogdanm | 0:9b334a45a8ff | 1302 | __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_RXNE | I2S_IT_ERR)); |
bogdanm | 0:9b334a45a8ff | 1303 | |
bogdanm | 0:9b334a45a8ff | 1304 | hi2s->State = HAL_I2S_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 1305 | HAL_I2S_RxCpltCallback(hi2s); |
bogdanm | 0:9b334a45a8ff | 1306 | } |
bogdanm | 0:9b334a45a8ff | 1307 | } |
bogdanm | 0:9b334a45a8ff | 1308 | |
bogdanm | 0:9b334a45a8ff | 1309 | |
bogdanm | 0:9b334a45a8ff | 1310 | /** |
bogdanm | 0:9b334a45a8ff | 1311 | * @brief This function handles I2S Communication Timeout. |
bogdanm | 0:9b334a45a8ff | 1312 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 1313 | * the configuration information for I2S module |
bogdanm | 0:9b334a45a8ff | 1314 | * @param Flag: Flag checked |
bogdanm | 0:9b334a45a8ff | 1315 | * @param Status: Value of the flag expected |
bogdanm | 0:9b334a45a8ff | 1316 | * @param Timeout: Duration of the timeout |
bogdanm | 0:9b334a45a8ff | 1317 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 1318 | */ |
bogdanm | 0:9b334a45a8ff | 1319 | static HAL_StatusTypeDef I2S_WaitFlagStateUntilTimeout(I2S_HandleTypeDef *hi2s, uint32_t Flag, uint32_t Status, uint32_t Timeout) |
bogdanm | 0:9b334a45a8ff | 1320 | { |
bogdanm | 0:9b334a45a8ff | 1321 | uint32_t tickstart = 0; |
bogdanm | 0:9b334a45a8ff | 1322 | |
bogdanm | 0:9b334a45a8ff | 1323 | /* Get tick */ |
bogdanm | 0:9b334a45a8ff | 1324 | tickstart = HAL_GetTick(); |
bogdanm | 0:9b334a45a8ff | 1325 | |
bogdanm | 0:9b334a45a8ff | 1326 | /* Wait until flag is set */ |
bogdanm | 0:9b334a45a8ff | 1327 | if(Status == RESET) |
bogdanm | 0:9b334a45a8ff | 1328 | { |
bogdanm | 0:9b334a45a8ff | 1329 | while(__HAL_I2S_GET_FLAG(hi2s, Flag) == RESET) |
bogdanm | 0:9b334a45a8ff | 1330 | { |
bogdanm | 0:9b334a45a8ff | 1331 | if(Timeout != HAL_MAX_DELAY) |
bogdanm | 0:9b334a45a8ff | 1332 | { |
bogdanm | 0:9b334a45a8ff | 1333 | if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout)) |
bogdanm | 0:9b334a45a8ff | 1334 | { |
bogdanm | 0:9b334a45a8ff | 1335 | /* Set the I2S State ready */ |
bogdanm | 0:9b334a45a8ff | 1336 | hi2s->State= HAL_I2S_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 1337 | |
bogdanm | 0:9b334a45a8ff | 1338 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 1339 | __HAL_UNLOCK(hi2s); |
bogdanm | 0:9b334a45a8ff | 1340 | |
bogdanm | 0:9b334a45a8ff | 1341 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 1342 | } |
bogdanm | 0:9b334a45a8ff | 1343 | } |
bogdanm | 0:9b334a45a8ff | 1344 | } |
bogdanm | 0:9b334a45a8ff | 1345 | } |
bogdanm | 0:9b334a45a8ff | 1346 | else |
bogdanm | 0:9b334a45a8ff | 1347 | { |
bogdanm | 0:9b334a45a8ff | 1348 | while(__HAL_I2S_GET_FLAG(hi2s, Flag) != RESET) |
bogdanm | 0:9b334a45a8ff | 1349 | { |
bogdanm | 0:9b334a45a8ff | 1350 | if(Timeout != HAL_MAX_DELAY) |
bogdanm | 0:9b334a45a8ff | 1351 | { |
bogdanm | 0:9b334a45a8ff | 1352 | if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout)) |
bogdanm | 0:9b334a45a8ff | 1353 | { |
bogdanm | 0:9b334a45a8ff | 1354 | /* Set the I2S State ready */ |
bogdanm | 0:9b334a45a8ff | 1355 | hi2s->State= HAL_I2S_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 1356 | |
bogdanm | 0:9b334a45a8ff | 1357 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 1358 | __HAL_UNLOCK(hi2s); |
bogdanm | 0:9b334a45a8ff | 1359 | |
bogdanm | 0:9b334a45a8ff | 1360 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 1361 | } |
bogdanm | 0:9b334a45a8ff | 1362 | } |
bogdanm | 0:9b334a45a8ff | 1363 | } |
bogdanm | 0:9b334a45a8ff | 1364 | } |
bogdanm | 0:9b334a45a8ff | 1365 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 1366 | } |
bogdanm | 0:9b334a45a8ff | 1367 | |
bogdanm | 0:9b334a45a8ff | 1368 | /** |
bogdanm | 0:9b334a45a8ff | 1369 | * @} |
bogdanm | 0:9b334a45a8ff | 1370 | */ |
bogdanm | 0:9b334a45a8ff | 1371 | #endif /* STM32L100xC || |
bogdanm | 0:9b334a45a8ff | 1372 | STM32L151xC || STM32L151xCA || STM32L151xD || STM32L151xE ||\\ |
bogdanm | 0:9b334a45a8ff | 1373 | STM32L152xC || STM32L152xCA || STM32L152xD || STM32L152xE ||\\ |
bogdanm | 0:9b334a45a8ff | 1374 | STM32L162xC || STM32L162xCA || STM32L162xD || STM32L162xE */ |
bogdanm | 0:9b334a45a8ff | 1375 | #endif /* HAL_I2S_MODULE_ENABLED */ |
bogdanm | 0:9b334a45a8ff | 1376 | /** |
bogdanm | 0:9b334a45a8ff | 1377 | * @} |
bogdanm | 0:9b334a45a8ff | 1378 | */ |
bogdanm | 0:9b334a45a8ff | 1379 | |
bogdanm | 0:9b334a45a8ff | 1380 | /** |
bogdanm | 0:9b334a45a8ff | 1381 | * @} |
bogdanm | 0:9b334a45a8ff | 1382 | */ |
bogdanm | 0:9b334a45a8ff | 1383 | |
bogdanm | 0:9b334a45a8ff | 1384 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |