fix LPC812 PWM
Fork of mbed-dev by
targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_adc.c@0:9b334a45a8ff, 2015-10-01 (annotated)
- Committer:
- bogdanm
- Date:
- Thu Oct 01 15:25:22 2015 +0300
- Revision:
- 0:9b334a45a8ff
- Child:
- 113:b3775bf36a83
Initial commit on mbed-dev
Replaces mbed-src (now inactive)
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
bogdanm | 0:9b334a45a8ff | 1 | /** |
bogdanm | 0:9b334a45a8ff | 2 | ****************************************************************************** |
bogdanm | 0:9b334a45a8ff | 3 | * @file stm32l0xx_hal_adc.c |
bogdanm | 0:9b334a45a8ff | 4 | * @author MCD Application Team |
bogdanm | 0:9b334a45a8ff | 5 | * @version V1.2.0 |
bogdanm | 0:9b334a45a8ff | 6 | * @date 06-February-2015 |
bogdanm | 0:9b334a45a8ff | 7 | * @brief This file provides firmware functions to manage the following |
bogdanm | 0:9b334a45a8ff | 8 | * functionalities of the Analog to Digital Convertor (ADC) |
bogdanm | 0:9b334a45a8ff | 9 | * peripheral: |
bogdanm | 0:9b334a45a8ff | 10 | * + Initialization and de-initialization functions |
bogdanm | 0:9b334a45a8ff | 11 | * ++ Initialization and Configuration of ADC |
bogdanm | 0:9b334a45a8ff | 12 | * + Operation functions |
bogdanm | 0:9b334a45a8ff | 13 | * ++ Start, stop, get result of conversions of regular |
bogdanm | 0:9b334a45a8ff | 14 | * groups, using 3 possible modes : polling, interruption or DMA. |
bogdanm | 0:9b334a45a8ff | 15 | * ++ Calibration feature |
bogdanm | 0:9b334a45a8ff | 16 | * + Control functions |
bogdanm | 0:9b334a45a8ff | 17 | * ++ Analog Watchdog configuration |
bogdanm | 0:9b334a45a8ff | 18 | * ++ Regular Channels Configuration |
bogdanm | 0:9b334a45a8ff | 19 | * + State functions |
bogdanm | 0:9b334a45a8ff | 20 | * ++ ADC state machine management |
bogdanm | 0:9b334a45a8ff | 21 | * ++ Interrupts and flags management |
bogdanm | 0:9b334a45a8ff | 22 | * |
bogdanm | 0:9b334a45a8ff | 23 | @verbatim |
bogdanm | 0:9b334a45a8ff | 24 | ============================================================================== |
bogdanm | 0:9b334a45a8ff | 25 | ##### ADC specific features ##### |
bogdanm | 0:9b334a45a8ff | 26 | ============================================================================== |
bogdanm | 0:9b334a45a8ff | 27 | [..] |
bogdanm | 0:9b334a45a8ff | 28 | (#) 12-bit, 10-bit, 8-bit or 6-bit configurable resolution. |
bogdanm | 0:9b334a45a8ff | 29 | |
bogdanm | 0:9b334a45a8ff | 30 | (#) A built-in hardware oversampler allows to improve analog performances |
bogdanm | 0:9b334a45a8ff | 31 | while off-loading the related computational burden from the CPU. |
bogdanm | 0:9b334a45a8ff | 32 | |
bogdanm | 0:9b334a45a8ff | 33 | (#) Interrupt generation at the end of conversion and in case of analog |
bogdanm | 0:9b334a45a8ff | 34 | watchdog or overrun events. |
bogdanm | 0:9b334a45a8ff | 35 | |
bogdanm | 0:9b334a45a8ff | 36 | (#) Single and continuous conversion modes. |
bogdanm | 0:9b334a45a8ff | 37 | |
bogdanm | 0:9b334a45a8ff | 38 | (#) Scan or discontinuous mode conversion of channel 0 to channel 18. |
bogdanm | 0:9b334a45a8ff | 39 | |
bogdanm | 0:9b334a45a8ff | 40 | (#) Configurable scan direction (Upward from channel 0 to 18 or Backward from |
bogdanm | 0:9b334a45a8ff | 41 | channel 18 to channel 0) |
bogdanm | 0:9b334a45a8ff | 42 | |
bogdanm | 0:9b334a45a8ff | 43 | (#) Data alignment with in-built data coherency. |
bogdanm | 0:9b334a45a8ff | 44 | |
bogdanm | 0:9b334a45a8ff | 45 | (#) Channel-wise programmable sampling time. |
bogdanm | 0:9b334a45a8ff | 46 | |
bogdanm | 0:9b334a45a8ff | 47 | (#) External trigger option with configurable polarity. |
bogdanm | 0:9b334a45a8ff | 48 | |
bogdanm | 0:9b334a45a8ff | 49 | (#) DMA request generation during regular channel conversion. |
bogdanm | 0:9b334a45a8ff | 50 | |
bogdanm | 0:9b334a45a8ff | 51 | (#) ADC supply requirements: 2.4 V to 3.6 V at full speed and down to 1.8 V at |
bogdanm | 0:9b334a45a8ff | 52 | slower speed. |
bogdanm | 0:9b334a45a8ff | 53 | |
bogdanm | 0:9b334a45a8ff | 54 | (#) ADC input range: VREF- =VIN =VREF+. |
bogdanm | 0:9b334a45a8ff | 55 | |
bogdanm | 0:9b334a45a8ff | 56 | (#) ADC self-calibration. |
bogdanm | 0:9b334a45a8ff | 57 | |
bogdanm | 0:9b334a45a8ff | 58 | (#) ADC is automatically powered off (AutoOff mode) except during the active |
bogdanm | 0:9b334a45a8ff | 59 | conversion phase. This dramatically reduces the power consumption of the |
bogdanm | 0:9b334a45a8ff | 60 | ADC. |
bogdanm | 0:9b334a45a8ff | 61 | |
bogdanm | 0:9b334a45a8ff | 62 | (#) Wait mode to prevent ADC overrun in applications with low frequency. |
bogdanm | 0:9b334a45a8ff | 63 | |
bogdanm | 0:9b334a45a8ff | 64 | |
bogdanm | 0:9b334a45a8ff | 65 | ##### How to use this driver ##### |
bogdanm | 0:9b334a45a8ff | 66 | ============================================================================== |
bogdanm | 0:9b334a45a8ff | 67 | [..] |
bogdanm | 0:9b334a45a8ff | 68 | |
bogdanm | 0:9b334a45a8ff | 69 | (#) Enable the ADC interface |
bogdanm | 0:9b334a45a8ff | 70 | As prerequisite, into HAL_ADC_MspInit(), ADC clock must be configured |
bogdanm | 0:9b334a45a8ff | 71 | at RCC top level. |
bogdanm | 0:9b334a45a8ff | 72 | |
bogdanm | 0:9b334a45a8ff | 73 | Depending on both possible clock sources: PCLK clock or ADC asynchronous |
bogdanm | 0:9b334a45a8ff | 74 | clock. |
bogdanm | 0:9b334a45a8ff | 75 | __HAL_RCC_ADC1_CLK_ENABLE(); |
bogdanm | 0:9b334a45a8ff | 76 | |
bogdanm | 0:9b334a45a8ff | 77 | |
bogdanm | 0:9b334a45a8ff | 78 | (#) ADC pins configuration |
bogdanm | 0:9b334a45a8ff | 79 | (++) Enable the clock for the ADC GPIOs using the following function: |
bogdanm | 0:9b334a45a8ff | 80 | __HAL_RCC_GPIOx_CLK_ENABLE(); |
bogdanm | 0:9b334a45a8ff | 81 | (++) Configure these ADC pins in analog mode using HAL_GPIO_Init(); |
bogdanm | 0:9b334a45a8ff | 82 | |
bogdanm | 0:9b334a45a8ff | 83 | (#) Configure the ADC parameters (conversion resolution, oversampler, |
bogdanm | 0:9b334a45a8ff | 84 | data alignment, continuous mode,...) using the HAL_ADC_Init() function. |
bogdanm | 0:9b334a45a8ff | 85 | |
bogdanm | 0:9b334a45a8ff | 86 | (#) Activate the ADC peripheral using one of the start functions: |
bogdanm | 0:9b334a45a8ff | 87 | HAL_ADC_Start(), HAL_ADC_Start_IT() or HAL_ADC_Start_DMA() |
bogdanm | 0:9b334a45a8ff | 88 | |
bogdanm | 0:9b334a45a8ff | 89 | *** Channels configuration *** |
bogdanm | 0:9b334a45a8ff | 90 | =============================== |
bogdanm | 0:9b334a45a8ff | 91 | [..] |
bogdanm | 0:9b334a45a8ff | 92 | (+) To configure the ADC channels group, use HAL_ADC_ConfigChannel() function. |
bogdanm | 0:9b334a45a8ff | 93 | (+) To read the ADC converted values, use the HAL_ADC_GetValue() function. |
bogdanm | 0:9b334a45a8ff | 94 | |
bogdanm | 0:9b334a45a8ff | 95 | *** DMA feature configuration *** |
bogdanm | 0:9b334a45a8ff | 96 | ================================= |
bogdanm | 0:9b334a45a8ff | 97 | [..] |
bogdanm | 0:9b334a45a8ff | 98 | (+) To enable the DMA mode, use the HAL_ADC_Start_DMA() function. |
bogdanm | 0:9b334a45a8ff | 99 | (+) To enable the generation of DMA requests continuously at the end of |
bogdanm | 0:9b334a45a8ff | 100 | the last DMA transfer, set .Init.DMAContinuousRequests to ENABLE and |
bogdanm | 0:9b334a45a8ff | 101 | call HAL_ADC_Init() function. |
bogdanm | 0:9b334a45a8ff | 102 | |
bogdanm | 0:9b334a45a8ff | 103 | |
bogdanm | 0:9b334a45a8ff | 104 | @endverbatim |
bogdanm | 0:9b334a45a8ff | 105 | ****************************************************************************** |
bogdanm | 0:9b334a45a8ff | 106 | * @attention |
bogdanm | 0:9b334a45a8ff | 107 | * |
bogdanm | 0:9b334a45a8ff | 108 | * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> |
bogdanm | 0:9b334a45a8ff | 109 | * |
bogdanm | 0:9b334a45a8ff | 110 | * Redistribution and use in source and binary forms, with or without modification, |
bogdanm | 0:9b334a45a8ff | 111 | * are permitted provided that the following conditions are met: |
bogdanm | 0:9b334a45a8ff | 112 | * 1. Redistributions of source code must retain the above copyright notice, |
bogdanm | 0:9b334a45a8ff | 113 | * this list of conditions and the following disclaimer. |
bogdanm | 0:9b334a45a8ff | 114 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
bogdanm | 0:9b334a45a8ff | 115 | * this list of conditions and the following disclaimer in the documentation |
bogdanm | 0:9b334a45a8ff | 116 | * and/or other materials provided with the distribution. |
bogdanm | 0:9b334a45a8ff | 117 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
bogdanm | 0:9b334a45a8ff | 118 | * may be used to endorse or promote products derived from this software |
bogdanm | 0:9b334a45a8ff | 119 | * without specific prior written permission. |
bogdanm | 0:9b334a45a8ff | 120 | * |
bogdanm | 0:9b334a45a8ff | 121 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
bogdanm | 0:9b334a45a8ff | 122 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
bogdanm | 0:9b334a45a8ff | 123 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
bogdanm | 0:9b334a45a8ff | 124 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
bogdanm | 0:9b334a45a8ff | 125 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
bogdanm | 0:9b334a45a8ff | 126 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
bogdanm | 0:9b334a45a8ff | 127 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
bogdanm | 0:9b334a45a8ff | 128 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
bogdanm | 0:9b334a45a8ff | 129 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
bogdanm | 0:9b334a45a8ff | 130 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
bogdanm | 0:9b334a45a8ff | 131 | * |
bogdanm | 0:9b334a45a8ff | 132 | ****************************************************************************** |
bogdanm | 0:9b334a45a8ff | 133 | */ |
bogdanm | 0:9b334a45a8ff | 134 | |
bogdanm | 0:9b334a45a8ff | 135 | /* Includes ------------------------------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 136 | #include "stm32l0xx_hal.h" |
bogdanm | 0:9b334a45a8ff | 137 | |
bogdanm | 0:9b334a45a8ff | 138 | /** @addtogroup STM32L0xx_HAL_Driver |
bogdanm | 0:9b334a45a8ff | 139 | * @{ |
bogdanm | 0:9b334a45a8ff | 140 | */ |
bogdanm | 0:9b334a45a8ff | 141 | |
bogdanm | 0:9b334a45a8ff | 142 | /** @addtogroup ADC |
bogdanm | 0:9b334a45a8ff | 143 | * @brief ADC driver modules |
bogdanm | 0:9b334a45a8ff | 144 | * @{ |
bogdanm | 0:9b334a45a8ff | 145 | */ |
bogdanm | 0:9b334a45a8ff | 146 | |
bogdanm | 0:9b334a45a8ff | 147 | #ifdef HAL_ADC_MODULE_ENABLED |
bogdanm | 0:9b334a45a8ff | 148 | |
bogdanm | 0:9b334a45a8ff | 149 | /* Private typedef -----------------------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 150 | /* Private define ------------------------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 151 | |
bogdanm | 0:9b334a45a8ff | 152 | /* Delay for ADC stabilization time. */ |
bogdanm | 0:9b334a45a8ff | 153 | /* Maximum delay is 1us (refer to device datasheet, parameter tSTART). */ |
bogdanm | 0:9b334a45a8ff | 154 | /* Unit: us */ |
bogdanm | 0:9b334a45a8ff | 155 | #define ADC_STAB_DELAY_US ((uint32_t) 1) |
bogdanm | 0:9b334a45a8ff | 156 | |
bogdanm | 0:9b334a45a8ff | 157 | /* Delay for temperature sensor stabilization time. */ |
bogdanm | 0:9b334a45a8ff | 158 | /* Maximum delay is 10us (refer to device datasheet, parameter tSTART). */ |
bogdanm | 0:9b334a45a8ff | 159 | /* Unit: us */ |
bogdanm | 0:9b334a45a8ff | 160 | #define ADC_TEMPSENSOR_DELAY_US ((uint32_t) 10) |
bogdanm | 0:9b334a45a8ff | 161 | |
bogdanm | 0:9b334a45a8ff | 162 | /* Private macro -------------------------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 163 | /* Private variables ---------------------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 164 | /* Private function prototypes -----------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 165 | static HAL_StatusTypeDef ADC_Enable(ADC_HandleTypeDef* hadc); |
bogdanm | 0:9b334a45a8ff | 166 | static void ADC_DMAConvCplt(DMA_HandleTypeDef *hdma); |
bogdanm | 0:9b334a45a8ff | 167 | static void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma); |
bogdanm | 0:9b334a45a8ff | 168 | static void ADC_DMAError(DMA_HandleTypeDef *hdma); |
bogdanm | 0:9b334a45a8ff | 169 | static HAL_StatusTypeDef ADC_ConversionStop(ADC_HandleTypeDef* hadc, uint32_t ConversionGroup); |
bogdanm | 0:9b334a45a8ff | 170 | static HAL_StatusTypeDef ADC_Disable(ADC_HandleTypeDef* hadc); |
bogdanm | 0:9b334a45a8ff | 171 | static void ADC_DelayMicroSecond(uint32_t microSecond); |
bogdanm | 0:9b334a45a8ff | 172 | |
bogdanm | 0:9b334a45a8ff | 173 | /* Private functions ---------------------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 174 | |
bogdanm | 0:9b334a45a8ff | 175 | /** @defgroup ADC_Private_Functions |
bogdanm | 0:9b334a45a8ff | 176 | * @{ |
bogdanm | 0:9b334a45a8ff | 177 | */ |
bogdanm | 0:9b334a45a8ff | 178 | |
bogdanm | 0:9b334a45a8ff | 179 | /** @defgroup ADC_Group1 Initialization/de-initialization functions |
bogdanm | 0:9b334a45a8ff | 180 | * @brief Initialization and Configuration functions |
bogdanm | 0:9b334a45a8ff | 181 | * |
bogdanm | 0:9b334a45a8ff | 182 | @verbatim |
bogdanm | 0:9b334a45a8ff | 183 | =============================================================================== |
bogdanm | 0:9b334a45a8ff | 184 | ##### Initialization and de-initialization functions ##### |
bogdanm | 0:9b334a45a8ff | 185 | =============================================================================== |
bogdanm | 0:9b334a45a8ff | 186 | [..] This section provides functions allowing to: |
bogdanm | 0:9b334a45a8ff | 187 | (+) Initialize and configure the ADC. |
bogdanm | 0:9b334a45a8ff | 188 | (+) De-initialize the ADC. |
bogdanm | 0:9b334a45a8ff | 189 | |
bogdanm | 0:9b334a45a8ff | 190 | @endverbatim |
bogdanm | 0:9b334a45a8ff | 191 | * @{ |
bogdanm | 0:9b334a45a8ff | 192 | */ |
bogdanm | 0:9b334a45a8ff | 193 | |
bogdanm | 0:9b334a45a8ff | 194 | |
bogdanm | 0:9b334a45a8ff | 195 | /** |
bogdanm | 0:9b334a45a8ff | 196 | * @brief Initializes the ADCx peripheral according to the specified parameters |
bogdanm | 0:9b334a45a8ff | 197 | * in the ADC_InitStruct. |
bogdanm | 0:9b334a45a8ff | 198 | * @note This function is used to configure the global features of the ADC |
bogdanm | 0:9b334a45a8ff | 199 | * (ClockPrescaler, Resolution, Data Alignment and number of conversion), however, |
bogdanm | 0:9b334a45a8ff | 200 | * the rest of the configuration parameters are specific to the regular |
bogdanm | 0:9b334a45a8ff | 201 | * channels group (scan mode activation, continuous mode activation, |
bogdanm | 0:9b334a45a8ff | 202 | * External trigger source and edge, DMA continuous request after the |
bogdanm | 0:9b334a45a8ff | 203 | * last transfer and End of conversion selection). |
bogdanm | 0:9b334a45a8ff | 204 | * |
bogdanm | 0:9b334a45a8ff | 205 | * As prerequisite, into HAL_ADC_MspInit(), ADC clock must be |
bogdanm | 0:9b334a45a8ff | 206 | * configured at RCC top level. |
bogdanm | 0:9b334a45a8ff | 207 | * See commented example code below that can be copied |
bogdanm | 0:9b334a45a8ff | 208 | * and uncommented into HAL_ADC_MspInit(). |
bogdanm | 0:9b334a45a8ff | 209 | * |
bogdanm | 0:9b334a45a8ff | 210 | * @param hadc: pointer to a ADC_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 211 | * the configuration information for the specified ADC. |
bogdanm | 0:9b334a45a8ff | 212 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 213 | */ |
bogdanm | 0:9b334a45a8ff | 214 | HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc) |
bogdanm | 0:9b334a45a8ff | 215 | { |
bogdanm | 0:9b334a45a8ff | 216 | uint32_t tickstart = 0x00; |
bogdanm | 0:9b334a45a8ff | 217 | |
bogdanm | 0:9b334a45a8ff | 218 | /* Check ADC handle */ |
bogdanm | 0:9b334a45a8ff | 219 | if(hadc == NULL) |
bogdanm | 0:9b334a45a8ff | 220 | { |
bogdanm | 0:9b334a45a8ff | 221 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 222 | } |
bogdanm | 0:9b334a45a8ff | 223 | |
bogdanm | 0:9b334a45a8ff | 224 | /* Check the parameters */ |
bogdanm | 0:9b334a45a8ff | 225 | assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); |
bogdanm | 0:9b334a45a8ff | 226 | assert_param(IS_ADC_CLOCKPRESCALER(hadc->Init.ClockPrescaler)); |
bogdanm | 0:9b334a45a8ff | 227 | assert_param(IS_ADC_RESOLUTION(hadc->Init.Resolution)); |
bogdanm | 0:9b334a45a8ff | 228 | assert_param(IS_ADC_SAMPLE_TIME(hadc->Init.SamplingTime)); |
bogdanm | 0:9b334a45a8ff | 229 | assert_param(IS_ADC_SCAN_MODE(hadc->Init.ScanConvMode)); |
bogdanm | 0:9b334a45a8ff | 230 | assert_param(IS_ADC_DATA_ALIGN(hadc->Init.DataAlign)); |
bogdanm | 0:9b334a45a8ff | 231 | assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode)); |
bogdanm | 0:9b334a45a8ff | 232 | assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DiscontinuousConvMode)); |
bogdanm | 0:9b334a45a8ff | 233 | assert_param(IS_ADC_EXTTRIG_EDGE(hadc->Init.ExternalTrigConvEdge)); |
bogdanm | 0:9b334a45a8ff | 234 | assert_param(IS_ADC_EXTERNAL_TRIG_CONV(hadc->Init.ExternalTrigConv)); |
bogdanm | 0:9b334a45a8ff | 235 | assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DMAContinuousRequests)); |
bogdanm | 0:9b334a45a8ff | 236 | assert_param(IS_ADC_EOC_SELECTION(hadc->Init.EOCSelection)); |
bogdanm | 0:9b334a45a8ff | 237 | assert_param(IS_ADC_OVERRUN(hadc->Init.Overrun)); |
bogdanm | 0:9b334a45a8ff | 238 | assert_param(IS_FUNCTIONAL_STATE(hadc->Init.LowPowerAutoWait)); |
bogdanm | 0:9b334a45a8ff | 239 | assert_param(IS_FUNCTIONAL_STATE(hadc->Init.LowPowerFrequencyMode)); |
bogdanm | 0:9b334a45a8ff | 240 | assert_param(IS_FUNCTIONAL_STATE(hadc->Init.LowPowerAutoPowerOff)); |
bogdanm | 0:9b334a45a8ff | 241 | assert_param(IS_FUNCTIONAL_STATE(hadc->Init.OversamplingMode)); |
bogdanm | 0:9b334a45a8ff | 242 | |
bogdanm | 0:9b334a45a8ff | 243 | if(hadc->State == HAL_ADC_STATE_RESET) |
bogdanm | 0:9b334a45a8ff | 244 | { |
bogdanm | 0:9b334a45a8ff | 245 | /* Init the low level hardware */ |
bogdanm | 0:9b334a45a8ff | 246 | HAL_ADC_MspInit(hadc); |
bogdanm | 0:9b334a45a8ff | 247 | } |
bogdanm | 0:9b334a45a8ff | 248 | |
bogdanm | 0:9b334a45a8ff | 249 | /* Configuration of ADC parameters if previous preliminary actions are */ |
bogdanm | 0:9b334a45a8ff | 250 | /* correctly completed. */ |
bogdanm | 0:9b334a45a8ff | 251 | /* and if there is no conversion on going (ADC can be enabled anyway, */ |
bogdanm | 0:9b334a45a8ff | 252 | /* in case of call of this function to update a parameter */ |
bogdanm | 0:9b334a45a8ff | 253 | /* on the fly). */ |
bogdanm | 0:9b334a45a8ff | 254 | if ((hadc->State == HAL_ADC_STATE_ERROR) || |
bogdanm | 0:9b334a45a8ff | 255 | (ADC_IS_CONVERSION_ONGOING(hadc) != RESET) ) |
bogdanm | 0:9b334a45a8ff | 256 | { |
bogdanm | 0:9b334a45a8ff | 257 | /* Update ADC state machine to error */ |
bogdanm | 0:9b334a45a8ff | 258 | hadc->State = HAL_ADC_STATE_ERROR; |
bogdanm | 0:9b334a45a8ff | 259 | /* Process unlocked */ |
bogdanm | 0:9b334a45a8ff | 260 | __HAL_UNLOCK(hadc); |
bogdanm | 0:9b334a45a8ff | 261 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 262 | } |
bogdanm | 0:9b334a45a8ff | 263 | |
bogdanm | 0:9b334a45a8ff | 264 | /* Initialize the ADC state */ |
bogdanm | 0:9b334a45a8ff | 265 | hadc->State = HAL_ADC_STATE_BUSY; |
bogdanm | 0:9b334a45a8ff | 266 | |
bogdanm | 0:9b334a45a8ff | 267 | /* Configuration of ADC clock: clock source PCLK or asynchronous with |
bogdanm | 0:9b334a45a8ff | 268 | selectable prescaler */ |
bogdanm | 0:9b334a45a8ff | 269 | __HAL_ADC_CLOCK_PRESCALER(hadc); |
bogdanm | 0:9b334a45a8ff | 270 | |
bogdanm | 0:9b334a45a8ff | 271 | /* Set the Low Frequency mode */ |
bogdanm | 0:9b334a45a8ff | 272 | ADC->CCR &= (uint32_t)~ADC_CCR_LFMEN; |
bogdanm | 0:9b334a45a8ff | 273 | ADC->CCR |=__HAL_ADC_CCR_LOWFREQUENCY(hadc->Init.LowPowerFrequencyMode); |
bogdanm | 0:9b334a45a8ff | 274 | |
bogdanm | 0:9b334a45a8ff | 275 | /* Enable voltage regulator (if disabled at this step) */ |
bogdanm | 0:9b334a45a8ff | 276 | if (HAL_IS_BIT_CLR(hadc->Instance->CR, ADC_CR_ADVREGEN)) |
bogdanm | 0:9b334a45a8ff | 277 | { |
bogdanm | 0:9b334a45a8ff | 278 | /* Disable the ADC (if not already disabled) */ |
bogdanm | 0:9b334a45a8ff | 279 | if (ADC_IS_ENABLE(hadc) != RESET ) |
bogdanm | 0:9b334a45a8ff | 280 | { |
bogdanm | 0:9b334a45a8ff | 281 | /* Check if conditions to disable the ADC are fulfilled */ |
bogdanm | 0:9b334a45a8ff | 282 | if (ADC_DISABLING_CONDITIONS(hadc) != RESET) |
bogdanm | 0:9b334a45a8ff | 283 | { |
bogdanm | 0:9b334a45a8ff | 284 | __HAL_ADC_DISABLE(hadc); |
bogdanm | 0:9b334a45a8ff | 285 | } |
bogdanm | 0:9b334a45a8ff | 286 | else |
bogdanm | 0:9b334a45a8ff | 287 | { |
bogdanm | 0:9b334a45a8ff | 288 | hadc->State= HAL_ADC_STATE_ERROR; |
bogdanm | 0:9b334a45a8ff | 289 | |
bogdanm | 0:9b334a45a8ff | 290 | /* Process unlocked */ |
bogdanm | 0:9b334a45a8ff | 291 | __HAL_UNLOCK(hadc); |
bogdanm | 0:9b334a45a8ff | 292 | |
bogdanm | 0:9b334a45a8ff | 293 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 294 | } |
bogdanm | 0:9b334a45a8ff | 295 | |
bogdanm | 0:9b334a45a8ff | 296 | /* Get timeout */ |
bogdanm | 0:9b334a45a8ff | 297 | tickstart = HAL_GetTick(); |
bogdanm | 0:9b334a45a8ff | 298 | |
bogdanm | 0:9b334a45a8ff | 299 | /* Wait for disabling completion */ |
bogdanm | 0:9b334a45a8ff | 300 | while(HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADEN)) |
bogdanm | 0:9b334a45a8ff | 301 | { |
bogdanm | 0:9b334a45a8ff | 302 | /* Check for the Timeout */ |
bogdanm | 0:9b334a45a8ff | 303 | if(ADC_ENABLE_TIMEOUT != HAL_MAX_DELAY) |
bogdanm | 0:9b334a45a8ff | 304 | { |
bogdanm | 0:9b334a45a8ff | 305 | if((HAL_GetTick() - tickstart ) > ADC_DISABLE_TIMEOUT) |
bogdanm | 0:9b334a45a8ff | 306 | { |
bogdanm | 0:9b334a45a8ff | 307 | hadc->State= HAL_ADC_STATE_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 308 | |
bogdanm | 0:9b334a45a8ff | 309 | /* Process unlocked */ |
bogdanm | 0:9b334a45a8ff | 310 | __HAL_UNLOCK(hadc); |
bogdanm | 0:9b334a45a8ff | 311 | |
bogdanm | 0:9b334a45a8ff | 312 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 313 | } |
bogdanm | 0:9b334a45a8ff | 314 | } |
bogdanm | 0:9b334a45a8ff | 315 | } |
bogdanm | 0:9b334a45a8ff | 316 | |
bogdanm | 0:9b334a45a8ff | 317 | } |
bogdanm | 0:9b334a45a8ff | 318 | |
bogdanm | 0:9b334a45a8ff | 319 | /* Set ADVREGEN bit */ |
bogdanm | 0:9b334a45a8ff | 320 | hadc->Instance->CR |= ADC_CR_ADVREGEN; |
bogdanm | 0:9b334a45a8ff | 321 | } |
bogdanm | 0:9b334a45a8ff | 322 | |
bogdanm | 0:9b334a45a8ff | 323 | /* Configuration of ADC: */ |
bogdanm | 0:9b334a45a8ff | 324 | /* - Resolution */ |
bogdanm | 0:9b334a45a8ff | 325 | /* - Data alignment */ |
bogdanm | 0:9b334a45a8ff | 326 | /* - Scan direction */ |
bogdanm | 0:9b334a45a8ff | 327 | /* - External trigger to start conversion */ |
bogdanm | 0:9b334a45a8ff | 328 | /* - External trigger polarity */ |
bogdanm | 0:9b334a45a8ff | 329 | /* - Continuous conversion mode */ |
bogdanm | 0:9b334a45a8ff | 330 | /* - DMA continuous request */ |
bogdanm | 0:9b334a45a8ff | 331 | /* - Overrun */ |
bogdanm | 0:9b334a45a8ff | 332 | /* - AutoDelay feature */ |
bogdanm | 0:9b334a45a8ff | 333 | /* - Discontinuous mode */ |
bogdanm | 0:9b334a45a8ff | 334 | hadc->Instance->CFGR1 &= ~( ADC_CFGR1_RES | |
bogdanm | 0:9b334a45a8ff | 335 | ADC_CFGR1_ALIGN | |
bogdanm | 0:9b334a45a8ff | 336 | ADC_CFGR1_SCANDIR | |
bogdanm | 0:9b334a45a8ff | 337 | ADC_CFGR1_EXTSEL | |
bogdanm | 0:9b334a45a8ff | 338 | ADC_CFGR1_EXTEN | |
bogdanm | 0:9b334a45a8ff | 339 | ADC_CFGR1_CONT | |
bogdanm | 0:9b334a45a8ff | 340 | ADC_CFGR1_DMACFG | |
bogdanm | 0:9b334a45a8ff | 341 | ADC_CFGR1_OVRMOD | |
bogdanm | 0:9b334a45a8ff | 342 | ADC_CFGR1_AUTDLY | |
bogdanm | 0:9b334a45a8ff | 343 | ADC_CFGR1_AUTOFF | |
bogdanm | 0:9b334a45a8ff | 344 | ADC_CFGR1_DISCEN); |
bogdanm | 0:9b334a45a8ff | 345 | |
bogdanm | 0:9b334a45a8ff | 346 | hadc->Instance->CFGR1 |= ( hadc->Init.Resolution | |
bogdanm | 0:9b334a45a8ff | 347 | hadc->Init.DataAlign | |
bogdanm | 0:9b334a45a8ff | 348 | ADC_SCANDIR(hadc->Init.ScanConvMode) | |
bogdanm | 0:9b334a45a8ff | 349 | hadc->Init.ExternalTrigConvEdge | |
bogdanm | 0:9b334a45a8ff | 350 | ADC_CONTINUOUS(hadc->Init.ContinuousConvMode) | |
bogdanm | 0:9b334a45a8ff | 351 | ADC_DMACONTREQ(hadc->Init.DMAContinuousRequests) | |
bogdanm | 0:9b334a45a8ff | 352 | hadc->Init.Overrun | |
bogdanm | 0:9b334a45a8ff | 353 | __HAL_ADC_CFGR1_AutoDelay(hadc->Init.LowPowerAutoWait) | |
bogdanm | 0:9b334a45a8ff | 354 | __HAL_ADC_CFGR1_AUTOFF(hadc->Init.LowPowerAutoPowerOff)); |
bogdanm | 0:9b334a45a8ff | 355 | |
bogdanm | 0:9b334a45a8ff | 356 | /* Configure the external trigger only if Conversion edge is not "NONE" */ |
bogdanm | 0:9b334a45a8ff | 357 | if (hadc->Init.ExternalTrigConvEdge != ADC_EXTERNALTRIGCONVEDGE_NONE) |
bogdanm | 0:9b334a45a8ff | 358 | { |
bogdanm | 0:9b334a45a8ff | 359 | hadc->Instance->CFGR1 |= hadc->Init.ExternalTrigConv; |
bogdanm | 0:9b334a45a8ff | 360 | } |
bogdanm | 0:9b334a45a8ff | 361 | |
bogdanm | 0:9b334a45a8ff | 362 | /* Enable discontinuous mode only if continuous mode is disabled */ |
bogdanm | 0:9b334a45a8ff | 363 | if ((hadc->Init.DiscontinuousConvMode == ENABLE) && (hadc->Init.ContinuousConvMode == DISABLE)) |
bogdanm | 0:9b334a45a8ff | 364 | { |
bogdanm | 0:9b334a45a8ff | 365 | /* Enable the selected ADC discontinuous mode */ |
bogdanm | 0:9b334a45a8ff | 366 | hadc->Instance->CFGR1 |= ( ADC_CFGR1_DISCEN); |
bogdanm | 0:9b334a45a8ff | 367 | } |
bogdanm | 0:9b334a45a8ff | 368 | |
bogdanm | 0:9b334a45a8ff | 369 | if (hadc->Init.OversamplingMode == ENABLE) |
bogdanm | 0:9b334a45a8ff | 370 | { |
bogdanm | 0:9b334a45a8ff | 371 | assert_param(IS_ADC_OVERSAMPLING_RATIO(hadc->Init.Oversample.Ratio)); |
bogdanm | 0:9b334a45a8ff | 372 | assert_param(IS_ADC_RIGHT_BIT_SHIFT(hadc->Init.Oversample.RightBitShift)); |
bogdanm | 0:9b334a45a8ff | 373 | assert_param(IS_ADC_TRIGGERED_OVERSAMPLING_MODE(hadc->Init.Oversample.TriggeredMode)); |
bogdanm | 0:9b334a45a8ff | 374 | |
bogdanm | 0:9b334a45a8ff | 375 | /* Configuration of Oversampler: */ |
bogdanm | 0:9b334a45a8ff | 376 | /* - Oversampling Ratio */ |
bogdanm | 0:9b334a45a8ff | 377 | /* - Right bit shift */ |
bogdanm | 0:9b334a45a8ff | 378 | /* - Triggered mode */ |
bogdanm | 0:9b334a45a8ff | 379 | |
bogdanm | 0:9b334a45a8ff | 380 | hadc->Instance->CFGR2 &= ~( ADC_CFGR2_OVSR | |
bogdanm | 0:9b334a45a8ff | 381 | ADC_CFGR2_OVSS | |
bogdanm | 0:9b334a45a8ff | 382 | ADC_CFGR2_TOVS ); |
bogdanm | 0:9b334a45a8ff | 383 | |
bogdanm | 0:9b334a45a8ff | 384 | hadc->Instance->CFGR2 |= ( hadc->Init.Oversample.Ratio | |
bogdanm | 0:9b334a45a8ff | 385 | hadc->Init.Oversample.RightBitShift | |
bogdanm | 0:9b334a45a8ff | 386 | hadc->Init.Oversample.TriggeredMode ); |
bogdanm | 0:9b334a45a8ff | 387 | |
bogdanm | 0:9b334a45a8ff | 388 | /* Enable OverSampling mode */ |
bogdanm | 0:9b334a45a8ff | 389 | hadc->Instance->CFGR2 |= ADC_CFGR2_OVSE; |
bogdanm | 0:9b334a45a8ff | 390 | } |
bogdanm | 0:9b334a45a8ff | 391 | else |
bogdanm | 0:9b334a45a8ff | 392 | { |
bogdanm | 0:9b334a45a8ff | 393 | /* Disable OverSampling mode */ |
bogdanm | 0:9b334a45a8ff | 394 | hadc->Instance->CFGR2 &= ~ADC_CFGR2_OVSE; |
bogdanm | 0:9b334a45a8ff | 395 | } |
bogdanm | 0:9b334a45a8ff | 396 | |
bogdanm | 0:9b334a45a8ff | 397 | /* Clear the old sampling time */ |
bogdanm | 0:9b334a45a8ff | 398 | hadc->Instance->SMPR &= (uint32_t)(~ADC_SMPR_SMPR); |
bogdanm | 0:9b334a45a8ff | 399 | |
bogdanm | 0:9b334a45a8ff | 400 | /* Set the new sample time */ |
bogdanm | 0:9b334a45a8ff | 401 | hadc->Instance->SMPR |= hadc->Init.SamplingTime; |
bogdanm | 0:9b334a45a8ff | 402 | |
bogdanm | 0:9b334a45a8ff | 403 | |
bogdanm | 0:9b334a45a8ff | 404 | /* Set ADC error code to none */ |
bogdanm | 0:9b334a45a8ff | 405 | hadc->ErrorCode = HAL_ADC_ERROR_NONE; |
bogdanm | 0:9b334a45a8ff | 406 | |
bogdanm | 0:9b334a45a8ff | 407 | /* Initialize the ADC state */ |
bogdanm | 0:9b334a45a8ff | 408 | hadc->State = HAL_ADC_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 409 | |
bogdanm | 0:9b334a45a8ff | 410 | /* Return function status */ |
bogdanm | 0:9b334a45a8ff | 411 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 412 | } |
bogdanm | 0:9b334a45a8ff | 413 | |
bogdanm | 0:9b334a45a8ff | 414 | /** |
bogdanm | 0:9b334a45a8ff | 415 | * @brief Deinitialize the ADC peripheral registers to its default reset values. |
bogdanm | 0:9b334a45a8ff | 416 | * @note To not impact other ADCs, reset of common ADC registers have been |
bogdanm | 0:9b334a45a8ff | 417 | * left commented below. |
bogdanm | 0:9b334a45a8ff | 418 | * If needed, the example code can be copied and uncommented into |
bogdanm | 0:9b334a45a8ff | 419 | * function HAL_ADC_MspDeInit(). |
bogdanm | 0:9b334a45a8ff | 420 | * @param hadc: pointer to a ADC_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 421 | * the configuration information for the specified ADC. |
bogdanm | 0:9b334a45a8ff | 422 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 423 | */ |
bogdanm | 0:9b334a45a8ff | 424 | HAL_StatusTypeDef HAL_ADC_DeInit(ADC_HandleTypeDef* hadc) |
bogdanm | 0:9b334a45a8ff | 425 | { |
bogdanm | 0:9b334a45a8ff | 426 | uint32_t tickstart = 0; |
bogdanm | 0:9b334a45a8ff | 427 | |
bogdanm | 0:9b334a45a8ff | 428 | /* Check ADC handle */ |
bogdanm | 0:9b334a45a8ff | 429 | if(hadc == NULL) |
bogdanm | 0:9b334a45a8ff | 430 | { |
bogdanm | 0:9b334a45a8ff | 431 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 432 | } |
bogdanm | 0:9b334a45a8ff | 433 | |
bogdanm | 0:9b334a45a8ff | 434 | /* Check the parameters */ |
bogdanm | 0:9b334a45a8ff | 435 | assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); |
bogdanm | 0:9b334a45a8ff | 436 | |
bogdanm | 0:9b334a45a8ff | 437 | /* Change ADC state */ |
bogdanm | 0:9b334a45a8ff | 438 | hadc->State = HAL_ADC_STATE_BUSY; |
bogdanm | 0:9b334a45a8ff | 439 | |
bogdanm | 0:9b334a45a8ff | 440 | /* Stop potential conversion ongoing */ |
bogdanm | 0:9b334a45a8ff | 441 | if (HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADSTART) && HAL_IS_BIT_CLR(hadc->Instance->CR, ADC_CR_ADDIS)) |
bogdanm | 0:9b334a45a8ff | 442 | { |
bogdanm | 0:9b334a45a8ff | 443 | /* Stop regular conversion */ |
bogdanm | 0:9b334a45a8ff | 444 | hadc->Instance->CR |= ADC_CR_ADSTP; |
bogdanm | 0:9b334a45a8ff | 445 | } |
bogdanm | 0:9b334a45a8ff | 446 | |
bogdanm | 0:9b334a45a8ff | 447 | /* Disable ADC: Solution to recover from an unknown ADC state (for example, */ |
bogdanm | 0:9b334a45a8ff | 448 | /* in case of forbidden action on register bits) */ |
bogdanm | 0:9b334a45a8ff | 449 | /* Procedure to disable the ADC peripheral: wait for conversions */ |
bogdanm | 0:9b334a45a8ff | 450 | /* effectively stopped, then disable ADC */ |
bogdanm | 0:9b334a45a8ff | 451 | /* 1. Wait until ADSTART = 0 */ |
bogdanm | 0:9b334a45a8ff | 452 | |
bogdanm | 0:9b334a45a8ff | 453 | /* Get timeout */ |
bogdanm | 0:9b334a45a8ff | 454 | tickstart = HAL_GetTick(); |
bogdanm | 0:9b334a45a8ff | 455 | |
bogdanm | 0:9b334a45a8ff | 456 | while(HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADSTART)) |
bogdanm | 0:9b334a45a8ff | 457 | { |
bogdanm | 0:9b334a45a8ff | 458 | /* Check for the Timeout */ |
bogdanm | 0:9b334a45a8ff | 459 | if(ADC_STOP_CONVERSION_TIMEOUT != HAL_MAX_DELAY) |
bogdanm | 0:9b334a45a8ff | 460 | { |
bogdanm | 0:9b334a45a8ff | 461 | if((HAL_GetTick() - tickstart ) > ADC_STOP_CONVERSION_TIMEOUT) |
bogdanm | 0:9b334a45a8ff | 462 | { |
bogdanm | 0:9b334a45a8ff | 463 | hadc->State= HAL_ADC_STATE_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 464 | |
bogdanm | 0:9b334a45a8ff | 465 | /* Process unlocked */ |
bogdanm | 0:9b334a45a8ff | 466 | __HAL_UNLOCK(hadc); |
bogdanm | 0:9b334a45a8ff | 467 | |
bogdanm | 0:9b334a45a8ff | 468 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 469 | } |
bogdanm | 0:9b334a45a8ff | 470 | } |
bogdanm | 0:9b334a45a8ff | 471 | } |
bogdanm | 0:9b334a45a8ff | 472 | |
bogdanm | 0:9b334a45a8ff | 473 | /* 2. Disable the ADC peripheral */ |
bogdanm | 0:9b334a45a8ff | 474 | __HAL_ADC_DISABLE(hadc); |
bogdanm | 0:9b334a45a8ff | 475 | |
bogdanm | 0:9b334a45a8ff | 476 | |
bogdanm | 0:9b334a45a8ff | 477 | /* Reset ADC registers****************/ |
bogdanm | 0:9b334a45a8ff | 478 | /* Reset register IER */ |
bogdanm | 0:9b334a45a8ff | 479 | __HAL_ADC_DISABLE_IT(hadc, (ADC_IT_AWD | ADC_IT_OVR | ADC_IT_EOCAL | ADC_IT_EOS | \ |
bogdanm | 0:9b334a45a8ff | 480 | ADC_IT_EOC | ADC_IT_RDY | ADC_IT_EOSMP )); |
bogdanm | 0:9b334a45a8ff | 481 | |
bogdanm | 0:9b334a45a8ff | 482 | /* Reset register ISR */ |
bogdanm | 0:9b334a45a8ff | 483 | __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_AWD | ADC_FLAG_EOCAL | ADC_FLAG_OVR | ADC_FLAG_EOS | \ |
bogdanm | 0:9b334a45a8ff | 484 | ADC_FLAG_EOC | ADC_FLAG_EOSMP | ADC_FLAG_RDY)); |
bogdanm | 0:9b334a45a8ff | 485 | |
bogdanm | 0:9b334a45a8ff | 486 | /* Reset register CR */ |
bogdanm | 0:9b334a45a8ff | 487 | /* Disable voltage regulator */ |
bogdanm | 0:9b334a45a8ff | 488 | /* Note: Regulator disable useful for power saving */ |
bogdanm | 0:9b334a45a8ff | 489 | /* Reset ADVREGEN bit */ |
bogdanm | 0:9b334a45a8ff | 490 | hadc->Instance->CR &= ~ADC_CR_ADVREGEN; |
bogdanm | 0:9b334a45a8ff | 491 | |
bogdanm | 0:9b334a45a8ff | 492 | /* Bits ADC_CR_ADSTP, ADC_CR_ADSTART are in access mode "read-set": no direct reset applicable */ |
bogdanm | 0:9b334a45a8ff | 493 | /* No action */ |
bogdanm | 0:9b334a45a8ff | 494 | |
bogdanm | 0:9b334a45a8ff | 495 | /* Reset register CFGR1 */ |
bogdanm | 0:9b334a45a8ff | 496 | hadc->Instance->CFGR1 &= ~(ADC_CFGR1_AWDCH | ADC_CFGR1_AWDEN | ADC_CFGR1_AWDSGL | \ |
bogdanm | 0:9b334a45a8ff | 497 | ADC_CFGR1_DISCEN | ADC_CFGR1_AUTOFF | ADC_CFGR1_AUTDLY | \ |
bogdanm | 0:9b334a45a8ff | 498 | ADC_CFGR1_CONT | ADC_CFGR1_OVRMOD | ADC_CFGR1_EXTEN | \ |
bogdanm | 0:9b334a45a8ff | 499 | ADC_CFGR1_EXTSEL | ADC_CFGR1_ALIGN | ADC_CFGR1_RES | \ |
bogdanm | 0:9b334a45a8ff | 500 | ADC_CFGR1_SCANDIR| ADC_CFGR1_DMACFG | ADC_CFGR1_DMAEN); |
bogdanm | 0:9b334a45a8ff | 501 | |
bogdanm | 0:9b334a45a8ff | 502 | /* Reset register CFGR2 */ |
bogdanm | 0:9b334a45a8ff | 503 | hadc->Instance->CFGR2 &= ~(ADC_CFGR2_TOVS | ADC_CFGR2_OVSS | ADC_CFGR2_OVSR | \ |
bogdanm | 0:9b334a45a8ff | 504 | ADC_CFGR2_OVSE | ADC_CFGR2_CKMODE ); |
bogdanm | 0:9b334a45a8ff | 505 | |
bogdanm | 0:9b334a45a8ff | 506 | /* Reset register SMPR */ |
bogdanm | 0:9b334a45a8ff | 507 | hadc->Instance->SMPR &= ~(ADC_SMPR_SMPR); |
bogdanm | 0:9b334a45a8ff | 508 | |
bogdanm | 0:9b334a45a8ff | 509 | /* Reset register TR */ |
bogdanm | 0:9b334a45a8ff | 510 | hadc->Instance->TR &= ~(ADC_TR_LT | ADC_TR_HT); |
bogdanm | 0:9b334a45a8ff | 511 | |
bogdanm | 0:9b334a45a8ff | 512 | /* Reset register CALFACT */ |
bogdanm | 0:9b334a45a8ff | 513 | hadc->Instance->CALFACT &= ~(ADC_CALFACT_CALFACT); |
bogdanm | 0:9b334a45a8ff | 514 | |
bogdanm | 0:9b334a45a8ff | 515 | /* Reset register DR */ |
bogdanm | 0:9b334a45a8ff | 516 | /* bits in access mode read only, no direct reset applicable*/ |
bogdanm | 0:9b334a45a8ff | 517 | |
bogdanm | 0:9b334a45a8ff | 518 | /* Reset register CALFACT */ |
bogdanm | 0:9b334a45a8ff | 519 | hadc->Instance->CALFACT &= ~(ADC_CALFACT_CALFACT); |
bogdanm | 0:9b334a45a8ff | 520 | |
bogdanm | 0:9b334a45a8ff | 521 | |
bogdanm | 0:9b334a45a8ff | 522 | /* DeInit the low level hardware */ |
bogdanm | 0:9b334a45a8ff | 523 | HAL_ADC_MspDeInit(hadc); |
bogdanm | 0:9b334a45a8ff | 524 | |
bogdanm | 0:9b334a45a8ff | 525 | /* Set ADC error code to none */ |
bogdanm | 0:9b334a45a8ff | 526 | hadc->ErrorCode = HAL_ADC_ERROR_NONE; |
bogdanm | 0:9b334a45a8ff | 527 | |
bogdanm | 0:9b334a45a8ff | 528 | /* Change ADC state */ |
bogdanm | 0:9b334a45a8ff | 529 | hadc->State = HAL_ADC_STATE_RESET; |
bogdanm | 0:9b334a45a8ff | 530 | |
bogdanm | 0:9b334a45a8ff | 531 | /* Return function status */ |
bogdanm | 0:9b334a45a8ff | 532 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 533 | } |
bogdanm | 0:9b334a45a8ff | 534 | |
bogdanm | 0:9b334a45a8ff | 535 | /** |
bogdanm | 0:9b334a45a8ff | 536 | * @brief Initializes the ADC MSP. |
bogdanm | 0:9b334a45a8ff | 537 | * @param hadc: pointer to a ADC_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 538 | * the configuration information for the specified ADC. |
bogdanm | 0:9b334a45a8ff | 539 | * @retval None |
bogdanm | 0:9b334a45a8ff | 540 | */ |
bogdanm | 0:9b334a45a8ff | 541 | __weak void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc) |
bogdanm | 0:9b334a45a8ff | 542 | { |
bogdanm | 0:9b334a45a8ff | 543 | /* NOTE : This function Should not be modified, when the callback is needed, |
bogdanm | 0:9b334a45a8ff | 544 | the HAL_ADC_MspInit could be implemented in the user file |
bogdanm | 0:9b334a45a8ff | 545 | */ |
bogdanm | 0:9b334a45a8ff | 546 | } |
bogdanm | 0:9b334a45a8ff | 547 | |
bogdanm | 0:9b334a45a8ff | 548 | /** |
bogdanm | 0:9b334a45a8ff | 549 | * @brief DeInitializes the ADC MSP. |
bogdanm | 0:9b334a45a8ff | 550 | * @param hadc: pointer to a ADC_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 551 | * the configuration information for the specified ADC. |
bogdanm | 0:9b334a45a8ff | 552 | * @retval None |
bogdanm | 0:9b334a45a8ff | 553 | */ |
bogdanm | 0:9b334a45a8ff | 554 | __weak void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc) |
bogdanm | 0:9b334a45a8ff | 555 | { |
bogdanm | 0:9b334a45a8ff | 556 | /* NOTE : This function Should not be modified, when the callback is needed, |
bogdanm | 0:9b334a45a8ff | 557 | the HAL_ADC_MspDeInit could be implemented in the user file |
bogdanm | 0:9b334a45a8ff | 558 | */ |
bogdanm | 0:9b334a45a8ff | 559 | } |
bogdanm | 0:9b334a45a8ff | 560 | |
bogdanm | 0:9b334a45a8ff | 561 | /** |
bogdanm | 0:9b334a45a8ff | 562 | * @} |
bogdanm | 0:9b334a45a8ff | 563 | */ |
bogdanm | 0:9b334a45a8ff | 564 | |
bogdanm | 0:9b334a45a8ff | 565 | /** @defgroup ADC_Group2 I/O operation functions |
bogdanm | 0:9b334a45a8ff | 566 | * @brief I/O operation functions |
bogdanm | 0:9b334a45a8ff | 567 | * |
bogdanm | 0:9b334a45a8ff | 568 | @verbatim |
bogdanm | 0:9b334a45a8ff | 569 | =============================================================================== |
bogdanm | 0:9b334a45a8ff | 570 | ##### IO operation functions ##### |
bogdanm | 0:9b334a45a8ff | 571 | =============================================================================== |
bogdanm | 0:9b334a45a8ff | 572 | [..] This section provides functions allowing to: |
bogdanm | 0:9b334a45a8ff | 573 | (+) Start conversion. |
bogdanm | 0:9b334a45a8ff | 574 | (+) Stop conversion. |
bogdanm | 0:9b334a45a8ff | 575 | (+) poll for conversion complete. |
bogdanm | 0:9b334a45a8ff | 576 | (+) poll for conversion event. |
bogdanm | 0:9b334a45a8ff | 577 | (+) Start conversion and enable interrupt. |
bogdanm | 0:9b334a45a8ff | 578 | (+) Stop conversion and disable interrupt. |
bogdanm | 0:9b334a45a8ff | 579 | (+) handle ADC interrupt request. |
bogdanm | 0:9b334a45a8ff | 580 | (+) Start conversion of regular channel and enable DMA transfer. |
bogdanm | 0:9b334a45a8ff | 581 | (+) Stop conversion of regular channel and disable DMA transfer. |
bogdanm | 0:9b334a45a8ff | 582 | (+) Get result of regular channel conversion. |
bogdanm | 0:9b334a45a8ff | 583 | (+) Handle ADC interrupt request. |
bogdanm | 0:9b334a45a8ff | 584 | |
bogdanm | 0:9b334a45a8ff | 585 | @endverbatim |
bogdanm | 0:9b334a45a8ff | 586 | * @{ |
bogdanm | 0:9b334a45a8ff | 587 | */ |
bogdanm | 0:9b334a45a8ff | 588 | |
bogdanm | 0:9b334a45a8ff | 589 | |
bogdanm | 0:9b334a45a8ff | 590 | /** |
bogdanm | 0:9b334a45a8ff | 591 | * @brief Enables ADC and starts conversion of the regular channels. |
bogdanm | 0:9b334a45a8ff | 592 | * @param hadc: pointer to a ADC_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 593 | * the configuration information for the specified ADC. |
bogdanm | 0:9b334a45a8ff | 594 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 595 | */ |
bogdanm | 0:9b334a45a8ff | 596 | HAL_StatusTypeDef HAL_ADC_Start(ADC_HandleTypeDef* hadc) |
bogdanm | 0:9b334a45a8ff | 597 | { |
bogdanm | 0:9b334a45a8ff | 598 | HAL_StatusTypeDef tmpHALStatus = HAL_OK; |
bogdanm | 0:9b334a45a8ff | 599 | |
bogdanm | 0:9b334a45a8ff | 600 | /* Check the parameters */ |
bogdanm | 0:9b334a45a8ff | 601 | assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); |
bogdanm | 0:9b334a45a8ff | 602 | |
bogdanm | 0:9b334a45a8ff | 603 | /* Perform ADC enable and conversion start if no conversion is on going */ |
bogdanm | 0:9b334a45a8ff | 604 | if (ADC_IS_CONVERSION_ONGOING(hadc) == RESET) |
bogdanm | 0:9b334a45a8ff | 605 | { |
bogdanm | 0:9b334a45a8ff | 606 | /* Process locked */ |
bogdanm | 0:9b334a45a8ff | 607 | __HAL_LOCK(hadc); |
bogdanm | 0:9b334a45a8ff | 608 | |
bogdanm | 0:9b334a45a8ff | 609 | /* Change ADC state */ |
bogdanm | 0:9b334a45a8ff | 610 | hadc->State = HAL_ADC_STATE_BUSY_REG; |
bogdanm | 0:9b334a45a8ff | 611 | |
bogdanm | 0:9b334a45a8ff | 612 | /* Set ADC error code to none */ |
bogdanm | 0:9b334a45a8ff | 613 | hadc->ErrorCode = HAL_ADC_ERROR_NONE; |
bogdanm | 0:9b334a45a8ff | 614 | |
bogdanm | 0:9b334a45a8ff | 615 | /* Enable the ADC peripheral */ |
bogdanm | 0:9b334a45a8ff | 616 | /* If low power mode AutoPowerOff is enabled, power-on/off phases are */ |
bogdanm | 0:9b334a45a8ff | 617 | /* performed automatically by hardware. */ |
bogdanm | 0:9b334a45a8ff | 618 | if (hadc->Init.LowPowerAutoPowerOff != ENABLE) |
bogdanm | 0:9b334a45a8ff | 619 | { |
bogdanm | 0:9b334a45a8ff | 620 | tmpHALStatus = ADC_Enable(hadc); |
bogdanm | 0:9b334a45a8ff | 621 | } |
bogdanm | 0:9b334a45a8ff | 622 | |
bogdanm | 0:9b334a45a8ff | 623 | /* Start conversion if ADC is effectively enabled */ |
bogdanm | 0:9b334a45a8ff | 624 | if (tmpHALStatus != HAL_ERROR) |
bogdanm | 0:9b334a45a8ff | 625 | { |
bogdanm | 0:9b334a45a8ff | 626 | /* ADC start conversion command */ |
bogdanm | 0:9b334a45a8ff | 627 | hadc->Instance->CR |= ADC_CR_ADSTART; |
bogdanm | 0:9b334a45a8ff | 628 | } |
bogdanm | 0:9b334a45a8ff | 629 | |
bogdanm | 0:9b334a45a8ff | 630 | /* Process unlocked */ |
bogdanm | 0:9b334a45a8ff | 631 | __HAL_UNLOCK(hadc); |
bogdanm | 0:9b334a45a8ff | 632 | } |
bogdanm | 0:9b334a45a8ff | 633 | else |
bogdanm | 0:9b334a45a8ff | 634 | { |
bogdanm | 0:9b334a45a8ff | 635 | tmpHALStatus = HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 636 | } |
bogdanm | 0:9b334a45a8ff | 637 | |
bogdanm | 0:9b334a45a8ff | 638 | /* Return function status */ |
bogdanm | 0:9b334a45a8ff | 639 | return tmpHALStatus; |
bogdanm | 0:9b334a45a8ff | 640 | } |
bogdanm | 0:9b334a45a8ff | 641 | |
bogdanm | 0:9b334a45a8ff | 642 | /** |
bogdanm | 0:9b334a45a8ff | 643 | * @brief Stop ADC conversion of regular channels, disable ADC peripheral. |
bogdanm | 0:9b334a45a8ff | 644 | * @param hadc: pointer to a ADC_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 645 | * the configuration information for the specified ADC. |
bogdanm | 0:9b334a45a8ff | 646 | * @retval None |
bogdanm | 0:9b334a45a8ff | 647 | */ |
bogdanm | 0:9b334a45a8ff | 648 | HAL_StatusTypeDef HAL_ADC_Stop(ADC_HandleTypeDef* hadc) |
bogdanm | 0:9b334a45a8ff | 649 | { |
bogdanm | 0:9b334a45a8ff | 650 | HAL_StatusTypeDef tmpHALStatus = HAL_OK; |
bogdanm | 0:9b334a45a8ff | 651 | |
bogdanm | 0:9b334a45a8ff | 652 | /* Process locked */ |
bogdanm | 0:9b334a45a8ff | 653 | __HAL_LOCK(hadc); |
bogdanm | 0:9b334a45a8ff | 654 | |
bogdanm | 0:9b334a45a8ff | 655 | /* 1. Stop potential conversion ongoing (regular conversion) */ |
bogdanm | 0:9b334a45a8ff | 656 | tmpHALStatus = ADC_ConversionStop(hadc, ADC_REGULAR_GROUP); |
bogdanm | 0:9b334a45a8ff | 657 | |
bogdanm | 0:9b334a45a8ff | 658 | /* 2. Disable ADC peripheral if conversions are effectively stopped */ |
bogdanm | 0:9b334a45a8ff | 659 | if (tmpHALStatus != HAL_ERROR) |
bogdanm | 0:9b334a45a8ff | 660 | { |
bogdanm | 0:9b334a45a8ff | 661 | /* Disable the ADC peripheral */ |
bogdanm | 0:9b334a45a8ff | 662 | tmpHALStatus = ADC_Disable(hadc); |
bogdanm | 0:9b334a45a8ff | 663 | |
bogdanm | 0:9b334a45a8ff | 664 | /* Check if ADC is effectively disabled */ |
bogdanm | 0:9b334a45a8ff | 665 | if ((hadc->State != HAL_ADC_STATE_ERROR) && (tmpHALStatus != HAL_ERROR)) |
bogdanm | 0:9b334a45a8ff | 666 | { |
bogdanm | 0:9b334a45a8ff | 667 | /* Change ADC state */ |
bogdanm | 0:9b334a45a8ff | 668 | hadc->State = HAL_ADC_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 669 | } |
bogdanm | 0:9b334a45a8ff | 670 | else |
bogdanm | 0:9b334a45a8ff | 671 | { |
bogdanm | 0:9b334a45a8ff | 672 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 673 | } |
bogdanm | 0:9b334a45a8ff | 674 | } |
bogdanm | 0:9b334a45a8ff | 675 | else |
bogdanm | 0:9b334a45a8ff | 676 | { |
bogdanm | 0:9b334a45a8ff | 677 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 678 | } |
bogdanm | 0:9b334a45a8ff | 679 | |
bogdanm | 0:9b334a45a8ff | 680 | /* Process unlocked */ |
bogdanm | 0:9b334a45a8ff | 681 | __HAL_UNLOCK(hadc); |
bogdanm | 0:9b334a45a8ff | 682 | |
bogdanm | 0:9b334a45a8ff | 683 | /* Return function status */ |
bogdanm | 0:9b334a45a8ff | 684 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 685 | } |
bogdanm | 0:9b334a45a8ff | 686 | |
bogdanm | 0:9b334a45a8ff | 687 | /** |
bogdanm | 0:9b334a45a8ff | 688 | * @brief Wait for regular group conversion to be completed. |
bogdanm | 0:9b334a45a8ff | 689 | * @note ADC conversion flags EOS (end of sequence) and EOC (end of |
bogdanm | 0:9b334a45a8ff | 690 | * conversion) are cleared by this function, with an exception: |
bogdanm | 0:9b334a45a8ff | 691 | * if low power feature "LowPowerAutoWait" is enabled, flags are |
bogdanm | 0:9b334a45a8ff | 692 | * not cleared to not interfere with this feature until data register |
bogdanm | 0:9b334a45a8ff | 693 | * is read using function HAL_ADC_GetValue(). |
bogdanm | 0:9b334a45a8ff | 694 | * @note This function cannot be used in a particular setup: ADC configured |
bogdanm | 0:9b334a45a8ff | 695 | * in DMA mode and polling for end of each conversion (ADC init |
bogdanm | 0:9b334a45a8ff | 696 | * parameter "EOCSelection" set to ADC_EOC_SINGLE_CONV). |
bogdanm | 0:9b334a45a8ff | 697 | * In this case, DMA resets the flag EOC and polling cannot be |
bogdanm | 0:9b334a45a8ff | 698 | * performed on each conversion. Nevertheless, polling can still |
bogdanm | 0:9b334a45a8ff | 699 | * be performed on the complete sequence. |
bogdanm | 0:9b334a45a8ff | 700 | * @param hadc: ADC handle |
bogdanm | 0:9b334a45a8ff | 701 | * @param Timeout: Timeout value in millisecond. |
bogdanm | 0:9b334a45a8ff | 702 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 703 | */ |
bogdanm | 0:9b334a45a8ff | 704 | HAL_StatusTypeDef HAL_ADC_PollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout) |
bogdanm | 0:9b334a45a8ff | 705 | { |
bogdanm | 0:9b334a45a8ff | 706 | uint32_t tickstart = 0; |
bogdanm | 0:9b334a45a8ff | 707 | uint32_t tmp_Flag_EOC; |
bogdanm | 0:9b334a45a8ff | 708 | |
bogdanm | 0:9b334a45a8ff | 709 | /* Check the parameters */ |
bogdanm | 0:9b334a45a8ff | 710 | assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); |
bogdanm | 0:9b334a45a8ff | 711 | |
bogdanm | 0:9b334a45a8ff | 712 | /* If end of conversion selected to end of sequence */ |
bogdanm | 0:9b334a45a8ff | 713 | if (hadc->Init.EOCSelection == ADC_EOC_SEQ_CONV) |
bogdanm | 0:9b334a45a8ff | 714 | { |
bogdanm | 0:9b334a45a8ff | 715 | tmp_Flag_EOC = ADC_FLAG_EOS; |
bogdanm | 0:9b334a45a8ff | 716 | } |
bogdanm | 0:9b334a45a8ff | 717 | /* If end of conversion selected to end of each conversion */ |
bogdanm | 0:9b334a45a8ff | 718 | else /* ADC_EOC_SINGLE_CONV */ |
bogdanm | 0:9b334a45a8ff | 719 | { |
bogdanm | 0:9b334a45a8ff | 720 | /* Verification that ADC configuration is compliant with polling for */ |
bogdanm | 0:9b334a45a8ff | 721 | /* each conversion: */ |
bogdanm | 0:9b334a45a8ff | 722 | /* Particular case is ADC configured in DMA mode and ADC sequencer with */ |
bogdanm | 0:9b334a45a8ff | 723 | /* several ranks and polling for end of each conversion. */ |
bogdanm | 0:9b334a45a8ff | 724 | /* For code simplicity sake, this particular case is generalized to */ |
bogdanm | 0:9b334a45a8ff | 725 | /* ADC configured in DMA mode and and polling for end of each conversion. */ |
bogdanm | 0:9b334a45a8ff | 726 | if (HAL_IS_BIT_SET(hadc->Instance->CFGR1, ADC_CFGR1_DMAEN)) |
bogdanm | 0:9b334a45a8ff | 727 | { |
bogdanm | 0:9b334a45a8ff | 728 | /* Update ADC state machine to error */ |
bogdanm | 0:9b334a45a8ff | 729 | hadc->State = HAL_ADC_STATE_ERROR; |
bogdanm | 0:9b334a45a8ff | 730 | |
bogdanm | 0:9b334a45a8ff | 731 | /* Process unlocked */ |
bogdanm | 0:9b334a45a8ff | 732 | __HAL_UNLOCK(hadc); |
bogdanm | 0:9b334a45a8ff | 733 | |
bogdanm | 0:9b334a45a8ff | 734 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 735 | } |
bogdanm | 0:9b334a45a8ff | 736 | else |
bogdanm | 0:9b334a45a8ff | 737 | { |
bogdanm | 0:9b334a45a8ff | 738 | tmp_Flag_EOC = (ADC_FLAG_EOC | ADC_FLAG_EOS); |
bogdanm | 0:9b334a45a8ff | 739 | } |
bogdanm | 0:9b334a45a8ff | 740 | } |
bogdanm | 0:9b334a45a8ff | 741 | |
bogdanm | 0:9b334a45a8ff | 742 | /* Get tick */ |
bogdanm | 0:9b334a45a8ff | 743 | tickstart = HAL_GetTick(); |
bogdanm | 0:9b334a45a8ff | 744 | |
bogdanm | 0:9b334a45a8ff | 745 | /* Wait until End of Conversion flag is raised */ |
bogdanm | 0:9b334a45a8ff | 746 | while(HAL_IS_BIT_CLR(hadc->Instance->ISR, tmp_Flag_EOC)) |
bogdanm | 0:9b334a45a8ff | 747 | { |
bogdanm | 0:9b334a45a8ff | 748 | /* Check if timeout is disabled (set to infinite wait) */ |
bogdanm | 0:9b334a45a8ff | 749 | if(Timeout != HAL_MAX_DELAY) |
bogdanm | 0:9b334a45a8ff | 750 | { |
bogdanm | 0:9b334a45a8ff | 751 | if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout)) |
bogdanm | 0:9b334a45a8ff | 752 | { |
bogdanm | 0:9b334a45a8ff | 753 | /* Update ADC state machine to timeout */ |
bogdanm | 0:9b334a45a8ff | 754 | hadc->State = HAL_ADC_STATE_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 755 | |
bogdanm | 0:9b334a45a8ff | 756 | /* Process unlocked */ |
bogdanm | 0:9b334a45a8ff | 757 | __HAL_UNLOCK(hadc); |
bogdanm | 0:9b334a45a8ff | 758 | |
bogdanm | 0:9b334a45a8ff | 759 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 760 | } |
bogdanm | 0:9b334a45a8ff | 761 | } |
bogdanm | 0:9b334a45a8ff | 762 | } |
bogdanm | 0:9b334a45a8ff | 763 | |
bogdanm | 0:9b334a45a8ff | 764 | /* Clear end of conversion flag of regular group if low power feature */ |
bogdanm | 0:9b334a45a8ff | 765 | /* "LowPowerAutoWait " is disabled, to not interfere with this feature */ |
bogdanm | 0:9b334a45a8ff | 766 | /* until data register is read using function HAL_ADC_GetValue(). */ |
bogdanm | 0:9b334a45a8ff | 767 | if (hadc->Init.LowPowerAutoWait == DISABLE) |
bogdanm | 0:9b334a45a8ff | 768 | { |
bogdanm | 0:9b334a45a8ff | 769 | /* Clear regular group conversion flag */ |
bogdanm | 0:9b334a45a8ff | 770 | __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS)); |
bogdanm | 0:9b334a45a8ff | 771 | } |
bogdanm | 0:9b334a45a8ff | 772 | |
bogdanm | 0:9b334a45a8ff | 773 | /* Update state machine on conversion status if not in error state */ |
bogdanm | 0:9b334a45a8ff | 774 | if(hadc->State != HAL_ADC_STATE_ERROR) |
bogdanm | 0:9b334a45a8ff | 775 | { |
bogdanm | 0:9b334a45a8ff | 776 | /* Change ADC state */ |
bogdanm | 0:9b334a45a8ff | 777 | hadc->State = HAL_ADC_STATE_EOC; |
bogdanm | 0:9b334a45a8ff | 778 | } |
bogdanm | 0:9b334a45a8ff | 779 | |
bogdanm | 0:9b334a45a8ff | 780 | /* Return ADC state */ |
bogdanm | 0:9b334a45a8ff | 781 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 782 | } |
bogdanm | 0:9b334a45a8ff | 783 | |
bogdanm | 0:9b334a45a8ff | 784 | /** |
bogdanm | 0:9b334a45a8ff | 785 | * @brief Poll for conversion event. |
bogdanm | 0:9b334a45a8ff | 786 | * @param hadc: ADC handle. |
bogdanm | 0:9b334a45a8ff | 787 | * @param EventType: the ADC event type. |
bogdanm | 0:9b334a45a8ff | 788 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 789 | * @arg ADC_AWD_EVENT: ADC Analog watchdog event. |
bogdanm | 0:9b334a45a8ff | 790 | * @arg ADC_OVR_EVENT: ADC Overrun event. |
bogdanm | 0:9b334a45a8ff | 791 | * @param Timeout: Timeout value in millisecond. |
bogdanm | 0:9b334a45a8ff | 792 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 793 | */ |
bogdanm | 0:9b334a45a8ff | 794 | HAL_StatusTypeDef HAL_ADC_PollForEvent(ADC_HandleTypeDef* hadc, uint32_t EventType, uint32_t Timeout) |
bogdanm | 0:9b334a45a8ff | 795 | { |
bogdanm | 0:9b334a45a8ff | 796 | uint32_t tickstart = 0; |
bogdanm | 0:9b334a45a8ff | 797 | |
bogdanm | 0:9b334a45a8ff | 798 | /* Check the parameters */ |
bogdanm | 0:9b334a45a8ff | 799 | assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); |
bogdanm | 0:9b334a45a8ff | 800 | assert_param(IS_ADC_EVENT_TYPE(EventType)); |
bogdanm | 0:9b334a45a8ff | 801 | |
bogdanm | 0:9b334a45a8ff | 802 | /* Get timeout */ |
bogdanm | 0:9b334a45a8ff | 803 | tickstart = HAL_GetTick(); |
bogdanm | 0:9b334a45a8ff | 804 | |
bogdanm | 0:9b334a45a8ff | 805 | /* Check selected event flag */ |
bogdanm | 0:9b334a45a8ff | 806 | while(!(__HAL_ADC_GET_FLAG(hadc,EventType))) |
bogdanm | 0:9b334a45a8ff | 807 | { |
bogdanm | 0:9b334a45a8ff | 808 | /* Check if timeout is disabled (set to infinite wait) */ |
bogdanm | 0:9b334a45a8ff | 809 | if(Timeout != HAL_MAX_DELAY) |
bogdanm | 0:9b334a45a8ff | 810 | { |
bogdanm | 0:9b334a45a8ff | 811 | if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout)) |
bogdanm | 0:9b334a45a8ff | 812 | { |
bogdanm | 0:9b334a45a8ff | 813 | /* Update ADC state machine to timeout */ |
bogdanm | 0:9b334a45a8ff | 814 | hadc->State = HAL_ADC_STATE_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 815 | |
bogdanm | 0:9b334a45a8ff | 816 | /* Process unlocked */ |
bogdanm | 0:9b334a45a8ff | 817 | __HAL_UNLOCK(hadc); |
bogdanm | 0:9b334a45a8ff | 818 | |
bogdanm | 0:9b334a45a8ff | 819 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 820 | } |
bogdanm | 0:9b334a45a8ff | 821 | } |
bogdanm | 0:9b334a45a8ff | 822 | } |
bogdanm | 0:9b334a45a8ff | 823 | |
bogdanm | 0:9b334a45a8ff | 824 | switch(EventType) |
bogdanm | 0:9b334a45a8ff | 825 | { |
bogdanm | 0:9b334a45a8ff | 826 | /* Check analog watchdog flag */ |
bogdanm | 0:9b334a45a8ff | 827 | case ADC_AWD_EVENT: |
bogdanm | 0:9b334a45a8ff | 828 | /* Change ADC state */ |
bogdanm | 0:9b334a45a8ff | 829 | hadc->State = HAL_ADC_STATE_AWD; |
bogdanm | 0:9b334a45a8ff | 830 | |
bogdanm | 0:9b334a45a8ff | 831 | /* Clear ADC analog watchdog flag */ |
bogdanm | 0:9b334a45a8ff | 832 | __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_AWD); |
bogdanm | 0:9b334a45a8ff | 833 | break; |
bogdanm | 0:9b334a45a8ff | 834 | |
bogdanm | 0:9b334a45a8ff | 835 | /* Case ADC_OVR_EVENT */ |
bogdanm | 0:9b334a45a8ff | 836 | default: |
bogdanm | 0:9b334a45a8ff | 837 | /* Change ADC state */ |
bogdanm | 0:9b334a45a8ff | 838 | hadc->State = HAL_ADC_STATE_ERROR; |
bogdanm | 0:9b334a45a8ff | 839 | |
bogdanm | 0:9b334a45a8ff | 840 | /* Clear ADC Overrun flag */ |
bogdanm | 0:9b334a45a8ff | 841 | __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_OVR); |
bogdanm | 0:9b334a45a8ff | 842 | break; |
bogdanm | 0:9b334a45a8ff | 843 | } |
bogdanm | 0:9b334a45a8ff | 844 | |
bogdanm | 0:9b334a45a8ff | 845 | /* Return ADC state */ |
bogdanm | 0:9b334a45a8ff | 846 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 847 | } |
bogdanm | 0:9b334a45a8ff | 848 | |
bogdanm | 0:9b334a45a8ff | 849 | /** |
bogdanm | 0:9b334a45a8ff | 850 | * @brief Enables the interrupt and starts ADC conversion of regular channels. |
bogdanm | 0:9b334a45a8ff | 851 | * @param hadc: pointer to a ADC_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 852 | * the configuration information for the specified ADC. |
bogdanm | 0:9b334a45a8ff | 853 | * @retval HAL status. |
bogdanm | 0:9b334a45a8ff | 854 | */ |
bogdanm | 0:9b334a45a8ff | 855 | HAL_StatusTypeDef HAL_ADC_Start_IT(ADC_HandleTypeDef* hadc) |
bogdanm | 0:9b334a45a8ff | 856 | { |
bogdanm | 0:9b334a45a8ff | 857 | HAL_StatusTypeDef tmpHALStatus = HAL_OK; |
bogdanm | 0:9b334a45a8ff | 858 | |
bogdanm | 0:9b334a45a8ff | 859 | /* Check the parameters */ |
bogdanm | 0:9b334a45a8ff | 860 | assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); |
bogdanm | 0:9b334a45a8ff | 861 | |
bogdanm | 0:9b334a45a8ff | 862 | /* Perform ADC enable and conversion start if no conversion is on going */ |
bogdanm | 0:9b334a45a8ff | 863 | if (ADC_IS_CONVERSION_ONGOING(hadc) == RESET) |
bogdanm | 0:9b334a45a8ff | 864 | { |
bogdanm | 0:9b334a45a8ff | 865 | /* Process locked */ |
bogdanm | 0:9b334a45a8ff | 866 | __HAL_LOCK(hadc); |
bogdanm | 0:9b334a45a8ff | 867 | |
bogdanm | 0:9b334a45a8ff | 868 | /* State machine update: Change ADC state */ |
bogdanm | 0:9b334a45a8ff | 869 | hadc->State = HAL_ADC_STATE_BUSY_REG; |
bogdanm | 0:9b334a45a8ff | 870 | |
bogdanm | 0:9b334a45a8ff | 871 | /* Set ADC error code to none */ |
bogdanm | 0:9b334a45a8ff | 872 | hadc->ErrorCode = HAL_ADC_ERROR_NONE; |
bogdanm | 0:9b334a45a8ff | 873 | |
bogdanm | 0:9b334a45a8ff | 874 | /* Enable the ADC peripheral */ |
bogdanm | 0:9b334a45a8ff | 875 | /* If low power mode AutoPowerOff is enabled, power-on/off phases are */ |
bogdanm | 0:9b334a45a8ff | 876 | /* performed automatically by hardware. */ |
bogdanm | 0:9b334a45a8ff | 877 | if (hadc->Init.LowPowerAutoPowerOff != ENABLE) |
bogdanm | 0:9b334a45a8ff | 878 | { |
bogdanm | 0:9b334a45a8ff | 879 | tmpHALStatus = ADC_Enable(hadc); |
bogdanm | 0:9b334a45a8ff | 880 | } |
bogdanm | 0:9b334a45a8ff | 881 | |
bogdanm | 0:9b334a45a8ff | 882 | /* Start conversion if ADC is effectively enabled */ |
bogdanm | 0:9b334a45a8ff | 883 | if (tmpHALStatus != HAL_ERROR) |
bogdanm | 0:9b334a45a8ff | 884 | { |
bogdanm | 0:9b334a45a8ff | 885 | /* Enable ADC overrun interrupt */ |
bogdanm | 0:9b334a45a8ff | 886 | __HAL_ADC_ENABLE_IT(hadc, ADC_IT_OVR); |
bogdanm | 0:9b334a45a8ff | 887 | |
bogdanm | 0:9b334a45a8ff | 888 | /* Enable ADC end of conversion interrupt */ |
bogdanm | 0:9b334a45a8ff | 889 | switch(hadc->Init.EOCSelection) |
bogdanm | 0:9b334a45a8ff | 890 | { |
bogdanm | 0:9b334a45a8ff | 891 | case ADC_EOC_SEQ_CONV: |
bogdanm | 0:9b334a45a8ff | 892 | __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC); |
bogdanm | 0:9b334a45a8ff | 893 | __HAL_ADC_ENABLE_IT(hadc, ADC_IT_EOS); |
bogdanm | 0:9b334a45a8ff | 894 | break; |
bogdanm | 0:9b334a45a8ff | 895 | /* case ADC_EOC_SINGLE_CONV */ |
bogdanm | 0:9b334a45a8ff | 896 | default: |
bogdanm | 0:9b334a45a8ff | 897 | __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOS); |
bogdanm | 0:9b334a45a8ff | 898 | __HAL_ADC_ENABLE_IT(hadc, ADC_IT_EOC); |
bogdanm | 0:9b334a45a8ff | 899 | break; |
bogdanm | 0:9b334a45a8ff | 900 | } |
bogdanm | 0:9b334a45a8ff | 901 | |
bogdanm | 0:9b334a45a8ff | 902 | /* ADC start conversion command */ |
bogdanm | 0:9b334a45a8ff | 903 | hadc->Instance->CR |= ADC_CR_ADSTART; |
bogdanm | 0:9b334a45a8ff | 904 | } |
bogdanm | 0:9b334a45a8ff | 905 | |
bogdanm | 0:9b334a45a8ff | 906 | else |
bogdanm | 0:9b334a45a8ff | 907 | { |
bogdanm | 0:9b334a45a8ff | 908 | tmpHALStatus = HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 909 | } |
bogdanm | 0:9b334a45a8ff | 910 | |
bogdanm | 0:9b334a45a8ff | 911 | /* Process unlocked */ |
bogdanm | 0:9b334a45a8ff | 912 | __HAL_UNLOCK(hadc); |
bogdanm | 0:9b334a45a8ff | 913 | } |
bogdanm | 0:9b334a45a8ff | 914 | else |
bogdanm | 0:9b334a45a8ff | 915 | { |
bogdanm | 0:9b334a45a8ff | 916 | tmpHALStatus = HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 917 | } |
bogdanm | 0:9b334a45a8ff | 918 | |
bogdanm | 0:9b334a45a8ff | 919 | /* Return function status */ |
bogdanm | 0:9b334a45a8ff | 920 | return tmpHALStatus; |
bogdanm | 0:9b334a45a8ff | 921 | } |
bogdanm | 0:9b334a45a8ff | 922 | |
bogdanm | 0:9b334a45a8ff | 923 | /** |
bogdanm | 0:9b334a45a8ff | 924 | * @brief Stop ADC conversion of regular channels, disable interruptions |
bogdanm | 0:9b334a45a8ff | 925 | * EOC/EOS/OVR, disable ADC peripheral. |
bogdanm | 0:9b334a45a8ff | 926 | * @param hadc: pointer to a ADC_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 927 | * the configuration information for the specified ADC. |
bogdanm | 0:9b334a45a8ff | 928 | * @retval None |
bogdanm | 0:9b334a45a8ff | 929 | */ |
bogdanm | 0:9b334a45a8ff | 930 | HAL_StatusTypeDef HAL_ADC_Stop_IT(ADC_HandleTypeDef* hadc) |
bogdanm | 0:9b334a45a8ff | 931 | { |
bogdanm | 0:9b334a45a8ff | 932 | HAL_StatusTypeDef tmpHALStatus = HAL_OK; |
bogdanm | 0:9b334a45a8ff | 933 | |
bogdanm | 0:9b334a45a8ff | 934 | /* Process locked */ |
bogdanm | 0:9b334a45a8ff | 935 | __HAL_LOCK(hadc); |
bogdanm | 0:9b334a45a8ff | 936 | |
bogdanm | 0:9b334a45a8ff | 937 | /* 1. Stop potential conversion ongoing (regular conversion) */ |
bogdanm | 0:9b334a45a8ff | 938 | tmpHALStatus = ADC_ConversionStop(hadc, ADC_REGULAR_GROUP); |
bogdanm | 0:9b334a45a8ff | 939 | |
bogdanm | 0:9b334a45a8ff | 940 | /* 2. Disable ADC peripheral if conversions are effectively stopped */ |
bogdanm | 0:9b334a45a8ff | 941 | if (tmpHALStatus != HAL_ERROR) |
bogdanm | 0:9b334a45a8ff | 942 | { |
bogdanm | 0:9b334a45a8ff | 943 | /* Disable ADC interrupts */ |
bogdanm | 0:9b334a45a8ff | 944 | __HAL_ADC_DISABLE_IT(hadc, (ADC_IT_EOC | ADC_IT_EOS | ADC_IT_OVR)); |
bogdanm | 0:9b334a45a8ff | 945 | |
bogdanm | 0:9b334a45a8ff | 946 | /* Disable the ADC peripheral */ |
bogdanm | 0:9b334a45a8ff | 947 | tmpHALStatus = ADC_Disable(hadc); |
bogdanm | 0:9b334a45a8ff | 948 | |
bogdanm | 0:9b334a45a8ff | 949 | /* Check if ADC is effectively disabled */ |
bogdanm | 0:9b334a45a8ff | 950 | if ((hadc->State != HAL_ADC_STATE_ERROR) && (tmpHALStatus != HAL_ERROR)) |
bogdanm | 0:9b334a45a8ff | 951 | { |
bogdanm | 0:9b334a45a8ff | 952 | /* Change ADC state */ |
bogdanm | 0:9b334a45a8ff | 953 | hadc->State = HAL_ADC_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 954 | } |
bogdanm | 0:9b334a45a8ff | 955 | else |
bogdanm | 0:9b334a45a8ff | 956 | { |
bogdanm | 0:9b334a45a8ff | 957 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 958 | } |
bogdanm | 0:9b334a45a8ff | 959 | } |
bogdanm | 0:9b334a45a8ff | 960 | else |
bogdanm | 0:9b334a45a8ff | 961 | { |
bogdanm | 0:9b334a45a8ff | 962 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 963 | } |
bogdanm | 0:9b334a45a8ff | 964 | |
bogdanm | 0:9b334a45a8ff | 965 | |
bogdanm | 0:9b334a45a8ff | 966 | /* Process unlocked */ |
bogdanm | 0:9b334a45a8ff | 967 | __HAL_UNLOCK(hadc); |
bogdanm | 0:9b334a45a8ff | 968 | |
bogdanm | 0:9b334a45a8ff | 969 | /* Return function status */ |
bogdanm | 0:9b334a45a8ff | 970 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 971 | } |
bogdanm | 0:9b334a45a8ff | 972 | |
bogdanm | 0:9b334a45a8ff | 973 | /** |
bogdanm | 0:9b334a45a8ff | 974 | * @brief Handles ADC interrupt request |
bogdanm | 0:9b334a45a8ff | 975 | * @param hadc: pointer to a ADC_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 976 | * the configuration information for the specified ADC. |
bogdanm | 0:9b334a45a8ff | 977 | * @retval None |
bogdanm | 0:9b334a45a8ff | 978 | */ |
bogdanm | 0:9b334a45a8ff | 979 | void HAL_ADC_IRQHandler(ADC_HandleTypeDef* hadc) |
bogdanm | 0:9b334a45a8ff | 980 | { |
bogdanm | 0:9b334a45a8ff | 981 | /* Check the parameters */ |
bogdanm | 0:9b334a45a8ff | 982 | assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); |
bogdanm | 0:9b334a45a8ff | 983 | assert_param(IS_ADC_EOC_SELECTION(hadc->Init.EOCSelection)); |
bogdanm | 0:9b334a45a8ff | 984 | |
bogdanm | 0:9b334a45a8ff | 985 | |
bogdanm | 0:9b334a45a8ff | 986 | /* Check End of Conversion flag for regular channels */ |
bogdanm | 0:9b334a45a8ff | 987 | if( (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOC) && __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_EOC)) || \ |
bogdanm | 0:9b334a45a8ff | 988 | (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOS) && __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_EOS)) ) |
bogdanm | 0:9b334a45a8ff | 989 | { |
bogdanm | 0:9b334a45a8ff | 990 | /* Change ADC state */ |
bogdanm | 0:9b334a45a8ff | 991 | hadc->State = HAL_ADC_STATE_EOC; |
bogdanm | 0:9b334a45a8ff | 992 | |
bogdanm | 0:9b334a45a8ff | 993 | |
bogdanm | 0:9b334a45a8ff | 994 | /* Disable interruption if no further conversion upcoming by continuous mode or external trigger */ |
bogdanm | 0:9b334a45a8ff | 995 | if((hadc->Init.ContinuousConvMode == DISABLE) && \ |
bogdanm | 0:9b334a45a8ff | 996 | (hadc->Init.ExternalTrigConvEdge == ADC_EXTERNALTRIGCONVEDGE_NONE) |
bogdanm | 0:9b334a45a8ff | 997 | ) |
bogdanm | 0:9b334a45a8ff | 998 | { |
bogdanm | 0:9b334a45a8ff | 999 | /* Allowed to modify bits ADC_IT_EOC/ADC_IT_EOS only if bit ADSTART==0 (no conversion on going) */ |
bogdanm | 0:9b334a45a8ff | 1000 | if (HAL_IS_BIT_CLR(hadc->Instance->CR, ADC_CR_ADSTART)) |
bogdanm | 0:9b334a45a8ff | 1001 | { |
bogdanm | 0:9b334a45a8ff | 1002 | /* Cases of interruption after each conversion or after each sequence */ |
bogdanm | 0:9b334a45a8ff | 1003 | /* If interruption after each sequence */ |
bogdanm | 0:9b334a45a8ff | 1004 | if (hadc->Init.EOCSelection == ADC_EOC_SEQ_CONV) |
bogdanm | 0:9b334a45a8ff | 1005 | { |
bogdanm | 0:9b334a45a8ff | 1006 | /* Allowed to modify bits ADC_IT_EOC/ADC_IT_EOS/ADC_IT_OVR only if bit*/ |
bogdanm | 0:9b334a45a8ff | 1007 | /* ADSTART==0 (no conversion on going) */ |
bogdanm | 0:9b334a45a8ff | 1008 | if (ADC_IS_CONVERSION_ONGOING(hadc) == RESET) |
bogdanm | 0:9b334a45a8ff | 1009 | { |
bogdanm | 0:9b334a45a8ff | 1010 | /* If End of Sequence is reached, disable interrupts */ |
bogdanm | 0:9b334a45a8ff | 1011 | if( __HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOS) ) |
bogdanm | 0:9b334a45a8ff | 1012 | { |
bogdanm | 0:9b334a45a8ff | 1013 | /* DISABLE ADC end of sequence conversion interrupt */ |
bogdanm | 0:9b334a45a8ff | 1014 | /* DISABLE ADC overrun interrupt */ |
bogdanm | 0:9b334a45a8ff | 1015 | __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC | ADC_IT_EOS | ADC_IT_OVR); |
bogdanm | 0:9b334a45a8ff | 1016 | } |
bogdanm | 0:9b334a45a8ff | 1017 | } |
bogdanm | 0:9b334a45a8ff | 1018 | else |
bogdanm | 0:9b334a45a8ff | 1019 | { |
bogdanm | 0:9b334a45a8ff | 1020 | /* Change ADC state to error state */ |
bogdanm | 0:9b334a45a8ff | 1021 | hadc->State = HAL_ADC_STATE_ERROR; |
bogdanm | 0:9b334a45a8ff | 1022 | /* Set ADC error code to ADC IP internal error */ |
bogdanm | 0:9b334a45a8ff | 1023 | hadc->ErrorCode |= HAL_ADC_ERROR_INTERNAL; |
bogdanm | 0:9b334a45a8ff | 1024 | } |
bogdanm | 0:9b334a45a8ff | 1025 | } |
bogdanm | 0:9b334a45a8ff | 1026 | /* If interruption after each conversion */ |
bogdanm | 0:9b334a45a8ff | 1027 | else |
bogdanm | 0:9b334a45a8ff | 1028 | { |
bogdanm | 0:9b334a45a8ff | 1029 | /* DISABLE ADC end of single conversion interrupt */ |
bogdanm | 0:9b334a45a8ff | 1030 | /* DISABLE ADC overrun interrupt */ |
bogdanm | 0:9b334a45a8ff | 1031 | __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC | ADC_IT_OVR); |
bogdanm | 0:9b334a45a8ff | 1032 | } |
bogdanm | 0:9b334a45a8ff | 1033 | } |
bogdanm | 0:9b334a45a8ff | 1034 | else |
bogdanm | 0:9b334a45a8ff | 1035 | { |
bogdanm | 0:9b334a45a8ff | 1036 | /* Change ADC state to error state */ |
bogdanm | 0:9b334a45a8ff | 1037 | hadc->State = HAL_ADC_STATE_ERROR; |
bogdanm | 0:9b334a45a8ff | 1038 | } |
bogdanm | 0:9b334a45a8ff | 1039 | } |
bogdanm | 0:9b334a45a8ff | 1040 | |
bogdanm | 0:9b334a45a8ff | 1041 | /* Conversion complete callback */ |
bogdanm | 0:9b334a45a8ff | 1042 | /* Note: into callback, to determine if callback has been triggered from EOC or EOS, */ |
bogdanm | 0:9b334a45a8ff | 1043 | /* it is possible to use: if( __HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOS)) */ |
bogdanm | 0:9b334a45a8ff | 1044 | HAL_ADC_ConvCpltCallback(hadc); |
bogdanm | 0:9b334a45a8ff | 1045 | |
bogdanm | 0:9b334a45a8ff | 1046 | /* Clear regular channels conversion flag */ |
bogdanm | 0:9b334a45a8ff | 1047 | if (hadc->Init.LowPowerAutoWait != ENABLE) |
bogdanm | 0:9b334a45a8ff | 1048 | { |
bogdanm | 0:9b334a45a8ff | 1049 | __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS) ); |
bogdanm | 0:9b334a45a8ff | 1050 | } |
bogdanm | 0:9b334a45a8ff | 1051 | } |
bogdanm | 0:9b334a45a8ff | 1052 | |
bogdanm | 0:9b334a45a8ff | 1053 | |
bogdanm | 0:9b334a45a8ff | 1054 | /* Check Analog watchdog flags */ |
bogdanm | 0:9b334a45a8ff | 1055 | if( (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_AWD) && __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_AWD))) |
bogdanm | 0:9b334a45a8ff | 1056 | { |
bogdanm | 0:9b334a45a8ff | 1057 | /* Change ADC state */ |
bogdanm | 0:9b334a45a8ff | 1058 | hadc->State = HAL_ADC_STATE_AWD; |
bogdanm | 0:9b334a45a8ff | 1059 | |
bogdanm | 0:9b334a45a8ff | 1060 | /* Level out of window callback */ |
bogdanm | 0:9b334a45a8ff | 1061 | HAL_ADC_LevelOutOfWindowCallback(hadc); |
bogdanm | 0:9b334a45a8ff | 1062 | |
bogdanm | 0:9b334a45a8ff | 1063 | /* Clear ADC Analog watchdog flag */ |
bogdanm | 0:9b334a45a8ff | 1064 | __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_AWD); |
bogdanm | 0:9b334a45a8ff | 1065 | } |
bogdanm | 0:9b334a45a8ff | 1066 | |
bogdanm | 0:9b334a45a8ff | 1067 | /* Check Overrun flag */ |
bogdanm | 0:9b334a45a8ff | 1068 | if(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_OVR) && __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_OVR)) |
bogdanm | 0:9b334a45a8ff | 1069 | { |
bogdanm | 0:9b334a45a8ff | 1070 | /* Change ADC state to overrun state */ |
bogdanm | 0:9b334a45a8ff | 1071 | hadc->State = HAL_ADC_STATE_ERROR; |
bogdanm | 0:9b334a45a8ff | 1072 | |
bogdanm | 0:9b334a45a8ff | 1073 | /* Set ADC error code to overrun */ |
bogdanm | 0:9b334a45a8ff | 1074 | hadc->ErrorCode |= HAL_ADC_ERROR_OVR; |
bogdanm | 0:9b334a45a8ff | 1075 | |
bogdanm | 0:9b334a45a8ff | 1076 | /* Clear the Overrun flag */ |
bogdanm | 0:9b334a45a8ff | 1077 | __HAL_ADC_CLEAR_FLAG(hadc,ADC_FLAG_OVR); |
bogdanm | 0:9b334a45a8ff | 1078 | |
bogdanm | 0:9b334a45a8ff | 1079 | /* Error callback */ |
bogdanm | 0:9b334a45a8ff | 1080 | HAL_ADC_ErrorCallback(hadc); |
bogdanm | 0:9b334a45a8ff | 1081 | } |
bogdanm | 0:9b334a45a8ff | 1082 | } |
bogdanm | 0:9b334a45a8ff | 1083 | |
bogdanm | 0:9b334a45a8ff | 1084 | /** |
bogdanm | 0:9b334a45a8ff | 1085 | * @brief Enables ADC DMA request after last transfer (Single-ADC mode) and enables ADC peripheral |
bogdanm | 0:9b334a45a8ff | 1086 | * @param hadc: pointer to a ADC_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 1087 | * the configuration information for the specified ADC. |
bogdanm | 0:9b334a45a8ff | 1088 | * @param pData: The destination Buffer address. |
bogdanm | 0:9b334a45a8ff | 1089 | * @param Length: The length of data to be transferred from ADC peripheral to memory. |
bogdanm | 0:9b334a45a8ff | 1090 | * @retval None |
bogdanm | 0:9b334a45a8ff | 1091 | */ |
bogdanm | 0:9b334a45a8ff | 1092 | HAL_StatusTypeDef HAL_ADC_Start_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length) |
bogdanm | 0:9b334a45a8ff | 1093 | { |
bogdanm | 0:9b334a45a8ff | 1094 | HAL_StatusTypeDef tmpHALStatus = HAL_OK; |
bogdanm | 0:9b334a45a8ff | 1095 | |
bogdanm | 0:9b334a45a8ff | 1096 | /* Check the parameters */ |
bogdanm | 0:9b334a45a8ff | 1097 | assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); |
bogdanm | 0:9b334a45a8ff | 1098 | |
bogdanm | 0:9b334a45a8ff | 1099 | /* Perform ADC enable and conversion start if no conversion is on going */ |
bogdanm | 0:9b334a45a8ff | 1100 | if (ADC_IS_CONVERSION_ONGOING(hadc) == RESET) |
bogdanm | 0:9b334a45a8ff | 1101 | { |
bogdanm | 0:9b334a45a8ff | 1102 | /* Process locked */ |
bogdanm | 0:9b334a45a8ff | 1103 | __HAL_LOCK(hadc); |
bogdanm | 0:9b334a45a8ff | 1104 | |
bogdanm | 0:9b334a45a8ff | 1105 | /* Change ADC state */ |
bogdanm | 0:9b334a45a8ff | 1106 | hadc->State = HAL_ADC_STATE_BUSY_REG; |
bogdanm | 0:9b334a45a8ff | 1107 | |
bogdanm | 0:9b334a45a8ff | 1108 | /* Set ADC error code to none */ |
bogdanm | 0:9b334a45a8ff | 1109 | hadc->ErrorCode = HAL_ADC_ERROR_NONE; |
bogdanm | 0:9b334a45a8ff | 1110 | |
bogdanm | 0:9b334a45a8ff | 1111 | /* Enable the ADC peripheral */ |
bogdanm | 0:9b334a45a8ff | 1112 | /* If low power mode AutoPowerOff is enabled, power-on/off phases are */ |
bogdanm | 0:9b334a45a8ff | 1113 | /* performed automatically by hardware. */ |
bogdanm | 0:9b334a45a8ff | 1114 | if (hadc->Init.LowPowerAutoPowerOff != ENABLE) |
bogdanm | 0:9b334a45a8ff | 1115 | { |
bogdanm | 0:9b334a45a8ff | 1116 | tmpHALStatus = ADC_Enable(hadc); |
bogdanm | 0:9b334a45a8ff | 1117 | } |
bogdanm | 0:9b334a45a8ff | 1118 | |
bogdanm | 0:9b334a45a8ff | 1119 | /* Start conversion if ADC is effectively enabled */ |
bogdanm | 0:9b334a45a8ff | 1120 | if (tmpHALStatus != HAL_ERROR) |
bogdanm | 0:9b334a45a8ff | 1121 | { |
bogdanm | 0:9b334a45a8ff | 1122 | /* Enable ADC DMA mode */ |
bogdanm | 0:9b334a45a8ff | 1123 | hadc->Instance->CFGR1 |= ADC_CFGR1_DMAEN; |
bogdanm | 0:9b334a45a8ff | 1124 | |
bogdanm | 0:9b334a45a8ff | 1125 | /* Set the DMA transfer complete callback */ |
bogdanm | 0:9b334a45a8ff | 1126 | hadc->DMA_Handle->XferCpltCallback = ADC_DMAConvCplt; |
bogdanm | 0:9b334a45a8ff | 1127 | |
bogdanm | 0:9b334a45a8ff | 1128 | /* Set the DMA half transfer complete callback */ |
bogdanm | 0:9b334a45a8ff | 1129 | hadc->DMA_Handle->XferHalfCpltCallback = ADC_DMAHalfConvCplt; |
bogdanm | 0:9b334a45a8ff | 1130 | |
bogdanm | 0:9b334a45a8ff | 1131 | /* Set the DMA error callback */ |
bogdanm | 0:9b334a45a8ff | 1132 | hadc->DMA_Handle->XferErrorCallback = ADC_DMAError; |
bogdanm | 0:9b334a45a8ff | 1133 | |
bogdanm | 0:9b334a45a8ff | 1134 | /* Manage ADC and DMA start: ADC overrun interruption, DMA start, |
bogdanm | 0:9b334a45a8ff | 1135 | ADC start (in case of SW start) */ |
bogdanm | 0:9b334a45a8ff | 1136 | |
bogdanm | 0:9b334a45a8ff | 1137 | /* Enable ADC overrun interrupt */ |
bogdanm | 0:9b334a45a8ff | 1138 | __HAL_ADC_ENABLE_IT(hadc, ADC_IT_OVR); |
bogdanm | 0:9b334a45a8ff | 1139 | |
bogdanm | 0:9b334a45a8ff | 1140 | /* Enable the DMA Stream */ |
bogdanm | 0:9b334a45a8ff | 1141 | HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&hadc->Instance->DR, (uint32_t)pData, Length); |
bogdanm | 0:9b334a45a8ff | 1142 | |
bogdanm | 0:9b334a45a8ff | 1143 | /* ADC start conversion command */ |
bogdanm | 0:9b334a45a8ff | 1144 | hadc->Instance->CR |= ADC_CR_ADSTART; |
bogdanm | 0:9b334a45a8ff | 1145 | } |
bogdanm | 0:9b334a45a8ff | 1146 | |
bogdanm | 0:9b334a45a8ff | 1147 | /* Process unlocked */ |
bogdanm | 0:9b334a45a8ff | 1148 | __HAL_UNLOCK(hadc); |
bogdanm | 0:9b334a45a8ff | 1149 | } |
bogdanm | 0:9b334a45a8ff | 1150 | else |
bogdanm | 0:9b334a45a8ff | 1151 | { |
bogdanm | 0:9b334a45a8ff | 1152 | tmpHALStatus = HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 1153 | } |
bogdanm | 0:9b334a45a8ff | 1154 | |
bogdanm | 0:9b334a45a8ff | 1155 | /* Return function status */ |
bogdanm | 0:9b334a45a8ff | 1156 | return tmpHALStatus; |
bogdanm | 0:9b334a45a8ff | 1157 | } |
bogdanm | 0:9b334a45a8ff | 1158 | |
bogdanm | 0:9b334a45a8ff | 1159 | /** |
bogdanm | 0:9b334a45a8ff | 1160 | * @brief Disable ADC DMA (Single-ADC mode), disable ADC peripheral |
bogdanm | 0:9b334a45a8ff | 1161 | * @param hadc: pointer to a ADC_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 1162 | * the configuration information for the specified ADC. |
bogdanm | 0:9b334a45a8ff | 1163 | * @retval None |
bogdanm | 0:9b334a45a8ff | 1164 | */ |
bogdanm | 0:9b334a45a8ff | 1165 | HAL_StatusTypeDef HAL_ADC_Stop_DMA(ADC_HandleTypeDef* hadc) |
bogdanm | 0:9b334a45a8ff | 1166 | { |
bogdanm | 0:9b334a45a8ff | 1167 | HAL_StatusTypeDef tmpHALStatus = HAL_OK; |
bogdanm | 0:9b334a45a8ff | 1168 | |
bogdanm | 0:9b334a45a8ff | 1169 | /* Process locked */ |
bogdanm | 0:9b334a45a8ff | 1170 | __HAL_LOCK(hadc); |
bogdanm | 0:9b334a45a8ff | 1171 | |
bogdanm | 0:9b334a45a8ff | 1172 | /* 1. Stop potential conversion ongoing (regular conversion) */ |
bogdanm | 0:9b334a45a8ff | 1173 | tmpHALStatus = ADC_ConversionStop(hadc, ADC_REGULAR_GROUP); |
bogdanm | 0:9b334a45a8ff | 1174 | |
bogdanm | 0:9b334a45a8ff | 1175 | /* 2. Disable ADC peripheral if conversions are effectively stopped */ |
bogdanm | 0:9b334a45a8ff | 1176 | if (tmpHALStatus != HAL_ERROR) |
bogdanm | 0:9b334a45a8ff | 1177 | { |
bogdanm | 0:9b334a45a8ff | 1178 | /* Disable ADC DMA (ADC DMA configuration ADC_CFGR_DMACFG is kept) */ |
bogdanm | 0:9b334a45a8ff | 1179 | hadc->Instance->CFGR1 &= ~ADC_CFGR1_DMAEN; |
bogdanm | 0:9b334a45a8ff | 1180 | |
bogdanm | 0:9b334a45a8ff | 1181 | /* Disable the DMA Stream */ |
bogdanm | 0:9b334a45a8ff | 1182 | if (HAL_DMA_Abort(hadc->DMA_Handle) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 1183 | { |
bogdanm | 0:9b334a45a8ff | 1184 | /* Update ADC state machine to error */ |
bogdanm | 0:9b334a45a8ff | 1185 | hadc->State = HAL_ADC_STATE_ERROR; |
bogdanm | 0:9b334a45a8ff | 1186 | |
bogdanm | 0:9b334a45a8ff | 1187 | /* Process unlocked */ |
bogdanm | 0:9b334a45a8ff | 1188 | __HAL_UNLOCK(hadc); |
bogdanm | 0:9b334a45a8ff | 1189 | |
bogdanm | 0:9b334a45a8ff | 1190 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 1191 | } |
bogdanm | 0:9b334a45a8ff | 1192 | |
bogdanm | 0:9b334a45a8ff | 1193 | /* Disable ADC overrun interrupt */ |
bogdanm | 0:9b334a45a8ff | 1194 | __HAL_ADC_DISABLE_IT(hadc, ADC_IT_OVR); |
bogdanm | 0:9b334a45a8ff | 1195 | |
bogdanm | 0:9b334a45a8ff | 1196 | /* Disable the ADC peripheral */ |
bogdanm | 0:9b334a45a8ff | 1197 | tmpHALStatus = ADC_Disable(hadc); |
bogdanm | 0:9b334a45a8ff | 1198 | |
bogdanm | 0:9b334a45a8ff | 1199 | /* Check if ADC is effectively disabled */ |
bogdanm | 0:9b334a45a8ff | 1200 | if ((hadc->State != HAL_ADC_STATE_ERROR) && (tmpHALStatus != HAL_ERROR)) |
bogdanm | 0:9b334a45a8ff | 1201 | { |
bogdanm | 0:9b334a45a8ff | 1202 | /* Change ADC state */ |
bogdanm | 0:9b334a45a8ff | 1203 | hadc->State = HAL_ADC_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 1204 | } |
bogdanm | 0:9b334a45a8ff | 1205 | else |
bogdanm | 0:9b334a45a8ff | 1206 | { |
bogdanm | 0:9b334a45a8ff | 1207 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 1208 | } |
bogdanm | 0:9b334a45a8ff | 1209 | } |
bogdanm | 0:9b334a45a8ff | 1210 | else |
bogdanm | 0:9b334a45a8ff | 1211 | { |
bogdanm | 0:9b334a45a8ff | 1212 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 1213 | } |
bogdanm | 0:9b334a45a8ff | 1214 | |
bogdanm | 0:9b334a45a8ff | 1215 | /* Process unlocked */ |
bogdanm | 0:9b334a45a8ff | 1216 | __HAL_UNLOCK(hadc); |
bogdanm | 0:9b334a45a8ff | 1217 | |
bogdanm | 0:9b334a45a8ff | 1218 | /* Return function status */ |
bogdanm | 0:9b334a45a8ff | 1219 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 1220 | } |
bogdanm | 0:9b334a45a8ff | 1221 | |
bogdanm | 0:9b334a45a8ff | 1222 | /** |
bogdanm | 0:9b334a45a8ff | 1223 | * @brief Gets the converted value from data register of regular channel. |
bogdanm | 0:9b334a45a8ff | 1224 | * @param hadc: pointer to a ADC_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 1225 | * the configuration information for the specified ADC. |
bogdanm | 0:9b334a45a8ff | 1226 | * @retval Converted value |
bogdanm | 0:9b334a45a8ff | 1227 | */ |
bogdanm | 0:9b334a45a8ff | 1228 | uint32_t HAL_ADC_GetValue(ADC_HandleTypeDef* hadc) |
bogdanm | 0:9b334a45a8ff | 1229 | { |
bogdanm | 0:9b334a45a8ff | 1230 | /* Return the selected ADC converted value */ |
bogdanm | 0:9b334a45a8ff | 1231 | return hadc->Instance->DR; |
bogdanm | 0:9b334a45a8ff | 1232 | } |
bogdanm | 0:9b334a45a8ff | 1233 | |
bogdanm | 0:9b334a45a8ff | 1234 | /** |
bogdanm | 0:9b334a45a8ff | 1235 | * @brief Regular conversion complete callback in non blocking mode |
bogdanm | 0:9b334a45a8ff | 1236 | * @param hadc: pointer to a ADC_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 1237 | * the configuration information for the specified ADC. |
bogdanm | 0:9b334a45a8ff | 1238 | * @retval None |
bogdanm | 0:9b334a45a8ff | 1239 | */ |
bogdanm | 0:9b334a45a8ff | 1240 | __weak void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc) |
bogdanm | 0:9b334a45a8ff | 1241 | { |
bogdanm | 0:9b334a45a8ff | 1242 | /* NOTE : This function Should not be modified, when the callback is needed, |
bogdanm | 0:9b334a45a8ff | 1243 | the HAL_ADC_ConvCpltCallback could be implemented in the user file |
bogdanm | 0:9b334a45a8ff | 1244 | */ |
bogdanm | 0:9b334a45a8ff | 1245 | } |
bogdanm | 0:9b334a45a8ff | 1246 | |
bogdanm | 0:9b334a45a8ff | 1247 | /** |
bogdanm | 0:9b334a45a8ff | 1248 | * @brief Regular conversion half DMA transfer callback in non blocking mode |
bogdanm | 0:9b334a45a8ff | 1249 | * @param hadc: pointer to a ADC_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 1250 | * the configuration information for the specified ADC. |
bogdanm | 0:9b334a45a8ff | 1251 | * @retval None |
bogdanm | 0:9b334a45a8ff | 1252 | */ |
bogdanm | 0:9b334a45a8ff | 1253 | __weak void HAL_ADC_ConvHalfCpltCallback(ADC_HandleTypeDef* hadc) |
bogdanm | 0:9b334a45a8ff | 1254 | { |
bogdanm | 0:9b334a45a8ff | 1255 | /* NOTE : This function Should not be modified, when the callback is needed, |
bogdanm | 0:9b334a45a8ff | 1256 | the HAL_ADC_ConvHalfCpltCallback could be implemented in the user file |
bogdanm | 0:9b334a45a8ff | 1257 | */ |
bogdanm | 0:9b334a45a8ff | 1258 | } |
bogdanm | 0:9b334a45a8ff | 1259 | |
bogdanm | 0:9b334a45a8ff | 1260 | /** |
bogdanm | 0:9b334a45a8ff | 1261 | * @brief Analog watchdog callback in non blocking mode |
bogdanm | 0:9b334a45a8ff | 1262 | * @param hadc: pointer to a ADC_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 1263 | * the configuration information for the specified ADC. |
bogdanm | 0:9b334a45a8ff | 1264 | * @retval None |
bogdanm | 0:9b334a45a8ff | 1265 | */ |
bogdanm | 0:9b334a45a8ff | 1266 | __weak void HAL_ADC_LevelOutOfWindowCallback(ADC_HandleTypeDef* hadc) |
bogdanm | 0:9b334a45a8ff | 1267 | { |
bogdanm | 0:9b334a45a8ff | 1268 | /* NOTE : This function Should not be modified, when the callback is needed, |
bogdanm | 0:9b334a45a8ff | 1269 | the HAL_ADC_LevelOoutOfWindowCallback could be implemented in the user file |
bogdanm | 0:9b334a45a8ff | 1270 | */ |
bogdanm | 0:9b334a45a8ff | 1271 | } |
bogdanm | 0:9b334a45a8ff | 1272 | |
bogdanm | 0:9b334a45a8ff | 1273 | /** |
bogdanm | 0:9b334a45a8ff | 1274 | * @brief Error ADC callback. |
bogdanm | 0:9b334a45a8ff | 1275 | * @param hadc: pointer to a ADC_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 1276 | * the configuration information for the specified ADC. |
bogdanm | 0:9b334a45a8ff | 1277 | * @retval None |
bogdanm | 0:9b334a45a8ff | 1278 | */ |
bogdanm | 0:9b334a45a8ff | 1279 | __weak void HAL_ADC_ErrorCallback(ADC_HandleTypeDef *hadc) |
bogdanm | 0:9b334a45a8ff | 1280 | { |
bogdanm | 0:9b334a45a8ff | 1281 | /* NOTE : This function Should not be modified, when the callback is needed, |
bogdanm | 0:9b334a45a8ff | 1282 | the HAL_ADC_ErrorCallback could be implemented in the user file |
bogdanm | 0:9b334a45a8ff | 1283 | */ |
bogdanm | 0:9b334a45a8ff | 1284 | } |
bogdanm | 0:9b334a45a8ff | 1285 | |
bogdanm | 0:9b334a45a8ff | 1286 | /** |
bogdanm | 0:9b334a45a8ff | 1287 | * @} |
bogdanm | 0:9b334a45a8ff | 1288 | */ |
bogdanm | 0:9b334a45a8ff | 1289 | |
bogdanm | 0:9b334a45a8ff | 1290 | /** @defgroup ADC_Group3 Peripheral Control functions |
bogdanm | 0:9b334a45a8ff | 1291 | * @brief Peripheral Control functions |
bogdanm | 0:9b334a45a8ff | 1292 | * |
bogdanm | 0:9b334a45a8ff | 1293 | @verbatim |
bogdanm | 0:9b334a45a8ff | 1294 | =============================================================================== |
bogdanm | 0:9b334a45a8ff | 1295 | ##### Peripheral Control functions ##### |
bogdanm | 0:9b334a45a8ff | 1296 | =============================================================================== |
bogdanm | 0:9b334a45a8ff | 1297 | [..] This section provides functions allowing to: |
bogdanm | 0:9b334a45a8ff | 1298 | (+) Configure channels. |
bogdanm | 0:9b334a45a8ff | 1299 | (+) Configure the analog watch dog. |
bogdanm | 0:9b334a45a8ff | 1300 | |
bogdanm | 0:9b334a45a8ff | 1301 | @endverbatim |
bogdanm | 0:9b334a45a8ff | 1302 | * @{ |
bogdanm | 0:9b334a45a8ff | 1303 | */ |
bogdanm | 0:9b334a45a8ff | 1304 | |
bogdanm | 0:9b334a45a8ff | 1305 | |
bogdanm | 0:9b334a45a8ff | 1306 | /** |
bogdanm | 0:9b334a45a8ff | 1307 | * @brief Configures the selected ADC regular channel: sampling time, |
bogdanm | 0:9b334a45a8ff | 1308 | * offset,. |
bogdanm | 0:9b334a45a8ff | 1309 | * @param hadc: pointer to a ADC_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 1310 | * the configuration information for the specified ADC. |
bogdanm | 0:9b334a45a8ff | 1311 | * @param sConfig: ADC regular channel configuration structure. |
bogdanm | 0:9b334a45a8ff | 1312 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 1313 | */ |
bogdanm | 0:9b334a45a8ff | 1314 | HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig) |
bogdanm | 0:9b334a45a8ff | 1315 | { |
bogdanm | 0:9b334a45a8ff | 1316 | /* Check the parameters */ |
bogdanm | 0:9b334a45a8ff | 1317 | assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); |
bogdanm | 0:9b334a45a8ff | 1318 | assert_param(IS_ADC_CHANNEL(sConfig->Channel)); |
bogdanm | 0:9b334a45a8ff | 1319 | |
bogdanm | 0:9b334a45a8ff | 1320 | /* Process locked */ |
bogdanm | 0:9b334a45a8ff | 1321 | __HAL_LOCK(hadc); |
bogdanm | 0:9b334a45a8ff | 1322 | |
bogdanm | 0:9b334a45a8ff | 1323 | /* Parameters update conditioned to ADC state: */ |
bogdanm | 0:9b334a45a8ff | 1324 | /* Parameters that can be updated when ADC is disabled or enabled without */ |
bogdanm | 0:9b334a45a8ff | 1325 | /* conversion on going : */ |
bogdanm | 0:9b334a45a8ff | 1326 | /* - Channel number */ |
bogdanm | 0:9b334a45a8ff | 1327 | /* - Management of internal measurement channels: Vbat/VrefInt/TempSensor */ |
bogdanm | 0:9b334a45a8ff | 1328 | if (ADC_IS_CONVERSION_ONGOING(hadc) != RESET) |
bogdanm | 0:9b334a45a8ff | 1329 | { |
bogdanm | 0:9b334a45a8ff | 1330 | /* Update ADC state machine to error */ |
bogdanm | 0:9b334a45a8ff | 1331 | hadc->State = HAL_ADC_STATE_ERROR; |
bogdanm | 0:9b334a45a8ff | 1332 | /* Process unlocked */ |
bogdanm | 0:9b334a45a8ff | 1333 | __HAL_UNLOCK(hadc); |
bogdanm | 0:9b334a45a8ff | 1334 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 1335 | } |
bogdanm | 0:9b334a45a8ff | 1336 | |
bogdanm | 0:9b334a45a8ff | 1337 | /* Enable selected channels */ |
bogdanm | 0:9b334a45a8ff | 1338 | hadc->Instance->CHSELR |= (uint32_t)(sConfig->Channel & ADC_CHANNEL_MASK); |
bogdanm | 0:9b334a45a8ff | 1339 | |
bogdanm | 0:9b334a45a8ff | 1340 | /* Management of internal measurement channels: Vlcd/VrefInt/TempSensor */ |
bogdanm | 0:9b334a45a8ff | 1341 | /* internal measurement paths enable: If internal channel selected, enable */ |
bogdanm | 0:9b334a45a8ff | 1342 | /* dedicated internal buffers and path. */ |
bogdanm | 0:9b334a45a8ff | 1343 | |
bogdanm | 0:9b334a45a8ff | 1344 | /* If Temperature sensor channel is selected, then enable the internal */ |
bogdanm | 0:9b334a45a8ff | 1345 | /* buffers and path */ |
bogdanm | 0:9b334a45a8ff | 1346 | if (((sConfig->Channel & ADC_CHANNEL_MASK) & ADC_CHANNEL_TEMPSENSOR ) == (ADC_CHANNEL_TEMPSENSOR & ADC_CHANNEL_MASK)) |
bogdanm | 0:9b334a45a8ff | 1347 | { |
bogdanm | 0:9b334a45a8ff | 1348 | ADC->CCR |= ADC_CCR_TSEN; |
bogdanm | 0:9b334a45a8ff | 1349 | |
bogdanm | 0:9b334a45a8ff | 1350 | /* Delay for temperature sensor stabilization time */ |
bogdanm | 0:9b334a45a8ff | 1351 | ADC_DelayMicroSecond(ADC_TEMPSENSOR_DELAY_US); |
bogdanm | 0:9b334a45a8ff | 1352 | } |
bogdanm | 0:9b334a45a8ff | 1353 | |
bogdanm | 0:9b334a45a8ff | 1354 | /* If VRefInt channel is selected, then enable the internal buffers and path */ |
bogdanm | 0:9b334a45a8ff | 1355 | if (((sConfig->Channel & ADC_CHANNEL_MASK) & ADC_CHANNEL_VREFINT) == (ADC_CHANNEL_VREFINT & ADC_CHANNEL_MASK)) |
bogdanm | 0:9b334a45a8ff | 1356 | { |
bogdanm | 0:9b334a45a8ff | 1357 | ADC->CCR |= ADC_CCR_VREFEN; |
bogdanm | 0:9b334a45a8ff | 1358 | } |
bogdanm | 0:9b334a45a8ff | 1359 | |
bogdanm | 0:9b334a45a8ff | 1360 | /* If Vlcd channel is selected, then enable the internal buffers and path */ |
bogdanm | 0:9b334a45a8ff | 1361 | if (((sConfig->Channel & ADC_CHANNEL_MASK) & ADC_CHANNEL_VLCD) == (ADC_CHANNEL_VLCD & ADC_CHANNEL_MASK)) |
bogdanm | 0:9b334a45a8ff | 1362 | { |
bogdanm | 0:9b334a45a8ff | 1363 | ADC->CCR |= ADC_CCR_VLCDEN; |
bogdanm | 0:9b334a45a8ff | 1364 | } |
bogdanm | 0:9b334a45a8ff | 1365 | |
bogdanm | 0:9b334a45a8ff | 1366 | /* Process unlocked */ |
bogdanm | 0:9b334a45a8ff | 1367 | __HAL_UNLOCK(hadc); |
bogdanm | 0:9b334a45a8ff | 1368 | |
bogdanm | 0:9b334a45a8ff | 1369 | /* Return function status */ |
bogdanm | 0:9b334a45a8ff | 1370 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 1371 | } |
bogdanm | 0:9b334a45a8ff | 1372 | |
bogdanm | 0:9b334a45a8ff | 1373 | /** |
bogdanm | 0:9b334a45a8ff | 1374 | * @brief Configures the analog watchdog. |
bogdanm | 0:9b334a45a8ff | 1375 | * @param hadc: pointer to a ADC_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 1376 | * the configuration information for the specified ADC. |
bogdanm | 0:9b334a45a8ff | 1377 | * @param AnalogWDGConfig : pointer to an ADC_AnalogWDGConfTypeDef structure |
bogdanm | 0:9b334a45a8ff | 1378 | * that contains the configuration information of ADC analog watchdog. |
bogdanm | 0:9b334a45a8ff | 1379 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 1380 | */ |
bogdanm | 0:9b334a45a8ff | 1381 | HAL_StatusTypeDef HAL_ADC_AnalogWDGConfig(ADC_HandleTypeDef* hadc, ADC_AnalogWDGConfTypeDef* AnalogWDGConfig) |
bogdanm | 0:9b334a45a8ff | 1382 | { |
bogdanm | 0:9b334a45a8ff | 1383 | uint32_t tmpAWDHighThresholdShifted; |
bogdanm | 0:9b334a45a8ff | 1384 | uint32_t tmpAWDLowThresholdShifted; |
bogdanm | 0:9b334a45a8ff | 1385 | |
bogdanm | 0:9b334a45a8ff | 1386 | /* Check the parameters */ |
bogdanm | 0:9b334a45a8ff | 1387 | assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); |
bogdanm | 0:9b334a45a8ff | 1388 | assert_param(IS_ADC_ANALOG_WATCHDOG_MODE(AnalogWDGConfig->WatchdogMode)); |
bogdanm | 0:9b334a45a8ff | 1389 | assert_param(IS_ADC_CHANNEL(AnalogWDGConfig->Channel)); |
bogdanm | 0:9b334a45a8ff | 1390 | assert_param(IS_FUNCTIONAL_STATE(AnalogWDGConfig->ITMode)); |
bogdanm | 0:9b334a45a8ff | 1391 | |
bogdanm | 0:9b334a45a8ff | 1392 | assert_param(IS_ADC_RANGE(ADC_GET_RESOLUTION(hadc), AnalogWDGConfig->HighThreshold)); |
bogdanm | 0:9b334a45a8ff | 1393 | assert_param(IS_ADC_RANGE(ADC_GET_RESOLUTION(hadc), AnalogWDGConfig->LowThreshold)); |
bogdanm | 0:9b334a45a8ff | 1394 | |
bogdanm | 0:9b334a45a8ff | 1395 | /* Process locked */ |
bogdanm | 0:9b334a45a8ff | 1396 | __HAL_LOCK(hadc); |
bogdanm | 0:9b334a45a8ff | 1397 | |
bogdanm | 0:9b334a45a8ff | 1398 | /* Parameters update conditioned to ADC state: */ |
bogdanm | 0:9b334a45a8ff | 1399 | /* Parameters that can be updated when ADC is disabled or enabled without */ |
bogdanm | 0:9b334a45a8ff | 1400 | /* conversion on going : */ |
bogdanm | 0:9b334a45a8ff | 1401 | /* - Analog watchdog channels */ |
bogdanm | 0:9b334a45a8ff | 1402 | /* - Analog watchdog thresholds */ |
bogdanm | 0:9b334a45a8ff | 1403 | if (ADC_IS_CONVERSION_ONGOING(hadc) != RESET) |
bogdanm | 0:9b334a45a8ff | 1404 | { |
bogdanm | 0:9b334a45a8ff | 1405 | /* Update ADC state machine to error */ |
bogdanm | 0:9b334a45a8ff | 1406 | hadc->State = HAL_ADC_STATE_ERROR; |
bogdanm | 0:9b334a45a8ff | 1407 | /* Process unlocked */ |
bogdanm | 0:9b334a45a8ff | 1408 | __HAL_UNLOCK(hadc); |
bogdanm | 0:9b334a45a8ff | 1409 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 1410 | } |
bogdanm | 0:9b334a45a8ff | 1411 | |
bogdanm | 0:9b334a45a8ff | 1412 | /* Configure ADC Analog watchdog interrupt */ |
bogdanm | 0:9b334a45a8ff | 1413 | if(AnalogWDGConfig->ITMode == ENABLE) |
bogdanm | 0:9b334a45a8ff | 1414 | { |
bogdanm | 0:9b334a45a8ff | 1415 | /* Enable the ADC Analog watchdog interrupt */ |
bogdanm | 0:9b334a45a8ff | 1416 | __HAL_ADC_ENABLE_IT(hadc, ADC_IT_AWD); |
bogdanm | 0:9b334a45a8ff | 1417 | } |
bogdanm | 0:9b334a45a8ff | 1418 | else |
bogdanm | 0:9b334a45a8ff | 1419 | { |
bogdanm | 0:9b334a45a8ff | 1420 | /* Disable the ADC Analog watchdog interrupt */ |
bogdanm | 0:9b334a45a8ff | 1421 | __HAL_ADC_DISABLE_IT(hadc, ADC_IT_AWD); |
bogdanm | 0:9b334a45a8ff | 1422 | } |
bogdanm | 0:9b334a45a8ff | 1423 | |
bogdanm | 0:9b334a45a8ff | 1424 | /* Configuration of analog watchdog: */ |
bogdanm | 0:9b334a45a8ff | 1425 | /* - Set the analog watchdog mode */ |
bogdanm | 0:9b334a45a8ff | 1426 | /* - Set the Analog watchdog channel (is not used if watchdog */ |
bogdanm | 0:9b334a45a8ff | 1427 | /* mode "all channels": ADC_CFGR1_AWD1SGL=0) */ |
bogdanm | 0:9b334a45a8ff | 1428 | hadc->Instance->CFGR1 &= ~( ADC_CFGR1_AWDSGL | |
bogdanm | 0:9b334a45a8ff | 1429 | ADC_CFGR1_AWDEN | |
bogdanm | 0:9b334a45a8ff | 1430 | ADC_CFGR1_AWDCH); |
bogdanm | 0:9b334a45a8ff | 1431 | |
bogdanm | 0:9b334a45a8ff | 1432 | hadc->Instance->CFGR1 |= ( AnalogWDGConfig->WatchdogMode | |
bogdanm | 0:9b334a45a8ff | 1433 | (AnalogWDGConfig->Channel & ADC_CHANNEL_AWD_MASK)); |
bogdanm | 0:9b334a45a8ff | 1434 | |
bogdanm | 0:9b334a45a8ff | 1435 | |
bogdanm | 0:9b334a45a8ff | 1436 | /* Shift the offset in function of the selected ADC resolution: Thresholds */ |
bogdanm | 0:9b334a45a8ff | 1437 | /* have to be left-aligned on bit 11, the LSB (right bits) are set to 0 */ |
bogdanm | 0:9b334a45a8ff | 1438 | tmpAWDHighThresholdShifted = ADC_AWD1THRESHOLD_SHIFT_RESOLUTION(hadc, AnalogWDGConfig->HighThreshold); |
bogdanm | 0:9b334a45a8ff | 1439 | tmpAWDLowThresholdShifted = ADC_AWD1THRESHOLD_SHIFT_RESOLUTION(hadc, AnalogWDGConfig->LowThreshold); |
bogdanm | 0:9b334a45a8ff | 1440 | |
bogdanm | 0:9b334a45a8ff | 1441 | /* Clear High & Low high thresholds */ |
bogdanm | 0:9b334a45a8ff | 1442 | hadc->Instance->TR &= (uint32_t) ~ (ADC_TR_HT | ADC_TR_LT); |
bogdanm | 0:9b334a45a8ff | 1443 | |
bogdanm | 0:9b334a45a8ff | 1444 | /* Set the high threshold */ |
bogdanm | 0:9b334a45a8ff | 1445 | hadc->Instance->TR = ADC_TRX_HIGHTHRESHOLD (tmpAWDHighThresholdShifted); |
bogdanm | 0:9b334a45a8ff | 1446 | /* Set the low threshold */ |
bogdanm | 0:9b334a45a8ff | 1447 | hadc->Instance->TR |= tmpAWDLowThresholdShifted; |
bogdanm | 0:9b334a45a8ff | 1448 | |
bogdanm | 0:9b334a45a8ff | 1449 | /* Process unlocked */ |
bogdanm | 0:9b334a45a8ff | 1450 | __HAL_UNLOCK(hadc); |
bogdanm | 0:9b334a45a8ff | 1451 | |
bogdanm | 0:9b334a45a8ff | 1452 | /* Return function status */ |
bogdanm | 0:9b334a45a8ff | 1453 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 1454 | } |
bogdanm | 0:9b334a45a8ff | 1455 | |
bogdanm | 0:9b334a45a8ff | 1456 | /** |
bogdanm | 0:9b334a45a8ff | 1457 | * @} |
bogdanm | 0:9b334a45a8ff | 1458 | */ |
bogdanm | 0:9b334a45a8ff | 1459 | |
bogdanm | 0:9b334a45a8ff | 1460 | /** @defgroup ADC_Group4 ADC Peripheral State functions |
bogdanm | 0:9b334a45a8ff | 1461 | * @brief ADC Peripheral State functions |
bogdanm | 0:9b334a45a8ff | 1462 | * |
bogdanm | 0:9b334a45a8ff | 1463 | @verbatim |
bogdanm | 0:9b334a45a8ff | 1464 | =============================================================================== |
bogdanm | 0:9b334a45a8ff | 1465 | ##### ADC Peripheral State functions ##### |
bogdanm | 0:9b334a45a8ff | 1466 | =============================================================================== |
bogdanm | 0:9b334a45a8ff | 1467 | [..] |
bogdanm | 0:9b334a45a8ff | 1468 | This subsection provides functions allowing to |
bogdanm | 0:9b334a45a8ff | 1469 | (+) Check the ADC state. |
bogdanm | 0:9b334a45a8ff | 1470 | (+) handle ADC interrupt request. |
bogdanm | 0:9b334a45a8ff | 1471 | |
bogdanm | 0:9b334a45a8ff | 1472 | @endverbatim |
bogdanm | 0:9b334a45a8ff | 1473 | * @{ |
bogdanm | 0:9b334a45a8ff | 1474 | */ |
bogdanm | 0:9b334a45a8ff | 1475 | |
bogdanm | 0:9b334a45a8ff | 1476 | /** |
bogdanm | 0:9b334a45a8ff | 1477 | * @brief return the ADC state |
bogdanm | 0:9b334a45a8ff | 1478 | * @param hadc: pointer to a ADC_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 1479 | * the configuration information for the specified ADC. |
bogdanm | 0:9b334a45a8ff | 1480 | * @retval HAL state |
bogdanm | 0:9b334a45a8ff | 1481 | */ |
bogdanm | 0:9b334a45a8ff | 1482 | HAL_ADC_StateTypeDef HAL_ADC_GetState(ADC_HandleTypeDef* hadc) |
bogdanm | 0:9b334a45a8ff | 1483 | { |
bogdanm | 0:9b334a45a8ff | 1484 | /* Return ADC state */ |
bogdanm | 0:9b334a45a8ff | 1485 | return hadc->State; |
bogdanm | 0:9b334a45a8ff | 1486 | } |
bogdanm | 0:9b334a45a8ff | 1487 | |
bogdanm | 0:9b334a45a8ff | 1488 | /** |
bogdanm | 0:9b334a45a8ff | 1489 | * @brief Return the ADC error code |
bogdanm | 0:9b334a45a8ff | 1490 | * @param hadc: pointer to a ADC_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 1491 | * the configuration information for the specified ADC. |
bogdanm | 0:9b334a45a8ff | 1492 | * @retval ADC Error Code |
bogdanm | 0:9b334a45a8ff | 1493 | */ |
bogdanm | 0:9b334a45a8ff | 1494 | uint32_t HAL_ADC_GetError(ADC_HandleTypeDef *hadc) |
bogdanm | 0:9b334a45a8ff | 1495 | { |
bogdanm | 0:9b334a45a8ff | 1496 | return hadc->ErrorCode; |
bogdanm | 0:9b334a45a8ff | 1497 | } |
bogdanm | 0:9b334a45a8ff | 1498 | |
bogdanm | 0:9b334a45a8ff | 1499 | |
bogdanm | 0:9b334a45a8ff | 1500 | /** |
bogdanm | 0:9b334a45a8ff | 1501 | * @} |
bogdanm | 0:9b334a45a8ff | 1502 | */ |
bogdanm | 0:9b334a45a8ff | 1503 | |
bogdanm | 0:9b334a45a8ff | 1504 | /** |
bogdanm | 0:9b334a45a8ff | 1505 | * @brief Enable the selected ADC. |
bogdanm | 0:9b334a45a8ff | 1506 | * @note Prerequisite condition to use this function: ADC must be disabled |
bogdanm | 0:9b334a45a8ff | 1507 | * and voltage regulator must be enabled (done into HAL_ADC_Init()). |
bogdanm | 0:9b334a45a8ff | 1508 | * @note If low power mode AutoPowerOff is enabled, power-on/off phases are |
bogdanm | 0:9b334a45a8ff | 1509 | * performed automatically by hardware. |
bogdanm | 0:9b334a45a8ff | 1510 | * In this mode, this function is useless and must not be called because |
bogdanm | 0:9b334a45a8ff | 1511 | * flag ADC_FLAG_RDY is not usable. |
bogdanm | 0:9b334a45a8ff | 1512 | * Therefore, this function must be called under condition of |
bogdanm | 0:9b334a45a8ff | 1513 | * "if (hadc->Init.LowPowerAutoPowerOff != ENABLE)". |
bogdanm | 0:9b334a45a8ff | 1514 | * @param hadc: ADC handle |
bogdanm | 0:9b334a45a8ff | 1515 | * @retval HAL status. |
bogdanm | 0:9b334a45a8ff | 1516 | */ |
bogdanm | 0:9b334a45a8ff | 1517 | static HAL_StatusTypeDef ADC_Enable(ADC_HandleTypeDef* hadc) |
bogdanm | 0:9b334a45a8ff | 1518 | { |
bogdanm | 0:9b334a45a8ff | 1519 | uint32_t tickstart = 0; |
bogdanm | 0:9b334a45a8ff | 1520 | |
bogdanm | 0:9b334a45a8ff | 1521 | /* ADC enable and wait for ADC ready (in case of ADC is disabled or */ |
bogdanm | 0:9b334a45a8ff | 1522 | /* enabling phase not yet completed: flag ADC ready not yet set). */ |
bogdanm | 0:9b334a45a8ff | 1523 | /* Timeout implemented to not be stuck if ADC cannot be enabled (possible */ |
bogdanm | 0:9b334a45a8ff | 1524 | /* causes: ADC clock not running, ...). */ |
bogdanm | 0:9b334a45a8ff | 1525 | if (ADC_IS_ENABLE(hadc) == RESET) |
bogdanm | 0:9b334a45a8ff | 1526 | { |
bogdanm | 0:9b334a45a8ff | 1527 | /* Check if conditions to enable the ADC are fulfilled */ |
bogdanm | 0:9b334a45a8ff | 1528 | if (ADC_ENABLING_CONDITIONS(hadc) == RESET) |
bogdanm | 0:9b334a45a8ff | 1529 | { |
bogdanm | 0:9b334a45a8ff | 1530 | /* Update ADC state machine to error */ |
bogdanm | 0:9b334a45a8ff | 1531 | hadc->State = HAL_ADC_STATE_ERROR; |
bogdanm | 0:9b334a45a8ff | 1532 | |
bogdanm | 0:9b334a45a8ff | 1533 | /* Set ADC error code to ADC IP internal error */ |
bogdanm | 0:9b334a45a8ff | 1534 | hadc->ErrorCode |= HAL_ADC_ERROR_INTERNAL; |
bogdanm | 0:9b334a45a8ff | 1535 | |
bogdanm | 0:9b334a45a8ff | 1536 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 1537 | } |
bogdanm | 0:9b334a45a8ff | 1538 | |
bogdanm | 0:9b334a45a8ff | 1539 | /* Enable the ADC peripheral */ |
bogdanm | 0:9b334a45a8ff | 1540 | __HAL_ADC_ENABLE(hadc); |
bogdanm | 0:9b334a45a8ff | 1541 | |
bogdanm | 0:9b334a45a8ff | 1542 | /* Delay for ADC stabilization time. */ |
bogdanm | 0:9b334a45a8ff | 1543 | ADC_DelayMicroSecond(ADC_STAB_DELAY_US); |
bogdanm | 0:9b334a45a8ff | 1544 | |
bogdanm | 0:9b334a45a8ff | 1545 | /* Wait for ADC effectively enabled */ |
bogdanm | 0:9b334a45a8ff | 1546 | /* Get timeout */ |
bogdanm | 0:9b334a45a8ff | 1547 | tickstart = HAL_GetTick(); |
bogdanm | 0:9b334a45a8ff | 1548 | |
bogdanm | 0:9b334a45a8ff | 1549 | /* Skip polling for RDY ADRDY when AutoOFF is enabled */ |
bogdanm | 0:9b334a45a8ff | 1550 | if (hadc->Init.LowPowerAutoPowerOff != ENABLE) |
bogdanm | 0:9b334a45a8ff | 1551 | { |
bogdanm | 0:9b334a45a8ff | 1552 | while(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_RDY) == RESET) |
bogdanm | 0:9b334a45a8ff | 1553 | { |
bogdanm | 0:9b334a45a8ff | 1554 | /* Check for the Timeout */ |
bogdanm | 0:9b334a45a8ff | 1555 | if(ADC_ENABLE_TIMEOUT != HAL_MAX_DELAY) |
bogdanm | 0:9b334a45a8ff | 1556 | { |
bogdanm | 0:9b334a45a8ff | 1557 | if((HAL_GetTick() - tickstart ) > ADC_ENABLE_TIMEOUT) |
bogdanm | 0:9b334a45a8ff | 1558 | { |
bogdanm | 0:9b334a45a8ff | 1559 | /* Update ADC state machine to error */ |
bogdanm | 0:9b334a45a8ff | 1560 | hadc->State = HAL_ADC_STATE_ERROR; |
bogdanm | 0:9b334a45a8ff | 1561 | |
bogdanm | 0:9b334a45a8ff | 1562 | /* Set ADC error code to ADC IP internal error */ |
bogdanm | 0:9b334a45a8ff | 1563 | hadc->ErrorCode |= HAL_ADC_ERROR_INTERNAL; |
bogdanm | 0:9b334a45a8ff | 1564 | |
bogdanm | 0:9b334a45a8ff | 1565 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 1566 | } |
bogdanm | 0:9b334a45a8ff | 1567 | } |
bogdanm | 0:9b334a45a8ff | 1568 | } |
bogdanm | 0:9b334a45a8ff | 1569 | } |
bogdanm | 0:9b334a45a8ff | 1570 | } |
bogdanm | 0:9b334a45a8ff | 1571 | |
bogdanm | 0:9b334a45a8ff | 1572 | /* Return HAL status */ |
bogdanm | 0:9b334a45a8ff | 1573 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 1574 | } |
bogdanm | 0:9b334a45a8ff | 1575 | |
bogdanm | 0:9b334a45a8ff | 1576 | /** |
bogdanm | 0:9b334a45a8ff | 1577 | * @brief Disable the selected ADC. |
bogdanm | 0:9b334a45a8ff | 1578 | * @note Prerequisite condition to use this function: ADC conversions must be |
bogdanm | 0:9b334a45a8ff | 1579 | * stopped to disable the ADC. |
bogdanm | 0:9b334a45a8ff | 1580 | * @param hadc: ADC handle |
bogdanm | 0:9b334a45a8ff | 1581 | * @retval HAL status. |
bogdanm | 0:9b334a45a8ff | 1582 | */ |
bogdanm | 0:9b334a45a8ff | 1583 | static HAL_StatusTypeDef ADC_Disable(ADC_HandleTypeDef* hadc) |
bogdanm | 0:9b334a45a8ff | 1584 | { |
bogdanm | 0:9b334a45a8ff | 1585 | uint32_t tickstart = 0; |
bogdanm | 0:9b334a45a8ff | 1586 | |
bogdanm | 0:9b334a45a8ff | 1587 | /* Verification if ADC is not already disabled: */ |
bogdanm | 0:9b334a45a8ff | 1588 | /* forbidden to disable ADC (set bit ADC_CR_ADDIS) if ADC is already */ |
bogdanm | 0:9b334a45a8ff | 1589 | /* disabled. */ |
bogdanm | 0:9b334a45a8ff | 1590 | if (ADC_IS_ENABLE(hadc) != RESET ) |
bogdanm | 0:9b334a45a8ff | 1591 | { |
bogdanm | 0:9b334a45a8ff | 1592 | /* Check if conditions to disable the ADC are fulfilled */ |
bogdanm | 0:9b334a45a8ff | 1593 | if (ADC_DISABLING_CONDITIONS(hadc) != RESET) |
bogdanm | 0:9b334a45a8ff | 1594 | { |
bogdanm | 0:9b334a45a8ff | 1595 | /* Disable the ADC peripheral */ |
bogdanm | 0:9b334a45a8ff | 1596 | __HAL_ADC_DISABLE(hadc); |
bogdanm | 0:9b334a45a8ff | 1597 | } |
bogdanm | 0:9b334a45a8ff | 1598 | else |
bogdanm | 0:9b334a45a8ff | 1599 | { |
bogdanm | 0:9b334a45a8ff | 1600 | /* Update ADC state machine to error */ |
bogdanm | 0:9b334a45a8ff | 1601 | hadc->State = HAL_ADC_STATE_ERROR; |
bogdanm | 0:9b334a45a8ff | 1602 | |
bogdanm | 0:9b334a45a8ff | 1603 | /* Set ADC error code to ADC internal error */ |
bogdanm | 0:9b334a45a8ff | 1604 | hadc->ErrorCode |= HAL_ADC_ERROR_INTERNAL; |
bogdanm | 0:9b334a45a8ff | 1605 | |
bogdanm | 0:9b334a45a8ff | 1606 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 1607 | } |
bogdanm | 0:9b334a45a8ff | 1608 | |
bogdanm | 0:9b334a45a8ff | 1609 | /* Wait for ADC effectively disabled */ |
bogdanm | 0:9b334a45a8ff | 1610 | /* Get timeout */ |
bogdanm | 0:9b334a45a8ff | 1611 | tickstart = HAL_GetTick(); |
bogdanm | 0:9b334a45a8ff | 1612 | |
bogdanm | 0:9b334a45a8ff | 1613 | while(HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADEN)) |
bogdanm | 0:9b334a45a8ff | 1614 | { |
bogdanm | 0:9b334a45a8ff | 1615 | /* Check for the Timeout */ |
bogdanm | 0:9b334a45a8ff | 1616 | if(ADC_ENABLE_TIMEOUT != HAL_MAX_DELAY) |
bogdanm | 0:9b334a45a8ff | 1617 | { |
bogdanm | 0:9b334a45a8ff | 1618 | if((HAL_GetTick() - tickstart ) > ADC_DISABLE_TIMEOUT) |
bogdanm | 0:9b334a45a8ff | 1619 | { |
bogdanm | 0:9b334a45a8ff | 1620 | /* Update ADC state machine to error */ |
bogdanm | 0:9b334a45a8ff | 1621 | hadc->State = HAL_ADC_STATE_ERROR; |
bogdanm | 0:9b334a45a8ff | 1622 | |
bogdanm | 0:9b334a45a8ff | 1623 | /* Set ADC error code to ADC internal error */ |
bogdanm | 0:9b334a45a8ff | 1624 | hadc->ErrorCode |= HAL_ADC_ERROR_INTERNAL; |
bogdanm | 0:9b334a45a8ff | 1625 | |
bogdanm | 0:9b334a45a8ff | 1626 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 1627 | } |
bogdanm | 0:9b334a45a8ff | 1628 | } |
bogdanm | 0:9b334a45a8ff | 1629 | } |
bogdanm | 0:9b334a45a8ff | 1630 | } |
bogdanm | 0:9b334a45a8ff | 1631 | |
bogdanm | 0:9b334a45a8ff | 1632 | /* Return HAL status */ |
bogdanm | 0:9b334a45a8ff | 1633 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 1634 | } |
bogdanm | 0:9b334a45a8ff | 1635 | |
bogdanm | 0:9b334a45a8ff | 1636 | /** |
bogdanm | 0:9b334a45a8ff | 1637 | * @brief Stop ADC conversion. |
bogdanm | 0:9b334a45a8ff | 1638 | * @note Prerequisite condition to use this function: ADC conversions must be |
bogdanm | 0:9b334a45a8ff | 1639 | * stopped to disable the ADC. |
bogdanm | 0:9b334a45a8ff | 1640 | * @param hadc: ADC handle |
bogdanm | 0:9b334a45a8ff | 1641 | * @param ConversionGroup: Only ADC group regular. |
bogdanm | 0:9b334a45a8ff | 1642 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 1643 | * @arg ADC_REGULAR_GROUP: ADC regular conversion type. |
bogdanm | 0:9b334a45a8ff | 1644 | * @retval HAL status. |
bogdanm | 0:9b334a45a8ff | 1645 | */ |
bogdanm | 0:9b334a45a8ff | 1646 | static HAL_StatusTypeDef ADC_ConversionStop(ADC_HandleTypeDef* hadc, uint32_t ConversionGroup) |
bogdanm | 0:9b334a45a8ff | 1647 | { |
bogdanm | 0:9b334a45a8ff | 1648 | uint32_t tickstart = 0 ; |
bogdanm | 0:9b334a45a8ff | 1649 | |
bogdanm | 0:9b334a45a8ff | 1650 | /* Check the parameters */ |
bogdanm | 0:9b334a45a8ff | 1651 | assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); |
bogdanm | 0:9b334a45a8ff | 1652 | assert_param(IS_ADC_CONVERSION_GROUP(ConversionGroup)); |
bogdanm | 0:9b334a45a8ff | 1653 | |
bogdanm | 0:9b334a45a8ff | 1654 | /* Parameters update conditioned to ADC state: */ |
bogdanm | 0:9b334a45a8ff | 1655 | /* Parameters that can be updated when ADC is disabled or enabled without */ |
bogdanm | 0:9b334a45a8ff | 1656 | /* conversion on going : */ |
bogdanm | 0:9b334a45a8ff | 1657 | if (ADC_IS_CONVERSION_ONGOING(hadc) != RESET) |
bogdanm | 0:9b334a45a8ff | 1658 | { |
bogdanm | 0:9b334a45a8ff | 1659 | /* Update ADC state machine to error */ |
bogdanm | 0:9b334a45a8ff | 1660 | hadc->State = HAL_ADC_STATE_ERROR; |
bogdanm | 0:9b334a45a8ff | 1661 | /* Process unlocked */ |
bogdanm | 0:9b334a45a8ff | 1662 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 1663 | } |
bogdanm | 0:9b334a45a8ff | 1664 | |
bogdanm | 0:9b334a45a8ff | 1665 | /* Verification: if ADC is not already stopped, bypass this function */ |
bogdanm | 0:9b334a45a8ff | 1666 | if (HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADSTART)) |
bogdanm | 0:9b334a45a8ff | 1667 | { |
bogdanm | 0:9b334a45a8ff | 1668 | /* Stop potential conversion on regular group */ |
bogdanm | 0:9b334a45a8ff | 1669 | if (ConversionGroup == ADC_REGULAR_GROUP) |
bogdanm | 0:9b334a45a8ff | 1670 | { |
bogdanm | 0:9b334a45a8ff | 1671 | /* Software is allowed to set ADSTP only when ADSTART=1 and ADDIS=0 */ |
bogdanm | 0:9b334a45a8ff | 1672 | if (HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADSTART) && \ |
bogdanm | 0:9b334a45a8ff | 1673 | HAL_IS_BIT_CLR(hadc->Instance->CR, ADC_CR_ADDIS) ) |
bogdanm | 0:9b334a45a8ff | 1674 | { |
bogdanm | 0:9b334a45a8ff | 1675 | /* Stop conversions on regular group */ |
bogdanm | 0:9b334a45a8ff | 1676 | hadc->Instance->CR |= ADC_CR_ADSTP; |
bogdanm | 0:9b334a45a8ff | 1677 | } |
bogdanm | 0:9b334a45a8ff | 1678 | } |
bogdanm | 0:9b334a45a8ff | 1679 | |
bogdanm | 0:9b334a45a8ff | 1680 | /* Wait for conversion effectively stopped */ |
bogdanm | 0:9b334a45a8ff | 1681 | /* Get timeout */ |
bogdanm | 0:9b334a45a8ff | 1682 | tickstart = HAL_GetTick(); |
bogdanm | 0:9b334a45a8ff | 1683 | |
bogdanm | 0:9b334a45a8ff | 1684 | while((hadc->Instance->CR & ADC_CR_ADSTART) != RESET) |
bogdanm | 0:9b334a45a8ff | 1685 | { |
bogdanm | 0:9b334a45a8ff | 1686 | /* Check for the Timeout */ |
bogdanm | 0:9b334a45a8ff | 1687 | if(ADC_STOP_CONVERSION_TIMEOUT != HAL_MAX_DELAY) |
bogdanm | 0:9b334a45a8ff | 1688 | { |
bogdanm | 0:9b334a45a8ff | 1689 | if((HAL_GetTick() - tickstart ) > ADC_STOP_CONVERSION_TIMEOUT) |
bogdanm | 0:9b334a45a8ff | 1690 | { |
bogdanm | 0:9b334a45a8ff | 1691 | /* Update ADC state machine to error */ |
bogdanm | 0:9b334a45a8ff | 1692 | hadc->State = HAL_ADC_STATE_ERROR; |
bogdanm | 0:9b334a45a8ff | 1693 | |
bogdanm | 0:9b334a45a8ff | 1694 | /* Set ADC error code to ADC IP internal error */ |
bogdanm | 0:9b334a45a8ff | 1695 | hadc->ErrorCode |= HAL_ADC_ERROR_INTERNAL; |
bogdanm | 0:9b334a45a8ff | 1696 | |
bogdanm | 0:9b334a45a8ff | 1697 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 1698 | } |
bogdanm | 0:9b334a45a8ff | 1699 | } |
bogdanm | 0:9b334a45a8ff | 1700 | } |
bogdanm | 0:9b334a45a8ff | 1701 | } |
bogdanm | 0:9b334a45a8ff | 1702 | |
bogdanm | 0:9b334a45a8ff | 1703 | /* Return HAL status */ |
bogdanm | 0:9b334a45a8ff | 1704 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 1705 | } |
bogdanm | 0:9b334a45a8ff | 1706 | |
bogdanm | 0:9b334a45a8ff | 1707 | /** |
bogdanm | 0:9b334a45a8ff | 1708 | * @brief DMA transfer complete callback. |
bogdanm | 0:9b334a45a8ff | 1709 | * @param hdma: pointer to DMA handle. |
bogdanm | 0:9b334a45a8ff | 1710 | * @retval None |
bogdanm | 0:9b334a45a8ff | 1711 | */ |
bogdanm | 0:9b334a45a8ff | 1712 | static void ADC_DMAConvCplt(DMA_HandleTypeDef *hdma) |
bogdanm | 0:9b334a45a8ff | 1713 | { |
bogdanm | 0:9b334a45a8ff | 1714 | ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; |
bogdanm | 0:9b334a45a8ff | 1715 | |
bogdanm | 0:9b334a45a8ff | 1716 | /* Change ADC state */ |
bogdanm | 0:9b334a45a8ff | 1717 | hadc->State = HAL_ADC_STATE_EOC; |
bogdanm | 0:9b334a45a8ff | 1718 | |
bogdanm | 0:9b334a45a8ff | 1719 | HAL_ADC_ConvCpltCallback(hadc); |
bogdanm | 0:9b334a45a8ff | 1720 | } |
bogdanm | 0:9b334a45a8ff | 1721 | |
bogdanm | 0:9b334a45a8ff | 1722 | /** |
bogdanm | 0:9b334a45a8ff | 1723 | * @brief DMA half transfer complete callback. |
bogdanm | 0:9b334a45a8ff | 1724 | * @param hdma: pointer to DMA handle. |
bogdanm | 0:9b334a45a8ff | 1725 | * @retval None |
bogdanm | 0:9b334a45a8ff | 1726 | */ |
bogdanm | 0:9b334a45a8ff | 1727 | static void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma) |
bogdanm | 0:9b334a45a8ff | 1728 | { |
bogdanm | 0:9b334a45a8ff | 1729 | ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; |
bogdanm | 0:9b334a45a8ff | 1730 | |
bogdanm | 0:9b334a45a8ff | 1731 | /* Conversion complete callback */ |
bogdanm | 0:9b334a45a8ff | 1732 | HAL_ADC_ConvHalfCpltCallback(hadc); |
bogdanm | 0:9b334a45a8ff | 1733 | } |
bogdanm | 0:9b334a45a8ff | 1734 | |
bogdanm | 0:9b334a45a8ff | 1735 | /** |
bogdanm | 0:9b334a45a8ff | 1736 | * @brief DMA error callback |
bogdanm | 0:9b334a45a8ff | 1737 | * @param hdma: pointer to DMA handle. |
bogdanm | 0:9b334a45a8ff | 1738 | * @retval None |
bogdanm | 0:9b334a45a8ff | 1739 | */ |
bogdanm | 0:9b334a45a8ff | 1740 | static void ADC_DMAError(DMA_HandleTypeDef *hdma) |
bogdanm | 0:9b334a45a8ff | 1741 | { |
bogdanm | 0:9b334a45a8ff | 1742 | ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; |
bogdanm | 0:9b334a45a8ff | 1743 | hadc->State= HAL_ADC_STATE_ERROR; |
bogdanm | 0:9b334a45a8ff | 1744 | /* Set ADC error code to DMA error */ |
bogdanm | 0:9b334a45a8ff | 1745 | hadc->ErrorCode |= HAL_ADC_ERROR_DMA; |
bogdanm | 0:9b334a45a8ff | 1746 | HAL_ADC_ErrorCallback(hadc); |
bogdanm | 0:9b334a45a8ff | 1747 | } |
bogdanm | 0:9b334a45a8ff | 1748 | |
bogdanm | 0:9b334a45a8ff | 1749 | /** |
bogdanm | 0:9b334a45a8ff | 1750 | * @brief Delay micro seconds |
bogdanm | 0:9b334a45a8ff | 1751 | * @param microSecond : delay |
bogdanm | 0:9b334a45a8ff | 1752 | * @retval None |
bogdanm | 0:9b334a45a8ff | 1753 | */ |
bogdanm | 0:9b334a45a8ff | 1754 | static void ADC_DelayMicroSecond(uint32_t microSecond) |
bogdanm | 0:9b334a45a8ff | 1755 | { |
bogdanm | 0:9b334a45a8ff | 1756 | /* Compute number of CPU cycles to wait for */ |
bogdanm | 0:9b334a45a8ff | 1757 | __IO uint32_t waitLoopIndex = (microSecond * (SystemCoreClock / 1000000)); |
bogdanm | 0:9b334a45a8ff | 1758 | |
bogdanm | 0:9b334a45a8ff | 1759 | while(waitLoopIndex != 0) |
bogdanm | 0:9b334a45a8ff | 1760 | { |
bogdanm | 0:9b334a45a8ff | 1761 | waitLoopIndex--; |
bogdanm | 0:9b334a45a8ff | 1762 | } |
bogdanm | 0:9b334a45a8ff | 1763 | } |
bogdanm | 0:9b334a45a8ff | 1764 | |
bogdanm | 0:9b334a45a8ff | 1765 | /** |
bogdanm | 0:9b334a45a8ff | 1766 | * @} |
bogdanm | 0:9b334a45a8ff | 1767 | */ |
bogdanm | 0:9b334a45a8ff | 1768 | |
bogdanm | 0:9b334a45a8ff | 1769 | #endif /* HAL_ADC_MODULE_ENABLED */ |
bogdanm | 0:9b334a45a8ff | 1770 | /** |
bogdanm | 0:9b334a45a8ff | 1771 | * @} |
bogdanm | 0:9b334a45a8ff | 1772 | */ |
bogdanm | 0:9b334a45a8ff | 1773 | |
bogdanm | 0:9b334a45a8ff | 1774 | /** |
bogdanm | 0:9b334a45a8ff | 1775 | * @} |
bogdanm | 0:9b334a45a8ff | 1776 | */ |
bogdanm | 0:9b334a45a8ff | 1777 | |
bogdanm | 0:9b334a45a8ff | 1778 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |