en 129 / mbed-dev

fix LPC812 PWM

Dependents:   IR_LED_Send

Fork of mbed-dev by mbed official

targets/cmsis/TARGET_STM/TARGET_STM32F0/stm32f0xx_hal_tim_ex.c@0:9b334a45a8ff, 2015-10-01 (annotated)

Committer:
bogdanm
Date:
Thu Oct 01 15:25:22 2015 +0300
Revision:
0:9b334a45a8ff
Initial commit on mbed-dev



Replaces mbed-src (now inactive)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /**
bogdanm 0:9b334a45a8ff 2 ******************************************************************************
bogdanm 0:9b334a45a8ff 3 * @file stm32f0xx_hal_tim_ex.c
bogdanm 0:9b334a45a8ff 4 * @author MCD Application Team
bogdanm 0:9b334a45a8ff 5 * @version V1.3.0
bogdanm 0:9b334a45a8ff 6 * @date 26-June-2015
bogdanm 0:9b334a45a8ff 7 * @brief TIM HAL module driver.
bogdanm 0:9b334a45a8ff 8 * This file provides firmware functions to manage the following
bogdanm 0:9b334a45a8ff 9 * functionalities of the Timer Extended peripheral:
bogdanm 0:9b334a45a8ff 10 * + Time Hall Sensor Interface Initialization
bogdanm 0:9b334a45a8ff 11 * + Time Hall Sensor Interface Start
bogdanm 0:9b334a45a8ff 12 * + Time Complementary signal bread and dead time configuration
bogdanm 0:9b334a45a8ff 13 * + Time Master and Slave synchronization configuration
bogdanm 0:9b334a45a8ff 14 * + Timer remapping capabilities configuration
bogdanm 0:9b334a45a8ff 15 @verbatim
bogdanm 0:9b334a45a8ff 16 ==============================================================================
bogdanm 0:9b334a45a8ff 17 ##### TIMER Extended features #####
bogdanm 0:9b334a45a8ff 18 ==============================================================================
bogdanm 0:9b334a45a8ff 19 [..]
bogdanm 0:9b334a45a8ff 20 The Timer Extended features include:
bogdanm 0:9b334a45a8ff 21 (#) Complementary outputs with programmable dead-time for :
bogdanm 0:9b334a45a8ff 22 (++) Output Compare
bogdanm 0:9b334a45a8ff 23 (++) PWM generation (Edge and Center-aligned Mode)
bogdanm 0:9b334a45a8ff 24 (++) One-pulse mode output
bogdanm 0:9b334a45a8ff 25 (#) Synchronization circuit to control the timer with external signals and to
bogdanm 0:9b334a45a8ff 26 interconnect several timers together.
bogdanm 0:9b334a45a8ff 27 (#) Break input to put the timer output signals in reset state or in a known state.
bogdanm 0:9b334a45a8ff 28 (#) Supports incremental (quadrature) encoder and hall-sensor circuitry for
bogdanm 0:9b334a45a8ff 29 positioning purposes
bogdanm 0:9b334a45a8ff 30
bogdanm 0:9b334a45a8ff 31 ##### How to use this driver #####
bogdanm 0:9b334a45a8ff 32 ==============================================================================
bogdanm 0:9b334a45a8ff 33 [..]
bogdanm 0:9b334a45a8ff 34 (#) Initialize the TIM low level resources by implementing the following functions
bogdanm 0:9b334a45a8ff 35 depending from feature used :
bogdanm 0:9b334a45a8ff 36 (++) Complementary Output Compare : HAL_TIM_OC_MspInit()
bogdanm 0:9b334a45a8ff 37 (++) Complementary PWM generation : HAL_TIM_PWM_MspInit()
bogdanm 0:9b334a45a8ff 38 (++) Complementary One-pulse mode output : HAL_TIM_OnePulse_MspInit()
bogdanm 0:9b334a45a8ff 39 (++) Hall Sensor output : HAL_TIM_HallSensor_MspInit()
bogdanm 0:9b334a45a8ff 40
bogdanm 0:9b334a45a8ff 41 (#) Initialize the TIM low level resources :
bogdanm 0:9b334a45a8ff 42 (##) Enable the TIM interface clock using __HAL_RCC_TIMx_CLK_ENABLE();
bogdanm 0:9b334a45a8ff 43 (##) TIM pins configuration
bogdanm 0:9b334a45a8ff 44 (+++) Enable the clock for the TIM GPIOs using the following function:
bogdanm 0:9b334a45a8ff 45 __HAL_RCC_GPIOx_CLK_ENABLE();
bogdanm 0:9b334a45a8ff 46 (+++) Configure these TIM pins in Alternate function mode using HAL_GPIO_Init();
bogdanm 0:9b334a45a8ff 47
bogdanm 0:9b334a45a8ff 48 (#) The external Clock can be configured, if needed (the default clock is the
bogdanm 0:9b334a45a8ff 49 internal clock from the APBx), using the following function:
bogdanm 0:9b334a45a8ff 50 HAL_TIM_ConfigClockSource, the clock configuration should be done before
bogdanm 0:9b334a45a8ff 51 any start function.
bogdanm 0:9b334a45a8ff 52
bogdanm 0:9b334a45a8ff 53 (#) Configure the TIM in the desired functioning mode using one of the
bogdanm 0:9b334a45a8ff 54 initialization function of this driver:
bogdanm 0:9b334a45a8ff 55 (++) HAL_TIMEx_HallSensor_Init and HAL_TIMEx_ConfigCommutationEvent: to use the
bogdanm 0:9b334a45a8ff 56 Timer Hall Sensor Interface and the commutation event with the corresponding
bogdanm 0:9b334a45a8ff 57 Interrupt and DMA request if needed (Note that One Timer is used to interface
bogdanm 0:9b334a45a8ff 58 with the Hall sensor Interface and another Timer should be used to use
bogdanm 0:9b334a45a8ff 59 the commutation event).
bogdanm 0:9b334a45a8ff 60
bogdanm 0:9b334a45a8ff 61 (#) Activate the TIM peripheral using one of the start functions:
bogdanm 0:9b334a45a8ff 62 (++) Complementary Output Compare : HAL_TIMEx_OCN_Start(), HAL_TIMEx_OCN_Start_DMA(), HAL_TIMEx_OCN_Start_IT()
bogdanm 0:9b334a45a8ff 63 (++) Complementary PWM generation : HAL_TIMEx_PWMN_Start(), HAL_TIMEx_PWMN_Start_DMA(), HAL_TIMEx_PWMN_Start_IT()
bogdanm 0:9b334a45a8ff 64 (++) Complementary One-pulse mode output : HAL_TIMEx_OnePulseN_Start(), HAL_TIMEx_OnePulseN_Start_IT()
bogdanm 0:9b334a45a8ff 65 (++) Hall Sensor output : HAL_TIMEx_HallSensor_Start(), HAL_TIMEx_HallSensor_Start_DMA(), HAL_TIMEx_HallSensor_Start_IT().
bogdanm 0:9b334a45a8ff 66
bogdanm 0:9b334a45a8ff 67
bogdanm 0:9b334a45a8ff 68 @endverbatim
bogdanm 0:9b334a45a8ff 69 ******************************************************************************
bogdanm 0:9b334a45a8ff 70 * @attention
bogdanm 0:9b334a45a8ff 71 *
bogdanm 0:9b334a45a8ff 72 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
bogdanm 0:9b334a45a8ff 73 *
bogdanm 0:9b334a45a8ff 74 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 0:9b334a45a8ff 75 * are permitted provided that the following conditions are met:
bogdanm 0:9b334a45a8ff 76 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 0:9b334a45a8ff 77 * this list of conditions and the following disclaimer.
bogdanm 0:9b334a45a8ff 78 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 0:9b334a45a8ff 79 * this list of conditions and the following disclaimer in the documentation
bogdanm 0:9b334a45a8ff 80 * and/or other materials provided with the distribution.
bogdanm 0:9b334a45a8ff 81 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 0:9b334a45a8ff 82 * may be used to endorse or promote products derived from this software
bogdanm 0:9b334a45a8ff 83 * without specific prior written permission.
bogdanm 0:9b334a45a8ff 84 *
bogdanm 0:9b334a45a8ff 85 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 0:9b334a45a8ff 86 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 0:9b334a45a8ff 87 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 0:9b334a45a8ff 88 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 0:9b334a45a8ff 89 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 0:9b334a45a8ff 90 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 0:9b334a45a8ff 91 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 0:9b334a45a8ff 92 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 0:9b334a45a8ff 93 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 0:9b334a45a8ff 94 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 0:9b334a45a8ff 95 *
bogdanm 0:9b334a45a8ff 96 ******************************************************************************
bogdanm 0:9b334a45a8ff 97 */
bogdanm 0:9b334a45a8ff 98
bogdanm 0:9b334a45a8ff 99 /* Includes ------------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 100 #include "stm32f0xx_hal.h"
bogdanm 0:9b334a45a8ff 101
bogdanm 0:9b334a45a8ff 102 /** @addtogroup STM32F0xx_HAL_Driver
bogdanm 0:9b334a45a8ff 103 * @{
bogdanm 0:9b334a45a8ff 104 */
bogdanm 0:9b334a45a8ff 105
bogdanm 0:9b334a45a8ff 106 /** @defgroup TIMEx TIMEx
bogdanm 0:9b334a45a8ff 107 * @brief TIM Extended HAL module driver
bogdanm 0:9b334a45a8ff 108 * @{
bogdanm 0:9b334a45a8ff 109 */
bogdanm 0:9b334a45a8ff 110
bogdanm 0:9b334a45a8ff 111 #ifdef HAL_TIM_MODULE_ENABLED
bogdanm 0:9b334a45a8ff 112
bogdanm 0:9b334a45a8ff 113 /* Private typedef -----------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 114 /* Private define ------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 115 /* Private macro -------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 116 /* Private variables ---------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 117 /* Private function prototypes -----------------------------------------------*/
bogdanm 0:9b334a45a8ff 118
bogdanm 0:9b334a45a8ff 119 /** @defgroup TIMEx_Private_Functions TIMEx Private Functions
bogdanm 0:9b334a45a8ff 120 * @{
bogdanm 0:9b334a45a8ff 121 */
bogdanm 0:9b334a45a8ff 122 static void TIM_CCxNChannelCmd(TIM_TypeDef* TIMx, uint32_t Channel, uint32_t ChannelNState);
bogdanm 0:9b334a45a8ff 123 /**
bogdanm 0:9b334a45a8ff 124 * @}
bogdanm 0:9b334a45a8ff 125 */
bogdanm 0:9b334a45a8ff 126
bogdanm 0:9b334a45a8ff 127 /* Exported functions ---------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 128
bogdanm 0:9b334a45a8ff 129 /** @defgroup TIMEx_Exported_Functions TIMEx Exported Functions
bogdanm 0:9b334a45a8ff 130 * @{
bogdanm 0:9b334a45a8ff 131 */
bogdanm 0:9b334a45a8ff 132
bogdanm 0:9b334a45a8ff 133 /** @defgroup TIMEx_Exported_Functions_Group1 Timer Hall Sensor functions
bogdanm 0:9b334a45a8ff 134 * @brief Timer Hall Sensor functions
bogdanm 0:9b334a45a8ff 135 *
bogdanm 0:9b334a45a8ff 136 @verbatim
bogdanm 0:9b334a45a8ff 137 ==============================================================================
bogdanm 0:9b334a45a8ff 138 ##### Timer Hall Sensor functions #####
bogdanm 0:9b334a45a8ff 139 ==============================================================================
bogdanm 0:9b334a45a8ff 140 [..]
bogdanm 0:9b334a45a8ff 141 This section provides functions allowing to:
bogdanm 0:9b334a45a8ff 142 (+) Initialize and configure TIM HAL Sensor.
bogdanm 0:9b334a45a8ff 143 (+) De-initialize TIM HAL Sensor.
bogdanm 0:9b334a45a8ff 144 (+) Start the Hall Sensor Interface.
bogdanm 0:9b334a45a8ff 145 (+) Stop the Hall Sensor Interface.
bogdanm 0:9b334a45a8ff 146 (+) Start the Hall Sensor Interface and enable interrupts.
bogdanm 0:9b334a45a8ff 147 (+) Stop the Hall Sensor Interface and disable interrupts.
bogdanm 0:9b334a45a8ff 148 (+) Start the Hall Sensor Interface and enable DMA transfers.
bogdanm 0:9b334a45a8ff 149 (+) Stop the Hall Sensor Interface and disable DMA transfers.
bogdanm 0:9b334a45a8ff 150
bogdanm 0:9b334a45a8ff 151 @endverbatim
bogdanm 0:9b334a45a8ff 152 * @{
bogdanm 0:9b334a45a8ff 153 */
bogdanm 0:9b334a45a8ff 154 /**
bogdanm 0:9b334a45a8ff 155 * @brief Initializes the TIM Hall Sensor Interface and create the associated handle.
bogdanm 0:9b334a45a8ff 156 * @param htim : TIM Encoder Interface handle
bogdanm 0:9b334a45a8ff 157 * @param sConfig : TIM Hall Sensor configuration structure
bogdanm 0:9b334a45a8ff 158 * @retval HAL status
bogdanm 0:9b334a45a8ff 159 */
bogdanm 0:9b334a45a8ff 160 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *htim, TIM_HallSensor_InitTypeDef* sConfig)
bogdanm 0:9b334a45a8ff 161 {
bogdanm 0:9b334a45a8ff 162 TIM_OC_InitTypeDef OC_Config;
bogdanm 0:9b334a45a8ff 163
bogdanm 0:9b334a45a8ff 164 /* Check the TIM handle allocation */
bogdanm 0:9b334a45a8ff 165 if(htim == NULL)
bogdanm 0:9b334a45a8ff 166 {
bogdanm 0:9b334a45a8ff 167 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 168 }
bogdanm 0:9b334a45a8ff 169
bogdanm 0:9b334a45a8ff 170 assert_param(IS_TIM_XOR_INSTANCE(htim->Instance));
bogdanm 0:9b334a45a8ff 171 assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
bogdanm 0:9b334a45a8ff 172 assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
bogdanm 0:9b334a45a8ff 173 assert_param(IS_TIM_IC_POLARITY(sConfig->IC1Polarity));
bogdanm 0:9b334a45a8ff 174 assert_param(IS_TIM_IC_PRESCALER(sConfig->IC1Prescaler));
bogdanm 0:9b334a45a8ff 175 assert_param(IS_TIM_IC_FILTER(sConfig->IC1Filter));
bogdanm 0:9b334a45a8ff 176
bogdanm 0:9b334a45a8ff 177 if(htim->State == HAL_TIM_STATE_RESET)
bogdanm 0:9b334a45a8ff 178 {
bogdanm 0:9b334a45a8ff 179 /* Allocate lock resource and initialize it */
bogdanm 0:9b334a45a8ff 180 htim->Lock = HAL_UNLOCKED;
bogdanm 0:9b334a45a8ff 181
bogdanm 0:9b334a45a8ff 182 /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
bogdanm 0:9b334a45a8ff 183 HAL_TIMEx_HallSensor_MspInit(htim);
bogdanm 0:9b334a45a8ff 184 }
bogdanm 0:9b334a45a8ff 185
bogdanm 0:9b334a45a8ff 186 /* Set the TIM state */
bogdanm 0:9b334a45a8ff 187 htim->State= HAL_TIM_STATE_BUSY;
bogdanm 0:9b334a45a8ff 188
bogdanm 0:9b334a45a8ff 189 /* Configure the Time base in the Encoder Mode */
bogdanm 0:9b334a45a8ff 190 TIM_Base_SetConfig(htim->Instance, &htim->Init);
bogdanm 0:9b334a45a8ff 191
bogdanm 0:9b334a45a8ff 192 /* Configure the Channel 1 as Input Channel to interface with the three Outputs of the Hall sensor */
bogdanm 0:9b334a45a8ff 193 TIM_TI1_SetConfig(htim->Instance, sConfig->IC1Polarity, TIM_ICSELECTION_TRC, sConfig->IC1Filter);
bogdanm 0:9b334a45a8ff 194
bogdanm 0:9b334a45a8ff 195 /* Reset the IC1PSC Bits */
bogdanm 0:9b334a45a8ff 196 htim->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC;
bogdanm 0:9b334a45a8ff 197 /* Set the IC1PSC value */
bogdanm 0:9b334a45a8ff 198 htim->Instance->CCMR1 |= sConfig->IC1Prescaler;
bogdanm 0:9b334a45a8ff 199
bogdanm 0:9b334a45a8ff 200 /* Enable the Hall sensor interface (XOR function of the three inputs) */
bogdanm 0:9b334a45a8ff 201 htim->Instance->CR2 |= TIM_CR2_TI1S;
bogdanm 0:9b334a45a8ff 202
bogdanm 0:9b334a45a8ff 203 /* Select the TIM_TS_TI1F_ED signal as Input trigger for the TIM */
bogdanm 0:9b334a45a8ff 204 htim->Instance->SMCR &= ~TIM_SMCR_TS;
bogdanm 0:9b334a45a8ff 205 htim->Instance->SMCR |= TIM_TS_TI1F_ED;
bogdanm 0:9b334a45a8ff 206
bogdanm 0:9b334a45a8ff 207 /* Use the TIM_TS_TI1F_ED signal to reset the TIM counter each edge detection */
bogdanm 0:9b334a45a8ff 208 htim->Instance->SMCR &= ~TIM_SMCR_SMS;
bogdanm 0:9b334a45a8ff 209 htim->Instance->SMCR |= TIM_SLAVEMODE_RESET;
bogdanm 0:9b334a45a8ff 210
bogdanm 0:9b334a45a8ff 211 /* Program channel 2 in PWM 2 mode with the desired Commutation_Delay*/
bogdanm 0:9b334a45a8ff 212 OC_Config.OCFastMode = TIM_OCFAST_DISABLE;
bogdanm 0:9b334a45a8ff 213 OC_Config.OCIdleState = TIM_OCIDLESTATE_RESET;
bogdanm 0:9b334a45a8ff 214 OC_Config.OCMode = TIM_OCMODE_PWM2;
bogdanm 0:9b334a45a8ff 215 OC_Config.OCNIdleState = TIM_OCNIDLESTATE_RESET;
bogdanm 0:9b334a45a8ff 216 OC_Config.OCNPolarity = TIM_OCNPOLARITY_HIGH;
bogdanm 0:9b334a45a8ff 217 OC_Config.OCPolarity = TIM_OCPOLARITY_HIGH;
bogdanm 0:9b334a45a8ff 218 OC_Config.Pulse = sConfig->Commutation_Delay;
bogdanm 0:9b334a45a8ff 219
bogdanm 0:9b334a45a8ff 220 TIM_OC2_SetConfig(htim->Instance, &OC_Config);
bogdanm 0:9b334a45a8ff 221
bogdanm 0:9b334a45a8ff 222 /* Select OC2REF as trigger output on TRGO: write the MMS bits in the TIMx_CR2
bogdanm 0:9b334a45a8ff 223 register to 101 */
bogdanm 0:9b334a45a8ff 224 htim->Instance->CR2 &= ~TIM_CR2_MMS;
bogdanm 0:9b334a45a8ff 225 htim->Instance->CR2 |= TIM_TRGO_OC2REF;
bogdanm 0:9b334a45a8ff 226
bogdanm 0:9b334a45a8ff 227 /* Initialize the TIM state*/
bogdanm 0:9b334a45a8ff 228 htim->State= HAL_TIM_STATE_READY;
bogdanm 0:9b334a45a8ff 229
bogdanm 0:9b334a45a8ff 230 return HAL_OK;
bogdanm 0:9b334a45a8ff 231 }
bogdanm 0:9b334a45a8ff 232
bogdanm 0:9b334a45a8ff 233 /**
bogdanm 0:9b334a45a8ff 234 * @brief DeInitializes the TIM Hall Sensor interface
bogdanm 0:9b334a45a8ff 235 * @param htim : TIM Hall Sensor handle
bogdanm 0:9b334a45a8ff 236 * @retval HAL status
bogdanm 0:9b334a45a8ff 237 */
bogdanm 0:9b334a45a8ff 238 HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef *htim)
bogdanm 0:9b334a45a8ff 239 {
bogdanm 0:9b334a45a8ff 240 /* Check the parameters */
bogdanm 0:9b334a45a8ff 241 assert_param(IS_TIM_INSTANCE(htim->Instance));
bogdanm 0:9b334a45a8ff 242
bogdanm 0:9b334a45a8ff 243 htim->State = HAL_TIM_STATE_BUSY;
bogdanm 0:9b334a45a8ff 244
bogdanm 0:9b334a45a8ff 245 /* Disable the TIM Peripheral Clock */
bogdanm 0:9b334a45a8ff 246 __HAL_TIM_DISABLE(htim);
bogdanm 0:9b334a45a8ff 247
bogdanm 0:9b334a45a8ff 248 /* DeInit the low level hardware: GPIO, CLOCK, NVIC */
bogdanm 0:9b334a45a8ff 249 HAL_TIMEx_HallSensor_MspDeInit(htim);
bogdanm 0:9b334a45a8ff 250
bogdanm 0:9b334a45a8ff 251 /* Change TIM state */
bogdanm 0:9b334a45a8ff 252 htim->State = HAL_TIM_STATE_RESET;
bogdanm 0:9b334a45a8ff 253
bogdanm 0:9b334a45a8ff 254 /* Release Lock */
bogdanm 0:9b334a45a8ff 255 __HAL_UNLOCK(htim);
bogdanm 0:9b334a45a8ff 256
bogdanm 0:9b334a45a8ff 257 return HAL_OK;
bogdanm 0:9b334a45a8ff 258 }
bogdanm 0:9b334a45a8ff 259
bogdanm 0:9b334a45a8ff 260 /**
bogdanm 0:9b334a45a8ff 261 * @brief Initializes the TIM Hall Sensor MSP.
bogdanm 0:9b334a45a8ff 262 * @param htim : TIM handle
bogdanm 0:9b334a45a8ff 263 * @retval None
bogdanm 0:9b334a45a8ff 264 */
bogdanm 0:9b334a45a8ff 265 __weak void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef *htim)
bogdanm 0:9b334a45a8ff 266 {
bogdanm 0:9b334a45a8ff 267 /* NOTE : This function Should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 268 the HAL_TIMEx_HallSensor_MspInit could be implemented in the user file
bogdanm 0:9b334a45a8ff 269 */
bogdanm 0:9b334a45a8ff 270 }
bogdanm 0:9b334a45a8ff 271
bogdanm 0:9b334a45a8ff 272 /**
bogdanm 0:9b334a45a8ff 273 * @brief DeInitializes TIM Hall Sensor MSP.
bogdanm 0:9b334a45a8ff 274 * @param htim : TIM handle
bogdanm 0:9b334a45a8ff 275 * @retval None
bogdanm 0:9b334a45a8ff 276 */
bogdanm 0:9b334a45a8ff 277 __weak void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef *htim)
bogdanm 0:9b334a45a8ff 278 {
bogdanm 0:9b334a45a8ff 279 /* NOTE : This function Should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 280 the HAL_TIMEx_HallSensor_MspDeInit could be implemented in the user file
bogdanm 0:9b334a45a8ff 281 */
bogdanm 0:9b334a45a8ff 282 }
bogdanm 0:9b334a45a8ff 283
bogdanm 0:9b334a45a8ff 284 /**
bogdanm 0:9b334a45a8ff 285 * @brief Starts the TIM Hall Sensor Interface.
bogdanm 0:9b334a45a8ff 286 * @param htim : TIM Hall Sensor handle
bogdanm 0:9b334a45a8ff 287 * @retval HAL status
bogdanm 0:9b334a45a8ff 288 */
bogdanm 0:9b334a45a8ff 289 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef *htim)
bogdanm 0:9b334a45a8ff 290 {
bogdanm 0:9b334a45a8ff 291 /* Check the parameters */
bogdanm 0:9b334a45a8ff 292 assert_param(IS_TIM_XOR_INSTANCE(htim->Instance));
bogdanm 0:9b334a45a8ff 293
bogdanm 0:9b334a45a8ff 294 /* Enable the Input Capture channel 1
bogdanm 0:9b334a45a8ff 295 (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
bogdanm 0:9b334a45a8ff 296 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
bogdanm 0:9b334a45a8ff 297
bogdanm 0:9b334a45a8ff 298 /* Enable the Peripheral */
bogdanm 0:9b334a45a8ff 299 __HAL_TIM_ENABLE(htim);
bogdanm 0:9b334a45a8ff 300
bogdanm 0:9b334a45a8ff 301 /* Return function status */
bogdanm 0:9b334a45a8ff 302 return HAL_OK;
bogdanm 0:9b334a45a8ff 303 }
bogdanm 0:9b334a45a8ff 304
bogdanm 0:9b334a45a8ff 305 /**
bogdanm 0:9b334a45a8ff 306 * @brief Stops the TIM Hall sensor Interface.
bogdanm 0:9b334a45a8ff 307 * @param htim : TIM Hall Sensor handle
bogdanm 0:9b334a45a8ff 308 * @retval HAL status
bogdanm 0:9b334a45a8ff 309 */
bogdanm 0:9b334a45a8ff 310 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef *htim)
bogdanm 0:9b334a45a8ff 311 {
bogdanm 0:9b334a45a8ff 312 /* Check the parameters */
bogdanm 0:9b334a45a8ff 313 assert_param(IS_TIM_XOR_INSTANCE(htim->Instance));
bogdanm 0:9b334a45a8ff 314
bogdanm 0:9b334a45a8ff 315 /* Disable the Input Capture channels 1, 2 and 3
bogdanm 0:9b334a45a8ff 316 (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
bogdanm 0:9b334a45a8ff 317 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
bogdanm 0:9b334a45a8ff 318
bogdanm 0:9b334a45a8ff 319 /* Disable the Peripheral */
bogdanm 0:9b334a45a8ff 320 __HAL_TIM_DISABLE(htim);
bogdanm 0:9b334a45a8ff 321
bogdanm 0:9b334a45a8ff 322 /* Return function status */
bogdanm 0:9b334a45a8ff 323 return HAL_OK;
bogdanm 0:9b334a45a8ff 324 }
bogdanm 0:9b334a45a8ff 325
bogdanm 0:9b334a45a8ff 326 /**
bogdanm 0:9b334a45a8ff 327 * @brief Starts the TIM Hall Sensor Interface in interrupt mode.
bogdanm 0:9b334a45a8ff 328 * @param htim : TIM Hall Sensor handle
bogdanm 0:9b334a45a8ff 329 * @retval HAL status
bogdanm 0:9b334a45a8ff 330 */
bogdanm 0:9b334a45a8ff 331 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef *htim)
bogdanm 0:9b334a45a8ff 332 {
bogdanm 0:9b334a45a8ff 333 /* Check the parameters */
bogdanm 0:9b334a45a8ff 334 assert_param(IS_TIM_XOR_INSTANCE(htim->Instance));
bogdanm 0:9b334a45a8ff 335
bogdanm 0:9b334a45a8ff 336 /* Enable the capture compare Interrupts 1 event */
bogdanm 0:9b334a45a8ff 337 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
bogdanm 0:9b334a45a8ff 338
bogdanm 0:9b334a45a8ff 339 /* Enable the Input Capture channel 1
bogdanm 0:9b334a45a8ff 340 (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
bogdanm 0:9b334a45a8ff 341 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
bogdanm 0:9b334a45a8ff 342
bogdanm 0:9b334a45a8ff 343 /* Enable the Peripheral */
bogdanm 0:9b334a45a8ff 344 __HAL_TIM_ENABLE(htim);
bogdanm 0:9b334a45a8ff 345
bogdanm 0:9b334a45a8ff 346 /* Return function status */
bogdanm 0:9b334a45a8ff 347 return HAL_OK;
bogdanm 0:9b334a45a8ff 348 }
bogdanm 0:9b334a45a8ff 349
bogdanm 0:9b334a45a8ff 350 /**
bogdanm 0:9b334a45a8ff 351 * @brief Stops the TIM Hall Sensor Interface in interrupt mode.
bogdanm 0:9b334a45a8ff 352 * @param htim : TIM handle
bogdanm 0:9b334a45a8ff 353 * @retval HAL status
bogdanm 0:9b334a45a8ff 354 */
bogdanm 0:9b334a45a8ff 355 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef *htim)
bogdanm 0:9b334a45a8ff 356 {
bogdanm 0:9b334a45a8ff 357 /* Check the parameters */
bogdanm 0:9b334a45a8ff 358 assert_param(IS_TIM_XOR_INSTANCE(htim->Instance));
bogdanm 0:9b334a45a8ff 359
bogdanm 0:9b334a45a8ff 360 /* Disable the Input Capture channel 1
bogdanm 0:9b334a45a8ff 361 (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
bogdanm 0:9b334a45a8ff 362 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
bogdanm 0:9b334a45a8ff 363
bogdanm 0:9b334a45a8ff 364 /* Disable the capture compare Interrupts event */
bogdanm 0:9b334a45a8ff 365 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
bogdanm 0:9b334a45a8ff 366
bogdanm 0:9b334a45a8ff 367 /* Disable the Peripheral */
bogdanm 0:9b334a45a8ff 368 __HAL_TIM_DISABLE(htim);
bogdanm 0:9b334a45a8ff 369
bogdanm 0:9b334a45a8ff 370 /* Return function status */
bogdanm 0:9b334a45a8ff 371 return HAL_OK;
bogdanm 0:9b334a45a8ff 372 }
bogdanm 0:9b334a45a8ff 373
bogdanm 0:9b334a45a8ff 374 /**
bogdanm 0:9b334a45a8ff 375 * @brief Starts the TIM Hall Sensor Interface in DMA mode.
bogdanm 0:9b334a45a8ff 376 * @param htim : TIM Hall Sensor handle
bogdanm 0:9b334a45a8ff 377 * @param pData : The destination Buffer address.
bogdanm 0:9b334a45a8ff 378 * @param Length : The length of data to be transferred from TIM peripheral to memory.
bogdanm 0:9b334a45a8ff 379 * @retval HAL status
bogdanm 0:9b334a45a8ff 380 */
bogdanm 0:9b334a45a8ff 381 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length)
bogdanm 0:9b334a45a8ff 382 {
bogdanm 0:9b334a45a8ff 383 /* Check the parameters */
bogdanm 0:9b334a45a8ff 384 assert_param(IS_TIM_XOR_INSTANCE(htim->Instance));
bogdanm 0:9b334a45a8ff 385
bogdanm 0:9b334a45a8ff 386 if((htim->State == HAL_TIM_STATE_BUSY))
bogdanm 0:9b334a45a8ff 387 {
bogdanm 0:9b334a45a8ff 388 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 389 }
bogdanm 0:9b334a45a8ff 390 else if((htim->State == HAL_TIM_STATE_READY))
bogdanm 0:9b334a45a8ff 391 {
bogdanm 0:9b334a45a8ff 392 if(((uint32_t)pData == 0 ) && (Length > 0))
bogdanm 0:9b334a45a8ff 393 {
bogdanm 0:9b334a45a8ff 394 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 395 }
bogdanm 0:9b334a45a8ff 396 else
bogdanm 0:9b334a45a8ff 397 {
bogdanm 0:9b334a45a8ff 398 htim->State = HAL_TIM_STATE_BUSY;
bogdanm 0:9b334a45a8ff 399 }
bogdanm 0:9b334a45a8ff 400 }
bogdanm 0:9b334a45a8ff 401 /* Enable the Input Capture channel 1
bogdanm 0:9b334a45a8ff 402 (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
bogdanm 0:9b334a45a8ff 403 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
bogdanm 0:9b334a45a8ff 404
bogdanm 0:9b334a45a8ff 405 /* Set the DMA Input Capture 1 Callback */
bogdanm 0:9b334a45a8ff 406 htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMACaptureCplt;
bogdanm 0:9b334a45a8ff 407 /* Set the DMA error callback */
bogdanm 0:9b334a45a8ff 408 htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ;
bogdanm 0:9b334a45a8ff 409
bogdanm 0:9b334a45a8ff 410 /* Enable the DMA channel for Capture 1*/
bogdanm 0:9b334a45a8ff 411 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t)pData, Length);
bogdanm 0:9b334a45a8ff 412
bogdanm 0:9b334a45a8ff 413 /* Enable the capture compare 1 Interrupt */
bogdanm 0:9b334a45a8ff 414 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
bogdanm 0:9b334a45a8ff 415
bogdanm 0:9b334a45a8ff 416 /* Enable the Peripheral */
bogdanm 0:9b334a45a8ff 417 __HAL_TIM_ENABLE(htim);
bogdanm 0:9b334a45a8ff 418
bogdanm 0:9b334a45a8ff 419 /* Return function status */
bogdanm 0:9b334a45a8ff 420 return HAL_OK;
bogdanm 0:9b334a45a8ff 421 }
bogdanm 0:9b334a45a8ff 422
bogdanm 0:9b334a45a8ff 423 /**
bogdanm 0:9b334a45a8ff 424 * @brief Stops the TIM Hall Sensor Interface in DMA mode.
bogdanm 0:9b334a45a8ff 425 * @param htim : TIM handle
bogdanm 0:9b334a45a8ff 426 * @retval HAL status
bogdanm 0:9b334a45a8ff 427 */
bogdanm 0:9b334a45a8ff 428 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef *htim)
bogdanm 0:9b334a45a8ff 429 {
bogdanm 0:9b334a45a8ff 430 /* Check the parameters */
bogdanm 0:9b334a45a8ff 431 assert_param(IS_TIM_XOR_INSTANCE(htim->Instance));
bogdanm 0:9b334a45a8ff 432
bogdanm 0:9b334a45a8ff 433 /* Disable the Input Capture channel 1
bogdanm 0:9b334a45a8ff 434 (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
bogdanm 0:9b334a45a8ff 435 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
bogdanm 0:9b334a45a8ff 436
bogdanm 0:9b334a45a8ff 437
bogdanm 0:9b334a45a8ff 438 /* Disable the capture compare Interrupts 1 event */
bogdanm 0:9b334a45a8ff 439 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
bogdanm 0:9b334a45a8ff 440
bogdanm 0:9b334a45a8ff 441 /* Disable the Peripheral */
bogdanm 0:9b334a45a8ff 442 __HAL_TIM_DISABLE(htim);
bogdanm 0:9b334a45a8ff 443
bogdanm 0:9b334a45a8ff 444 /* Return function status */
bogdanm 0:9b334a45a8ff 445 return HAL_OK;
bogdanm 0:9b334a45a8ff 446 }
bogdanm 0:9b334a45a8ff 447
bogdanm 0:9b334a45a8ff 448 /**
bogdanm 0:9b334a45a8ff 449 * @}
bogdanm 0:9b334a45a8ff 450 */
bogdanm 0:9b334a45a8ff 451
bogdanm 0:9b334a45a8ff 452 /** @defgroup TIMEx_Exported_Functions_Group2 Timer Complementary Output Compare functions
bogdanm 0:9b334a45a8ff 453 * @brief Timer Complementary Output Compare functions
bogdanm 0:9b334a45a8ff 454 *
bogdanm 0:9b334a45a8ff 455 @verbatim
bogdanm 0:9b334a45a8ff 456 ==============================================================================
bogdanm 0:9b334a45a8ff 457 ##### Timer Complementary Output Compare functions #####
bogdanm 0:9b334a45a8ff 458 ==============================================================================
bogdanm 0:9b334a45a8ff 459 [..]
bogdanm 0:9b334a45a8ff 460 This section provides functions allowing to:
bogdanm 0:9b334a45a8ff 461 (+) Start the Complementary Output Compare/PWM.
bogdanm 0:9b334a45a8ff 462 (+) Stop the Complementary Output Compare/PWM.
bogdanm 0:9b334a45a8ff 463 (+) Start the Complementary Output Compare/PWM and enable interrupts.
bogdanm 0:9b334a45a8ff 464 (+) Stop the Complementary Output Compare/PWM and disable interrupts.
bogdanm 0:9b334a45a8ff 465 (+) Start the Complementary Output Compare/PWM and enable DMA transfers.
bogdanm 0:9b334a45a8ff 466 (+) Stop the Complementary Output Compare/PWM and disable DMA transfers.
bogdanm 0:9b334a45a8ff 467
bogdanm 0:9b334a45a8ff 468 @endverbatim
bogdanm 0:9b334a45a8ff 469 * @{
bogdanm 0:9b334a45a8ff 470 */
bogdanm 0:9b334a45a8ff 471
bogdanm 0:9b334a45a8ff 472 /**
bogdanm 0:9b334a45a8ff 473 * @brief Starts the TIM Output Compare signal generation on the complementary
bogdanm 0:9b334a45a8ff 474 * output.
bogdanm 0:9b334a45a8ff 475 * @param htim : TIM Output Compare handle
bogdanm 0:9b334a45a8ff 476 * @param Channel : TIM Channel to be enabled
bogdanm 0:9b334a45a8ff 477 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 478 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
bogdanm 0:9b334a45a8ff 479 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
bogdanm 0:9b334a45a8ff 480 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
bogdanm 0:9b334a45a8ff 481 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
bogdanm 0:9b334a45a8ff 482 * @retval HAL status
bogdanm 0:9b334a45a8ff 483 */
bogdanm 0:9b334a45a8ff 484 HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
bogdanm 0:9b334a45a8ff 485 {
bogdanm 0:9b334a45a8ff 486 /* Check the parameters */
bogdanm 0:9b334a45a8ff 487 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
bogdanm 0:9b334a45a8ff 488
bogdanm 0:9b334a45a8ff 489 /* Enable the Capture compare channel N */
bogdanm 0:9b334a45a8ff 490 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
bogdanm 0:9b334a45a8ff 491
bogdanm 0:9b334a45a8ff 492 /* Enable the Main Ouput */
bogdanm 0:9b334a45a8ff 493 __HAL_TIM_MOE_ENABLE(htim);
bogdanm 0:9b334a45a8ff 494
bogdanm 0:9b334a45a8ff 495 /* Enable the Peripheral */
bogdanm 0:9b334a45a8ff 496 __HAL_TIM_ENABLE(htim);
bogdanm 0:9b334a45a8ff 497
bogdanm 0:9b334a45a8ff 498 /* Return function status */
bogdanm 0:9b334a45a8ff 499 return HAL_OK;
bogdanm 0:9b334a45a8ff 500 }
bogdanm 0:9b334a45a8ff 501
bogdanm 0:9b334a45a8ff 502 /**
bogdanm 0:9b334a45a8ff 503 * @brief Stops the TIM Output Compare signal generation on the complementary
bogdanm 0:9b334a45a8ff 504 * output.
bogdanm 0:9b334a45a8ff 505 * @param htim : TIM handle
bogdanm 0:9b334a45a8ff 506 * @param Channel : TIM Channel to be disabled
bogdanm 0:9b334a45a8ff 507 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 508 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
bogdanm 0:9b334a45a8ff 509 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
bogdanm 0:9b334a45a8ff 510 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
bogdanm 0:9b334a45a8ff 511 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
bogdanm 0:9b334a45a8ff 512 * @retval HAL status
bogdanm 0:9b334a45a8ff 513 */
bogdanm 0:9b334a45a8ff 514 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
bogdanm 0:9b334a45a8ff 515 {
bogdanm 0:9b334a45a8ff 516 /* Check the parameters */
bogdanm 0:9b334a45a8ff 517 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
bogdanm 0:9b334a45a8ff 518
bogdanm 0:9b334a45a8ff 519 /* Disable the Capture compare channel N */
bogdanm 0:9b334a45a8ff 520 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
bogdanm 0:9b334a45a8ff 521
bogdanm 0:9b334a45a8ff 522 /* Disable the Main Ouput */
bogdanm 0:9b334a45a8ff 523 __HAL_TIM_MOE_DISABLE(htim);
bogdanm 0:9b334a45a8ff 524
bogdanm 0:9b334a45a8ff 525 /* Disable the Peripheral */
bogdanm 0:9b334a45a8ff 526 __HAL_TIM_DISABLE(htim);
bogdanm 0:9b334a45a8ff 527
bogdanm 0:9b334a45a8ff 528 /* Return function status */
bogdanm 0:9b334a45a8ff 529 return HAL_OK;
bogdanm 0:9b334a45a8ff 530 }
bogdanm 0:9b334a45a8ff 531
bogdanm 0:9b334a45a8ff 532 /**
bogdanm 0:9b334a45a8ff 533 * @brief Starts the TIM Output Compare signal generation in interrupt mode
bogdanm 0:9b334a45a8ff 534 * on the complementary output.
bogdanm 0:9b334a45a8ff 535 * @param htim : TIM OC handle
bogdanm 0:9b334a45a8ff 536 * @param Channel : TIM Channel to be enabled
bogdanm 0:9b334a45a8ff 537 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 538 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
bogdanm 0:9b334a45a8ff 539 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
bogdanm 0:9b334a45a8ff 540 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
bogdanm 0:9b334a45a8ff 541 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
bogdanm 0:9b334a45a8ff 542 * @retval HAL status
bogdanm 0:9b334a45a8ff 543 */
bogdanm 0:9b334a45a8ff 544 HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
bogdanm 0:9b334a45a8ff 545 {
bogdanm 0:9b334a45a8ff 546 /* Check the parameters */
bogdanm 0:9b334a45a8ff 547 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
bogdanm 0:9b334a45a8ff 548
bogdanm 0:9b334a45a8ff 549 switch (Channel)
bogdanm 0:9b334a45a8ff 550 {
bogdanm 0:9b334a45a8ff 551 case TIM_CHANNEL_1:
bogdanm 0:9b334a45a8ff 552 {
bogdanm 0:9b334a45a8ff 553 /* Enable the TIM Output Compare interrupt */
bogdanm 0:9b334a45a8ff 554 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
bogdanm 0:9b334a45a8ff 555 }
bogdanm 0:9b334a45a8ff 556 break;
bogdanm 0:9b334a45a8ff 557
bogdanm 0:9b334a45a8ff 558 case TIM_CHANNEL_2:
bogdanm 0:9b334a45a8ff 559 {
bogdanm 0:9b334a45a8ff 560 /* Enable the TIM Output Compare interrupt */
bogdanm 0:9b334a45a8ff 561 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
bogdanm 0:9b334a45a8ff 562 }
bogdanm 0:9b334a45a8ff 563 break;
bogdanm 0:9b334a45a8ff 564
bogdanm 0:9b334a45a8ff 565 case TIM_CHANNEL_3:
bogdanm 0:9b334a45a8ff 566 {
bogdanm 0:9b334a45a8ff 567 /* Enable the TIM Output Compare interrupt */
bogdanm 0:9b334a45a8ff 568 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3);
bogdanm 0:9b334a45a8ff 569 }
bogdanm 0:9b334a45a8ff 570 break;
bogdanm 0:9b334a45a8ff 571
bogdanm 0:9b334a45a8ff 572 case TIM_CHANNEL_4:
bogdanm 0:9b334a45a8ff 573 {
bogdanm 0:9b334a45a8ff 574 /* Enable the TIM Output Compare interrupt */
bogdanm 0:9b334a45a8ff 575 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC4);
bogdanm 0:9b334a45a8ff 576 }
bogdanm 0:9b334a45a8ff 577 break;
bogdanm 0:9b334a45a8ff 578
bogdanm 0:9b334a45a8ff 579 default:
bogdanm 0:9b334a45a8ff 580 break;
bogdanm 0:9b334a45a8ff 581 }
bogdanm 0:9b334a45a8ff 582
bogdanm 0:9b334a45a8ff 583 /* Enable the TIM Break interrupt */
bogdanm 0:9b334a45a8ff 584 __HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK);
bogdanm 0:9b334a45a8ff 585
bogdanm 0:9b334a45a8ff 586 /* Enable the Capture compare channel N */
bogdanm 0:9b334a45a8ff 587 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
bogdanm 0:9b334a45a8ff 588
bogdanm 0:9b334a45a8ff 589 /* Enable the Main Ouput */
bogdanm 0:9b334a45a8ff 590 __HAL_TIM_MOE_ENABLE(htim);
bogdanm 0:9b334a45a8ff 591
bogdanm 0:9b334a45a8ff 592 /* Enable the Peripheral */
bogdanm 0:9b334a45a8ff 593 __HAL_TIM_ENABLE(htim);
bogdanm 0:9b334a45a8ff 594
bogdanm 0:9b334a45a8ff 595 /* Return function status */
bogdanm 0:9b334a45a8ff 596 return HAL_OK;
bogdanm 0:9b334a45a8ff 597 }
bogdanm 0:9b334a45a8ff 598
bogdanm 0:9b334a45a8ff 599 /**
bogdanm 0:9b334a45a8ff 600 * @brief Stops the TIM Output Compare signal generation in interrupt mode
bogdanm 0:9b334a45a8ff 601 * on the complementary output.
bogdanm 0:9b334a45a8ff 602 * @param htim : TIM Output Compare handle
bogdanm 0:9b334a45a8ff 603 * @param Channel : TIM Channel to be disabled
bogdanm 0:9b334a45a8ff 604 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 605 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
bogdanm 0:9b334a45a8ff 606 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
bogdanm 0:9b334a45a8ff 607 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
bogdanm 0:9b334a45a8ff 608 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
bogdanm 0:9b334a45a8ff 609 * @retval HAL status
bogdanm 0:9b334a45a8ff 610 */
bogdanm 0:9b334a45a8ff 611 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
bogdanm 0:9b334a45a8ff 612 {
bogdanm 0:9b334a45a8ff 613 uint32_t tmpccer = 0;
bogdanm 0:9b334a45a8ff 614
bogdanm 0:9b334a45a8ff 615 /* Check the parameters */
bogdanm 0:9b334a45a8ff 616 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
bogdanm 0:9b334a45a8ff 617
bogdanm 0:9b334a45a8ff 618 switch (Channel)
bogdanm 0:9b334a45a8ff 619 {
bogdanm 0:9b334a45a8ff 620 case TIM_CHANNEL_1:
bogdanm 0:9b334a45a8ff 621 {
bogdanm 0:9b334a45a8ff 622 /* Disable the TIM Output Compare interrupt */
bogdanm 0:9b334a45a8ff 623 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
bogdanm 0:9b334a45a8ff 624 }
bogdanm 0:9b334a45a8ff 625 break;
bogdanm 0:9b334a45a8ff 626
bogdanm 0:9b334a45a8ff 627 case TIM_CHANNEL_2:
bogdanm 0:9b334a45a8ff 628 {
bogdanm 0:9b334a45a8ff 629 /* Disable the TIM Output Compare interrupt */
bogdanm 0:9b334a45a8ff 630 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
bogdanm 0:9b334a45a8ff 631 }
bogdanm 0:9b334a45a8ff 632 break;
bogdanm 0:9b334a45a8ff 633
bogdanm 0:9b334a45a8ff 634 case TIM_CHANNEL_3:
bogdanm 0:9b334a45a8ff 635 {
bogdanm 0:9b334a45a8ff 636 /* Disable the TIM Output Compare interrupt */
bogdanm 0:9b334a45a8ff 637 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3);
bogdanm 0:9b334a45a8ff 638 }
bogdanm 0:9b334a45a8ff 639 break;
bogdanm 0:9b334a45a8ff 640
bogdanm 0:9b334a45a8ff 641 case TIM_CHANNEL_4:
bogdanm 0:9b334a45a8ff 642 {
bogdanm 0:9b334a45a8ff 643 /* Disable the TIM Output Compare interrupt */
bogdanm 0:9b334a45a8ff 644 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC4);
bogdanm 0:9b334a45a8ff 645 }
bogdanm 0:9b334a45a8ff 646 break;
bogdanm 0:9b334a45a8ff 647
bogdanm 0:9b334a45a8ff 648 default:
bogdanm 0:9b334a45a8ff 649 break;
bogdanm 0:9b334a45a8ff 650 }
bogdanm 0:9b334a45a8ff 651
bogdanm 0:9b334a45a8ff 652 /* Disable the Capture compare channel N */
bogdanm 0:9b334a45a8ff 653 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
bogdanm 0:9b334a45a8ff 654
bogdanm 0:9b334a45a8ff 655 /* Disable the TIM Break interrupt (only if no more channel is active) */
bogdanm 0:9b334a45a8ff 656 tmpccer = htim->Instance->CCER;
bogdanm 0:9b334a45a8ff 657 if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == RESET)
bogdanm 0:9b334a45a8ff 658 {
bogdanm 0:9b334a45a8ff 659 __HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK);
bogdanm 0:9b334a45a8ff 660 }
bogdanm 0:9b334a45a8ff 661
bogdanm 0:9b334a45a8ff 662 /* Disable the Main Ouput */
bogdanm 0:9b334a45a8ff 663 __HAL_TIM_MOE_DISABLE(htim);
bogdanm 0:9b334a45a8ff 664
bogdanm 0:9b334a45a8ff 665 /* Disable the Peripheral */
bogdanm 0:9b334a45a8ff 666 __HAL_TIM_DISABLE(htim);
bogdanm 0:9b334a45a8ff 667
bogdanm 0:9b334a45a8ff 668 /* Return function status */
bogdanm 0:9b334a45a8ff 669 return HAL_OK;
bogdanm 0:9b334a45a8ff 670 }
bogdanm 0:9b334a45a8ff 671
bogdanm 0:9b334a45a8ff 672 /**
bogdanm 0:9b334a45a8ff 673 * @brief Starts the TIM Output Compare signal generation in DMA mode
bogdanm 0:9b334a45a8ff 674 * on the complementary output.
bogdanm 0:9b334a45a8ff 675 * @param htim : TIM Output Compare handle
bogdanm 0:9b334a45a8ff 676 * @param Channel : TIM Channel to be enabled
bogdanm 0:9b334a45a8ff 677 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 678 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
bogdanm 0:9b334a45a8ff 679 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
bogdanm 0:9b334a45a8ff 680 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
bogdanm 0:9b334a45a8ff 681 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
bogdanm 0:9b334a45a8ff 682 * @param pData : The source Buffer address.
bogdanm 0:9b334a45a8ff 683 * @param Length : The length of data to be transferred from memory to TIM peripheral
bogdanm 0:9b334a45a8ff 684 * @retval HAL status
bogdanm 0:9b334a45a8ff 685 */
bogdanm 0:9b334a45a8ff 686 HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length)
bogdanm 0:9b334a45a8ff 687 {
bogdanm 0:9b334a45a8ff 688 /* Check the parameters */
bogdanm 0:9b334a45a8ff 689 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
bogdanm 0:9b334a45a8ff 690
bogdanm 0:9b334a45a8ff 691 if((htim->State == HAL_TIM_STATE_BUSY))
bogdanm 0:9b334a45a8ff 692 {
bogdanm 0:9b334a45a8ff 693 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 694 }
bogdanm 0:9b334a45a8ff 695 else if((htim->State == HAL_TIM_STATE_READY))
bogdanm 0:9b334a45a8ff 696 {
bogdanm 0:9b334a45a8ff 697 if(((uint32_t)pData == 0 ) && (Length > 0))
bogdanm 0:9b334a45a8ff 698 {
bogdanm 0:9b334a45a8ff 699 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 700 }
bogdanm 0:9b334a45a8ff 701 else
bogdanm 0:9b334a45a8ff 702 {
bogdanm 0:9b334a45a8ff 703 htim->State = HAL_TIM_STATE_BUSY;
bogdanm 0:9b334a45a8ff 704 }
bogdanm 0:9b334a45a8ff 705 }
bogdanm 0:9b334a45a8ff 706 switch (Channel)
bogdanm 0:9b334a45a8ff 707 {
bogdanm 0:9b334a45a8ff 708 case TIM_CHANNEL_1:
bogdanm 0:9b334a45a8ff 709 {
bogdanm 0:9b334a45a8ff 710 /* Set the DMA Period elapsed callback */
bogdanm 0:9b334a45a8ff 711 htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseCplt;
bogdanm 0:9b334a45a8ff 712
bogdanm 0:9b334a45a8ff 713 /* Set the DMA error callback */
bogdanm 0:9b334a45a8ff 714 htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ;
bogdanm 0:9b334a45a8ff 715
bogdanm 0:9b334a45a8ff 716 /* Enable the DMA channel */
bogdanm 0:9b334a45a8ff 717 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, Length);
bogdanm 0:9b334a45a8ff 718
bogdanm 0:9b334a45a8ff 719 /* Enable the TIM Output Compare DMA request */
bogdanm 0:9b334a45a8ff 720 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
bogdanm 0:9b334a45a8ff 721 }
bogdanm 0:9b334a45a8ff 722 break;
bogdanm 0:9b334a45a8ff 723
bogdanm 0:9b334a45a8ff 724 case TIM_CHANNEL_2:
bogdanm 0:9b334a45a8ff 725 {
bogdanm 0:9b334a45a8ff 726 /* Set the DMA Period elapsed callback */
bogdanm 0:9b334a45a8ff 727 htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseCplt;
bogdanm 0:9b334a45a8ff 728
bogdanm 0:9b334a45a8ff 729 /* Set the DMA error callback */
bogdanm 0:9b334a45a8ff 730 htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ;
bogdanm 0:9b334a45a8ff 731
bogdanm 0:9b334a45a8ff 732 /* Enable the DMA channel */
bogdanm 0:9b334a45a8ff 733 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, Length);
bogdanm 0:9b334a45a8ff 734
bogdanm 0:9b334a45a8ff 735 /* Enable the TIM Output Compare DMA request */
bogdanm 0:9b334a45a8ff 736 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
bogdanm 0:9b334a45a8ff 737 }
bogdanm 0:9b334a45a8ff 738 break;
bogdanm 0:9b334a45a8ff 739
bogdanm 0:9b334a45a8ff 740 case TIM_CHANNEL_3:
bogdanm 0:9b334a45a8ff 741 {
bogdanm 0:9b334a45a8ff 742 /* Set the DMA Period elapsed callback */
bogdanm 0:9b334a45a8ff 743 htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseCplt;
bogdanm 0:9b334a45a8ff 744
bogdanm 0:9b334a45a8ff 745 /* Set the DMA error callback */
bogdanm 0:9b334a45a8ff 746 htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ;
bogdanm 0:9b334a45a8ff 747
bogdanm 0:9b334a45a8ff 748 /* Enable the DMA channel */
bogdanm 0:9b334a45a8ff 749 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,Length);
bogdanm 0:9b334a45a8ff 750
bogdanm 0:9b334a45a8ff 751 /* Enable the TIM Output Compare DMA request */
bogdanm 0:9b334a45a8ff 752 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3);
bogdanm 0:9b334a45a8ff 753 }
bogdanm 0:9b334a45a8ff 754 break;
bogdanm 0:9b334a45a8ff 755
bogdanm 0:9b334a45a8ff 756 case TIM_CHANNEL_4:
bogdanm 0:9b334a45a8ff 757 {
bogdanm 0:9b334a45a8ff 758 /* Set the DMA Period elapsed callback */
bogdanm 0:9b334a45a8ff 759 htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = TIM_DMADelayPulseCplt;
bogdanm 0:9b334a45a8ff 760
bogdanm 0:9b334a45a8ff 761 /* Set the DMA error callback */
bogdanm 0:9b334a45a8ff 762 htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = TIM_DMAError ;
bogdanm 0:9b334a45a8ff 763
bogdanm 0:9b334a45a8ff 764 /* Enable the DMA channel */
bogdanm 0:9b334a45a8ff 765 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)pData, (uint32_t)&htim->Instance->CCR4, Length);
bogdanm 0:9b334a45a8ff 766
bogdanm 0:9b334a45a8ff 767 /* Enable the TIM Output Compare DMA request */
bogdanm 0:9b334a45a8ff 768 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC4);
bogdanm 0:9b334a45a8ff 769 }
bogdanm 0:9b334a45a8ff 770 break;
bogdanm 0:9b334a45a8ff 771
bogdanm 0:9b334a45a8ff 772 default:
bogdanm 0:9b334a45a8ff 773 break;
bogdanm 0:9b334a45a8ff 774 }
bogdanm 0:9b334a45a8ff 775
bogdanm 0:9b334a45a8ff 776 /* Enable the Capture compare channel N */
bogdanm 0:9b334a45a8ff 777 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
bogdanm 0:9b334a45a8ff 778
bogdanm 0:9b334a45a8ff 779 /* Enable the Main Ouput */
bogdanm 0:9b334a45a8ff 780 __HAL_TIM_MOE_ENABLE(htim);
bogdanm 0:9b334a45a8ff 781
bogdanm 0:9b334a45a8ff 782 /* Enable the Peripheral */
bogdanm 0:9b334a45a8ff 783 __HAL_TIM_ENABLE(htim);
bogdanm 0:9b334a45a8ff 784
bogdanm 0:9b334a45a8ff 785 /* Return function status */
bogdanm 0:9b334a45a8ff 786 return HAL_OK;
bogdanm 0:9b334a45a8ff 787 }
bogdanm 0:9b334a45a8ff 788
bogdanm 0:9b334a45a8ff 789 /**
bogdanm 0:9b334a45a8ff 790 * @brief Stops the TIM Output Compare signal generation in DMA mode
bogdanm 0:9b334a45a8ff 791 * on the complementary output.
bogdanm 0:9b334a45a8ff 792 * @param htim : TIM Output Compare handle
bogdanm 0:9b334a45a8ff 793 * @param Channel : TIM Channel to be disabled
bogdanm 0:9b334a45a8ff 794 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 795 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
bogdanm 0:9b334a45a8ff 796 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
bogdanm 0:9b334a45a8ff 797 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
bogdanm 0:9b334a45a8ff 798 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
bogdanm 0:9b334a45a8ff 799 * @retval HAL status
bogdanm 0:9b334a45a8ff 800 */
bogdanm 0:9b334a45a8ff 801 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
bogdanm 0:9b334a45a8ff 802 {
bogdanm 0:9b334a45a8ff 803 /* Check the parameters */
bogdanm 0:9b334a45a8ff 804 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
bogdanm 0:9b334a45a8ff 805
bogdanm 0:9b334a45a8ff 806 switch (Channel)
bogdanm 0:9b334a45a8ff 807 {
bogdanm 0:9b334a45a8ff 808 case TIM_CHANNEL_1:
bogdanm 0:9b334a45a8ff 809 {
bogdanm 0:9b334a45a8ff 810 /* Disable the TIM Output Compare DMA request */
bogdanm 0:9b334a45a8ff 811 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
bogdanm 0:9b334a45a8ff 812 }
bogdanm 0:9b334a45a8ff 813 break;
bogdanm 0:9b334a45a8ff 814
bogdanm 0:9b334a45a8ff 815 case TIM_CHANNEL_2:
bogdanm 0:9b334a45a8ff 816 {
bogdanm 0:9b334a45a8ff 817 /* Disable the TIM Output Compare DMA request */
bogdanm 0:9b334a45a8ff 818 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
bogdanm 0:9b334a45a8ff 819 }
bogdanm 0:9b334a45a8ff 820 break;
bogdanm 0:9b334a45a8ff 821
bogdanm 0:9b334a45a8ff 822 case TIM_CHANNEL_3:
bogdanm 0:9b334a45a8ff 823 {
bogdanm 0:9b334a45a8ff 824 /* Disable the TIM Output Compare DMA request */
bogdanm 0:9b334a45a8ff 825 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3);
bogdanm 0:9b334a45a8ff 826 }
bogdanm 0:9b334a45a8ff 827 break;
bogdanm 0:9b334a45a8ff 828
bogdanm 0:9b334a45a8ff 829 case TIM_CHANNEL_4:
bogdanm 0:9b334a45a8ff 830 {
bogdanm 0:9b334a45a8ff 831 /* Disable the TIM Output Compare interrupt */
bogdanm 0:9b334a45a8ff 832 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC4);
bogdanm 0:9b334a45a8ff 833 }
bogdanm 0:9b334a45a8ff 834 break;
bogdanm 0:9b334a45a8ff 835
bogdanm 0:9b334a45a8ff 836 default:
bogdanm 0:9b334a45a8ff 837 break;
bogdanm 0:9b334a45a8ff 838 }
bogdanm 0:9b334a45a8ff 839
bogdanm 0:9b334a45a8ff 840 /* Disable the Capture compare channel N */
bogdanm 0:9b334a45a8ff 841 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
bogdanm 0:9b334a45a8ff 842
bogdanm 0:9b334a45a8ff 843 /* Disable the Main Ouput */
bogdanm 0:9b334a45a8ff 844 __HAL_TIM_MOE_DISABLE(htim);
bogdanm 0:9b334a45a8ff 845
bogdanm 0:9b334a45a8ff 846 /* Disable the Peripheral */
bogdanm 0:9b334a45a8ff 847 __HAL_TIM_DISABLE(htim);
bogdanm 0:9b334a45a8ff 848
bogdanm 0:9b334a45a8ff 849 /* Change the htim state */
bogdanm 0:9b334a45a8ff 850 htim->State = HAL_TIM_STATE_READY;
bogdanm 0:9b334a45a8ff 851
bogdanm 0:9b334a45a8ff 852 /* Return function status */
bogdanm 0:9b334a45a8ff 853 return HAL_OK;
bogdanm 0:9b334a45a8ff 854 }
bogdanm 0:9b334a45a8ff 855
bogdanm 0:9b334a45a8ff 856 /**
bogdanm 0:9b334a45a8ff 857 * @}
bogdanm 0:9b334a45a8ff 858 */
bogdanm 0:9b334a45a8ff 859
bogdanm 0:9b334a45a8ff 860 /** @defgroup TIMEx_Exported_Functions_Group3 Timer Complementary PWM functions
bogdanm 0:9b334a45a8ff 861 * @brief Timer Complementary PWM functions
bogdanm 0:9b334a45a8ff 862 *
bogdanm 0:9b334a45a8ff 863 @verbatim
bogdanm 0:9b334a45a8ff 864 ==============================================================================
bogdanm 0:9b334a45a8ff 865 ##### Timer Complementary PWM functions #####
bogdanm 0:9b334a45a8ff 866 ==============================================================================
bogdanm 0:9b334a45a8ff 867 [..]
bogdanm 0:9b334a45a8ff 868 This section provides functions allowing to:
bogdanm 0:9b334a45a8ff 869 (+) Start the Complementary PWM.
bogdanm 0:9b334a45a8ff 870 (+) Stop the Complementary PWM.
bogdanm 0:9b334a45a8ff 871 (+) Start the Complementary PWM and enable interrupts.
bogdanm 0:9b334a45a8ff 872 (+) Stop the Complementary PWM and disable interrupts.
bogdanm 0:9b334a45a8ff 873 (+) Start the Complementary PWM and enable DMA transfers.
bogdanm 0:9b334a45a8ff 874 (+) Stop the Complementary PWM and disable DMA transfers.
bogdanm 0:9b334a45a8ff 875 (+) Start the Complementary Input Capture measurement.
bogdanm 0:9b334a45a8ff 876 (+) Stop the Complementary Input Capture.
bogdanm 0:9b334a45a8ff 877 (+) Start the Complementary Input Capture and enable interrupts.
bogdanm 0:9b334a45a8ff 878 (+) Stop the Complementary Input Capture and disable interrupts.
bogdanm 0:9b334a45a8ff 879 (+) Start the Complementary Input Capture and enable DMA transfers.
bogdanm 0:9b334a45a8ff 880 (+) Stop the Complementary Input Capture and disable DMA transfers.
bogdanm 0:9b334a45a8ff 881 (+) Start the Complementary One Pulse generation.
bogdanm 0:9b334a45a8ff 882 (+) Stop the Complementary One Pulse.
bogdanm 0:9b334a45a8ff 883 (+) Start the Complementary One Pulse and enable interrupts.
bogdanm 0:9b334a45a8ff 884 (+) Stop the Complementary One Pulse and disable interrupts.
bogdanm 0:9b334a45a8ff 885
bogdanm 0:9b334a45a8ff 886 @endverbatim
bogdanm 0:9b334a45a8ff 887 * @{
bogdanm 0:9b334a45a8ff 888 */
bogdanm 0:9b334a45a8ff 889
bogdanm 0:9b334a45a8ff 890 /**
bogdanm 0:9b334a45a8ff 891 * @brief Starts the PWM signal generation on the complementary output.
bogdanm 0:9b334a45a8ff 892 * @param htim : TIM handle
bogdanm 0:9b334a45a8ff 893 * @param Channel : TIM Channel to be enabled
bogdanm 0:9b334a45a8ff 894 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 895 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
bogdanm 0:9b334a45a8ff 896 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
bogdanm 0:9b334a45a8ff 897 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
bogdanm 0:9b334a45a8ff 898 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
bogdanm 0:9b334a45a8ff 899 * @retval HAL status
bogdanm 0:9b334a45a8ff 900 */
bogdanm 0:9b334a45a8ff 901 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
bogdanm 0:9b334a45a8ff 902 {
bogdanm 0:9b334a45a8ff 903 /* Check the parameters */
bogdanm 0:9b334a45a8ff 904 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
bogdanm 0:9b334a45a8ff 905
bogdanm 0:9b334a45a8ff 906 /* Enable the complementary PWM output */
bogdanm 0:9b334a45a8ff 907 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
bogdanm 0:9b334a45a8ff 908
bogdanm 0:9b334a45a8ff 909 /* Enable the Main Ouput */
bogdanm 0:9b334a45a8ff 910 __HAL_TIM_MOE_ENABLE(htim);
bogdanm 0:9b334a45a8ff 911
bogdanm 0:9b334a45a8ff 912 /* Enable the Peripheral */
bogdanm 0:9b334a45a8ff 913 __HAL_TIM_ENABLE(htim);
bogdanm 0:9b334a45a8ff 914
bogdanm 0:9b334a45a8ff 915 /* Return function status */
bogdanm 0:9b334a45a8ff 916 return HAL_OK;
bogdanm 0:9b334a45a8ff 917 }
bogdanm 0:9b334a45a8ff 918
bogdanm 0:9b334a45a8ff 919 /**
bogdanm 0:9b334a45a8ff 920 * @brief Stops the PWM signal generation on the complementary output.
bogdanm 0:9b334a45a8ff 921 * @param htim : TIM handle
bogdanm 0:9b334a45a8ff 922 * @param Channel : TIM Channel to be disabled
bogdanm 0:9b334a45a8ff 923 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 924 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
bogdanm 0:9b334a45a8ff 925 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
bogdanm 0:9b334a45a8ff 926 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
bogdanm 0:9b334a45a8ff 927 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
bogdanm 0:9b334a45a8ff 928 * @retval HAL status
bogdanm 0:9b334a45a8ff 929 */
bogdanm 0:9b334a45a8ff 930 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
bogdanm 0:9b334a45a8ff 931 {
bogdanm 0:9b334a45a8ff 932 /* Check the parameters */
bogdanm 0:9b334a45a8ff 933 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
bogdanm 0:9b334a45a8ff 934
bogdanm 0:9b334a45a8ff 935 /* Disable the complementary PWM output */
bogdanm 0:9b334a45a8ff 936 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
bogdanm 0:9b334a45a8ff 937
bogdanm 0:9b334a45a8ff 938 /* Disable the Main Ouput */
bogdanm 0:9b334a45a8ff 939 __HAL_TIM_MOE_DISABLE(htim);
bogdanm 0:9b334a45a8ff 940
bogdanm 0:9b334a45a8ff 941 /* Disable the Peripheral */
bogdanm 0:9b334a45a8ff 942 __HAL_TIM_DISABLE(htim);
bogdanm 0:9b334a45a8ff 943
bogdanm 0:9b334a45a8ff 944 /* Return function status */
bogdanm 0:9b334a45a8ff 945 return HAL_OK;
bogdanm 0:9b334a45a8ff 946 }
bogdanm 0:9b334a45a8ff 947
bogdanm 0:9b334a45a8ff 948 /**
bogdanm 0:9b334a45a8ff 949 * @brief Starts the PWM signal generation in interrupt mode on the
bogdanm 0:9b334a45a8ff 950 * complementary output.
bogdanm 0:9b334a45a8ff 951 * @param htim : TIM handle
bogdanm 0:9b334a45a8ff 952 * @param Channel : TIM Channel to be disabled
bogdanm 0:9b334a45a8ff 953 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 954 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
bogdanm 0:9b334a45a8ff 955 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
bogdanm 0:9b334a45a8ff 956 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
bogdanm 0:9b334a45a8ff 957 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
bogdanm 0:9b334a45a8ff 958 * @retval HAL status
bogdanm 0:9b334a45a8ff 959 */
bogdanm 0:9b334a45a8ff 960 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
bogdanm 0:9b334a45a8ff 961 {
bogdanm 0:9b334a45a8ff 962 /* Check the parameters */
bogdanm 0:9b334a45a8ff 963 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
bogdanm 0:9b334a45a8ff 964
bogdanm 0:9b334a45a8ff 965 switch (Channel)
bogdanm 0:9b334a45a8ff 966 {
bogdanm 0:9b334a45a8ff 967 case TIM_CHANNEL_1:
bogdanm 0:9b334a45a8ff 968 {
bogdanm 0:9b334a45a8ff 969 /* Enable the TIM Capture/Compare 1 interrupt */
bogdanm 0:9b334a45a8ff 970 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
bogdanm 0:9b334a45a8ff 971 }
bogdanm 0:9b334a45a8ff 972 break;
bogdanm 0:9b334a45a8ff 973
bogdanm 0:9b334a45a8ff 974 case TIM_CHANNEL_2:
bogdanm 0:9b334a45a8ff 975 {
bogdanm 0:9b334a45a8ff 976 /* Enable the TIM Capture/Compare 2 interrupt */
bogdanm 0:9b334a45a8ff 977 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
bogdanm 0:9b334a45a8ff 978 }
bogdanm 0:9b334a45a8ff 979 break;
bogdanm 0:9b334a45a8ff 980
bogdanm 0:9b334a45a8ff 981 case TIM_CHANNEL_3:
bogdanm 0:9b334a45a8ff 982 {
bogdanm 0:9b334a45a8ff 983 /* Enable the TIM Capture/Compare 3 interrupt */
bogdanm 0:9b334a45a8ff 984 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3);
bogdanm 0:9b334a45a8ff 985 }
bogdanm 0:9b334a45a8ff 986 break;
bogdanm 0:9b334a45a8ff 987
bogdanm 0:9b334a45a8ff 988 case TIM_CHANNEL_4:
bogdanm 0:9b334a45a8ff 989 {
bogdanm 0:9b334a45a8ff 990 /* Enable the TIM Capture/Compare 4 interrupt */
bogdanm 0:9b334a45a8ff 991 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC4);
bogdanm 0:9b334a45a8ff 992 }
bogdanm 0:9b334a45a8ff 993 break;
bogdanm 0:9b334a45a8ff 994
bogdanm 0:9b334a45a8ff 995 default:
bogdanm 0:9b334a45a8ff 996 break;
bogdanm 0:9b334a45a8ff 997 }
bogdanm 0:9b334a45a8ff 998
bogdanm 0:9b334a45a8ff 999 /* Enable the TIM Break interrupt */
bogdanm 0:9b334a45a8ff 1000 __HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK);
bogdanm 0:9b334a45a8ff 1001
bogdanm 0:9b334a45a8ff 1002 /* Enable the complementary PWM output */
bogdanm 0:9b334a45a8ff 1003 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
bogdanm 0:9b334a45a8ff 1004
bogdanm 0:9b334a45a8ff 1005 /* Enable the Main Ouput */
bogdanm 0:9b334a45a8ff 1006 __HAL_TIM_MOE_ENABLE(htim);
bogdanm 0:9b334a45a8ff 1007
bogdanm 0:9b334a45a8ff 1008 /* Enable the Peripheral */
bogdanm 0:9b334a45a8ff 1009 __HAL_TIM_ENABLE(htim);
bogdanm 0:9b334a45a8ff 1010
bogdanm 0:9b334a45a8ff 1011 /* Return function status */
bogdanm 0:9b334a45a8ff 1012 return HAL_OK;
bogdanm 0:9b334a45a8ff 1013 }
bogdanm 0:9b334a45a8ff 1014
bogdanm 0:9b334a45a8ff 1015 /**
bogdanm 0:9b334a45a8ff 1016 * @brief Stops the PWM signal generation in interrupt mode on the
bogdanm 0:9b334a45a8ff 1017 * complementary output.
bogdanm 0:9b334a45a8ff 1018 * @param htim : TIM handle
bogdanm 0:9b334a45a8ff 1019 * @param Channel : TIM Channel to be disabled
bogdanm 0:9b334a45a8ff 1020 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 1021 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
bogdanm 0:9b334a45a8ff 1022 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
bogdanm 0:9b334a45a8ff 1023 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
bogdanm 0:9b334a45a8ff 1024 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
bogdanm 0:9b334a45a8ff 1025 * @retval HAL status
bogdanm 0:9b334a45a8ff 1026 */
bogdanm 0:9b334a45a8ff 1027 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT (TIM_HandleTypeDef *htim, uint32_t Channel)
bogdanm 0:9b334a45a8ff 1028 {
bogdanm 0:9b334a45a8ff 1029 uint32_t tmpccer = 0;
bogdanm 0:9b334a45a8ff 1030
bogdanm 0:9b334a45a8ff 1031 /* Check the parameters */
bogdanm 0:9b334a45a8ff 1032 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
bogdanm 0:9b334a45a8ff 1033
bogdanm 0:9b334a45a8ff 1034 switch (Channel)
bogdanm 0:9b334a45a8ff 1035 {
bogdanm 0:9b334a45a8ff 1036 case TIM_CHANNEL_1:
bogdanm 0:9b334a45a8ff 1037 {
bogdanm 0:9b334a45a8ff 1038 /* Disable the TIM Capture/Compare 1 interrupt */
bogdanm 0:9b334a45a8ff 1039 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
bogdanm 0:9b334a45a8ff 1040 }
bogdanm 0:9b334a45a8ff 1041 break;
bogdanm 0:9b334a45a8ff 1042
bogdanm 0:9b334a45a8ff 1043 case TIM_CHANNEL_2:
bogdanm 0:9b334a45a8ff 1044 {
bogdanm 0:9b334a45a8ff 1045 /* Disable the TIM Capture/Compare 2 interrupt */
bogdanm 0:9b334a45a8ff 1046 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
bogdanm 0:9b334a45a8ff 1047 }
bogdanm 0:9b334a45a8ff 1048 break;
bogdanm 0:9b334a45a8ff 1049
bogdanm 0:9b334a45a8ff 1050 case TIM_CHANNEL_3:
bogdanm 0:9b334a45a8ff 1051 {
bogdanm 0:9b334a45a8ff 1052 /* Disable the TIM Capture/Compare 3 interrupt */
bogdanm 0:9b334a45a8ff 1053 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3);
bogdanm 0:9b334a45a8ff 1054 }
bogdanm 0:9b334a45a8ff 1055 break;
bogdanm 0:9b334a45a8ff 1056
bogdanm 0:9b334a45a8ff 1057 case TIM_CHANNEL_4:
bogdanm 0:9b334a45a8ff 1058 {
bogdanm 0:9b334a45a8ff 1059 /* Disable the TIM Capture/Compare 3 interrupt */
bogdanm 0:9b334a45a8ff 1060 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC4);
bogdanm 0:9b334a45a8ff 1061 }
bogdanm 0:9b334a45a8ff 1062 break;
bogdanm 0:9b334a45a8ff 1063
bogdanm 0:9b334a45a8ff 1064 default:
bogdanm 0:9b334a45a8ff 1065 break;
bogdanm 0:9b334a45a8ff 1066 }
bogdanm 0:9b334a45a8ff 1067
bogdanm 0:9b334a45a8ff 1068 /* Disable the complementary PWM output */
bogdanm 0:9b334a45a8ff 1069 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
bogdanm 0:9b334a45a8ff 1070
bogdanm 0:9b334a45a8ff 1071 /* Disable the TIM Break interrupt (only if no more channel is active) */
bogdanm 0:9b334a45a8ff 1072 tmpccer = htim->Instance->CCER;
bogdanm 0:9b334a45a8ff 1073 if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == RESET)
bogdanm 0:9b334a45a8ff 1074 {
bogdanm 0:9b334a45a8ff 1075 __HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK);
bogdanm 0:9b334a45a8ff 1076 }
bogdanm 0:9b334a45a8ff 1077
bogdanm 0:9b334a45a8ff 1078 /* Disable the Main Ouput */
bogdanm 0:9b334a45a8ff 1079 __HAL_TIM_MOE_DISABLE(htim);
bogdanm 0:9b334a45a8ff 1080
bogdanm 0:9b334a45a8ff 1081 /* Disable the Peripheral */
bogdanm 0:9b334a45a8ff 1082 __HAL_TIM_DISABLE(htim);
bogdanm 0:9b334a45a8ff 1083
bogdanm 0:9b334a45a8ff 1084 /* Return function status */
bogdanm 0:9b334a45a8ff 1085 return HAL_OK;
bogdanm 0:9b334a45a8ff 1086 }
bogdanm 0:9b334a45a8ff 1087
bogdanm 0:9b334a45a8ff 1088 /**
bogdanm 0:9b334a45a8ff 1089 * @brief Starts the TIM PWM signal generation in DMA mode on the
bogdanm 0:9b334a45a8ff 1090 * complementary output
bogdanm 0:9b334a45a8ff 1091 * @param htim : TIM handle
bogdanm 0:9b334a45a8ff 1092 * @param Channel : TIM Channel to be enabled
bogdanm 0:9b334a45a8ff 1093 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 1094 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
bogdanm 0:9b334a45a8ff 1095 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
bogdanm 0:9b334a45a8ff 1096 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
bogdanm 0:9b334a45a8ff 1097 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
bogdanm 0:9b334a45a8ff 1098 * @param pData : The source Buffer address.
bogdanm 0:9b334a45a8ff 1099 * @param Length : The length of data to be transferred from memory to TIM peripheral
bogdanm 0:9b334a45a8ff 1100 * @retval HAL status
bogdanm 0:9b334a45a8ff 1101 */
bogdanm 0:9b334a45a8ff 1102 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length)
bogdanm 0:9b334a45a8ff 1103 {
bogdanm 0:9b334a45a8ff 1104 /* Check the parameters */
bogdanm 0:9b334a45a8ff 1105 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
bogdanm 0:9b334a45a8ff 1106
bogdanm 0:9b334a45a8ff 1107 if((htim->State == HAL_TIM_STATE_BUSY))
bogdanm 0:9b334a45a8ff 1108 {
bogdanm 0:9b334a45a8ff 1109 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 1110 }
bogdanm 0:9b334a45a8ff 1111 else if((htim->State == HAL_TIM_STATE_READY))
bogdanm 0:9b334a45a8ff 1112 {
bogdanm 0:9b334a45a8ff 1113 if(((uint32_t)pData == 0 ) && (Length > 0))
bogdanm 0:9b334a45a8ff 1114 {
bogdanm 0:9b334a45a8ff 1115 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 1116 }
bogdanm 0:9b334a45a8ff 1117 else
bogdanm 0:9b334a45a8ff 1118 {
bogdanm 0:9b334a45a8ff 1119 htim->State = HAL_TIM_STATE_BUSY;
bogdanm 0:9b334a45a8ff 1120 }
bogdanm 0:9b334a45a8ff 1121 }
bogdanm 0:9b334a45a8ff 1122 switch (Channel)
bogdanm 0:9b334a45a8ff 1123 {
bogdanm 0:9b334a45a8ff 1124 case TIM_CHANNEL_1:
bogdanm 0:9b334a45a8ff 1125 {
bogdanm 0:9b334a45a8ff 1126 /* Set the DMA Period elapsed callback */
bogdanm 0:9b334a45a8ff 1127 htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseCplt;
bogdanm 0:9b334a45a8ff 1128
bogdanm 0:9b334a45a8ff 1129 /* Set the DMA error callback */
bogdanm 0:9b334a45a8ff 1130 htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ;
bogdanm 0:9b334a45a8ff 1131
bogdanm 0:9b334a45a8ff 1132 /* Enable the DMA channel */
bogdanm 0:9b334a45a8ff 1133 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, Length);
bogdanm 0:9b334a45a8ff 1134
bogdanm 0:9b334a45a8ff 1135 /* Enable the TIM Capture/Compare 1 DMA request */
bogdanm 0:9b334a45a8ff 1136 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
bogdanm 0:9b334a45a8ff 1137 }
bogdanm 0:9b334a45a8ff 1138 break;
bogdanm 0:9b334a45a8ff 1139
bogdanm 0:9b334a45a8ff 1140 case TIM_CHANNEL_2:
bogdanm 0:9b334a45a8ff 1141 {
bogdanm 0:9b334a45a8ff 1142 /* Set the DMA Period elapsed callback */
bogdanm 0:9b334a45a8ff 1143 htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseCplt;
bogdanm 0:9b334a45a8ff 1144
bogdanm 0:9b334a45a8ff 1145 /* Set the DMA error callback */
bogdanm 0:9b334a45a8ff 1146 htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ;
bogdanm 0:9b334a45a8ff 1147
bogdanm 0:9b334a45a8ff 1148 /* Enable the DMA channel */
bogdanm 0:9b334a45a8ff 1149 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, Length);
bogdanm 0:9b334a45a8ff 1150
bogdanm 0:9b334a45a8ff 1151 /* Enable the TIM Capture/Compare 2 DMA request */
bogdanm 0:9b334a45a8ff 1152 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
bogdanm 0:9b334a45a8ff 1153 }
bogdanm 0:9b334a45a8ff 1154 break;
bogdanm 0:9b334a45a8ff 1155
bogdanm 0:9b334a45a8ff 1156 case TIM_CHANNEL_3:
bogdanm 0:9b334a45a8ff 1157 {
bogdanm 0:9b334a45a8ff 1158 /* Set the DMA Period elapsed callback */
bogdanm 0:9b334a45a8ff 1159 htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseCplt;
bogdanm 0:9b334a45a8ff 1160
bogdanm 0:9b334a45a8ff 1161 /* Set the DMA error callback */
bogdanm 0:9b334a45a8ff 1162 htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ;
bogdanm 0:9b334a45a8ff 1163
bogdanm 0:9b334a45a8ff 1164 /* Enable the DMA channel */
bogdanm 0:9b334a45a8ff 1165 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,Length);
bogdanm 0:9b334a45a8ff 1166
bogdanm 0:9b334a45a8ff 1167 /* Enable the TIM Capture/Compare 3 DMA request */
bogdanm 0:9b334a45a8ff 1168 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3);
bogdanm 0:9b334a45a8ff 1169 }
bogdanm 0:9b334a45a8ff 1170 break;
bogdanm 0:9b334a45a8ff 1171
bogdanm 0:9b334a45a8ff 1172 case TIM_CHANNEL_4:
bogdanm 0:9b334a45a8ff 1173 {
bogdanm 0:9b334a45a8ff 1174 /* Set the DMA Period elapsed callback */
bogdanm 0:9b334a45a8ff 1175 htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = TIM_DMADelayPulseCplt;
bogdanm 0:9b334a45a8ff 1176
bogdanm 0:9b334a45a8ff 1177 /* Set the DMA error callback */
bogdanm 0:9b334a45a8ff 1178 htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = TIM_DMAError ;
bogdanm 0:9b334a45a8ff 1179
bogdanm 0:9b334a45a8ff 1180 /* Enable the DMA channel */
bogdanm 0:9b334a45a8ff 1181 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)pData, (uint32_t)&htim->Instance->CCR4, Length);
bogdanm 0:9b334a45a8ff 1182
bogdanm 0:9b334a45a8ff 1183 /* Enable the TIM Capture/Compare 4 DMA request */
bogdanm 0:9b334a45a8ff 1184 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC4);
bogdanm 0:9b334a45a8ff 1185 }
bogdanm 0:9b334a45a8ff 1186 break;
bogdanm 0:9b334a45a8ff 1187
bogdanm 0:9b334a45a8ff 1188 default:
bogdanm 0:9b334a45a8ff 1189 break;
bogdanm 0:9b334a45a8ff 1190 }
bogdanm 0:9b334a45a8ff 1191
bogdanm 0:9b334a45a8ff 1192 /* Enable the complementary PWM output */
bogdanm 0:9b334a45a8ff 1193 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
bogdanm 0:9b334a45a8ff 1194
bogdanm 0:9b334a45a8ff 1195 /* Enable the Main Ouput */
bogdanm 0:9b334a45a8ff 1196 __HAL_TIM_MOE_ENABLE(htim);
bogdanm 0:9b334a45a8ff 1197
bogdanm 0:9b334a45a8ff 1198 /* Enable the Peripheral */
bogdanm 0:9b334a45a8ff 1199 __HAL_TIM_ENABLE(htim);
bogdanm 0:9b334a45a8ff 1200
bogdanm 0:9b334a45a8ff 1201 /* Return function status */
bogdanm 0:9b334a45a8ff 1202 return HAL_OK;
bogdanm 0:9b334a45a8ff 1203 }
bogdanm 0:9b334a45a8ff 1204
bogdanm 0:9b334a45a8ff 1205 /**
bogdanm 0:9b334a45a8ff 1206 * @brief Stops the TIM PWM signal generation in DMA mode on the complementary
bogdanm 0:9b334a45a8ff 1207 * output
bogdanm 0:9b334a45a8ff 1208 * @param htim : TIM handle
bogdanm 0:9b334a45a8ff 1209 * @param Channel : TIM Channel to be disabled
bogdanm 0:9b334a45a8ff 1210 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 1211 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
bogdanm 0:9b334a45a8ff 1212 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
bogdanm 0:9b334a45a8ff 1213 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
bogdanm 0:9b334a45a8ff 1214 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
bogdanm 0:9b334a45a8ff 1215 * @retval HAL status
bogdanm 0:9b334a45a8ff 1216 */
bogdanm 0:9b334a45a8ff 1217 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
bogdanm 0:9b334a45a8ff 1218 {
bogdanm 0:9b334a45a8ff 1219 /* Check the parameters */
bogdanm 0:9b334a45a8ff 1220 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
bogdanm 0:9b334a45a8ff 1221
bogdanm 0:9b334a45a8ff 1222 switch (Channel)
bogdanm 0:9b334a45a8ff 1223 {
bogdanm 0:9b334a45a8ff 1224 case TIM_CHANNEL_1:
bogdanm 0:9b334a45a8ff 1225 {
bogdanm 0:9b334a45a8ff 1226 /* Disable the TIM Capture/Compare 1 DMA request */
bogdanm 0:9b334a45a8ff 1227 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
bogdanm 0:9b334a45a8ff 1228 }
bogdanm 0:9b334a45a8ff 1229 break;
bogdanm 0:9b334a45a8ff 1230
bogdanm 0:9b334a45a8ff 1231 case TIM_CHANNEL_2:
bogdanm 0:9b334a45a8ff 1232 {
bogdanm 0:9b334a45a8ff 1233 /* Disable the TIM Capture/Compare 2 DMA request */
bogdanm 0:9b334a45a8ff 1234 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
bogdanm 0:9b334a45a8ff 1235 }
bogdanm 0:9b334a45a8ff 1236 break;
bogdanm 0:9b334a45a8ff 1237
bogdanm 0:9b334a45a8ff 1238 case TIM_CHANNEL_3:
bogdanm 0:9b334a45a8ff 1239 {
bogdanm 0:9b334a45a8ff 1240 /* Disable the TIM Capture/Compare 3 DMA request */
bogdanm 0:9b334a45a8ff 1241 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3);
bogdanm 0:9b334a45a8ff 1242 }
bogdanm 0:9b334a45a8ff 1243 break;
bogdanm 0:9b334a45a8ff 1244
bogdanm 0:9b334a45a8ff 1245 case TIM_CHANNEL_4:
bogdanm 0:9b334a45a8ff 1246 {
bogdanm 0:9b334a45a8ff 1247 /* Disable the TIM Capture/Compare 4 DMA request */
bogdanm 0:9b334a45a8ff 1248 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC4);
bogdanm 0:9b334a45a8ff 1249 }
bogdanm 0:9b334a45a8ff 1250 break;
bogdanm 0:9b334a45a8ff 1251
bogdanm 0:9b334a45a8ff 1252 default:
bogdanm 0:9b334a45a8ff 1253 break;
bogdanm 0:9b334a45a8ff 1254 }
bogdanm 0:9b334a45a8ff 1255
bogdanm 0:9b334a45a8ff 1256 /* Disable the complementary PWM output */
bogdanm 0:9b334a45a8ff 1257 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
bogdanm 0:9b334a45a8ff 1258
bogdanm 0:9b334a45a8ff 1259 /* Disable the Main Ouput */
bogdanm 0:9b334a45a8ff 1260 __HAL_TIM_MOE_DISABLE(htim);
bogdanm 0:9b334a45a8ff 1261
bogdanm 0:9b334a45a8ff 1262 /* Disable the Peripheral */
bogdanm 0:9b334a45a8ff 1263 __HAL_TIM_DISABLE(htim);
bogdanm 0:9b334a45a8ff 1264
bogdanm 0:9b334a45a8ff 1265 /* Change the htim state */
bogdanm 0:9b334a45a8ff 1266 htim->State = HAL_TIM_STATE_READY;
bogdanm 0:9b334a45a8ff 1267
bogdanm 0:9b334a45a8ff 1268 /* Return function status */
bogdanm 0:9b334a45a8ff 1269 return HAL_OK;
bogdanm 0:9b334a45a8ff 1270 }
bogdanm 0:9b334a45a8ff 1271
bogdanm 0:9b334a45a8ff 1272 /**
bogdanm 0:9b334a45a8ff 1273 * @}
bogdanm 0:9b334a45a8ff 1274 */
bogdanm 0:9b334a45a8ff 1275
bogdanm 0:9b334a45a8ff 1276 /** @defgroup TIMEx_Exported_Functions_Group4 Timer Complementary One Pulse functions
bogdanm 0:9b334a45a8ff 1277 * @brief Timer Complementary One Pulse functions
bogdanm 0:9b334a45a8ff 1278 *
bogdanm 0:9b334a45a8ff 1279 @verbatim
bogdanm 0:9b334a45a8ff 1280 ==============================================================================
bogdanm 0:9b334a45a8ff 1281 ##### Timer Complementary One Pulse functions #####
bogdanm 0:9b334a45a8ff 1282 ==============================================================================
bogdanm 0:9b334a45a8ff 1283 [..]
bogdanm 0:9b334a45a8ff 1284 This section provides functions allowing to:
bogdanm 0:9b334a45a8ff 1285 (+) Start the Complementary One Pulse generation.
bogdanm 0:9b334a45a8ff 1286 (+) Stop the Complementary One Pulse.
bogdanm 0:9b334a45a8ff 1287 (+) Start the Complementary One Pulse and enable interrupts.
bogdanm 0:9b334a45a8ff 1288 (+) Stop the Complementary One Pulse and disable interrupts.
bogdanm 0:9b334a45a8ff 1289
bogdanm 0:9b334a45a8ff 1290 @endverbatim
bogdanm 0:9b334a45a8ff 1291 * @{
bogdanm 0:9b334a45a8ff 1292 */
bogdanm 0:9b334a45a8ff 1293
bogdanm 0:9b334a45a8ff 1294 /**
bogdanm 0:9b334a45a8ff 1295 * @brief Starts the TIM One Pulse signal generation on the complemetary
bogdanm 0:9b334a45a8ff 1296 * output.
bogdanm 0:9b334a45a8ff 1297 * @param htim : TIM One Pulse handle
bogdanm 0:9b334a45a8ff 1298 * @param OutputChannel : TIM Channel to be enabled
bogdanm 0:9b334a45a8ff 1299 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 1300 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
bogdanm 0:9b334a45a8ff 1301 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
bogdanm 0:9b334a45a8ff 1302 * @retval HAL status
bogdanm 0:9b334a45a8ff 1303 */
bogdanm 0:9b334a45a8ff 1304 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
bogdanm 0:9b334a45a8ff 1305 {
bogdanm 0:9b334a45a8ff 1306 /* Check the parameters */
bogdanm 0:9b334a45a8ff 1307 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
bogdanm 0:9b334a45a8ff 1308
bogdanm 0:9b334a45a8ff 1309 /* Enable the complementary One Pulse output */
bogdanm 0:9b334a45a8ff 1310 TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_ENABLE);
bogdanm 0:9b334a45a8ff 1311
bogdanm 0:9b334a45a8ff 1312 /* Enable the Main Ouput */
bogdanm 0:9b334a45a8ff 1313 __HAL_TIM_MOE_ENABLE(htim);
bogdanm 0:9b334a45a8ff 1314
bogdanm 0:9b334a45a8ff 1315 /* Return function status */
bogdanm 0:9b334a45a8ff 1316 return HAL_OK;
bogdanm 0:9b334a45a8ff 1317 }
bogdanm 0:9b334a45a8ff 1318
bogdanm 0:9b334a45a8ff 1319 /**
bogdanm 0:9b334a45a8ff 1320 * @brief Stops the TIM One Pulse signal generation on the complementary
bogdanm 0:9b334a45a8ff 1321 * output.
bogdanm 0:9b334a45a8ff 1322 * @param htim : TIM One Pulse handle
bogdanm 0:9b334a45a8ff 1323 * @param OutputChannel : TIM Channel to be disabled
bogdanm 0:9b334a45a8ff 1324 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 1325 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
bogdanm 0:9b334a45a8ff 1326 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
bogdanm 0:9b334a45a8ff 1327 * @retval HAL status
bogdanm 0:9b334a45a8ff 1328 */
bogdanm 0:9b334a45a8ff 1329 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
bogdanm 0:9b334a45a8ff 1330 {
bogdanm 0:9b334a45a8ff 1331
bogdanm 0:9b334a45a8ff 1332 /* Check the parameters */
bogdanm 0:9b334a45a8ff 1333 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
bogdanm 0:9b334a45a8ff 1334
bogdanm 0:9b334a45a8ff 1335 /* Disable the complementary One Pulse output */
bogdanm 0:9b334a45a8ff 1336 TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_DISABLE);
bogdanm 0:9b334a45a8ff 1337
bogdanm 0:9b334a45a8ff 1338 /* Disable the Main Ouput */
bogdanm 0:9b334a45a8ff 1339 __HAL_TIM_MOE_DISABLE(htim);
bogdanm 0:9b334a45a8ff 1340
bogdanm 0:9b334a45a8ff 1341 /* Disable the Peripheral */
bogdanm 0:9b334a45a8ff 1342 __HAL_TIM_DISABLE(htim);
bogdanm 0:9b334a45a8ff 1343
bogdanm 0:9b334a45a8ff 1344 /* Return function status */
bogdanm 0:9b334a45a8ff 1345 return HAL_OK;
bogdanm 0:9b334a45a8ff 1346 }
bogdanm 0:9b334a45a8ff 1347
bogdanm 0:9b334a45a8ff 1348 /**
bogdanm 0:9b334a45a8ff 1349 * @brief Starts the TIM One Pulse signal generation in interrupt mode on the
bogdanm 0:9b334a45a8ff 1350 * complementary channel.
bogdanm 0:9b334a45a8ff 1351 * @param htim : TIM One Pulse handle
bogdanm 0:9b334a45a8ff 1352 * @param OutputChannel : TIM Channel to be enabled
bogdanm 0:9b334a45a8ff 1353 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 1354 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
bogdanm 0:9b334a45a8ff 1355 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
bogdanm 0:9b334a45a8ff 1356 * @retval HAL status
bogdanm 0:9b334a45a8ff 1357 */
bogdanm 0:9b334a45a8ff 1358 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
bogdanm 0:9b334a45a8ff 1359 {
bogdanm 0:9b334a45a8ff 1360 /* Check the parameters */
bogdanm 0:9b334a45a8ff 1361 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
bogdanm 0:9b334a45a8ff 1362
bogdanm 0:9b334a45a8ff 1363 /* Enable the TIM Capture/Compare 1 interrupt */
bogdanm 0:9b334a45a8ff 1364 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
bogdanm 0:9b334a45a8ff 1365
bogdanm 0:9b334a45a8ff 1366 /* Enable the TIM Capture/Compare 2 interrupt */
bogdanm 0:9b334a45a8ff 1367 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
bogdanm 0:9b334a45a8ff 1368
bogdanm 0:9b334a45a8ff 1369 /* Enable the complementary One Pulse output */
bogdanm 0:9b334a45a8ff 1370 TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_ENABLE);
bogdanm 0:9b334a45a8ff 1371
bogdanm 0:9b334a45a8ff 1372 /* Enable the Main Ouput */
bogdanm 0:9b334a45a8ff 1373 __HAL_TIM_MOE_ENABLE(htim);
bogdanm 0:9b334a45a8ff 1374
bogdanm 0:9b334a45a8ff 1375 /* Return function status */
bogdanm 0:9b334a45a8ff 1376 return HAL_OK;
bogdanm 0:9b334a45a8ff 1377 }
bogdanm 0:9b334a45a8ff 1378
bogdanm 0:9b334a45a8ff 1379 /**
bogdanm 0:9b334a45a8ff 1380 * @brief Stops the TIM One Pulse signal generation in interrupt mode on the
bogdanm 0:9b334a45a8ff 1381 * complementary channel.
bogdanm 0:9b334a45a8ff 1382 * @param htim : TIM One Pulse handle
bogdanm 0:9b334a45a8ff 1383 * @param OutputChannel : TIM Channel to be disabled
bogdanm 0:9b334a45a8ff 1384 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 1385 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
bogdanm 0:9b334a45a8ff 1386 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
bogdanm 0:9b334a45a8ff 1387 * @retval HAL status
bogdanm 0:9b334a45a8ff 1388 */
bogdanm 0:9b334a45a8ff 1389 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
bogdanm 0:9b334a45a8ff 1390 {
bogdanm 0:9b334a45a8ff 1391 /* Check the parameters */
bogdanm 0:9b334a45a8ff 1392 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
bogdanm 0:9b334a45a8ff 1393
bogdanm 0:9b334a45a8ff 1394 /* Disable the TIM Capture/Compare 1 interrupt */
bogdanm 0:9b334a45a8ff 1395 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
bogdanm 0:9b334a45a8ff 1396
bogdanm 0:9b334a45a8ff 1397 /* Disable the TIM Capture/Compare 2 interrupt */
bogdanm 0:9b334a45a8ff 1398 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
bogdanm 0:9b334a45a8ff 1399
bogdanm 0:9b334a45a8ff 1400 /* Disable the complementary One Pulse output */
bogdanm 0:9b334a45a8ff 1401 TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_DISABLE);
bogdanm 0:9b334a45a8ff 1402
bogdanm 0:9b334a45a8ff 1403 /* Disable the Main Ouput */
bogdanm 0:9b334a45a8ff 1404 __HAL_TIM_MOE_DISABLE(htim);
bogdanm 0:9b334a45a8ff 1405
bogdanm 0:9b334a45a8ff 1406 /* Disable the Peripheral */
bogdanm 0:9b334a45a8ff 1407 __HAL_TIM_DISABLE(htim);
bogdanm 0:9b334a45a8ff 1408
bogdanm 0:9b334a45a8ff 1409 /* Return function status */
bogdanm 0:9b334a45a8ff 1410 return HAL_OK;
bogdanm 0:9b334a45a8ff 1411 }
bogdanm 0:9b334a45a8ff 1412
bogdanm 0:9b334a45a8ff 1413 /**
bogdanm 0:9b334a45a8ff 1414 * @}
bogdanm 0:9b334a45a8ff 1415 */
bogdanm 0:9b334a45a8ff 1416 /** @defgroup TIMEx_Exported_Functions_Group5 Peripheral Control functions
bogdanm 0:9b334a45a8ff 1417 * @brief Peripheral Control functions
bogdanm 0:9b334a45a8ff 1418 *
bogdanm 0:9b334a45a8ff 1419 @verbatim
bogdanm 0:9b334a45a8ff 1420 ==============================================================================
bogdanm 0:9b334a45a8ff 1421 ##### Peripheral Control functions #####
bogdanm 0:9b334a45a8ff 1422 ==============================================================================
bogdanm 0:9b334a45a8ff 1423 [..]
bogdanm 0:9b334a45a8ff 1424 This section provides functions allowing to:
bogdanm 0:9b334a45a8ff 1425 (+) Configure the commutation event in case of use of the Hall sensor interface.
bogdanm 0:9b334a45a8ff 1426 (+) Configure Complementary channels, break features and dead time.
bogdanm 0:9b334a45a8ff 1427 (+) Configure Master synchronization.
bogdanm 0:9b334a45a8ff 1428 (+) Configure timer remapping capabilities.
bogdanm 0:9b334a45a8ff 1429
bogdanm 0:9b334a45a8ff 1430 @endverbatim
bogdanm 0:9b334a45a8ff 1431 * @{
bogdanm 0:9b334a45a8ff 1432 */
bogdanm 0:9b334a45a8ff 1433 /**
bogdanm 0:9b334a45a8ff 1434 * @brief Configure the TIM commutation event sequence.
bogdanm 0:9b334a45a8ff 1435 * @note: this function is mandatory to use the commutation event in order to
bogdanm 0:9b334a45a8ff 1436 * update the configuration at each commutation detection on the TRGI input of the Timer,
bogdanm 0:9b334a45a8ff 1437 * the typical use of this feature is with the use of another Timer(interface Timer)
bogdanm 0:9b334a45a8ff 1438 * configured in Hall sensor interface, this interface Timer will generate the
bogdanm 0:9b334a45a8ff 1439 * commutation at its TRGO output (connected to Timer used in this function) each time
bogdanm 0:9b334a45a8ff 1440 * the TI1 of the Interface Timer detect a commutation at its input TI1.
bogdanm 0:9b334a45a8ff 1441 * @param htim : TIM handle
bogdanm 0:9b334a45a8ff 1442 * @param InputTrigger : the Internal trigger corresponding to the Timer Interfacing with the Hall sensor
bogdanm 0:9b334a45a8ff 1443 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 1444 * @arg TIM_TS_ITR0: Internal trigger 0 selected
bogdanm 0:9b334a45a8ff 1445 * @arg TIM_TS_ITR1: Internal trigger 1 selected
bogdanm 0:9b334a45a8ff 1446 * @arg TIM_TS_ITR2: Internal trigger 2 selected
bogdanm 0:9b334a45a8ff 1447 * @arg TIM_TS_ITR3: Internal trigger 3 selected
bogdanm 0:9b334a45a8ff 1448 * @arg TIM_TS_NONE: No trigger is needed
bogdanm 0:9b334a45a8ff 1449 * @param CommutationSource : the Commutation Event source
bogdanm 0:9b334a45a8ff 1450 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 1451 * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer
bogdanm 0:9b334a45a8ff 1452 * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit
bogdanm 0:9b334a45a8ff 1453 * @retval HAL status
bogdanm 0:9b334a45a8ff 1454 */
bogdanm 0:9b334a45a8ff 1455 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource)
bogdanm 0:9b334a45a8ff 1456 {
bogdanm 0:9b334a45a8ff 1457 /* Check the parameters */
bogdanm 0:9b334a45a8ff 1458 assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance));
bogdanm 0:9b334a45a8ff 1459 assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger));
bogdanm 0:9b334a45a8ff 1460
bogdanm 0:9b334a45a8ff 1461 __HAL_LOCK(htim);
bogdanm 0:9b334a45a8ff 1462
bogdanm 0:9b334a45a8ff 1463 if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) ||
bogdanm 0:9b334a45a8ff 1464 (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3))
bogdanm 0:9b334a45a8ff 1465 {
bogdanm 0:9b334a45a8ff 1466 /* Select the Input trigger */
bogdanm 0:9b334a45a8ff 1467 htim->Instance->SMCR &= ~TIM_SMCR_TS;
bogdanm 0:9b334a45a8ff 1468 htim->Instance->SMCR |= InputTrigger;
bogdanm 0:9b334a45a8ff 1469 }
bogdanm 0:9b334a45a8ff 1470
bogdanm 0:9b334a45a8ff 1471 /* Select the Capture Compare preload feature */
bogdanm 0:9b334a45a8ff 1472 htim->Instance->CR2 |= TIM_CR2_CCPC;
bogdanm 0:9b334a45a8ff 1473 /* Select the Commutation event source */
bogdanm 0:9b334a45a8ff 1474 htim->Instance->CR2 &= ~TIM_CR2_CCUS;
bogdanm 0:9b334a45a8ff 1475 htim->Instance->CR2 |= CommutationSource;
bogdanm 0:9b334a45a8ff 1476
bogdanm 0:9b334a45a8ff 1477 __HAL_UNLOCK(htim);
bogdanm 0:9b334a45a8ff 1478
bogdanm 0:9b334a45a8ff 1479 return HAL_OK;
bogdanm 0:9b334a45a8ff 1480 }
bogdanm 0:9b334a45a8ff 1481
bogdanm 0:9b334a45a8ff 1482 /**
bogdanm 0:9b334a45a8ff 1483 * @brief Configure the TIM commutation event sequence with interrupt.
bogdanm 0:9b334a45a8ff 1484 * @note: this function is mandatory to use the commutation event in order to
bogdanm 0:9b334a45a8ff 1485 * update the configuration at each commutation detection on the TRGI input of the Timer,
bogdanm 0:9b334a45a8ff 1486 * the typical use of this feature is with the use of another Timer(interface Timer)
bogdanm 0:9b334a45a8ff 1487 * configured in Hall sensor interface, this interface Timer will generate the
bogdanm 0:9b334a45a8ff 1488 * commutation at its TRGO output (connected to Timer used in this function) each time
bogdanm 0:9b334a45a8ff 1489 * the TI1 of the Interface Timer detect a commutation at its input TI1.
bogdanm 0:9b334a45a8ff 1490 * @param htim : TIM handle
bogdanm 0:9b334a45a8ff 1491 * @param InputTrigger : the Internal trigger corresponding to the Timer Interfacing with the Hall sensor
bogdanm 0:9b334a45a8ff 1492 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 1493 * @arg TIM_TS_ITR0: Internal trigger 0 selected
bogdanm 0:9b334a45a8ff 1494 * @arg TIM_TS_ITR1: Internal trigger 1 selected
bogdanm 0:9b334a45a8ff 1495 * @arg TIM_TS_ITR2: Internal trigger 2 selected
bogdanm 0:9b334a45a8ff 1496 * @arg TIM_TS_ITR3: Internal trigger 3 selected
bogdanm 0:9b334a45a8ff 1497 * @arg TIM_TS_NONE: No trigger is needed
bogdanm 0:9b334a45a8ff 1498 * @param CommutationSource : the Commutation Event source
bogdanm 0:9b334a45a8ff 1499 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 1500 * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer
bogdanm 0:9b334a45a8ff 1501 * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit
bogdanm 0:9b334a45a8ff 1502 * @retval HAL status
bogdanm 0:9b334a45a8ff 1503 */
bogdanm 0:9b334a45a8ff 1504 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_IT(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource)
bogdanm 0:9b334a45a8ff 1505 {
bogdanm 0:9b334a45a8ff 1506 /* Check the parameters */
bogdanm 0:9b334a45a8ff 1507 assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance));
bogdanm 0:9b334a45a8ff 1508 assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger));
bogdanm 0:9b334a45a8ff 1509
bogdanm 0:9b334a45a8ff 1510 __HAL_LOCK(htim);
bogdanm 0:9b334a45a8ff 1511
bogdanm 0:9b334a45a8ff 1512 if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) ||
bogdanm 0:9b334a45a8ff 1513 (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3))
bogdanm 0:9b334a45a8ff 1514 {
bogdanm 0:9b334a45a8ff 1515 /* Select the Input trigger */
bogdanm 0:9b334a45a8ff 1516 htim->Instance->SMCR &= ~TIM_SMCR_TS;
bogdanm 0:9b334a45a8ff 1517 htim->Instance->SMCR |= InputTrigger;
bogdanm 0:9b334a45a8ff 1518 }
bogdanm 0:9b334a45a8ff 1519
bogdanm 0:9b334a45a8ff 1520 /* Select the Capture Compare preload feature */
bogdanm 0:9b334a45a8ff 1521 htim->Instance->CR2 |= TIM_CR2_CCPC;
bogdanm 0:9b334a45a8ff 1522 /* Select the Commutation event source */
bogdanm 0:9b334a45a8ff 1523 htim->Instance->CR2 &= ~TIM_CR2_CCUS;
bogdanm 0:9b334a45a8ff 1524 htim->Instance->CR2 |= CommutationSource;
bogdanm 0:9b334a45a8ff 1525
bogdanm 0:9b334a45a8ff 1526 /* Enable the Commutation Interrupt Request */
bogdanm 0:9b334a45a8ff 1527 __HAL_TIM_ENABLE_IT(htim, TIM_IT_COM);
bogdanm 0:9b334a45a8ff 1528
bogdanm 0:9b334a45a8ff 1529 __HAL_UNLOCK(htim);
bogdanm 0:9b334a45a8ff 1530
bogdanm 0:9b334a45a8ff 1531 return HAL_OK;
bogdanm 0:9b334a45a8ff 1532 }
bogdanm 0:9b334a45a8ff 1533
bogdanm 0:9b334a45a8ff 1534 /**
bogdanm 0:9b334a45a8ff 1535 * @brief Configure the TIM commutation event sequence with DMA.
bogdanm 0:9b334a45a8ff 1536 * @note: this function is mandatory to use the commutation event in order to
bogdanm 0:9b334a45a8ff 1537 * update the configuration at each commutation detection on the TRGI input of the Timer,
bogdanm 0:9b334a45a8ff 1538 * the typical use of this feature is with the use of another Timer(interface Timer)
bogdanm 0:9b334a45a8ff 1539 * configured in Hall sensor interface, this interface Timer will generate the
bogdanm 0:9b334a45a8ff 1540 * commutation at its TRGO output (connected to Timer used in this function) each time
bogdanm 0:9b334a45a8ff 1541 * the TI1 of the Interface Timer detect a commutation at its input TI1.
bogdanm 0:9b334a45a8ff 1542 * @note: The user should configure the DMA in his own software, in This function only the COMDE bit is set
bogdanm 0:9b334a45a8ff 1543 * @param htim : TIM handle
bogdanm 0:9b334a45a8ff 1544 * @param InputTrigger : the Internal trigger corresponding to the Timer Interfacing with the Hall sensor
bogdanm 0:9b334a45a8ff 1545 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 1546 * @arg TIM_TS_ITR0: Internal trigger 0 selected
bogdanm 0:9b334a45a8ff 1547 * @arg TIM_TS_ITR1: Internal trigger 1 selected
bogdanm 0:9b334a45a8ff 1548 * @arg TIM_TS_ITR2: Internal trigger 2 selected
bogdanm 0:9b334a45a8ff 1549 * @arg TIM_TS_ITR3: Internal trigger 3 selected
bogdanm 0:9b334a45a8ff 1550 * @arg TIM_TS_NONE: No trigger is needed
bogdanm 0:9b334a45a8ff 1551 * @param CommutationSource : the Commutation Event source
bogdanm 0:9b334a45a8ff 1552 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 1553 * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer
bogdanm 0:9b334a45a8ff 1554 * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit
bogdanm 0:9b334a45a8ff 1555 * @retval HAL status
bogdanm 0:9b334a45a8ff 1556 */
bogdanm 0:9b334a45a8ff 1557 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_DMA(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource)
bogdanm 0:9b334a45a8ff 1558 {
bogdanm 0:9b334a45a8ff 1559 /* Check the parameters */
bogdanm 0:9b334a45a8ff 1560 assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance));
bogdanm 0:9b334a45a8ff 1561 assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger));
bogdanm 0:9b334a45a8ff 1562
bogdanm 0:9b334a45a8ff 1563 __HAL_LOCK(htim);
bogdanm 0:9b334a45a8ff 1564
bogdanm 0:9b334a45a8ff 1565 if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) ||
bogdanm 0:9b334a45a8ff 1566 (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3))
bogdanm 0:9b334a45a8ff 1567 {
bogdanm 0:9b334a45a8ff 1568 /* Select the Input trigger */
bogdanm 0:9b334a45a8ff 1569 htim->Instance->SMCR &= ~TIM_SMCR_TS;
bogdanm 0:9b334a45a8ff 1570 htim->Instance->SMCR |= InputTrigger;
bogdanm 0:9b334a45a8ff 1571 }
bogdanm 0:9b334a45a8ff 1572
bogdanm 0:9b334a45a8ff 1573 /* Select the Capture Compare preload feature */
bogdanm 0:9b334a45a8ff 1574 htim->Instance->CR2 |= TIM_CR2_CCPC;
bogdanm 0:9b334a45a8ff 1575 /* Select the Commutation event source */
bogdanm 0:9b334a45a8ff 1576 htim->Instance->CR2 &= ~TIM_CR2_CCUS;
bogdanm 0:9b334a45a8ff 1577 htim->Instance->CR2 |= CommutationSource;
bogdanm 0:9b334a45a8ff 1578
bogdanm 0:9b334a45a8ff 1579 /* Enable the Commutation DMA Request */
bogdanm 0:9b334a45a8ff 1580 /* Set the DMA Commutation Callback */
bogdanm 0:9b334a45a8ff 1581 htim->hdma[TIM_DMA_ID_COMMUTATION]->XferCpltCallback = TIMEx_DMACommutationCplt;
bogdanm 0:9b334a45a8ff 1582 /* Set the DMA error callback */
bogdanm 0:9b334a45a8ff 1583 htim->hdma[TIM_DMA_ID_COMMUTATION]->XferErrorCallback = TIM_DMAError;
bogdanm 0:9b334a45a8ff 1584
bogdanm 0:9b334a45a8ff 1585 /* Enable the Commutation DMA Request */
bogdanm 0:9b334a45a8ff 1586 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_COM);
bogdanm 0:9b334a45a8ff 1587
bogdanm 0:9b334a45a8ff 1588 __HAL_UNLOCK(htim);
bogdanm 0:9b334a45a8ff 1589
bogdanm 0:9b334a45a8ff 1590 return HAL_OK;
bogdanm 0:9b334a45a8ff 1591 }
bogdanm 0:9b334a45a8ff 1592
bogdanm 0:9b334a45a8ff 1593 /**
bogdanm 0:9b334a45a8ff 1594 * @brief Configures the TIM in master mode.
bogdanm 0:9b334a45a8ff 1595 * @param htim : TIM handle.
bogdanm 0:9b334a45a8ff 1596 * @param sMasterConfig : pointer to a TIM_MasterConfigTypeDef structure that
bogdanm 0:9b334a45a8ff 1597 * contains the selected trigger output (TRGO) and the Master/Slave
bogdanm 0:9b334a45a8ff 1598 * mode.
bogdanm 0:9b334a45a8ff 1599 * @retval HAL status
bogdanm 0:9b334a45a8ff 1600 */
bogdanm 0:9b334a45a8ff 1601 HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, TIM_MasterConfigTypeDef * sMasterConfig)
bogdanm 0:9b334a45a8ff 1602 {
bogdanm 0:9b334a45a8ff 1603 /* Check the parameters */
bogdanm 0:9b334a45a8ff 1604 assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance));
bogdanm 0:9b334a45a8ff 1605 assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger));
bogdanm 0:9b334a45a8ff 1606 assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode));
bogdanm 0:9b334a45a8ff 1607
bogdanm 0:9b334a45a8ff 1608 __HAL_LOCK(htim);
bogdanm 0:9b334a45a8ff 1609
bogdanm 0:9b334a45a8ff 1610 htim->State = HAL_TIM_STATE_BUSY;
bogdanm 0:9b334a45a8ff 1611
bogdanm 0:9b334a45a8ff 1612 /* Reset the MMS Bits */
bogdanm 0:9b334a45a8ff 1613 htim->Instance->CR2 &= ~TIM_CR2_MMS;
bogdanm 0:9b334a45a8ff 1614 /* Select the TRGO source */
bogdanm 0:9b334a45a8ff 1615 htim->Instance->CR2 |= sMasterConfig->MasterOutputTrigger;
bogdanm 0:9b334a45a8ff 1616
bogdanm 0:9b334a45a8ff 1617 /* Reset the MSM Bit */
bogdanm 0:9b334a45a8ff 1618 htim->Instance->SMCR &= ~TIM_SMCR_MSM;
bogdanm 0:9b334a45a8ff 1619 /* Set or Reset the MSM Bit */
bogdanm 0:9b334a45a8ff 1620 htim->Instance->SMCR |= sMasterConfig->MasterSlaveMode;
bogdanm 0:9b334a45a8ff 1621
bogdanm 0:9b334a45a8ff 1622 htim->State = HAL_TIM_STATE_READY;
bogdanm 0:9b334a45a8ff 1623
bogdanm 0:9b334a45a8ff 1624 __HAL_UNLOCK(htim);
bogdanm 0:9b334a45a8ff 1625
bogdanm 0:9b334a45a8ff 1626 return HAL_OK;
bogdanm 0:9b334a45a8ff 1627 }
bogdanm 0:9b334a45a8ff 1628
bogdanm 0:9b334a45a8ff 1629 /**
bogdanm 0:9b334a45a8ff 1630 * @brief Configures the Break feature, dead time, Lock level, OSSI/OSSR State
bogdanm 0:9b334a45a8ff 1631 * and the AOE(automatic output enable).
bogdanm 0:9b334a45a8ff 1632 * @param htim : TIM handle
bogdanm 0:9b334a45a8ff 1633 * @param sBreakDeadTimeConfig : pointer to a TIM_ConfigBreakDeadConfigTypeDef structure that
bogdanm 0:9b334a45a8ff 1634 * contains the BDTR Register configuration information for the TIM peripheral.
bogdanm 0:9b334a45a8ff 1635 * @retval HAL status
bogdanm 0:9b334a45a8ff 1636 */
bogdanm 0:9b334a45a8ff 1637 HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim,
bogdanm 0:9b334a45a8ff 1638 TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig)
bogdanm 0:9b334a45a8ff 1639 {
bogdanm 0:9b334a45a8ff 1640 /* Check the parameters */
bogdanm 0:9b334a45a8ff 1641 assert_param(IS_TIM_BREAK_INSTANCE(htim->Instance));
bogdanm 0:9b334a45a8ff 1642 assert_param(IS_TIM_OSSR_STATE(sBreakDeadTimeConfig->OffStateRunMode));
bogdanm 0:9b334a45a8ff 1643 assert_param(IS_TIM_OSSI_STATE(sBreakDeadTimeConfig->OffStateIDLEMode));
bogdanm 0:9b334a45a8ff 1644 assert_param(IS_TIM_LOCK_LEVEL(sBreakDeadTimeConfig->LockLevel));
bogdanm 0:9b334a45a8ff 1645 assert_param(IS_TIM_DEADTIME(sBreakDeadTimeConfig->DeadTime));
bogdanm 0:9b334a45a8ff 1646 assert_param(IS_TIM_BREAK_STATE(sBreakDeadTimeConfig->BreakState));
bogdanm 0:9b334a45a8ff 1647 assert_param(IS_TIM_BREAK_POLARITY(sBreakDeadTimeConfig->BreakPolarity));
bogdanm 0:9b334a45a8ff 1648 assert_param(IS_TIM_AUTOMATIC_OUTPUT_STATE(sBreakDeadTimeConfig->AutomaticOutput));
bogdanm 0:9b334a45a8ff 1649
bogdanm 0:9b334a45a8ff 1650 /* Process Locked */
bogdanm 0:9b334a45a8ff 1651 __HAL_LOCK(htim);
bogdanm 0:9b334a45a8ff 1652
bogdanm 0:9b334a45a8ff 1653 htim->State = HAL_TIM_STATE_BUSY;
bogdanm 0:9b334a45a8ff 1654
bogdanm 0:9b334a45a8ff 1655 /* Set the Lock level, the Break enable Bit and the Polarity, the OSSR State,
bogdanm 0:9b334a45a8ff 1656 the OSSI State, the dead time value and the Automatic Output Enable Bit */
bogdanm 0:9b334a45a8ff 1657 htim->Instance->BDTR = (uint32_t)sBreakDeadTimeConfig->OffStateRunMode |
bogdanm 0:9b334a45a8ff 1658 sBreakDeadTimeConfig->OffStateIDLEMode |
bogdanm 0:9b334a45a8ff 1659 sBreakDeadTimeConfig->LockLevel |
bogdanm 0:9b334a45a8ff 1660 sBreakDeadTimeConfig->DeadTime |
bogdanm 0:9b334a45a8ff 1661 sBreakDeadTimeConfig->BreakState |
bogdanm 0:9b334a45a8ff 1662 sBreakDeadTimeConfig->BreakPolarity |
bogdanm 0:9b334a45a8ff 1663 sBreakDeadTimeConfig->AutomaticOutput;
bogdanm 0:9b334a45a8ff 1664
bogdanm 0:9b334a45a8ff 1665
bogdanm 0:9b334a45a8ff 1666 htim->State = HAL_TIM_STATE_READY;
bogdanm 0:9b334a45a8ff 1667
bogdanm 0:9b334a45a8ff 1668 __HAL_UNLOCK(htim);
bogdanm 0:9b334a45a8ff 1669
bogdanm 0:9b334a45a8ff 1670 return HAL_OK;
bogdanm 0:9b334a45a8ff 1671 }
bogdanm 0:9b334a45a8ff 1672
bogdanm 0:9b334a45a8ff 1673 /**
bogdanm 0:9b334a45a8ff 1674 * @brief Configures the TIM14 Remapping input capabilities.
bogdanm 0:9b334a45a8ff 1675 * @param htim : TIM handle.
bogdanm 0:9b334a45a8ff 1676 * @param Remap : specifies the TIM remapping source.
bogdanm 0:9b334a45a8ff 1677 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 1678 * @arg TIM_TIM14_GPIO: TIM14 TI1 is connected to GPIO
bogdanm 0:9b334a45a8ff 1679 * @arg TIM_TIM14_RTC: TIM14 TI1 is connected to RTC_clock
bogdanm 0:9b334a45a8ff 1680 * @arg TIM_TIM14_HSE: TIM14 TI1 is connected to HSE/32
bogdanm 0:9b334a45a8ff 1681 * @arg TIM_TIM14_MCO: TIM14 TI1 is connected to MCO
bogdanm 0:9b334a45a8ff 1682 * @retval HAL status
bogdanm 0:9b334a45a8ff 1683 */
bogdanm 0:9b334a45a8ff 1684 HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap)
bogdanm 0:9b334a45a8ff 1685 {
bogdanm 0:9b334a45a8ff 1686 __HAL_LOCK(htim);
bogdanm 0:9b334a45a8ff 1687
bogdanm 0:9b334a45a8ff 1688 /* Check parameters */
bogdanm 0:9b334a45a8ff 1689 assert_param(IS_TIM_REMAP_INSTANCE(htim->Instance));
bogdanm 0:9b334a45a8ff 1690 assert_param(IS_TIM_REMAP(Remap));
bogdanm 0:9b334a45a8ff 1691
bogdanm 0:9b334a45a8ff 1692 /* Set the Timer remapping configuration */
bogdanm 0:9b334a45a8ff 1693 htim->Instance->OR = Remap;
bogdanm 0:9b334a45a8ff 1694
bogdanm 0:9b334a45a8ff 1695 htim->State = HAL_TIM_STATE_READY;
bogdanm 0:9b334a45a8ff 1696
bogdanm 0:9b334a45a8ff 1697 __HAL_UNLOCK(htim);
bogdanm 0:9b334a45a8ff 1698
bogdanm 0:9b334a45a8ff 1699 return HAL_OK;
bogdanm 0:9b334a45a8ff 1700 }
bogdanm 0:9b334a45a8ff 1701
bogdanm 0:9b334a45a8ff 1702 /**
bogdanm 0:9b334a45a8ff 1703 * @}
bogdanm 0:9b334a45a8ff 1704 */
bogdanm 0:9b334a45a8ff 1705
bogdanm 0:9b334a45a8ff 1706 /** @defgroup TIMEx_Exported_Functions_Group6 Extension Callbacks functions
bogdanm 0:9b334a45a8ff 1707 * @brief Extension Callbacks functions
bogdanm 0:9b334a45a8ff 1708 *
bogdanm 0:9b334a45a8ff 1709 @verbatim
bogdanm 0:9b334a45a8ff 1710 ==============================================================================
bogdanm 0:9b334a45a8ff 1711 ##### Extension Callbacks functions #####
bogdanm 0:9b334a45a8ff 1712 ==============================================================================
bogdanm 0:9b334a45a8ff 1713 [..]
bogdanm 0:9b334a45a8ff 1714 This section provides Extension TIM callback functions:
bogdanm 0:9b334a45a8ff 1715 (+) Timer Commutation callback
bogdanm 0:9b334a45a8ff 1716 (+) Timer Break callback
bogdanm 0:9b334a45a8ff 1717
bogdanm 0:9b334a45a8ff 1718 @endverbatim
bogdanm 0:9b334a45a8ff 1719 * @{
bogdanm 0:9b334a45a8ff 1720 */
bogdanm 0:9b334a45a8ff 1721
bogdanm 0:9b334a45a8ff 1722 /**
bogdanm 0:9b334a45a8ff 1723 * @brief Hall commutation changed callback in non blocking mode
bogdanm 0:9b334a45a8ff 1724 * @param htim : TIM handle
bogdanm 0:9b334a45a8ff 1725 * @retval None
bogdanm 0:9b334a45a8ff 1726 */
bogdanm 0:9b334a45a8ff 1727 __weak void HAL_TIMEx_CommutationCallback(TIM_HandleTypeDef *htim)
bogdanm 0:9b334a45a8ff 1728 {
bogdanm 0:9b334a45a8ff 1729 /* NOTE : This function Should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 1730 the HAL_TIMEx_CommutationCallback could be implemented in the user file
bogdanm 0:9b334a45a8ff 1731 */
bogdanm 0:9b334a45a8ff 1732 }
bogdanm 0:9b334a45a8ff 1733
bogdanm 0:9b334a45a8ff 1734 /**
bogdanm 0:9b334a45a8ff 1735 * @brief Hall Break detection callback in non blocking mode
bogdanm 0:9b334a45a8ff 1736 * @param htim : TIM handle
bogdanm 0:9b334a45a8ff 1737 * @retval None
bogdanm 0:9b334a45a8ff 1738 */
bogdanm 0:9b334a45a8ff 1739 __weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim)
bogdanm 0:9b334a45a8ff 1740 {
bogdanm 0:9b334a45a8ff 1741 /* NOTE : This function Should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 1742 the HAL_TIMEx_BreakCallback could be implemented in the user file
bogdanm 0:9b334a45a8ff 1743 */
bogdanm 0:9b334a45a8ff 1744 }
bogdanm 0:9b334a45a8ff 1745
bogdanm 0:9b334a45a8ff 1746 /**
bogdanm 0:9b334a45a8ff 1747 * @brief TIM DMA Commutation callback.
bogdanm 0:9b334a45a8ff 1748 * @param hdma : pointer to DMA handle.
bogdanm 0:9b334a45a8ff 1749 * @retval None
bogdanm 0:9b334a45a8ff 1750 */
bogdanm 0:9b334a45a8ff 1751 void TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma)
bogdanm 0:9b334a45a8ff 1752 {
bogdanm 0:9b334a45a8ff 1753 TIM_HandleTypeDef* htim = ( TIM_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
bogdanm 0:9b334a45a8ff 1754
bogdanm 0:9b334a45a8ff 1755 htim->State= HAL_TIM_STATE_READY;
bogdanm 0:9b334a45a8ff 1756
bogdanm 0:9b334a45a8ff 1757 HAL_TIMEx_CommutationCallback(htim);
bogdanm 0:9b334a45a8ff 1758 }
bogdanm 0:9b334a45a8ff 1759
bogdanm 0:9b334a45a8ff 1760 /**
bogdanm 0:9b334a45a8ff 1761 * @}
bogdanm 0:9b334a45a8ff 1762 */
bogdanm 0:9b334a45a8ff 1763
bogdanm 0:9b334a45a8ff 1764 /** @defgroup TIMEx_Exported_Functions_Group7 Extension Peripheral State functions
bogdanm 0:9b334a45a8ff 1765 * @brief Extension Peripheral State functions
bogdanm 0:9b334a45a8ff 1766 *
bogdanm 0:9b334a45a8ff 1767 @verbatim
bogdanm 0:9b334a45a8ff 1768 ==============================================================================
bogdanm 0:9b334a45a8ff 1769 ##### Extension Peripheral State functions #####
bogdanm 0:9b334a45a8ff 1770 ==============================================================================
bogdanm 0:9b334a45a8ff 1771 [..]
bogdanm 0:9b334a45a8ff 1772 This subsection permit to get in run-time the status of the peripheral
bogdanm 0:9b334a45a8ff 1773 and the data flow.
bogdanm 0:9b334a45a8ff 1774
bogdanm 0:9b334a45a8ff 1775 @endverbatim
bogdanm 0:9b334a45a8ff 1776 * @{
bogdanm 0:9b334a45a8ff 1777 */
bogdanm 0:9b334a45a8ff 1778
bogdanm 0:9b334a45a8ff 1779 /**
bogdanm 0:9b334a45a8ff 1780 * @brief Return the TIM Hall Sensor interface state
bogdanm 0:9b334a45a8ff 1781 * @param htim : TIM Hall Sensor handle
bogdanm 0:9b334a45a8ff 1782 * @retval HAL state
bogdanm 0:9b334a45a8ff 1783 */
bogdanm 0:9b334a45a8ff 1784 HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(TIM_HandleTypeDef *htim)
bogdanm 0:9b334a45a8ff 1785 {
bogdanm 0:9b334a45a8ff 1786 return htim->State;
bogdanm 0:9b334a45a8ff 1787 }
bogdanm 0:9b334a45a8ff 1788
bogdanm 0:9b334a45a8ff 1789 /**
bogdanm 0:9b334a45a8ff 1790 * @}
bogdanm 0:9b334a45a8ff 1791 */
bogdanm 0:9b334a45a8ff 1792
bogdanm 0:9b334a45a8ff 1793 /**
bogdanm 0:9b334a45a8ff 1794 * @}
bogdanm 0:9b334a45a8ff 1795 */
bogdanm 0:9b334a45a8ff 1796
bogdanm 0:9b334a45a8ff 1797 /** @addtogroup TIMEx_Private_Functions
bogdanm 0:9b334a45a8ff 1798 * @{
bogdanm 0:9b334a45a8ff 1799 */
bogdanm 0:9b334a45a8ff 1800
bogdanm 0:9b334a45a8ff 1801 /**
bogdanm 0:9b334a45a8ff 1802 * @brief Enables or disables the TIM Capture Compare Channel xN.
bogdanm 0:9b334a45a8ff 1803 * @param TIMx to select the TIM peripheral
bogdanm 0:9b334a45a8ff 1804 * @param Channel : specifies the TIM Channel
bogdanm 0:9b334a45a8ff 1805 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 1806 * @arg TIM_CHANNEL_1: TIM Channel 1
bogdanm 0:9b334a45a8ff 1807 * @arg TIM_CHANNEL_2: TIM Channel 2
bogdanm 0:9b334a45a8ff 1808 * @arg TIM_CHANNEL_3: TIM Channel 3
bogdanm 0:9b334a45a8ff 1809 * @param ChannelNState : specifies the TIM Channel CCxNE bit new state.
bogdanm 0:9b334a45a8ff 1810 * This parameter can be: TIM_CCxN_ENABLE or TIM_CCxN_Disable.
bogdanm 0:9b334a45a8ff 1811 * @retval None
bogdanm 0:9b334a45a8ff 1812 */
bogdanm 0:9b334a45a8ff 1813 static void TIM_CCxNChannelCmd(TIM_TypeDef* TIMx, uint32_t Channel, uint32_t ChannelNState)
bogdanm 0:9b334a45a8ff 1814 {
bogdanm 0:9b334a45a8ff 1815 uint32_t tmp = 0;
bogdanm 0:9b334a45a8ff 1816
bogdanm 0:9b334a45a8ff 1817 tmp = TIM_CCER_CC1NE << Channel;
bogdanm 0:9b334a45a8ff 1818
bogdanm 0:9b334a45a8ff 1819 /* Reset the CCxNE Bit */
bogdanm 0:9b334a45a8ff 1820 TIMx->CCER &= ~tmp;
bogdanm 0:9b334a45a8ff 1821
bogdanm 0:9b334a45a8ff 1822 /* Set or reset the CCxNE Bit */
bogdanm 0:9b334a45a8ff 1823 TIMx->CCER |= (uint32_t)(ChannelNState << Channel);
bogdanm 0:9b334a45a8ff 1824 }
bogdanm 0:9b334a45a8ff 1825
bogdanm 0:9b334a45a8ff 1826 /**
bogdanm 0:9b334a45a8ff 1827 * @}
bogdanm 0:9b334a45a8ff 1828 */
bogdanm 0:9b334a45a8ff 1829
bogdanm 0:9b334a45a8ff 1830 #endif /* HAL_TIM_MODULE_ENABLED */
bogdanm 0:9b334a45a8ff 1831 /**
bogdanm 0:9b334a45a8ff 1832 * @}
bogdanm 0:9b334a45a8ff 1833 */
bogdanm 0:9b334a45a8ff 1834
bogdanm 0:9b334a45a8ff 1835 /**
bogdanm 0:9b334a45a8ff 1836 * @}
bogdanm 0:9b334a45a8ff 1837 */
bogdanm 0:9b334a45a8ff 1838
bogdanm 0:9b334a45a8ff 1839 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/