fix LPC812 PWM
Fork of mbed-dev by
targets/cmsis/TARGET_STM/TARGET_STM32F1/stm32f1xx_hal_nor.h@124:6a4a5b7d7324, 2016-05-09 (annotated)
- Committer:
- mbed_official
- Date:
- Mon May 09 18:30:12 2016 +0100
- Revision:
- 124:6a4a5b7d7324
- Parent:
- 0:9b334a45a8ff
Synchronized with git revision ad75bdcde34d7da9d54b7669010c7fb968a99c7c
Full URL: https://github.com/mbedmicro/mbed/commit/ad75bdcde34d7da9d54b7669010c7fb968a99c7c/
[STMF1] Stm32f1_hal_cube update
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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bogdanm | 0:9b334a45a8ff | 1 | /** |
bogdanm | 0:9b334a45a8ff | 2 | ****************************************************************************** |
bogdanm | 0:9b334a45a8ff | 3 | * @file stm32f1xx_hal_nor.h |
bogdanm | 0:9b334a45a8ff | 4 | * @author MCD Application Team |
mbed_official | 124:6a4a5b7d7324 | 5 | * @version V1.0.4 |
mbed_official | 124:6a4a5b7d7324 | 6 | * @date 29-April-2016 |
bogdanm | 0:9b334a45a8ff | 7 | * @brief Header file of NOR HAL module. |
bogdanm | 0:9b334a45a8ff | 8 | ****************************************************************************** |
bogdanm | 0:9b334a45a8ff | 9 | * @attention |
bogdanm | 0:9b334a45a8ff | 10 | * |
mbed_official | 124:6a4a5b7d7324 | 11 | * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
bogdanm | 0:9b334a45a8ff | 12 | * |
bogdanm | 0:9b334a45a8ff | 13 | * Redistribution and use in source and binary forms, with or without modification, |
bogdanm | 0:9b334a45a8ff | 14 | * are permitted provided that the following conditions are met: |
bogdanm | 0:9b334a45a8ff | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
bogdanm | 0:9b334a45a8ff | 16 | * this list of conditions and the following disclaimer. |
bogdanm | 0:9b334a45a8ff | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
bogdanm | 0:9b334a45a8ff | 18 | * this list of conditions and the following disclaimer in the documentation |
bogdanm | 0:9b334a45a8ff | 19 | * and/or other materials provided with the distribution. |
bogdanm | 0:9b334a45a8ff | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
bogdanm | 0:9b334a45a8ff | 21 | * may be used to endorse or promote products derived from this software |
bogdanm | 0:9b334a45a8ff | 22 | * without specific prior written permission. |
bogdanm | 0:9b334a45a8ff | 23 | * |
bogdanm | 0:9b334a45a8ff | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
bogdanm | 0:9b334a45a8ff | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
bogdanm | 0:9b334a45a8ff | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
bogdanm | 0:9b334a45a8ff | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
bogdanm | 0:9b334a45a8ff | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
bogdanm | 0:9b334a45a8ff | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
bogdanm | 0:9b334a45a8ff | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
bogdanm | 0:9b334a45a8ff | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
bogdanm | 0:9b334a45a8ff | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
bogdanm | 0:9b334a45a8ff | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
bogdanm | 0:9b334a45a8ff | 34 | * |
bogdanm | 0:9b334a45a8ff | 35 | ****************************************************************************** |
bogdanm | 0:9b334a45a8ff | 36 | */ |
bogdanm | 0:9b334a45a8ff | 37 | |
bogdanm | 0:9b334a45a8ff | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 39 | #ifndef __STM32F1xx_HAL_NOR_H |
bogdanm | 0:9b334a45a8ff | 40 | #define __STM32F1xx_HAL_NOR_H |
bogdanm | 0:9b334a45a8ff | 41 | |
bogdanm | 0:9b334a45a8ff | 42 | #ifdef __cplusplus |
bogdanm | 0:9b334a45a8ff | 43 | extern "C" { |
bogdanm | 0:9b334a45a8ff | 44 | #endif |
bogdanm | 0:9b334a45a8ff | 45 | |
bogdanm | 0:9b334a45a8ff | 46 | /* Includes ------------------------------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 47 | #include "stm32f1xx_ll_fsmc.h" |
bogdanm | 0:9b334a45a8ff | 48 | |
bogdanm | 0:9b334a45a8ff | 49 | /** @addtogroup STM32F1xx_HAL_Driver |
bogdanm | 0:9b334a45a8ff | 50 | * @{ |
bogdanm | 0:9b334a45a8ff | 51 | */ |
bogdanm | 0:9b334a45a8ff | 52 | |
bogdanm | 0:9b334a45a8ff | 53 | #if defined (STM32F101xE) || defined(STM32F103xE) || defined(STM32F101xG) || defined(STM32F103xG) || defined(STM32F100xE) |
bogdanm | 0:9b334a45a8ff | 54 | /** @addtogroup NOR |
bogdanm | 0:9b334a45a8ff | 55 | * @{ |
bogdanm | 0:9b334a45a8ff | 56 | */ |
bogdanm | 0:9b334a45a8ff | 57 | |
bogdanm | 0:9b334a45a8ff | 58 | /** @addtogroup NOR_Private_Constants |
bogdanm | 0:9b334a45a8ff | 59 | * @{ |
bogdanm | 0:9b334a45a8ff | 60 | */ |
bogdanm | 0:9b334a45a8ff | 61 | |
bogdanm | 0:9b334a45a8ff | 62 | /* NOR device IDs addresses */ |
bogdanm | 0:9b334a45a8ff | 63 | #define MC_ADDRESS ((uint16_t)0x0000) |
bogdanm | 0:9b334a45a8ff | 64 | #define DEVICE_CODE1_ADDR ((uint16_t)0x0001) |
bogdanm | 0:9b334a45a8ff | 65 | #define DEVICE_CODE2_ADDR ((uint16_t)0x000E) |
bogdanm | 0:9b334a45a8ff | 66 | #define DEVICE_CODE3_ADDR ((uint16_t)0x000F) |
bogdanm | 0:9b334a45a8ff | 67 | |
bogdanm | 0:9b334a45a8ff | 68 | /* NOR CFI IDs addresses */ |
bogdanm | 0:9b334a45a8ff | 69 | #define CFI1_ADDRESS ((uint16_t)0x10) |
bogdanm | 0:9b334a45a8ff | 70 | #define CFI2_ADDRESS ((uint16_t)0x11) |
bogdanm | 0:9b334a45a8ff | 71 | #define CFI3_ADDRESS ((uint16_t)0x12) |
bogdanm | 0:9b334a45a8ff | 72 | #define CFI4_ADDRESS ((uint16_t)0x13) |
bogdanm | 0:9b334a45a8ff | 73 | |
bogdanm | 0:9b334a45a8ff | 74 | /* NOR operation wait timeout */ |
bogdanm | 0:9b334a45a8ff | 75 | #define NOR_TMEOUT ((uint16_t)0xFFFF) |
bogdanm | 0:9b334a45a8ff | 76 | |
bogdanm | 0:9b334a45a8ff | 77 | /* NOR memory data width */ |
bogdanm | 0:9b334a45a8ff | 78 | #define NOR_MEMORY_8B ((uint8_t)0x0) |
bogdanm | 0:9b334a45a8ff | 79 | #define NOR_MEMORY_16B ((uint8_t)0x1) |
bogdanm | 0:9b334a45a8ff | 80 | |
bogdanm | 0:9b334a45a8ff | 81 | /* NOR memory device read/write start address */ |
bogdanm | 0:9b334a45a8ff | 82 | #define NOR_MEMORY_ADRESS1 FSMC_BANK1_1 |
bogdanm | 0:9b334a45a8ff | 83 | #define NOR_MEMORY_ADRESS2 FSMC_BANK1_2 |
bogdanm | 0:9b334a45a8ff | 84 | #define NOR_MEMORY_ADRESS3 FSMC_BANK1_3 |
bogdanm | 0:9b334a45a8ff | 85 | #define NOR_MEMORY_ADRESS4 FSMC_BANK1_4 |
bogdanm | 0:9b334a45a8ff | 86 | |
bogdanm | 0:9b334a45a8ff | 87 | /** |
bogdanm | 0:9b334a45a8ff | 88 | * @} |
bogdanm | 0:9b334a45a8ff | 89 | */ |
bogdanm | 0:9b334a45a8ff | 90 | |
bogdanm | 0:9b334a45a8ff | 91 | /** @addtogroup NOR_Private_Macros |
bogdanm | 0:9b334a45a8ff | 92 | * @{ |
bogdanm | 0:9b334a45a8ff | 93 | */ |
bogdanm | 0:9b334a45a8ff | 94 | |
bogdanm | 0:9b334a45a8ff | 95 | /** |
bogdanm | 0:9b334a45a8ff | 96 | * @brief NOR memory address shifting. |
bogdanm | 0:9b334a45a8ff | 97 | * @param __NOR_ADDRESS: NOR base address |
bogdanm | 0:9b334a45a8ff | 98 | * @param __NOR_MEMORY_WIDTH_: NOR memory width |
bogdanm | 0:9b334a45a8ff | 99 | * @param __ADDRESS__: NOR memory address |
bogdanm | 0:9b334a45a8ff | 100 | * @retval NOR shifted address value |
bogdanm | 0:9b334a45a8ff | 101 | */ |
mbed_official | 124:6a4a5b7d7324 | 102 | #define NOR_ADDR_SHIFT(__NOR_ADDRESS, __NOR_MEMORY_WIDTH_, __ADDRESS__) \ |
bogdanm | 0:9b334a45a8ff | 103 | ((uint32_t)(((__NOR_MEMORY_WIDTH_) == NOR_MEMORY_16B)? \ |
bogdanm | 0:9b334a45a8ff | 104 | ((uint32_t)((__NOR_ADDRESS) + (2 * (__ADDRESS__)))): \ |
bogdanm | 0:9b334a45a8ff | 105 | ((uint32_t)((__NOR_ADDRESS) + (__ADDRESS__))))) |
bogdanm | 0:9b334a45a8ff | 106 | |
bogdanm | 0:9b334a45a8ff | 107 | /** |
bogdanm | 0:9b334a45a8ff | 108 | * @brief NOR memory write data to specified address. |
bogdanm | 0:9b334a45a8ff | 109 | * @param __ADDRESS__: NOR memory address |
bogdanm | 0:9b334a45a8ff | 110 | * @param __DATA__: Data to write |
bogdanm | 0:9b334a45a8ff | 111 | * @retval None |
bogdanm | 0:9b334a45a8ff | 112 | */ |
mbed_official | 124:6a4a5b7d7324 | 113 | #define NOR_WRITE(__ADDRESS__, __DATA__) (*(__IO uint16_t *)((uint32_t)(__ADDRESS__)) = (__DATA__)) |
bogdanm | 0:9b334a45a8ff | 114 | |
bogdanm | 0:9b334a45a8ff | 115 | /** |
bogdanm | 0:9b334a45a8ff | 116 | * @} |
bogdanm | 0:9b334a45a8ff | 117 | */ |
bogdanm | 0:9b334a45a8ff | 118 | |
bogdanm | 0:9b334a45a8ff | 119 | /* Exported typedef ----------------------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 120 | /** @defgroup NOR_Exported_Types NOR Exported Types |
bogdanm | 0:9b334a45a8ff | 121 | * @{ |
bogdanm | 0:9b334a45a8ff | 122 | */ |
bogdanm | 0:9b334a45a8ff | 123 | |
bogdanm | 0:9b334a45a8ff | 124 | /** |
bogdanm | 0:9b334a45a8ff | 125 | * @brief HAL SRAM State structures definition |
bogdanm | 0:9b334a45a8ff | 126 | */ |
bogdanm | 0:9b334a45a8ff | 127 | typedef enum |
bogdanm | 0:9b334a45a8ff | 128 | { |
bogdanm | 0:9b334a45a8ff | 129 | HAL_NOR_STATE_RESET = 0x00, /*!< NOR not yet initialized or disabled */ |
bogdanm | 0:9b334a45a8ff | 130 | HAL_NOR_STATE_READY = 0x01, /*!< NOR initialized and ready for use */ |
bogdanm | 0:9b334a45a8ff | 131 | HAL_NOR_STATE_BUSY = 0x02, /*!< NOR internal processing is ongoing */ |
bogdanm | 0:9b334a45a8ff | 132 | HAL_NOR_STATE_ERROR = 0x03, /*!< NOR error state */ |
bogdanm | 0:9b334a45a8ff | 133 | HAL_NOR_STATE_PROTECTED = 0x04 /*!< NOR NORSRAM device write protected */ |
bogdanm | 0:9b334a45a8ff | 134 | }HAL_NOR_StateTypeDef; |
bogdanm | 0:9b334a45a8ff | 135 | |
bogdanm | 0:9b334a45a8ff | 136 | /** |
bogdanm | 0:9b334a45a8ff | 137 | * @brief FSMC NOR Status typedef |
bogdanm | 0:9b334a45a8ff | 138 | */ |
bogdanm | 0:9b334a45a8ff | 139 | typedef enum |
bogdanm | 0:9b334a45a8ff | 140 | { |
bogdanm | 0:9b334a45a8ff | 141 | HAL_NOR_STATUS_SUCCESS = 0, |
bogdanm | 0:9b334a45a8ff | 142 | HAL_NOR_STATUS_ONGOING, |
bogdanm | 0:9b334a45a8ff | 143 | HAL_NOR_STATUS_ERROR, |
bogdanm | 0:9b334a45a8ff | 144 | HAL_NOR_STATUS_TIMEOUT |
bogdanm | 0:9b334a45a8ff | 145 | }HAL_NOR_StatusTypeDef; |
bogdanm | 0:9b334a45a8ff | 146 | |
bogdanm | 0:9b334a45a8ff | 147 | /** |
bogdanm | 0:9b334a45a8ff | 148 | * @brief FSMC NOR ID typedef |
bogdanm | 0:9b334a45a8ff | 149 | */ |
bogdanm | 0:9b334a45a8ff | 150 | typedef struct |
bogdanm | 0:9b334a45a8ff | 151 | { |
bogdanm | 0:9b334a45a8ff | 152 | uint16_t Manufacturer_Code; /*!< Defines the device's manufacturer code used to identify the memory */ |
bogdanm | 0:9b334a45a8ff | 153 | |
bogdanm | 0:9b334a45a8ff | 154 | uint16_t Device_Code1; |
bogdanm | 0:9b334a45a8ff | 155 | |
bogdanm | 0:9b334a45a8ff | 156 | uint16_t Device_Code2; |
bogdanm | 0:9b334a45a8ff | 157 | |
bogdanm | 0:9b334a45a8ff | 158 | uint16_t Device_Code3; /*!< Defines the device's codes used to identify the memory. |
bogdanm | 0:9b334a45a8ff | 159 | These codes can be accessed by performing read operations with specific |
bogdanm | 0:9b334a45a8ff | 160 | control signals and addresses set.They can also be accessed by issuing |
bogdanm | 0:9b334a45a8ff | 161 | an Auto Select command */ |
bogdanm | 0:9b334a45a8ff | 162 | }NOR_IDTypeDef; |
bogdanm | 0:9b334a45a8ff | 163 | |
bogdanm | 0:9b334a45a8ff | 164 | /** |
bogdanm | 0:9b334a45a8ff | 165 | * @brief FSMC NOR CFI typedef |
bogdanm | 0:9b334a45a8ff | 166 | */ |
bogdanm | 0:9b334a45a8ff | 167 | typedef struct |
bogdanm | 0:9b334a45a8ff | 168 | { |
bogdanm | 0:9b334a45a8ff | 169 | /*!< Defines the information stored in the memory's Common flash interface |
bogdanm | 0:9b334a45a8ff | 170 | which contains a description of various electrical and timing parameters, |
bogdanm | 0:9b334a45a8ff | 171 | density information and functions supported by the memory */ |
bogdanm | 0:9b334a45a8ff | 172 | |
bogdanm | 0:9b334a45a8ff | 173 | uint16_t CFI_1; |
bogdanm | 0:9b334a45a8ff | 174 | |
bogdanm | 0:9b334a45a8ff | 175 | uint16_t CFI_2; |
bogdanm | 0:9b334a45a8ff | 176 | |
bogdanm | 0:9b334a45a8ff | 177 | uint16_t CFI_3; |
bogdanm | 0:9b334a45a8ff | 178 | |
bogdanm | 0:9b334a45a8ff | 179 | uint16_t CFI_4; |
bogdanm | 0:9b334a45a8ff | 180 | }NOR_CFITypeDef; |
bogdanm | 0:9b334a45a8ff | 181 | |
bogdanm | 0:9b334a45a8ff | 182 | /** |
bogdanm | 0:9b334a45a8ff | 183 | * @brief NOR handle Structure definition |
bogdanm | 0:9b334a45a8ff | 184 | */ |
bogdanm | 0:9b334a45a8ff | 185 | typedef struct |
bogdanm | 0:9b334a45a8ff | 186 | { |
bogdanm | 0:9b334a45a8ff | 187 | FSMC_NORSRAM_TypeDef *Instance; /*!< Register base address */ |
bogdanm | 0:9b334a45a8ff | 188 | |
bogdanm | 0:9b334a45a8ff | 189 | FSMC_NORSRAM_EXTENDED_TypeDef *Extended; /*!< Extended mode register base address */ |
bogdanm | 0:9b334a45a8ff | 190 | |
bogdanm | 0:9b334a45a8ff | 191 | FSMC_NORSRAM_InitTypeDef Init; /*!< NOR device control configuration parameters */ |
bogdanm | 0:9b334a45a8ff | 192 | |
bogdanm | 0:9b334a45a8ff | 193 | HAL_LockTypeDef Lock; /*!< NOR locking object */ |
bogdanm | 0:9b334a45a8ff | 194 | |
bogdanm | 0:9b334a45a8ff | 195 | __IO HAL_NOR_StateTypeDef State; /*!< NOR device access state */ |
bogdanm | 0:9b334a45a8ff | 196 | |
bogdanm | 0:9b334a45a8ff | 197 | }NOR_HandleTypeDef; |
bogdanm | 0:9b334a45a8ff | 198 | |
bogdanm | 0:9b334a45a8ff | 199 | /** |
bogdanm | 0:9b334a45a8ff | 200 | * @} |
bogdanm | 0:9b334a45a8ff | 201 | */ |
bogdanm | 0:9b334a45a8ff | 202 | |
bogdanm | 0:9b334a45a8ff | 203 | /* Exported constants --------------------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 204 | /* Exported macro ------------------------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 205 | |
bogdanm | 0:9b334a45a8ff | 206 | /** @defgroup NOR_Exported_macro NOR Exported Macros |
bogdanm | 0:9b334a45a8ff | 207 | * @{ |
bogdanm | 0:9b334a45a8ff | 208 | */ |
bogdanm | 0:9b334a45a8ff | 209 | |
bogdanm | 0:9b334a45a8ff | 210 | /** @brief Reset NOR handle state |
bogdanm | 0:9b334a45a8ff | 211 | * @param __HANDLE__: NOR handle |
bogdanm | 0:9b334a45a8ff | 212 | * @retval None |
bogdanm | 0:9b334a45a8ff | 213 | */ |
bogdanm | 0:9b334a45a8ff | 214 | #define __HAL_NOR_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_NOR_STATE_RESET) |
bogdanm | 0:9b334a45a8ff | 215 | |
bogdanm | 0:9b334a45a8ff | 216 | /** |
bogdanm | 0:9b334a45a8ff | 217 | * @} |
bogdanm | 0:9b334a45a8ff | 218 | */ |
bogdanm | 0:9b334a45a8ff | 219 | |
bogdanm | 0:9b334a45a8ff | 220 | /* Exported functions --------------------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 221 | /** @addtogroup NOR_Exported_Functions NOR Exported Functions |
bogdanm | 0:9b334a45a8ff | 222 | * @{ |
bogdanm | 0:9b334a45a8ff | 223 | */ |
bogdanm | 0:9b334a45a8ff | 224 | |
bogdanm | 0:9b334a45a8ff | 225 | /** @addtogroup NOR_Exported_Functions_Group1 |
bogdanm | 0:9b334a45a8ff | 226 | * @{ |
bogdanm | 0:9b334a45a8ff | 227 | */ |
bogdanm | 0:9b334a45a8ff | 228 | |
bogdanm | 0:9b334a45a8ff | 229 | /* Initialization/de-initialization functions **********************************/ |
bogdanm | 0:9b334a45a8ff | 230 | HAL_StatusTypeDef HAL_NOR_Init(NOR_HandleTypeDef *hnor, FSMC_NORSRAM_TimingTypeDef *Timing, FSMC_NORSRAM_TimingTypeDef *ExtTiming); |
bogdanm | 0:9b334a45a8ff | 231 | HAL_StatusTypeDef HAL_NOR_DeInit(NOR_HandleTypeDef *hnor); |
bogdanm | 0:9b334a45a8ff | 232 | void HAL_NOR_MspInit(NOR_HandleTypeDef *hnor); |
bogdanm | 0:9b334a45a8ff | 233 | void HAL_NOR_MspDeInit(NOR_HandleTypeDef *hnor); |
bogdanm | 0:9b334a45a8ff | 234 | void HAL_NOR_MspWait(NOR_HandleTypeDef *hnor, uint32_t Timeout); |
bogdanm | 0:9b334a45a8ff | 235 | |
bogdanm | 0:9b334a45a8ff | 236 | /** |
bogdanm | 0:9b334a45a8ff | 237 | * @} |
bogdanm | 0:9b334a45a8ff | 238 | */ |
bogdanm | 0:9b334a45a8ff | 239 | |
bogdanm | 0:9b334a45a8ff | 240 | /** @addtogroup NOR_Exported_Functions_Group2 |
bogdanm | 0:9b334a45a8ff | 241 | * @{ |
bogdanm | 0:9b334a45a8ff | 242 | */ |
bogdanm | 0:9b334a45a8ff | 243 | |
bogdanm | 0:9b334a45a8ff | 244 | /* I/O operation functions ***************************************************/ |
bogdanm | 0:9b334a45a8ff | 245 | HAL_StatusTypeDef HAL_NOR_Read_ID(NOR_HandleTypeDef *hnor, NOR_IDTypeDef *pNOR_ID); |
bogdanm | 0:9b334a45a8ff | 246 | HAL_StatusTypeDef HAL_NOR_ReturnToReadMode(NOR_HandleTypeDef *hnor); |
bogdanm | 0:9b334a45a8ff | 247 | HAL_StatusTypeDef HAL_NOR_Read(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData); |
bogdanm | 0:9b334a45a8ff | 248 | HAL_StatusTypeDef HAL_NOR_Program(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData); |
bogdanm | 0:9b334a45a8ff | 249 | |
bogdanm | 0:9b334a45a8ff | 250 | HAL_StatusTypeDef HAL_NOR_ReadBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddress, uint16_t *pData, uint32_t uwBufferSize); |
bogdanm | 0:9b334a45a8ff | 251 | HAL_StatusTypeDef HAL_NOR_ProgramBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddress, uint16_t *pData, uint32_t uwBufferSize); |
bogdanm | 0:9b334a45a8ff | 252 | |
bogdanm | 0:9b334a45a8ff | 253 | HAL_StatusTypeDef HAL_NOR_Erase_Block(NOR_HandleTypeDef *hnor, uint32_t BlockAddress, uint32_t Address); |
bogdanm | 0:9b334a45a8ff | 254 | HAL_StatusTypeDef HAL_NOR_Erase_Chip(NOR_HandleTypeDef *hnor, uint32_t Address); |
bogdanm | 0:9b334a45a8ff | 255 | HAL_StatusTypeDef HAL_NOR_Read_CFI(NOR_HandleTypeDef *hnor, NOR_CFITypeDef *pNOR_CFI); |
bogdanm | 0:9b334a45a8ff | 256 | |
bogdanm | 0:9b334a45a8ff | 257 | /** |
bogdanm | 0:9b334a45a8ff | 258 | * @} |
bogdanm | 0:9b334a45a8ff | 259 | */ |
bogdanm | 0:9b334a45a8ff | 260 | |
bogdanm | 0:9b334a45a8ff | 261 | /** @addtogroup NOR_Exported_Functions_Group3 |
bogdanm | 0:9b334a45a8ff | 262 | * @{ |
bogdanm | 0:9b334a45a8ff | 263 | */ |
bogdanm | 0:9b334a45a8ff | 264 | |
bogdanm | 0:9b334a45a8ff | 265 | /* NOR Control functions *****************************************************/ |
bogdanm | 0:9b334a45a8ff | 266 | HAL_StatusTypeDef HAL_NOR_WriteOperation_Enable(NOR_HandleTypeDef *hnor); |
bogdanm | 0:9b334a45a8ff | 267 | HAL_StatusTypeDef HAL_NOR_WriteOperation_Disable(NOR_HandleTypeDef *hnor); |
bogdanm | 0:9b334a45a8ff | 268 | |
bogdanm | 0:9b334a45a8ff | 269 | /** |
bogdanm | 0:9b334a45a8ff | 270 | * @} |
bogdanm | 0:9b334a45a8ff | 271 | */ |
bogdanm | 0:9b334a45a8ff | 272 | |
bogdanm | 0:9b334a45a8ff | 273 | /** @addtogroup NOR_Exported_Functions_Group4 |
bogdanm | 0:9b334a45a8ff | 274 | * @{ |
bogdanm | 0:9b334a45a8ff | 275 | */ |
bogdanm | 0:9b334a45a8ff | 276 | |
bogdanm | 0:9b334a45a8ff | 277 | /* NOR State functions ********************************************************/ |
bogdanm | 0:9b334a45a8ff | 278 | HAL_NOR_StateTypeDef HAL_NOR_GetState(NOR_HandleTypeDef *hnor); |
bogdanm | 0:9b334a45a8ff | 279 | HAL_NOR_StatusTypeDef HAL_NOR_GetStatus(NOR_HandleTypeDef *hnor, uint32_t Address, uint32_t Timeout); |
bogdanm | 0:9b334a45a8ff | 280 | |
bogdanm | 0:9b334a45a8ff | 281 | /** |
bogdanm | 0:9b334a45a8ff | 282 | * @} |
bogdanm | 0:9b334a45a8ff | 283 | */ |
bogdanm | 0:9b334a45a8ff | 284 | |
bogdanm | 0:9b334a45a8ff | 285 | /** |
bogdanm | 0:9b334a45a8ff | 286 | * @} |
bogdanm | 0:9b334a45a8ff | 287 | */ |
bogdanm | 0:9b334a45a8ff | 288 | |
bogdanm | 0:9b334a45a8ff | 289 | |
bogdanm | 0:9b334a45a8ff | 290 | /** |
bogdanm | 0:9b334a45a8ff | 291 | * @} |
bogdanm | 0:9b334a45a8ff | 292 | */ |
bogdanm | 0:9b334a45a8ff | 293 | |
bogdanm | 0:9b334a45a8ff | 294 | #endif /* STM32F101xE || STM32F103xE || STM32F101xG || STM32F103xG || STM32F100xE */ |
bogdanm | 0:9b334a45a8ff | 295 | |
bogdanm | 0:9b334a45a8ff | 296 | /** |
bogdanm | 0:9b334a45a8ff | 297 | * @} |
bogdanm | 0:9b334a45a8ff | 298 | */ |
bogdanm | 0:9b334a45a8ff | 299 | |
bogdanm | 0:9b334a45a8ff | 300 | #ifdef __cplusplus |
bogdanm | 0:9b334a45a8ff | 301 | } |
bogdanm | 0:9b334a45a8ff | 302 | #endif |
bogdanm | 0:9b334a45a8ff | 303 | |
bogdanm | 0:9b334a45a8ff | 304 | #endif /* __STM32F1xx_HAL_NOR_H */ |
bogdanm | 0:9b334a45a8ff | 305 | |
bogdanm | 0:9b334a45a8ff | 306 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |