en 129 / mbed-dev

fix LPC812 PWM

Dependents:   IR_LED_Send

Fork of mbed-dev by mbed official

targets/cmsis/TARGET_STM/TARGET_STM32L4/stm32l4xx_hal_swpmi.c@129:2e517c56bcfb, 2016-05-16 (annotated)

Committer:
nameless129
Date:
Mon May 16 16:50:30 2016 +0000
Revision:
129:2e517c56bcfb
Parent:
0:9b334a45a8ff 
PWM Fix:Duty 0%??H???????????????

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /**
bogdanm 0:9b334a45a8ff 2 ******************************************************************************
bogdanm 0:9b334a45a8ff 3 * @file stm32l4xx_hal_swpmi.c
bogdanm 0:9b334a45a8ff 4 * @author MCD Application Team
bogdanm 0:9b334a45a8ff 5 * @version V1.0.0
bogdanm 0:9b334a45a8ff 6 * @date 26-June-2015
bogdanm 0:9b334a45a8ff 7 * @brief SWPMI HAL module driver.
bogdanm 0:9b334a45a8ff 8 * This file provides firmware functions to manage the following
bogdanm 0:9b334a45a8ff 9 * functionalities of the Single Wire Protocol Master Interface (SWPMI).
bogdanm 0:9b334a45a8ff 10 * + Initialization and Configuration
bogdanm 0:9b334a45a8ff 11 * + Data transfers functions
bogdanm 0:9b334a45a8ff 12 * + DMA transfers management
bogdanm 0:9b334a45a8ff 13 * + Interrupts and flags management
bogdanm 0:9b334a45a8ff 14 @verbatim
bogdanm 0:9b334a45a8ff 15 ===============================================================================
bogdanm 0:9b334a45a8ff 16 ##### How to use this driver #####
bogdanm 0:9b334a45a8ff 17 ===============================================================================
bogdanm 0:9b334a45a8ff 18 [..]
bogdanm 0:9b334a45a8ff 19 The SWPMI HAL driver can be used as follows:
bogdanm 0:9b334a45a8ff 20
bogdanm 0:9b334a45a8ff 21 (#) Declare a SWPMI_HandleTypeDef handle structure (eg. SWPMI_HandleTypeDef hswpmi).
bogdanm 0:9b334a45a8ff 22
bogdanm 0:9b334a45a8ff 23 (#) Initialize the SWPMI low level resources by implementing the HAL_SWPMI_MspInit() API:
bogdanm 0:9b334a45a8ff 24 (##) Enable the SWPMIx interface clock with __HAL_RCC_SWPMIx_CLK_ENABLE().
bogdanm 0:9b334a45a8ff 25 (##) SWPMI IO configuration:
bogdanm 0:9b334a45a8ff 26 (+++) Enable the clock for the SWPMI GPIO.
bogdanm 0:9b334a45a8ff 27 (+++) Configure these SWPMI pins as alternate function pull-up.
bogdanm 0:9b334a45a8ff 28 (##) NVIC configuration if you need to use interrupt process (HAL_SWPMI_Transmit_IT()
bogdanm 0:9b334a45a8ff 29 and HAL_SWPMI_Receive_IT() APIs):
bogdanm 0:9b334a45a8ff 30 (+++) Configure the SWPMIx interrupt priority with HAL_NVIC_SetPriority().
bogdanm 0:9b334a45a8ff 31 (+++) Enable the NVIC SWPMI IRQ handle with HAL_NVIC_EnableIRQ().
bogdanm 0:9b334a45a8ff 32
bogdanm 0:9b334a45a8ff 33 (##) DMA Configuration if you need to use DMA process (HAL_SWPMI_Transmit_DMA()
bogdanm 0:9b334a45a8ff 34 and HAL_SWPMI_Receive_DMA() APIs):
bogdanm 0:9b334a45a8ff 35 (+++) Declare a DMA handle structure for the Tx/Rx channels.
bogdanm 0:9b334a45a8ff 36 (+++) Enable the DMAx interface clock.
bogdanm 0:9b334a45a8ff 37 (+++) Configure the declared DMA handle structure with the required
bogdanm 0:9b334a45a8ff 38 Tx/Rx parameters.
bogdanm 0:9b334a45a8ff 39 (+++) Configure the DMA Tx/Rx channels and requests.
bogdanm 0:9b334a45a8ff 40 (+++) Associate the initialized DMA handle to the SWPMI DMA Tx/Rx handle.
bogdanm 0:9b334a45a8ff 41 (+++) Configure the priority and enable the NVIC for the transfer complete
bogdanm 0:9b334a45a8ff 42 interrupt on the DMA Tx/Rx channels.
bogdanm 0:9b334a45a8ff 43
bogdanm 0:9b334a45a8ff 44 (#) Program the Bite Rate, Tx Buffering mode, Rx Buffering mode in the Init structure.
bogdanm 0:9b334a45a8ff 45
bogdanm 0:9b334a45a8ff 46 (#) Enable the SWPMI peripheral by calling the HAL_SWPMI_Init() function.
bogdanm 0:9b334a45a8ff 47
bogdanm 0:9b334a45a8ff 48 @endverbatim
bogdanm 0:9b334a45a8ff 49 ******************************************************************************
bogdanm 0:9b334a45a8ff 50 * @attention
bogdanm 0:9b334a45a8ff 51 *
bogdanm 0:9b334a45a8ff 52 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
bogdanm 0:9b334a45a8ff 53 *
bogdanm 0:9b334a45a8ff 54 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 0:9b334a45a8ff 55 * are permitted provided that the following conditions are met:
bogdanm 0:9b334a45a8ff 56 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 0:9b334a45a8ff 57 * this list of conditions and the following disclaimer.
bogdanm 0:9b334a45a8ff 58 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 0:9b334a45a8ff 59 * this list of conditions and the following disclaimer in the documentation
bogdanm 0:9b334a45a8ff 60 * and/or other materials provided with the distribution.
bogdanm 0:9b334a45a8ff 61 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 0:9b334a45a8ff 62 * may be used to endorse or promote products derived from this software
bogdanm 0:9b334a45a8ff 63 * without specific prior written permission.
bogdanm 0:9b334a45a8ff 64 *
bogdanm 0:9b334a45a8ff 65 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 0:9b334a45a8ff 66 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 0:9b334a45a8ff 67 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 0:9b334a45a8ff 68 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 0:9b334a45a8ff 69 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 0:9b334a45a8ff 70 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 0:9b334a45a8ff 71 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 0:9b334a45a8ff 72 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 0:9b334a45a8ff 73 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 0:9b334a45a8ff 74 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 0:9b334a45a8ff 75 *
bogdanm 0:9b334a45a8ff 76 ******************************************************************************
bogdanm 0:9b334a45a8ff 77 */
bogdanm 0:9b334a45a8ff 78
bogdanm 0:9b334a45a8ff 79 /* Includes ------------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 80 #include "stm32l4xx_hal.h"
bogdanm 0:9b334a45a8ff 81
bogdanm 0:9b334a45a8ff 82 /** @addtogroup STM32L4xx_HAL_Driver
bogdanm 0:9b334a45a8ff 83 * @{
bogdanm 0:9b334a45a8ff 84 */
bogdanm 0:9b334a45a8ff 85
bogdanm 0:9b334a45a8ff 86 /** @defgroup SWPMI SWPMI
bogdanm 0:9b334a45a8ff 87 * @brief HAL SWPMI module driver
bogdanm 0:9b334a45a8ff 88 * @{
bogdanm 0:9b334a45a8ff 89 */
bogdanm 0:9b334a45a8ff 90 #ifdef HAL_SWPMI_MODULE_ENABLED
bogdanm 0:9b334a45a8ff 91
bogdanm 0:9b334a45a8ff 92 /* Private typedef -----------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 93 /* Private define ------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 94 /* Private constants ---------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 95 /** @addtogroup SWPMI_Private_Constants SWPMI Private Constants
bogdanm 0:9b334a45a8ff 96 * @{
bogdanm 0:9b334a45a8ff 97 */
bogdanm 0:9b334a45a8ff 98 #define SWPMI_TIMEOUT_VALUE ((uint32_t) 22000)
bogdanm 0:9b334a45a8ff 99
bogdanm 0:9b334a45a8ff 100 /**
bogdanm 0:9b334a45a8ff 101 * @}
bogdanm 0:9b334a45a8ff 102 */
bogdanm 0:9b334a45a8ff 103
bogdanm 0:9b334a45a8ff 104 /* Private macros ------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 105 /* Private variables ---------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 106 /* Private function prototypes -----------------------------------------------*/
bogdanm 0:9b334a45a8ff 107 static void SWPMI_DMATransmitCplt(DMA_HandleTypeDef *hdma);
bogdanm 0:9b334a45a8ff 108 static void SWPMI_DMATxHalfCplt(DMA_HandleTypeDef *hdma);
bogdanm 0:9b334a45a8ff 109 static void SWPMI_DMAReceiveCplt(DMA_HandleTypeDef *hdma);
bogdanm 0:9b334a45a8ff 110 static void SWPMI_DMARxHalfCplt(DMA_HandleTypeDef *hdma);
bogdanm 0:9b334a45a8ff 111 static void SWPMI_DMAError(DMA_HandleTypeDef *hdma);
bogdanm 0:9b334a45a8ff 112 static HAL_StatusTypeDef SWPMI_Transmit_IT(SWPMI_HandleTypeDef *hswpmi);
bogdanm 0:9b334a45a8ff 113 static HAL_StatusTypeDef SWPMI_EndTransmit_IT(SWPMI_HandleTypeDef *hswpmi);
bogdanm 0:9b334a45a8ff 114 static HAL_StatusTypeDef SWPMI_Receive_IT(SWPMI_HandleTypeDef *hswpmi);
bogdanm 0:9b334a45a8ff 115 static HAL_StatusTypeDef SWPMI_EndReceive_IT(SWPMI_HandleTypeDef *hswpmi);
bogdanm 0:9b334a45a8ff 116 static HAL_StatusTypeDef SWPMI_EndTransmitReceive_IT(SWPMI_HandleTypeDef *hswpmi);
bogdanm 0:9b334a45a8ff 117 static HAL_StatusTypeDef SWPMI_WaitOnFlagSetUntilTimeout(SWPMI_HandleTypeDef *hswpmi, uint32_t Flag, uint32_t Timeout);
bogdanm 0:9b334a45a8ff 118
bogdanm 0:9b334a45a8ff 119 /* Exported functions --------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 120
bogdanm 0:9b334a45a8ff 121 /** @defgroup SWPMI_Exported_Functions SWPMI Exported Functions
bogdanm 0:9b334a45a8ff 122 * @{
bogdanm 0:9b334a45a8ff 123 */
bogdanm 0:9b334a45a8ff 124
bogdanm 0:9b334a45a8ff 125 /** @defgroup SWPMI_Exported_Group1 Initialization/de-initialization methods
bogdanm 0:9b334a45a8ff 126 * @brief Initialization and Configuration functions
bogdanm 0:9b334a45a8ff 127 *
bogdanm 0:9b334a45a8ff 128 @verbatim
bogdanm 0:9b334a45a8ff 129 ===============================================================================
bogdanm 0:9b334a45a8ff 130 ##### Initialization and Configuration functions #####
bogdanm 0:9b334a45a8ff 131 ===============================================================================
bogdanm 0:9b334a45a8ff 132 [..] This section provides functions allowing to:
bogdanm 0:9b334a45a8ff 133 (+) Initialize and configure the SWPMI peripheral.
bogdanm 0:9b334a45a8ff 134 (+) De-initialize the SWPMI peripheral.
bogdanm 0:9b334a45a8ff 135
bogdanm 0:9b334a45a8ff 136 @endverbatim
bogdanm 0:9b334a45a8ff 137 * @{
bogdanm 0:9b334a45a8ff 138 */
bogdanm 0:9b334a45a8ff 139
bogdanm 0:9b334a45a8ff 140 /**
bogdanm 0:9b334a45a8ff 141 * @brief Initialize the SWPMI peripheral according to the specified parameters in the SWPMI_InitTypeDef.
bogdanm 0:9b334a45a8ff 142 * @param hswpmi: SWPMI handle
bogdanm 0:9b334a45a8ff 143 * @retval HAL status
bogdanm 0:9b334a45a8ff 144 */
bogdanm 0:9b334a45a8ff 145 HAL_StatusTypeDef HAL_SWPMI_Init(SWPMI_HandleTypeDef *hswpmi)
bogdanm 0:9b334a45a8ff 146 {
bogdanm 0:9b334a45a8ff 147 HAL_StatusTypeDef status = HAL_OK;
bogdanm 0:9b334a45a8ff 148
bogdanm 0:9b334a45a8ff 149 /* Check the SWPMI handle allocation */
bogdanm 0:9b334a45a8ff 150 if(hswpmi == NULL)
bogdanm 0:9b334a45a8ff 151 {
bogdanm 0:9b334a45a8ff 152 status = HAL_ERROR;
bogdanm 0:9b334a45a8ff 153 }
bogdanm 0:9b334a45a8ff 154 else
bogdanm 0:9b334a45a8ff 155 {
bogdanm 0:9b334a45a8ff 156 /* Check the parameters */
bogdanm 0:9b334a45a8ff 157 assert_param(IS_SWPMI_VOLTAGE_CLASS(hswpmi->Init.VoltageClass));
bogdanm 0:9b334a45a8ff 158 assert_param(IS_SWPMI_BITRATE_VALUE(hswpmi->Init.BitRate));
bogdanm 0:9b334a45a8ff 159 assert_param(IS_SWPMI_TX_BUFFERING_MODE(hswpmi->Init.TxBufferingMode));
bogdanm 0:9b334a45a8ff 160 assert_param(IS_SWPMI_RX_BUFFERING_MODE(hswpmi->Init.RxBufferingMode));
bogdanm 0:9b334a45a8ff 161
bogdanm 0:9b334a45a8ff 162 if(hswpmi->State == HAL_SWPMI_STATE_RESET)
bogdanm 0:9b334a45a8ff 163 {
bogdanm 0:9b334a45a8ff 164 /* Allocate lock resource and initialize it */
bogdanm 0:9b334a45a8ff 165 hswpmi->Lock = HAL_UNLOCKED;
bogdanm 0:9b334a45a8ff 166
bogdanm 0:9b334a45a8ff 167 /* Init the low level hardware : GPIO, CLOCK, CORTEX */
bogdanm 0:9b334a45a8ff 168 HAL_SWPMI_MspInit(hswpmi);
bogdanm 0:9b334a45a8ff 169 }
bogdanm 0:9b334a45a8ff 170
bogdanm 0:9b334a45a8ff 171 hswpmi->State = HAL_SWPMI_STATE_BUSY;
bogdanm 0:9b334a45a8ff 172
bogdanm 0:9b334a45a8ff 173 /* Disable SWPMI interface */
bogdanm 0:9b334a45a8ff 174 CLEAR_BIT(hswpmi->Instance->CR, SWPMI_CR_SWPACT);
bogdanm 0:9b334a45a8ff 175
bogdanm 0:9b334a45a8ff 176 /* Clear all SWPMI interface flags */
bogdanm 0:9b334a45a8ff 177 WRITE_REG(hswpmi->Instance->ICR, 0x019F);
bogdanm 0:9b334a45a8ff 178
bogdanm 0:9b334a45a8ff 179 /* Apply Voltage class selection */
bogdanm 0:9b334a45a8ff 180 MODIFY_REG(hswpmi->Instance->OR, SWPMI_OR_CLASS, hswpmi->Init.VoltageClass);
bogdanm 0:9b334a45a8ff 181
bogdanm 0:9b334a45a8ff 182 /* Configure the BRR register (Bitrate) */
bogdanm 0:9b334a45a8ff 183 WRITE_REG(hswpmi->Instance->BRR, hswpmi->Init.BitRate);
bogdanm 0:9b334a45a8ff 184
bogdanm 0:9b334a45a8ff 185 /* Apply SWPMI CR configuration */
bogdanm 0:9b334a45a8ff 186 MODIFY_REG(hswpmi->Instance->CR, \
bogdanm 0:9b334a45a8ff 187 SWPMI_CR_RXDMA | SWPMI_CR_TXDMA | SWPMI_CR_RXMODE | SWPMI_CR_TXMODE, \
bogdanm 0:9b334a45a8ff 188 hswpmi->Init.TxBufferingMode | hswpmi->Init.RxBufferingMode);
bogdanm 0:9b334a45a8ff 189
bogdanm 0:9b334a45a8ff 190 hswpmi->ErrorCode = HAL_SWPMI_ERROR_NONE;
bogdanm 0:9b334a45a8ff 191 hswpmi->State = HAL_SWPMI_STATE_READY;
bogdanm 0:9b334a45a8ff 192
bogdanm 0:9b334a45a8ff 193 /* Enable SWPMI peripheral if not */
bogdanm 0:9b334a45a8ff 194 SET_BIT(hswpmi->Instance->CR, SWPMI_CR_SWPACT);
bogdanm 0:9b334a45a8ff 195 }
bogdanm 0:9b334a45a8ff 196
bogdanm 0:9b334a45a8ff 197 return status;
bogdanm 0:9b334a45a8ff 198 }
bogdanm 0:9b334a45a8ff 199
bogdanm 0:9b334a45a8ff 200 /**
bogdanm 0:9b334a45a8ff 201 * @brief De-initialize the SWPMI peripheral.
bogdanm 0:9b334a45a8ff 202 * @param hswpmi: SWPMI handle
bogdanm 0:9b334a45a8ff 203 * @retval HAL status
bogdanm 0:9b334a45a8ff 204 */
bogdanm 0:9b334a45a8ff 205 HAL_StatusTypeDef HAL_SWPMI_DeInit(SWPMI_HandleTypeDef *hswpmi)
bogdanm 0:9b334a45a8ff 206 {
bogdanm 0:9b334a45a8ff 207 HAL_StatusTypeDef status = HAL_OK;
bogdanm 0:9b334a45a8ff 208
bogdanm 0:9b334a45a8ff 209 /* Check the SWPMI handle allocation */
bogdanm 0:9b334a45a8ff 210 if(hswpmi == NULL)
bogdanm 0:9b334a45a8ff 211 {
bogdanm 0:9b334a45a8ff 212 status = HAL_ERROR;
bogdanm 0:9b334a45a8ff 213 }
bogdanm 0:9b334a45a8ff 214 else
bogdanm 0:9b334a45a8ff 215 {
bogdanm 0:9b334a45a8ff 216 /* Check the parameters */
bogdanm 0:9b334a45a8ff 217 assert_param(IS_SWPMI_INSTANCE(hswpmi->Instance));
bogdanm 0:9b334a45a8ff 218
bogdanm 0:9b334a45a8ff 219 hswpmi->State = HAL_SWPMI_STATE_BUSY;
bogdanm 0:9b334a45a8ff 220
bogdanm 0:9b334a45a8ff 221 /* Disable SWPMI interface */
bogdanm 0:9b334a45a8ff 222 CLEAR_BIT(hswpmi->Instance->CR, SWPMI_CR_SWPACT);
bogdanm 0:9b334a45a8ff 223
bogdanm 0:9b334a45a8ff 224 /* DeInit the low level hardware */
bogdanm 0:9b334a45a8ff 225 HAL_SWPMI_MspDeInit(hswpmi);
bogdanm 0:9b334a45a8ff 226
bogdanm 0:9b334a45a8ff 227 hswpmi->ErrorCode = HAL_SWPMI_ERROR_NONE;
bogdanm 0:9b334a45a8ff 228
bogdanm 0:9b334a45a8ff 229 hswpmi->State = HAL_SWPMI_STATE_RESET;
bogdanm 0:9b334a45a8ff 230
bogdanm 0:9b334a45a8ff 231 /* Release Lock */
bogdanm 0:9b334a45a8ff 232 __HAL_UNLOCK(hswpmi);
bogdanm 0:9b334a45a8ff 233 }
bogdanm 0:9b334a45a8ff 234
bogdanm 0:9b334a45a8ff 235 return status;
bogdanm 0:9b334a45a8ff 236 }
bogdanm 0:9b334a45a8ff 237
bogdanm 0:9b334a45a8ff 238 /**
bogdanm 0:9b334a45a8ff 239 * @brief Initialize the SWPMI MSP.
bogdanm 0:9b334a45a8ff 240 * @param hswpmi: SWPMI handle
bogdanm 0:9b334a45a8ff 241 * @retval None
bogdanm 0:9b334a45a8ff 242 */
bogdanm 0:9b334a45a8ff 243 __weak void HAL_SWPMI_MspInit(SWPMI_HandleTypeDef *hswpmi)
bogdanm 0:9b334a45a8ff 244 {
bogdanm 0:9b334a45a8ff 245 /* NOTE : This function should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 246 the HAL_SWPMI_MspInit can be implemented in the user file
bogdanm 0:9b334a45a8ff 247 */
bogdanm 0:9b334a45a8ff 248 }
bogdanm 0:9b334a45a8ff 249
bogdanm 0:9b334a45a8ff 250 /**
bogdanm 0:9b334a45a8ff 251 * @brief DeInitialize the SWPMI MSP.
bogdanm 0:9b334a45a8ff 252 * @param hswpmi: SWPMI handle
bogdanm 0:9b334a45a8ff 253 * @retval None
bogdanm 0:9b334a45a8ff 254 */
bogdanm 0:9b334a45a8ff 255 __weak void HAL_SWPMI_MspDeInit(SWPMI_HandleTypeDef *hswpmi)
bogdanm 0:9b334a45a8ff 256 {
bogdanm 0:9b334a45a8ff 257 /* NOTE : This function should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 258 the HAL_SWPMI_MspDeInit can be implemented in the user file
bogdanm 0:9b334a45a8ff 259 */
bogdanm 0:9b334a45a8ff 260 }
bogdanm 0:9b334a45a8ff 261
bogdanm 0:9b334a45a8ff 262 /**
bogdanm 0:9b334a45a8ff 263 * @}
bogdanm 0:9b334a45a8ff 264 */
bogdanm 0:9b334a45a8ff 265
bogdanm 0:9b334a45a8ff 266 /** @defgroup SWPMI_Exported_Group2 IO operation methods
bogdanm 0:9b334a45a8ff 267 * @brief SWPMI Transmit/Receive functions
bogdanm 0:9b334a45a8ff 268 *
bogdanm 0:9b334a45a8ff 269 @verbatim
bogdanm 0:9b334a45a8ff 270 ===============================================================================
bogdanm 0:9b334a45a8ff 271 ##### IO operation methods #####
bogdanm 0:9b334a45a8ff 272 ===============================================================================
bogdanm 0:9b334a45a8ff 273 [..]
bogdanm 0:9b334a45a8ff 274 This subsection provides a set of functions allowing to manage the SWPMI
bogdanm 0:9b334a45a8ff 275 data transfers.
bogdanm 0:9b334a45a8ff 276
bogdanm 0:9b334a45a8ff 277 (#) There are two modes of transfer:
bogdanm 0:9b334a45a8ff 278 (++) Blocking mode: The communication is performed in polling mode.
bogdanm 0:9b334a45a8ff 279 The HAL status of all data processing is returned by the same function
bogdanm 0:9b334a45a8ff 280 after finishing transfer.
bogdanm 0:9b334a45a8ff 281 (++) Non-Blocking mode: The communication is performed using Interrupts
bogdanm 0:9b334a45a8ff 282 or DMA. The end of the data processing will be indicated through the
bogdanm 0:9b334a45a8ff 283 dedicated SWPMI Interrupt handler (HAL_SWPMI_IRQHandler()) when using Interrupt mode or
bogdanm 0:9b334a45a8ff 284 the selected DMA channel interrupt handler when using DMA mode.
bogdanm 0:9b334a45a8ff 285 The HAL_SWPMI_TxCpltCallback(), HAL_SWPMI_RxCpltCallback() user callbacks
bogdanm 0:9b334a45a8ff 286 will be executed respectively at the end of the transmit or receive process.
bogdanm 0:9b334a45a8ff 287 The HAL_SWPMI_ErrorCallback() user callback will be executed when a communication error is detected.
bogdanm 0:9b334a45a8ff 288
bogdanm 0:9b334a45a8ff 289 (#) Blocking mode API's are:
bogdanm 0:9b334a45a8ff 290 (++) HAL_SWPMI_Transmit()
bogdanm 0:9b334a45a8ff 291 (++) HAL_SWPMI_Receive()
bogdanm 0:9b334a45a8ff 292
bogdanm 0:9b334a45a8ff 293 (#) Non-Blocking mode API's with Interrupt are:
bogdanm 0:9b334a45a8ff 294 (++) HAL_SWPMI_Transmit_IT()
bogdanm 0:9b334a45a8ff 295 (++) HAL_SWPMI_Receive_IT()
bogdanm 0:9b334a45a8ff 296 (++) HAL_SWPMI_IRQHandler()
bogdanm 0:9b334a45a8ff 297
bogdanm 0:9b334a45a8ff 298 (#) Non-Blocking mode API's with DMA are:
bogdanm 0:9b334a45a8ff 299 (++) HAL_SWPMI_Transmit_DMA()
bogdanm 0:9b334a45a8ff 300 (++) HAL_SWPMI_Receive_DMA()
bogdanm 0:9b334a45a8ff 301 (++) HAL_SWPMI_DMAPause()
bogdanm 0:9b334a45a8ff 302 (++) HAL_SWPMI_DMAResume()
bogdanm 0:9b334a45a8ff 303 (++) HAL_SWPMI_DMAStop()
bogdanm 0:9b334a45a8ff 304
bogdanm 0:9b334a45a8ff 305 (#) A set of Transfer Complete Callbacks are provided in Non-Blocking mode:
bogdanm 0:9b334a45a8ff 306 (++) HAL_SWPMI_TxHalfCpltCallback()
bogdanm 0:9b334a45a8ff 307 (++) HAL_SWPMI_TxCpltCallback()
bogdanm 0:9b334a45a8ff 308 (++) HAL_SWPMI_RxHalfCpltCallback()
bogdanm 0:9b334a45a8ff 309 (++) HAL_SWPMI_RxCpltCallback()
bogdanm 0:9b334a45a8ff 310 (++) HAL_SWPMI_ErrorCallback()
bogdanm 0:9b334a45a8ff 311
bogdanm 0:9b334a45a8ff 312 (#) The capability to launch the above IO operations in loopback mode for
bogdanm 0:9b334a45a8ff 313 user application verification:
bogdanm 0:9b334a45a8ff 314 (++) HAL_SWPMI_EnableLoopback()
bogdanm 0:9b334a45a8ff 315 (++) HAL_SWPMI_DisableLoopback()
bogdanm 0:9b334a45a8ff 316
bogdanm 0:9b334a45a8ff 317 @endverbatim
bogdanm 0:9b334a45a8ff 318 * @{
bogdanm 0:9b334a45a8ff 319 */
bogdanm 0:9b334a45a8ff 320
bogdanm 0:9b334a45a8ff 321 /**
bogdanm 0:9b334a45a8ff 322 * @brief Transmit an amount of data in blocking mode.
bogdanm 0:9b334a45a8ff 323 * @param hswpmi: pointer to a SWPMI_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 324 * the configuration information for SWPMI module.
bogdanm 0:9b334a45a8ff 325 * @param pData: Pointer to data buffer
bogdanm 0:9b334a45a8ff 326 * @param Size: Amount of data to be sent
bogdanm 0:9b334a45a8ff 327 * @param Timeout: Timeout duration
bogdanm 0:9b334a45a8ff 328 * @retval HAL status
bogdanm 0:9b334a45a8ff 329 */
bogdanm 0:9b334a45a8ff 330 HAL_StatusTypeDef HAL_SWPMI_Transmit(SWPMI_HandleTypeDef *hswpmi, uint32_t* pData, uint16_t Size, uint32_t Timeout)
bogdanm 0:9b334a45a8ff 331 {
bogdanm 0:9b334a45a8ff 332 uint32_t tickstart = HAL_GetTick();
bogdanm 0:9b334a45a8ff 333 HAL_StatusTypeDef status = HAL_OK;
bogdanm 0:9b334a45a8ff 334
bogdanm 0:9b334a45a8ff 335 if((pData == NULL ) || (Size == 0))
bogdanm 0:9b334a45a8ff 336 {
bogdanm 0:9b334a45a8ff 337 status = HAL_ERROR;
bogdanm 0:9b334a45a8ff 338 }
bogdanm 0:9b334a45a8ff 339 else
bogdanm 0:9b334a45a8ff 340 {
bogdanm 0:9b334a45a8ff 341 /* Process Locked */
bogdanm 0:9b334a45a8ff 342 __HAL_LOCK(hswpmi);
bogdanm 0:9b334a45a8ff 343
bogdanm 0:9b334a45a8ff 344 if((hswpmi->State == HAL_SWPMI_STATE_READY) || (hswpmi->State == HAL_SWPMI_STATE_BUSY_RX))
bogdanm 0:9b334a45a8ff 345 {
bogdanm 0:9b334a45a8ff 346 /* Check if a non-blocking receive process is ongoing or not */
bogdanm 0:9b334a45a8ff 347 if(hswpmi->State == HAL_SWPMI_STATE_READY)
bogdanm 0:9b334a45a8ff 348 {
bogdanm 0:9b334a45a8ff 349 hswpmi->State = HAL_SWPMI_STATE_BUSY_TX;
bogdanm 0:9b334a45a8ff 350
bogdanm 0:9b334a45a8ff 351 /* Disable any transmitter interrupts */
bogdanm 0:9b334a45a8ff 352 __HAL_SWPMI_DISABLE_IT(hswpmi, SWPMI_IT_TCIE | SWPMI_IT_TIE | SWPMI_IT_TXUNRIE | SWPMI_IT_TXBEIE);
bogdanm 0:9b334a45a8ff 353
bogdanm 0:9b334a45a8ff 354 /* Disable any transmitter flags */
bogdanm 0:9b334a45a8ff 355 __HAL_SWPMI_CLEAR_FLAG(hswpmi, SWPMI_FLAG_TXBEF | SWPMI_FLAG_TXUNRF | SWPMI_FLAG_TCF);
bogdanm 0:9b334a45a8ff 356
bogdanm 0:9b334a45a8ff 357 /* Enable SWPMI peripheral if not */
bogdanm 0:9b334a45a8ff 358 SET_BIT(hswpmi->Instance->CR, SWPMI_CR_SWPACT);
bogdanm 0:9b334a45a8ff 359 }
bogdanm 0:9b334a45a8ff 360 else
bogdanm 0:9b334a45a8ff 361 {
bogdanm 0:9b334a45a8ff 362 hswpmi->State = HAL_SWPMI_STATE_BUSY_TX_RX;
bogdanm 0:9b334a45a8ff 363 }
bogdanm 0:9b334a45a8ff 364
bogdanm 0:9b334a45a8ff 365 do
bogdanm 0:9b334a45a8ff 366 {
bogdanm 0:9b334a45a8ff 367 /* Wait the TXE to write data */
bogdanm 0:9b334a45a8ff 368 if(HAL_IS_BIT_SET(hswpmi->Instance->ISR, SWPMI_FLAG_TXE))
bogdanm 0:9b334a45a8ff 369 {
bogdanm 0:9b334a45a8ff 370 hswpmi->Instance->TDR = (*pData++);
bogdanm 0:9b334a45a8ff 371 Size--;
bogdanm 0:9b334a45a8ff 372 }
bogdanm 0:9b334a45a8ff 373 else
bogdanm 0:9b334a45a8ff 374 {
bogdanm 0:9b334a45a8ff 375 /* Check for the Timeout */
bogdanm 0:9b334a45a8ff 376 if(Timeout != HAL_MAX_DELAY)
bogdanm 0:9b334a45a8ff 377 {
bogdanm 0:9b334a45a8ff 378 if((Timeout == 0) || ((HAL_GetTick() - tickstart) > Timeout))
bogdanm 0:9b334a45a8ff 379 {
bogdanm 0:9b334a45a8ff 380 status = HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 381 break;
bogdanm 0:9b334a45a8ff 382 }
bogdanm 0:9b334a45a8ff 383 }
bogdanm 0:9b334a45a8ff 384 }
bogdanm 0:9b334a45a8ff 385 } while(Size != 0);
bogdanm 0:9b334a45a8ff 386
bogdanm 0:9b334a45a8ff 387 /* Wait on TXBEF flag to be able to start a second transfer */
bogdanm 0:9b334a45a8ff 388 if(SWPMI_WaitOnFlagSetUntilTimeout(hswpmi, SWPMI_FLAG_TXBEF, Timeout) != HAL_OK)
bogdanm 0:9b334a45a8ff 389 {
bogdanm 0:9b334a45a8ff 390 status = HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 391 }
bogdanm 0:9b334a45a8ff 392
bogdanm 0:9b334a45a8ff 393 if(status == HAL_OK)
bogdanm 0:9b334a45a8ff 394 {
bogdanm 0:9b334a45a8ff 395 /* Check if a non-blocking receive Process is ongoing or not */
bogdanm 0:9b334a45a8ff 396 if(hswpmi->State == HAL_SWPMI_STATE_BUSY_TX_RX)
bogdanm 0:9b334a45a8ff 397 {
bogdanm 0:9b334a45a8ff 398 hswpmi->State = HAL_SWPMI_STATE_BUSY_RX;
bogdanm 0:9b334a45a8ff 399 }
bogdanm 0:9b334a45a8ff 400 else
bogdanm 0:9b334a45a8ff 401 {
bogdanm 0:9b334a45a8ff 402 hswpmi->State = HAL_SWPMI_STATE_READY;
bogdanm 0:9b334a45a8ff 403 }
bogdanm 0:9b334a45a8ff 404 }
bogdanm 0:9b334a45a8ff 405 }
bogdanm 0:9b334a45a8ff 406 else
bogdanm 0:9b334a45a8ff 407 {
bogdanm 0:9b334a45a8ff 408 status = HAL_BUSY;
bogdanm 0:9b334a45a8ff 409 }
bogdanm 0:9b334a45a8ff 410 }
bogdanm 0:9b334a45a8ff 411
bogdanm 0:9b334a45a8ff 412 if((status != HAL_OK) && (status != HAL_BUSY))
bogdanm 0:9b334a45a8ff 413 {
bogdanm 0:9b334a45a8ff 414 hswpmi->State = HAL_SWPMI_STATE_READY;
bogdanm 0:9b334a45a8ff 415 }
bogdanm 0:9b334a45a8ff 416 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 417 __HAL_UNLOCK(hswpmi);
bogdanm 0:9b334a45a8ff 418
bogdanm 0:9b334a45a8ff 419 return status;
bogdanm 0:9b334a45a8ff 420 }
bogdanm 0:9b334a45a8ff 421
bogdanm 0:9b334a45a8ff 422 /**
bogdanm 0:9b334a45a8ff 423 * @brief Receive an amount of data in blocking mode.
bogdanm 0:9b334a45a8ff 424 * @param hswpmi: pointer to a SWPMI_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 425 * the configuration information for SWPMI module.
bogdanm 0:9b334a45a8ff 426 * @param pData: Pointer to data buffer
bogdanm 0:9b334a45a8ff 427 * @param Size: Amount of data to be received
bogdanm 0:9b334a45a8ff 428 * @param Timeout: Timeout duration
bogdanm 0:9b334a45a8ff 429 * @retval HAL status
bogdanm 0:9b334a45a8ff 430 */
bogdanm 0:9b334a45a8ff 431 HAL_StatusTypeDef HAL_SWPMI_Receive(SWPMI_HandleTypeDef *hswpmi, uint32_t *pData, uint16_t Size, uint32_t Timeout)
bogdanm 0:9b334a45a8ff 432 {
bogdanm 0:9b334a45a8ff 433 uint32_t tickstart = HAL_GetTick();
bogdanm 0:9b334a45a8ff 434 HAL_StatusTypeDef status = HAL_OK;
bogdanm 0:9b334a45a8ff 435
bogdanm 0:9b334a45a8ff 436 if((pData == NULL ) || (Size == 0))
bogdanm 0:9b334a45a8ff 437 {
bogdanm 0:9b334a45a8ff 438 status = HAL_ERROR;
bogdanm 0:9b334a45a8ff 439 }
bogdanm 0:9b334a45a8ff 440 else
bogdanm 0:9b334a45a8ff 441 {
bogdanm 0:9b334a45a8ff 442 /* Process Locked */
bogdanm 0:9b334a45a8ff 443 __HAL_LOCK(hswpmi);
bogdanm 0:9b334a45a8ff 444
bogdanm 0:9b334a45a8ff 445 if((hswpmi->State == HAL_SWPMI_STATE_READY) || (hswpmi->State == HAL_SWPMI_STATE_BUSY_TX))
bogdanm 0:9b334a45a8ff 446 {
bogdanm 0:9b334a45a8ff 447 /* Check if a non-blocking transmit process is ongoing or not */
bogdanm 0:9b334a45a8ff 448 if(hswpmi->State == HAL_SWPMI_STATE_READY)
bogdanm 0:9b334a45a8ff 449 {
bogdanm 0:9b334a45a8ff 450 hswpmi->State = HAL_SWPMI_STATE_BUSY_RX;
bogdanm 0:9b334a45a8ff 451
bogdanm 0:9b334a45a8ff 452 /* Disable any receiver interrupts */
bogdanm 0:9b334a45a8ff 453 CLEAR_BIT(hswpmi->Instance->IER, SWPMI_IT_SRIE | SWPMI_IT_RIE | SWPMI_IT_RXBERIE | SWPMI_IT_RXOVRIE | SWPMI_IT_RXBFIE);
bogdanm 0:9b334a45a8ff 454
bogdanm 0:9b334a45a8ff 455 /* Enable SWPMI peripheral if not */
bogdanm 0:9b334a45a8ff 456 SET_BIT(hswpmi->Instance->CR, SWPMI_CR_SWPACT);
bogdanm 0:9b334a45a8ff 457 }
bogdanm 0:9b334a45a8ff 458 else
bogdanm 0:9b334a45a8ff 459 {
bogdanm 0:9b334a45a8ff 460 hswpmi->State = HAL_SWPMI_STATE_BUSY_TX_RX;
bogdanm 0:9b334a45a8ff 461 }
bogdanm 0:9b334a45a8ff 462
bogdanm 0:9b334a45a8ff 463 do
bogdanm 0:9b334a45a8ff 464 {
bogdanm 0:9b334a45a8ff 465 /* Wait the RXNE to read data */
bogdanm 0:9b334a45a8ff 466 if(HAL_IS_BIT_SET(hswpmi->Instance->ISR, SWPMI_FLAG_RXNE))
bogdanm 0:9b334a45a8ff 467 {
bogdanm 0:9b334a45a8ff 468 (*pData++) = hswpmi->Instance->RDR;
bogdanm 0:9b334a45a8ff 469 Size--;
bogdanm 0:9b334a45a8ff 470 }
bogdanm 0:9b334a45a8ff 471 else
bogdanm 0:9b334a45a8ff 472 {
bogdanm 0:9b334a45a8ff 473 /* Check for the Timeout */
bogdanm 0:9b334a45a8ff 474 if(Timeout != HAL_MAX_DELAY)
bogdanm 0:9b334a45a8ff 475 {
bogdanm 0:9b334a45a8ff 476 if((Timeout == 0) || ((HAL_GetTick() - tickstart) > Timeout))
bogdanm 0:9b334a45a8ff 477 {
bogdanm 0:9b334a45a8ff 478 status = HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 479 break;
bogdanm 0:9b334a45a8ff 480 }
bogdanm 0:9b334a45a8ff 481 }
bogdanm 0:9b334a45a8ff 482 }
bogdanm 0:9b334a45a8ff 483 } while(Size != 0);
bogdanm 0:9b334a45a8ff 484
bogdanm 0:9b334a45a8ff 485 if(status == HAL_OK)
bogdanm 0:9b334a45a8ff 486 {
bogdanm 0:9b334a45a8ff 487 if(HAL_IS_BIT_SET(hswpmi->Instance->ISR, SWPMI_FLAG_RXBFF))
bogdanm 0:9b334a45a8ff 488 {
bogdanm 0:9b334a45a8ff 489 /* Clear RXBFF at end of reception */
bogdanm 0:9b334a45a8ff 490 WRITE_REG(hswpmi->Instance->ICR, SWPMI_FLAG_RXBFF);
bogdanm 0:9b334a45a8ff 491 }
bogdanm 0:9b334a45a8ff 492
bogdanm 0:9b334a45a8ff 493 /* Check if a non-blocking transmit Process is ongoing or not */
bogdanm 0:9b334a45a8ff 494 if(hswpmi->State == HAL_SWPMI_STATE_BUSY_TX_RX)
bogdanm 0:9b334a45a8ff 495 {
bogdanm 0:9b334a45a8ff 496 hswpmi->State = HAL_SWPMI_STATE_BUSY_TX;
bogdanm 0:9b334a45a8ff 497 }
bogdanm 0:9b334a45a8ff 498 else
bogdanm 0:9b334a45a8ff 499 {
bogdanm 0:9b334a45a8ff 500 hswpmi->State = HAL_SWPMI_STATE_READY;
bogdanm 0:9b334a45a8ff 501 }
bogdanm 0:9b334a45a8ff 502 }
bogdanm 0:9b334a45a8ff 503 }
bogdanm 0:9b334a45a8ff 504 else
bogdanm 0:9b334a45a8ff 505 {
bogdanm 0:9b334a45a8ff 506 status = HAL_BUSY;
bogdanm 0:9b334a45a8ff 507 }
bogdanm 0:9b334a45a8ff 508 }
bogdanm 0:9b334a45a8ff 509
bogdanm 0:9b334a45a8ff 510 if((status != HAL_OK) && (status != HAL_BUSY))
bogdanm 0:9b334a45a8ff 511 {
bogdanm 0:9b334a45a8ff 512 hswpmi->State = HAL_SWPMI_STATE_READY;
bogdanm 0:9b334a45a8ff 513 }
bogdanm 0:9b334a45a8ff 514 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 515 __HAL_UNLOCK(hswpmi);
bogdanm 0:9b334a45a8ff 516
bogdanm 0:9b334a45a8ff 517 return status;
bogdanm 0:9b334a45a8ff 518 }
bogdanm 0:9b334a45a8ff 519
bogdanm 0:9b334a45a8ff 520 /**
bogdanm 0:9b334a45a8ff 521 * @brief Transmit an amount of data in non-blocking mode with interrupt.
bogdanm 0:9b334a45a8ff 522 * @param hswpmi: pointer to a SWPMI_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 523 * the configuration information for SWPMI module.
bogdanm 0:9b334a45a8ff 524 * @param pData: Pointer to data buffer
bogdanm 0:9b334a45a8ff 525 * @param Size: Amount of data to be sent
bogdanm 0:9b334a45a8ff 526 * @retval HAL status
bogdanm 0:9b334a45a8ff 527 */
bogdanm 0:9b334a45a8ff 528 HAL_StatusTypeDef HAL_SWPMI_Transmit_IT(SWPMI_HandleTypeDef *hswpmi, uint32_t *pData, uint16_t Size)
bogdanm 0:9b334a45a8ff 529 {
bogdanm 0:9b334a45a8ff 530 HAL_StatusTypeDef status = HAL_OK;
bogdanm 0:9b334a45a8ff 531
bogdanm 0:9b334a45a8ff 532 if((pData == NULL ) || (Size == 0))
bogdanm 0:9b334a45a8ff 533 {
bogdanm 0:9b334a45a8ff 534 status = HAL_ERROR;
bogdanm 0:9b334a45a8ff 535 }
bogdanm 0:9b334a45a8ff 536 else
bogdanm 0:9b334a45a8ff 537 {
bogdanm 0:9b334a45a8ff 538 /* Process Locked */
bogdanm 0:9b334a45a8ff 539 __HAL_LOCK(hswpmi);
bogdanm 0:9b334a45a8ff 540
bogdanm 0:9b334a45a8ff 541 if((hswpmi->State == HAL_SWPMI_STATE_READY) || (hswpmi->State == HAL_SWPMI_STATE_BUSY_RX))
bogdanm 0:9b334a45a8ff 542 {
bogdanm 0:9b334a45a8ff 543 /* Update handle */
bogdanm 0:9b334a45a8ff 544 hswpmi->pTxBuffPtr = pData;
bogdanm 0:9b334a45a8ff 545 hswpmi->TxXferSize = Size;
bogdanm 0:9b334a45a8ff 546 hswpmi->TxXferCount = Size;
bogdanm 0:9b334a45a8ff 547 hswpmi->ErrorCode = HAL_SWPMI_ERROR_NONE;
bogdanm 0:9b334a45a8ff 548
bogdanm 0:9b334a45a8ff 549 /* Check if a receive process is ongoing or not */
bogdanm 0:9b334a45a8ff 550 if(hswpmi->State == HAL_SWPMI_STATE_READY)
bogdanm 0:9b334a45a8ff 551 {
bogdanm 0:9b334a45a8ff 552 hswpmi->State = HAL_SWPMI_STATE_BUSY_TX;
bogdanm 0:9b334a45a8ff 553
bogdanm 0:9b334a45a8ff 554 /* Enable SWPMI peripheral if not */
bogdanm 0:9b334a45a8ff 555 SET_BIT(hswpmi->Instance->CR, SWPMI_CR_SWPACT);
bogdanm 0:9b334a45a8ff 556 }
bogdanm 0:9b334a45a8ff 557 else
bogdanm 0:9b334a45a8ff 558 {
bogdanm 0:9b334a45a8ff 559 hswpmi->State = HAL_SWPMI_STATE_BUSY_TX_RX;
bogdanm 0:9b334a45a8ff 560 }
bogdanm 0:9b334a45a8ff 561
bogdanm 0:9b334a45a8ff 562 /* Enable the SWPMI transmit underrun error */
bogdanm 0:9b334a45a8ff 563 __HAL_SWPMI_ENABLE_IT(hswpmi, SWPMI_IT_TXUNRIE);
bogdanm 0:9b334a45a8ff 564
bogdanm 0:9b334a45a8ff 565 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 566 __HAL_UNLOCK(hswpmi);
bogdanm 0:9b334a45a8ff 567
bogdanm 0:9b334a45a8ff 568 /* Enable the SWPMI interrupts: */
bogdanm 0:9b334a45a8ff 569 /* - Transmit data register empty */
bogdanm 0:9b334a45a8ff 570 /* - Transmit buffer empty */
bogdanm 0:9b334a45a8ff 571 /* - Transmit/Reception completion */
bogdanm 0:9b334a45a8ff 572 __HAL_SWPMI_ENABLE_IT(hswpmi, SWPMI_IT_TIE | SWPMI_IT_TXBEIE | SWPMI_IT_TCIE);
bogdanm 0:9b334a45a8ff 573 }
bogdanm 0:9b334a45a8ff 574 else
bogdanm 0:9b334a45a8ff 575 {
bogdanm 0:9b334a45a8ff 576 status = HAL_BUSY;
bogdanm 0:9b334a45a8ff 577
bogdanm 0:9b334a45a8ff 578 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 579 __HAL_UNLOCK(hswpmi);
bogdanm 0:9b334a45a8ff 580 }
bogdanm 0:9b334a45a8ff 581 }
bogdanm 0:9b334a45a8ff 582
bogdanm 0:9b334a45a8ff 583 return status;
bogdanm 0:9b334a45a8ff 584 }
bogdanm 0:9b334a45a8ff 585
bogdanm 0:9b334a45a8ff 586 /**
bogdanm 0:9b334a45a8ff 587 * @brief Receive an amount of data in non-blocking mode with interrupt.
bogdanm 0:9b334a45a8ff 588 * @param hswpmi: SWPMI handle
bogdanm 0:9b334a45a8ff 589 * @param pData: pointer to data buffer
bogdanm 0:9b334a45a8ff 590 * @param Size: amount of data to be received
bogdanm 0:9b334a45a8ff 591 * @retval HAL status
bogdanm 0:9b334a45a8ff 592 */
bogdanm 0:9b334a45a8ff 593 HAL_StatusTypeDef HAL_SWPMI_Receive_IT(SWPMI_HandleTypeDef *hswpmi, uint32_t *pData, uint16_t Size)
bogdanm 0:9b334a45a8ff 594 {
bogdanm 0:9b334a45a8ff 595 HAL_StatusTypeDef status = HAL_OK;
bogdanm 0:9b334a45a8ff 596
bogdanm 0:9b334a45a8ff 597 if((pData == NULL ) || (Size == 0))
bogdanm 0:9b334a45a8ff 598 {
bogdanm 0:9b334a45a8ff 599 status = HAL_ERROR;
bogdanm 0:9b334a45a8ff 600 }
bogdanm 0:9b334a45a8ff 601 else
bogdanm 0:9b334a45a8ff 602 {
bogdanm 0:9b334a45a8ff 603 /* Process Locked */
bogdanm 0:9b334a45a8ff 604 __HAL_LOCK(hswpmi);
bogdanm 0:9b334a45a8ff 605
bogdanm 0:9b334a45a8ff 606 if((hswpmi->State == HAL_SWPMI_STATE_READY) || (hswpmi->State == HAL_SWPMI_STATE_BUSY_TX))
bogdanm 0:9b334a45a8ff 607 {
bogdanm 0:9b334a45a8ff 608 /* Update handle */
bogdanm 0:9b334a45a8ff 609 hswpmi->pRxBuffPtr = pData;
bogdanm 0:9b334a45a8ff 610 hswpmi->RxXferSize = Size;
bogdanm 0:9b334a45a8ff 611 hswpmi->RxXferCount = Size;
bogdanm 0:9b334a45a8ff 612 hswpmi->ErrorCode = HAL_SWPMI_ERROR_NONE;
bogdanm 0:9b334a45a8ff 613
bogdanm 0:9b334a45a8ff 614 /* Check if a transmit process is ongoing or not */
bogdanm 0:9b334a45a8ff 615 if(hswpmi->State == HAL_SWPMI_STATE_READY)
bogdanm 0:9b334a45a8ff 616 {
bogdanm 0:9b334a45a8ff 617 hswpmi->State = HAL_SWPMI_STATE_BUSY_RX;
bogdanm 0:9b334a45a8ff 618
bogdanm 0:9b334a45a8ff 619 /* Enable SWPMI peripheral if not */
bogdanm 0:9b334a45a8ff 620 SET_BIT(hswpmi->Instance->CR, SWPMI_CR_SWPACT);
bogdanm 0:9b334a45a8ff 621 }
bogdanm 0:9b334a45a8ff 622 else
bogdanm 0:9b334a45a8ff 623 {
bogdanm 0:9b334a45a8ff 624 hswpmi->State = HAL_SWPMI_STATE_BUSY_TX_RX;
bogdanm 0:9b334a45a8ff 625 }
bogdanm 0:9b334a45a8ff 626
bogdanm 0:9b334a45a8ff 627 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 628 __HAL_UNLOCK(hswpmi);
bogdanm 0:9b334a45a8ff 629
bogdanm 0:9b334a45a8ff 630 /* Enable the SWPMI slave resume */
bogdanm 0:9b334a45a8ff 631 /* Enable the SWPMI Data Register not empty Interrupt, receive CRC Error, receive overrun and RxBuf Interrupt */
bogdanm 0:9b334a45a8ff 632 /* Enable the SWPMI Transmit/Reception completion */
bogdanm 0:9b334a45a8ff 633 __HAL_SWPMI_ENABLE_IT(hswpmi, SWPMI_IT_RIE | SWPMI_IT_RXBERIE | SWPMI_IT_RXOVRIE | SWPMI_IT_RXBFIE);
bogdanm 0:9b334a45a8ff 634 }
bogdanm 0:9b334a45a8ff 635 else
bogdanm 0:9b334a45a8ff 636 {
bogdanm 0:9b334a45a8ff 637 status = HAL_BUSY;
bogdanm 0:9b334a45a8ff 638
bogdanm 0:9b334a45a8ff 639 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 640 __HAL_UNLOCK(hswpmi);
bogdanm 0:9b334a45a8ff 641 }
bogdanm 0:9b334a45a8ff 642 }
bogdanm 0:9b334a45a8ff 643
bogdanm 0:9b334a45a8ff 644 return status;
bogdanm 0:9b334a45a8ff 645 }
bogdanm 0:9b334a45a8ff 646
bogdanm 0:9b334a45a8ff 647 /**
bogdanm 0:9b334a45a8ff 648 * @brief Transmit an amount of data in non-blocking mode with DMA interrupt.
bogdanm 0:9b334a45a8ff 649 * @param hswpmi: SWPMI handle
bogdanm 0:9b334a45a8ff 650 * @param pData: pointer to data buffer
bogdanm 0:9b334a45a8ff 651 * @param Size: amount of data to be sent
bogdanm 0:9b334a45a8ff 652 * @retval HAL status
bogdanm 0:9b334a45a8ff 653 */
bogdanm 0:9b334a45a8ff 654 HAL_StatusTypeDef HAL_SWPMI_Transmit_DMA(SWPMI_HandleTypeDef *hswpmi, uint32_t *pData, uint16_t Size)
bogdanm 0:9b334a45a8ff 655 {
bogdanm 0:9b334a45a8ff 656 HAL_StatusTypeDef status = HAL_OK;
bogdanm 0:9b334a45a8ff 657
bogdanm 0:9b334a45a8ff 658 if((pData == NULL ) || (Size == 0))
bogdanm 0:9b334a45a8ff 659 {
bogdanm 0:9b334a45a8ff 660 status = HAL_ERROR;
bogdanm 0:9b334a45a8ff 661 }
bogdanm 0:9b334a45a8ff 662 else
bogdanm 0:9b334a45a8ff 663 {
bogdanm 0:9b334a45a8ff 664 /* Process Locked */
bogdanm 0:9b334a45a8ff 665 __HAL_LOCK(hswpmi);
bogdanm 0:9b334a45a8ff 666
bogdanm 0:9b334a45a8ff 667 if((hswpmi->State == HAL_SWPMI_STATE_READY) || (hswpmi->State == HAL_SWPMI_STATE_BUSY_RX))
bogdanm 0:9b334a45a8ff 668 {
bogdanm 0:9b334a45a8ff 669 /* Update handle */
bogdanm 0:9b334a45a8ff 670 hswpmi->pTxBuffPtr = pData;
bogdanm 0:9b334a45a8ff 671 hswpmi->TxXferSize = Size;
bogdanm 0:9b334a45a8ff 672 hswpmi->TxXferCount = Size;
bogdanm 0:9b334a45a8ff 673 hswpmi->ErrorCode = HAL_SWPMI_ERROR_NONE;
bogdanm 0:9b334a45a8ff 674
bogdanm 0:9b334a45a8ff 675 /* Check if a receive process is ongoing or not */
bogdanm 0:9b334a45a8ff 676 if(hswpmi->State == HAL_SWPMI_STATE_READY)
bogdanm 0:9b334a45a8ff 677 {
bogdanm 0:9b334a45a8ff 678 hswpmi->State = HAL_SWPMI_STATE_BUSY_TX;
bogdanm 0:9b334a45a8ff 679
bogdanm 0:9b334a45a8ff 680 /* Enable SWPMI peripheral if not */
bogdanm 0:9b334a45a8ff 681 SET_BIT(hswpmi->Instance->CR, SWPMI_CR_SWPACT);
bogdanm 0:9b334a45a8ff 682 }
bogdanm 0:9b334a45a8ff 683 else
bogdanm 0:9b334a45a8ff 684 {
bogdanm 0:9b334a45a8ff 685 hswpmi->State = HAL_SWPMI_STATE_BUSY_TX_RX;
bogdanm 0:9b334a45a8ff 686 }
bogdanm 0:9b334a45a8ff 687
bogdanm 0:9b334a45a8ff 688 /* Set the SWPMI DMA transfer complete callback */
bogdanm 0:9b334a45a8ff 689 hswpmi->hdmatx->XferCpltCallback = SWPMI_DMATransmitCplt;
bogdanm 0:9b334a45a8ff 690
bogdanm 0:9b334a45a8ff 691 /* Set the SWPMI DMA Half transfer complete callback */
bogdanm 0:9b334a45a8ff 692 hswpmi->hdmatx->XferHalfCpltCallback = SWPMI_DMATxHalfCplt;
bogdanm 0:9b334a45a8ff 693
bogdanm 0:9b334a45a8ff 694 /* Set the DMA error callback */
bogdanm 0:9b334a45a8ff 695 hswpmi->hdmatx->XferErrorCallback = SWPMI_DMAError;
bogdanm 0:9b334a45a8ff 696
bogdanm 0:9b334a45a8ff 697 /* Enable the SWPMI transmit DMA Stream */
bogdanm 0:9b334a45a8ff 698 HAL_DMA_Start_IT(hswpmi->hdmatx, (uint32_t)hswpmi->pTxBuffPtr, (uint32_t)&hswpmi->Instance->TDR, Size);
bogdanm 0:9b334a45a8ff 699
bogdanm 0:9b334a45a8ff 700 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 701 __HAL_UNLOCK(hswpmi);
bogdanm 0:9b334a45a8ff 702
bogdanm 0:9b334a45a8ff 703 /* Enable the DMA transfer for transmit request by setting the TXDMA bit
bogdanm 0:9b334a45a8ff 704 in the SWPMI CR register */
bogdanm 0:9b334a45a8ff 705 SET_BIT(hswpmi->Instance->CR, SWPMI_CR_TXDMA);
bogdanm 0:9b334a45a8ff 706 }
bogdanm 0:9b334a45a8ff 707 else
bogdanm 0:9b334a45a8ff 708 {
bogdanm 0:9b334a45a8ff 709 status = HAL_BUSY;
bogdanm 0:9b334a45a8ff 710
bogdanm 0:9b334a45a8ff 711 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 712 __HAL_UNLOCK(hswpmi);
bogdanm 0:9b334a45a8ff 713 }
bogdanm 0:9b334a45a8ff 714 }
bogdanm 0:9b334a45a8ff 715
bogdanm 0:9b334a45a8ff 716 return status;
bogdanm 0:9b334a45a8ff 717 }
bogdanm 0:9b334a45a8ff 718
bogdanm 0:9b334a45a8ff 719 /**
bogdanm 0:9b334a45a8ff 720 * @brief Receive an amount of data in non-blocking mode with DMA interrupt.
bogdanm 0:9b334a45a8ff 721 * @param hswpmi: SWPMI handle
bogdanm 0:9b334a45a8ff 722 * @param pData: pointer to data buffer
bogdanm 0:9b334a45a8ff 723 * @param Size: amount of data to be received
bogdanm 0:9b334a45a8ff 724 * @retval HAL status
bogdanm 0:9b334a45a8ff 725 */
bogdanm 0:9b334a45a8ff 726 HAL_StatusTypeDef HAL_SWPMI_Receive_DMA(SWPMI_HandleTypeDef *hswpmi, uint32_t *pData, uint16_t Size)
bogdanm 0:9b334a45a8ff 727 {
bogdanm 0:9b334a45a8ff 728 HAL_StatusTypeDef status = HAL_OK;
bogdanm 0:9b334a45a8ff 729
bogdanm 0:9b334a45a8ff 730 if((pData == NULL ) || (Size == 0))
bogdanm 0:9b334a45a8ff 731 {
bogdanm 0:9b334a45a8ff 732 status = HAL_ERROR;
bogdanm 0:9b334a45a8ff 733 }
bogdanm 0:9b334a45a8ff 734 else
bogdanm 0:9b334a45a8ff 735 {
bogdanm 0:9b334a45a8ff 736 /* Process Locked */
bogdanm 0:9b334a45a8ff 737 __HAL_LOCK(hswpmi);
bogdanm 0:9b334a45a8ff 738
bogdanm 0:9b334a45a8ff 739 if((hswpmi->State == HAL_SWPMI_STATE_READY) || (hswpmi->State == HAL_SWPMI_STATE_BUSY_TX))
bogdanm 0:9b334a45a8ff 740 {
bogdanm 0:9b334a45a8ff 741 /* Update handle */
bogdanm 0:9b334a45a8ff 742 hswpmi->pRxBuffPtr = pData;
bogdanm 0:9b334a45a8ff 743 hswpmi->RxXferSize = Size;
bogdanm 0:9b334a45a8ff 744 hswpmi->ErrorCode = HAL_SWPMI_ERROR_NONE;
bogdanm 0:9b334a45a8ff 745
bogdanm 0:9b334a45a8ff 746 /* Check if a transmit process is ongoing or not */
bogdanm 0:9b334a45a8ff 747 if(hswpmi->State == HAL_SWPMI_STATE_READY)
bogdanm 0:9b334a45a8ff 748 {
bogdanm 0:9b334a45a8ff 749 hswpmi->State = HAL_SWPMI_STATE_BUSY_RX;
bogdanm 0:9b334a45a8ff 750
bogdanm 0:9b334a45a8ff 751 /* Enable SWPMI peripheral if not */
bogdanm 0:9b334a45a8ff 752 SET_BIT(hswpmi->Instance->CR, SWPMI_CR_SWPACT);
bogdanm 0:9b334a45a8ff 753 }
bogdanm 0:9b334a45a8ff 754 else
bogdanm 0:9b334a45a8ff 755 {
bogdanm 0:9b334a45a8ff 756 hswpmi->State = HAL_SWPMI_STATE_BUSY_TX_RX;
bogdanm 0:9b334a45a8ff 757 }
bogdanm 0:9b334a45a8ff 758
bogdanm 0:9b334a45a8ff 759 /* Set the SWPMI DMA transfer complete callback */
bogdanm 0:9b334a45a8ff 760 hswpmi->hdmarx->XferCpltCallback = SWPMI_DMAReceiveCplt;
bogdanm 0:9b334a45a8ff 761
bogdanm 0:9b334a45a8ff 762 /* Set the SWPMI DMA Half transfer complete callback */
bogdanm 0:9b334a45a8ff 763 hswpmi->hdmarx->XferHalfCpltCallback = SWPMI_DMARxHalfCplt;
bogdanm 0:9b334a45a8ff 764
bogdanm 0:9b334a45a8ff 765 /* Set the DMA error callback */
bogdanm 0:9b334a45a8ff 766 hswpmi->hdmarx->XferErrorCallback = SWPMI_DMAError;
bogdanm 0:9b334a45a8ff 767
bogdanm 0:9b334a45a8ff 768 /* Enable the DMA request */
bogdanm 0:9b334a45a8ff 769 HAL_DMA_Start_IT(hswpmi->hdmarx, (uint32_t)&hswpmi->Instance->RDR, (uint32_t)hswpmi->pRxBuffPtr, Size);
bogdanm 0:9b334a45a8ff 770
bogdanm 0:9b334a45a8ff 771 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 772 __HAL_UNLOCK(hswpmi);
bogdanm 0:9b334a45a8ff 773
bogdanm 0:9b334a45a8ff 774 /* Enable the DMA transfer for the receiver request by setting the RXDMA bit
bogdanm 0:9b334a45a8ff 775 in the SWPMI CR register */
bogdanm 0:9b334a45a8ff 776 SET_BIT(hswpmi->Instance->CR, SWPMI_CR_RXDMA);
bogdanm 0:9b334a45a8ff 777 }
bogdanm 0:9b334a45a8ff 778 else
bogdanm 0:9b334a45a8ff 779 {
bogdanm 0:9b334a45a8ff 780 status = HAL_BUSY;
bogdanm 0:9b334a45a8ff 781
bogdanm 0:9b334a45a8ff 782 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 783 __HAL_UNLOCK(hswpmi);
bogdanm 0:9b334a45a8ff 784 }
bogdanm 0:9b334a45a8ff 785 }
bogdanm 0:9b334a45a8ff 786
bogdanm 0:9b334a45a8ff 787 return status;
bogdanm 0:9b334a45a8ff 788 }
bogdanm 0:9b334a45a8ff 789
bogdanm 0:9b334a45a8ff 790 /**
bogdanm 0:9b334a45a8ff 791 * @brief Stop all DMA transfers.
bogdanm 0:9b334a45a8ff 792 * @param hswpmi: SWPMI handle
bogdanm 0:9b334a45a8ff 793 * @retval HAL_OK
bogdanm 0:9b334a45a8ff 794 */
bogdanm 0:9b334a45a8ff 795 HAL_StatusTypeDef HAL_SWPMI_DMAStop(SWPMI_HandleTypeDef *hswpmi)
bogdanm 0:9b334a45a8ff 796 {
bogdanm 0:9b334a45a8ff 797 /* Process Locked */
bogdanm 0:9b334a45a8ff 798 __HAL_LOCK(hswpmi);
bogdanm 0:9b334a45a8ff 799
bogdanm 0:9b334a45a8ff 800 /* Disable the SWPMI Tx/Rx DMA requests */
bogdanm 0:9b334a45a8ff 801 CLEAR_BIT(hswpmi->Instance->CR, (SWPMI_CR_TXDMA | SWPMI_CR_RXDMA));
bogdanm 0:9b334a45a8ff 802
bogdanm 0:9b334a45a8ff 803 /* Abort the SWPMI DMA tx channel */
bogdanm 0:9b334a45a8ff 804 if(hswpmi->hdmatx != NULL)
bogdanm 0:9b334a45a8ff 805 {
bogdanm 0:9b334a45a8ff 806 HAL_DMA_Abort(hswpmi->hdmatx);
bogdanm 0:9b334a45a8ff 807 }
bogdanm 0:9b334a45a8ff 808 /* Abort the SWPMI DMA rx channel */
bogdanm 0:9b334a45a8ff 809 if(hswpmi->hdmarx != NULL)
bogdanm 0:9b334a45a8ff 810 {
bogdanm 0:9b334a45a8ff 811 HAL_DMA_Abort(hswpmi->hdmarx);
bogdanm 0:9b334a45a8ff 812 }
bogdanm 0:9b334a45a8ff 813
bogdanm 0:9b334a45a8ff 814 /* Disable SWPMI interface */
bogdanm 0:9b334a45a8ff 815 CLEAR_BIT(hswpmi->Instance->CR, SWPMI_CR_SWPACT);
bogdanm 0:9b334a45a8ff 816
bogdanm 0:9b334a45a8ff 817 hswpmi->State = HAL_SWPMI_STATE_READY;
bogdanm 0:9b334a45a8ff 818
bogdanm 0:9b334a45a8ff 819 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 820 __HAL_UNLOCK(hswpmi);
bogdanm 0:9b334a45a8ff 821
bogdanm 0:9b334a45a8ff 822 return HAL_OK;
bogdanm 0:9b334a45a8ff 823 }
bogdanm 0:9b334a45a8ff 824
bogdanm 0:9b334a45a8ff 825
bogdanm 0:9b334a45a8ff 826 /**
bogdanm 0:9b334a45a8ff 827 * @brief Enable the Loopback mode.
bogdanm 0:9b334a45a8ff 828 * @param hswpmi: SWPMI handle
bogdanm 0:9b334a45a8ff 829 * @note Loopback mode is to be used only for test purposes
bogdanm 0:9b334a45a8ff 830 * @retval HAL_OK / HAL_BUSY
bogdanm 0:9b334a45a8ff 831 */
bogdanm 0:9b334a45a8ff 832 HAL_StatusTypeDef HAL_SWPMI_EnableLoopback(SWPMI_HandleTypeDef *hswpmi)
bogdanm 0:9b334a45a8ff 833 {
bogdanm 0:9b334a45a8ff 834 HAL_StatusTypeDef status = HAL_OK;
bogdanm 0:9b334a45a8ff 835
bogdanm 0:9b334a45a8ff 836 /* Process Locked */
bogdanm 0:9b334a45a8ff 837 __HAL_LOCK(hswpmi);
bogdanm 0:9b334a45a8ff 838
bogdanm 0:9b334a45a8ff 839 /* Check SWPMI not enabled */
bogdanm 0:9b334a45a8ff 840 if(READ_BIT(hswpmi->Instance->CR, SWPMI_CR_SWPACT) != RESET)
bogdanm 0:9b334a45a8ff 841 {
bogdanm 0:9b334a45a8ff 842 status = HAL_BUSY;
bogdanm 0:9b334a45a8ff 843 }
bogdanm 0:9b334a45a8ff 844 else
bogdanm 0:9b334a45a8ff 845 {
bogdanm 0:9b334a45a8ff 846 /* Set Loopback */
bogdanm 0:9b334a45a8ff 847 SET_BIT(hswpmi->Instance->CR, SWPMI_CR_LPBK);
bogdanm 0:9b334a45a8ff 848 }
bogdanm 0:9b334a45a8ff 849
bogdanm 0:9b334a45a8ff 850 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 851 __HAL_UNLOCK(hswpmi);
bogdanm 0:9b334a45a8ff 852
bogdanm 0:9b334a45a8ff 853 return status;
bogdanm 0:9b334a45a8ff 854 }
bogdanm 0:9b334a45a8ff 855
bogdanm 0:9b334a45a8ff 856 /**
bogdanm 0:9b334a45a8ff 857 * @brief Disable the Loopback mode.
bogdanm 0:9b334a45a8ff 858 * @param hswpmi: SWPMI handle
bogdanm 0:9b334a45a8ff 859 * @note Loopback mode is to be used only for test purposes
bogdanm 0:9b334a45a8ff 860 * @retval HAL_OK / HAL_BUSY
bogdanm 0:9b334a45a8ff 861 */
bogdanm 0:9b334a45a8ff 862 HAL_StatusTypeDef HAL_SWPMI_DisableLoopback(SWPMI_HandleTypeDef *hswpmi)
bogdanm 0:9b334a45a8ff 863 {
bogdanm 0:9b334a45a8ff 864 HAL_StatusTypeDef status = HAL_OK;
bogdanm 0:9b334a45a8ff 865
bogdanm 0:9b334a45a8ff 866 /* Process Locked */
bogdanm 0:9b334a45a8ff 867 __HAL_LOCK(hswpmi);
bogdanm 0:9b334a45a8ff 868
bogdanm 0:9b334a45a8ff 869 /* Check SWPMI not enabled */
bogdanm 0:9b334a45a8ff 870 if(READ_BIT(hswpmi->Instance->CR, SWPMI_CR_SWPACT) != RESET)
bogdanm 0:9b334a45a8ff 871 {
bogdanm 0:9b334a45a8ff 872 status = HAL_BUSY;
bogdanm 0:9b334a45a8ff 873 }
bogdanm 0:9b334a45a8ff 874 else
bogdanm 0:9b334a45a8ff 875 {
bogdanm 0:9b334a45a8ff 876 /* Reset Loopback */
bogdanm 0:9b334a45a8ff 877 CLEAR_BIT(hswpmi->Instance->CR, SWPMI_CR_LPBK);
bogdanm 0:9b334a45a8ff 878 }
bogdanm 0:9b334a45a8ff 879
bogdanm 0:9b334a45a8ff 880 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 881 __HAL_UNLOCK(hswpmi);
bogdanm 0:9b334a45a8ff 882
bogdanm 0:9b334a45a8ff 883 return status;
bogdanm 0:9b334a45a8ff 884 }
bogdanm 0:9b334a45a8ff 885
bogdanm 0:9b334a45a8ff 886 /**
bogdanm 0:9b334a45a8ff 887 * @}
bogdanm 0:9b334a45a8ff 888 */
bogdanm 0:9b334a45a8ff 889
bogdanm 0:9b334a45a8ff 890 /** @defgroup SWPMI_Exported_Group3 SWPMI IRQ handler and callbacks
bogdanm 0:9b334a45a8ff 891 * @brief SWPMI IRQ handler.
bogdanm 0:9b334a45a8ff 892 *
bogdanm 0:9b334a45a8ff 893 @verbatim
bogdanm 0:9b334a45a8ff 894 ==============================================================================
bogdanm 0:9b334a45a8ff 895 ##### SWPMI IRQ handler and callbacks #####
bogdanm 0:9b334a45a8ff 896 ==============================================================================
bogdanm 0:9b334a45a8ff 897 [..] This section provides SWPMI IRQ handler and callback functions called within
bogdanm 0:9b334a45a8ff 898 the IRQ handler.
bogdanm 0:9b334a45a8ff 899
bogdanm 0:9b334a45a8ff 900 @endverbatim
bogdanm 0:9b334a45a8ff 901 * @{
bogdanm 0:9b334a45a8ff 902 */
bogdanm 0:9b334a45a8ff 903
bogdanm 0:9b334a45a8ff 904 /**
bogdanm 0:9b334a45a8ff 905 * @brief Handle SWPMI interrupt request.
bogdanm 0:9b334a45a8ff 906 * @param hswpmi: SWPMI handle
bogdanm 0:9b334a45a8ff 907 * @retval None
bogdanm 0:9b334a45a8ff 908 */
bogdanm 0:9b334a45a8ff 909 void HAL_SWPMI_IRQHandler(SWPMI_HandleTypeDef *hswpmi)
bogdanm 0:9b334a45a8ff 910 {
bogdanm 0:9b334a45a8ff 911 uint32_t regisr = READ_REG(hswpmi->Instance->ISR);
bogdanm 0:9b334a45a8ff 912 uint32_t regier = READ_REG(hswpmi->Instance->IER);
bogdanm 0:9b334a45a8ff 913
bogdanm 0:9b334a45a8ff 914 /* SWPMI CRC error interrupt occurred --------------------------------------*/
bogdanm 0:9b334a45a8ff 915 if(((regisr & SWPMI_FLAG_RXBERF) != RESET) && ((regier & SWPMI_IT_RXBERIE) != RESET))
bogdanm 0:9b334a45a8ff 916 {
bogdanm 0:9b334a45a8ff 917 /* Disable Receive CRC interrupt */
bogdanm 0:9b334a45a8ff 918 CLEAR_BIT(hswpmi->Instance->IER, SWPMI_IT_RXBERIE | SWPMI_IT_RXBFIE);
bogdanm 0:9b334a45a8ff 919 /* Clear Receive CRC and Receive buffer full flag */
bogdanm 0:9b334a45a8ff 920 WRITE_REG(hswpmi->Instance->ICR, SWPMI_FLAG_RXBERF | SWPMI_FLAG_RXBFF);
bogdanm 0:9b334a45a8ff 921
bogdanm 0:9b334a45a8ff 922 hswpmi->ErrorCode |= HAL_SWPMI_ERROR_CRC;
bogdanm 0:9b334a45a8ff 923 }
bogdanm 0:9b334a45a8ff 924
bogdanm 0:9b334a45a8ff 925 /* SWPMI Over-Run interrupt occurred -----------------------------------------*/
bogdanm 0:9b334a45a8ff 926 if(((regisr & SWPMI_FLAG_RXOVRF) != RESET) && ((regier & SWPMI_IT_RXOVRIE) != RESET))
bogdanm 0:9b334a45a8ff 927 {
bogdanm 0:9b334a45a8ff 928 /* Disable Receive overrun interrupt */
bogdanm 0:9b334a45a8ff 929 CLEAR_BIT(hswpmi->Instance->IER, SWPMI_IT_RXOVRIE);
bogdanm 0:9b334a45a8ff 930 /* Clear Receive overrun flag */
bogdanm 0:9b334a45a8ff 931 WRITE_REG(hswpmi->Instance->ICR, SWPMI_FLAG_RXOVRF);
bogdanm 0:9b334a45a8ff 932
bogdanm 0:9b334a45a8ff 933 hswpmi->ErrorCode |= HAL_SWPMI_ERROR_OVR;
bogdanm 0:9b334a45a8ff 934 }
bogdanm 0:9b334a45a8ff 935
bogdanm 0:9b334a45a8ff 936 /* SWPMI Under-Run interrupt occurred -----------------------------------------*/
bogdanm 0:9b334a45a8ff 937 if(((regisr & SWPMI_FLAG_TXUNRF) != RESET) && ((regier & SWPMI_IT_TXUNRIE) != RESET))
bogdanm 0:9b334a45a8ff 938 {
bogdanm 0:9b334a45a8ff 939 /* Disable Transmit under run interrupt */
bogdanm 0:9b334a45a8ff 940 CLEAR_BIT(hswpmi->Instance->IER, SWPMI_IT_TXUNRIE);
bogdanm 0:9b334a45a8ff 941 /* Clear Transmit under run flag */
bogdanm 0:9b334a45a8ff 942 WRITE_REG(hswpmi->Instance->ICR, SWPMI_FLAG_TXUNRF);
bogdanm 0:9b334a45a8ff 943
bogdanm 0:9b334a45a8ff 944 hswpmi->ErrorCode |= HAL_SWPMI_ERROR_UDR;
bogdanm 0:9b334a45a8ff 945 }
bogdanm 0:9b334a45a8ff 946
bogdanm 0:9b334a45a8ff 947 /* Call SWPMI Error Call back function if need be --------------------------*/
bogdanm 0:9b334a45a8ff 948 if(hswpmi->ErrorCode != HAL_SWPMI_ERROR_NONE)
bogdanm 0:9b334a45a8ff 949 {
bogdanm 0:9b334a45a8ff 950 /* Set the SWPMI state ready to be able to start again the process */
bogdanm 0:9b334a45a8ff 951 hswpmi->State = HAL_SWPMI_STATE_READY;
bogdanm 0:9b334a45a8ff 952
bogdanm 0:9b334a45a8ff 953 HAL_SWPMI_ErrorCallback(hswpmi);
bogdanm 0:9b334a45a8ff 954 }
bogdanm 0:9b334a45a8ff 955
bogdanm 0:9b334a45a8ff 956 /* SWPMI in mode Receiver ---------------------------------------------------*/
bogdanm 0:9b334a45a8ff 957 if(((regisr & SWPMI_FLAG_RXNE) != RESET) && ((regier & SWPMI_IT_RIE) != RESET))
bogdanm 0:9b334a45a8ff 958 {
bogdanm 0:9b334a45a8ff 959 SWPMI_Receive_IT(hswpmi);
bogdanm 0:9b334a45a8ff 960 }
bogdanm 0:9b334a45a8ff 961
bogdanm 0:9b334a45a8ff 962 /* SWPMI in mode Transmitter ------------------------------------------------*/
bogdanm 0:9b334a45a8ff 963 if(((regisr & SWPMI_FLAG_TXE) != RESET) && ((regier & SWPMI_IT_TIE) != RESET))
bogdanm 0:9b334a45a8ff 964 {
bogdanm 0:9b334a45a8ff 965 SWPMI_Transmit_IT(hswpmi);
bogdanm 0:9b334a45a8ff 966 }
bogdanm 0:9b334a45a8ff 967
bogdanm 0:9b334a45a8ff 968 /* SWPMI in mode Transmitter (Transmit buffer empty) ------------------------*/
bogdanm 0:9b334a45a8ff 969 if(((regisr & SWPMI_FLAG_TXBEF) != RESET) && ((regier & SWPMI_IT_TXBEIE) != RESET))
bogdanm 0:9b334a45a8ff 970 {
bogdanm 0:9b334a45a8ff 971 SWPMI_EndTransmit_IT(hswpmi);
bogdanm 0:9b334a45a8ff 972 }
bogdanm 0:9b334a45a8ff 973
bogdanm 0:9b334a45a8ff 974 /* SWPMI in mode Receiver (Receive buffer full) -----------------------------*/
bogdanm 0:9b334a45a8ff 975 if(((regisr & SWPMI_FLAG_RXBFF) != RESET) && ((regier & SWPMI_IT_RXBFIE) != RESET))
bogdanm 0:9b334a45a8ff 976 {
bogdanm 0:9b334a45a8ff 977 SWPMI_EndReceive_IT(hswpmi);
bogdanm 0:9b334a45a8ff 978 }
bogdanm 0:9b334a45a8ff 979
bogdanm 0:9b334a45a8ff 980 /* Both Transmission and reception complete ---------------------------------*/
bogdanm 0:9b334a45a8ff 981 if(((regisr & SWPMI_FLAG_TCF) != RESET) && ((regier & SWPMI_IT_TCIE) != RESET))
bogdanm 0:9b334a45a8ff 982 {
bogdanm 0:9b334a45a8ff 983 SWPMI_EndTransmitReceive_IT(hswpmi);
bogdanm 0:9b334a45a8ff 984 }
bogdanm 0:9b334a45a8ff 985 }
bogdanm 0:9b334a45a8ff 986
bogdanm 0:9b334a45a8ff 987 /**
bogdanm 0:9b334a45a8ff 988 * @brief Tx Transfer completed callback.
bogdanm 0:9b334a45a8ff 989 * @param hswpmi: SWPMI handle
bogdanm 0:9b334a45a8ff 990 * @retval None
bogdanm 0:9b334a45a8ff 991 */
bogdanm 0:9b334a45a8ff 992 __weak void HAL_SWPMI_TxCpltCallback(SWPMI_HandleTypeDef *hswpmi)
bogdanm 0:9b334a45a8ff 993 {
bogdanm 0:9b334a45a8ff 994 /* NOTE : This function should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 995 the HAL_SWPMI_TxCpltCallback is to be implemented in the user file
bogdanm 0:9b334a45a8ff 996 */
bogdanm 0:9b334a45a8ff 997 }
bogdanm 0:9b334a45a8ff 998
bogdanm 0:9b334a45a8ff 999 /**
bogdanm 0:9b334a45a8ff 1000 * @brief Tx Half Transfer completed callback.
bogdanm 0:9b334a45a8ff 1001 * @param hswpmi: SWPMI handle
bogdanm 0:9b334a45a8ff 1002 * @retval None
bogdanm 0:9b334a45a8ff 1003 */
bogdanm 0:9b334a45a8ff 1004 __weak void HAL_SWPMI_TxHalfCpltCallback(SWPMI_HandleTypeDef *hswpmi)
bogdanm 0:9b334a45a8ff 1005 {
bogdanm 0:9b334a45a8ff 1006 /* NOTE: This function should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 1007 the HAL_SWPMI_TxHalfCpltCallback is to be implemented in the user file
bogdanm 0:9b334a45a8ff 1008 */
bogdanm 0:9b334a45a8ff 1009 }
bogdanm 0:9b334a45a8ff 1010
bogdanm 0:9b334a45a8ff 1011 /**
bogdanm 0:9b334a45a8ff 1012 * @brief Rx Transfer completed callback.
bogdanm 0:9b334a45a8ff 1013 * @param hswpmi: SWPMI handle
bogdanm 0:9b334a45a8ff 1014 * @retval None
bogdanm 0:9b334a45a8ff 1015 */
bogdanm 0:9b334a45a8ff 1016 __weak void HAL_SWPMI_RxCpltCallback(SWPMI_HandleTypeDef *hswpmi)
bogdanm 0:9b334a45a8ff 1017 {
bogdanm 0:9b334a45a8ff 1018 /* NOTE : This function should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 1019 the HAL_SWPMI_RxCpltCallback is to be implemented in the user file
bogdanm 0:9b334a45a8ff 1020 */
bogdanm 0:9b334a45a8ff 1021 }
bogdanm 0:9b334a45a8ff 1022
bogdanm 0:9b334a45a8ff 1023 /**
bogdanm 0:9b334a45a8ff 1024 * @brief Rx Half Transfer completed callback.
bogdanm 0:9b334a45a8ff 1025 * @param hswpmi: SWPMI handle
bogdanm 0:9b334a45a8ff 1026 * @retval None
bogdanm 0:9b334a45a8ff 1027 */
bogdanm 0:9b334a45a8ff 1028 __weak void HAL_SWPMI_RxHalfCpltCallback(SWPMI_HandleTypeDef *hswpmi)
bogdanm 0:9b334a45a8ff 1029 {
bogdanm 0:9b334a45a8ff 1030 /* NOTE: This function should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 1031 the HAL_SWPMI_RxHalfCpltCallback is to be implemented in the user file
bogdanm 0:9b334a45a8ff 1032 */
bogdanm 0:9b334a45a8ff 1033 }
bogdanm 0:9b334a45a8ff 1034
bogdanm 0:9b334a45a8ff 1035 /**
bogdanm 0:9b334a45a8ff 1036 * @brief SWPMI error callback.
bogdanm 0:9b334a45a8ff 1037 * @param hswpmi: SWPMI handle
bogdanm 0:9b334a45a8ff 1038 * @retval None
bogdanm 0:9b334a45a8ff 1039 */
bogdanm 0:9b334a45a8ff 1040 __weak void HAL_SWPMI_ErrorCallback(SWPMI_HandleTypeDef *hswpmi)
bogdanm 0:9b334a45a8ff 1041 {
bogdanm 0:9b334a45a8ff 1042 /* NOTE : This function should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 1043 the HAL_SWPMI_ErrorCallback is to be implemented in the user file
bogdanm 0:9b334a45a8ff 1044 */
bogdanm 0:9b334a45a8ff 1045 }
bogdanm 0:9b334a45a8ff 1046
bogdanm 0:9b334a45a8ff 1047 /**
bogdanm 0:9b334a45a8ff 1048 * @}
bogdanm 0:9b334a45a8ff 1049 */
bogdanm 0:9b334a45a8ff 1050
bogdanm 0:9b334a45a8ff 1051 /** @defgroup SWPMI_Exported_Group4 Peripheral Control methods
bogdanm 0:9b334a45a8ff 1052 * @brief SWPMI control functions
bogdanm 0:9b334a45a8ff 1053 *
bogdanm 0:9b334a45a8ff 1054 @verbatim
bogdanm 0:9b334a45a8ff 1055 ===============================================================================
bogdanm 0:9b334a45a8ff 1056 ##### Peripheral Control methods #####
bogdanm 0:9b334a45a8ff 1057 ===============================================================================
bogdanm 0:9b334a45a8ff 1058 [..]
bogdanm 0:9b334a45a8ff 1059 This subsection provides a set of functions allowing to control the SWPMI.
bogdanm 0:9b334a45a8ff 1060 (+) HAL_SWPMI_GetState() API is helpful to check in run-time the state of the SWPMI peripheral
bogdanm 0:9b334a45a8ff 1061 (+) HAL_SWPMI_GetError() API is helpful to check in run-time the error state of the SWPMI peripheral
bogdanm 0:9b334a45a8ff 1062 @endverbatim
bogdanm 0:9b334a45a8ff 1063 * @{
bogdanm 0:9b334a45a8ff 1064 */
bogdanm 0:9b334a45a8ff 1065
bogdanm 0:9b334a45a8ff 1066 /**
bogdanm 0:9b334a45a8ff 1067 * @brief Return the SWPMI handle state.
bogdanm 0:9b334a45a8ff 1068 * @param hswpmi: SWPMI handle
bogdanm 0:9b334a45a8ff 1069 * @retval HAL state
bogdanm 0:9b334a45a8ff 1070 */
bogdanm 0:9b334a45a8ff 1071 HAL_SWPMI_StateTypeDef HAL_SWPMI_GetState(SWPMI_HandleTypeDef *hswpmi)
bogdanm 0:9b334a45a8ff 1072 {
bogdanm 0:9b334a45a8ff 1073 /* Return SWPMI handle state */
bogdanm 0:9b334a45a8ff 1074 return hswpmi->State;
bogdanm 0:9b334a45a8ff 1075 }
bogdanm 0:9b334a45a8ff 1076
bogdanm 0:9b334a45a8ff 1077 /**
bogdanm 0:9b334a45a8ff 1078 * @brief Return the SWPMI error code.
bogdanm 0:9b334a45a8ff 1079 * @param hswpmi : pointer to a SWPMI_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 1080 * the configuration information for the specified SWPMI.
bogdanm 0:9b334a45a8ff 1081 * @retval SWPMI Error Code
bogdanm 0:9b334a45a8ff 1082 */
bogdanm 0:9b334a45a8ff 1083 uint32_t HAL_SWPMI_GetError(SWPMI_HandleTypeDef *hswpmi)
bogdanm 0:9b334a45a8ff 1084 {
bogdanm 0:9b334a45a8ff 1085 return hswpmi->ErrorCode;
bogdanm 0:9b334a45a8ff 1086 }
bogdanm 0:9b334a45a8ff 1087
bogdanm 0:9b334a45a8ff 1088 /**
bogdanm 0:9b334a45a8ff 1089 * @}
bogdanm 0:9b334a45a8ff 1090 */
bogdanm 0:9b334a45a8ff 1091
bogdanm 0:9b334a45a8ff 1092 /* Private functions ---------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 1093
bogdanm 0:9b334a45a8ff 1094 /** @defgroup SWPMI_Private_Functions SWPMI Private Functions
bogdanm 0:9b334a45a8ff 1095 * @{
bogdanm 0:9b334a45a8ff 1096 */
bogdanm 0:9b334a45a8ff 1097
bogdanm 0:9b334a45a8ff 1098 /**
bogdanm 0:9b334a45a8ff 1099 * @brief Transmit an amount of data in interrupt mode.
bogdanm 0:9b334a45a8ff 1100 * @note Function called under interruption only, once interruptions have been enabled by HAL_SWPMI_Transmit_IT()
bogdanm 0:9b334a45a8ff 1101 * @param hswpmi: SWPMI handle
bogdanm 0:9b334a45a8ff 1102 * @retval HAL status
bogdanm 0:9b334a45a8ff 1103 */
bogdanm 0:9b334a45a8ff 1104 static HAL_StatusTypeDef SWPMI_Transmit_IT(SWPMI_HandleTypeDef *hswpmi)
bogdanm 0:9b334a45a8ff 1105 {
bogdanm 0:9b334a45a8ff 1106 HAL_StatusTypeDef status = HAL_OK;
bogdanm 0:9b334a45a8ff 1107
bogdanm 0:9b334a45a8ff 1108 if ((hswpmi->State == HAL_SWPMI_STATE_BUSY_TX) || (hswpmi->State == HAL_SWPMI_STATE_BUSY_TX_RX))
bogdanm 0:9b334a45a8ff 1109 {
bogdanm 0:9b334a45a8ff 1110 if(hswpmi->TxXferCount == 0)
bogdanm 0:9b334a45a8ff 1111 {
bogdanm 0:9b334a45a8ff 1112 /* Disable the SWPMI TXE and Underrun Interrupts */
bogdanm 0:9b334a45a8ff 1113 CLEAR_BIT(hswpmi->Instance->IER, (SWPMI_IT_TIE | SWPMI_IT_TXUNRIE));
bogdanm 0:9b334a45a8ff 1114 }
bogdanm 0:9b334a45a8ff 1115 else
bogdanm 0:9b334a45a8ff 1116 {
bogdanm 0:9b334a45a8ff 1117 hswpmi->Instance->TDR = (uint32_t)(*hswpmi->pTxBuffPtr++);
bogdanm 0:9b334a45a8ff 1118 hswpmi->TxXferCount--;
bogdanm 0:9b334a45a8ff 1119 }
bogdanm 0:9b334a45a8ff 1120 }
bogdanm 0:9b334a45a8ff 1121 else
bogdanm 0:9b334a45a8ff 1122 {
bogdanm 0:9b334a45a8ff 1123 status = HAL_BUSY;
bogdanm 0:9b334a45a8ff 1124 }
bogdanm 0:9b334a45a8ff 1125
bogdanm 0:9b334a45a8ff 1126 return status;
bogdanm 0:9b334a45a8ff 1127 }
bogdanm 0:9b334a45a8ff 1128
bogdanm 0:9b334a45a8ff 1129 /**
bogdanm 0:9b334a45a8ff 1130 * @brief Wraps up transmission in non-blocking mode.
bogdanm 0:9b334a45a8ff 1131 * @param hswpmi: SWPMI handle
bogdanm 0:9b334a45a8ff 1132 * @retval HAL status
bogdanm 0:9b334a45a8ff 1133 * @retval HAL status
bogdanm 0:9b334a45a8ff 1134 */
bogdanm 0:9b334a45a8ff 1135 static HAL_StatusTypeDef SWPMI_EndTransmit_IT(SWPMI_HandleTypeDef *hswpmi)
bogdanm 0:9b334a45a8ff 1136 {
bogdanm 0:9b334a45a8ff 1137 /* Clear the SWPMI Transmit buffer empty Flag */
bogdanm 0:9b334a45a8ff 1138 WRITE_REG(hswpmi->Instance->ICR, SWPMI_FLAG_TXBEF);
bogdanm 0:9b334a45a8ff 1139 /* Disable the all SWPMI Transmit Interrupts */
bogdanm 0:9b334a45a8ff 1140 CLEAR_BIT(hswpmi->Instance->IER, SWPMI_IT_TIE | SWPMI_IT_TXUNRIE | SWPMI_IT_TXBEIE);
bogdanm 0:9b334a45a8ff 1141
bogdanm 0:9b334a45a8ff 1142 /* Check if a receive Process is ongoing or not */
bogdanm 0:9b334a45a8ff 1143 if(hswpmi->State == HAL_SWPMI_STATE_BUSY_TX_RX)
bogdanm 0:9b334a45a8ff 1144 {
bogdanm 0:9b334a45a8ff 1145 hswpmi->State = HAL_SWPMI_STATE_BUSY_RX;
bogdanm 0:9b334a45a8ff 1146 }
bogdanm 0:9b334a45a8ff 1147 else
bogdanm 0:9b334a45a8ff 1148 {
bogdanm 0:9b334a45a8ff 1149 hswpmi->State = HAL_SWPMI_STATE_READY;
bogdanm 0:9b334a45a8ff 1150 }
bogdanm 0:9b334a45a8ff 1151
bogdanm 0:9b334a45a8ff 1152 HAL_SWPMI_TxCpltCallback(hswpmi);
bogdanm 0:9b334a45a8ff 1153
bogdanm 0:9b334a45a8ff 1154 return HAL_OK;
bogdanm 0:9b334a45a8ff 1155 }
bogdanm 0:9b334a45a8ff 1156
bogdanm 0:9b334a45a8ff 1157 /**
bogdanm 0:9b334a45a8ff 1158 * @brief Receive an amount of data in interrupt mode.
bogdanm 0:9b334a45a8ff 1159 * @note Function called under interruption only, once interruptions have been enabled by HAL_SWPMI_Receive_IT()
bogdanm 0:9b334a45a8ff 1160 * @param hswpmi: SWPMI handle
bogdanm 0:9b334a45a8ff 1161 * @retval HAL status
bogdanm 0:9b334a45a8ff 1162 */
bogdanm 0:9b334a45a8ff 1163 static HAL_StatusTypeDef SWPMI_Receive_IT(SWPMI_HandleTypeDef *hswpmi)
bogdanm 0:9b334a45a8ff 1164 {
bogdanm 0:9b334a45a8ff 1165 HAL_StatusTypeDef status = HAL_OK;
bogdanm 0:9b334a45a8ff 1166
bogdanm 0:9b334a45a8ff 1167 if((hswpmi->State == HAL_SWPMI_STATE_BUSY_RX) || (hswpmi->State == HAL_SWPMI_STATE_BUSY_TX_RX))
bogdanm 0:9b334a45a8ff 1168 {
bogdanm 0:9b334a45a8ff 1169 *hswpmi->pRxBuffPtr++ = (uint32_t)(hswpmi->Instance->RDR);
bogdanm 0:9b334a45a8ff 1170
bogdanm 0:9b334a45a8ff 1171 if(--hswpmi->RxXferCount == 0)
bogdanm 0:9b334a45a8ff 1172 {
bogdanm 0:9b334a45a8ff 1173 /* Wait for RXBFF flag to update state */
bogdanm 0:9b334a45a8ff 1174 HAL_SWPMI_RxCpltCallback(hswpmi);
bogdanm 0:9b334a45a8ff 1175 }
bogdanm 0:9b334a45a8ff 1176 }
bogdanm 0:9b334a45a8ff 1177 else
bogdanm 0:9b334a45a8ff 1178 {
bogdanm 0:9b334a45a8ff 1179 status = HAL_BUSY;
bogdanm 0:9b334a45a8ff 1180 }
bogdanm 0:9b334a45a8ff 1181
bogdanm 0:9b334a45a8ff 1182 return status;
bogdanm 0:9b334a45a8ff 1183 }
bogdanm 0:9b334a45a8ff 1184
bogdanm 0:9b334a45a8ff 1185 /**
bogdanm 0:9b334a45a8ff 1186 * @brief Wraps up reception in non-blocking mode.
bogdanm 0:9b334a45a8ff 1187 * @param hswpmi: SWPMI handle
bogdanm 0:9b334a45a8ff 1188 * @retval HAL status
bogdanm 0:9b334a45a8ff 1189 * @retval HAL status
bogdanm 0:9b334a45a8ff 1190 */
bogdanm 0:9b334a45a8ff 1191 static HAL_StatusTypeDef SWPMI_EndReceive_IT(SWPMI_HandleTypeDef *hswpmi)
bogdanm 0:9b334a45a8ff 1192 {
bogdanm 0:9b334a45a8ff 1193 /* Clear the SWPMI Receive buffer full Flag */
bogdanm 0:9b334a45a8ff 1194 WRITE_REG(hswpmi->Instance->ICR, SWPMI_FLAG_RXBFF);
bogdanm 0:9b334a45a8ff 1195 /* Disable the all SWPMI Receive Interrupts */
bogdanm 0:9b334a45a8ff 1196 CLEAR_BIT(hswpmi->Instance->IER, SWPMI_IT_RIE | SWPMI_IT_RXBERIE | SWPMI_IT_RXOVRIE | SWPMI_IT_RXBFIE);
bogdanm 0:9b334a45a8ff 1197
bogdanm 0:9b334a45a8ff 1198 /* Check if a transmit Process is ongoing or not */
bogdanm 0:9b334a45a8ff 1199 if(hswpmi->State == HAL_SWPMI_STATE_BUSY_TX_RX)
bogdanm 0:9b334a45a8ff 1200 {
bogdanm 0:9b334a45a8ff 1201 hswpmi->State = HAL_SWPMI_STATE_BUSY_TX;
bogdanm 0:9b334a45a8ff 1202 }
bogdanm 0:9b334a45a8ff 1203 else
bogdanm 0:9b334a45a8ff 1204 {
bogdanm 0:9b334a45a8ff 1205 hswpmi->State = HAL_SWPMI_STATE_READY;
bogdanm 0:9b334a45a8ff 1206 }
bogdanm 0:9b334a45a8ff 1207
bogdanm 0:9b334a45a8ff 1208 return HAL_OK;
bogdanm 0:9b334a45a8ff 1209 }
bogdanm 0:9b334a45a8ff 1210
bogdanm 0:9b334a45a8ff 1211 /**
bogdanm 0:9b334a45a8ff 1212 * @brief Wraps up transmission and reception in non-blocking mode.
bogdanm 0:9b334a45a8ff 1213 * @param hswpmi: SWPMI handle
bogdanm 0:9b334a45a8ff 1214 * @retval HAL status
bogdanm 0:9b334a45a8ff 1215 * @retval HAL status
bogdanm 0:9b334a45a8ff 1216 */
bogdanm 0:9b334a45a8ff 1217 static HAL_StatusTypeDef SWPMI_EndTransmitReceive_IT(SWPMI_HandleTypeDef *hswpmi)
bogdanm 0:9b334a45a8ff 1218 {
bogdanm 0:9b334a45a8ff 1219 /* Clear the SWPMI Transmission Complete Flag */
bogdanm 0:9b334a45a8ff 1220 WRITE_REG(hswpmi->Instance->ICR, SWPMI_FLAG_TCF);
bogdanm 0:9b334a45a8ff 1221 /* Disable the SWPMI Transmission Complete Interrupt */
bogdanm 0:9b334a45a8ff 1222 CLEAR_BIT(hswpmi->Instance->IER, SWPMI_IT_TCIE);
bogdanm 0:9b334a45a8ff 1223
bogdanm 0:9b334a45a8ff 1224 /* Check if a receive Process is ongoing or not */
bogdanm 0:9b334a45a8ff 1225 if(hswpmi->State == HAL_SWPMI_STATE_BUSY_TX_RX)
bogdanm 0:9b334a45a8ff 1226 {
bogdanm 0:9b334a45a8ff 1227 hswpmi->State = HAL_SWPMI_STATE_BUSY_RX;
bogdanm 0:9b334a45a8ff 1228 }
bogdanm 0:9b334a45a8ff 1229 else if(hswpmi->State == HAL_SWPMI_STATE_BUSY_TX)
bogdanm 0:9b334a45a8ff 1230 {
bogdanm 0:9b334a45a8ff 1231 hswpmi->State = HAL_SWPMI_STATE_READY;
bogdanm 0:9b334a45a8ff 1232 }
bogdanm 0:9b334a45a8ff 1233
bogdanm 0:9b334a45a8ff 1234 return HAL_OK;
bogdanm 0:9b334a45a8ff 1235 }
bogdanm 0:9b334a45a8ff 1236
bogdanm 0:9b334a45a8ff 1237 /**
bogdanm 0:9b334a45a8ff 1238 * @brief DMA SWPMI transmit process complete callback.
bogdanm 0:9b334a45a8ff 1239 * @param hdma: DMA handle
bogdanm 0:9b334a45a8ff 1240 * @retval None
bogdanm 0:9b334a45a8ff 1241 */
bogdanm 0:9b334a45a8ff 1242 static void SWPMI_DMATransmitCplt(DMA_HandleTypeDef *hdma)
bogdanm 0:9b334a45a8ff 1243 {
bogdanm 0:9b334a45a8ff 1244 SWPMI_HandleTypeDef* hswpmi = ( SWPMI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
bogdanm 0:9b334a45a8ff 1245
bogdanm 0:9b334a45a8ff 1246 /* DMA Normal mode*/
bogdanm 0:9b334a45a8ff 1247 if((hdma->Instance->CCR & DMA_CCR_CIRC) != SET)
bogdanm 0:9b334a45a8ff 1248 {
bogdanm 0:9b334a45a8ff 1249 hswpmi->TxXferCount = 0;
bogdanm 0:9b334a45a8ff 1250
bogdanm 0:9b334a45a8ff 1251 /* Disable the DMA transfer for transmit request by setting the TXDMA bit
bogdanm 0:9b334a45a8ff 1252 in the SWPMI CR register */
bogdanm 0:9b334a45a8ff 1253 CLEAR_BIT(hswpmi->Instance->CR, SWPMI_CR_TXDMA);
bogdanm 0:9b334a45a8ff 1254
bogdanm 0:9b334a45a8ff 1255 /* Wait the TXBEF */
bogdanm 0:9b334a45a8ff 1256 if(SWPMI_WaitOnFlagSetUntilTimeout(hswpmi, SWPMI_FLAG_TXBEF, SWPMI_TIMEOUT_VALUE) != HAL_OK)
bogdanm 0:9b334a45a8ff 1257 {
bogdanm 0:9b334a45a8ff 1258 /* Timeout occurred */
bogdanm 0:9b334a45a8ff 1259 HAL_SWPMI_ErrorCallback(hswpmi);
bogdanm 0:9b334a45a8ff 1260 }
bogdanm 0:9b334a45a8ff 1261 else
bogdanm 0:9b334a45a8ff 1262 {
bogdanm 0:9b334a45a8ff 1263 /* No Timeout */
bogdanm 0:9b334a45a8ff 1264 /* Check if a receive process is ongoing or not */
bogdanm 0:9b334a45a8ff 1265 if(hswpmi->State == HAL_SWPMI_STATE_BUSY_TX_RX)
bogdanm 0:9b334a45a8ff 1266 {
bogdanm 0:9b334a45a8ff 1267 hswpmi->State = HAL_SWPMI_STATE_BUSY_RX;
bogdanm 0:9b334a45a8ff 1268 }
bogdanm 0:9b334a45a8ff 1269 else
bogdanm 0:9b334a45a8ff 1270 {
bogdanm 0:9b334a45a8ff 1271 hswpmi->State = HAL_SWPMI_STATE_READY;
bogdanm 0:9b334a45a8ff 1272 }
bogdanm 0:9b334a45a8ff 1273
bogdanm 0:9b334a45a8ff 1274 HAL_SWPMI_TxCpltCallback(hswpmi);
bogdanm 0:9b334a45a8ff 1275 }
bogdanm 0:9b334a45a8ff 1276 }
bogdanm 0:9b334a45a8ff 1277 /* DMA Circular mode */
bogdanm 0:9b334a45a8ff 1278 else
bogdanm 0:9b334a45a8ff 1279 {
bogdanm 0:9b334a45a8ff 1280 HAL_SWPMI_TxCpltCallback(hswpmi);
bogdanm 0:9b334a45a8ff 1281 }
bogdanm 0:9b334a45a8ff 1282 }
bogdanm 0:9b334a45a8ff 1283
bogdanm 0:9b334a45a8ff 1284 /**
bogdanm 0:9b334a45a8ff 1285 * @brief DMA SWPMI transmit process half complete callback.
bogdanm 0:9b334a45a8ff 1286 * @param hdma : DMA handle
bogdanm 0:9b334a45a8ff 1287 * @retval None
bogdanm 0:9b334a45a8ff 1288 */
bogdanm 0:9b334a45a8ff 1289 static void SWPMI_DMATxHalfCplt(DMA_HandleTypeDef *hdma)
bogdanm 0:9b334a45a8ff 1290 {
bogdanm 0:9b334a45a8ff 1291 SWPMI_HandleTypeDef* hswpmi = (SWPMI_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
bogdanm 0:9b334a45a8ff 1292
bogdanm 0:9b334a45a8ff 1293 HAL_SWPMI_TxHalfCpltCallback(hswpmi);
bogdanm 0:9b334a45a8ff 1294 }
bogdanm 0:9b334a45a8ff 1295
bogdanm 0:9b334a45a8ff 1296
bogdanm 0:9b334a45a8ff 1297 /**
bogdanm 0:9b334a45a8ff 1298 * @brief DMA SWPMI receive process complete callback.
bogdanm 0:9b334a45a8ff 1299 * @param hdma: DMA handle
bogdanm 0:9b334a45a8ff 1300 * @retval None
bogdanm 0:9b334a45a8ff 1301 */
bogdanm 0:9b334a45a8ff 1302 static void SWPMI_DMAReceiveCplt(DMA_HandleTypeDef *hdma)
bogdanm 0:9b334a45a8ff 1303 {
bogdanm 0:9b334a45a8ff 1304 SWPMI_HandleTypeDef* hswpmi = ( SWPMI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
bogdanm 0:9b334a45a8ff 1305
bogdanm 0:9b334a45a8ff 1306 /* DMA Normal mode*/
bogdanm 0:9b334a45a8ff 1307 if((hdma->Instance->CCR & DMA_CCR_CIRC) == RESET)
bogdanm 0:9b334a45a8ff 1308 {
bogdanm 0:9b334a45a8ff 1309 hswpmi->RxXferCount = 0;
bogdanm 0:9b334a45a8ff 1310
bogdanm 0:9b334a45a8ff 1311 /* Disable the DMA transfer for the receiver request by setting the RXDMA bit
bogdanm 0:9b334a45a8ff 1312 in the SWPMI CR register */
bogdanm 0:9b334a45a8ff 1313 CLEAR_BIT(hswpmi->Instance->CR, SWPMI_CR_RXDMA);
bogdanm 0:9b334a45a8ff 1314
bogdanm 0:9b334a45a8ff 1315 /* Check if a transmit Process is ongoing or not */
bogdanm 0:9b334a45a8ff 1316 if(hswpmi->State == HAL_SWPMI_STATE_BUSY_TX_RX)
bogdanm 0:9b334a45a8ff 1317 {
bogdanm 0:9b334a45a8ff 1318 hswpmi->State = HAL_SWPMI_STATE_BUSY_TX;
bogdanm 0:9b334a45a8ff 1319 }
bogdanm 0:9b334a45a8ff 1320 else
bogdanm 0:9b334a45a8ff 1321 {
bogdanm 0:9b334a45a8ff 1322 hswpmi->State = HAL_SWPMI_STATE_READY;
bogdanm 0:9b334a45a8ff 1323 }
bogdanm 0:9b334a45a8ff 1324 }
bogdanm 0:9b334a45a8ff 1325 HAL_SWPMI_RxCpltCallback(hswpmi);
bogdanm 0:9b334a45a8ff 1326 }
bogdanm 0:9b334a45a8ff 1327
bogdanm 0:9b334a45a8ff 1328 /**
bogdanm 0:9b334a45a8ff 1329 * @brief DMA SWPMI receive process half complete callback.
bogdanm 0:9b334a45a8ff 1330 * @param hdma : DMA handle
bogdanm 0:9b334a45a8ff 1331 * @retval None
bogdanm 0:9b334a45a8ff 1332 */
bogdanm 0:9b334a45a8ff 1333 static void SWPMI_DMARxHalfCplt(DMA_HandleTypeDef *hdma)
bogdanm 0:9b334a45a8ff 1334 {
bogdanm 0:9b334a45a8ff 1335 SWPMI_HandleTypeDef* hswpmi = (SWPMI_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
bogdanm 0:9b334a45a8ff 1336
bogdanm 0:9b334a45a8ff 1337 HAL_SWPMI_RxHalfCpltCallback(hswpmi);
bogdanm 0:9b334a45a8ff 1338 }
bogdanm 0:9b334a45a8ff 1339
bogdanm 0:9b334a45a8ff 1340 /**
bogdanm 0:9b334a45a8ff 1341 * @brief DMA SWPMI communication error callback.
bogdanm 0:9b334a45a8ff 1342 * @param hdma: DMA handle
bogdanm 0:9b334a45a8ff 1343 * @retval None
bogdanm 0:9b334a45a8ff 1344 */
bogdanm 0:9b334a45a8ff 1345 static void SWPMI_DMAError(DMA_HandleTypeDef *hdma)
bogdanm 0:9b334a45a8ff 1346 {
bogdanm 0:9b334a45a8ff 1347 SWPMI_HandleTypeDef* hswpmi = ( SWPMI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
bogdanm 0:9b334a45a8ff 1348
bogdanm 0:9b334a45a8ff 1349 /* Update handle */
bogdanm 0:9b334a45a8ff 1350 hswpmi->RxXferCount = 0;
bogdanm 0:9b334a45a8ff 1351 hswpmi->TxXferCount = 0;
bogdanm 0:9b334a45a8ff 1352 hswpmi->State= HAL_SWPMI_STATE_READY;
bogdanm 0:9b334a45a8ff 1353 hswpmi->ErrorCode |= HAL_SWPMI_ERROR_DMA;
bogdanm 0:9b334a45a8ff 1354
bogdanm 0:9b334a45a8ff 1355 HAL_SWPMI_ErrorCallback(hswpmi);
bogdanm 0:9b334a45a8ff 1356 }
bogdanm 0:9b334a45a8ff 1357
bogdanm 0:9b334a45a8ff 1358 /**
bogdanm 0:9b334a45a8ff 1359 * @brief Handle SWPMI Communication Timeout.
bogdanm 0:9b334a45a8ff 1360 * @param hswpmi: SWPMI handle
bogdanm 0:9b334a45a8ff 1361 * @param Flag: specifies the SWPMI flag to check.
bogdanm 0:9b334a45a8ff 1362 * @param Timeout: Timeout duration
bogdanm 0:9b334a45a8ff 1363 * @retval HAL status
bogdanm 0:9b334a45a8ff 1364 */
bogdanm 0:9b334a45a8ff 1365 static HAL_StatusTypeDef SWPMI_WaitOnFlagSetUntilTimeout(SWPMI_HandleTypeDef *hswpmi, uint32_t Flag, uint32_t Timeout)
bogdanm 0:9b334a45a8ff 1366 {
bogdanm 0:9b334a45a8ff 1367 uint32_t tickstart = HAL_GetTick();
bogdanm 0:9b334a45a8ff 1368 HAL_StatusTypeDef status = HAL_OK;
bogdanm 0:9b334a45a8ff 1369
bogdanm 0:9b334a45a8ff 1370 /* Wait until flag is set */
bogdanm 0:9b334a45a8ff 1371 while(!(HAL_IS_BIT_SET(hswpmi->Instance->ISR, Flag)))
bogdanm 0:9b334a45a8ff 1372 {
bogdanm 0:9b334a45a8ff 1373 /* Check for the Timeout */
bogdanm 0:9b334a45a8ff 1374 if(Timeout != HAL_MAX_DELAY)
bogdanm 0:9b334a45a8ff 1375 {
bogdanm 0:9b334a45a8ff 1376 if((HAL_GetTick() - tickstart ) > Timeout)
bogdanm 0:9b334a45a8ff 1377 {
bogdanm 0:9b334a45a8ff 1378 hswpmi->State = HAL_SWPMI_STATE_TIMEOUT;
bogdanm 0:9b334a45a8ff 1379
bogdanm 0:9b334a45a8ff 1380 status = HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 1381 break;
bogdanm 0:9b334a45a8ff 1382 }
bogdanm 0:9b334a45a8ff 1383 }
bogdanm 0:9b334a45a8ff 1384 }
bogdanm 0:9b334a45a8ff 1385
bogdanm 0:9b334a45a8ff 1386 return status;
bogdanm 0:9b334a45a8ff 1387 }
bogdanm 0:9b334a45a8ff 1388
bogdanm 0:9b334a45a8ff 1389 /**
bogdanm 0:9b334a45a8ff 1390 * @}
bogdanm 0:9b334a45a8ff 1391 */
bogdanm 0:9b334a45a8ff 1392
bogdanm 0:9b334a45a8ff 1393 /**
bogdanm 0:9b334a45a8ff 1394 * @}
bogdanm 0:9b334a45a8ff 1395 */
bogdanm 0:9b334a45a8ff 1396
bogdanm 0:9b334a45a8ff 1397 #endif /* HAL_SWPMI_MODULE_ENABLED */
bogdanm 0:9b334a45a8ff 1398 /**
bogdanm 0:9b334a45a8ff 1399 * @}
bogdanm 0:9b334a45a8ff 1400 */
bogdanm 0:9b334a45a8ff 1401
bogdanm 0:9b334a45a8ff 1402 /**
bogdanm 0:9b334a45a8ff 1403 * @}
bogdanm 0:9b334a45a8ff 1404 */
bogdanm 0:9b334a45a8ff 1405
bogdanm 0:9b334a45a8ff 1406 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/