en 129 / mbed-dev

fix LPC812 PWM

Dependents:   IR_LED_Send

Fork of mbed-dev by mbed official

targets/cmsis/TARGET_STM/TARGET_STM32L4/stm32l4xx_hal_dac.h@129:2e517c56bcfb, 2016-05-16 (annotated)

Committer:
nameless129
Date:
Mon May 16 16:50:30 2016 +0000
Revision:
129:2e517c56bcfb
Parent:
0:9b334a45a8ff 
PWM Fix:Duty 0%??H???????????????

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /**
bogdanm 0:9b334a45a8ff 2 ******************************************************************************
bogdanm 0:9b334a45a8ff 3 * @file stm32l4xx_hal_dac.h
bogdanm 0:9b334a45a8ff 4 * @author MCD Application Team
bogdanm 0:9b334a45a8ff 5 * @version V1.0.0
bogdanm 0:9b334a45a8ff 6 * @date 26-June-2015
bogdanm 0:9b334a45a8ff 7 * @brief Header file of DAC HAL module.
bogdanm 0:9b334a45a8ff 8 ******************************************************************************
bogdanm 0:9b334a45a8ff 9 * @attention
bogdanm 0:9b334a45a8ff 10 *
bogdanm 0:9b334a45a8ff 11 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
bogdanm 0:9b334a45a8ff 12 *
bogdanm 0:9b334a45a8ff 13 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 0:9b334a45a8ff 14 * are permitted provided that the following conditions are met:
bogdanm 0:9b334a45a8ff 15 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 0:9b334a45a8ff 16 * this list of conditions and the following disclaimer.
bogdanm 0:9b334a45a8ff 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 0:9b334a45a8ff 18 * this list of conditions and the following disclaimer in the documentation
bogdanm 0:9b334a45a8ff 19 * and/or other materials provided with the distribution.
bogdanm 0:9b334a45a8ff 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 0:9b334a45a8ff 21 * may be used to endorse or promote products derived from this software
bogdanm 0:9b334a45a8ff 22 * without specific prior written permission.
bogdanm 0:9b334a45a8ff 23 *
bogdanm 0:9b334a45a8ff 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 0:9b334a45a8ff 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 0:9b334a45a8ff 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 0:9b334a45a8ff 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 0:9b334a45a8ff 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 0:9b334a45a8ff 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 0:9b334a45a8ff 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 0:9b334a45a8ff 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 0:9b334a45a8ff 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 0:9b334a45a8ff 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 0:9b334a45a8ff 34 *
bogdanm 0:9b334a45a8ff 35 ******************************************************************************
bogdanm 0:9b334a45a8ff 36 */
bogdanm 0:9b334a45a8ff 37
bogdanm 0:9b334a45a8ff 38 /* Define to prevent recursive inclusion -------------------------------------*/
bogdanm 0:9b334a45a8ff 39 #ifndef __STM32L4xx_HAL_DAC_H
bogdanm 0:9b334a45a8ff 40 #define __STM32L4xx_HAL_DAC_H
bogdanm 0:9b334a45a8ff 41
bogdanm 0:9b334a45a8ff 42 #ifdef __cplusplus
bogdanm 0:9b334a45a8ff 43 extern "C" {
bogdanm 0:9b334a45a8ff 44 #endif
bogdanm 0:9b334a45a8ff 45
bogdanm 0:9b334a45a8ff 46
bogdanm 0:9b334a45a8ff 47 /* Includes ------------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 48 #include "stm32l4xx_hal_def.h"
bogdanm 0:9b334a45a8ff 49
bogdanm 0:9b334a45a8ff 50 /** @addtogroup STM32L4xx_HAL_Driver
bogdanm 0:9b334a45a8ff 51 * @{
bogdanm 0:9b334a45a8ff 52 */
bogdanm 0:9b334a45a8ff 53
bogdanm 0:9b334a45a8ff 54 /** @addtogroup DAC
bogdanm 0:9b334a45a8ff 55 * @{
bogdanm 0:9b334a45a8ff 56 */
bogdanm 0:9b334a45a8ff 57
bogdanm 0:9b334a45a8ff 58 /* Exported types ------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 59
bogdanm 0:9b334a45a8ff 60 /** @defgroup DAC_Exported_Types DAC Exported Types
bogdanm 0:9b334a45a8ff 61 * @{
bogdanm 0:9b334a45a8ff 62 */
bogdanm 0:9b334a45a8ff 63
bogdanm 0:9b334a45a8ff 64 /**
bogdanm 0:9b334a45a8ff 65 * @brief HAL State structures definition
bogdanm 0:9b334a45a8ff 66 */
bogdanm 0:9b334a45a8ff 67 typedef enum
bogdanm 0:9b334a45a8ff 68 {
bogdanm 0:9b334a45a8ff 69 HAL_DAC_STATE_RESET = 0x00, /*!< DAC not yet initialized or disabled */
bogdanm 0:9b334a45a8ff 70 HAL_DAC_STATE_READY = 0x01, /*!< DAC initialized and ready for use */
bogdanm 0:9b334a45a8ff 71 HAL_DAC_STATE_BUSY = 0x02, /*!< DAC internal processing is ongoing */
bogdanm 0:9b334a45a8ff 72 HAL_DAC_STATE_TIMEOUT = 0x03, /*!< DAC timeout state */
bogdanm 0:9b334a45a8ff 73 HAL_DAC_STATE_ERROR = 0x04 /*!< DAC error state */
bogdanm 0:9b334a45a8ff 74
bogdanm 0:9b334a45a8ff 75 }HAL_DAC_StateTypeDef;
bogdanm 0:9b334a45a8ff 76
bogdanm 0:9b334a45a8ff 77 /**
bogdanm 0:9b334a45a8ff 78 * @brief DAC handle Structure definition
bogdanm 0:9b334a45a8ff 79 */
bogdanm 0:9b334a45a8ff 80 typedef struct
bogdanm 0:9b334a45a8ff 81 {
bogdanm 0:9b334a45a8ff 82 DAC_TypeDef *Instance; /*!< Register base address */
bogdanm 0:9b334a45a8ff 83
bogdanm 0:9b334a45a8ff 84 __IO HAL_DAC_StateTypeDef State; /*!< DAC communication state */
bogdanm 0:9b334a45a8ff 85
bogdanm 0:9b334a45a8ff 86 HAL_LockTypeDef Lock; /*!< DAC locking object */
bogdanm 0:9b334a45a8ff 87
bogdanm 0:9b334a45a8ff 88 DMA_HandleTypeDef *DMA_Handle1; /*!< Pointer DMA handler for channel 1 */
bogdanm 0:9b334a45a8ff 89
bogdanm 0:9b334a45a8ff 90 DMA_HandleTypeDef *DMA_Handle2; /*!< Pointer DMA handler for channel 2 */
bogdanm 0:9b334a45a8ff 91
bogdanm 0:9b334a45a8ff 92 __IO uint32_t ErrorCode; /*!< DAC Error code */
bogdanm 0:9b334a45a8ff 93
bogdanm 0:9b334a45a8ff 94 }DAC_HandleTypeDef;
bogdanm 0:9b334a45a8ff 95
bogdanm 0:9b334a45a8ff 96 /**
bogdanm 0:9b334a45a8ff 97 * @brief DAC Configuration sample and hold Channel structure definition
bogdanm 0:9b334a45a8ff 98 */
bogdanm 0:9b334a45a8ff 99 typedef struct
bogdanm 0:9b334a45a8ff 100 {
bogdanm 0:9b334a45a8ff 101 uint32_t DAC_SampleTime ; /*!< Specifies the Sample time for the selected channel.
bogdanm 0:9b334a45a8ff 102 This parameter applies when DAC_SampleAndHold is DAC_SAMPLEANDHOLD_ENABLE.
bogdanm 0:9b334a45a8ff 103 This parameter must be a number between Min_Data = 0 and Max_Data = 1023 */
bogdanm 0:9b334a45a8ff 104
bogdanm 0:9b334a45a8ff 105 uint32_t DAC_HoldTime ; /*!< Specifies the hold time for the selected channel
bogdanm 0:9b334a45a8ff 106 This parameter applies when DAC_SampleAndHold is DAC_SAMPLEANDHOLD_ENABLE.
bogdanm 0:9b334a45a8ff 107 This parameter must be a number between Min_Data = 0 and Max_Data = 1023 */
bogdanm 0:9b334a45a8ff 108
bogdanm 0:9b334a45a8ff 109 uint32_t DAC_RefreshTime ; /*!< Specifies the refresh time for the selected channel
bogdanm 0:9b334a45a8ff 110 This parameter applies when DAC_SampleAndHold is DAC_SAMPLEANDHOLD_ENABLE.
bogdanm 0:9b334a45a8ff 111 This parameter must be a number between Min_Data = 0 and Max_Data = 255 */
bogdanm 0:9b334a45a8ff 112 }
bogdanm 0:9b334a45a8ff 113 DAC_SampleAndHoldConfTypeDef;
bogdanm 0:9b334a45a8ff 114
bogdanm 0:9b334a45a8ff 115 /**
bogdanm 0:9b334a45a8ff 116 * @brief DAC Configuration regular Channel structure definition
bogdanm 0:9b334a45a8ff 117 */
bogdanm 0:9b334a45a8ff 118 typedef struct
bogdanm 0:9b334a45a8ff 119 {
bogdanm 0:9b334a45a8ff 120 uint32_t DAC_SampleAndHold; /*!< Specifies whether the DAC mode.
bogdanm 0:9b334a45a8ff 121 This parameter can be a value of @ref DAC_SampleAndHold */
bogdanm 0:9b334a45a8ff 122
bogdanm 0:9b334a45a8ff 123 uint32_t DAC_Trigger; /*!< Specifies the external trigger for the selected DAC channel.
bogdanm 0:9b334a45a8ff 124 This parameter can be a value of @ref DAC_trigger_selection */
bogdanm 0:9b334a45a8ff 125
bogdanm 0:9b334a45a8ff 126 uint32_t DAC_OutputBuffer; /*!< Specifies whether the DAC channel output buffer is enabled or disabled.
bogdanm 0:9b334a45a8ff 127 This parameter can be a value of @ref DAC_output_buffer */
bogdanm 0:9b334a45a8ff 128
bogdanm 0:9b334a45a8ff 129 uint32_t DAC_ConnectOnChipPeripheral ; /*!< Specifies whether the DAC output is connected or not to on chip peripheral .
bogdanm 0:9b334a45a8ff 130 This parameter can be a value of @ref DAC_ConnectOnChipPeripheral */
bogdanm 0:9b334a45a8ff 131
bogdanm 0:9b334a45a8ff 132 uint32_t DAC_UserTrimming; /*!< Specifies the trimming mode
bogdanm 0:9b334a45a8ff 133 This parameter must be a value of @ref DAC_UserTrimming
bogdanm 0:9b334a45a8ff 134 DAC_UserTrimming is either factory or user trimming */
bogdanm 0:9b334a45a8ff 135
bogdanm 0:9b334a45a8ff 136 uint32_t DAC_TrimmingValue; /*!< Specifies the offset trimming value
bogdanm 0:9b334a45a8ff 137 i.e. when DAC_SampleAndHold is DAC_TRIMMING_USER.
bogdanm 0:9b334a45a8ff 138 This parameter must be a number between Min_Data = 1 and Max_Data = 31 */
bogdanm 0:9b334a45a8ff 139
bogdanm 0:9b334a45a8ff 140 DAC_SampleAndHoldConfTypeDef DAC_SampleAndHoldConfig; /*!< Sample and Hold settings */
bogdanm 0:9b334a45a8ff 141
bogdanm 0:9b334a45a8ff 142 }DAC_ChannelConfTypeDef;
bogdanm 0:9b334a45a8ff 143
bogdanm 0:9b334a45a8ff 144 /**
bogdanm 0:9b334a45a8ff 145 * @}
bogdanm 0:9b334a45a8ff 146 */
bogdanm 0:9b334a45a8ff 147
bogdanm 0:9b334a45a8ff 148 /* Exported constants --------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 149
bogdanm 0:9b334a45a8ff 150 /** @defgroup DAC_Exported_Constants DAC Exported Constants
bogdanm 0:9b334a45a8ff 151 * @{
bogdanm 0:9b334a45a8ff 152 */
bogdanm 0:9b334a45a8ff 153
bogdanm 0:9b334a45a8ff 154 /** @defgroup DAC_Error_Code DAC Error Code
bogdanm 0:9b334a45a8ff 155 * @{
bogdanm 0:9b334a45a8ff 156 */
bogdanm 0:9b334a45a8ff 157 #define HAL_DAC_ERROR_NONE 0x00 /*!< No error */
bogdanm 0:9b334a45a8ff 158 #define HAL_DAC_ERROR_DMAUNDERRUNCH1 0x01 /*!< DAC channel1 DMA underrun error */
bogdanm 0:9b334a45a8ff 159 #define HAL_DAC_ERROR_DMAUNDERRUNCH2 0x02 /*!< DAC channel2 DMA underrun error */
bogdanm 0:9b334a45a8ff 160 #define HAL_DAC_ERROR_DMA 0x04 /*!< DMA error */
bogdanm 0:9b334a45a8ff 161 #define HAL_DAC_ERROR_TIMEOUT 0x08 /*!< Timeout error */
bogdanm 0:9b334a45a8ff 162 /**
bogdanm 0:9b334a45a8ff 163 * @}
bogdanm 0:9b334a45a8ff 164 */
bogdanm 0:9b334a45a8ff 165
bogdanm 0:9b334a45a8ff 166 /** @defgroup DAC_trigger_selection DAC trigger selection
bogdanm 0:9b334a45a8ff 167 * @{
bogdanm 0:9b334a45a8ff 168 */
bogdanm 0:9b334a45a8ff 169
bogdanm 0:9b334a45a8ff 170 #define DAC_TRIGGER_NONE ((uint32_t)0x00000000) /*!< Conversion is automatic once the DAC_DHRxxxx register
bogdanm 0:9b334a45a8ff 171 has been loaded, and not by external trigger */
bogdanm 0:9b334a45a8ff 172 #define DAC_TRIGGER_T2_TRGO ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TEN1)) /*!< TIM2 TRGO selected as external conversion trigger for DAC channel */
bogdanm 0:9b334a45a8ff 173 #define DAC_TRIGGER_T4_TRGO ((uint32_t)(DAC_CR_TSEL1_2 |DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< TIM4 TRGO selected as external conversion trigger for DAC channel */
bogdanm 0:9b334a45a8ff 174 #define DAC_TRIGGER_T5_TRGO ((uint32_t)(DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< TIM5 TRGO selected as external conversion trigger for DAC channel */
bogdanm 0:9b334a45a8ff 175 #define DAC_TRIGGER_T6_TRGO ((uint32_t)DAC_CR_TEN1) /*!< TIM6 TRGO selected as external conversion trigger for DAC channel */
bogdanm 0:9b334a45a8ff 176 #define DAC_TRIGGER_T7_TRGO ((uint32_t)(DAC_CR_TSEL1_1 | DAC_CR_TEN1)) /*!< TIM7 TRGO selected as external conversion trigger for DAC channel */
bogdanm 0:9b334a45a8ff 177 #define DAC_TRIGGER_T8_TRGO ((uint32_t)(DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< TIM8 TRGO selected as external conversion trigger for DAC channel */
bogdanm 0:9b334a45a8ff 178 #define DAC_TRIGGER_EXT_IT9 ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 | DAC_CR_TEN1)) /*!< EXTI Line9 event selected as external conversion trigger for DAC channel */
bogdanm 0:9b334a45a8ff 179 #define DAC_TRIGGER_SOFTWARE ((uint32_t)(DAC_CR_TSEL1 | DAC_CR_TEN1)) /*!< Conversion started by software trigger for DAC channel */
bogdanm 0:9b334a45a8ff 180
bogdanm 0:9b334a45a8ff 181 /**
bogdanm 0:9b334a45a8ff 182 * @}
bogdanm 0:9b334a45a8ff 183 */
bogdanm 0:9b334a45a8ff 184
bogdanm 0:9b334a45a8ff 185 /** @defgroup DAC_output_buffer
bogdanm 0:9b334a45a8ff 186 * @{
bogdanm 0:9b334a45a8ff 187 */
bogdanm 0:9b334a45a8ff 188 #define DAC_OUTPUTBUFFER_ENABLE ((uint32_t)0x00000000)
bogdanm 0:9b334a45a8ff 189 #define DAC_OUTPUTBUFFER_DISABLE ((uint32_t)DAC_MCR_MODE1_1)
bogdanm 0:9b334a45a8ff 190
bogdanm 0:9b334a45a8ff 191 /**
bogdanm 0:9b334a45a8ff 192 * @}
bogdanm 0:9b334a45a8ff 193 */
bogdanm 0:9b334a45a8ff 194
bogdanm 0:9b334a45a8ff 195 /** @defgroup DAC_Channel_selection
bogdanm 0:9b334a45a8ff 196 * @{
bogdanm 0:9b334a45a8ff 197 */
bogdanm 0:9b334a45a8ff 198 #define DAC_CHANNEL_1 ((uint32_t)0x00000000)
bogdanm 0:9b334a45a8ff 199 #define DAC_CHANNEL_2 ((uint32_t)0x00000010)
bogdanm 0:9b334a45a8ff 200
bogdanm 0:9b334a45a8ff 201 /**
bogdanm 0:9b334a45a8ff 202 * @}
bogdanm 0:9b334a45a8ff 203 */
bogdanm 0:9b334a45a8ff 204
bogdanm 0:9b334a45a8ff 205 /** @defgroup DAC_data_alignment DAC data alignment
bogdanm 0:9b334a45a8ff 206 * @{
bogdanm 0:9b334a45a8ff 207 */
bogdanm 0:9b334a45a8ff 208 #define DAC_ALIGN_12B_R ((uint32_t)0x00000000)
bogdanm 0:9b334a45a8ff 209 #define DAC_ALIGN_12B_L ((uint32_t)0x00000004)
bogdanm 0:9b334a45a8ff 210 #define DAC_ALIGN_8B_R ((uint32_t)0x00000008)
bogdanm 0:9b334a45a8ff 211
bogdanm 0:9b334a45a8ff 212 /**
bogdanm 0:9b334a45a8ff 213 * @}
bogdanm 0:9b334a45a8ff 214 */
bogdanm 0:9b334a45a8ff 215
bogdanm 0:9b334a45a8ff 216 /** @defgroup DAC_flags_definition DAC flags definition
bogdanm 0:9b334a45a8ff 217 * @{
bogdanm 0:9b334a45a8ff 218 */
bogdanm 0:9b334a45a8ff 219 #define DAC_FLAG_DMAUDR1 ((uint32_t)DAC_SR_DMAUDR1)
bogdanm 0:9b334a45a8ff 220 #define DAC_FLAG_DMAUDR2 ((uint32_t)DAC_SR_DMAUDR2)
bogdanm 0:9b334a45a8ff 221
bogdanm 0:9b334a45a8ff 222 /**
bogdanm 0:9b334a45a8ff 223 * @}
bogdanm 0:9b334a45a8ff 224 */
bogdanm 0:9b334a45a8ff 225
bogdanm 0:9b334a45a8ff 226 /** @defgroup DAC_IT_definition DAC IT definition
bogdanm 0:9b334a45a8ff 227 * @{
bogdanm 0:9b334a45a8ff 228 */
bogdanm 0:9b334a45a8ff 229 #define DAC_IT_DMAUDR1 ((uint32_t)DAC_SR_DMAUDR1)
bogdanm 0:9b334a45a8ff 230 #define DAC_IT_DMAUDR2 ((uint32_t)DAC_SR_DMAUDR2)
bogdanm 0:9b334a45a8ff 231
bogdanm 0:9b334a45a8ff 232 /**
bogdanm 0:9b334a45a8ff 233 * @}
bogdanm 0:9b334a45a8ff 234 */
bogdanm 0:9b334a45a8ff 235
bogdanm 0:9b334a45a8ff 236 /** @defgroup DAC_ConnectOnChipPeripheral
bogdanm 0:9b334a45a8ff 237 * @{
bogdanm 0:9b334a45a8ff 238 */
bogdanm 0:9b334a45a8ff 239 #define DAC_CHIPCONNECT_DISABLE ((uint32_t)0x00000000)
bogdanm 0:9b334a45a8ff 240 #define DAC_CHIPCONNECT_ENABLE ((uint32_t)DAC_MCR_MODE1_0)
bogdanm 0:9b334a45a8ff 241
bogdanm 0:9b334a45a8ff 242 /**
bogdanm 0:9b334a45a8ff 243 * @}
bogdanm 0:9b334a45a8ff 244 */
bogdanm 0:9b334a45a8ff 245
bogdanm 0:9b334a45a8ff 246 /** @defgroup DAC_UserTrimming DAC User Trimming
bogdanm 0:9b334a45a8ff 247 * @{
bogdanm 0:9b334a45a8ff 248 */
bogdanm 0:9b334a45a8ff 249
bogdanm 0:9b334a45a8ff 250 #define DAC_TRIMMING_FACTORY ((uint32_t)0x00000000) /*!< Factory trimming */
bogdanm 0:9b334a45a8ff 251 #define DAC_TRIMMING_USER ((uint32_t)0x00000001) /*!< User trimming */
bogdanm 0:9b334a45a8ff 252
bogdanm 0:9b334a45a8ff 253 /**
bogdanm 0:9b334a45a8ff 254 * @}
bogdanm 0:9b334a45a8ff 255 */
bogdanm 0:9b334a45a8ff 256
bogdanm 0:9b334a45a8ff 257 /** @defgroup DAC_SampleAndHold DAC power mode
bogdanm 0:9b334a45a8ff 258 * @{
bogdanm 0:9b334a45a8ff 259 */
bogdanm 0:9b334a45a8ff 260 #define DAC_SAMPLEANDHOLD_DISABLE ((uint32_t)0x00000000)
bogdanm 0:9b334a45a8ff 261 #define DAC_SAMPLEANDHOLD_ENABLE ((uint32_t)DAC_MCR_MODE1_2)
bogdanm 0:9b334a45a8ff 262
bogdanm 0:9b334a45a8ff 263 /**
bogdanm 0:9b334a45a8ff 264 * @}
bogdanm 0:9b334a45a8ff 265 */
bogdanm 0:9b334a45a8ff 266
bogdanm 0:9b334a45a8ff 267 /**
bogdanm 0:9b334a45a8ff 268 * @}
bogdanm 0:9b334a45a8ff 269 */
bogdanm 0:9b334a45a8ff 270
bogdanm 0:9b334a45a8ff 271 /* Exported macro ------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 272
bogdanm 0:9b334a45a8ff 273 /** @defgroup DAC_Exported_Macros DAC Exported Macros
bogdanm 0:9b334a45a8ff 274 * @{
bogdanm 0:9b334a45a8ff 275 */
bogdanm 0:9b334a45a8ff 276
bogdanm 0:9b334a45a8ff 277 /** @brief Reset DAC handle state.
bogdanm 0:9b334a45a8ff 278 * @param __HANDLE__: specifies the DAC handle.
bogdanm 0:9b334a45a8ff 279 * @retval None
bogdanm 0:9b334a45a8ff 280 */
bogdanm 0:9b334a45a8ff 281 #define __HAL_DAC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DAC_STATE_RESET)
bogdanm 0:9b334a45a8ff 282
bogdanm 0:9b334a45a8ff 283 /** @brief Enable the DAC channel.
bogdanm 0:9b334a45a8ff 284 * @param __HANDLE__: specifies the DAC handle.
bogdanm 0:9b334a45a8ff 285 * @param __DAC_Channel__: specifies the DAC channel
bogdanm 0:9b334a45a8ff 286 * @retval None
bogdanm 0:9b334a45a8ff 287 */
bogdanm 0:9b334a45a8ff 288 #define __HAL_DAC_ENABLE(__HANDLE__, __DAC_Channel__) \
bogdanm 0:9b334a45a8ff 289 ((__HANDLE__)->Instance->CR |= (DAC_CR_EN1 << (__DAC_Channel__)))
bogdanm 0:9b334a45a8ff 290
bogdanm 0:9b334a45a8ff 291 /** @brief Disable the DAC channel.
bogdanm 0:9b334a45a8ff 292 * @param __HANDLE__: specifies the DAC handle
bogdanm 0:9b334a45a8ff 293 * @param __DAC_Channel__: specifies the DAC channel.
bogdanm 0:9b334a45a8ff 294 * @retval None
bogdanm 0:9b334a45a8ff 295 */
bogdanm 0:9b334a45a8ff 296 #define __HAL_DAC_DISABLE(__HANDLE__, __DAC_Channel__) \
bogdanm 0:9b334a45a8ff 297 ((__HANDLE__)->Instance->CR &= ~(DAC_CR_EN1 << (__DAC_Channel__)))
bogdanm 0:9b334a45a8ff 298
bogdanm 0:9b334a45a8ff 299 /** @brief Set DHR12R1 alignment.
bogdanm 0:9b334a45a8ff 300 * @param __ALIGNMENT__: specifies the DAC alignment
bogdanm 0:9b334a45a8ff 301 * @retval None
bogdanm 0:9b334a45a8ff 302 */
bogdanm 0:9b334a45a8ff 303 #define DAC_DHR12R1_ALIGNMENT(__ALIGNMENT__) (((uint32_t)0x00000008) + (__ALIGNMENT__))
bogdanm 0:9b334a45a8ff 304
bogdanm 0:9b334a45a8ff 305 /** @brief Set DHR12R2 alignment.
bogdanm 0:9b334a45a8ff 306 * @param __ALIGNMENT__: specifies the DAC alignment
bogdanm 0:9b334a45a8ff 307 * @retval None
bogdanm 0:9b334a45a8ff 308 */
bogdanm 0:9b334a45a8ff 309 #define DAC_DHR12R2_ALIGNMENT(__ALIGNMENT__) (((uint32_t)0x00000014) + (__ALIGNMENT__))
bogdanm 0:9b334a45a8ff 310
bogdanm 0:9b334a45a8ff 311 /** @brief Set DHR12RD alignment.
bogdanm 0:9b334a45a8ff 312 * @param __ALIGNMENT__: specifies the DAC alignment
bogdanm 0:9b334a45a8ff 313 * @retval None
bogdanm 0:9b334a45a8ff 314 */
bogdanm 0:9b334a45a8ff 315 #define DAC_DHR12RD_ALIGNMENT(__ALIGNMENT__) (((uint32_t)0x00000020) + (__ALIGNMENT__))
bogdanm 0:9b334a45a8ff 316
bogdanm 0:9b334a45a8ff 317 /** @brief Enable the DAC interrupt.
bogdanm 0:9b334a45a8ff 318 * @param __HANDLE__: specifies the DAC handle
bogdanm 0:9b334a45a8ff 319 * @param __INTERRUPT__: specifies the DAC interrupt.
bogdanm 0:9b334a45a8ff 320 * This parameter can be any combination of the following values:
bogdanm 0:9b334a45a8ff 321 * @arg DAC_IT_DMAUDR1: DAC channel 1 DMA underrun interrupt
bogdanm 0:9b334a45a8ff 322 * @arg DAC_IT_DMAUDR2: DAC channel 2 DMA underrun interrupt
bogdanm 0:9b334a45a8ff 323 * @retval None
bogdanm 0:9b334a45a8ff 324 */
bogdanm 0:9b334a45a8ff 325 #define __HAL_DAC_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) |= (__INTERRUPT__))
bogdanm 0:9b334a45a8ff 326
bogdanm 0:9b334a45a8ff 327 /** @brief Disable the DAC interrupt.
bogdanm 0:9b334a45a8ff 328 * @param __HANDLE__: specifies the DAC handle
bogdanm 0:9b334a45a8ff 329 * @param __INTERRUPT__: specifies the DAC interrupt.
bogdanm 0:9b334a45a8ff 330 * This parameter can be any combination of the following values:
bogdanm 0:9b334a45a8ff 331 * @arg DAC_IT_DMAUDR1: DAC channel 1 DMA underrun interrupt
bogdanm 0:9b334a45a8ff 332 * @arg DAC_IT_DMAUDR2: DAC channel 2 DMA underrun interrupt
bogdanm 0:9b334a45a8ff 333 * @retval None
bogdanm 0:9b334a45a8ff 334 */
bogdanm 0:9b334a45a8ff 335 #define __HAL_DAC_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) &= ~(__INTERRUPT__))
bogdanm 0:9b334a45a8ff 336
bogdanm 0:9b334a45a8ff 337 /** @brief Check whether the specified DAC interrupt source is enabled or not.
bogdanm 0:9b334a45a8ff 338 * @param __HANDLE__: DAC handle
bogdanm 0:9b334a45a8ff 339 * @param __INTERRUPT__: DAC interrupt source to check
bogdanm 0:9b334a45a8ff 340 * This parameter can be any combination of the following values:
bogdanm 0:9b334a45a8ff 341 * @arg DAC_IT_DMAUDR1: DAC channel 1 DMA underrun interrupt
bogdanm 0:9b334a45a8ff 342 * @arg DAC_IT_DMAUDR2: DAC channel 2 DMA underrun interrupt
bogdanm 0:9b334a45a8ff 343 * @retval State of interruption (SET or RESET)
bogdanm 0:9b334a45a8ff 344 */
bogdanm 0:9b334a45a8ff 345 #define __HAL_DAC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR & (__INTERRUPT__)) == (__INTERRUPT__))
bogdanm 0:9b334a45a8ff 346
bogdanm 0:9b334a45a8ff 347 /** @brief Get the selected DAC's flag status.
bogdanm 0:9b334a45a8ff 348 * @param __HANDLE__: specifies the DAC handle.
bogdanm 0:9b334a45a8ff 349 * @param __FLAG__: specifies the DAC flag to get.
bogdanm 0:9b334a45a8ff 350 * This parameter can be any combination of the following values:
bogdanm 0:9b334a45a8ff 351 * @arg DAC_FLAG_DMAUDR1: DAC channel 1 DMA underrun flag
bogdanm 0:9b334a45a8ff 352 * @arg DAC_FLAG_DMAUDR2: DAC channel 2 DMA underrun flag
bogdanm 0:9b334a45a8ff 353 * @retval None
bogdanm 0:9b334a45a8ff 354 */
bogdanm 0:9b334a45a8ff 355 #define __HAL_DAC_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
bogdanm 0:9b334a45a8ff 356
bogdanm 0:9b334a45a8ff 357 /** @brief Clear the DAC's flag.
bogdanm 0:9b334a45a8ff 358 * @param __HANDLE__: specifies the DAC handle.
bogdanm 0:9b334a45a8ff 359 * @param __FLAG__: specifies the DAC flag to clear.
bogdanm 0:9b334a45a8ff 360 * This parameter can be any combination of the following values:
bogdanm 0:9b334a45a8ff 361 * @arg DAC_FLAG_DMAUDR1: DAC channel 1 DMA underrun flag
bogdanm 0:9b334a45a8ff 362 * @arg DAC_FLAG_DMAUDR2: DAC channel 2 DMA underrun flag
bogdanm 0:9b334a45a8ff 363 * @retval None
bogdanm 0:9b334a45a8ff 364 */
bogdanm 0:9b334a45a8ff 365 #define __HAL_DAC_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR) = (__FLAG__))
bogdanm 0:9b334a45a8ff 366
bogdanm 0:9b334a45a8ff 367 /**
bogdanm 0:9b334a45a8ff 368 * @}
bogdanm 0:9b334a45a8ff 369 */
bogdanm 0:9b334a45a8ff 370
bogdanm 0:9b334a45a8ff 371 /* Private macro -------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 372
bogdanm 0:9b334a45a8ff 373 /** @defgroup DAC_Private_Macros DAC Private Macros
bogdanm 0:9b334a45a8ff 374 * @{
bogdanm 0:9b334a45a8ff 375 */
bogdanm 0:9b334a45a8ff 376 #define IS_DAC_OUTPUT_BUFFER_STATE(STATE) (((STATE) == DAC_OUTPUTBUFFER_ENABLE) || \
bogdanm 0:9b334a45a8ff 377 ((STATE) == DAC_OUTPUTBUFFER_DISABLE))
bogdanm 0:9b334a45a8ff 378
bogdanm 0:9b334a45a8ff 379 #define IS_DAC_CHANNEL(CHANNEL) (((CHANNEL) == DAC_CHANNEL_1) || \
bogdanm 0:9b334a45a8ff 380 ((CHANNEL) == DAC_CHANNEL_2))
bogdanm 0:9b334a45a8ff 381
bogdanm 0:9b334a45a8ff 382 #define IS_DAC_ALIGN(ALIGN) (((ALIGN) == DAC_ALIGN_12B_R) || \
bogdanm 0:9b334a45a8ff 383 ((ALIGN) == DAC_ALIGN_12B_L) || \
bogdanm 0:9b334a45a8ff 384 ((ALIGN) == DAC_ALIGN_8B_R))
bogdanm 0:9b334a45a8ff 385
bogdanm 0:9b334a45a8ff 386 #define IS_DAC_DATA(DATA) ((DATA) <= 0xFFF0)
bogdanm 0:9b334a45a8ff 387
bogdanm 0:9b334a45a8ff 388 #define DAC_DHR12R1_ALIGNMENT(__ALIGNMENT__) (((uint32_t)0x00000008) + (__ALIGNMENT__))
bogdanm 0:9b334a45a8ff 389
bogdanm 0:9b334a45a8ff 390 #define DAC_DHR12R2_ALIGNMENT(__ALIGNMENT__) (((uint32_t)0x00000014) + (__ALIGNMENT__))
bogdanm 0:9b334a45a8ff 391
bogdanm 0:9b334a45a8ff 392 #define DAC_DHR12RD_ALIGNMENT(__ALIGNMENT__) (((uint32_t)0x00000020) + (__ALIGNMENT__))
bogdanm 0:9b334a45a8ff 393
bogdanm 0:9b334a45a8ff 394 #define IS_DAC_REFRESHTIME(TIME) ((TIME) <= 0x0000000FF)
bogdanm 0:9b334a45a8ff 395
bogdanm 0:9b334a45a8ff 396 /**
bogdanm 0:9b334a45a8ff 397 * @}
bogdanm 0:9b334a45a8ff 398 */
bogdanm 0:9b334a45a8ff 399
bogdanm 0:9b334a45a8ff 400 /* Include DAC HAL Extended module */
bogdanm 0:9b334a45a8ff 401 #include "stm32l4xx_hal_dac_ex.h"
bogdanm 0:9b334a45a8ff 402
bogdanm 0:9b334a45a8ff 403 /* Exported functions --------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 404
bogdanm 0:9b334a45a8ff 405 /** @addtogroup DAC_Exported_Functions
bogdanm 0:9b334a45a8ff 406 * @{
bogdanm 0:9b334a45a8ff 407 */
bogdanm 0:9b334a45a8ff 408
bogdanm 0:9b334a45a8ff 409 /** @addtogroup DAC_Exported_Functions_Group1
bogdanm 0:9b334a45a8ff 410 * @{
bogdanm 0:9b334a45a8ff 411 */
bogdanm 0:9b334a45a8ff 412 /* Initialization and de-initialization functions *****************************/
bogdanm 0:9b334a45a8ff 413 HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef* hdac);
bogdanm 0:9b334a45a8ff 414 HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef* hdac);
bogdanm 0:9b334a45a8ff 415 void HAL_DAC_MspInit(DAC_HandleTypeDef* hdac);
bogdanm 0:9b334a45a8ff 416 void HAL_DAC_MspDeInit(DAC_HandleTypeDef* hdac);
bogdanm 0:9b334a45a8ff 417
bogdanm 0:9b334a45a8ff 418 /**
bogdanm 0:9b334a45a8ff 419 * @}
bogdanm 0:9b334a45a8ff 420 */
bogdanm 0:9b334a45a8ff 421
bogdanm 0:9b334a45a8ff 422 /** @addtogroup DAC_Exported_Functions_Group2
bogdanm 0:9b334a45a8ff 423 * @{
bogdanm 0:9b334a45a8ff 424 */
bogdanm 0:9b334a45a8ff 425 /* IO operation functions *****************************************************/
bogdanm 0:9b334a45a8ff 426 HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef* hdac, uint32_t Channel);
bogdanm 0:9b334a45a8ff 427 HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef* hdac, uint32_t Channel);
bogdanm 0:9b334a45a8ff 428 HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t* pData, uint32_t Length, uint32_t Alignment);
bogdanm 0:9b334a45a8ff 429 HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel);
bogdanm 0:9b334a45a8ff 430
bogdanm 0:9b334a45a8ff 431 void HAL_DAC_IRQHandler(DAC_HandleTypeDef* hdac);
bogdanm 0:9b334a45a8ff 432
bogdanm 0:9b334a45a8ff 433 HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data);
bogdanm 0:9b334a45a8ff 434
bogdanm 0:9b334a45a8ff 435 void HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef* hdac);
bogdanm 0:9b334a45a8ff 436 void HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef* hdac);
bogdanm 0:9b334a45a8ff 437 void HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef *hdac);
bogdanm 0:9b334a45a8ff 438 void HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef *hdac);
bogdanm 0:9b334a45a8ff 439 /**
bogdanm 0:9b334a45a8ff 440 * @}
bogdanm 0:9b334a45a8ff 441 */
bogdanm 0:9b334a45a8ff 442
bogdanm 0:9b334a45a8ff 443 /** @addtogroup DAC_Exported_Functions_Group3
bogdanm 0:9b334a45a8ff 444 * @{
bogdanm 0:9b334a45a8ff 445 */
bogdanm 0:9b334a45a8ff 446 /* Peripheral Control functions ***********************************************/
bogdanm 0:9b334a45a8ff 447 uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef* hdac, uint32_t Channel);
bogdanm 0:9b334a45a8ff 448
bogdanm 0:9b334a45a8ff 449 HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef* hdac, DAC_ChannelConfTypeDef* sConfig, uint32_t Channel);
bogdanm 0:9b334a45a8ff 450 /**
bogdanm 0:9b334a45a8ff 451 * @}
bogdanm 0:9b334a45a8ff 452 */
bogdanm 0:9b334a45a8ff 453
bogdanm 0:9b334a45a8ff 454 /** @addtogroup DAC_Exported_Functions_Group4
bogdanm 0:9b334a45a8ff 455 * @{
bogdanm 0:9b334a45a8ff 456 */
bogdanm 0:9b334a45a8ff 457 /* Peripheral State and Error functions ***************************************/
bogdanm 0:9b334a45a8ff 458 HAL_DAC_StateTypeDef HAL_DAC_GetState(DAC_HandleTypeDef* hdac);
bogdanm 0:9b334a45a8ff 459 uint32_t HAL_DAC_GetError(DAC_HandleTypeDef *hdac);
bogdanm 0:9b334a45a8ff 460
bogdanm 0:9b334a45a8ff 461 /**
bogdanm 0:9b334a45a8ff 462 * @}
bogdanm 0:9b334a45a8ff 463 */
bogdanm 0:9b334a45a8ff 464
bogdanm 0:9b334a45a8ff 465 /**
bogdanm 0:9b334a45a8ff 466 * @}
bogdanm 0:9b334a45a8ff 467 */
bogdanm 0:9b334a45a8ff 468
bogdanm 0:9b334a45a8ff 469 /**
bogdanm 0:9b334a45a8ff 470 * @}
bogdanm 0:9b334a45a8ff 471 */
bogdanm 0:9b334a45a8ff 472
bogdanm 0:9b334a45a8ff 473 /**
bogdanm 0:9b334a45a8ff 474 * @}
bogdanm 0:9b334a45a8ff 475 */
bogdanm 0:9b334a45a8ff 476
bogdanm 0:9b334a45a8ff 477 #ifdef __cplusplus
bogdanm 0:9b334a45a8ff 478 }
bogdanm 0:9b334a45a8ff 479 #endif
bogdanm 0:9b334a45a8ff 480
bogdanm 0:9b334a45a8ff 481
bogdanm 0:9b334a45a8ff 482 #endif /*__STM32L4xx_HAL_DAC_H */
bogdanm 0:9b334a45a8ff 483
bogdanm 0:9b334a45a8ff 484 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
bogdanm 0:9b334a45a8ff 485