fix LPC812 PWM
Fork of mbed-dev by
targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_tim_ex.h@129:2e517c56bcfb, 2016-05-16 (annotated)
- Committer:
- nameless129
- Date:
- Mon May 16 16:50:30 2016 +0000
- Revision:
- 129:2e517c56bcfb
- Parent:
- 113:b3775bf36a83
PWM Fix:Duty 0%??H???????????????
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
bogdanm | 0:9b334a45a8ff | 1 | /** |
bogdanm | 0:9b334a45a8ff | 2 | ****************************************************************************** |
bogdanm | 0:9b334a45a8ff | 3 | * @file stm32l0xx_hal_tim_ex.h |
bogdanm | 0:9b334a45a8ff | 4 | * @author MCD Application Team |
mbed_official | 113:b3775bf36a83 | 5 | * @version V1.5.0 |
mbed_official | 113:b3775bf36a83 | 6 | * @date 8-January-2016 |
bogdanm | 0:9b334a45a8ff | 7 | * @brief Header file of TIM HAL module. |
bogdanm | 0:9b334a45a8ff | 8 | ****************************************************************************** |
bogdanm | 0:9b334a45a8ff | 9 | * @attention |
bogdanm | 0:9b334a45a8ff | 10 | * |
mbed_official | 113:b3775bf36a83 | 11 | * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
bogdanm | 0:9b334a45a8ff | 12 | * |
bogdanm | 0:9b334a45a8ff | 13 | * Redistribution and use in source and binary forms, with or without modification, |
bogdanm | 0:9b334a45a8ff | 14 | * are permitted provided that the following conditions are met: |
bogdanm | 0:9b334a45a8ff | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
bogdanm | 0:9b334a45a8ff | 16 | * this list of conditions and the following disclaimer. |
bogdanm | 0:9b334a45a8ff | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
bogdanm | 0:9b334a45a8ff | 18 | * this list of conditions and the following disclaimer in the documentation |
bogdanm | 0:9b334a45a8ff | 19 | * and/or other materials provided with the distribution. |
bogdanm | 0:9b334a45a8ff | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
bogdanm | 0:9b334a45a8ff | 21 | * may be used to endorse or promote products derived from this software |
bogdanm | 0:9b334a45a8ff | 22 | * without specific prior written permission. |
bogdanm | 0:9b334a45a8ff | 23 | * |
bogdanm | 0:9b334a45a8ff | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
bogdanm | 0:9b334a45a8ff | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
bogdanm | 0:9b334a45a8ff | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
bogdanm | 0:9b334a45a8ff | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
bogdanm | 0:9b334a45a8ff | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
bogdanm | 0:9b334a45a8ff | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
bogdanm | 0:9b334a45a8ff | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
bogdanm | 0:9b334a45a8ff | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
bogdanm | 0:9b334a45a8ff | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
bogdanm | 0:9b334a45a8ff | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
bogdanm | 0:9b334a45a8ff | 34 | * |
bogdanm | 0:9b334a45a8ff | 35 | ****************************************************************************** |
bogdanm | 0:9b334a45a8ff | 36 | */ |
bogdanm | 0:9b334a45a8ff | 37 | |
bogdanm | 0:9b334a45a8ff | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 39 | #ifndef __STM32L0xx_HAL_TIM_EX_H |
bogdanm | 0:9b334a45a8ff | 40 | #define __STM32L0xx_HAL_TIM_EX_H |
bogdanm | 0:9b334a45a8ff | 41 | |
bogdanm | 0:9b334a45a8ff | 42 | #ifdef __cplusplus |
bogdanm | 0:9b334a45a8ff | 43 | extern "C" { |
bogdanm | 0:9b334a45a8ff | 44 | #endif |
bogdanm | 0:9b334a45a8ff | 45 | |
bogdanm | 0:9b334a45a8ff | 46 | /* Includes ------------------------------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 47 | #include "stm32l0xx_hal_def.h" |
bogdanm | 0:9b334a45a8ff | 48 | |
bogdanm | 0:9b334a45a8ff | 49 | /** @addtogroup STM32L0xx_HAL_Driver |
bogdanm | 0:9b334a45a8ff | 50 | * @{ |
bogdanm | 0:9b334a45a8ff | 51 | */ |
bogdanm | 0:9b334a45a8ff | 52 | |
mbed_official | 113:b3775bf36a83 | 53 | /** @defgroup TIMEx TIMEx |
bogdanm | 0:9b334a45a8ff | 54 | * @{ |
bogdanm | 0:9b334a45a8ff | 55 | */ |
bogdanm | 0:9b334a45a8ff | 56 | |
bogdanm | 0:9b334a45a8ff | 57 | /* Exported types ------------------------------------------------------------*/ |
mbed_official | 113:b3775bf36a83 | 58 | /** @defgroup TIM_Exported_Types TIM Exported Types |
mbed_official | 113:b3775bf36a83 | 59 | * @{ |
mbed_official | 113:b3775bf36a83 | 60 | */ |
bogdanm | 0:9b334a45a8ff | 61 | /** |
bogdanm | 0:9b334a45a8ff | 62 | * @brief TIM Master configuration Structure definition |
bogdanm | 0:9b334a45a8ff | 63 | */ |
bogdanm | 0:9b334a45a8ff | 64 | typedef struct { |
bogdanm | 0:9b334a45a8ff | 65 | uint32_t MasterOutputTrigger; /*!< Trigger output (TRGO) selection |
bogdanm | 0:9b334a45a8ff | 66 | This parameter can be a value of @ref TIM_Master_Mode_Selection */ |
bogdanm | 0:9b334a45a8ff | 67 | uint32_t MasterSlaveMode; /*!< Master/slave mode selection |
bogdanm | 0:9b334a45a8ff | 68 | This parameter can be a value of @ref TIM_Master_Slave_Mode */ |
bogdanm | 0:9b334a45a8ff | 69 | }TIM_MasterConfigTypeDef; |
bogdanm | 0:9b334a45a8ff | 70 | |
mbed_official | 113:b3775bf36a83 | 71 | /** |
mbed_official | 113:b3775bf36a83 | 72 | * @} |
mbed_official | 113:b3775bf36a83 | 73 | */ |
bogdanm | 0:9b334a45a8ff | 74 | |
bogdanm | 0:9b334a45a8ff | 75 | /* Exported constants --------------------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 76 | /** @defgroup TIMEx_Exported_Constants TIMEx Exported Constants |
bogdanm | 0:9b334a45a8ff | 77 | * @{ |
bogdanm | 0:9b334a45a8ff | 78 | */ |
bogdanm | 0:9b334a45a8ff | 79 | |
bogdanm | 0:9b334a45a8ff | 80 | /** @defgroup TIMEx_Trigger_Selection Trigger selection |
bogdanm | 0:9b334a45a8ff | 81 | * @{ |
bogdanm | 0:9b334a45a8ff | 82 | */ |
bogdanm | 0:9b334a45a8ff | 83 | #define TIM_TRGO_RESET ((uint32_t)0x0000) |
bogdanm | 0:9b334a45a8ff | 84 | #define TIM_TRGO_ENABLE (TIM_CR2_MMS_0) |
bogdanm | 0:9b334a45a8ff | 85 | #define TIM_TRGO_UPDATE (TIM_CR2_MMS_1) |
bogdanm | 0:9b334a45a8ff | 86 | #define TIM_TRGO_OC1 ((TIM_CR2_MMS_1 | TIM_CR2_MMS_0)) |
bogdanm | 0:9b334a45a8ff | 87 | #define TIM_TRGO_OC1REF (TIM_CR2_MMS_2) |
bogdanm | 0:9b334a45a8ff | 88 | #define TIM_TRGO_OC2REF ((TIM_CR2_MMS_2 | TIM_CR2_MMS_0)) |
bogdanm | 0:9b334a45a8ff | 89 | #define TIM_TRGO_OC3REF ((TIM_CR2_MMS_2 | TIM_CR2_MMS_1)) |
bogdanm | 0:9b334a45a8ff | 90 | #define TIM_TRGO_OC4REF ((TIM_CR2_MMS_2 | TIM_CR2_MMS_1 | TIM_CR2_MMS_0)) |
bogdanm | 0:9b334a45a8ff | 91 | |
bogdanm | 0:9b334a45a8ff | 92 | #define IS_TIM_TRGO_SOURCE(__SOURCE__) (((__SOURCE__) == TIM_TRGO_RESET) || \ |
bogdanm | 0:9b334a45a8ff | 93 | ((__SOURCE__) == TIM_TRGO_ENABLE) || \ |
bogdanm | 0:9b334a45a8ff | 94 | ((__SOURCE__) == TIM_TRGO_UPDATE) || \ |
bogdanm | 0:9b334a45a8ff | 95 | ((__SOURCE__) == TIM_TRGO_OC1) || \ |
bogdanm | 0:9b334a45a8ff | 96 | ((__SOURCE__) == TIM_TRGO_OC1REF) || \ |
bogdanm | 0:9b334a45a8ff | 97 | ((__SOURCE__) == TIM_TRGO_OC2REF) || \ |
bogdanm | 0:9b334a45a8ff | 98 | ((__SOURCE__) == TIM_TRGO_OC3REF) || \ |
bogdanm | 0:9b334a45a8ff | 99 | ((__SOURCE__) == TIM_TRGO_OC4REF)) |
bogdanm | 0:9b334a45a8ff | 100 | |
bogdanm | 0:9b334a45a8ff | 101 | /** |
bogdanm | 0:9b334a45a8ff | 102 | * @} |
bogdanm | 0:9b334a45a8ff | 103 | */ |
bogdanm | 0:9b334a45a8ff | 104 | |
bogdanm | 0:9b334a45a8ff | 105 | /** @defgroup TIMEx_Remap Remaping |
bogdanm | 0:9b334a45a8ff | 106 | * @{ |
bogdanm | 0:9b334a45a8ff | 107 | */ |
mbed_official | 113:b3775bf36a83 | 108 | #if defined (STM32L071xx) || defined (STM32L072xx) || defined (STM32L073xx) \ |
mbed_official | 113:b3775bf36a83 | 109 | || defined (STM32L081xx) || defined (STM32L082xx) || defined (STM32L083xx) |
mbed_official | 113:b3775bf36a83 | 110 | |
mbed_official | 113:b3775bf36a83 | 111 | #define TIM2_ETR_GPIO ((uint32_t)0x0) |
mbed_official | 113:b3775bf36a83 | 112 | #define TIM2_ETR_HSI48 TIM2_OR_ETR_RMP_2 |
mbed_official | 113:b3775bf36a83 | 113 | #define TIM2_ETR_HSI16 (TIM2_OR_ETR_RMP_1 | TIM2_OR_ETR_RMP_0) |
mbed_official | 113:b3775bf36a83 | 114 | #define TIM2_ETR_LSE (TIM2_OR_ETR_RMP_2 | TIM2_OR_ETR_RMP_0) |
mbed_official | 113:b3775bf36a83 | 115 | #define TIM2_ETR_COMP2_OUT (TIM2_OR_ETR_RMP_2 | TIM2_OR_ETR_RMP_1) |
mbed_official | 113:b3775bf36a83 | 116 | #define TIM2_ETR_COMP1_OUT TIM2_OR_ETR_RMP |
mbed_official | 113:b3775bf36a83 | 117 | |
mbed_official | 113:b3775bf36a83 | 118 | #elif defined (STM32L011xx) || defined (STM32L021xx) || defined (STM32L031xx) || defined (STM32L041xx) |
mbed_official | 113:b3775bf36a83 | 119 | |
mbed_official | 113:b3775bf36a83 | 120 | #define TIM2_ETR_GPIO ((uint32_t)0x0) |
mbed_official | 113:b3775bf36a83 | 121 | #define TIM2_ETR_HSI16 (TIM2_OR_ETR_RMP_1 | TIM2_OR_ETR_RMP_0) |
mbed_official | 113:b3775bf36a83 | 122 | #define TIM2_ETR_LSE (TIM2_OR_ETR_RMP_2 | TIM2_OR_ETR_RMP_0) |
mbed_official | 113:b3775bf36a83 | 123 | #define TIM2_ETR_COMP2_OUT (TIM2_OR_ETR_RMP_2 | TIM2_OR_ETR_RMP_1) |
mbed_official | 113:b3775bf36a83 | 124 | #define TIM2_ETR_COMP1_OUT TIM2_OR_ETR_RMP |
mbed_official | 113:b3775bf36a83 | 125 | |
mbed_official | 113:b3775bf36a83 | 126 | #else |
bogdanm | 0:9b334a45a8ff | 127 | |
bogdanm | 0:9b334a45a8ff | 128 | #define TIM2_ETR_GPIO ((uint32_t)0x0) |
bogdanm | 0:9b334a45a8ff | 129 | #define TIM2_ETR_HSI48 TIM2_OR_ETR_RMP_2 |
bogdanm | 0:9b334a45a8ff | 130 | #define TIM2_ETR_LSE (TIM2_OR_ETR_RMP_2 | TIM2_OR_ETR_RMP_0) |
bogdanm | 0:9b334a45a8ff | 131 | #define TIM2_ETR_COMP2_OUT (TIM2_OR_ETR_RMP_2 | TIM2_OR_ETR_RMP_1) |
bogdanm | 0:9b334a45a8ff | 132 | #define TIM2_ETR_COMP1_OUT TIM2_OR_ETR_RMP |
mbed_official | 113:b3775bf36a83 | 133 | |
mbed_official | 113:b3775bf36a83 | 134 | #endif |
mbed_official | 113:b3775bf36a83 | 135 | |
mbed_official | 113:b3775bf36a83 | 136 | |
mbed_official | 113:b3775bf36a83 | 137 | |
bogdanm | 0:9b334a45a8ff | 138 | #define TIM2_TI4_GPIO ((uint32_t)0x0) |
bogdanm | 0:9b334a45a8ff | 139 | #define TIM2_TI4_COMP2 TIM2_OR_TI4_RMP_0 |
bogdanm | 0:9b334a45a8ff | 140 | #define TIM2_TI4_COMP1 TIM2_OR_TI4_RMP_1 |
bogdanm | 0:9b334a45a8ff | 141 | |
bogdanm | 0:9b334a45a8ff | 142 | #define TIM21_ETR_GPIO ((uint32_t)0x0) |
bogdanm | 0:9b334a45a8ff | 143 | #define TIM21_ETR_COMP2_OUT TIM21_OR_ETR_RMP_0 |
bogdanm | 0:9b334a45a8ff | 144 | #define TIM21_ETR_COMP1_OUT TIM21_OR_ETR_RMP_1 |
bogdanm | 0:9b334a45a8ff | 145 | #define TIM21_ETR_LSE TIM21_OR_ETR_RMP |
bogdanm | 0:9b334a45a8ff | 146 | #define TIM21_TI1_GPIO ((uint32_t)0x0) |
bogdanm | 0:9b334a45a8ff | 147 | #define TIM21_TI1_MCO TIM21_OR_TI1_RMP |
bogdanm | 0:9b334a45a8ff | 148 | #define TIM21_TI1_RTC_WKUT_IT TIM21_OR_TI1_RMP_0 |
bogdanm | 0:9b334a45a8ff | 149 | #define TIM21_TI1_HSE_RTC TIM21_OR_TI1_RMP_1 |
bogdanm | 0:9b334a45a8ff | 150 | #define TIM21_TI1_MSI (TIM21_OR_TI1_RMP_0 | TIM21_OR_TI1_RMP_1) |
bogdanm | 0:9b334a45a8ff | 151 | #define TIM21_TI1_LSE TIM21_OR_TI1_RMP_2 |
bogdanm | 0:9b334a45a8ff | 152 | #define TIM21_TI1_LSI (TIM21_OR_TI1_RMP_2 | TIM21_OR_TI1_RMP_0) |
bogdanm | 0:9b334a45a8ff | 153 | #define TIM21_TI1_COMP1_OUT (TIM21_OR_TI1_RMP_2 | TIM21_OR_TI1_RMP_1) |
bogdanm | 0:9b334a45a8ff | 154 | #define TIM21_TI2_GPIO ((uint32_t)0x0) |
bogdanm | 0:9b334a45a8ff | 155 | #define TIM21_TI2_COMP2_OUT TIM21_OR_TI2_RMP |
bogdanm | 0:9b334a45a8ff | 156 | |
mbed_official | 113:b3775bf36a83 | 157 | #if !defined(STM32L011xx) && !defined(STM32L021xx) |
bogdanm | 0:9b334a45a8ff | 158 | #define TIM22_ETR_LSE ((uint32_t)0x0) |
bogdanm | 0:9b334a45a8ff | 159 | #define TIM22_ETR_COMP2_OUT TIM22_OR_ETR_RMP_0 |
bogdanm | 0:9b334a45a8ff | 160 | #define TIM22_ETR_COMP1_OUT TIM22_OR_ETR_RMP_1 |
bogdanm | 0:9b334a45a8ff | 161 | #define TIM22_ETR_GPIO TIM22_OR_ETR_RMP |
bogdanm | 0:9b334a45a8ff | 162 | #define TIM22_TI1_GPIO1 ((uint32_t)0x0) |
bogdanm | 0:9b334a45a8ff | 163 | #define TIM22_TI1_COMP2_OUT TIM22_OR_TI1_RMP_0 |
bogdanm | 0:9b334a45a8ff | 164 | #define TIM22_TI1_COMP1_OUT TIM22_OR_TI1_RMP_1 |
bogdanm | 0:9b334a45a8ff | 165 | #define TIM22_TI1_GPIO2 TIM22_OR_TI1_RMP |
mbed_official | 113:b3775bf36a83 | 166 | #endif |
bogdanm | 0:9b334a45a8ff | 167 | |
bogdanm | 0:9b334a45a8ff | 168 | #if defined (STM32L071xx) || defined (STM32L072xx) || defined (STM32L073xx) \ |
bogdanm | 0:9b334a45a8ff | 169 | || defined (STM32L081xx) || defined (STM32L082xx) || defined (STM32L083xx) |
bogdanm | 0:9b334a45a8ff | 170 | |
bogdanm | 0:9b334a45a8ff | 171 | #define TIM3_TI4_GPIO_DEF ((uint32_t)0x0) |
bogdanm | 0:9b334a45a8ff | 172 | #define TIM3_TI4_GPIOC9_AF2 TIM3_OR_TI4_RMP |
bogdanm | 0:9b334a45a8ff | 173 | #define TIM3_TI2_GPIO_DEF ((uint32_t)0x0) |
bogdanm | 0:9b334a45a8ff | 174 | #define TIM3_TI2_GPIOB5_AF4 TIM3_OR_TI2_RMP |
bogdanm | 0:9b334a45a8ff | 175 | #define TIM3_TI1_USB_SOF ((uint32_t)0x0) |
bogdanm | 0:9b334a45a8ff | 176 | #define TIM3_TI1_GPIO TIM3_OR_TI1_RMP |
bogdanm | 0:9b334a45a8ff | 177 | #define TIM3_ETR_GPIO ((uint32_t)0x0) |
bogdanm | 0:9b334a45a8ff | 178 | #define TIM3_ETR_HSI TIM3_OR_ETR_RMP_1 |
bogdanm | 0:9b334a45a8ff | 179 | |
bogdanm | 0:9b334a45a8ff | 180 | #endif /*defined (STM32L07Xxx) or defined (STM32L08Xxx) */ |
mbed_official | 113:b3775bf36a83 | 181 | |
bogdanm | 0:9b334a45a8ff | 182 | |
bogdanm | 0:9b334a45a8ff | 183 | #if defined (STM32L071xx) || defined (STM32L072xx) || defined (STM32L073xx) \ |
bogdanm | 0:9b334a45a8ff | 184 | || defined (STM32L081xx) || defined (STM32L082xx) || defined (STM32L083xx) |
bogdanm | 0:9b334a45a8ff | 185 | |
bogdanm | 0:9b334a45a8ff | 186 | |
bogdanm | 0:9b334a45a8ff | 187 | #define IS_TIM_REMAP(__INSTANCE__, __TIM_REMAP__) \ |
bogdanm | 0:9b334a45a8ff | 188 | (((__INSTANCE__ == TIM2) && ((__TIM_REMAP__) <= (TIM2_OR_TI4_RMP | TIM2_OR_ETR_RMP))) || \ |
bogdanm | 0:9b334a45a8ff | 189 | ((__INSTANCE__ == TIM22) && ((__TIM_REMAP__) <= (TIM22_OR_TI1_RMP | TIM22_OR_ETR_RMP))) || \ |
bogdanm | 0:9b334a45a8ff | 190 | ((__INSTANCE__ == TIM21) && ((__TIM_REMAP__) <= (TIM21_OR_ETR_RMP | TIM21_OR_TI1_RMP | TIM21_OR_TI2_RMP))) || \ |
bogdanm | 0:9b334a45a8ff | 191 | ((__INSTANCE__ == TIM3) && ((__TIM_REMAP__) <= (TIM3_OR_ETR_RMP | TIM3_OR_TI1_RMP | TIM3_OR_TI2_RMP | TIM3_OR_TI4_RMP)))) |
bogdanm | 0:9b334a45a8ff | 192 | |
bogdanm | 0:9b334a45a8ff | 193 | #define IS_CHANNEL_AVAILABLE(__INSTANCE__, __CHANNEL__) \ |
bogdanm | 0:9b334a45a8ff | 194 | (((__INSTANCE__ == TIM2) && (((__CHANNEL__) == TIM_CHANNEL_1) || \ |
bogdanm | 0:9b334a45a8ff | 195 | ((__CHANNEL__) == TIM_CHANNEL_2) || \ |
bogdanm | 0:9b334a45a8ff | 196 | ((__CHANNEL__) == TIM_CHANNEL_3) || \ |
bogdanm | 0:9b334a45a8ff | 197 | ((__CHANNEL__) == TIM_CHANNEL_4))) || \ |
bogdanm | 0:9b334a45a8ff | 198 | ((__INSTANCE__ == TIM3) && (((__CHANNEL__) == TIM_CHANNEL_1) || \ |
bogdanm | 0:9b334a45a8ff | 199 | ((__CHANNEL__) == TIM_CHANNEL_2) || \ |
bogdanm | 0:9b334a45a8ff | 200 | ((__CHANNEL__) == TIM_CHANNEL_3) || \ |
bogdanm | 0:9b334a45a8ff | 201 | ((__CHANNEL__) == TIM_CHANNEL_4))) || \ |
bogdanm | 0:9b334a45a8ff | 202 | ((__INSTANCE__ == TIM21) && (((__CHANNEL__) == TIM_CHANNEL_1) || \ |
bogdanm | 0:9b334a45a8ff | 203 | ((__CHANNEL__) == TIM_CHANNEL_2))) || \ |
bogdanm | 0:9b334a45a8ff | 204 | ((__INSTANCE__ == TIM22) && (((__CHANNEL__) == TIM_CHANNEL_1) || \ |
bogdanm | 0:9b334a45a8ff | 205 | ((__CHANNEL__) == TIM_CHANNEL_2)))) |
mbed_official | 113:b3775bf36a83 | 206 | |
mbed_official | 113:b3775bf36a83 | 207 | #elif defined (STM32L011xx) || defined (STM32L021xx) |
bogdanm | 0:9b334a45a8ff | 208 | |
mbed_official | 113:b3775bf36a83 | 209 | #define IS_TIM_REMAP(__INSTANCE__, __TIM_REMAP__) \ |
mbed_official | 113:b3775bf36a83 | 210 | (((__INSTANCE__ == TIM2) && ((__TIM_REMAP__) <= (TIM2_OR_TI4_RMP | TIM2_OR_ETR_RMP))) || \ |
mbed_official | 113:b3775bf36a83 | 211 | ((__INSTANCE__ == TIM21) && ((__TIM_REMAP__) <= (TIM21_OR_ETR_RMP | TIM21_OR_TI1_RMP | TIM21_OR_TI2_RMP)))) |
mbed_official | 113:b3775bf36a83 | 212 | |
mbed_official | 113:b3775bf36a83 | 213 | #define IS_CHANNEL_AVAILABLE(__INSTANCE__, __CHANNEL__) \ |
mbed_official | 113:b3775bf36a83 | 214 | (((__INSTANCE__ == TIM2) && (((__CHANNEL__) == TIM_CHANNEL_1) || \ |
mbed_official | 113:b3775bf36a83 | 215 | ((__CHANNEL__) == TIM_CHANNEL_2) || \ |
mbed_official | 113:b3775bf36a83 | 216 | ((__CHANNEL__) == TIM_CHANNEL_3) || \ |
mbed_official | 113:b3775bf36a83 | 217 | ((__CHANNEL__) == TIM_CHANNEL_4))) || \ |
mbed_official | 113:b3775bf36a83 | 218 | ((__INSTANCE__ == TIM21) && (((__CHANNEL__) == TIM_CHANNEL_1) || \ |
mbed_official | 113:b3775bf36a83 | 219 | ((__CHANNEL__) == TIM_CHANNEL_2)))) |
mbed_official | 113:b3775bf36a83 | 220 | |
bogdanm | 0:9b334a45a8ff | 221 | #else |
bogdanm | 0:9b334a45a8ff | 222 | |
bogdanm | 0:9b334a45a8ff | 223 | #define IS_TIM_REMAP(__INSTANCE__, __TIM_REMAP__) \ |
bogdanm | 0:9b334a45a8ff | 224 | (((__INSTANCE__ == TIM2) && ((__TIM_REMAP__) <= (TIM2_OR_TI4_RMP | TIM2_OR_ETR_RMP))) || \ |
bogdanm | 0:9b334a45a8ff | 225 | ((__INSTANCE__ == TIM22) && ((__TIM_REMAP__) <= (TIM22_OR_TI1_RMP | TIM22_OR_ETR_RMP))) || \ |
bogdanm | 0:9b334a45a8ff | 226 | ((__INSTANCE__ == TIM21) && ((__TIM_REMAP__) <= (TIM21_OR_ETR_RMP | TIM21_OR_TI1_RMP | TIM21_OR_TI2_RMP)))) |
bogdanm | 0:9b334a45a8ff | 227 | |
bogdanm | 0:9b334a45a8ff | 228 | #define IS_CHANNEL_AVAILABLE(__INSTANCE__, __CHANNEL__) \ |
bogdanm | 0:9b334a45a8ff | 229 | (((__INSTANCE__ == TIM2) && (((__CHANNEL__) == TIM_CHANNEL_1) || \ |
bogdanm | 0:9b334a45a8ff | 230 | ((__CHANNEL__) == TIM_CHANNEL_2) || \ |
bogdanm | 0:9b334a45a8ff | 231 | ((__CHANNEL__) == TIM_CHANNEL_3) || \ |
bogdanm | 0:9b334a45a8ff | 232 | ((__CHANNEL__) == TIM_CHANNEL_4))) || \ |
bogdanm | 0:9b334a45a8ff | 233 | ((__INSTANCE__ == TIM21) && (((__CHANNEL__) == TIM_CHANNEL_1) || \ |
bogdanm | 0:9b334a45a8ff | 234 | ((__CHANNEL__) == TIM_CHANNEL_2))) || \ |
bogdanm | 0:9b334a45a8ff | 235 | ((__INSTANCE__ == TIM22) && (((__CHANNEL__) == TIM_CHANNEL_1) || \ |
bogdanm | 0:9b334a45a8ff | 236 | ((__CHANNEL__) == TIM_CHANNEL_2)))) |
bogdanm | 0:9b334a45a8ff | 237 | |
bogdanm | 0:9b334a45a8ff | 238 | #endif /*defined (STM32L07Xxx) or defined (STM32L08Xxx) */ |
bogdanm | 0:9b334a45a8ff | 239 | |
bogdanm | 0:9b334a45a8ff | 240 | |
bogdanm | 0:9b334a45a8ff | 241 | /** |
bogdanm | 0:9b334a45a8ff | 242 | * @} |
bogdanm | 0:9b334a45a8ff | 243 | */ |
bogdanm | 0:9b334a45a8ff | 244 | |
bogdanm | 0:9b334a45a8ff | 245 | /** |
bogdanm | 0:9b334a45a8ff | 246 | * @} |
bogdanm | 0:9b334a45a8ff | 247 | */ |
bogdanm | 0:9b334a45a8ff | 248 | |
bogdanm | 0:9b334a45a8ff | 249 | |
bogdanm | 0:9b334a45a8ff | 250 | /* Exported macro ------------------------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 251 | /* Exported functions --------------------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 252 | /* Control functions ***********************************************************/ |
bogdanm | 0:9b334a45a8ff | 253 | |
bogdanm | 0:9b334a45a8ff | 254 | /** @defgroup TIMEx_Exported_Functions TIMEx Exported Functions |
bogdanm | 0:9b334a45a8ff | 255 | * @{ |
bogdanm | 0:9b334a45a8ff | 256 | */ |
bogdanm | 0:9b334a45a8ff | 257 | |
bogdanm | 0:9b334a45a8ff | 258 | /** @defgroup TIMEx_Exported_Functions_Group1 TIMEx Peripheral Control functions |
bogdanm | 0:9b334a45a8ff | 259 | * @{ |
bogdanm | 0:9b334a45a8ff | 260 | */ |
bogdanm | 0:9b334a45a8ff | 261 | |
bogdanm | 0:9b334a45a8ff | 262 | HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap); |
bogdanm | 0:9b334a45a8ff | 263 | HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, TIM_MasterConfigTypeDef * sMasterConfig); |
bogdanm | 0:9b334a45a8ff | 264 | |
bogdanm | 0:9b334a45a8ff | 265 | /** |
bogdanm | 0:9b334a45a8ff | 266 | * @} |
bogdanm | 0:9b334a45a8ff | 267 | */ |
bogdanm | 0:9b334a45a8ff | 268 | |
bogdanm | 0:9b334a45a8ff | 269 | /** |
bogdanm | 0:9b334a45a8ff | 270 | * @} |
bogdanm | 0:9b334a45a8ff | 271 | */ |
bogdanm | 0:9b334a45a8ff | 272 | |
bogdanm | 0:9b334a45a8ff | 273 | /** |
bogdanm | 0:9b334a45a8ff | 274 | * @} |
bogdanm | 0:9b334a45a8ff | 275 | */ |
bogdanm | 0:9b334a45a8ff | 276 | |
bogdanm | 0:9b334a45a8ff | 277 | /** |
bogdanm | 0:9b334a45a8ff | 278 | * @} |
bogdanm | 0:9b334a45a8ff | 279 | */ |
bogdanm | 0:9b334a45a8ff | 280 | #ifdef __cplusplus |
bogdanm | 0:9b334a45a8ff | 281 | } |
bogdanm | 0:9b334a45a8ff | 282 | #endif |
bogdanm | 0:9b334a45a8ff | 283 | |
bogdanm | 0:9b334a45a8ff | 284 | #endif /* __STM32L0xx_HAL_TIM_EX_H */ |
bogdanm | 0:9b334a45a8ff | 285 | |
bogdanm | 0:9b334a45a8ff | 286 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
bogdanm | 0:9b334a45a8ff | 287 |