fix LPC812 PWM
Fork of mbed-dev by
targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_adc_ex.c@129:2e517c56bcfb, 2016-05-16 (annotated)
- Committer:
- nameless129
- Date:
- Mon May 16 16:50:30 2016 +0000
- Revision:
- 129:2e517c56bcfb
- Parent:
- 19:112740acecfa
PWM Fix:Duty 0%??H???????????????
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
bogdanm | 0:9b334a45a8ff | 1 | /** |
bogdanm | 0:9b334a45a8ff | 2 | ****************************************************************************** |
bogdanm | 0:9b334a45a8ff | 3 | * @file stm32f4xx_hal_adc_ex.c |
bogdanm | 0:9b334a45a8ff | 4 | * @author MCD Application Team |
mbed_official | 19:112740acecfa | 5 | * @version V1.4.1 |
mbed_official | 19:112740acecfa | 6 | * @date 09-October-2015 |
bogdanm | 0:9b334a45a8ff | 7 | * @brief This file provides firmware functions to manage the following |
bogdanm | 0:9b334a45a8ff | 8 | * functionalities of the ADC extension peripheral: |
bogdanm | 0:9b334a45a8ff | 9 | * + Extended features functions |
bogdanm | 0:9b334a45a8ff | 10 | * |
bogdanm | 0:9b334a45a8ff | 11 | @verbatim |
bogdanm | 0:9b334a45a8ff | 12 | ============================================================================== |
bogdanm | 0:9b334a45a8ff | 13 | ##### How to use this driver ##### |
bogdanm | 0:9b334a45a8ff | 14 | ============================================================================== |
bogdanm | 0:9b334a45a8ff | 15 | [..] |
bogdanm | 0:9b334a45a8ff | 16 | (#)Initialize the ADC low level resources by implementing the HAL_ADC_MspInit(): |
bogdanm | 0:9b334a45a8ff | 17 | (##) Enable the ADC interface clock using __HAL_RCC_ADC_CLK_ENABLE() |
bogdanm | 0:9b334a45a8ff | 18 | (##) ADC pins configuration |
bogdanm | 0:9b334a45a8ff | 19 | (+++) Enable the clock for the ADC GPIOs using the following function: |
bogdanm | 0:9b334a45a8ff | 20 | __HAL_RCC_GPIOx_CLK_ENABLE() |
bogdanm | 0:9b334a45a8ff | 21 | (+++) Configure these ADC pins in analog mode using HAL_GPIO_Init() |
bogdanm | 0:9b334a45a8ff | 22 | (##) In case of using interrupts (e.g. HAL_ADC_Start_IT()) |
bogdanm | 0:9b334a45a8ff | 23 | (+++) Configure the ADC interrupt priority using HAL_NVIC_SetPriority() |
bogdanm | 0:9b334a45a8ff | 24 | (+++) Enable the ADC IRQ handler using HAL_NVIC_EnableIRQ() |
bogdanm | 0:9b334a45a8ff | 25 | (+++) In ADC IRQ handler, call HAL_ADC_IRQHandler() |
bogdanm | 0:9b334a45a8ff | 26 | (##) In case of using DMA to control data transfer (e.g. HAL_ADC_Start_DMA()) |
bogdanm | 0:9b334a45a8ff | 27 | (+++) Enable the DMAx interface clock using __HAL_RCC_DMAx_CLK_ENABLE() |
bogdanm | 0:9b334a45a8ff | 28 | (+++) Configure and enable two DMA streams stream for managing data |
bogdanm | 0:9b334a45a8ff | 29 | transfer from peripheral to memory (output stream) |
bogdanm | 0:9b334a45a8ff | 30 | (+++) Associate the initialized DMA handle to the ADC DMA handle |
bogdanm | 0:9b334a45a8ff | 31 | using __HAL_LINKDMA() |
bogdanm | 0:9b334a45a8ff | 32 | (+++) Configure the priority and enable the NVIC for the transfer complete |
bogdanm | 0:9b334a45a8ff | 33 | interrupt on the two DMA Streams. The output stream should have higher |
bogdanm | 0:9b334a45a8ff | 34 | priority than the input stream. |
bogdanm | 0:9b334a45a8ff | 35 | (#) Configure the ADC Prescaler, conversion resolution and data alignment |
bogdanm | 0:9b334a45a8ff | 36 | using the HAL_ADC_Init() function. |
bogdanm | 0:9b334a45a8ff | 37 | |
bogdanm | 0:9b334a45a8ff | 38 | (#) Configure the ADC Injected channels group features, use HAL_ADC_Init() |
bogdanm | 0:9b334a45a8ff | 39 | and HAL_ADC_ConfigChannel() functions. |
bogdanm | 0:9b334a45a8ff | 40 | |
bogdanm | 0:9b334a45a8ff | 41 | (#) Three operation modes are available within this driver : |
bogdanm | 0:9b334a45a8ff | 42 | |
bogdanm | 0:9b334a45a8ff | 43 | *** Polling mode IO operation *** |
bogdanm | 0:9b334a45a8ff | 44 | ================================= |
bogdanm | 0:9b334a45a8ff | 45 | [..] |
bogdanm | 0:9b334a45a8ff | 46 | (+) Start the ADC peripheral using HAL_ADCEx_InjectedStart() |
bogdanm | 0:9b334a45a8ff | 47 | (+) Wait for end of conversion using HAL_ADC_PollForConversion(), at this stage |
bogdanm | 0:9b334a45a8ff | 48 | user can specify the value of timeout according to his end application |
bogdanm | 0:9b334a45a8ff | 49 | (+) To read the ADC converted values, use the HAL_ADCEx_InjectedGetValue() function. |
bogdanm | 0:9b334a45a8ff | 50 | (+) Stop the ADC peripheral using HAL_ADCEx_InjectedStop() |
bogdanm | 0:9b334a45a8ff | 51 | |
bogdanm | 0:9b334a45a8ff | 52 | *** Interrupt mode IO operation *** |
bogdanm | 0:9b334a45a8ff | 53 | =================================== |
bogdanm | 0:9b334a45a8ff | 54 | [..] |
bogdanm | 0:9b334a45a8ff | 55 | (+) Start the ADC peripheral using HAL_ADCEx_InjectedStart_IT() |
bogdanm | 0:9b334a45a8ff | 56 | (+) Use HAL_ADC_IRQHandler() called under ADC_IRQHandler() Interrupt subroutine |
bogdanm | 0:9b334a45a8ff | 57 | (+) At ADC end of conversion HAL_ADCEx_InjectedConvCpltCallback() function is executed and user can |
bogdanm | 0:9b334a45a8ff | 58 | add his own code by customization of function pointer HAL_ADCEx_InjectedConvCpltCallback |
bogdanm | 0:9b334a45a8ff | 59 | (+) In case of ADC Error, HAL_ADCEx_InjectedErrorCallback() function is executed and user can |
bogdanm | 0:9b334a45a8ff | 60 | add his own code by customization of function pointer HAL_ADCEx_InjectedErrorCallback |
bogdanm | 0:9b334a45a8ff | 61 | (+) Stop the ADC peripheral using HAL_ADCEx_InjectedStop_IT() |
bogdanm | 0:9b334a45a8ff | 62 | |
bogdanm | 0:9b334a45a8ff | 63 | |
bogdanm | 0:9b334a45a8ff | 64 | *** DMA mode IO operation *** |
bogdanm | 0:9b334a45a8ff | 65 | ============================== |
bogdanm | 0:9b334a45a8ff | 66 | [..] |
bogdanm | 0:9b334a45a8ff | 67 | (+) Start the ADC peripheral using HAL_ADCEx_InjectedStart_DMA(), at this stage the user specify the length |
bogdanm | 0:9b334a45a8ff | 68 | of data to be transferred at each end of conversion |
bogdanm | 0:9b334a45a8ff | 69 | (+) At The end of data transfer ba HAL_ADCEx_InjectedConvCpltCallback() function is executed and user can |
bogdanm | 0:9b334a45a8ff | 70 | add his own code by customization of function pointer HAL_ADCEx_InjectedConvCpltCallback |
bogdanm | 0:9b334a45a8ff | 71 | (+) In case of transfer Error, HAL_ADCEx_InjectedErrorCallback() function is executed and user can |
bogdanm | 0:9b334a45a8ff | 72 | add his own code by customization of function pointer HAL_ADCEx_InjectedErrorCallback |
bogdanm | 0:9b334a45a8ff | 73 | (+) Stop the ADC peripheral using HAL_ADCEx_InjectedStop_DMA() |
bogdanm | 0:9b334a45a8ff | 74 | |
bogdanm | 0:9b334a45a8ff | 75 | *** Multi mode ADCs Regular channels configuration *** |
bogdanm | 0:9b334a45a8ff | 76 | ====================================================== |
bogdanm | 0:9b334a45a8ff | 77 | [..] |
bogdanm | 0:9b334a45a8ff | 78 | (+) Select the Multi mode ADC regular channels features (dual or triple mode) |
bogdanm | 0:9b334a45a8ff | 79 | and configure the DMA mode using HAL_ADCEx_MultiModeConfigChannel() functions. |
bogdanm | 0:9b334a45a8ff | 80 | (+) Start the ADC peripheral using HAL_ADCEx_MultiModeStart_DMA(), at this stage the user specify the length |
bogdanm | 0:9b334a45a8ff | 81 | of data to be transferred at each end of conversion |
bogdanm | 0:9b334a45a8ff | 82 | (+) Read the ADCs converted values using the HAL_ADCEx_MultiModeGetValue() function. |
bogdanm | 0:9b334a45a8ff | 83 | |
bogdanm | 0:9b334a45a8ff | 84 | |
bogdanm | 0:9b334a45a8ff | 85 | @endverbatim |
bogdanm | 0:9b334a45a8ff | 86 | ****************************************************************************** |
bogdanm | 0:9b334a45a8ff | 87 | * @attention |
bogdanm | 0:9b334a45a8ff | 88 | * |
bogdanm | 0:9b334a45a8ff | 89 | * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> |
bogdanm | 0:9b334a45a8ff | 90 | * |
bogdanm | 0:9b334a45a8ff | 91 | * Redistribution and use in source and binary forms, with or without modification, |
bogdanm | 0:9b334a45a8ff | 92 | * are permitted provided that the following conditions are met: |
bogdanm | 0:9b334a45a8ff | 93 | * 1. Redistributions of source code must retain the above copyright notice, |
bogdanm | 0:9b334a45a8ff | 94 | * this list of conditions and the following disclaimer. |
bogdanm | 0:9b334a45a8ff | 95 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
bogdanm | 0:9b334a45a8ff | 96 | * this list of conditions and the following disclaimer in the documentation |
bogdanm | 0:9b334a45a8ff | 97 | * and/or other materials provided with the distribution. |
bogdanm | 0:9b334a45a8ff | 98 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
bogdanm | 0:9b334a45a8ff | 99 | * may be used to endorse or promote products derived from this software |
bogdanm | 0:9b334a45a8ff | 100 | * without specific prior written permission. |
bogdanm | 0:9b334a45a8ff | 101 | * |
bogdanm | 0:9b334a45a8ff | 102 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
bogdanm | 0:9b334a45a8ff | 103 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
bogdanm | 0:9b334a45a8ff | 104 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
bogdanm | 0:9b334a45a8ff | 105 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
bogdanm | 0:9b334a45a8ff | 106 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
bogdanm | 0:9b334a45a8ff | 107 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
bogdanm | 0:9b334a45a8ff | 108 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
bogdanm | 0:9b334a45a8ff | 109 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
bogdanm | 0:9b334a45a8ff | 110 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
bogdanm | 0:9b334a45a8ff | 111 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
bogdanm | 0:9b334a45a8ff | 112 | * |
bogdanm | 0:9b334a45a8ff | 113 | ****************************************************************************** |
bogdanm | 0:9b334a45a8ff | 114 | */ |
bogdanm | 0:9b334a45a8ff | 115 | |
bogdanm | 0:9b334a45a8ff | 116 | /* Includes ------------------------------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 117 | #include "stm32f4xx_hal.h" |
bogdanm | 0:9b334a45a8ff | 118 | |
bogdanm | 0:9b334a45a8ff | 119 | /** @addtogroup STM32F4xx_HAL_Driver |
bogdanm | 0:9b334a45a8ff | 120 | * @{ |
bogdanm | 0:9b334a45a8ff | 121 | */ |
bogdanm | 0:9b334a45a8ff | 122 | |
bogdanm | 0:9b334a45a8ff | 123 | /** @defgroup ADCEx ADCEx |
bogdanm | 0:9b334a45a8ff | 124 | * @brief ADC Extended driver modules |
bogdanm | 0:9b334a45a8ff | 125 | * @{ |
bogdanm | 0:9b334a45a8ff | 126 | */ |
bogdanm | 0:9b334a45a8ff | 127 | |
bogdanm | 0:9b334a45a8ff | 128 | #ifdef HAL_ADC_MODULE_ENABLED |
bogdanm | 0:9b334a45a8ff | 129 | |
bogdanm | 0:9b334a45a8ff | 130 | /* Private typedef -----------------------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 131 | /* Private define ------------------------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 132 | /* Private macro -------------------------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 133 | /* Private variables ---------------------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 134 | /** @addtogroup ADCEx_Private_Functions |
bogdanm | 0:9b334a45a8ff | 135 | * @{ |
bogdanm | 0:9b334a45a8ff | 136 | */ |
bogdanm | 0:9b334a45a8ff | 137 | /* Private function prototypes -----------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 138 | static void ADC_MultiModeDMAConvCplt(DMA_HandleTypeDef *hdma); |
bogdanm | 0:9b334a45a8ff | 139 | static void ADC_MultiModeDMAError(DMA_HandleTypeDef *hdma); |
bogdanm | 0:9b334a45a8ff | 140 | static void ADC_MultiModeDMAHalfConvCplt(DMA_HandleTypeDef *hdma); |
bogdanm | 0:9b334a45a8ff | 141 | /** |
bogdanm | 0:9b334a45a8ff | 142 | * @} |
bogdanm | 0:9b334a45a8ff | 143 | */ |
bogdanm | 0:9b334a45a8ff | 144 | |
bogdanm | 0:9b334a45a8ff | 145 | /* Exported functions --------------------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 146 | /** @defgroup ADCEx_Exported_Functions ADC Exported Functions |
bogdanm | 0:9b334a45a8ff | 147 | * @{ |
bogdanm | 0:9b334a45a8ff | 148 | */ |
bogdanm | 0:9b334a45a8ff | 149 | |
bogdanm | 0:9b334a45a8ff | 150 | /** @defgroup ADCEx_Exported_Functions_Group1 Extended features functions |
bogdanm | 0:9b334a45a8ff | 151 | * @brief Extended features functions |
bogdanm | 0:9b334a45a8ff | 152 | * |
bogdanm | 0:9b334a45a8ff | 153 | @verbatim |
bogdanm | 0:9b334a45a8ff | 154 | =============================================================================== |
bogdanm | 0:9b334a45a8ff | 155 | ##### Extended features functions ##### |
bogdanm | 0:9b334a45a8ff | 156 | =============================================================================== |
bogdanm | 0:9b334a45a8ff | 157 | [..] This section provides functions allowing to: |
bogdanm | 0:9b334a45a8ff | 158 | (+) Start conversion of injected channel. |
bogdanm | 0:9b334a45a8ff | 159 | (+) Stop conversion of injected channel. |
bogdanm | 0:9b334a45a8ff | 160 | (+) Start multimode and enable DMA transfer. |
bogdanm | 0:9b334a45a8ff | 161 | (+) Stop multimode and disable DMA transfer. |
bogdanm | 0:9b334a45a8ff | 162 | (+) Get result of injected channel conversion. |
bogdanm | 0:9b334a45a8ff | 163 | (+) Get result of multimode conversion. |
bogdanm | 0:9b334a45a8ff | 164 | (+) Configure injected channels. |
bogdanm | 0:9b334a45a8ff | 165 | (+) Configure multimode. |
bogdanm | 0:9b334a45a8ff | 166 | |
bogdanm | 0:9b334a45a8ff | 167 | @endverbatim |
bogdanm | 0:9b334a45a8ff | 168 | * @{ |
bogdanm | 0:9b334a45a8ff | 169 | */ |
bogdanm | 0:9b334a45a8ff | 170 | |
bogdanm | 0:9b334a45a8ff | 171 | /** |
bogdanm | 0:9b334a45a8ff | 172 | * @brief Enables the selected ADC software start conversion of the injected channels. |
bogdanm | 0:9b334a45a8ff | 173 | * @param hadc: pointer to a ADC_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 174 | * the configuration information for the specified ADC. |
bogdanm | 0:9b334a45a8ff | 175 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 176 | */ |
bogdanm | 0:9b334a45a8ff | 177 | HAL_StatusTypeDef HAL_ADCEx_InjectedStart(ADC_HandleTypeDef* hadc) |
bogdanm | 0:9b334a45a8ff | 178 | { |
bogdanm | 0:9b334a45a8ff | 179 | __IO uint32_t counter = 0; |
bogdanm | 0:9b334a45a8ff | 180 | uint32_t tmp1 = 0, tmp2 = 0; |
bogdanm | 0:9b334a45a8ff | 181 | |
bogdanm | 0:9b334a45a8ff | 182 | /* Process locked */ |
bogdanm | 0:9b334a45a8ff | 183 | __HAL_LOCK(hadc); |
bogdanm | 0:9b334a45a8ff | 184 | |
bogdanm | 0:9b334a45a8ff | 185 | /* Check if a regular conversion is ongoing */ |
bogdanm | 0:9b334a45a8ff | 186 | if(hadc->State == HAL_ADC_STATE_BUSY_REG) |
bogdanm | 0:9b334a45a8ff | 187 | { |
bogdanm | 0:9b334a45a8ff | 188 | /* Change ADC state */ |
bogdanm | 0:9b334a45a8ff | 189 | hadc->State = HAL_ADC_STATE_BUSY_INJ_REG; |
bogdanm | 0:9b334a45a8ff | 190 | } |
bogdanm | 0:9b334a45a8ff | 191 | else |
bogdanm | 0:9b334a45a8ff | 192 | { |
bogdanm | 0:9b334a45a8ff | 193 | /* Change ADC state */ |
bogdanm | 0:9b334a45a8ff | 194 | hadc->State = HAL_ADC_STATE_BUSY_INJ; |
bogdanm | 0:9b334a45a8ff | 195 | } |
bogdanm | 0:9b334a45a8ff | 196 | |
bogdanm | 0:9b334a45a8ff | 197 | /* Check if ADC peripheral is disabled in order to enable it and wait during |
bogdanm | 0:9b334a45a8ff | 198 | Tstab time the ADC's stabilization */ |
bogdanm | 0:9b334a45a8ff | 199 | if((hadc->Instance->CR2 & ADC_CR2_ADON) != ADC_CR2_ADON) |
bogdanm | 0:9b334a45a8ff | 200 | { |
bogdanm | 0:9b334a45a8ff | 201 | /* Enable the Peripheral */ |
bogdanm | 0:9b334a45a8ff | 202 | __HAL_ADC_ENABLE(hadc); |
bogdanm | 0:9b334a45a8ff | 203 | |
bogdanm | 0:9b334a45a8ff | 204 | /* Delay for temperature sensor stabilization time */ |
bogdanm | 0:9b334a45a8ff | 205 | /* Compute number of CPU cycles to wait for */ |
bogdanm | 0:9b334a45a8ff | 206 | counter = (ADC_STAB_DELAY_US * (SystemCoreClock / 1000000)); |
bogdanm | 0:9b334a45a8ff | 207 | while(counter != 0) |
bogdanm | 0:9b334a45a8ff | 208 | { |
bogdanm | 0:9b334a45a8ff | 209 | counter--; |
bogdanm | 0:9b334a45a8ff | 210 | } |
bogdanm | 0:9b334a45a8ff | 211 | } |
bogdanm | 0:9b334a45a8ff | 212 | |
bogdanm | 0:9b334a45a8ff | 213 | /* Check if Multimode enabled */ |
bogdanm | 0:9b334a45a8ff | 214 | if(HAL_IS_BIT_CLR(ADC->CCR, ADC_CCR_MULTI)) |
bogdanm | 0:9b334a45a8ff | 215 | { |
bogdanm | 0:9b334a45a8ff | 216 | tmp1 = HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_JEXTEN); |
bogdanm | 0:9b334a45a8ff | 217 | tmp2 = HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO); |
bogdanm | 0:9b334a45a8ff | 218 | if(tmp1 && tmp2) |
bogdanm | 0:9b334a45a8ff | 219 | { |
bogdanm | 0:9b334a45a8ff | 220 | /* Enable the selected ADC software conversion for injected group */ |
bogdanm | 0:9b334a45a8ff | 221 | hadc->Instance->CR2 |= ADC_CR2_JSWSTART; |
bogdanm | 0:9b334a45a8ff | 222 | } |
bogdanm | 0:9b334a45a8ff | 223 | } |
bogdanm | 0:9b334a45a8ff | 224 | else |
bogdanm | 0:9b334a45a8ff | 225 | { |
bogdanm | 0:9b334a45a8ff | 226 | tmp1 = HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_JEXTEN); |
bogdanm | 0:9b334a45a8ff | 227 | tmp2 = HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO); |
bogdanm | 0:9b334a45a8ff | 228 | if((hadc->Instance == ADC1) && tmp1 && tmp2) |
bogdanm | 0:9b334a45a8ff | 229 | { |
bogdanm | 0:9b334a45a8ff | 230 | /* Enable the selected ADC software conversion for injected group */ |
bogdanm | 0:9b334a45a8ff | 231 | hadc->Instance->CR2 |= ADC_CR2_JSWSTART; |
bogdanm | 0:9b334a45a8ff | 232 | } |
bogdanm | 0:9b334a45a8ff | 233 | } |
bogdanm | 0:9b334a45a8ff | 234 | |
bogdanm | 0:9b334a45a8ff | 235 | /* Process unlocked */ |
bogdanm | 0:9b334a45a8ff | 236 | __HAL_UNLOCK(hadc); |
bogdanm | 0:9b334a45a8ff | 237 | |
bogdanm | 0:9b334a45a8ff | 238 | /* Return function status */ |
bogdanm | 0:9b334a45a8ff | 239 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 240 | } |
bogdanm | 0:9b334a45a8ff | 241 | |
bogdanm | 0:9b334a45a8ff | 242 | /** |
bogdanm | 0:9b334a45a8ff | 243 | * @brief Enables the interrupt and starts ADC conversion of injected channels. |
bogdanm | 0:9b334a45a8ff | 244 | * @param hadc: pointer to a ADC_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 245 | * the configuration information for the specified ADC. |
bogdanm | 0:9b334a45a8ff | 246 | * |
bogdanm | 0:9b334a45a8ff | 247 | * @retval HAL status. |
bogdanm | 0:9b334a45a8ff | 248 | */ |
bogdanm | 0:9b334a45a8ff | 249 | HAL_StatusTypeDef HAL_ADCEx_InjectedStart_IT(ADC_HandleTypeDef* hadc) |
bogdanm | 0:9b334a45a8ff | 250 | { |
bogdanm | 0:9b334a45a8ff | 251 | __IO uint32_t counter = 0; |
bogdanm | 0:9b334a45a8ff | 252 | uint32_t tmp1 = 0, tmp2 =0; |
bogdanm | 0:9b334a45a8ff | 253 | |
bogdanm | 0:9b334a45a8ff | 254 | /* Process locked */ |
bogdanm | 0:9b334a45a8ff | 255 | __HAL_LOCK(hadc); |
bogdanm | 0:9b334a45a8ff | 256 | |
bogdanm | 0:9b334a45a8ff | 257 | /* Check if a regular conversion is ongoing */ |
bogdanm | 0:9b334a45a8ff | 258 | if(hadc->State == HAL_ADC_STATE_BUSY_REG) |
bogdanm | 0:9b334a45a8ff | 259 | { |
bogdanm | 0:9b334a45a8ff | 260 | /* Change ADC state */ |
bogdanm | 0:9b334a45a8ff | 261 | hadc->State = HAL_ADC_STATE_BUSY_INJ_REG; |
bogdanm | 0:9b334a45a8ff | 262 | } |
bogdanm | 0:9b334a45a8ff | 263 | else |
bogdanm | 0:9b334a45a8ff | 264 | { |
bogdanm | 0:9b334a45a8ff | 265 | /* Change ADC state */ |
bogdanm | 0:9b334a45a8ff | 266 | hadc->State = HAL_ADC_STATE_BUSY_INJ; |
bogdanm | 0:9b334a45a8ff | 267 | } |
bogdanm | 0:9b334a45a8ff | 268 | |
bogdanm | 0:9b334a45a8ff | 269 | /* Set ADC error code to none */ |
bogdanm | 0:9b334a45a8ff | 270 | hadc->ErrorCode = HAL_ADC_ERROR_NONE; |
bogdanm | 0:9b334a45a8ff | 271 | |
bogdanm | 0:9b334a45a8ff | 272 | /* Check if ADC peripheral is disabled in order to enable it and wait during |
bogdanm | 0:9b334a45a8ff | 273 | Tstab time the ADC's stabilization */ |
bogdanm | 0:9b334a45a8ff | 274 | if((hadc->Instance->CR2 & ADC_CR2_ADON) != ADC_CR2_ADON) |
bogdanm | 0:9b334a45a8ff | 275 | { |
bogdanm | 0:9b334a45a8ff | 276 | /* Enable the Peripheral */ |
bogdanm | 0:9b334a45a8ff | 277 | __HAL_ADC_ENABLE(hadc); |
bogdanm | 0:9b334a45a8ff | 278 | |
bogdanm | 0:9b334a45a8ff | 279 | /* Delay for temperature sensor stabilization time */ |
bogdanm | 0:9b334a45a8ff | 280 | /* Compute number of CPU cycles to wait for */ |
bogdanm | 0:9b334a45a8ff | 281 | counter = (ADC_STAB_DELAY_US * (SystemCoreClock / 1000000)); |
bogdanm | 0:9b334a45a8ff | 282 | while(counter != 0) |
bogdanm | 0:9b334a45a8ff | 283 | { |
bogdanm | 0:9b334a45a8ff | 284 | counter--; |
bogdanm | 0:9b334a45a8ff | 285 | } |
bogdanm | 0:9b334a45a8ff | 286 | } |
bogdanm | 0:9b334a45a8ff | 287 | |
bogdanm | 0:9b334a45a8ff | 288 | /* Enable the ADC end of conversion interrupt for injected group */ |
bogdanm | 0:9b334a45a8ff | 289 | __HAL_ADC_ENABLE_IT(hadc, ADC_IT_JEOC); |
bogdanm | 0:9b334a45a8ff | 290 | |
bogdanm | 0:9b334a45a8ff | 291 | /* Enable the ADC overrun interrupt */ |
bogdanm | 0:9b334a45a8ff | 292 | __HAL_ADC_ENABLE_IT(hadc, ADC_IT_OVR); |
bogdanm | 0:9b334a45a8ff | 293 | |
bogdanm | 0:9b334a45a8ff | 294 | /* Check if Multimode enabled */ |
bogdanm | 0:9b334a45a8ff | 295 | if(HAL_IS_BIT_CLR(ADC->CCR, ADC_CCR_MULTI)) |
bogdanm | 0:9b334a45a8ff | 296 | { |
bogdanm | 0:9b334a45a8ff | 297 | tmp1 = HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_JEXTEN); |
bogdanm | 0:9b334a45a8ff | 298 | tmp2 = HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO); |
bogdanm | 0:9b334a45a8ff | 299 | if(tmp1 && tmp2) |
bogdanm | 0:9b334a45a8ff | 300 | { |
bogdanm | 0:9b334a45a8ff | 301 | /* Enable the selected ADC software conversion for injected group */ |
bogdanm | 0:9b334a45a8ff | 302 | hadc->Instance->CR2 |= ADC_CR2_JSWSTART; |
bogdanm | 0:9b334a45a8ff | 303 | } |
bogdanm | 0:9b334a45a8ff | 304 | } |
bogdanm | 0:9b334a45a8ff | 305 | else |
bogdanm | 0:9b334a45a8ff | 306 | { |
bogdanm | 0:9b334a45a8ff | 307 | tmp1 = HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_JEXTEN); |
bogdanm | 0:9b334a45a8ff | 308 | tmp2 = HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO); |
bogdanm | 0:9b334a45a8ff | 309 | if((hadc->Instance == ADC1) && tmp1 && tmp2) |
bogdanm | 0:9b334a45a8ff | 310 | { |
bogdanm | 0:9b334a45a8ff | 311 | /* Enable the selected ADC software conversion for injected group */ |
bogdanm | 0:9b334a45a8ff | 312 | hadc->Instance->CR2 |= ADC_CR2_JSWSTART; |
bogdanm | 0:9b334a45a8ff | 313 | } |
bogdanm | 0:9b334a45a8ff | 314 | } |
bogdanm | 0:9b334a45a8ff | 315 | |
bogdanm | 0:9b334a45a8ff | 316 | /* Process unlocked */ |
bogdanm | 0:9b334a45a8ff | 317 | __HAL_UNLOCK(hadc); |
bogdanm | 0:9b334a45a8ff | 318 | |
bogdanm | 0:9b334a45a8ff | 319 | /* Return function status */ |
bogdanm | 0:9b334a45a8ff | 320 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 321 | } |
bogdanm | 0:9b334a45a8ff | 322 | |
bogdanm | 0:9b334a45a8ff | 323 | /** |
bogdanm | 0:9b334a45a8ff | 324 | * @brief Disables ADC and stop conversion of injected channels. |
bogdanm | 0:9b334a45a8ff | 325 | * |
bogdanm | 0:9b334a45a8ff | 326 | * @note Caution: This function will stop also regular channels. |
bogdanm | 0:9b334a45a8ff | 327 | * |
bogdanm | 0:9b334a45a8ff | 328 | * @param hadc: pointer to a ADC_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 329 | * the configuration information for the specified ADC. |
bogdanm | 0:9b334a45a8ff | 330 | * @retval HAL status. |
bogdanm | 0:9b334a45a8ff | 331 | */ |
bogdanm | 0:9b334a45a8ff | 332 | HAL_StatusTypeDef HAL_ADCEx_InjectedStop(ADC_HandleTypeDef* hadc) |
bogdanm | 0:9b334a45a8ff | 333 | { |
bogdanm | 0:9b334a45a8ff | 334 | /* Disable the Peripheral */ |
bogdanm | 0:9b334a45a8ff | 335 | __HAL_ADC_DISABLE(hadc); |
bogdanm | 0:9b334a45a8ff | 336 | |
bogdanm | 0:9b334a45a8ff | 337 | /* Change ADC state */ |
bogdanm | 0:9b334a45a8ff | 338 | hadc->State = HAL_ADC_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 339 | |
bogdanm | 0:9b334a45a8ff | 340 | /* Return function status */ |
bogdanm | 0:9b334a45a8ff | 341 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 342 | } |
bogdanm | 0:9b334a45a8ff | 343 | |
bogdanm | 0:9b334a45a8ff | 344 | /** |
bogdanm | 0:9b334a45a8ff | 345 | * @brief Poll for injected conversion complete |
bogdanm | 0:9b334a45a8ff | 346 | * @param hadc: pointer to a ADC_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 347 | * the configuration information for the specified ADC. |
bogdanm | 0:9b334a45a8ff | 348 | * @param Timeout: Timeout value in millisecond. |
bogdanm | 0:9b334a45a8ff | 349 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 350 | */ |
bogdanm | 0:9b334a45a8ff | 351 | HAL_StatusTypeDef HAL_ADCEx_InjectedPollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout) |
bogdanm | 0:9b334a45a8ff | 352 | { |
bogdanm | 0:9b334a45a8ff | 353 | uint32_t tickstart = 0; |
bogdanm | 0:9b334a45a8ff | 354 | |
bogdanm | 0:9b334a45a8ff | 355 | /* Get tick */ |
bogdanm | 0:9b334a45a8ff | 356 | tickstart = HAL_GetTick(); |
bogdanm | 0:9b334a45a8ff | 357 | |
bogdanm | 0:9b334a45a8ff | 358 | /* Check End of conversion flag */ |
bogdanm | 0:9b334a45a8ff | 359 | while(!(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_JEOC))) |
bogdanm | 0:9b334a45a8ff | 360 | { |
bogdanm | 0:9b334a45a8ff | 361 | /* Check for the Timeout */ |
bogdanm | 0:9b334a45a8ff | 362 | if(Timeout != HAL_MAX_DELAY) |
bogdanm | 0:9b334a45a8ff | 363 | { |
bogdanm | 0:9b334a45a8ff | 364 | if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout)) |
bogdanm | 0:9b334a45a8ff | 365 | { |
bogdanm | 0:9b334a45a8ff | 366 | hadc->State= HAL_ADC_STATE_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 367 | /* Process unlocked */ |
bogdanm | 0:9b334a45a8ff | 368 | __HAL_UNLOCK(hadc); |
bogdanm | 0:9b334a45a8ff | 369 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 370 | } |
bogdanm | 0:9b334a45a8ff | 371 | } |
bogdanm | 0:9b334a45a8ff | 372 | } |
bogdanm | 0:9b334a45a8ff | 373 | |
bogdanm | 0:9b334a45a8ff | 374 | /* Check if a regular conversion is ready */ |
bogdanm | 0:9b334a45a8ff | 375 | if(hadc->State == HAL_ADC_STATE_EOC_REG) |
bogdanm | 0:9b334a45a8ff | 376 | { |
bogdanm | 0:9b334a45a8ff | 377 | /* Change ADC state */ |
bogdanm | 0:9b334a45a8ff | 378 | hadc->State = HAL_ADC_STATE_EOC_INJ_REG; |
bogdanm | 0:9b334a45a8ff | 379 | } |
bogdanm | 0:9b334a45a8ff | 380 | else |
bogdanm | 0:9b334a45a8ff | 381 | { |
bogdanm | 0:9b334a45a8ff | 382 | /* Change ADC state */ |
bogdanm | 0:9b334a45a8ff | 383 | hadc->State = HAL_ADC_STATE_EOC_INJ; |
bogdanm | 0:9b334a45a8ff | 384 | } |
bogdanm | 0:9b334a45a8ff | 385 | |
bogdanm | 0:9b334a45a8ff | 386 | /* Return ADC state */ |
bogdanm | 0:9b334a45a8ff | 387 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 388 | } |
bogdanm | 0:9b334a45a8ff | 389 | |
bogdanm | 0:9b334a45a8ff | 390 | /** |
bogdanm | 0:9b334a45a8ff | 391 | * @brief Disables the interrupt and stop ADC conversion of injected channels. |
bogdanm | 0:9b334a45a8ff | 392 | * |
bogdanm | 0:9b334a45a8ff | 393 | * @note Caution: This function will stop also regular channels. |
bogdanm | 0:9b334a45a8ff | 394 | * |
bogdanm | 0:9b334a45a8ff | 395 | * @param hadc: pointer to a ADC_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 396 | * the configuration information for the specified ADC. |
bogdanm | 0:9b334a45a8ff | 397 | * @retval HAL status. |
bogdanm | 0:9b334a45a8ff | 398 | */ |
bogdanm | 0:9b334a45a8ff | 399 | HAL_StatusTypeDef HAL_ADCEx_InjectedStop_IT(ADC_HandleTypeDef* hadc) |
bogdanm | 0:9b334a45a8ff | 400 | { |
bogdanm | 0:9b334a45a8ff | 401 | /* Disable the ADC end of conversion interrupt for regular group */ |
bogdanm | 0:9b334a45a8ff | 402 | __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC); |
bogdanm | 0:9b334a45a8ff | 403 | |
bogdanm | 0:9b334a45a8ff | 404 | /* Disable the ADC end of conversion interrupt for injected group */ |
bogdanm | 0:9b334a45a8ff | 405 | __HAL_ADC_DISABLE_IT(hadc, ADC_CR1_JEOCIE); |
bogdanm | 0:9b334a45a8ff | 406 | |
bogdanm | 0:9b334a45a8ff | 407 | /* Enable the Peripheral */ |
bogdanm | 0:9b334a45a8ff | 408 | __HAL_ADC_DISABLE(hadc); |
bogdanm | 0:9b334a45a8ff | 409 | |
bogdanm | 0:9b334a45a8ff | 410 | /* Change ADC state */ |
bogdanm | 0:9b334a45a8ff | 411 | hadc->State = HAL_ADC_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 412 | |
bogdanm | 0:9b334a45a8ff | 413 | /* Return function status */ |
bogdanm | 0:9b334a45a8ff | 414 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 415 | } |
bogdanm | 0:9b334a45a8ff | 416 | |
bogdanm | 0:9b334a45a8ff | 417 | /** |
bogdanm | 0:9b334a45a8ff | 418 | * @brief Gets the converted value from data register of injected channel. |
bogdanm | 0:9b334a45a8ff | 419 | * @param hadc: pointer to a ADC_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 420 | * the configuration information for the specified ADC. |
bogdanm | 0:9b334a45a8ff | 421 | * @param InjectedRank: the ADC injected rank. |
bogdanm | 0:9b334a45a8ff | 422 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 423 | * @arg ADC_INJECTED_RANK_1: Injected Channel1 selected |
bogdanm | 0:9b334a45a8ff | 424 | * @arg ADC_INJECTED_RANK_2: Injected Channel2 selected |
bogdanm | 0:9b334a45a8ff | 425 | * @arg ADC_INJECTED_RANK_3: Injected Channel3 selected |
bogdanm | 0:9b334a45a8ff | 426 | * @arg ADC_INJECTED_RANK_4: Injected Channel4 selected |
bogdanm | 0:9b334a45a8ff | 427 | * @retval None |
bogdanm | 0:9b334a45a8ff | 428 | */ |
bogdanm | 0:9b334a45a8ff | 429 | uint32_t HAL_ADCEx_InjectedGetValue(ADC_HandleTypeDef* hadc, uint32_t InjectedRank) |
bogdanm | 0:9b334a45a8ff | 430 | { |
bogdanm | 0:9b334a45a8ff | 431 | __IO uint32_t tmp = 0; |
bogdanm | 0:9b334a45a8ff | 432 | |
bogdanm | 0:9b334a45a8ff | 433 | /* Check the parameters */ |
bogdanm | 0:9b334a45a8ff | 434 | assert_param(IS_ADC_INJECTED_RANK(InjectedRank)); |
bogdanm | 0:9b334a45a8ff | 435 | |
bogdanm | 0:9b334a45a8ff | 436 | /* Clear the ADCx's flag for injected end of conversion */ |
bogdanm | 0:9b334a45a8ff | 437 | __HAL_ADC_CLEAR_FLAG(hadc,ADC_FLAG_JEOC); |
bogdanm | 0:9b334a45a8ff | 438 | |
bogdanm | 0:9b334a45a8ff | 439 | /* Return the selected ADC converted value */ |
bogdanm | 0:9b334a45a8ff | 440 | switch(InjectedRank) |
bogdanm | 0:9b334a45a8ff | 441 | { |
bogdanm | 0:9b334a45a8ff | 442 | case ADC_INJECTED_RANK_4: |
bogdanm | 0:9b334a45a8ff | 443 | { |
bogdanm | 0:9b334a45a8ff | 444 | tmp = hadc->Instance->JDR4; |
bogdanm | 0:9b334a45a8ff | 445 | } |
bogdanm | 0:9b334a45a8ff | 446 | break; |
bogdanm | 0:9b334a45a8ff | 447 | case ADC_INJECTED_RANK_3: |
bogdanm | 0:9b334a45a8ff | 448 | { |
bogdanm | 0:9b334a45a8ff | 449 | tmp = hadc->Instance->JDR3; |
bogdanm | 0:9b334a45a8ff | 450 | } |
bogdanm | 0:9b334a45a8ff | 451 | break; |
bogdanm | 0:9b334a45a8ff | 452 | case ADC_INJECTED_RANK_2: |
bogdanm | 0:9b334a45a8ff | 453 | { |
bogdanm | 0:9b334a45a8ff | 454 | tmp = hadc->Instance->JDR2; |
bogdanm | 0:9b334a45a8ff | 455 | } |
bogdanm | 0:9b334a45a8ff | 456 | break; |
bogdanm | 0:9b334a45a8ff | 457 | case ADC_INJECTED_RANK_1: |
bogdanm | 0:9b334a45a8ff | 458 | { |
bogdanm | 0:9b334a45a8ff | 459 | tmp = hadc->Instance->JDR1; |
bogdanm | 0:9b334a45a8ff | 460 | } |
bogdanm | 0:9b334a45a8ff | 461 | break; |
bogdanm | 0:9b334a45a8ff | 462 | default: |
bogdanm | 0:9b334a45a8ff | 463 | break; |
bogdanm | 0:9b334a45a8ff | 464 | } |
bogdanm | 0:9b334a45a8ff | 465 | return tmp; |
bogdanm | 0:9b334a45a8ff | 466 | } |
bogdanm | 0:9b334a45a8ff | 467 | |
bogdanm | 0:9b334a45a8ff | 468 | /** |
bogdanm | 0:9b334a45a8ff | 469 | * @brief Enables ADC DMA request after last transfer (Multi-ADC mode) and enables ADC peripheral |
bogdanm | 0:9b334a45a8ff | 470 | * |
bogdanm | 0:9b334a45a8ff | 471 | * @note Caution: This function must be used only with the ADC master. |
bogdanm | 0:9b334a45a8ff | 472 | * |
bogdanm | 0:9b334a45a8ff | 473 | * @param hadc: pointer to a ADC_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 474 | * the configuration information for the specified ADC. |
bogdanm | 0:9b334a45a8ff | 475 | * @param pData: Pointer to buffer in which transferred from ADC peripheral to memory will be stored. |
bogdanm | 0:9b334a45a8ff | 476 | * @param Length: The length of data to be transferred from ADC peripheral to memory. |
bogdanm | 0:9b334a45a8ff | 477 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 478 | */ |
bogdanm | 0:9b334a45a8ff | 479 | HAL_StatusTypeDef HAL_ADCEx_MultiModeStart_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length) |
bogdanm | 0:9b334a45a8ff | 480 | { |
bogdanm | 0:9b334a45a8ff | 481 | __IO uint32_t counter = 0; |
bogdanm | 0:9b334a45a8ff | 482 | |
bogdanm | 0:9b334a45a8ff | 483 | /* Check the parameters */ |
bogdanm | 0:9b334a45a8ff | 484 | assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode)); |
bogdanm | 0:9b334a45a8ff | 485 | assert_param(IS_ADC_EXT_TRIG_EDGE(hadc->Init.ExternalTrigConvEdge)); |
bogdanm | 0:9b334a45a8ff | 486 | assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DMAContinuousRequests)); |
bogdanm | 0:9b334a45a8ff | 487 | |
bogdanm | 0:9b334a45a8ff | 488 | /* Process locked */ |
bogdanm | 0:9b334a45a8ff | 489 | __HAL_LOCK(hadc); |
bogdanm | 0:9b334a45a8ff | 490 | |
bogdanm | 0:9b334a45a8ff | 491 | /* Enable ADC overrun interrupt */ |
bogdanm | 0:9b334a45a8ff | 492 | __HAL_ADC_ENABLE_IT(hadc, ADC_IT_OVR); |
bogdanm | 0:9b334a45a8ff | 493 | |
bogdanm | 0:9b334a45a8ff | 494 | if (hadc->Init.DMAContinuousRequests != DISABLE) |
bogdanm | 0:9b334a45a8ff | 495 | { |
bogdanm | 0:9b334a45a8ff | 496 | /* Enable the selected ADC DMA request after last transfer */ |
bogdanm | 0:9b334a45a8ff | 497 | ADC->CCR |= ADC_CCR_DDS; |
bogdanm | 0:9b334a45a8ff | 498 | } |
bogdanm | 0:9b334a45a8ff | 499 | else |
bogdanm | 0:9b334a45a8ff | 500 | { |
bogdanm | 0:9b334a45a8ff | 501 | /* Disable the selected ADC EOC rising on each regular channel conversion */ |
bogdanm | 0:9b334a45a8ff | 502 | ADC->CCR &= ~ADC_CCR_DDS; |
bogdanm | 0:9b334a45a8ff | 503 | } |
bogdanm | 0:9b334a45a8ff | 504 | |
bogdanm | 0:9b334a45a8ff | 505 | /* Set the DMA transfer complete callback */ |
bogdanm | 0:9b334a45a8ff | 506 | hadc->DMA_Handle->XferCpltCallback = ADC_MultiModeDMAConvCplt; |
bogdanm | 0:9b334a45a8ff | 507 | |
bogdanm | 0:9b334a45a8ff | 508 | /* Set the DMA half transfer complete callback */ |
bogdanm | 0:9b334a45a8ff | 509 | hadc->DMA_Handle->XferHalfCpltCallback = ADC_MultiModeDMAHalfConvCplt; |
bogdanm | 0:9b334a45a8ff | 510 | |
bogdanm | 0:9b334a45a8ff | 511 | /* Set the DMA error callback */ |
bogdanm | 0:9b334a45a8ff | 512 | hadc->DMA_Handle->XferErrorCallback = ADC_MultiModeDMAError ; |
bogdanm | 0:9b334a45a8ff | 513 | |
bogdanm | 0:9b334a45a8ff | 514 | /* Enable the DMA Stream */ |
bogdanm | 0:9b334a45a8ff | 515 | HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&ADC->CDR, (uint32_t)pData, Length); |
bogdanm | 0:9b334a45a8ff | 516 | |
bogdanm | 0:9b334a45a8ff | 517 | /* Change ADC state */ |
bogdanm | 0:9b334a45a8ff | 518 | hadc->State = HAL_ADC_STATE_BUSY_REG; |
bogdanm | 0:9b334a45a8ff | 519 | |
bogdanm | 0:9b334a45a8ff | 520 | /* Check if ADC peripheral is disabled in order to enable it and wait during |
bogdanm | 0:9b334a45a8ff | 521 | Tstab time the ADC's stabilization */ |
bogdanm | 0:9b334a45a8ff | 522 | if((hadc->Instance->CR2 & ADC_CR2_ADON) != ADC_CR2_ADON) |
bogdanm | 0:9b334a45a8ff | 523 | { |
bogdanm | 0:9b334a45a8ff | 524 | /* Enable the Peripheral */ |
bogdanm | 0:9b334a45a8ff | 525 | __HAL_ADC_ENABLE(hadc); |
bogdanm | 0:9b334a45a8ff | 526 | |
bogdanm | 0:9b334a45a8ff | 527 | /* Delay for temperature sensor stabilization time */ |
bogdanm | 0:9b334a45a8ff | 528 | /* Compute number of CPU cycles to wait for */ |
bogdanm | 0:9b334a45a8ff | 529 | counter = (ADC_STAB_DELAY_US * (SystemCoreClock / 1000000)); |
bogdanm | 0:9b334a45a8ff | 530 | while(counter != 0) |
bogdanm | 0:9b334a45a8ff | 531 | { |
bogdanm | 0:9b334a45a8ff | 532 | counter--; |
bogdanm | 0:9b334a45a8ff | 533 | } |
bogdanm | 0:9b334a45a8ff | 534 | } |
bogdanm | 0:9b334a45a8ff | 535 | |
bogdanm | 0:9b334a45a8ff | 536 | /* if no external trigger present enable software conversion of regular channels */ |
bogdanm | 0:9b334a45a8ff | 537 | if((hadc->Instance->CR2 & ADC_CR2_EXTEN) == RESET) |
bogdanm | 0:9b334a45a8ff | 538 | { |
bogdanm | 0:9b334a45a8ff | 539 | /* Enable the selected ADC software conversion for regular group */ |
bogdanm | 0:9b334a45a8ff | 540 | hadc->Instance->CR2 |= (uint32_t)ADC_CR2_SWSTART; |
bogdanm | 0:9b334a45a8ff | 541 | } |
bogdanm | 0:9b334a45a8ff | 542 | |
bogdanm | 0:9b334a45a8ff | 543 | /* Process unlocked */ |
bogdanm | 0:9b334a45a8ff | 544 | __HAL_UNLOCK(hadc); |
bogdanm | 0:9b334a45a8ff | 545 | |
bogdanm | 0:9b334a45a8ff | 546 | /* Return function status */ |
bogdanm | 0:9b334a45a8ff | 547 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 548 | } |
bogdanm | 0:9b334a45a8ff | 549 | |
bogdanm | 0:9b334a45a8ff | 550 | /** |
bogdanm | 0:9b334a45a8ff | 551 | * @brief Disables ADC DMA (multi-ADC mode) and disables ADC peripheral |
bogdanm | 0:9b334a45a8ff | 552 | * @param hadc: pointer to a ADC_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 553 | * the configuration information for the specified ADC. |
bogdanm | 0:9b334a45a8ff | 554 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 555 | */ |
bogdanm | 0:9b334a45a8ff | 556 | HAL_StatusTypeDef HAL_ADCEx_MultiModeStop_DMA(ADC_HandleTypeDef* hadc) |
bogdanm | 0:9b334a45a8ff | 557 | { |
bogdanm | 0:9b334a45a8ff | 558 | /* Process locked */ |
bogdanm | 0:9b334a45a8ff | 559 | __HAL_LOCK(hadc); |
bogdanm | 0:9b334a45a8ff | 560 | |
bogdanm | 0:9b334a45a8ff | 561 | /* Enable the Peripheral */ |
bogdanm | 0:9b334a45a8ff | 562 | __HAL_ADC_DISABLE(hadc); |
bogdanm | 0:9b334a45a8ff | 563 | |
bogdanm | 0:9b334a45a8ff | 564 | /* Disable ADC overrun interrupt */ |
bogdanm | 0:9b334a45a8ff | 565 | __HAL_ADC_DISABLE_IT(hadc, ADC_IT_OVR); |
bogdanm | 0:9b334a45a8ff | 566 | |
bogdanm | 0:9b334a45a8ff | 567 | /* Disable the selected ADC DMA request after last transfer */ |
bogdanm | 0:9b334a45a8ff | 568 | ADC->CCR &= ~ADC_CCR_DDS; |
bogdanm | 0:9b334a45a8ff | 569 | |
bogdanm | 0:9b334a45a8ff | 570 | /* Disable the ADC DMA Stream */ |
bogdanm | 0:9b334a45a8ff | 571 | HAL_DMA_Abort(hadc->DMA_Handle); |
bogdanm | 0:9b334a45a8ff | 572 | |
bogdanm | 0:9b334a45a8ff | 573 | /* Change ADC state */ |
bogdanm | 0:9b334a45a8ff | 574 | hadc->State = HAL_ADC_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 575 | |
bogdanm | 0:9b334a45a8ff | 576 | /* Process unlocked */ |
bogdanm | 0:9b334a45a8ff | 577 | __HAL_UNLOCK(hadc); |
bogdanm | 0:9b334a45a8ff | 578 | |
bogdanm | 0:9b334a45a8ff | 579 | /* Return function status */ |
bogdanm | 0:9b334a45a8ff | 580 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 581 | } |
bogdanm | 0:9b334a45a8ff | 582 | |
bogdanm | 0:9b334a45a8ff | 583 | /** |
bogdanm | 0:9b334a45a8ff | 584 | * @brief Returns the last ADC1, ADC2 and ADC3 regular conversions results |
bogdanm | 0:9b334a45a8ff | 585 | * data in the selected multi mode. |
bogdanm | 0:9b334a45a8ff | 586 | * @param hadc: pointer to a ADC_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 587 | * the configuration information for the specified ADC. |
bogdanm | 0:9b334a45a8ff | 588 | * @retval The converted data value. |
bogdanm | 0:9b334a45a8ff | 589 | */ |
bogdanm | 0:9b334a45a8ff | 590 | uint32_t HAL_ADCEx_MultiModeGetValue(ADC_HandleTypeDef* hadc) |
bogdanm | 0:9b334a45a8ff | 591 | { |
bogdanm | 0:9b334a45a8ff | 592 | /* Return the multi mode conversion value */ |
bogdanm | 0:9b334a45a8ff | 593 | return ADC->CDR; |
bogdanm | 0:9b334a45a8ff | 594 | } |
bogdanm | 0:9b334a45a8ff | 595 | |
bogdanm | 0:9b334a45a8ff | 596 | /** |
bogdanm | 0:9b334a45a8ff | 597 | * @brief Injected conversion complete callback in non blocking mode |
bogdanm | 0:9b334a45a8ff | 598 | * @param hadc: pointer to a ADC_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 599 | * the configuration information for the specified ADC. |
bogdanm | 0:9b334a45a8ff | 600 | * @retval None |
bogdanm | 0:9b334a45a8ff | 601 | */ |
bogdanm | 0:9b334a45a8ff | 602 | __weak void HAL_ADCEx_InjectedConvCpltCallback(ADC_HandleTypeDef* hadc) |
bogdanm | 0:9b334a45a8ff | 603 | { |
bogdanm | 0:9b334a45a8ff | 604 | /* NOTE : This function Should not be modified, when the callback is needed, |
bogdanm | 0:9b334a45a8ff | 605 | the HAL_ADC_InjectedConvCpltCallback could be implemented in the user file |
bogdanm | 0:9b334a45a8ff | 606 | */ |
bogdanm | 0:9b334a45a8ff | 607 | } |
bogdanm | 0:9b334a45a8ff | 608 | |
bogdanm | 0:9b334a45a8ff | 609 | /** |
bogdanm | 0:9b334a45a8ff | 610 | * @brief Configures for the selected ADC injected channel its corresponding |
bogdanm | 0:9b334a45a8ff | 611 | * rank in the sequencer and its sample time. |
bogdanm | 0:9b334a45a8ff | 612 | * @param hadc: pointer to a ADC_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 613 | * the configuration information for the specified ADC. |
bogdanm | 0:9b334a45a8ff | 614 | * @param sConfigInjected: ADC configuration structure for injected channel. |
bogdanm | 0:9b334a45a8ff | 615 | * @retval None |
bogdanm | 0:9b334a45a8ff | 616 | */ |
bogdanm | 0:9b334a45a8ff | 617 | HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef* hadc, ADC_InjectionConfTypeDef* sConfigInjected) |
bogdanm | 0:9b334a45a8ff | 618 | { |
bogdanm | 0:9b334a45a8ff | 619 | |
bogdanm | 0:9b334a45a8ff | 620 | #ifdef USE_FULL_ASSERT |
bogdanm | 0:9b334a45a8ff | 621 | uint32_t tmp = 0; |
bogdanm | 0:9b334a45a8ff | 622 | #endif /* USE_FULL_ASSERT */ |
bogdanm | 0:9b334a45a8ff | 623 | |
bogdanm | 0:9b334a45a8ff | 624 | /* Check the parameters */ |
bogdanm | 0:9b334a45a8ff | 625 | assert_param(IS_ADC_CHANNEL(sConfigInjected->InjectedChannel)); |
bogdanm | 0:9b334a45a8ff | 626 | assert_param(IS_ADC_INJECTED_RANK(sConfigInjected->InjectedRank)); |
bogdanm | 0:9b334a45a8ff | 627 | assert_param(IS_ADC_SAMPLE_TIME(sConfigInjected->InjectedSamplingTime)); |
bogdanm | 0:9b334a45a8ff | 628 | assert_param(IS_ADC_EXT_INJEC_TRIG(sConfigInjected->ExternalTrigInjecConv)); |
bogdanm | 0:9b334a45a8ff | 629 | assert_param(IS_ADC_INJECTED_LENGTH(sConfigInjected->InjectedNbrOfConversion)); |
bogdanm | 0:9b334a45a8ff | 630 | assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->AutoInjectedConv)); |
bogdanm | 0:9b334a45a8ff | 631 | assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->InjectedDiscontinuousConvMode)); |
bogdanm | 0:9b334a45a8ff | 632 | |
bogdanm | 0:9b334a45a8ff | 633 | #ifdef USE_FULL_ASSERT |
bogdanm | 0:9b334a45a8ff | 634 | tmp = ADC_GET_RESOLUTION(hadc); |
bogdanm | 0:9b334a45a8ff | 635 | assert_param(IS_ADC_RANGE(tmp, sConfigInjected->InjectedOffset)); |
bogdanm | 0:9b334a45a8ff | 636 | #endif /* USE_FULL_ASSERT */ |
bogdanm | 0:9b334a45a8ff | 637 | |
bogdanm | 0:9b334a45a8ff | 638 | if(sConfigInjected->ExternalTrigInjecConvEdge != ADC_INJECTED_SOFTWARE_START) |
bogdanm | 0:9b334a45a8ff | 639 | { |
bogdanm | 0:9b334a45a8ff | 640 | assert_param(IS_ADC_EXT_INJEC_TRIG_EDGE(sConfigInjected->ExternalTrigInjecConvEdge)); |
bogdanm | 0:9b334a45a8ff | 641 | } |
mbed_official | 19:112740acecfa | 642 | |
bogdanm | 0:9b334a45a8ff | 643 | /* Process locked */ |
bogdanm | 0:9b334a45a8ff | 644 | __HAL_LOCK(hadc); |
bogdanm | 0:9b334a45a8ff | 645 | |
bogdanm | 0:9b334a45a8ff | 646 | /* if ADC_Channel_10 ... ADC_Channel_18 is selected */ |
bogdanm | 0:9b334a45a8ff | 647 | if (sConfigInjected->InjectedChannel > ADC_CHANNEL_9) |
bogdanm | 0:9b334a45a8ff | 648 | { |
bogdanm | 0:9b334a45a8ff | 649 | /* Clear the old sample time */ |
bogdanm | 0:9b334a45a8ff | 650 | hadc->Instance->SMPR1 &= ~ADC_SMPR1(ADC_SMPR1_SMP10, sConfigInjected->InjectedChannel); |
bogdanm | 0:9b334a45a8ff | 651 | |
bogdanm | 0:9b334a45a8ff | 652 | /* Set the new sample time */ |
bogdanm | 0:9b334a45a8ff | 653 | hadc->Instance->SMPR1 |= ADC_SMPR1(sConfigInjected->InjectedSamplingTime, sConfigInjected->InjectedChannel); |
bogdanm | 0:9b334a45a8ff | 654 | } |
bogdanm | 0:9b334a45a8ff | 655 | else /* ADC_Channel include in ADC_Channel_[0..9] */ |
bogdanm | 0:9b334a45a8ff | 656 | { |
bogdanm | 0:9b334a45a8ff | 657 | /* Clear the old sample time */ |
bogdanm | 0:9b334a45a8ff | 658 | hadc->Instance->SMPR2 &= ~ADC_SMPR2(ADC_SMPR2_SMP0, sConfigInjected->InjectedChannel); |
bogdanm | 0:9b334a45a8ff | 659 | |
bogdanm | 0:9b334a45a8ff | 660 | /* Set the new sample time */ |
bogdanm | 0:9b334a45a8ff | 661 | hadc->Instance->SMPR2 |= ADC_SMPR2(sConfigInjected->InjectedSamplingTime, sConfigInjected->InjectedChannel); |
bogdanm | 0:9b334a45a8ff | 662 | } |
bogdanm | 0:9b334a45a8ff | 663 | |
bogdanm | 0:9b334a45a8ff | 664 | /*---------------------------- ADCx JSQR Configuration -----------------*/ |
bogdanm | 0:9b334a45a8ff | 665 | hadc->Instance->JSQR &= ~(ADC_JSQR_JL); |
bogdanm | 0:9b334a45a8ff | 666 | hadc->Instance->JSQR |= ADC_SQR1(sConfigInjected->InjectedNbrOfConversion); |
bogdanm | 0:9b334a45a8ff | 667 | |
bogdanm | 0:9b334a45a8ff | 668 | /* Rank configuration */ |
bogdanm | 0:9b334a45a8ff | 669 | |
bogdanm | 0:9b334a45a8ff | 670 | /* Clear the old SQx bits for the selected rank */ |
bogdanm | 0:9b334a45a8ff | 671 | hadc->Instance->JSQR &= ~ADC_JSQR(ADC_JSQR_JSQ1, sConfigInjected->InjectedRank,sConfigInjected->InjectedNbrOfConversion); |
bogdanm | 0:9b334a45a8ff | 672 | |
bogdanm | 0:9b334a45a8ff | 673 | /* Set the SQx bits for the selected rank */ |
bogdanm | 0:9b334a45a8ff | 674 | hadc->Instance->JSQR |= ADC_JSQR(sConfigInjected->InjectedChannel, sConfigInjected->InjectedRank,sConfigInjected->InjectedNbrOfConversion); |
bogdanm | 0:9b334a45a8ff | 675 | |
bogdanm | 0:9b334a45a8ff | 676 | /* Enable external trigger if trigger selection is different of software */ |
bogdanm | 0:9b334a45a8ff | 677 | /* start. */ |
bogdanm | 0:9b334a45a8ff | 678 | /* Note: This configuration keeps the hardware feature of parameter */ |
bogdanm | 0:9b334a45a8ff | 679 | /* ExternalTrigConvEdge "trigger edge none" equivalent to */ |
bogdanm | 0:9b334a45a8ff | 680 | /* software start. */ |
bogdanm | 0:9b334a45a8ff | 681 | if(sConfigInjected->ExternalTrigInjecConv != ADC_INJECTED_SOFTWARE_START) |
bogdanm | 0:9b334a45a8ff | 682 | { |
bogdanm | 0:9b334a45a8ff | 683 | /* Select external trigger to start conversion */ |
bogdanm | 0:9b334a45a8ff | 684 | hadc->Instance->CR2 &= ~(ADC_CR2_JEXTSEL); |
bogdanm | 0:9b334a45a8ff | 685 | hadc->Instance->CR2 |= sConfigInjected->ExternalTrigInjecConv; |
bogdanm | 0:9b334a45a8ff | 686 | |
bogdanm | 0:9b334a45a8ff | 687 | /* Select external trigger polarity */ |
bogdanm | 0:9b334a45a8ff | 688 | hadc->Instance->CR2 &= ~(ADC_CR2_JEXTEN); |
bogdanm | 0:9b334a45a8ff | 689 | hadc->Instance->CR2 |= sConfigInjected->ExternalTrigInjecConvEdge; |
bogdanm | 0:9b334a45a8ff | 690 | } |
bogdanm | 0:9b334a45a8ff | 691 | else |
bogdanm | 0:9b334a45a8ff | 692 | { |
bogdanm | 0:9b334a45a8ff | 693 | /* Reset the external trigger */ |
bogdanm | 0:9b334a45a8ff | 694 | hadc->Instance->CR2 &= ~(ADC_CR2_JEXTSEL); |
bogdanm | 0:9b334a45a8ff | 695 | hadc->Instance->CR2 &= ~(ADC_CR2_JEXTEN); |
bogdanm | 0:9b334a45a8ff | 696 | } |
bogdanm | 0:9b334a45a8ff | 697 | |
bogdanm | 0:9b334a45a8ff | 698 | if (sConfigInjected->AutoInjectedConv != DISABLE) |
bogdanm | 0:9b334a45a8ff | 699 | { |
bogdanm | 0:9b334a45a8ff | 700 | /* Enable the selected ADC automatic injected group conversion */ |
bogdanm | 0:9b334a45a8ff | 701 | hadc->Instance->CR1 |= ADC_CR1_JAUTO; |
bogdanm | 0:9b334a45a8ff | 702 | } |
bogdanm | 0:9b334a45a8ff | 703 | else |
bogdanm | 0:9b334a45a8ff | 704 | { |
bogdanm | 0:9b334a45a8ff | 705 | /* Disable the selected ADC automatic injected group conversion */ |
bogdanm | 0:9b334a45a8ff | 706 | hadc->Instance->CR1 &= ~(ADC_CR1_JAUTO); |
bogdanm | 0:9b334a45a8ff | 707 | } |
bogdanm | 0:9b334a45a8ff | 708 | |
bogdanm | 0:9b334a45a8ff | 709 | if (sConfigInjected->InjectedDiscontinuousConvMode != DISABLE) |
bogdanm | 0:9b334a45a8ff | 710 | { |
bogdanm | 0:9b334a45a8ff | 711 | /* Enable the selected ADC injected discontinuous mode */ |
bogdanm | 0:9b334a45a8ff | 712 | hadc->Instance->CR1 |= ADC_CR1_JDISCEN; |
bogdanm | 0:9b334a45a8ff | 713 | } |
bogdanm | 0:9b334a45a8ff | 714 | else |
bogdanm | 0:9b334a45a8ff | 715 | { |
bogdanm | 0:9b334a45a8ff | 716 | /* Disable the selected ADC injected discontinuous mode */ |
bogdanm | 0:9b334a45a8ff | 717 | hadc->Instance->CR1 &= ~(ADC_CR1_JDISCEN); |
bogdanm | 0:9b334a45a8ff | 718 | } |
bogdanm | 0:9b334a45a8ff | 719 | |
bogdanm | 0:9b334a45a8ff | 720 | switch(sConfigInjected->InjectedRank) |
bogdanm | 0:9b334a45a8ff | 721 | { |
bogdanm | 0:9b334a45a8ff | 722 | case 1: |
bogdanm | 0:9b334a45a8ff | 723 | /* Set injected channel 1 offset */ |
bogdanm | 0:9b334a45a8ff | 724 | hadc->Instance->JOFR1 &= ~(ADC_JOFR1_JOFFSET1); |
bogdanm | 0:9b334a45a8ff | 725 | hadc->Instance->JOFR1 |= sConfigInjected->InjectedOffset; |
bogdanm | 0:9b334a45a8ff | 726 | break; |
bogdanm | 0:9b334a45a8ff | 727 | case 2: |
bogdanm | 0:9b334a45a8ff | 728 | /* Set injected channel 2 offset */ |
bogdanm | 0:9b334a45a8ff | 729 | hadc->Instance->JOFR2 &= ~(ADC_JOFR2_JOFFSET2); |
bogdanm | 0:9b334a45a8ff | 730 | hadc->Instance->JOFR2 |= sConfigInjected->InjectedOffset; |
bogdanm | 0:9b334a45a8ff | 731 | break; |
bogdanm | 0:9b334a45a8ff | 732 | case 3: |
bogdanm | 0:9b334a45a8ff | 733 | /* Set injected channel 3 offset */ |
bogdanm | 0:9b334a45a8ff | 734 | hadc->Instance->JOFR3 &= ~(ADC_JOFR3_JOFFSET3); |
bogdanm | 0:9b334a45a8ff | 735 | hadc->Instance->JOFR3 |= sConfigInjected->InjectedOffset; |
bogdanm | 0:9b334a45a8ff | 736 | break; |
bogdanm | 0:9b334a45a8ff | 737 | default: |
bogdanm | 0:9b334a45a8ff | 738 | /* Set injected channel 4 offset */ |
bogdanm | 0:9b334a45a8ff | 739 | hadc->Instance->JOFR4 &= ~(ADC_JOFR4_JOFFSET4); |
bogdanm | 0:9b334a45a8ff | 740 | hadc->Instance->JOFR4 |= sConfigInjected->InjectedOffset; |
bogdanm | 0:9b334a45a8ff | 741 | break; |
bogdanm | 0:9b334a45a8ff | 742 | } |
bogdanm | 0:9b334a45a8ff | 743 | |
bogdanm | 0:9b334a45a8ff | 744 | /* if ADC1 Channel_18 is selected enable VBAT Channel */ |
bogdanm | 0:9b334a45a8ff | 745 | if ((hadc->Instance == ADC1) && (sConfigInjected->InjectedChannel == ADC_CHANNEL_VBAT)) |
bogdanm | 0:9b334a45a8ff | 746 | { |
bogdanm | 0:9b334a45a8ff | 747 | /* Enable the VBAT channel*/ |
bogdanm | 0:9b334a45a8ff | 748 | ADC->CCR |= ADC_CCR_VBATE; |
bogdanm | 0:9b334a45a8ff | 749 | } |
bogdanm | 0:9b334a45a8ff | 750 | |
bogdanm | 0:9b334a45a8ff | 751 | /* if ADC1 Channel_16 or Channel_17 is selected enable TSVREFE Channel(Temperature sensor and VREFINT) */ |
bogdanm | 0:9b334a45a8ff | 752 | if ((hadc->Instance == ADC1) && ((sConfigInjected->InjectedChannel == ADC_CHANNEL_TEMPSENSOR) || (sConfigInjected->InjectedChannel == ADC_CHANNEL_VREFINT))) |
bogdanm | 0:9b334a45a8ff | 753 | { |
bogdanm | 0:9b334a45a8ff | 754 | /* Enable the TSVREFE channel*/ |
bogdanm | 0:9b334a45a8ff | 755 | ADC->CCR |= ADC_CCR_TSVREFE; |
bogdanm | 0:9b334a45a8ff | 756 | } |
bogdanm | 0:9b334a45a8ff | 757 | |
bogdanm | 0:9b334a45a8ff | 758 | /* Process unlocked */ |
bogdanm | 0:9b334a45a8ff | 759 | __HAL_UNLOCK(hadc); |
bogdanm | 0:9b334a45a8ff | 760 | |
bogdanm | 0:9b334a45a8ff | 761 | /* Return function status */ |
bogdanm | 0:9b334a45a8ff | 762 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 763 | } |
bogdanm | 0:9b334a45a8ff | 764 | |
bogdanm | 0:9b334a45a8ff | 765 | /** |
bogdanm | 0:9b334a45a8ff | 766 | * @brief Configures the ADC multi-mode |
bogdanm | 0:9b334a45a8ff | 767 | * @param hadc : pointer to a ADC_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 768 | * the configuration information for the specified ADC. |
bogdanm | 0:9b334a45a8ff | 769 | * @param multimode : pointer to an ADC_MultiModeTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 770 | * the configuration information for multimode. |
bogdanm | 0:9b334a45a8ff | 771 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 772 | */ |
bogdanm | 0:9b334a45a8ff | 773 | HAL_StatusTypeDef HAL_ADCEx_MultiModeConfigChannel(ADC_HandleTypeDef* hadc, ADC_MultiModeTypeDef* multimode) |
bogdanm | 0:9b334a45a8ff | 774 | { |
bogdanm | 0:9b334a45a8ff | 775 | /* Check the parameters */ |
bogdanm | 0:9b334a45a8ff | 776 | assert_param(IS_ADC_MODE(multimode->Mode)); |
bogdanm | 0:9b334a45a8ff | 777 | assert_param(IS_ADC_DMA_ACCESS_MODE(multimode->DMAAccessMode)); |
bogdanm | 0:9b334a45a8ff | 778 | assert_param(IS_ADC_SAMPLING_DELAY(multimode->TwoSamplingDelay)); |
bogdanm | 0:9b334a45a8ff | 779 | |
bogdanm | 0:9b334a45a8ff | 780 | /* Process locked */ |
bogdanm | 0:9b334a45a8ff | 781 | __HAL_LOCK(hadc); |
bogdanm | 0:9b334a45a8ff | 782 | |
bogdanm | 0:9b334a45a8ff | 783 | /* Set ADC mode */ |
bogdanm | 0:9b334a45a8ff | 784 | ADC->CCR &= ~(ADC_CCR_MULTI); |
bogdanm | 0:9b334a45a8ff | 785 | ADC->CCR |= multimode->Mode; |
bogdanm | 0:9b334a45a8ff | 786 | |
bogdanm | 0:9b334a45a8ff | 787 | /* Set the ADC DMA access mode */ |
bogdanm | 0:9b334a45a8ff | 788 | ADC->CCR &= ~(ADC_CCR_DMA); |
bogdanm | 0:9b334a45a8ff | 789 | ADC->CCR |= multimode->DMAAccessMode; |
bogdanm | 0:9b334a45a8ff | 790 | |
bogdanm | 0:9b334a45a8ff | 791 | /* Set delay between two sampling phases */ |
bogdanm | 0:9b334a45a8ff | 792 | ADC->CCR &= ~(ADC_CCR_DELAY); |
bogdanm | 0:9b334a45a8ff | 793 | ADC->CCR |= multimode->TwoSamplingDelay; |
bogdanm | 0:9b334a45a8ff | 794 | |
bogdanm | 0:9b334a45a8ff | 795 | /* Process unlocked */ |
bogdanm | 0:9b334a45a8ff | 796 | __HAL_UNLOCK(hadc); |
bogdanm | 0:9b334a45a8ff | 797 | |
bogdanm | 0:9b334a45a8ff | 798 | /* Return function status */ |
bogdanm | 0:9b334a45a8ff | 799 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 800 | } |
bogdanm | 0:9b334a45a8ff | 801 | |
bogdanm | 0:9b334a45a8ff | 802 | /** |
bogdanm | 0:9b334a45a8ff | 803 | * @} |
bogdanm | 0:9b334a45a8ff | 804 | */ |
bogdanm | 0:9b334a45a8ff | 805 | |
bogdanm | 0:9b334a45a8ff | 806 | /** |
bogdanm | 0:9b334a45a8ff | 807 | * @brief DMA transfer complete callback. |
bogdanm | 0:9b334a45a8ff | 808 | * @param hdma: pointer to a DMA_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 809 | * the configuration information for the specified DMA module. |
bogdanm | 0:9b334a45a8ff | 810 | * @retval None |
bogdanm | 0:9b334a45a8ff | 811 | */ |
bogdanm | 0:9b334a45a8ff | 812 | static void ADC_MultiModeDMAConvCplt(DMA_HandleTypeDef *hdma) |
bogdanm | 0:9b334a45a8ff | 813 | { |
bogdanm | 0:9b334a45a8ff | 814 | ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; |
bogdanm | 0:9b334a45a8ff | 815 | |
bogdanm | 0:9b334a45a8ff | 816 | /* Check if an injected conversion is ready */ |
bogdanm | 0:9b334a45a8ff | 817 | if(hadc->State == HAL_ADC_STATE_EOC_INJ) |
bogdanm | 0:9b334a45a8ff | 818 | { |
bogdanm | 0:9b334a45a8ff | 819 | /* Change ADC state */ |
bogdanm | 0:9b334a45a8ff | 820 | hadc->State = HAL_ADC_STATE_EOC_INJ_REG; |
bogdanm | 0:9b334a45a8ff | 821 | } |
bogdanm | 0:9b334a45a8ff | 822 | else |
bogdanm | 0:9b334a45a8ff | 823 | { |
bogdanm | 0:9b334a45a8ff | 824 | /* Change ADC state */ |
bogdanm | 0:9b334a45a8ff | 825 | hadc->State = HAL_ADC_STATE_EOC_REG; |
bogdanm | 0:9b334a45a8ff | 826 | } |
bogdanm | 0:9b334a45a8ff | 827 | |
bogdanm | 0:9b334a45a8ff | 828 | HAL_ADC_ConvCpltCallback(hadc); |
bogdanm | 0:9b334a45a8ff | 829 | } |
bogdanm | 0:9b334a45a8ff | 830 | |
bogdanm | 0:9b334a45a8ff | 831 | /** |
bogdanm | 0:9b334a45a8ff | 832 | * @brief DMA half transfer complete callback. |
bogdanm | 0:9b334a45a8ff | 833 | * @param hdma: pointer to a DMA_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 834 | * the configuration information for the specified DMA module. |
bogdanm | 0:9b334a45a8ff | 835 | * @retval None |
bogdanm | 0:9b334a45a8ff | 836 | */ |
bogdanm | 0:9b334a45a8ff | 837 | static void ADC_MultiModeDMAHalfConvCplt(DMA_HandleTypeDef *hdma) |
bogdanm | 0:9b334a45a8ff | 838 | { |
bogdanm | 0:9b334a45a8ff | 839 | ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; |
bogdanm | 0:9b334a45a8ff | 840 | /* Conversion complete callback */ |
bogdanm | 0:9b334a45a8ff | 841 | HAL_ADC_ConvHalfCpltCallback(hadc); |
bogdanm | 0:9b334a45a8ff | 842 | } |
bogdanm | 0:9b334a45a8ff | 843 | |
bogdanm | 0:9b334a45a8ff | 844 | /** |
bogdanm | 0:9b334a45a8ff | 845 | * @brief DMA error callback |
bogdanm | 0:9b334a45a8ff | 846 | * @param hdma: pointer to a DMA_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 847 | * the configuration information for the specified DMA module. |
bogdanm | 0:9b334a45a8ff | 848 | * @retval None |
bogdanm | 0:9b334a45a8ff | 849 | */ |
bogdanm | 0:9b334a45a8ff | 850 | static void ADC_MultiModeDMAError(DMA_HandleTypeDef *hdma) |
bogdanm | 0:9b334a45a8ff | 851 | { |
bogdanm | 0:9b334a45a8ff | 852 | ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; |
bogdanm | 0:9b334a45a8ff | 853 | hadc->State= HAL_ADC_STATE_ERROR; |
bogdanm | 0:9b334a45a8ff | 854 | /* Set ADC error code to DMA error */ |
bogdanm | 0:9b334a45a8ff | 855 | hadc->ErrorCode |= HAL_ADC_ERROR_DMA; |
bogdanm | 0:9b334a45a8ff | 856 | HAL_ADC_ErrorCallback(hadc); |
bogdanm | 0:9b334a45a8ff | 857 | } |
bogdanm | 0:9b334a45a8ff | 858 | |
bogdanm | 0:9b334a45a8ff | 859 | /** |
bogdanm | 0:9b334a45a8ff | 860 | * @} |
bogdanm | 0:9b334a45a8ff | 861 | */ |
bogdanm | 0:9b334a45a8ff | 862 | |
bogdanm | 0:9b334a45a8ff | 863 | #endif /* HAL_ADC_MODULE_ENABLED */ |
bogdanm | 0:9b334a45a8ff | 864 | /** |
bogdanm | 0:9b334a45a8ff | 865 | * @} |
bogdanm | 0:9b334a45a8ff | 866 | */ |
bogdanm | 0:9b334a45a8ff | 867 | |
bogdanm | 0:9b334a45a8ff | 868 | /** |
bogdanm | 0:9b334a45a8ff | 869 | * @} |
bogdanm | 0:9b334a45a8ff | 870 | */ |
bogdanm | 0:9b334a45a8ff | 871 | |
bogdanm | 0:9b334a45a8ff | 872 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |