fix LPC812 PWM
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targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_hrtim.c@129:2e517c56bcfb, 2016-05-16 (annotated)
- Committer:
- nameless129
- Date:
- Mon May 16 16:50:30 2016 +0000
- Revision:
- 129:2e517c56bcfb
- Parent:
- 0:9b334a45a8ff
PWM Fix:Duty 0%??H???????????????
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
bogdanm | 0:9b334a45a8ff | 1 | /** |
bogdanm | 0:9b334a45a8ff | 2 | ****************************************************************************** |
bogdanm | 0:9b334a45a8ff | 3 | * @file stm32f3xx_hal_hrtim.c |
bogdanm | 0:9b334a45a8ff | 4 | * @author MCD Application Team |
bogdanm | 0:9b334a45a8ff | 5 | * @version V1.1.0 |
bogdanm | 0:9b334a45a8ff | 6 | * @date 12-Sept-2014 |
bogdanm | 0:9b334a45a8ff | 7 | * @brief TIM HAL module driver. |
bogdanm | 0:9b334a45a8ff | 8 | * This file provides firmware functions to manage the following |
bogdanm | 0:9b334a45a8ff | 9 | * functionalities of the High Resolution Timer (HRTIM) peripheral: |
bogdanm | 0:9b334a45a8ff | 10 | * + HRTIM Initialization |
bogdanm | 0:9b334a45a8ff | 11 | * + DLL Calibration Start |
bogdanm | 0:9b334a45a8ff | 12 | * + Timer Time Base Unit Configuration |
bogdanm | 0:9b334a45a8ff | 13 | * + Simple Time Base Start/Stop |
bogdanm | 0:9b334a45a8ff | 14 | * + Simple Time Base Start/Stop Interrupt |
bogdanm | 0:9b334a45a8ff | 15 | * + Simple Time Base Start/Stop DMA Request |
bogdanm | 0:9b334a45a8ff | 16 | * + Simple Output Compare/PWM Channel Configuration |
bogdanm | 0:9b334a45a8ff | 17 | * + Simple Output Compare/PWM Channel Start/Stop Interrupt |
bogdanm | 0:9b334a45a8ff | 18 | * + Simple Output Compare/PWM Channel Start/Stop DMA Request |
bogdanm | 0:9b334a45a8ff | 19 | * + Simple Input Capture Channel Configuration |
bogdanm | 0:9b334a45a8ff | 20 | * + Simple Input Capture Channel Start/Stop Interrupt |
bogdanm | 0:9b334a45a8ff | 21 | * + Simple Input Capture Channel Start/Stop DMA Request |
bogdanm | 0:9b334a45a8ff | 22 | * + Simple One Pulse Channel Configuration |
bogdanm | 0:9b334a45a8ff | 23 | * + Simple One Pulse Channel Start/Stop Interrupt |
bogdanm | 0:9b334a45a8ff | 24 | * + HRTIM External Synchronization Configuration |
bogdanm | 0:9b334a45a8ff | 25 | * + HRTIM Burst Mode Controller Configuration |
bogdanm | 0:9b334a45a8ff | 26 | * + HRTIM Burst Mode Controller Enabling |
bogdanm | 0:9b334a45a8ff | 27 | * + HRTIM External Events Conditioning Configuration |
bogdanm | 0:9b334a45a8ff | 28 | * + HRTIM Faults Conditioning Configuration |
bogdanm | 0:9b334a45a8ff | 29 | * + HRTIM Faults Enabling |
bogdanm | 0:9b334a45a8ff | 30 | * + HRTIM ADC trigger Configuration |
bogdanm | 0:9b334a45a8ff | 31 | * + Waveform Timer Configuration |
bogdanm | 0:9b334a45a8ff | 32 | * + Waveform Event Filtering Configuration |
bogdanm | 0:9b334a45a8ff | 33 | * + Waveform Dead Time Insertion Configuration |
bogdanm | 0:9b334a45a8ff | 34 | * + Waveform Chopper Mode Configuration |
bogdanm | 0:9b334a45a8ff | 35 | * + Waveform Compare Unit Configuration |
bogdanm | 0:9b334a45a8ff | 36 | * + Waveform Capture Unit Configuration |
bogdanm | 0:9b334a45a8ff | 37 | * + Waveform Output Configuration |
bogdanm | 0:9b334a45a8ff | 38 | * + Waveform Counter Start/Stop |
bogdanm | 0:9b334a45a8ff | 39 | * + Waveform Counter Start/Stop Interrupt |
bogdanm | 0:9b334a45a8ff | 40 | * + Waveform Counter Start/Stop DMA Request |
bogdanm | 0:9b334a45a8ff | 41 | * + Waveform Output Enabling |
bogdanm | 0:9b334a45a8ff | 42 | * + Waveform Output Level Set/Get |
bogdanm | 0:9b334a45a8ff | 43 | * + Waveform Output State Get |
bogdanm | 0:9b334a45a8ff | 44 | * + Waveform Burst DMA Operation Configuration |
bogdanm | 0:9b334a45a8ff | 45 | * + Waveform Burst DMA Operation Start |
bogdanm | 0:9b334a45a8ff | 46 | * + Waveform Timer Counter Software Reset |
bogdanm | 0:9b334a45a8ff | 47 | * + Waveform Capture Software Trigger |
bogdanm | 0:9b334a45a8ff | 48 | * + Waveform Burst Mode Controller Software Trigger |
bogdanm | 0:9b334a45a8ff | 49 | * + Waveform Timer Pre-loadable Registers Update Enabling |
bogdanm | 0:9b334a45a8ff | 50 | * + Waveform Timer Pre-loadable Registers Software Update |
bogdanm | 0:9b334a45a8ff | 51 | * + Waveform Timer Delayed Protection Status Get |
bogdanm | 0:9b334a45a8ff | 52 | * + Waveform Timer Burst Status Get |
bogdanm | 0:9b334a45a8ff | 53 | * + Waveform Timer Push-Pull Status Get |
bogdanm | 0:9b334a45a8ff | 54 | * + Peripheral State Get |
bogdanm | 0:9b334a45a8ff | 55 | @verbatim |
bogdanm | 0:9b334a45a8ff | 56 | ============================================================================== |
bogdanm | 0:9b334a45a8ff | 57 | ##### Simple mode v.s. waveform mode ##### |
bogdanm | 0:9b334a45a8ff | 58 | ============================================================================== |
bogdanm | 0:9b334a45a8ff | 59 | [..] The HRTIM HAL API is split into 2 categories: |
bogdanm | 0:9b334a45a8ff | 60 | (#)Simple functions: these functions allow for using a HRTIM timer as a |
bogdanm | 0:9b334a45a8ff | 61 | general purpose timer with high resolution capabilities. |
bogdanm | 0:9b334a45a8ff | 62 | Following simple modes are proposed: |
bogdanm | 0:9b334a45a8ff | 63 | (+)Output compare mode |
bogdanm | 0:9b334a45a8ff | 64 | (+)PWM output mode |
bogdanm | 0:9b334a45a8ff | 65 | (+)Input capture mode |
bogdanm | 0:9b334a45a8ff | 66 | (+)One pulse mode |
bogdanm | 0:9b334a45a8ff | 67 | HRTIM simple modes are managed through the set of functions named |
bogdanm | 0:9b334a45a8ff | 68 | HAL_HRTIM_Simple<Function>. These functions are similar in name and usage |
bogdanm | 0:9b334a45a8ff | 69 | to the one defined for the TIM peripheral. When a HRTIM timer operates in |
bogdanm | 0:9b334a45a8ff | 70 | simple mode, only a very limited set of HRTIM features are used. |
bogdanm | 0:9b334a45a8ff | 71 | (#)Waveform functions: These functions allow taking advantage of the HRTIM |
bogdanm | 0:9b334a45a8ff | 72 | flexibility to produce numerous types of control signal. When a HRTIM timer |
bogdanm | 0:9b334a45a8ff | 73 | operates in waveform mode, all the HRTIM features are accessible without |
bogdanm | 0:9b334a45a8ff | 74 | any restriction. HRTIM waveform modes are managed through the set of |
bogdanm | 0:9b334a45a8ff | 75 | functions named HAL_HRTIM_Waveform<Function> |
bogdanm | 0:9b334a45a8ff | 76 | |
bogdanm | 0:9b334a45a8ff | 77 | ============================================================================== |
bogdanm | 0:9b334a45a8ff | 78 | ##### How to use this driver ##### |
bogdanm | 0:9b334a45a8ff | 79 | ============================================================================== |
bogdanm | 0:9b334a45a8ff | 80 | [..] |
bogdanm | 0:9b334a45a8ff | 81 | (#)Initialize the HRTIM low level resources by implementing the |
bogdanm | 0:9b334a45a8ff | 82 | HAL_HRTIM_MspInit() function: |
bogdanm | 0:9b334a45a8ff | 83 | (##)Enable the HRTIM clock source using __HRTIMx_CLK_ENABLE() |
bogdanm | 0:9b334a45a8ff | 84 | (##)Connect HRTIM pins to MCU I/Os |
bogdanm | 0:9b334a45a8ff | 85 | (+++) Enable the clock for the HRTIM GPIOs using the following |
bogdanm | 0:9b334a45a8ff | 86 | function: __GPIOx_CLK_ENABLE() |
bogdanm | 0:9b334a45a8ff | 87 | (+++) Configure these GPIO pins in Alternate Function mode using |
bogdanm | 0:9b334a45a8ff | 88 | HAL_GPIO_Init() |
bogdanm | 0:9b334a45a8ff | 89 | (##)When using DMA to control data transfer (e.g HAL_HRTIM_SimpleBaseStart_DMA()) |
bogdanm | 0:9b334a45a8ff | 90 | (+++)Enable the DMAx interface clock using __DMAx_CLK_ENABLE() |
bogdanm | 0:9b334a45a8ff | 91 | (+++)Initialize the DMA handle |
bogdanm | 0:9b334a45a8ff | 92 | (+++)Associate the initialized DMA handle to the appropriate DMA |
bogdanm | 0:9b334a45a8ff | 93 | handle of the HRTIM handle using __HAL_LINKDMA() |
bogdanm | 0:9b334a45a8ff | 94 | (+++)Initialize the DMA channel using HAL_DMA_Init() |
bogdanm | 0:9b334a45a8ff | 95 | (+++)Configure the priority and enable the NVIC for the transfer |
bogdanm | 0:9b334a45a8ff | 96 | complete interrupt on the DMA channel using HAL_NVIC_SetPriority() |
bogdanm | 0:9b334a45a8ff | 97 | and HAL_NVIC_EnableIRQ() |
bogdanm | 0:9b334a45a8ff | 98 | (##)In case of using interrupt mode (e.g HAL_HRTIM_SimpleBaseStart_IT()) |
bogdanm | 0:9b334a45a8ff | 99 | (+++)Configure the priority and enable the NVIC for the concerned |
bogdanm | 0:9b334a45a8ff | 100 | HRTIM interrupt using HAL_NVIC_SetPriority() and HAL_NVIC_EnableIRQ() |
bogdanm | 0:9b334a45a8ff | 101 | |
bogdanm | 0:9b334a45a8ff | 102 | (#)Initialize the HRTIM HAL using HAL_HRTIM_Init(). The HRTIM configuration |
bogdanm | 0:9b334a45a8ff | 103 | structure (field of the HRTIM handle) specifies which global interrupt of |
bogdanm | 0:9b334a45a8ff | 104 | whole HRTIM must be enabled (Burst mode period, System fault, Faults). |
bogdanm | 0:9b334a45a8ff | 105 | It also contains the HRTIM external synchronization configuration. HRTIM |
bogdanm | 0:9b334a45a8ff | 106 | can act as a master (generating a synchronization signal) or as a slave |
bogdanm | 0:9b334a45a8ff | 107 | (waiting for a trigger to be synchronized). |
bogdanm | 0:9b334a45a8ff | 108 | |
bogdanm | 0:9b334a45a8ff | 109 | (#)Start the high resolution unit using HAL_HRTIM_DLLCalibrationStart(). DLL |
bogdanm | 0:9b334a45a8ff | 110 | calibration is executed periodically and compensate for potential voltage |
bogdanm | 0:9b334a45a8ff | 111 | and temperature drifts. DLL calibration period is specified by the |
bogdanm | 0:9b334a45a8ff | 112 | CalibrationRate argument. |
bogdanm | 0:9b334a45a8ff | 113 | |
bogdanm | 0:9b334a45a8ff | 114 | (#)HRTIM timers cannot be used until the high resolution unit is ready. This |
bogdanm | 0:9b334a45a8ff | 115 | can be checked using HAL_HRTIM_PollForDLLCalibration(): this function returns |
bogdanm | 0:9b334a45a8ff | 116 | HAL_OK if DLL calibration is completed or HAL_TIMEOUT if the DLL calibration |
bogdanm | 0:9b334a45a8ff | 117 | is still going on when timeout given is argument expires. DLL calibration |
bogdanm | 0:9b334a45a8ff | 118 | can also be started in interrupt mode using HAL_HRTIM_DLLCalibrationStart_IT(). |
bogdanm | 0:9b334a45a8ff | 119 | In that case an interrupt is generated when the DLL calibration is completed. |
bogdanm | 0:9b334a45a8ff | 120 | Note that as DLL calibration is executed on a periodic basis an interrupt |
bogdanm | 0:9b334a45a8ff | 121 | will be generated at the end of every DLL calibration operation |
bogdanm | 0:9b334a45a8ff | 122 | (worst case: one interrupt every 14 micro seconds !). |
bogdanm | 0:9b334a45a8ff | 123 | |
bogdanm | 0:9b334a45a8ff | 124 | (#) Configure HRTIM resources shared by all HRTIM timers |
bogdanm | 0:9b334a45a8ff | 125 | (##)Burst Mode Controller: |
bogdanm | 0:9b334a45a8ff | 126 | (+++)HAL_HRTIM_BurstModeConfig(): configures the HRTIM burst mode |
bogdanm | 0:9b334a45a8ff | 127 | controller: operating mode (continuous or -shot mode), clock |
bogdanm | 0:9b334a45a8ff | 128 | (source, prescaler) , trigger(s), period, idle duration. |
bogdanm | 0:9b334a45a8ff | 129 | (##)External Events Conditionning: |
bogdanm | 0:9b334a45a8ff | 130 | (+++)HAL_HRTIM_EventConfig(): configures the conditioning of an |
bogdanm | 0:9b334a45a8ff | 131 | external event channel: source, polarity, edge-sensitivity. |
bogdanm | 0:9b334a45a8ff | 132 | External event can be used as triggers (timer reset, input |
bogdanm | 0:9b334a45a8ff | 133 | capture, burst mode, ADC triggers, delayed protection, ) |
bogdanm | 0:9b334a45a8ff | 134 | They can also be used to set or reset timer outputs. Up to |
bogdanm | 0:9b334a45a8ff | 135 | 10 event channels are available. |
bogdanm | 0:9b334a45a8ff | 136 | (+++)HAL_HRTIM_EventPrescalerConfig(): configures the external |
bogdanm | 0:9b334a45a8ff | 137 | event sampling clock (used for digital filtering). |
bogdanm | 0:9b334a45a8ff | 138 | (##)Fault Conditionning: |
bogdanm | 0:9b334a45a8ff | 139 | (+++)HAL_HRTIM_FaultConfig(): configures the conditioning of a |
bogdanm | 0:9b334a45a8ff | 140 | fault channel: source, polarity, edge-sensitivity. Fault |
bogdanm | 0:9b334a45a8ff | 141 | channels are used to disable the outputs in case of an |
bogdanm | 0:9b334a45a8ff | 142 | abnormal operation. Up to 5 fault channels are available. |
bogdanm | 0:9b334a45a8ff | 143 | (+++)HAL_HRTIM_FaultPrescalerConfig(): configures the fault |
bogdanm | 0:9b334a45a8ff | 144 | sampling clock (used for digital filtering). |
bogdanm | 0:9b334a45a8ff | 145 | (+++)HAL_HRTIM_FaultModeCtl(): Enables or disables fault input(s) |
bogdanm | 0:9b334a45a8ff | 146 | circuitry. By default all fault inputs are disabled. |
bogdanm | 0:9b334a45a8ff | 147 | (##)ADC trigger: |
bogdanm | 0:9b334a45a8ff | 148 | (+++)HAL_HRTIM_ADCTriggerConfig(): configures the source triggering |
bogdanm | 0:9b334a45a8ff | 149 | the update of the ADC trigger register and the ADC trigger. |
bogdanm | 0:9b334a45a8ff | 150 | 4 independent triggers are available to start both the regular |
bogdanm | 0:9b334a45a8ff | 151 | and the injected sequencers of the 2 ADCs |
bogdanm | 0:9b334a45a8ff | 152 | |
bogdanm | 0:9b334a45a8ff | 153 | (#) Configure HRTIM timer time base using HAL_HRTIM_TimeBaseConfig(). This |
bogdanm | 0:9b334a45a8ff | 154 | function must be called whatever the HRTIM timer operating mode is |
bogdanm | 0:9b334a45a8ff | 155 | (simple v.s. waveform). It configures mainly: |
bogdanm | 0:9b334a45a8ff | 156 | (##)The HRTIM timer counter operating mode (continuous, one shot) |
bogdanm | 0:9b334a45a8ff | 157 | (##)The HRTIM timer clock prescaler |
bogdanm | 0:9b334a45a8ff | 158 | (##)The HRTIM timer period |
bogdanm | 0:9b334a45a8ff | 159 | (##)The HRTIM timer repetition counter |
bogdanm | 0:9b334a45a8ff | 160 | |
bogdanm | 0:9b334a45a8ff | 161 | (#) If the HRTIM timer operates in simple mode: |
bogdanm | 0:9b334a45a8ff | 162 | (##)Simple time base: HAL_HRTIM_SimpleBaseStart(),HAL_HRTIM_SimpleBaseStop(), |
bogdanm | 0:9b334a45a8ff | 163 | HAL_HRTIM_SimpleBaseStart_IT(),HAL_HRTIM_SimpleBaseStop_IT(), |
bogdanm | 0:9b334a45a8ff | 164 | HAL_HRTIM_SimpleBaseStart_DMA(),HAL_HRTIM_SimpleBaseStop_DMA(). |
bogdanm | 0:9b334a45a8ff | 165 | (##)Simple output compare: HAL_HRTIM_SimpleOCChannelConfig(), |
bogdanm | 0:9b334a45a8ff | 166 | HAL_HRTIM_SimpleOCStart(),HAL_HRTIM_SimpleOCStop(), |
bogdanm | 0:9b334a45a8ff | 167 | HAL_HRTIM_SimpleOCStart_IT(),HAL_HRTIM_SimpleOCStop_IT(), |
bogdanm | 0:9b334a45a8ff | 168 | HAL_HRTIM_SimpleOCStart_DMA(),HAL_HRTIM_SimpleOCStop_DMA(), |
bogdanm | 0:9b334a45a8ff | 169 | (##)Simple PWM output: HAL_HRTIM_SimplePWMChannelConfig(), |
bogdanm | 0:9b334a45a8ff | 170 | HAL_HRTIM_SimplePWMStart(),HAL_HRTIM_SimplePWMStop(), |
bogdanm | 0:9b334a45a8ff | 171 | HAL_HRTIM_SimplePWMStart_IT(),HAL_HRTIM_SimplePWMStop_IT(), |
bogdanm | 0:9b334a45a8ff | 172 | HAL_HRTIM_SimplePWMStart_DMA(),HAL_HRTIM_SimplePWMStop_DMA(), |
bogdanm | 0:9b334a45a8ff | 173 | (##)Simple input capture: HAL_HRTIM_SimpleCaptureChannelConfig(), |
bogdanm | 0:9b334a45a8ff | 174 | HAL_HRTIM_SimpleCaptureStart(),HAL_HRTIM_SimpleCaptureStop(), |
bogdanm | 0:9b334a45a8ff | 175 | HAL_HRTIM_SimpleCaptureStart_IT(),HAL_HRTIM_SimpleCaptureStop_IT(), |
bogdanm | 0:9b334a45a8ff | 176 | HAL_HRTIM_SimpleCaptureStart_DMA(),HAL_HRTIM_SimpleCaptureStop_DMA(). |
bogdanm | 0:9b334a45a8ff | 177 | (##)Simple one pulse: HAL_HRTIM_SimpleOnePulseChannelConfig(), |
bogdanm | 0:9b334a45a8ff | 178 | HAL_HRTIM_SimpleOnePulseStart(),HAL_HRTIM_SimpleOnePulseStop(), |
bogdanm | 0:9b334a45a8ff | 179 | HAL_HRTIM_SimpleOnePulseStart_IT(),HAL_HRTIM_SimpleOnePulseStop_It(). |
bogdanm | 0:9b334a45a8ff | 180 | |
bogdanm | 0:9b334a45a8ff | 181 | (#) If the HRTIM timer operates in waveform mode: |
bogdanm | 0:9b334a45a8ff | 182 | (##)Completes waveform timer configuration |
bogdanm | 0:9b334a45a8ff | 183 | (+++)HAL_HRTIM_WaveformTimerConfig(): configuration of a HRTIM |
bogdanm | 0:9b334a45a8ff | 184 | timer operating in wave form mode mainly consists in: |
bogdanm | 0:9b334a45a8ff | 185 | - Enabling the HRTIM timer interrupts and DMA requests, |
bogdanm | 0:9b334a45a8ff | 186 | - Enabling the half mode for the HRTIM timer, |
bogdanm | 0:9b334a45a8ff | 187 | - Defining how the HRTIM timer reacts to external |
bogdanm | 0:9b334a45a8ff | 188 | synchronization input, |
bogdanm | 0:9b334a45a8ff | 189 | - Enabling the push-pull mode for the HRTIM timer, |
bogdanm | 0:9b334a45a8ff | 190 | - Enabling the fault channels for the HRTIM timer, |
bogdanm | 0:9b334a45a8ff | 191 | - Enabling the deadtime insertion for the HRTIM timer, |
bogdanm | 0:9b334a45a8ff | 192 | - Setting the delayed protection mode for the HRTIM timer |
bogdanm | 0:9b334a45a8ff | 193 | (source and outputs on which the delayed protection are applied), |
bogdanm | 0:9b334a45a8ff | 194 | - Specifying the HRTIM timer update and reset triggers, |
bogdanm | 0:9b334a45a8ff | 195 | - Specifying the HRTIM timer registers update policy (preload enabling, ). |
bogdanm | 0:9b334a45a8ff | 196 | (+++)HAL_HRTIM_TimerEventFilteringConfig(): configures external |
bogdanm | 0:9b334a45a8ff | 197 | event blanking and windowingcircuitry of a HRTIM timer: |
bogdanm | 0:9b334a45a8ff | 198 | - Blanking: to mask external events during a defined |
bogdanm | 0:9b334a45a8ff | 199 | time period |
bogdanm | 0:9b334a45a8ff | 200 | - Windowing: to enable external events only during |
bogdanm | 0:9b334a45a8ff | 201 | a defined time period |
bogdanm | 0:9b334a45a8ff | 202 | (+++)HAL_HRTIM_DeadTimeConfig(): configures the deadtime insertion |
bogdanm | 0:9b334a45a8ff | 203 | unit for a HRTIM timer. Allows to generate a couple of |
bogdanm | 0:9b334a45a8ff | 204 | complementary signals from a single reference waveform, |
bogdanm | 0:9b334a45a8ff | 205 | with programmable delays between active state. |
bogdanm | 0:9b334a45a8ff | 206 | (+++)HAL_HRTIM_ChopperModeConfig(): configures the parameters of |
bogdanm | 0:9b334a45a8ff | 207 | the high-frequency carrier signal added on top of the timing |
bogdanm | 0:9b334a45a8ff | 208 | unit output. Chopper mode can be enabled or disabled for each |
bogdanm | 0:9b334a45a8ff | 209 | timer output separately (see HAL_HRTIM_WaveformOutputConfig()). |
bogdanm | 0:9b334a45a8ff | 210 | (+++)HAL_HRTIM_BurstDMAConfig(): configures the burst DMA burst |
bogdanm | 0:9b334a45a8ff | 211 | controller. Allows having multiple HRTIM registers updated |
bogdanm | 0:9b334a45a8ff | 212 | with a single DMA request. The burst DMA operation is started |
bogdanm | 0:9b334a45a8ff | 213 | by calling HAL_HRTIM_BurstDMATransfer(). |
bogdanm | 0:9b334a45a8ff | 214 | (+++)HAL_HRTIM_WaveformCompareConfig():configures the compare unit |
bogdanm | 0:9b334a45a8ff | 215 | of a HRTIM timer. This operation consists in setting the |
bogdanm | 0:9b334a45a8ff | 216 | compare value and possibly specifying the auto delayed mode |
bogdanm | 0:9b334a45a8ff | 217 | for compare units 2 and 4 (allows to have compare events |
bogdanm | 0:9b334a45a8ff | 218 | generated relatively to capture events). Note that when auto |
bogdanm | 0:9b334a45a8ff | 219 | delayed mode is needed, the capture unit associated to the |
bogdanm | 0:9b334a45a8ff | 220 | compare unit must be configured separately. |
bogdanm | 0:9b334a45a8ff | 221 | (+++)HAL_HRTIM_WaveformCaptureConfig(): configures the capture unit |
bogdanm | 0:9b334a45a8ff | 222 | of a HRTIM timer. This operation consists in specifying the |
bogdanm | 0:9b334a45a8ff | 223 | source(s) triggering the capture (timer register update event, |
bogdanm | 0:9b334a45a8ff | 224 | external event, timer output set/reset event, other HRTIM |
bogdanm | 0:9b334a45a8ff | 225 | timer related events). |
bogdanm | 0:9b334a45a8ff | 226 | (+++)HAL_HRTIM_WaveformOutputConfig(): configuration HRTIM timer |
bogdanm | 0:9b334a45a8ff | 227 | output manly consists in: |
bogdanm | 0:9b334a45a8ff | 228 | - Setting the output polarity (active high or active low), |
bogdanm | 0:9b334a45a8ff | 229 | - Defining the set/reset crossbar for the output, |
bogdanm | 0:9b334a45a8ff | 230 | - Specifying the fault level (active or inactive) in IDLE |
bogdanm | 0:9b334a45a8ff | 231 | and FAULT states., |
bogdanm | 0:9b334a45a8ff | 232 | (##)Set waveform timer output(s) level |
bogdanm | 0:9b334a45a8ff | 233 | (+++)HAL_HRTIM_WaveformSetOutputLevel(): forces the output to its |
bogdanm | 0:9b334a45a8ff | 234 | active or inactive level. For example, when deadtime insertion |
bogdanm | 0:9b334a45a8ff | 235 | is enabled it is necessary to force the output level by software |
bogdanm | 0:9b334a45a8ff | 236 | to have the outputs in a complementary state as soon as the RUN mode is entered. |
bogdanm | 0:9b334a45a8ff | 237 | (##)Enable/Disable waveform timer output(s) |
bogdanm | 0:9b334a45a8ff | 238 | (+++)HAL_HRTIM_WaveformOutputStart(),HAL_HRTIM_WaveformOutputStop(). |
bogdanm | 0:9b334a45a8ff | 239 | (##)Start/Stop waveform HRTIM timer(s). |
bogdanm | 0:9b334a45a8ff | 240 | (+++)HAL_HRTIM_WaveformCounterStart(),HAL_HRTIM_WaveformCounterStop(), |
bogdanm | 0:9b334a45a8ff | 241 | (+++)HAL_HRTIM_WaveformCounterStart_IT(),HAL_HRTIM_WaveformCounterStop_IT(), |
bogdanm | 0:9b334a45a8ff | 242 | (+++)HAL_HRTIM_WaveformCounterStart()_DMA,HAL_HRTIM_WaveformCounterStop_DMA(), |
bogdanm | 0:9b334a45a8ff | 243 | |
bogdanm | 0:9b334a45a8ff | 244 | (##)Burst mode controller enabling: |
bogdanm | 0:9b334a45a8ff | 245 | (+++)HAL_HRTIM_BurstModeCtl(): activates or de-activates the |
bogdanm | 0:9b334a45a8ff | 246 | burst mode controller. |
bogdanm | 0:9b334a45a8ff | 247 | |
bogdanm | 0:9b334a45a8ff | 248 | (##)Some HRTIM operations can be triggered by software: |
bogdanm | 0:9b334a45a8ff | 249 | (+++)HAL_HRTIM_BurstModeSoftwareTrigger(): calling this function |
bogdanm | 0:9b334a45a8ff | 250 | trigs the burst operation. |
bogdanm | 0:9b334a45a8ff | 251 | (+++)HAL_HRTIM_SoftwareCapture(): calling this function trigs the |
bogdanm | 0:9b334a45a8ff | 252 | capture of the HRTIM timer counter. |
bogdanm | 0:9b334a45a8ff | 253 | (+++)HAL_HRTIM_SoftwareUpdate(): calling this function trigs the |
bogdanm | 0:9b334a45a8ff | 254 | update of the pre-loadable registers of the HRTIM timer () |
bogdanm | 0:9b334a45a8ff | 255 | (+++)HAL_HRTIM_SoftwareReset():calling this function resets the |
bogdanm | 0:9b334a45a8ff | 256 | HRTIM timer counter. |
bogdanm | 0:9b334a45a8ff | 257 | |
bogdanm | 0:9b334a45a8ff | 258 | (##)Some functions can be used anytime to retrieve HRTIM timer related |
bogdanm | 0:9b334a45a8ff | 259 | information |
bogdanm | 0:9b334a45a8ff | 260 | (+++)HAL_HRTIM_GetCapturedValue(): returns actual value of the |
bogdanm | 0:9b334a45a8ff | 261 | capture register of the designated capture unit. |
bogdanm | 0:9b334a45a8ff | 262 | (+++)HAL_HRTIM_WaveformGetOutputLevel(): returns actual level |
bogdanm | 0:9b334a45a8ff | 263 | (ACTIVE/INACTIVE) of the designated timer output. |
bogdanm | 0:9b334a45a8ff | 264 | (+++)HAL_HRTIM_WaveformGetOutputState():returns actual state |
bogdanm | 0:9b334a45a8ff | 265 | (IDLE/RUN/FAULT) of the designated timer output. |
bogdanm | 0:9b334a45a8ff | 266 | (+++)HAL_HRTIM_GetDelayedProtectionStatus():returns actual level |
bogdanm | 0:9b334a45a8ff | 267 | (ACTIVE/INACTIVE) of the designated output when the delayed |
bogdanm | 0:9b334a45a8ff | 268 | protection was triggered. |
bogdanm | 0:9b334a45a8ff | 269 | (+++)HAL_HRTIM_GetBurstStatus(): returns the actual status |
bogdanm | 0:9b334a45a8ff | 270 | (ACTIVE/INACTIVE) of the burst mode controller. |
bogdanm | 0:9b334a45a8ff | 271 | (+++)HAL_HRTIM_GetCurrentPushPullStatus(): when the push-pull mode |
bogdanm | 0:9b334a45a8ff | 272 | is enabled for the HRTIM timer (see HAL_HRTIM_WaveformTimerConfig()), |
bogdanm | 0:9b334a45a8ff | 273 | the push-pull indicates on which output the signal is currently |
bogdanm | 0:9b334a45a8ff | 274 | active (e.g signal applied on output 1 and output 2 forced |
bogdanm | 0:9b334a45a8ff | 275 | inactive or vice versa). |
bogdanm | 0:9b334a45a8ff | 276 | (+++)HAL_HRTIM_GetIdlePushPullStatus(): when the push-pull mode |
bogdanm | 0:9b334a45a8ff | 277 | is enabled for the HRTIM timer (see HAL_HRTIM_WaveformTimerConfig()), |
bogdanm | 0:9b334a45a8ff | 278 | the idle push-pull status indicates during which period the |
bogdanm | 0:9b334a45a8ff | 279 | delayed protection request occurred (e.g. protection occurred |
bogdanm | 0:9b334a45a8ff | 280 | when the output 1 was active and output 2 forced inactive or |
bogdanm | 0:9b334a45a8ff | 281 | vice versa). |
bogdanm | 0:9b334a45a8ff | 282 | |
bogdanm | 0:9b334a45a8ff | 283 | (##)Some functions can be used anytime to retrieve actual HRTIM status |
bogdanm | 0:9b334a45a8ff | 284 | (+++)HAL_HRTIM_GetState(): returns actual HRTIM instance HAL state. |
bogdanm | 0:9b334a45a8ff | 285 | |
bogdanm | 0:9b334a45a8ff | 286 | @endverbatim |
bogdanm | 0:9b334a45a8ff | 287 | |
bogdanm | 0:9b334a45a8ff | 288 | ****************************************************************************** |
bogdanm | 0:9b334a45a8ff | 289 | * @attention |
bogdanm | 0:9b334a45a8ff | 290 | * |
bogdanm | 0:9b334a45a8ff | 291 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
bogdanm | 0:9b334a45a8ff | 292 | * |
bogdanm | 0:9b334a45a8ff | 293 | * Redistribution and use in source and binary forms, with or without modification, |
bogdanm | 0:9b334a45a8ff | 294 | * are permitted provided that the following conditions are met: |
bogdanm | 0:9b334a45a8ff | 295 | * 1. Redistributions of source code must retain the above copyright notice, |
bogdanm | 0:9b334a45a8ff | 296 | * this list of conditions and the following disclaimer. |
bogdanm | 0:9b334a45a8ff | 297 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
bogdanm | 0:9b334a45a8ff | 298 | * this list of conditions and the following disclaimer in the documentation |
bogdanm | 0:9b334a45a8ff | 299 | * and/or other materials provided with the distribution. |
bogdanm | 0:9b334a45a8ff | 300 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
bogdanm | 0:9b334a45a8ff | 301 | * may be used to endorse or promote products derived from this software |
bogdanm | 0:9b334a45a8ff | 302 | * without specific prior written permission. |
bogdanm | 0:9b334a45a8ff | 303 | * |
bogdanm | 0:9b334a45a8ff | 304 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
bogdanm | 0:9b334a45a8ff | 305 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
bogdanm | 0:9b334a45a8ff | 306 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
bogdanm | 0:9b334a45a8ff | 307 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
bogdanm | 0:9b334a45a8ff | 308 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
bogdanm | 0:9b334a45a8ff | 309 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
bogdanm | 0:9b334a45a8ff | 310 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
bogdanm | 0:9b334a45a8ff | 311 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
bogdanm | 0:9b334a45a8ff | 312 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
bogdanm | 0:9b334a45a8ff | 313 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
bogdanm | 0:9b334a45a8ff | 314 | * |
bogdanm | 0:9b334a45a8ff | 315 | ****************************************************************************** |
bogdanm | 0:9b334a45a8ff | 316 | */ |
bogdanm | 0:9b334a45a8ff | 317 | |
bogdanm | 0:9b334a45a8ff | 318 | /* Includes ------------------------------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 319 | #include "stm32f3xx_hal.h" |
bogdanm | 0:9b334a45a8ff | 320 | |
bogdanm | 0:9b334a45a8ff | 321 | /** @addtogroup STM32F3xx_HAL_Driver |
bogdanm | 0:9b334a45a8ff | 322 | * @{ |
bogdanm | 0:9b334a45a8ff | 323 | */ |
bogdanm | 0:9b334a45a8ff | 324 | |
bogdanm | 0:9b334a45a8ff | 325 | #ifdef HAL_HRTIM_MODULE_ENABLED |
bogdanm | 0:9b334a45a8ff | 326 | |
bogdanm | 0:9b334a45a8ff | 327 | #if defined(STM32F334x8) |
bogdanm | 0:9b334a45a8ff | 328 | |
bogdanm | 0:9b334a45a8ff | 329 | /** @defgroup HRTIM HRTIM HAL module driver |
bogdanm | 0:9b334a45a8ff | 330 | * @brief HRTIM HAL module driver |
bogdanm | 0:9b334a45a8ff | 331 | * @{ |
bogdanm | 0:9b334a45a8ff | 332 | */ |
bogdanm | 0:9b334a45a8ff | 333 | |
bogdanm | 0:9b334a45a8ff | 334 | /* Private typedef -----------------------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 335 | /* Private define ------------------------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 336 | /** @defgroup HRTIM_Private_Defines HRTIM Private Define |
bogdanm | 0:9b334a45a8ff | 337 | * @{ |
bogdanm | 0:9b334a45a8ff | 338 | */ |
bogdanm | 0:9b334a45a8ff | 339 | #define HRTIM_FLTR_FLTxEN (HRTIM_FLTR_FLT1EN |\ |
bogdanm | 0:9b334a45a8ff | 340 | HRTIM_FLTR_FLT2EN |\ |
bogdanm | 0:9b334a45a8ff | 341 | HRTIM_FLTR_FLT3EN |\ |
bogdanm | 0:9b334a45a8ff | 342 | HRTIM_FLTR_FLT4EN | \ |
bogdanm | 0:9b334a45a8ff | 343 | HRTIM_FLTR_FLT5EN) |
bogdanm | 0:9b334a45a8ff | 344 | |
bogdanm | 0:9b334a45a8ff | 345 | #define HRTIM_TIMCR_TIMUPDATETRIGGER (HRTIM_TIMUPDATETRIGGER_MASTER |\ |
bogdanm | 0:9b334a45a8ff | 346 | HRTIM_TIMUPDATETRIGGER_TIMER_A |\ |
bogdanm | 0:9b334a45a8ff | 347 | HRTIM_TIMUPDATETRIGGER_TIMER_B |\ |
bogdanm | 0:9b334a45a8ff | 348 | HRTIM_TIMUPDATETRIGGER_TIMER_C |\ |
bogdanm | 0:9b334a45a8ff | 349 | HRTIM_TIMUPDATETRIGGER_TIMER_D |\ |
bogdanm | 0:9b334a45a8ff | 350 | HRTIM_TIMUPDATETRIGGER_TIMER_E) |
bogdanm | 0:9b334a45a8ff | 351 | /** |
bogdanm | 0:9b334a45a8ff | 352 | * @} |
bogdanm | 0:9b334a45a8ff | 353 | */ |
bogdanm | 0:9b334a45a8ff | 354 | |
bogdanm | 0:9b334a45a8ff | 355 | /* Private macro -------------------------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 356 | /* Private variables ---------------------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 357 | /** @defgroup HRTIM_Private_Variables HRTIM Private Variables |
bogdanm | 0:9b334a45a8ff | 358 | * @{ |
bogdanm | 0:9b334a45a8ff | 359 | */ |
bogdanm | 0:9b334a45a8ff | 360 | static uint32_t TimerIdxToTimerId[] = |
bogdanm | 0:9b334a45a8ff | 361 | { |
bogdanm | 0:9b334a45a8ff | 362 | HRTIM_TIMERID_TIMER_A, |
bogdanm | 0:9b334a45a8ff | 363 | HRTIM_TIMERID_TIMER_B, |
bogdanm | 0:9b334a45a8ff | 364 | HRTIM_TIMERID_TIMER_C, |
bogdanm | 0:9b334a45a8ff | 365 | HRTIM_TIMERID_TIMER_D, |
bogdanm | 0:9b334a45a8ff | 366 | HRTIM_TIMERID_TIMER_E, |
bogdanm | 0:9b334a45a8ff | 367 | HRTIM_TIMERID_MASTER, |
bogdanm | 0:9b334a45a8ff | 368 | }; |
bogdanm | 0:9b334a45a8ff | 369 | /** |
bogdanm | 0:9b334a45a8ff | 370 | * @} |
bogdanm | 0:9b334a45a8ff | 371 | */ |
bogdanm | 0:9b334a45a8ff | 372 | |
bogdanm | 0:9b334a45a8ff | 373 | /* Private function prototypes -----------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 374 | /** @defgroup HRTIM_Private_Functions HRTIM Private Functions |
bogdanm | 0:9b334a45a8ff | 375 | * @{ |
bogdanm | 0:9b334a45a8ff | 376 | */ |
bogdanm | 0:9b334a45a8ff | 377 | static void HRTIM_MasterBase_Config(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 378 | HRTIM_TimeBaseCfgTypeDef * pTimeBaseCfg); |
bogdanm | 0:9b334a45a8ff | 379 | |
bogdanm | 0:9b334a45a8ff | 380 | static void HRTIM_TimingUnitBase_Config(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 381 | uint32_t TimerIdx, |
bogdanm | 0:9b334a45a8ff | 382 | HRTIM_TimeBaseCfgTypeDef * pTimeBaseCfg); |
bogdanm | 0:9b334a45a8ff | 383 | |
bogdanm | 0:9b334a45a8ff | 384 | static void HRTIM_MasterWaveform_Config(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 385 | HRTIM_TimerCfgTypeDef * pTimerCfg); |
bogdanm | 0:9b334a45a8ff | 386 | |
bogdanm | 0:9b334a45a8ff | 387 | static void HRTIM_TimingUnitWaveform_Config(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 388 | uint32_t TimerIdx, |
bogdanm | 0:9b334a45a8ff | 389 | HRTIM_TimerCfgTypeDef * pTimerCfg); |
bogdanm | 0:9b334a45a8ff | 390 | |
bogdanm | 0:9b334a45a8ff | 391 | static void HRTIM_CompareUnitConfig(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 392 | uint32_t TimerIdx, |
bogdanm | 0:9b334a45a8ff | 393 | uint32_t CompareUnit, |
bogdanm | 0:9b334a45a8ff | 394 | HRTIM_CompareCfgTypeDef * pCompareCfg); |
bogdanm | 0:9b334a45a8ff | 395 | |
bogdanm | 0:9b334a45a8ff | 396 | static void HRTIM_CaptureUnitConfig(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 397 | uint32_t TimerIdx, |
bogdanm | 0:9b334a45a8ff | 398 | uint32_t CaptureUnit, |
bogdanm | 0:9b334a45a8ff | 399 | uint32_t Event); |
bogdanm | 0:9b334a45a8ff | 400 | |
bogdanm | 0:9b334a45a8ff | 401 | static void HRTIM_OutputConfig(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 402 | uint32_t TimerIdx, |
bogdanm | 0:9b334a45a8ff | 403 | uint32_t Output, |
bogdanm | 0:9b334a45a8ff | 404 | HRTIM_OutputCfgTypeDef * pOutputCfg); |
bogdanm | 0:9b334a45a8ff | 405 | |
bogdanm | 0:9b334a45a8ff | 406 | static void HRTIM_EventConfig(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 407 | uint32_t Event, |
bogdanm | 0:9b334a45a8ff | 408 | HRTIM_EventCfgTypeDef * pEventCfg); |
bogdanm | 0:9b334a45a8ff | 409 | |
bogdanm | 0:9b334a45a8ff | 410 | static void HRTIM_TIM_ResetConfig(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 411 | uint32_t TimerIdx, |
bogdanm | 0:9b334a45a8ff | 412 | uint32_t Event); |
bogdanm | 0:9b334a45a8ff | 413 | |
bogdanm | 0:9b334a45a8ff | 414 | static uint32_t HRTIM_GetITFromOCMode(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 415 | uint32_t TimerIdx, |
bogdanm | 0:9b334a45a8ff | 416 | uint32_t OCChannel); |
bogdanm | 0:9b334a45a8ff | 417 | |
bogdanm | 0:9b334a45a8ff | 418 | static uint32_t HRTIM_GetDMAFromOCMode(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 419 | uint32_t TimerIdx, |
bogdanm | 0:9b334a45a8ff | 420 | uint32_t OCChannel); |
bogdanm | 0:9b334a45a8ff | 421 | |
bogdanm | 0:9b334a45a8ff | 422 | static DMA_HandleTypeDef * HRTIM_GetDMAHandleFromTimerIdx(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 423 | uint32_t TimerIdx); |
bogdanm | 0:9b334a45a8ff | 424 | |
bogdanm | 0:9b334a45a8ff | 425 | static uint32_t GetTimerIdxFromDMAHandle(DMA_HandleTypeDef *hdma); |
bogdanm | 0:9b334a45a8ff | 426 | |
bogdanm | 0:9b334a45a8ff | 427 | static void HRTIM_ForceRegistersUpdate(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 428 | uint32_t TimerIdx); |
bogdanm | 0:9b334a45a8ff | 429 | |
bogdanm | 0:9b334a45a8ff | 430 | static void HRTIM_HRTIM_ISR(HRTIM_HandleTypeDef * hhrtim); |
bogdanm | 0:9b334a45a8ff | 431 | |
bogdanm | 0:9b334a45a8ff | 432 | static void HRTIM_Master_ISR(HRTIM_HandleTypeDef * hhrtim); |
bogdanm | 0:9b334a45a8ff | 433 | |
bogdanm | 0:9b334a45a8ff | 434 | static void HRTIM_Timer_ISR(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 435 | uint32_t TimerIdx); |
bogdanm | 0:9b334a45a8ff | 436 | |
bogdanm | 0:9b334a45a8ff | 437 | static void HRTIM_DMAMasterCplt(DMA_HandleTypeDef *hdma); |
bogdanm | 0:9b334a45a8ff | 438 | |
bogdanm | 0:9b334a45a8ff | 439 | static void HRTIM_DMATimerxCplt(DMA_HandleTypeDef *hdma); |
bogdanm | 0:9b334a45a8ff | 440 | |
bogdanm | 0:9b334a45a8ff | 441 | static void HRTIM_DMAError(DMA_HandleTypeDef *hdma); |
bogdanm | 0:9b334a45a8ff | 442 | |
bogdanm | 0:9b334a45a8ff | 443 | static void HRTIM_BurstDMACplt(DMA_HandleTypeDef *hdma); |
bogdanm | 0:9b334a45a8ff | 444 | /** |
bogdanm | 0:9b334a45a8ff | 445 | * @} |
bogdanm | 0:9b334a45a8ff | 446 | */ |
bogdanm | 0:9b334a45a8ff | 447 | |
bogdanm | 0:9b334a45a8ff | 448 | /* Exported functions ---------------------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 449 | /** @defgroup HRTIM_Exported_Functions HRTIM Exported Functions |
bogdanm | 0:9b334a45a8ff | 450 | * @{ |
bogdanm | 0:9b334a45a8ff | 451 | */ |
bogdanm | 0:9b334a45a8ff | 452 | |
bogdanm | 0:9b334a45a8ff | 453 | /** @defgroup HRTIM_Exported_Functions_Group1 Initialization and de-initialization functions |
bogdanm | 0:9b334a45a8ff | 454 | * @brief Initialization and Configuration functions |
bogdanm | 0:9b334a45a8ff | 455 | * |
bogdanm | 0:9b334a45a8ff | 456 | @verbatim |
bogdanm | 0:9b334a45a8ff | 457 | =============================================================================== |
bogdanm | 0:9b334a45a8ff | 458 | ##### Initialization and Time Base Configuration functions ##### |
bogdanm | 0:9b334a45a8ff | 459 | =============================================================================== |
bogdanm | 0:9b334a45a8ff | 460 | [..] This section provides functions allowing to: |
bogdanm | 0:9b334a45a8ff | 461 | (+) Initialize a HRTIM instance |
bogdanm | 0:9b334a45a8ff | 462 | (+) De-initialize a HRTIM instance |
bogdanm | 0:9b334a45a8ff | 463 | (+) Initialize the HRTIM MSP |
bogdanm | 0:9b334a45a8ff | 464 | (+) De-initialize the HRTIM MSP |
bogdanm | 0:9b334a45a8ff | 465 | (+) Start the high-resolution unit (start DLL calibration) |
bogdanm | 0:9b334a45a8ff | 466 | (+) Check that the high resolution unit is ready (DLL calibration done) |
bogdanm | 0:9b334a45a8ff | 467 | (+) Configure the time base unit of a HRTIM timer |
bogdanm | 0:9b334a45a8ff | 468 | |
bogdanm | 0:9b334a45a8ff | 469 | @endverbatim |
bogdanm | 0:9b334a45a8ff | 470 | * @{ |
bogdanm | 0:9b334a45a8ff | 471 | */ |
bogdanm | 0:9b334a45a8ff | 472 | |
bogdanm | 0:9b334a45a8ff | 473 | /** |
bogdanm | 0:9b334a45a8ff | 474 | * @brief Initializes a HRTIM instance |
bogdanm | 0:9b334a45a8ff | 475 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 476 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 477 | */ |
bogdanm | 0:9b334a45a8ff | 478 | HAL_StatusTypeDef HAL_HRTIM_Init(HRTIM_HandleTypeDef * hhrtim) |
bogdanm | 0:9b334a45a8ff | 479 | { |
bogdanm | 0:9b334a45a8ff | 480 | uint8_t timer_idx; |
bogdanm | 0:9b334a45a8ff | 481 | uint32_t hrtim_mcr; |
bogdanm | 0:9b334a45a8ff | 482 | |
bogdanm | 0:9b334a45a8ff | 483 | /* Check the HRTIM handle allocation */ |
bogdanm | 0:9b334a45a8ff | 484 | if(hhrtim == HAL_NULL) |
bogdanm | 0:9b334a45a8ff | 485 | { |
bogdanm | 0:9b334a45a8ff | 486 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 487 | } |
bogdanm | 0:9b334a45a8ff | 488 | |
bogdanm | 0:9b334a45a8ff | 489 | /* Check the parameters */ |
bogdanm | 0:9b334a45a8ff | 490 | assert_param(IS_HRTIM_ALL_INSTANCE(hhrtim->Instance)); |
bogdanm | 0:9b334a45a8ff | 491 | assert_param(IS_HRTIM_IT(hhrtim->Init.HRTIMInterruptResquests)); |
bogdanm | 0:9b334a45a8ff | 492 | |
bogdanm | 0:9b334a45a8ff | 493 | /* Set the HRTIM state */ |
bogdanm | 0:9b334a45a8ff | 494 | hhrtim->State = HAL_HRTIM_STATE_BUSY; |
bogdanm | 0:9b334a45a8ff | 495 | |
bogdanm | 0:9b334a45a8ff | 496 | /* Initialize the DMA handles */ |
bogdanm | 0:9b334a45a8ff | 497 | hhrtim->hdmaMaster = (DMA_HandleTypeDef *)HAL_NULL; |
bogdanm | 0:9b334a45a8ff | 498 | hhrtim->hdmaTimerA = (DMA_HandleTypeDef *)HAL_NULL; |
bogdanm | 0:9b334a45a8ff | 499 | hhrtim->hdmaTimerB = (DMA_HandleTypeDef *)HAL_NULL; |
bogdanm | 0:9b334a45a8ff | 500 | hhrtim->hdmaTimerC = (DMA_HandleTypeDef *)HAL_NULL; |
bogdanm | 0:9b334a45a8ff | 501 | hhrtim->hdmaTimerD = (DMA_HandleTypeDef *)HAL_NULL; |
bogdanm | 0:9b334a45a8ff | 502 | hhrtim->hdmaTimerE = (DMA_HandleTypeDef *)HAL_NULL; |
bogdanm | 0:9b334a45a8ff | 503 | |
bogdanm | 0:9b334a45a8ff | 504 | /* HRTIM output synchronization configuration (if required) */ |
bogdanm | 0:9b334a45a8ff | 505 | if ((hhrtim->Init.SyncOptions & HRTIM_SYNCOPTION_MASTER) != RESET) |
bogdanm | 0:9b334a45a8ff | 506 | { |
bogdanm | 0:9b334a45a8ff | 507 | /* Check parameters */ |
bogdanm | 0:9b334a45a8ff | 508 | assert_param(IS_HRTIM_SYNCOUTPUTSOURCE(hhrtim->Init.SyncOutputSource)); |
bogdanm | 0:9b334a45a8ff | 509 | assert_param(IS_HRTIM_SYNCOUTPUTPOLARITY(hhrtim->Init.SyncOutputPolarity)); |
bogdanm | 0:9b334a45a8ff | 510 | |
bogdanm | 0:9b334a45a8ff | 511 | /* The synchronization output initialization procedure must be done prior |
bogdanm | 0:9b334a45a8ff | 512 | to the configuration of the MCU outputs (done within HAL_HRTIM_MspInit) |
bogdanm | 0:9b334a45a8ff | 513 | */ |
bogdanm | 0:9b334a45a8ff | 514 | if (hhrtim->Instance == HRTIM1) |
bogdanm | 0:9b334a45a8ff | 515 | { |
bogdanm | 0:9b334a45a8ff | 516 | /* Enable the HRTIM peripheral clock */ |
bogdanm | 0:9b334a45a8ff | 517 | __HRTIM1_CLK_ENABLE(); |
bogdanm | 0:9b334a45a8ff | 518 | } |
bogdanm | 0:9b334a45a8ff | 519 | |
bogdanm | 0:9b334a45a8ff | 520 | hrtim_mcr = hhrtim->Instance->sMasterRegs.MCR; |
bogdanm | 0:9b334a45a8ff | 521 | |
bogdanm | 0:9b334a45a8ff | 522 | /* Set the event to be sent on the synchronization output */ |
bogdanm | 0:9b334a45a8ff | 523 | hrtim_mcr &= ~(HRTIM_MCR_SYNC_SRC); |
bogdanm | 0:9b334a45a8ff | 524 | hrtim_mcr |= (hhrtim->Init.SyncOutputSource & HRTIM_MCR_SYNC_SRC); |
bogdanm | 0:9b334a45a8ff | 525 | |
bogdanm | 0:9b334a45a8ff | 526 | /* Set the polarity of the synchronization output */ |
bogdanm | 0:9b334a45a8ff | 527 | hrtim_mcr &= ~(HRTIM_MCR_SYNC_OUT); |
bogdanm | 0:9b334a45a8ff | 528 | hrtim_mcr |= (hhrtim->Init.SyncOutputPolarity & HRTIM_MCR_SYNC_OUT); |
bogdanm | 0:9b334a45a8ff | 529 | |
bogdanm | 0:9b334a45a8ff | 530 | /* Update the HRTIM registers */ |
bogdanm | 0:9b334a45a8ff | 531 | hhrtim->Instance->sMasterRegs.MCR = hrtim_mcr; |
bogdanm | 0:9b334a45a8ff | 532 | } |
bogdanm | 0:9b334a45a8ff | 533 | |
bogdanm | 0:9b334a45a8ff | 534 | /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */ |
bogdanm | 0:9b334a45a8ff | 535 | HAL_HRTIM_MspInit(hhrtim); |
bogdanm | 0:9b334a45a8ff | 536 | |
bogdanm | 0:9b334a45a8ff | 537 | /* HRTIM input synchronization configuration (if required) */ |
bogdanm | 0:9b334a45a8ff | 538 | if ((hhrtim->Init.SyncOptions & HRTIM_SYNCOPTION_SLAVE) != RESET) |
bogdanm | 0:9b334a45a8ff | 539 | { |
bogdanm | 0:9b334a45a8ff | 540 | /* Check parameters */ |
bogdanm | 0:9b334a45a8ff | 541 | assert_param(IS_HRTIM_SYNCINPUTSOURCE(hhrtim->Init.SyncInputSource)); |
bogdanm | 0:9b334a45a8ff | 542 | |
bogdanm | 0:9b334a45a8ff | 543 | hrtim_mcr = hhrtim->Instance->sMasterRegs.MCR; |
bogdanm | 0:9b334a45a8ff | 544 | |
bogdanm | 0:9b334a45a8ff | 545 | /* Set the synchronization input source */ |
bogdanm | 0:9b334a45a8ff | 546 | hrtim_mcr &= ~(HRTIM_MCR_SYNC_IN); |
bogdanm | 0:9b334a45a8ff | 547 | hrtim_mcr |= (hhrtim->Init.SyncInputSource & HRTIM_MCR_SYNC_IN); |
bogdanm | 0:9b334a45a8ff | 548 | |
bogdanm | 0:9b334a45a8ff | 549 | /* Update the HRTIM registers */ |
bogdanm | 0:9b334a45a8ff | 550 | hhrtim->Instance->sMasterRegs.MCR = hrtim_mcr; |
bogdanm | 0:9b334a45a8ff | 551 | } |
bogdanm | 0:9b334a45a8ff | 552 | |
bogdanm | 0:9b334a45a8ff | 553 | /* Initialize the HRTIM state*/ |
bogdanm | 0:9b334a45a8ff | 554 | hhrtim->State = HAL_HRTIM_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 555 | |
bogdanm | 0:9b334a45a8ff | 556 | /* Initialize the lock status of the HRTIM HAL API */ |
bogdanm | 0:9b334a45a8ff | 557 | __HAL_UNLOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 558 | |
bogdanm | 0:9b334a45a8ff | 559 | /* Tnitialize timer related parameters */ |
bogdanm | 0:9b334a45a8ff | 560 | for (timer_idx = HRTIM_TIMERINDEX_TIMER_A ; |
bogdanm | 0:9b334a45a8ff | 561 | timer_idx <= HRTIM_TIMERINDEX_MASTER ; |
bogdanm | 0:9b334a45a8ff | 562 | timer_idx++) |
bogdanm | 0:9b334a45a8ff | 563 | { |
bogdanm | 0:9b334a45a8ff | 564 | hhrtim->TimerParam[timer_idx].CaptureTrigger1 = HRTIM_CAPTURETRIGGER_NONE; |
bogdanm | 0:9b334a45a8ff | 565 | hhrtim->TimerParam[timer_idx].CaptureTrigger2 = HRTIM_CAPTURETRIGGER_NONE; |
bogdanm | 0:9b334a45a8ff | 566 | hhrtim->TimerParam[timer_idx].InterruptRequests = HRTIM_IT_NONE; |
bogdanm | 0:9b334a45a8ff | 567 | hhrtim->TimerParam[timer_idx].DMARequests = HRTIM_IT_NONE; |
bogdanm | 0:9b334a45a8ff | 568 | hhrtim->TimerParam[timer_idx].DMASrcAddress = 0; |
bogdanm | 0:9b334a45a8ff | 569 | hhrtim->TimerParam[timer_idx].DMASize = 0; |
bogdanm | 0:9b334a45a8ff | 570 | } |
bogdanm | 0:9b334a45a8ff | 571 | |
bogdanm | 0:9b334a45a8ff | 572 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 573 | } |
bogdanm | 0:9b334a45a8ff | 574 | |
bogdanm | 0:9b334a45a8ff | 575 | /** |
bogdanm | 0:9b334a45a8ff | 576 | * @brief De-initializes a timer operating in waveform mode |
bogdanm | 0:9b334a45a8ff | 577 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 578 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 579 | */ |
bogdanm | 0:9b334a45a8ff | 580 | HAL_StatusTypeDef HAL_HRTIM_DeInit (HRTIM_HandleTypeDef * hhrtim) |
bogdanm | 0:9b334a45a8ff | 581 | { |
bogdanm | 0:9b334a45a8ff | 582 | /* Check the HRTIM handle allocation */ |
bogdanm | 0:9b334a45a8ff | 583 | if(hhrtim == HAL_NULL) |
bogdanm | 0:9b334a45a8ff | 584 | { |
bogdanm | 0:9b334a45a8ff | 585 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 586 | } |
bogdanm | 0:9b334a45a8ff | 587 | |
bogdanm | 0:9b334a45a8ff | 588 | /* Check the parameters */ |
bogdanm | 0:9b334a45a8ff | 589 | assert_param(IS_HRTIM_ALL_INSTANCE(hhrtim->Instance)); |
bogdanm | 0:9b334a45a8ff | 590 | |
bogdanm | 0:9b334a45a8ff | 591 | /* Set the HRTIM state */ |
bogdanm | 0:9b334a45a8ff | 592 | hhrtim->State = HAL_HRTIM_STATE_BUSY; |
bogdanm | 0:9b334a45a8ff | 593 | |
bogdanm | 0:9b334a45a8ff | 594 | /* DeInit the low level hardware */ |
bogdanm | 0:9b334a45a8ff | 595 | HAL_HRTIM_MspDeInit(hhrtim); |
bogdanm | 0:9b334a45a8ff | 596 | |
bogdanm | 0:9b334a45a8ff | 597 | hhrtim->State = HAL_HRTIM_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 598 | |
bogdanm | 0:9b334a45a8ff | 599 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 600 | } |
bogdanm | 0:9b334a45a8ff | 601 | |
bogdanm | 0:9b334a45a8ff | 602 | /** |
bogdanm | 0:9b334a45a8ff | 603 | * @brief MSP initialization for a HRTIM instance |
bogdanm | 0:9b334a45a8ff | 604 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 605 | * @retval None |
bogdanm | 0:9b334a45a8ff | 606 | */ |
bogdanm | 0:9b334a45a8ff | 607 | __weak void HAL_HRTIM_MspInit(HRTIM_HandleTypeDef * hhrtim) |
bogdanm | 0:9b334a45a8ff | 608 | { |
bogdanm | 0:9b334a45a8ff | 609 | /* NOTE: This function should not be modified, when the callback is needed, |
bogdanm | 0:9b334a45a8ff | 610 | the HAL_HRTIM_MspInit could be implemented in the user file |
bogdanm | 0:9b334a45a8ff | 611 | */ |
bogdanm | 0:9b334a45a8ff | 612 | } |
bogdanm | 0:9b334a45a8ff | 613 | |
bogdanm | 0:9b334a45a8ff | 614 | /** |
bogdanm | 0:9b334a45a8ff | 615 | * @brief MSP initialization for a for a HRTIM instance |
bogdanm | 0:9b334a45a8ff | 616 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 617 | * @retval None |
bogdanm | 0:9b334a45a8ff | 618 | */ |
bogdanm | 0:9b334a45a8ff | 619 | __weak void HAL_HRTIM_MspDeInit(HRTIM_HandleTypeDef * hhrtim) |
bogdanm | 0:9b334a45a8ff | 620 | { |
bogdanm | 0:9b334a45a8ff | 621 | /* NOTE: This function should not be modified, when the callback is needed, |
bogdanm | 0:9b334a45a8ff | 622 | the HAL_HRTIM_MspDeInit could be implemented in the user file |
bogdanm | 0:9b334a45a8ff | 623 | */ |
bogdanm | 0:9b334a45a8ff | 624 | } |
bogdanm | 0:9b334a45a8ff | 625 | |
bogdanm | 0:9b334a45a8ff | 626 | /** |
bogdanm | 0:9b334a45a8ff | 627 | * @brief Starts the DLL calibration |
bogdanm | 0:9b334a45a8ff | 628 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 629 | * @param CalibrationRate: DLL calibration period |
bogdanm | 0:9b334a45a8ff | 630 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 631 | * @arg HRTIM_SINGLE_CALIBRATION: One shot DLL calibration |
bogdanm | 0:9b334a45a8ff | 632 | * @arg HRTIM_CALIBRATIONRATE_7300: Periodic DLL calibration. T=7.3 ms |
bogdanm | 0:9b334a45a8ff | 633 | * @arg HRTIM_CALIBRATIONRATE_910: Periodic DLL calibration. T=910 us |
bogdanm | 0:9b334a45a8ff | 634 | * @arg HRTIM_CALIBRATIONRATE_114: Periodic DLL calibration. T=114 us |
bogdanm | 0:9b334a45a8ff | 635 | * @arg HRTIM_CALIBRATIONRATE_14: Periodic DLL calibration. T=14 us |
bogdanm | 0:9b334a45a8ff | 636 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 637 | * @note This function locks the HRTIM instance. HRTIM instance is unlocked |
bogdanm | 0:9b334a45a8ff | 638 | * within the HAL_HRTIM_PollForDLLCalibration function, just before |
bogdanm | 0:9b334a45a8ff | 639 | * exiting the function. |
bogdanm | 0:9b334a45a8ff | 640 | */ |
bogdanm | 0:9b334a45a8ff | 641 | HAL_StatusTypeDef HAL_HRTIM_DLLCalibrationStart(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 642 | uint32_t CalibrationRate) |
bogdanm | 0:9b334a45a8ff | 643 | { |
bogdanm | 0:9b334a45a8ff | 644 | uint32_t hrtim_dllcr; |
bogdanm | 0:9b334a45a8ff | 645 | |
bogdanm | 0:9b334a45a8ff | 646 | /* Check the parameters */ |
bogdanm | 0:9b334a45a8ff | 647 | assert_param(IS_HRTIM_CALIBRATIONRATE(CalibrationRate)); |
bogdanm | 0:9b334a45a8ff | 648 | |
bogdanm | 0:9b334a45a8ff | 649 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 650 | __HAL_LOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 651 | |
bogdanm | 0:9b334a45a8ff | 652 | hhrtim->State = HAL_HRTIM_STATE_BUSY; |
bogdanm | 0:9b334a45a8ff | 653 | |
bogdanm | 0:9b334a45a8ff | 654 | /* Configure DLL Calibration */ |
bogdanm | 0:9b334a45a8ff | 655 | hrtim_dllcr = hhrtim->Instance->sCommonRegs.DLLCR; |
bogdanm | 0:9b334a45a8ff | 656 | |
bogdanm | 0:9b334a45a8ff | 657 | if (CalibrationRate == HRTIM_SINGLE_CALIBRATION) |
bogdanm | 0:9b334a45a8ff | 658 | { |
bogdanm | 0:9b334a45a8ff | 659 | /* One shot DLL calibration */ |
bogdanm | 0:9b334a45a8ff | 660 | hrtim_dllcr &= ~(HRTIM_DLLCR_CALEN); |
bogdanm | 0:9b334a45a8ff | 661 | hrtim_dllcr |= HRTIM_DLLCR_CAL; |
bogdanm | 0:9b334a45a8ff | 662 | } |
bogdanm | 0:9b334a45a8ff | 663 | else |
bogdanm | 0:9b334a45a8ff | 664 | { |
bogdanm | 0:9b334a45a8ff | 665 | /* Periodic DLL calibration */ |
bogdanm | 0:9b334a45a8ff | 666 | hrtim_dllcr &= ~(HRTIM_DLLCR_CALRTE | HRTIM_DLLCR_CAL); |
bogdanm | 0:9b334a45a8ff | 667 | hrtim_dllcr |= (CalibrationRate | HRTIM_DLLCR_CALEN); |
bogdanm | 0:9b334a45a8ff | 668 | } |
bogdanm | 0:9b334a45a8ff | 669 | |
bogdanm | 0:9b334a45a8ff | 670 | /* Update HRTIM register */ |
bogdanm | 0:9b334a45a8ff | 671 | hhrtim->Instance->sCommonRegs.DLLCR = hrtim_dllcr; |
bogdanm | 0:9b334a45a8ff | 672 | |
bogdanm | 0:9b334a45a8ff | 673 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 674 | } |
bogdanm | 0:9b334a45a8ff | 675 | |
bogdanm | 0:9b334a45a8ff | 676 | /** |
bogdanm | 0:9b334a45a8ff | 677 | * @brief Starts the DLL calibration |
bogdanm | 0:9b334a45a8ff | 678 | * DLL ready interrupt is enabled |
bogdanm | 0:9b334a45a8ff | 679 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 680 | * @param CalibrationRate: DLL calibration period |
bogdanm | 0:9b334a45a8ff | 681 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 682 | * @arg HRTIM_SINGLE_CALIBRATION: One shot DLL calibration |
bogdanm | 0:9b334a45a8ff | 683 | * @arg HRTIM_CALIBRATIONRATE_7300: Periodic DLL calibration. T=7.3 ms |
bogdanm | 0:9b334a45a8ff | 684 | * @arg HRTIM_CALIBRATIONRATE_910: Periodic DLL calibration. T=910 us |
bogdanm | 0:9b334a45a8ff | 685 | * @arg HRTIM_CALIBRATIONRATE_114: Periodic DLL calibration. T=114 us |
bogdanm | 0:9b334a45a8ff | 686 | * @arg HRTIM_CALIBRATIONRATE_14: Periodic DLL calibration. T=14 us |
bogdanm | 0:9b334a45a8ff | 687 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 688 | * @note This function locks the HRTIM instance. HRTIM instance is unlocked |
bogdanm | 0:9b334a45a8ff | 689 | * within the IRQ processing function when processing the DLL ready |
bogdanm | 0:9b334a45a8ff | 690 | * interrupt. |
bogdanm | 0:9b334a45a8ff | 691 | * @note If this function is called for periodic calibration, the DLLRDY |
bogdanm | 0:9b334a45a8ff | 692 | * interrupt is generated every time the calibration completes which |
bogdanm | 0:9b334a45a8ff | 693 | * will significantly increases the overall interrupt rate. |
bogdanm | 0:9b334a45a8ff | 694 | */ |
bogdanm | 0:9b334a45a8ff | 695 | HAL_StatusTypeDef HAL_HRTIM_DLLCalibrationStart_IT(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 696 | uint32_t CalibrationRate) |
bogdanm | 0:9b334a45a8ff | 697 | { |
bogdanm | 0:9b334a45a8ff | 698 | uint32_t hrtim_dllcr; |
bogdanm | 0:9b334a45a8ff | 699 | |
bogdanm | 0:9b334a45a8ff | 700 | /* Check the parameters */ |
bogdanm | 0:9b334a45a8ff | 701 | assert_param(IS_HRTIM_CALIBRATIONRATE(CalibrationRate)); |
bogdanm | 0:9b334a45a8ff | 702 | |
bogdanm | 0:9b334a45a8ff | 703 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 704 | __HAL_LOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 705 | |
bogdanm | 0:9b334a45a8ff | 706 | hhrtim->State = HAL_HRTIM_STATE_BUSY; |
bogdanm | 0:9b334a45a8ff | 707 | |
bogdanm | 0:9b334a45a8ff | 708 | /* Enable DLL Ready interrupt flag */ |
bogdanm | 0:9b334a45a8ff | 709 | __HAL_HRTIM_ENABLE_IT(hhrtim, HRTIM_IT_DLLRDY); |
bogdanm | 0:9b334a45a8ff | 710 | |
bogdanm | 0:9b334a45a8ff | 711 | /* Configure DLL Calibration */ |
bogdanm | 0:9b334a45a8ff | 712 | hrtim_dllcr = hhrtim->Instance->sCommonRegs.DLLCR; |
bogdanm | 0:9b334a45a8ff | 713 | |
bogdanm | 0:9b334a45a8ff | 714 | if (CalibrationRate == HRTIM_SINGLE_CALIBRATION) |
bogdanm | 0:9b334a45a8ff | 715 | { |
bogdanm | 0:9b334a45a8ff | 716 | /* One shot DLL calibration */ |
bogdanm | 0:9b334a45a8ff | 717 | hrtim_dllcr &= ~(HRTIM_DLLCR_CALEN); |
bogdanm | 0:9b334a45a8ff | 718 | hrtim_dllcr |= HRTIM_DLLCR_CAL; |
bogdanm | 0:9b334a45a8ff | 719 | } |
bogdanm | 0:9b334a45a8ff | 720 | else |
bogdanm | 0:9b334a45a8ff | 721 | { |
bogdanm | 0:9b334a45a8ff | 722 | /* Periodic DLL calibration */ |
bogdanm | 0:9b334a45a8ff | 723 | hrtim_dllcr &= ~(HRTIM_DLLCR_CALRTE | HRTIM_DLLCR_CAL); |
bogdanm | 0:9b334a45a8ff | 724 | hrtim_dllcr |= (CalibrationRate | HRTIM_DLLCR_CALEN); |
bogdanm | 0:9b334a45a8ff | 725 | } |
bogdanm | 0:9b334a45a8ff | 726 | |
bogdanm | 0:9b334a45a8ff | 727 | /* Update HRTIM register */ |
bogdanm | 0:9b334a45a8ff | 728 | hhrtim->Instance->sCommonRegs.DLLCR = hrtim_dllcr; |
bogdanm | 0:9b334a45a8ff | 729 | |
bogdanm | 0:9b334a45a8ff | 730 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 731 | } |
bogdanm | 0:9b334a45a8ff | 732 | |
bogdanm | 0:9b334a45a8ff | 733 | /** |
bogdanm | 0:9b334a45a8ff | 734 | * @brief Polls the DLL calibration ready flag and returns when the flag is |
bogdanm | 0:9b334a45a8ff | 735 | * set (DLL calibration completed) or upon timeout expiration |
bogdanm | 0:9b334a45a8ff | 736 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 737 | * @param Timeout: Timeout duration in millisecond |
bogdanm | 0:9b334a45a8ff | 738 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 739 | */ |
bogdanm | 0:9b334a45a8ff | 740 | HAL_StatusTypeDef HAL_HRTIM_PollForDLLCalibration(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 741 | uint32_t Timeout) |
bogdanm | 0:9b334a45a8ff | 742 | { |
bogdanm | 0:9b334a45a8ff | 743 | uint32_t tickstart=0; |
bogdanm | 0:9b334a45a8ff | 744 | |
bogdanm | 0:9b334a45a8ff | 745 | tickstart = HAL_GetTick(); |
bogdanm | 0:9b334a45a8ff | 746 | |
bogdanm | 0:9b334a45a8ff | 747 | /* Check End of conversion flag */ |
bogdanm | 0:9b334a45a8ff | 748 | while(__HAL_HRTIM_GET_FLAG(hhrtim, HRTIM_IT_DLLRDY) == RESET) |
bogdanm | 0:9b334a45a8ff | 749 | { |
bogdanm | 0:9b334a45a8ff | 750 | if (Timeout != HAL_MAX_DELAY) |
bogdanm | 0:9b334a45a8ff | 751 | { |
bogdanm | 0:9b334a45a8ff | 752 | if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout)) |
bogdanm | 0:9b334a45a8ff | 753 | { |
bogdanm | 0:9b334a45a8ff | 754 | hhrtim->State = HAL_HRTIM_STATE_ERROR; |
bogdanm | 0:9b334a45a8ff | 755 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 756 | } |
bogdanm | 0:9b334a45a8ff | 757 | } |
bogdanm | 0:9b334a45a8ff | 758 | } |
bogdanm | 0:9b334a45a8ff | 759 | |
bogdanm | 0:9b334a45a8ff | 760 | /* Set HRTIM State */ |
bogdanm | 0:9b334a45a8ff | 761 | hhrtim->State = HAL_HRTIM_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 762 | |
bogdanm | 0:9b334a45a8ff | 763 | /* Process unlocked */ |
bogdanm | 0:9b334a45a8ff | 764 | __HAL_UNLOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 765 | |
bogdanm | 0:9b334a45a8ff | 766 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 767 | } |
bogdanm | 0:9b334a45a8ff | 768 | |
bogdanm | 0:9b334a45a8ff | 769 | /** |
bogdanm | 0:9b334a45a8ff | 770 | * @brief Configures the time base unit of a timer |
bogdanm | 0:9b334a45a8ff | 771 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 772 | * @param TimerIdx: Timer index |
bogdanm | 0:9b334a45a8ff | 773 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 774 | * @arg HRTIM_TIMERINDEX_MASTER for master timer |
bogdanm | 0:9b334a45a8ff | 775 | * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
bogdanm | 0:9b334a45a8ff | 776 | * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
bogdanm | 0:9b334a45a8ff | 777 | * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
bogdanm | 0:9b334a45a8ff | 778 | * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
bogdanm | 0:9b334a45a8ff | 779 | * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
bogdanm | 0:9b334a45a8ff | 780 | * @param pTimeBaseCfg: pointer to the time base configuration structure |
bogdanm | 0:9b334a45a8ff | 781 | * @note This function must be called prior starting the timer |
bogdanm | 0:9b334a45a8ff | 782 | * @note The time-base unit initialization parameters specify: |
bogdanm | 0:9b334a45a8ff | 783 | * The timer counter operating mode (continuous, one shot) |
bogdanm | 0:9b334a45a8ff | 784 | * The timer clock prescaler |
bogdanm | 0:9b334a45a8ff | 785 | * The timer period |
bogdanm | 0:9b334a45a8ff | 786 | * The timer repetition counter. |
bogdanm | 0:9b334a45a8ff | 787 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 788 | */ |
bogdanm | 0:9b334a45a8ff | 789 | HAL_StatusTypeDef HAL_HRTIM_TimeBaseConfig(HRTIM_HandleTypeDef *hhrtim, |
bogdanm | 0:9b334a45a8ff | 790 | uint32_t TimerIdx, |
bogdanm | 0:9b334a45a8ff | 791 | HRTIM_TimeBaseCfgTypeDef * pTimeBaseCfg) |
bogdanm | 0:9b334a45a8ff | 792 | { |
bogdanm | 0:9b334a45a8ff | 793 | /* Check the parameters */ |
bogdanm | 0:9b334a45a8ff | 794 | assert_param(IS_HRTIM_TIMERINDEX(TimerIdx)); |
bogdanm | 0:9b334a45a8ff | 795 | assert_param(IS_HRTIM_PRESCALERRATIO(pTimeBaseCfg->PrescalerRatio)); |
bogdanm | 0:9b334a45a8ff | 796 | assert_param(IS_HRTIM_MODE(pTimeBaseCfg->Mode)); |
bogdanm | 0:9b334a45a8ff | 797 | |
bogdanm | 0:9b334a45a8ff | 798 | if(hhrtim->State == HAL_HRTIM_STATE_BUSY) |
bogdanm | 0:9b334a45a8ff | 799 | { |
bogdanm | 0:9b334a45a8ff | 800 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 801 | } |
bogdanm | 0:9b334a45a8ff | 802 | |
bogdanm | 0:9b334a45a8ff | 803 | /* Set the HRTIM state */ |
bogdanm | 0:9b334a45a8ff | 804 | hhrtim->State = HAL_HRTIM_STATE_BUSY; |
bogdanm | 0:9b334a45a8ff | 805 | |
bogdanm | 0:9b334a45a8ff | 806 | if (TimerIdx == HRTIM_TIMERINDEX_MASTER) |
bogdanm | 0:9b334a45a8ff | 807 | { |
bogdanm | 0:9b334a45a8ff | 808 | /* Configure master timer time base unit */ |
bogdanm | 0:9b334a45a8ff | 809 | HRTIM_MasterBase_Config(hhrtim, pTimeBaseCfg); |
bogdanm | 0:9b334a45a8ff | 810 | } |
bogdanm | 0:9b334a45a8ff | 811 | else |
bogdanm | 0:9b334a45a8ff | 812 | { |
bogdanm | 0:9b334a45a8ff | 813 | /* Configure timing unit time base unit */ |
bogdanm | 0:9b334a45a8ff | 814 | HRTIM_TimingUnitBase_Config(hhrtim, TimerIdx, pTimeBaseCfg); |
bogdanm | 0:9b334a45a8ff | 815 | } |
bogdanm | 0:9b334a45a8ff | 816 | |
bogdanm | 0:9b334a45a8ff | 817 | /* Set HRTIM state */ |
bogdanm | 0:9b334a45a8ff | 818 | hhrtim->State = HAL_HRTIM_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 819 | |
bogdanm | 0:9b334a45a8ff | 820 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 821 | } |
bogdanm | 0:9b334a45a8ff | 822 | |
bogdanm | 0:9b334a45a8ff | 823 | /** |
bogdanm | 0:9b334a45a8ff | 824 | * @} |
bogdanm | 0:9b334a45a8ff | 825 | */ |
bogdanm | 0:9b334a45a8ff | 826 | |
bogdanm | 0:9b334a45a8ff | 827 | /** @defgroup HRTIM_Exported_Functions_Group2 Simple time base mode functions |
bogdanm | 0:9b334a45a8ff | 828 | * @brief When à HRTIM timer operates in simple time base mode, the |
bogdanm | 0:9b334a45a8ff | 829 | * timer counter counts from 0 to the period value. |
bogdanm | 0:9b334a45a8ff | 830 | * |
bogdanm | 0:9b334a45a8ff | 831 | @verbatim |
bogdanm | 0:9b334a45a8ff | 832 | =============================================================================== |
bogdanm | 0:9b334a45a8ff | 833 | ##### Simple time base mode functions ##### |
bogdanm | 0:9b334a45a8ff | 834 | =============================================================================== |
bogdanm | 0:9b334a45a8ff | 835 | [..] This section provides functions allowing to: |
bogdanm | 0:9b334a45a8ff | 836 | (+) Start simple time base |
bogdanm | 0:9b334a45a8ff | 837 | (+) Stop simple time base |
bogdanm | 0:9b334a45a8ff | 838 | (+) Start simple time base and enable interrupt |
bogdanm | 0:9b334a45a8ff | 839 | (+) Stop simple time base and disable interrupt |
bogdanm | 0:9b334a45a8ff | 840 | (+) Start simple time base and enable DMA transfer |
bogdanm | 0:9b334a45a8ff | 841 | (+) Stop simple time base and disable DMA transfer |
bogdanm | 0:9b334a45a8ff | 842 | |
bogdanm | 0:9b334a45a8ff | 843 | @endverbatim |
bogdanm | 0:9b334a45a8ff | 844 | * @{ |
bogdanm | 0:9b334a45a8ff | 845 | */ |
bogdanm | 0:9b334a45a8ff | 846 | |
bogdanm | 0:9b334a45a8ff | 847 | /** |
bogdanm | 0:9b334a45a8ff | 848 | * @brief Starts the counter of a timer operating in basic time base mode |
bogdanm | 0:9b334a45a8ff | 849 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 850 | * @param TimerIdx: Timer index |
bogdanm | 0:9b334a45a8ff | 851 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 852 | * @arg HRTIM_TIMERINDEX_MASTER for master timer |
bogdanm | 0:9b334a45a8ff | 853 | * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
bogdanm | 0:9b334a45a8ff | 854 | * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
bogdanm | 0:9b334a45a8ff | 855 | * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
bogdanm | 0:9b334a45a8ff | 856 | * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
bogdanm | 0:9b334a45a8ff | 857 | * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
bogdanm | 0:9b334a45a8ff | 858 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 859 | */ |
bogdanm | 0:9b334a45a8ff | 860 | HAL_StatusTypeDef HAL_HRTIM_SimpleBaseStart(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 861 | uint32_t TimerIdx) |
bogdanm | 0:9b334a45a8ff | 862 | { |
bogdanm | 0:9b334a45a8ff | 863 | /* Check the parameters */ |
bogdanm | 0:9b334a45a8ff | 864 | assert_param(IS_HRTIM_TIMERINDEX(TimerIdx)); |
bogdanm | 0:9b334a45a8ff | 865 | |
bogdanm | 0:9b334a45a8ff | 866 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 867 | __HAL_LOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 868 | |
bogdanm | 0:9b334a45a8ff | 869 | hhrtim->State = HAL_HRTIM_STATE_BUSY; |
bogdanm | 0:9b334a45a8ff | 870 | |
bogdanm | 0:9b334a45a8ff | 871 | /* Enable the timer counter */ |
bogdanm | 0:9b334a45a8ff | 872 | __HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]); |
bogdanm | 0:9b334a45a8ff | 873 | |
bogdanm | 0:9b334a45a8ff | 874 | hhrtim->State = HAL_HRTIM_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 875 | |
bogdanm | 0:9b334a45a8ff | 876 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 877 | __HAL_UNLOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 878 | |
bogdanm | 0:9b334a45a8ff | 879 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 880 | } |
bogdanm | 0:9b334a45a8ff | 881 | |
bogdanm | 0:9b334a45a8ff | 882 | /** |
bogdanm | 0:9b334a45a8ff | 883 | * @brief Stops the counter of a timer operating in basic time base mode |
bogdanm | 0:9b334a45a8ff | 884 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 885 | * @param TimerIdx: Timer index |
bogdanm | 0:9b334a45a8ff | 886 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 887 | * @arg HRTIM_TIMERINDEX_MASTER for master timer |
bogdanm | 0:9b334a45a8ff | 888 | * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
bogdanm | 0:9b334a45a8ff | 889 | * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
bogdanm | 0:9b334a45a8ff | 890 | * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
bogdanm | 0:9b334a45a8ff | 891 | * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
bogdanm | 0:9b334a45a8ff | 892 | * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
bogdanm | 0:9b334a45a8ff | 893 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 894 | */ |
bogdanm | 0:9b334a45a8ff | 895 | HAL_StatusTypeDef HAL_HRTIM_SimpleBaseStop(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 896 | uint32_t TimerIdx) |
bogdanm | 0:9b334a45a8ff | 897 | { |
bogdanm | 0:9b334a45a8ff | 898 | /* Check the parameters */ |
bogdanm | 0:9b334a45a8ff | 899 | assert_param(IS_HRTIM_TIMERINDEX(TimerIdx)); |
bogdanm | 0:9b334a45a8ff | 900 | |
bogdanm | 0:9b334a45a8ff | 901 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 902 | __HAL_LOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 903 | |
bogdanm | 0:9b334a45a8ff | 904 | hhrtim->State = HAL_HRTIM_STATE_BUSY; |
bogdanm | 0:9b334a45a8ff | 905 | |
bogdanm | 0:9b334a45a8ff | 906 | /* Disable the timer counter */ |
bogdanm | 0:9b334a45a8ff | 907 | __HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]); |
bogdanm | 0:9b334a45a8ff | 908 | |
bogdanm | 0:9b334a45a8ff | 909 | hhrtim->State = HAL_HRTIM_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 910 | |
bogdanm | 0:9b334a45a8ff | 911 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 912 | __HAL_UNLOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 913 | |
bogdanm | 0:9b334a45a8ff | 914 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 915 | } |
bogdanm | 0:9b334a45a8ff | 916 | |
bogdanm | 0:9b334a45a8ff | 917 | /** |
bogdanm | 0:9b334a45a8ff | 918 | * @brief Starts the counter of a timer operating in basic time base mode |
bogdanm | 0:9b334a45a8ff | 919 | * Timer repetition interrupt is enabled. |
bogdanm | 0:9b334a45a8ff | 920 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 921 | * @param TimerIdx: Timer index |
bogdanm | 0:9b334a45a8ff | 922 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 923 | * @arg HRTIM_TIMERINDEX_MASTER for master timer |
bogdanm | 0:9b334a45a8ff | 924 | * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
bogdanm | 0:9b334a45a8ff | 925 | * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
bogdanm | 0:9b334a45a8ff | 926 | * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
bogdanm | 0:9b334a45a8ff | 927 | * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
bogdanm | 0:9b334a45a8ff | 928 | * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
bogdanm | 0:9b334a45a8ff | 929 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 930 | */ |
bogdanm | 0:9b334a45a8ff | 931 | HAL_StatusTypeDef HAL_HRTIM_SimpleBaseStart_IT(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 932 | uint32_t TimerIdx) |
bogdanm | 0:9b334a45a8ff | 933 | { |
bogdanm | 0:9b334a45a8ff | 934 | /* Check the parameters */ |
bogdanm | 0:9b334a45a8ff | 935 | assert_param(IS_HRTIM_TIMERINDEX(TimerIdx)); |
bogdanm | 0:9b334a45a8ff | 936 | |
bogdanm | 0:9b334a45a8ff | 937 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 938 | __HAL_LOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 939 | |
bogdanm | 0:9b334a45a8ff | 940 | hhrtim->State = HAL_HRTIM_STATE_BUSY; |
bogdanm | 0:9b334a45a8ff | 941 | |
bogdanm | 0:9b334a45a8ff | 942 | /* Enable the repetition interrupt */ |
bogdanm | 0:9b334a45a8ff | 943 | if (TimerIdx == HRTIM_TIMERINDEX_MASTER) |
bogdanm | 0:9b334a45a8ff | 944 | { |
bogdanm | 0:9b334a45a8ff | 945 | __HAL_HRTIM_MASTER_ENABLE_IT(hhrtim, HRTIM_MASTER_IT_MREP); |
bogdanm | 0:9b334a45a8ff | 946 | } |
bogdanm | 0:9b334a45a8ff | 947 | else |
bogdanm | 0:9b334a45a8ff | 948 | { |
bogdanm | 0:9b334a45a8ff | 949 | __HAL_HRTIM_TIMER_ENABLE_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_REP); |
bogdanm | 0:9b334a45a8ff | 950 | } |
bogdanm | 0:9b334a45a8ff | 951 | |
bogdanm | 0:9b334a45a8ff | 952 | /* Enable the timer counter */ |
bogdanm | 0:9b334a45a8ff | 953 | __HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]); |
bogdanm | 0:9b334a45a8ff | 954 | |
bogdanm | 0:9b334a45a8ff | 955 | hhrtim->State = HAL_HRTIM_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 956 | |
bogdanm | 0:9b334a45a8ff | 957 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 958 | __HAL_UNLOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 959 | |
bogdanm | 0:9b334a45a8ff | 960 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 961 | } |
bogdanm | 0:9b334a45a8ff | 962 | |
bogdanm | 0:9b334a45a8ff | 963 | /** |
bogdanm | 0:9b334a45a8ff | 964 | * @brief Starts the counter of a timer operating in basic time base mode |
bogdanm | 0:9b334a45a8ff | 965 | * Timer repetition interrupt is disabled. |
bogdanm | 0:9b334a45a8ff | 966 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 967 | * @param TimerIdx: Timer index |
bogdanm | 0:9b334a45a8ff | 968 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 969 | * @arg HRTIM_TIMERINDEX_MASTER for master timer |
bogdanm | 0:9b334a45a8ff | 970 | * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
bogdanm | 0:9b334a45a8ff | 971 | * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
bogdanm | 0:9b334a45a8ff | 972 | * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
bogdanm | 0:9b334a45a8ff | 973 | * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
bogdanm | 0:9b334a45a8ff | 974 | * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
bogdanm | 0:9b334a45a8ff | 975 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 976 | */ |
bogdanm | 0:9b334a45a8ff | 977 | HAL_StatusTypeDef HAL_HRTIM_SimpleBaseStop_IT(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 978 | uint32_t TimerIdx) |
bogdanm | 0:9b334a45a8ff | 979 | { |
bogdanm | 0:9b334a45a8ff | 980 | /* Check the parameters */ |
bogdanm | 0:9b334a45a8ff | 981 | assert_param(IS_HRTIM_TIMERINDEX(TimerIdx)); |
bogdanm | 0:9b334a45a8ff | 982 | |
bogdanm | 0:9b334a45a8ff | 983 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 984 | __HAL_LOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 985 | |
bogdanm | 0:9b334a45a8ff | 986 | hhrtim->State = HAL_HRTIM_STATE_BUSY; |
bogdanm | 0:9b334a45a8ff | 987 | |
bogdanm | 0:9b334a45a8ff | 988 | /* Disable the repetition interrupt */ |
bogdanm | 0:9b334a45a8ff | 989 | if (TimerIdx == HRTIM_TIMERINDEX_MASTER) |
bogdanm | 0:9b334a45a8ff | 990 | { |
bogdanm | 0:9b334a45a8ff | 991 | __HAL_HRTIM_MASTER_DISABLE_IT(hhrtim, HRTIM_MASTER_IT_MREP); |
bogdanm | 0:9b334a45a8ff | 992 | } |
bogdanm | 0:9b334a45a8ff | 993 | else |
bogdanm | 0:9b334a45a8ff | 994 | { |
bogdanm | 0:9b334a45a8ff | 995 | __HAL_HRTIM_TIMER_DISABLE_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_REP); |
bogdanm | 0:9b334a45a8ff | 996 | } |
bogdanm | 0:9b334a45a8ff | 997 | |
bogdanm | 0:9b334a45a8ff | 998 | /* Disable the timer counter */ |
bogdanm | 0:9b334a45a8ff | 999 | __HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]); |
bogdanm | 0:9b334a45a8ff | 1000 | |
bogdanm | 0:9b334a45a8ff | 1001 | hhrtim->State = HAL_HRTIM_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 1002 | |
bogdanm | 0:9b334a45a8ff | 1003 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 1004 | __HAL_UNLOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 1005 | |
bogdanm | 0:9b334a45a8ff | 1006 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 1007 | } |
bogdanm | 0:9b334a45a8ff | 1008 | |
bogdanm | 0:9b334a45a8ff | 1009 | /** |
bogdanm | 0:9b334a45a8ff | 1010 | * @brief Starts the counter of a timer operating in basic time base mode |
bogdanm | 0:9b334a45a8ff | 1011 | * Timer repetition DMA request is enabled. |
bogdanm | 0:9b334a45a8ff | 1012 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 1013 | * @param TimerIdx: Timer index |
bogdanm | 0:9b334a45a8ff | 1014 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 1015 | * @arg HRTIM_TIMERINDEX_MASTER for master timer |
bogdanm | 0:9b334a45a8ff | 1016 | * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
bogdanm | 0:9b334a45a8ff | 1017 | * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
bogdanm | 0:9b334a45a8ff | 1018 | * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
bogdanm | 0:9b334a45a8ff | 1019 | * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
bogdanm | 0:9b334a45a8ff | 1020 | * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
bogdanm | 0:9b334a45a8ff | 1021 | * @param SrcAddr: DMA transfer source address |
bogdanm | 0:9b334a45a8ff | 1022 | * @param DestAddr: DMA transfer destination address |
bogdanm | 0:9b334a45a8ff | 1023 | * @param Length: The length of data items (data size) to be transferred |
bogdanm | 0:9b334a45a8ff | 1024 | * from source to destination |
bogdanm | 0:9b334a45a8ff | 1025 | */ |
bogdanm | 0:9b334a45a8ff | 1026 | HAL_StatusTypeDef HAL_HRTIM_SimpleBaseStart_DMA(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 1027 | uint32_t TimerIdx, |
bogdanm | 0:9b334a45a8ff | 1028 | uint32_t SrcAddr, |
bogdanm | 0:9b334a45a8ff | 1029 | uint32_t DestAddr, |
bogdanm | 0:9b334a45a8ff | 1030 | uint32_t Length) |
bogdanm | 0:9b334a45a8ff | 1031 | { |
bogdanm | 0:9b334a45a8ff | 1032 | DMA_HandleTypeDef * hdma; |
bogdanm | 0:9b334a45a8ff | 1033 | |
bogdanm | 0:9b334a45a8ff | 1034 | /* Check the parameters */ |
bogdanm | 0:9b334a45a8ff | 1035 | assert_param(IS_HRTIM_TIMERINDEX(TimerIdx)); |
bogdanm | 0:9b334a45a8ff | 1036 | |
bogdanm | 0:9b334a45a8ff | 1037 | if((hhrtim->State == HAL_HRTIM_STATE_BUSY)) |
bogdanm | 0:9b334a45a8ff | 1038 | { |
bogdanm | 0:9b334a45a8ff | 1039 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 1040 | } |
bogdanm | 0:9b334a45a8ff | 1041 | if((hhrtim->State == HAL_HRTIM_STATE_READY)) |
bogdanm | 0:9b334a45a8ff | 1042 | { |
bogdanm | 0:9b334a45a8ff | 1043 | if((SrcAddr == 0 ) || (DestAddr == 0 ) || (Length == 0)) |
bogdanm | 0:9b334a45a8ff | 1044 | { |
bogdanm | 0:9b334a45a8ff | 1045 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 1046 | } |
bogdanm | 0:9b334a45a8ff | 1047 | else |
bogdanm | 0:9b334a45a8ff | 1048 | { |
bogdanm | 0:9b334a45a8ff | 1049 | hhrtim->State = HAL_HRTIM_STATE_BUSY; |
bogdanm | 0:9b334a45a8ff | 1050 | } |
bogdanm | 0:9b334a45a8ff | 1051 | } |
bogdanm | 0:9b334a45a8ff | 1052 | |
bogdanm | 0:9b334a45a8ff | 1053 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 1054 | __HAL_LOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 1055 | |
bogdanm | 0:9b334a45a8ff | 1056 | /* Get the timer DMA handler */ |
bogdanm | 0:9b334a45a8ff | 1057 | hdma = HRTIM_GetDMAHandleFromTimerIdx(hhrtim, TimerIdx); |
bogdanm | 0:9b334a45a8ff | 1058 | |
bogdanm | 0:9b334a45a8ff | 1059 | /* Set the DMA transfer completed callback */ |
bogdanm | 0:9b334a45a8ff | 1060 | if (TimerIdx == HRTIM_TIMERINDEX_MASTER) |
bogdanm | 0:9b334a45a8ff | 1061 | { |
bogdanm | 0:9b334a45a8ff | 1062 | hdma->XferCpltCallback = HRTIM_DMAMasterCplt; |
bogdanm | 0:9b334a45a8ff | 1063 | } |
bogdanm | 0:9b334a45a8ff | 1064 | else |
bogdanm | 0:9b334a45a8ff | 1065 | { |
bogdanm | 0:9b334a45a8ff | 1066 | hdma->XferCpltCallback = HRTIM_DMATimerxCplt; |
bogdanm | 0:9b334a45a8ff | 1067 | } |
bogdanm | 0:9b334a45a8ff | 1068 | |
bogdanm | 0:9b334a45a8ff | 1069 | /* Set the DMA error callback */ |
bogdanm | 0:9b334a45a8ff | 1070 | hdma->XferErrorCallback = HRTIM_DMAError ; |
bogdanm | 0:9b334a45a8ff | 1071 | |
bogdanm | 0:9b334a45a8ff | 1072 | /* Enable the DMA channel */ |
bogdanm | 0:9b334a45a8ff | 1073 | HAL_DMA_Start_IT(hdma, SrcAddr, DestAddr, Length); |
bogdanm | 0:9b334a45a8ff | 1074 | |
bogdanm | 0:9b334a45a8ff | 1075 | /* Enable the timer repetition DMA request */ |
bogdanm | 0:9b334a45a8ff | 1076 | if (TimerIdx == HRTIM_TIMERINDEX_MASTER) |
bogdanm | 0:9b334a45a8ff | 1077 | { |
bogdanm | 0:9b334a45a8ff | 1078 | __HAL_HRTIM_MASTER_ENABLE_DMA(hhrtim, HRTIM_MASTER_DMA_MREP); |
bogdanm | 0:9b334a45a8ff | 1079 | } |
bogdanm | 0:9b334a45a8ff | 1080 | else |
bogdanm | 0:9b334a45a8ff | 1081 | { |
bogdanm | 0:9b334a45a8ff | 1082 | __HAL_HRTIM_TIMER_ENABLE_DMA(hhrtim, TimerIdx, HRTIM_TIM_DMA_REP); |
bogdanm | 0:9b334a45a8ff | 1083 | } |
bogdanm | 0:9b334a45a8ff | 1084 | |
bogdanm | 0:9b334a45a8ff | 1085 | /* Enable the timer counter */ |
bogdanm | 0:9b334a45a8ff | 1086 | __HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]); |
bogdanm | 0:9b334a45a8ff | 1087 | |
bogdanm | 0:9b334a45a8ff | 1088 | hhrtim->State = HAL_HRTIM_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 1089 | |
bogdanm | 0:9b334a45a8ff | 1090 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 1091 | __HAL_UNLOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 1092 | |
bogdanm | 0:9b334a45a8ff | 1093 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 1094 | } |
bogdanm | 0:9b334a45a8ff | 1095 | |
bogdanm | 0:9b334a45a8ff | 1096 | /** |
bogdanm | 0:9b334a45a8ff | 1097 | * @brief Starts the counter of a timer operating in basic time base mode |
bogdanm | 0:9b334a45a8ff | 1098 | * Timer repetition DMA request is disabled. |
bogdanm | 0:9b334a45a8ff | 1099 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 1100 | * @param TimerIdx: Timer index |
bogdanm | 0:9b334a45a8ff | 1101 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 1102 | * @arg HRTIM_TIMERINDEX_MASTER for master timer |
bogdanm | 0:9b334a45a8ff | 1103 | * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
bogdanm | 0:9b334a45a8ff | 1104 | * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
bogdanm | 0:9b334a45a8ff | 1105 | * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
bogdanm | 0:9b334a45a8ff | 1106 | * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
bogdanm | 0:9b334a45a8ff | 1107 | * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
bogdanm | 0:9b334a45a8ff | 1108 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 1109 | */ |
bogdanm | 0:9b334a45a8ff | 1110 | HAL_StatusTypeDef HAL_HRTIM_SimpleBaseStop_DMA(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 1111 | uint32_t TimerIdx) |
bogdanm | 0:9b334a45a8ff | 1112 | { |
bogdanm | 0:9b334a45a8ff | 1113 | DMA_HandleTypeDef * hdma; |
bogdanm | 0:9b334a45a8ff | 1114 | |
bogdanm | 0:9b334a45a8ff | 1115 | /* Check the parameters */ |
bogdanm | 0:9b334a45a8ff | 1116 | assert_param(IS_HRTIM_TIMERINDEX(TimerIdx)); |
bogdanm | 0:9b334a45a8ff | 1117 | |
bogdanm | 0:9b334a45a8ff | 1118 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 1119 | __HAL_LOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 1120 | |
bogdanm | 0:9b334a45a8ff | 1121 | if (TimerIdx == HRTIM_TIMERINDEX_MASTER) |
bogdanm | 0:9b334a45a8ff | 1122 | { |
bogdanm | 0:9b334a45a8ff | 1123 | /* Disable the DMA */ |
bogdanm | 0:9b334a45a8ff | 1124 | HAL_DMA_Abort(hhrtim->hdmaMaster); |
bogdanm | 0:9b334a45a8ff | 1125 | |
bogdanm | 0:9b334a45a8ff | 1126 | /* Disable the timer repetition DMA request */ |
bogdanm | 0:9b334a45a8ff | 1127 | __HAL_HRTIM_MASTER_DISABLE_DMA(hhrtim, HRTIM_MASTER_DMA_MREP); |
bogdanm | 0:9b334a45a8ff | 1128 | } |
bogdanm | 0:9b334a45a8ff | 1129 | else |
bogdanm | 0:9b334a45a8ff | 1130 | { |
bogdanm | 0:9b334a45a8ff | 1131 | /* Get the timer DMA handler */ |
bogdanm | 0:9b334a45a8ff | 1132 | hdma = HRTIM_GetDMAHandleFromTimerIdx(hhrtim, TimerIdx); |
bogdanm | 0:9b334a45a8ff | 1133 | |
bogdanm | 0:9b334a45a8ff | 1134 | /* Disable the DMA */ |
bogdanm | 0:9b334a45a8ff | 1135 | HAL_DMA_Abort(hdma); |
bogdanm | 0:9b334a45a8ff | 1136 | |
bogdanm | 0:9b334a45a8ff | 1137 | /* Disable the timer repetition DMA request */ |
bogdanm | 0:9b334a45a8ff | 1138 | __HAL_HRTIM_TIMER_DISABLE_DMA(hhrtim, TimerIdx, HRTIM_TIM_DMA_REP); |
bogdanm | 0:9b334a45a8ff | 1139 | } |
bogdanm | 0:9b334a45a8ff | 1140 | |
bogdanm | 0:9b334a45a8ff | 1141 | /* Disable the timer counter */ |
bogdanm | 0:9b334a45a8ff | 1142 | __HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]); |
bogdanm | 0:9b334a45a8ff | 1143 | |
bogdanm | 0:9b334a45a8ff | 1144 | hhrtim->State = HAL_HRTIM_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 1145 | |
bogdanm | 0:9b334a45a8ff | 1146 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 1147 | __HAL_UNLOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 1148 | |
bogdanm | 0:9b334a45a8ff | 1149 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 1150 | } |
bogdanm | 0:9b334a45a8ff | 1151 | |
bogdanm | 0:9b334a45a8ff | 1152 | /** |
bogdanm | 0:9b334a45a8ff | 1153 | * @} |
bogdanm | 0:9b334a45a8ff | 1154 | */ |
bogdanm | 0:9b334a45a8ff | 1155 | |
bogdanm | 0:9b334a45a8ff | 1156 | /** @defgroup HRTIM_Exported_Functions_Group3 Simple output compare mode functions |
bogdanm | 0:9b334a45a8ff | 1157 | * @brief When a HRTIM timer operates in simple output compare mode |
bogdanm | 0:9b334a45a8ff | 1158 | * the output level is set to a programmable value when a match |
bogdanm | 0:9b334a45a8ff | 1159 | * is found between the compare register and the counter. |
bogdanm | 0:9b334a45a8ff | 1160 | * Compare unit 1 is automatically associated to output 1 |
bogdanm | 0:9b334a45a8ff | 1161 | * Compare unit 2 is automatically associated to output 2 |
bogdanm | 0:9b334a45a8ff | 1162 | * |
bogdanm | 0:9b334a45a8ff | 1163 | @verbatim |
bogdanm | 0:9b334a45a8ff | 1164 | =============================================================================== |
bogdanm | 0:9b334a45a8ff | 1165 | ##### Simple output compare functions ##### |
bogdanm | 0:9b334a45a8ff | 1166 | =============================================================================== |
bogdanm | 0:9b334a45a8ff | 1167 | [..] This section provides functions allowing to: |
bogdanm | 0:9b334a45a8ff | 1168 | (+) Configure simple output channel |
bogdanm | 0:9b334a45a8ff | 1169 | (+) Start simple output compare |
bogdanm | 0:9b334a45a8ff | 1170 | (+) Stop simple output compare |
bogdanm | 0:9b334a45a8ff | 1171 | (+) Start simple output compare and enable interrupt |
bogdanm | 0:9b334a45a8ff | 1172 | (+) Stop simple output compare and disable interrupt |
bogdanm | 0:9b334a45a8ff | 1173 | (+) Start simple output compare and enable DMA transfer |
bogdanm | 0:9b334a45a8ff | 1174 | (+) Stop simple output compare and disable DMA transfer |
bogdanm | 0:9b334a45a8ff | 1175 | |
bogdanm | 0:9b334a45a8ff | 1176 | @endverbatim |
bogdanm | 0:9b334a45a8ff | 1177 | * @{ |
bogdanm | 0:9b334a45a8ff | 1178 | */ |
bogdanm | 0:9b334a45a8ff | 1179 | |
bogdanm | 0:9b334a45a8ff | 1180 | /** |
bogdanm | 0:9b334a45a8ff | 1181 | * @brief Configures an output in basic output compare mode |
bogdanm | 0:9b334a45a8ff | 1182 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 1183 | * @param TimerIdx: Timer index |
bogdanm | 0:9b334a45a8ff | 1184 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 1185 | * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
bogdanm | 0:9b334a45a8ff | 1186 | * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
bogdanm | 0:9b334a45a8ff | 1187 | * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
bogdanm | 0:9b334a45a8ff | 1188 | * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
bogdanm | 0:9b334a45a8ff | 1189 | * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
bogdanm | 0:9b334a45a8ff | 1190 | * @param OCChannel: Timer output |
bogdanm | 0:9b334a45a8ff | 1191 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 1192 | * @arg HRTIM_OUTPUT_TA1: Timer A - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 1193 | * @arg HRTIM_OUTPUT_TA2: Timer A - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 1194 | * @arg HRTIM_OUTPUT_TB1: Timer B - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 1195 | * @arg HRTIM_OUTPUT_TB2: Timer B - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 1196 | * @arg HRTIM_OUTPUT_TC1: Timer C - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 1197 | * @arg HRTIM_OUTPUT_TC2: Timer C - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 1198 | * @arg HRTIM_OUTPUT_TD1: Timer D - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 1199 | * @arg HRTIM_OUTPUT_TD2: Timer D - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 1200 | * @arg HRTIM_OUTPUT_TE1: Timer E - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 1201 | * @arg HRTIM_OUTPUT_TE2: Timer E - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 1202 | * @param pSimpleOCChannelCfg: pointer to the basic output compare output configuration structure |
bogdanm | 0:9b334a45a8ff | 1203 | * @note When the timer operates in basic output compare mode: |
bogdanm | 0:9b334a45a8ff | 1204 | * Output 1 is implicitely controled by the compare unit 1 |
bogdanm | 0:9b334a45a8ff | 1205 | * Output 2 is implicitely controled by the compare unit 2 |
bogdanm | 0:9b334a45a8ff | 1206 | * Output Set/Reset crossbar is set according to the selected output compare mode: |
bogdanm | 0:9b334a45a8ff | 1207 | * Toggle: SETxyR = RSTxyR = CMPy |
bogdanm | 0:9b334a45a8ff | 1208 | * Active: SETxyR = CMPy, RSTxyR = 0 |
bogdanm | 0:9b334a45a8ff | 1209 | * Inactive: SETxy =0, RSTxy = CMPy |
bogdanm | 0:9b334a45a8ff | 1210 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 1211 | */ |
bogdanm | 0:9b334a45a8ff | 1212 | HAL_StatusTypeDef HAL_HRTIM_SimpleOCChannelConfig(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 1213 | uint32_t TimerIdx, |
bogdanm | 0:9b334a45a8ff | 1214 | uint32_t OCChannel, |
bogdanm | 0:9b334a45a8ff | 1215 | HRTIM_SimpleOCChannelCfgTypeDef* pSimpleOCChannelCfg) |
bogdanm | 0:9b334a45a8ff | 1216 | { |
bogdanm | 0:9b334a45a8ff | 1217 | uint32_t CompareUnit = 0xFFFFFFFF; |
bogdanm | 0:9b334a45a8ff | 1218 | HRTIM_CompareCfgTypeDef CompareCfg; |
bogdanm | 0:9b334a45a8ff | 1219 | HRTIM_OutputCfgTypeDef OutputCfg; |
bogdanm | 0:9b334a45a8ff | 1220 | |
bogdanm | 0:9b334a45a8ff | 1221 | /* Check parameters */ |
bogdanm | 0:9b334a45a8ff | 1222 | assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OCChannel)); |
bogdanm | 0:9b334a45a8ff | 1223 | assert_param(IS_HRTIM_BASICOCMODE(pSimpleOCChannelCfg->Mode)); |
bogdanm | 0:9b334a45a8ff | 1224 | assert_param(IS_HRTIM_OUTPUTPOLARITY(pSimpleOCChannelCfg->Polarity)); |
bogdanm | 0:9b334a45a8ff | 1225 | assert_param(IS_HRTIM_OUTPUTIDLELEVEL(pSimpleOCChannelCfg->IdleLevel)); |
bogdanm | 0:9b334a45a8ff | 1226 | |
bogdanm | 0:9b334a45a8ff | 1227 | if(hhrtim->State == HAL_HRTIM_STATE_BUSY) |
bogdanm | 0:9b334a45a8ff | 1228 | { |
bogdanm | 0:9b334a45a8ff | 1229 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 1230 | } |
bogdanm | 0:9b334a45a8ff | 1231 | |
bogdanm | 0:9b334a45a8ff | 1232 | /* Set HRTIM state */ |
bogdanm | 0:9b334a45a8ff | 1233 | hhrtim->State = HAL_HRTIM_STATE_BUSY; |
bogdanm | 0:9b334a45a8ff | 1234 | |
bogdanm | 0:9b334a45a8ff | 1235 | /* Configure timer compare unit */ |
bogdanm | 0:9b334a45a8ff | 1236 | switch (OCChannel) |
bogdanm | 0:9b334a45a8ff | 1237 | { |
bogdanm | 0:9b334a45a8ff | 1238 | case HRTIM_OUTPUT_TA1: |
bogdanm | 0:9b334a45a8ff | 1239 | case HRTIM_OUTPUT_TB1: |
bogdanm | 0:9b334a45a8ff | 1240 | case HRTIM_OUTPUT_TC1: |
bogdanm | 0:9b334a45a8ff | 1241 | case HRTIM_OUTPUT_TD1: |
bogdanm | 0:9b334a45a8ff | 1242 | case HRTIM_OUTPUT_TE1: |
bogdanm | 0:9b334a45a8ff | 1243 | { |
bogdanm | 0:9b334a45a8ff | 1244 | CompareUnit = HRTIM_COMPAREUNIT_1; |
bogdanm | 0:9b334a45a8ff | 1245 | } |
bogdanm | 0:9b334a45a8ff | 1246 | break; |
bogdanm | 0:9b334a45a8ff | 1247 | case HRTIM_OUTPUT_TA2: |
bogdanm | 0:9b334a45a8ff | 1248 | case HRTIM_OUTPUT_TB2: |
bogdanm | 0:9b334a45a8ff | 1249 | case HRTIM_OUTPUT_TC2: |
bogdanm | 0:9b334a45a8ff | 1250 | case HRTIM_OUTPUT_TD2: |
bogdanm | 0:9b334a45a8ff | 1251 | case HRTIM_OUTPUT_TE2: |
bogdanm | 0:9b334a45a8ff | 1252 | { |
bogdanm | 0:9b334a45a8ff | 1253 | CompareUnit = HRTIM_COMPAREUNIT_2; |
bogdanm | 0:9b334a45a8ff | 1254 | } |
bogdanm | 0:9b334a45a8ff | 1255 | break; |
bogdanm | 0:9b334a45a8ff | 1256 | } |
bogdanm | 0:9b334a45a8ff | 1257 | |
bogdanm | 0:9b334a45a8ff | 1258 | CompareCfg.CompareValue = pSimpleOCChannelCfg->Pulse; |
bogdanm | 0:9b334a45a8ff | 1259 | CompareCfg.AutoDelayedMode = HRTIM_AUTODELAYEDMODE_REGULAR; |
bogdanm | 0:9b334a45a8ff | 1260 | CompareCfg.AutoDelayedTimeout = 0; |
bogdanm | 0:9b334a45a8ff | 1261 | |
bogdanm | 0:9b334a45a8ff | 1262 | HRTIM_CompareUnitConfig(hhrtim, |
bogdanm | 0:9b334a45a8ff | 1263 | TimerIdx, |
bogdanm | 0:9b334a45a8ff | 1264 | CompareUnit, |
bogdanm | 0:9b334a45a8ff | 1265 | &CompareCfg); |
bogdanm | 0:9b334a45a8ff | 1266 | |
bogdanm | 0:9b334a45a8ff | 1267 | /* Configure timer output */ |
bogdanm | 0:9b334a45a8ff | 1268 | OutputCfg.Polarity = pSimpleOCChannelCfg->Polarity; |
bogdanm | 0:9b334a45a8ff | 1269 | OutputCfg.IdleLevel = pSimpleOCChannelCfg->IdleLevel; |
bogdanm | 0:9b334a45a8ff | 1270 | OutputCfg.FaultLevel = HRTIM_OUTPUTFAULTLEVEL_NONE; |
bogdanm | 0:9b334a45a8ff | 1271 | OutputCfg.IdleMode = HRTIM_OUTPUTIDLEMODE_NONE; |
bogdanm | 0:9b334a45a8ff | 1272 | OutputCfg.ChopperModeEnable = HRTIM_OUTPUTCHOPPERMODE_DISABLED; |
bogdanm | 0:9b334a45a8ff | 1273 | OutputCfg.BurstModeEntryDelayed = HRTIM_OUTPUTBURSTMODEENTRY_REGULAR; |
bogdanm | 0:9b334a45a8ff | 1274 | |
bogdanm | 0:9b334a45a8ff | 1275 | switch (pSimpleOCChannelCfg->Mode) |
bogdanm | 0:9b334a45a8ff | 1276 | { |
bogdanm | 0:9b334a45a8ff | 1277 | case HRTIM_BASICOCMODE_TOGGLE: |
bogdanm | 0:9b334a45a8ff | 1278 | { |
bogdanm | 0:9b334a45a8ff | 1279 | if (CompareUnit == HRTIM_COMPAREUNIT_1) |
bogdanm | 0:9b334a45a8ff | 1280 | { |
bogdanm | 0:9b334a45a8ff | 1281 | OutputCfg.SetSource = HRTIM_OUTPUTSET_TIMCMP1; |
bogdanm | 0:9b334a45a8ff | 1282 | } |
bogdanm | 0:9b334a45a8ff | 1283 | else |
bogdanm | 0:9b334a45a8ff | 1284 | { |
bogdanm | 0:9b334a45a8ff | 1285 | OutputCfg.SetSource = HRTIM_OUTPUTSET_TIMCMP2; |
bogdanm | 0:9b334a45a8ff | 1286 | } |
bogdanm | 0:9b334a45a8ff | 1287 | OutputCfg.ResetSource = OutputCfg.SetSource; |
bogdanm | 0:9b334a45a8ff | 1288 | } |
bogdanm | 0:9b334a45a8ff | 1289 | break; |
bogdanm | 0:9b334a45a8ff | 1290 | case HRTIM_BASICOCMODE_ACTIVE: |
bogdanm | 0:9b334a45a8ff | 1291 | { |
bogdanm | 0:9b334a45a8ff | 1292 | if (CompareUnit == HRTIM_COMPAREUNIT_1) |
bogdanm | 0:9b334a45a8ff | 1293 | { |
bogdanm | 0:9b334a45a8ff | 1294 | OutputCfg.SetSource = HRTIM_OUTPUTSET_TIMCMP1; |
bogdanm | 0:9b334a45a8ff | 1295 | } |
bogdanm | 0:9b334a45a8ff | 1296 | else |
bogdanm | 0:9b334a45a8ff | 1297 | { |
bogdanm | 0:9b334a45a8ff | 1298 | OutputCfg.SetSource = HRTIM_OUTPUTSET_TIMCMP2; |
bogdanm | 0:9b334a45a8ff | 1299 | } |
bogdanm | 0:9b334a45a8ff | 1300 | OutputCfg.ResetSource = HRTIM_OUTPUTRESET_NONE; |
bogdanm | 0:9b334a45a8ff | 1301 | } |
bogdanm | 0:9b334a45a8ff | 1302 | break; |
bogdanm | 0:9b334a45a8ff | 1303 | case HRTIM_BASICOCMODE_INACTIVE: |
bogdanm | 0:9b334a45a8ff | 1304 | { |
bogdanm | 0:9b334a45a8ff | 1305 | if (CompareUnit == HRTIM_COMPAREUNIT_1) |
bogdanm | 0:9b334a45a8ff | 1306 | { |
bogdanm | 0:9b334a45a8ff | 1307 | OutputCfg.ResetSource = HRTIM_OUTPUTRESET_TIMCMP1; |
bogdanm | 0:9b334a45a8ff | 1308 | } |
bogdanm | 0:9b334a45a8ff | 1309 | else |
bogdanm | 0:9b334a45a8ff | 1310 | { |
bogdanm | 0:9b334a45a8ff | 1311 | OutputCfg.ResetSource = HRTIM_OUTPUTRESET_TIMCMP2; |
bogdanm | 0:9b334a45a8ff | 1312 | } |
bogdanm | 0:9b334a45a8ff | 1313 | OutputCfg.SetSource = HRTIM_OUTPUTSET_NONE; |
bogdanm | 0:9b334a45a8ff | 1314 | } |
bogdanm | 0:9b334a45a8ff | 1315 | break; |
bogdanm | 0:9b334a45a8ff | 1316 | } |
bogdanm | 0:9b334a45a8ff | 1317 | |
bogdanm | 0:9b334a45a8ff | 1318 | HRTIM_OutputConfig(hhrtim, |
bogdanm | 0:9b334a45a8ff | 1319 | TimerIdx, |
bogdanm | 0:9b334a45a8ff | 1320 | OCChannel, |
bogdanm | 0:9b334a45a8ff | 1321 | &OutputCfg); |
bogdanm | 0:9b334a45a8ff | 1322 | |
bogdanm | 0:9b334a45a8ff | 1323 | /* Set HRTIM state */ |
bogdanm | 0:9b334a45a8ff | 1324 | hhrtim->State = HAL_HRTIM_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 1325 | |
bogdanm | 0:9b334a45a8ff | 1326 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 1327 | } |
bogdanm | 0:9b334a45a8ff | 1328 | |
bogdanm | 0:9b334a45a8ff | 1329 | /** |
bogdanm | 0:9b334a45a8ff | 1330 | * @brief Starts the output compare signal generation on the designed timer output |
bogdanm | 0:9b334a45a8ff | 1331 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 1332 | * @param TimerIdx: Timer index |
bogdanm | 0:9b334a45a8ff | 1333 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 1334 | * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
bogdanm | 0:9b334a45a8ff | 1335 | * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
bogdanm | 0:9b334a45a8ff | 1336 | * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
bogdanm | 0:9b334a45a8ff | 1337 | * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
bogdanm | 0:9b334a45a8ff | 1338 | * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
bogdanm | 0:9b334a45a8ff | 1339 | * @param OCChannel: Timer output |
bogdanm | 0:9b334a45a8ff | 1340 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 1341 | * @arg HRTIM_OUTPUT_TA1: Timer A - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 1342 | * @arg HRTIM_OUTPUT_TA2: Timer A - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 1343 | * @arg HRTIM_OUTPUT_TB1: Timer B - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 1344 | * @arg HRTIM_OUTPUT_TB2: Timer B - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 1345 | * @arg HRTIM_OUTPUT_TC1: Timer C - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 1346 | * @arg HRTIM_OUTPUT_TC2: Timer C - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 1347 | * @arg HRTIM_OUTPUT_TD1: Timer D - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 1348 | * @arg HRTIM_OUTPUT_TD2: Timer D - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 1349 | * @arg HRTIM_OUTPUT_TE1: Timer E - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 1350 | * @arg HRTIM_OUTPUT_TE2: Timer E - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 1351 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 1352 | */ |
bogdanm | 0:9b334a45a8ff | 1353 | HAL_StatusTypeDef HAL_HRTIM_SimpleOCStart(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 1354 | uint32_t TimerIdx, |
bogdanm | 0:9b334a45a8ff | 1355 | uint32_t OCChannel) |
bogdanm | 0:9b334a45a8ff | 1356 | { |
bogdanm | 0:9b334a45a8ff | 1357 | /* Check the parameters */ |
bogdanm | 0:9b334a45a8ff | 1358 | assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OCChannel)); |
bogdanm | 0:9b334a45a8ff | 1359 | |
bogdanm | 0:9b334a45a8ff | 1360 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 1361 | __HAL_LOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 1362 | |
bogdanm | 0:9b334a45a8ff | 1363 | hhrtim->State = HAL_HRTIM_STATE_BUSY; |
bogdanm | 0:9b334a45a8ff | 1364 | |
bogdanm | 0:9b334a45a8ff | 1365 | /* Enable the timer output */ |
bogdanm | 0:9b334a45a8ff | 1366 | hhrtim->Instance->sCommonRegs.OENR |= OCChannel; |
bogdanm | 0:9b334a45a8ff | 1367 | |
bogdanm | 0:9b334a45a8ff | 1368 | /* Enable the timer counter */ |
bogdanm | 0:9b334a45a8ff | 1369 | __HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]); |
bogdanm | 0:9b334a45a8ff | 1370 | |
bogdanm | 0:9b334a45a8ff | 1371 | hhrtim->State = HAL_HRTIM_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 1372 | |
bogdanm | 0:9b334a45a8ff | 1373 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 1374 | __HAL_UNLOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 1375 | |
bogdanm | 0:9b334a45a8ff | 1376 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 1377 | } |
bogdanm | 0:9b334a45a8ff | 1378 | |
bogdanm | 0:9b334a45a8ff | 1379 | /** |
bogdanm | 0:9b334a45a8ff | 1380 | * @brief Stops the output compare signal generation on the designed timer output |
bogdanm | 0:9b334a45a8ff | 1381 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 1382 | * @param TimerIdx: Timer index |
bogdanm | 0:9b334a45a8ff | 1383 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 1384 | * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
bogdanm | 0:9b334a45a8ff | 1385 | * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
bogdanm | 0:9b334a45a8ff | 1386 | * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
bogdanm | 0:9b334a45a8ff | 1387 | * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
bogdanm | 0:9b334a45a8ff | 1388 | * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
bogdanm | 0:9b334a45a8ff | 1389 | * @param OCChannel: Timer output |
bogdanm | 0:9b334a45a8ff | 1390 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 1391 | * @arg HRTIM_OUTPUT_TA1: Timer A - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 1392 | * @arg HRTIM_OUTPUT_TA2: Timer A - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 1393 | * @arg HRTIM_OUTPUT_TB1: Timer B - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 1394 | * @arg HRTIM_OUTPUT_TB2: Timer B - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 1395 | * @arg HRTIM_OUTPUT_TC1: Timer C - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 1396 | * @arg HRTIM_OUTPUT_TC2: Timer C - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 1397 | * @arg HRTIM_OUTPUT_TD1: Timer D - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 1398 | * @arg HRTIM_OUTPUT_TD2: Timer D - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 1399 | * @arg HRTIM_OUTPUT_TE1: Timer E - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 1400 | * @arg HRTIM_OUTPUT_TE2: Timer E - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 1401 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 1402 | */ |
bogdanm | 0:9b334a45a8ff | 1403 | HAL_StatusTypeDef HAL_HRTIM_SimpleOCStop(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 1404 | uint32_t TimerIdx, |
bogdanm | 0:9b334a45a8ff | 1405 | uint32_t OCChannel) |
bogdanm | 0:9b334a45a8ff | 1406 | { |
bogdanm | 0:9b334a45a8ff | 1407 | /* Check the parameters */ |
bogdanm | 0:9b334a45a8ff | 1408 | assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OCChannel)); |
bogdanm | 0:9b334a45a8ff | 1409 | |
bogdanm | 0:9b334a45a8ff | 1410 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 1411 | __HAL_LOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 1412 | |
bogdanm | 0:9b334a45a8ff | 1413 | hhrtim->State = HAL_HRTIM_STATE_BUSY; |
bogdanm | 0:9b334a45a8ff | 1414 | |
bogdanm | 0:9b334a45a8ff | 1415 | /* Disable the timer output */ |
bogdanm | 0:9b334a45a8ff | 1416 | hhrtim->Instance->sCommonRegs.ODISR |= OCChannel; |
bogdanm | 0:9b334a45a8ff | 1417 | |
bogdanm | 0:9b334a45a8ff | 1418 | /* Disable the timer counter */ |
bogdanm | 0:9b334a45a8ff | 1419 | __HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]); |
bogdanm | 0:9b334a45a8ff | 1420 | |
bogdanm | 0:9b334a45a8ff | 1421 | hhrtim->State = HAL_HRTIM_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 1422 | |
bogdanm | 0:9b334a45a8ff | 1423 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 1424 | __HAL_UNLOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 1425 | |
bogdanm | 0:9b334a45a8ff | 1426 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 1427 | } |
bogdanm | 0:9b334a45a8ff | 1428 | |
bogdanm | 0:9b334a45a8ff | 1429 | /** |
bogdanm | 0:9b334a45a8ff | 1430 | * @brief Starts the output compare signal generation on the designed timer output |
bogdanm | 0:9b334a45a8ff | 1431 | * Interrupt is enabled (see note below) |
bogdanm | 0:9b334a45a8ff | 1432 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 1433 | * @param TimerIdx: Timer index |
bogdanm | 0:9b334a45a8ff | 1434 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 1435 | * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
bogdanm | 0:9b334a45a8ff | 1436 | * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
bogdanm | 0:9b334a45a8ff | 1437 | * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
bogdanm | 0:9b334a45a8ff | 1438 | * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
bogdanm | 0:9b334a45a8ff | 1439 | * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
bogdanm | 0:9b334a45a8ff | 1440 | * @param OCChannel: Timer output |
bogdanm | 0:9b334a45a8ff | 1441 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 1442 | * @arg HRTIM_OUTPUT_TA1: Timer A - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 1443 | * @arg HRTIM_OUTPUT_TA2: Timer A - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 1444 | * @arg HRTIM_OUTPUT_TB1: Timer B - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 1445 | * @arg HRTIM_OUTPUT_TB2: Timer B - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 1446 | * @arg HRTIM_OUTPUT_TC1: Timer C - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 1447 | * @arg HRTIM_OUTPUT_TC2: Timer C - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 1448 | * @arg HRTIM_OUTPUT_TD1: Timer D - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 1449 | * @arg HRTIM_OUTPUT_TD2: Timer D - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 1450 | * @arg HRTIM_OUTPUT_TE1: Timer E - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 1451 | * @arg HRTIM_OUTPUT_TE2: Timer E - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 1452 | * @note Interrupt enabling depends on the chosen output compare mode |
bogdanm | 0:9b334a45a8ff | 1453 | * Output toggle: compare match interrupt is enabled |
bogdanm | 0:9b334a45a8ff | 1454 | * Output set active: output set interrupt is enabled |
bogdanm | 0:9b334a45a8ff | 1455 | * Output set inactive: output reset interrupt is enabled |
bogdanm | 0:9b334a45a8ff | 1456 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 1457 | */ |
bogdanm | 0:9b334a45a8ff | 1458 | HAL_StatusTypeDef HAL_HRTIM_SimpleOCStart_IT(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 1459 | uint32_t TimerIdx, |
bogdanm | 0:9b334a45a8ff | 1460 | uint32_t OCChannel) |
bogdanm | 0:9b334a45a8ff | 1461 | { |
bogdanm | 0:9b334a45a8ff | 1462 | uint32_t interrupt; |
bogdanm | 0:9b334a45a8ff | 1463 | |
bogdanm | 0:9b334a45a8ff | 1464 | /* Check the parameters */ |
bogdanm | 0:9b334a45a8ff | 1465 | assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OCChannel)); |
bogdanm | 0:9b334a45a8ff | 1466 | |
bogdanm | 0:9b334a45a8ff | 1467 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 1468 | __HAL_LOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 1469 | |
bogdanm | 0:9b334a45a8ff | 1470 | hhrtim->State = HAL_HRTIM_STATE_BUSY; |
bogdanm | 0:9b334a45a8ff | 1471 | |
bogdanm | 0:9b334a45a8ff | 1472 | /* Get the interrupt to enable (depends on the output compare mode) */ |
bogdanm | 0:9b334a45a8ff | 1473 | interrupt = HRTIM_GetITFromOCMode(hhrtim, TimerIdx, OCChannel); |
bogdanm | 0:9b334a45a8ff | 1474 | |
bogdanm | 0:9b334a45a8ff | 1475 | /* Enable the timer output */ |
bogdanm | 0:9b334a45a8ff | 1476 | hhrtim->Instance->sCommonRegs.OENR |= OCChannel; |
bogdanm | 0:9b334a45a8ff | 1477 | |
bogdanm | 0:9b334a45a8ff | 1478 | /* Enable the timer interrupt (depends on the output compare mode) */ |
bogdanm | 0:9b334a45a8ff | 1479 | __HAL_HRTIM_TIMER_ENABLE_IT(hhrtim, TimerIdx, interrupt); |
bogdanm | 0:9b334a45a8ff | 1480 | |
bogdanm | 0:9b334a45a8ff | 1481 | /* Enable the timer counter */ |
bogdanm | 0:9b334a45a8ff | 1482 | __HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]); |
bogdanm | 0:9b334a45a8ff | 1483 | |
bogdanm | 0:9b334a45a8ff | 1484 | hhrtim->State = HAL_HRTIM_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 1485 | |
bogdanm | 0:9b334a45a8ff | 1486 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 1487 | __HAL_UNLOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 1488 | |
bogdanm | 0:9b334a45a8ff | 1489 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 1490 | } |
bogdanm | 0:9b334a45a8ff | 1491 | |
bogdanm | 0:9b334a45a8ff | 1492 | /** |
bogdanm | 0:9b334a45a8ff | 1493 | * @brief Stops the output compare signal generation on the designed timer output |
bogdanm | 0:9b334a45a8ff | 1494 | * Interrupt is disabled |
bogdanm | 0:9b334a45a8ff | 1495 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 1496 | * @param TimerIdx: Timer index |
bogdanm | 0:9b334a45a8ff | 1497 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 1498 | * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
bogdanm | 0:9b334a45a8ff | 1499 | * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
bogdanm | 0:9b334a45a8ff | 1500 | * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
bogdanm | 0:9b334a45a8ff | 1501 | * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
bogdanm | 0:9b334a45a8ff | 1502 | * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
bogdanm | 0:9b334a45a8ff | 1503 | * @param OCChannel: Timer output |
bogdanm | 0:9b334a45a8ff | 1504 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 1505 | * @arg HRTIM_OUTPUT_TA1: Timer A - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 1506 | * @arg HRTIM_OUTPUT_TA2: Timer A - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 1507 | * @arg HRTIM_OUTPUT_TB1: Timer B - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 1508 | * @arg HRTIM_OUTPUT_TB2: Timer B - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 1509 | * @arg HRTIM_OUTPUT_TC1: Timer C - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 1510 | * @arg HRTIM_OUTPUT_TC2: Timer C - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 1511 | * @arg HRTIM_OUTPUT_TD1: Timer D - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 1512 | * @arg HRTIM_OUTPUT_TD2: Timer D - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 1513 | * @arg HRTIM_OUTPUT_TE1: Timer E - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 1514 | * @arg HRTIM_OUTPUT_TE2: Timer E - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 1515 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 1516 | */ |
bogdanm | 0:9b334a45a8ff | 1517 | HAL_StatusTypeDef HAL_HRTIM_SimpleOCStop_IT(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 1518 | uint32_t TimerIdx, |
bogdanm | 0:9b334a45a8ff | 1519 | uint32_t OCChannel) |
bogdanm | 0:9b334a45a8ff | 1520 | { |
bogdanm | 0:9b334a45a8ff | 1521 | uint32_t interrupt; |
bogdanm | 0:9b334a45a8ff | 1522 | |
bogdanm | 0:9b334a45a8ff | 1523 | /* Check the parameters */ |
bogdanm | 0:9b334a45a8ff | 1524 | assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OCChannel)); |
bogdanm | 0:9b334a45a8ff | 1525 | |
bogdanm | 0:9b334a45a8ff | 1526 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 1527 | __HAL_LOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 1528 | |
bogdanm | 0:9b334a45a8ff | 1529 | hhrtim->State = HAL_HRTIM_STATE_BUSY; |
bogdanm | 0:9b334a45a8ff | 1530 | |
bogdanm | 0:9b334a45a8ff | 1531 | /* Disable the timer output */ |
bogdanm | 0:9b334a45a8ff | 1532 | hhrtim->Instance->sCommonRegs.ODISR |= OCChannel; |
bogdanm | 0:9b334a45a8ff | 1533 | |
bogdanm | 0:9b334a45a8ff | 1534 | /* Get the interrupt to disable (depends on the output compare mode) */ |
bogdanm | 0:9b334a45a8ff | 1535 | interrupt = HRTIM_GetITFromOCMode(hhrtim, TimerIdx, OCChannel); |
bogdanm | 0:9b334a45a8ff | 1536 | |
bogdanm | 0:9b334a45a8ff | 1537 | /* Disable the timer interrupt */ |
bogdanm | 0:9b334a45a8ff | 1538 | __HAL_HRTIM_TIMER_DISABLE_IT(hhrtim, TimerIdx, interrupt); |
bogdanm | 0:9b334a45a8ff | 1539 | |
bogdanm | 0:9b334a45a8ff | 1540 | /* Disable the timer counter */ |
bogdanm | 0:9b334a45a8ff | 1541 | __HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]); |
bogdanm | 0:9b334a45a8ff | 1542 | |
bogdanm | 0:9b334a45a8ff | 1543 | hhrtim->State = HAL_HRTIM_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 1544 | |
bogdanm | 0:9b334a45a8ff | 1545 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 1546 | __HAL_UNLOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 1547 | |
bogdanm | 0:9b334a45a8ff | 1548 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 1549 | } |
bogdanm | 0:9b334a45a8ff | 1550 | |
bogdanm | 0:9b334a45a8ff | 1551 | /** |
bogdanm | 0:9b334a45a8ff | 1552 | * @brief Starts the output compare signal generation on the designed timer output |
bogdanm | 0:9b334a45a8ff | 1553 | * DMA request is enabled (see note below) |
bogdanm | 0:9b334a45a8ff | 1554 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 1555 | * @param TimerIdx: Timer index |
bogdanm | 0:9b334a45a8ff | 1556 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 1557 | * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
bogdanm | 0:9b334a45a8ff | 1558 | * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
bogdanm | 0:9b334a45a8ff | 1559 | * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
bogdanm | 0:9b334a45a8ff | 1560 | * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
bogdanm | 0:9b334a45a8ff | 1561 | * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
bogdanm | 0:9b334a45a8ff | 1562 | * @param OCChannel: Timer output |
bogdanm | 0:9b334a45a8ff | 1563 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 1564 | * @arg HRTIM_OUTPUT_TA1: Timer A - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 1565 | * @arg HRTIM_OUTPUT_TA2: Timer A - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 1566 | * @arg HRTIM_OUTPUT_TB1: Timer B - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 1567 | * @arg HRTIM_OUTPUT_TB2: Timer B - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 1568 | * @arg HRTIM_OUTPUT_TC1: Timer C - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 1569 | * @arg HRTIM_OUTPUT_TC2: Timer C - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 1570 | * @arg HRTIM_OUTPUT_TD1: Timer D - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 1571 | * @arg HRTIM_OUTPUT_TD2: Timer D - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 1572 | * @arg HRTIM_OUTPUT_TE1: Timer E - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 1573 | * @arg HRTIM_OUTPUT_TE2: Timer E - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 1574 | * @param SrcAddr: DMA transfer source address |
bogdanm | 0:9b334a45a8ff | 1575 | * @param DestAddr: DMA transfer destination address |
bogdanm | 0:9b334a45a8ff | 1576 | * @param Length: The length of data items (data size) to be transferred |
bogdanm | 0:9b334a45a8ff | 1577 | * from source to destination |
bogdanm | 0:9b334a45a8ff | 1578 | * @note DMA request enabling depends on the chosen output compare mode |
bogdanm | 0:9b334a45a8ff | 1579 | * Output toggle: compare match DMA request is enabled |
bogdanm | 0:9b334a45a8ff | 1580 | * Output set active: output set DMA request is enabled |
bogdanm | 0:9b334a45a8ff | 1581 | * Output set inactive: output reset DMA request is enabled |
bogdanm | 0:9b334a45a8ff | 1582 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 1583 | */ |
bogdanm | 0:9b334a45a8ff | 1584 | HAL_StatusTypeDef HAL_HRTIM_SimpleOCStart_DMA(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 1585 | uint32_t TimerIdx, |
bogdanm | 0:9b334a45a8ff | 1586 | uint32_t OCChannel, |
bogdanm | 0:9b334a45a8ff | 1587 | uint32_t SrcAddr, |
bogdanm | 0:9b334a45a8ff | 1588 | uint32_t DestAddr, |
bogdanm | 0:9b334a45a8ff | 1589 | uint32_t Length) |
bogdanm | 0:9b334a45a8ff | 1590 | { |
bogdanm | 0:9b334a45a8ff | 1591 | DMA_HandleTypeDef * hdma; |
bogdanm | 0:9b334a45a8ff | 1592 | uint32_t dma_request; |
bogdanm | 0:9b334a45a8ff | 1593 | |
bogdanm | 0:9b334a45a8ff | 1594 | /* Check the parameters */ |
bogdanm | 0:9b334a45a8ff | 1595 | assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OCChannel)); |
bogdanm | 0:9b334a45a8ff | 1596 | |
bogdanm | 0:9b334a45a8ff | 1597 | if((hhrtim->State == HAL_HRTIM_STATE_BUSY)) |
bogdanm | 0:9b334a45a8ff | 1598 | { |
bogdanm | 0:9b334a45a8ff | 1599 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 1600 | } |
bogdanm | 0:9b334a45a8ff | 1601 | if((hhrtim->State == HAL_HRTIM_STATE_READY)) |
bogdanm | 0:9b334a45a8ff | 1602 | { |
bogdanm | 0:9b334a45a8ff | 1603 | if((SrcAddr == 0 ) || (DestAddr == 0 ) || (Length == 0)) |
bogdanm | 0:9b334a45a8ff | 1604 | { |
bogdanm | 0:9b334a45a8ff | 1605 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 1606 | } |
bogdanm | 0:9b334a45a8ff | 1607 | else |
bogdanm | 0:9b334a45a8ff | 1608 | { |
bogdanm | 0:9b334a45a8ff | 1609 | hhrtim->State = HAL_HRTIM_STATE_BUSY; |
bogdanm | 0:9b334a45a8ff | 1610 | } |
bogdanm | 0:9b334a45a8ff | 1611 | } |
bogdanm | 0:9b334a45a8ff | 1612 | |
bogdanm | 0:9b334a45a8ff | 1613 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 1614 | __HAL_LOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 1615 | |
bogdanm | 0:9b334a45a8ff | 1616 | /* Enable the timer output */ |
bogdanm | 0:9b334a45a8ff | 1617 | hhrtim->Instance->sCommonRegs.OENR |= OCChannel; |
bogdanm | 0:9b334a45a8ff | 1618 | |
bogdanm | 0:9b334a45a8ff | 1619 | /* Get the DMA request to enable */ |
bogdanm | 0:9b334a45a8ff | 1620 | dma_request = HRTIM_GetDMAFromOCMode(hhrtim, TimerIdx, OCChannel); |
bogdanm | 0:9b334a45a8ff | 1621 | |
bogdanm | 0:9b334a45a8ff | 1622 | /* Get the timer DMA handler */ |
bogdanm | 0:9b334a45a8ff | 1623 | hdma = HRTIM_GetDMAHandleFromTimerIdx(hhrtim, TimerIdx); |
bogdanm | 0:9b334a45a8ff | 1624 | |
bogdanm | 0:9b334a45a8ff | 1625 | /* Set the DMA error callback */ |
bogdanm | 0:9b334a45a8ff | 1626 | hdma->XferErrorCallback = HRTIM_DMAError ; |
bogdanm | 0:9b334a45a8ff | 1627 | |
bogdanm | 0:9b334a45a8ff | 1628 | /* Set the DMA transfer completed callback */ |
bogdanm | 0:9b334a45a8ff | 1629 | hdma->XferCpltCallback = HRTIM_DMATimerxCplt; |
bogdanm | 0:9b334a45a8ff | 1630 | |
bogdanm | 0:9b334a45a8ff | 1631 | /* Enable the DMA channel */ |
bogdanm | 0:9b334a45a8ff | 1632 | HAL_DMA_Start_IT(hdma, SrcAddr, DestAddr, Length); |
bogdanm | 0:9b334a45a8ff | 1633 | |
bogdanm | 0:9b334a45a8ff | 1634 | /* Enable the timer DMA request */ |
bogdanm | 0:9b334a45a8ff | 1635 | __HAL_HRTIM_TIMER_ENABLE_DMA(hhrtim, TimerIdx, dma_request); |
bogdanm | 0:9b334a45a8ff | 1636 | |
bogdanm | 0:9b334a45a8ff | 1637 | /* Enable the timer counter */ |
bogdanm | 0:9b334a45a8ff | 1638 | __HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]); |
bogdanm | 0:9b334a45a8ff | 1639 | |
bogdanm | 0:9b334a45a8ff | 1640 | hhrtim->State = HAL_HRTIM_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 1641 | |
bogdanm | 0:9b334a45a8ff | 1642 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 1643 | __HAL_UNLOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 1644 | |
bogdanm | 0:9b334a45a8ff | 1645 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 1646 | } |
bogdanm | 0:9b334a45a8ff | 1647 | |
bogdanm | 0:9b334a45a8ff | 1648 | /** |
bogdanm | 0:9b334a45a8ff | 1649 | * @brief Stops the output compare signal generation on the designed timer output |
bogdanm | 0:9b334a45a8ff | 1650 | * DMA request is disabled |
bogdanm | 0:9b334a45a8ff | 1651 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 1652 | * @param TimerIdx: Timer index |
bogdanm | 0:9b334a45a8ff | 1653 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 1654 | * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
bogdanm | 0:9b334a45a8ff | 1655 | * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
bogdanm | 0:9b334a45a8ff | 1656 | * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
bogdanm | 0:9b334a45a8ff | 1657 | * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
bogdanm | 0:9b334a45a8ff | 1658 | * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
bogdanm | 0:9b334a45a8ff | 1659 | * @param OCChannel: Timer output |
bogdanm | 0:9b334a45a8ff | 1660 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 1661 | * @arg HRTIM_OUTPUT_TA1: Timer A - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 1662 | * @arg HRTIM_OUTPUT_TA2: Timer A - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 1663 | * @arg HRTIM_OUTPUT_TB1: Timer B - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 1664 | * @arg HRTIM_OUTPUT_TB2: Timer B - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 1665 | * @arg HRTIM_OUTPUT_TC1: Timer C - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 1666 | * @arg HRTIM_OUTPUT_TC2: Timer C - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 1667 | * @arg HRTIM_OUTPUT_TD1: Timer D - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 1668 | * @arg HRTIM_OUTPUT_TD2: Timer D - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 1669 | * @arg HRTIM_OUTPUT_TE1: Timer E - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 1670 | * @arg HRTIM_OUTPUT_TE2: Timer E - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 1671 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 1672 | */ |
bogdanm | 0:9b334a45a8ff | 1673 | HAL_StatusTypeDef HAL_HRTIM_SimpleOCStop_DMA(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 1674 | uint32_t TimerIdx, |
bogdanm | 0:9b334a45a8ff | 1675 | uint32_t OCChannel) |
bogdanm | 0:9b334a45a8ff | 1676 | { |
bogdanm | 0:9b334a45a8ff | 1677 | DMA_HandleTypeDef * hdma; |
bogdanm | 0:9b334a45a8ff | 1678 | uint32_t dma_request; |
bogdanm | 0:9b334a45a8ff | 1679 | |
bogdanm | 0:9b334a45a8ff | 1680 | /* Check the parameters */ |
bogdanm | 0:9b334a45a8ff | 1681 | assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OCChannel)); |
bogdanm | 0:9b334a45a8ff | 1682 | |
bogdanm | 0:9b334a45a8ff | 1683 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 1684 | __HAL_LOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 1685 | |
bogdanm | 0:9b334a45a8ff | 1686 | hhrtim->State = HAL_HRTIM_STATE_BUSY; |
bogdanm | 0:9b334a45a8ff | 1687 | |
bogdanm | 0:9b334a45a8ff | 1688 | /* Disable the timer output */ |
bogdanm | 0:9b334a45a8ff | 1689 | hhrtim->Instance->sCommonRegs.ODISR |= OCChannel; |
bogdanm | 0:9b334a45a8ff | 1690 | |
bogdanm | 0:9b334a45a8ff | 1691 | /* Get the timer DMA handler */ |
bogdanm | 0:9b334a45a8ff | 1692 | hdma = HRTIM_GetDMAHandleFromTimerIdx(hhrtim, TimerIdx); |
bogdanm | 0:9b334a45a8ff | 1693 | |
bogdanm | 0:9b334a45a8ff | 1694 | /* Disable the DMA */ |
bogdanm | 0:9b334a45a8ff | 1695 | HAL_DMA_Abort(hdma); |
bogdanm | 0:9b334a45a8ff | 1696 | |
bogdanm | 0:9b334a45a8ff | 1697 | /* Get the DMA request to disable */ |
bogdanm | 0:9b334a45a8ff | 1698 | dma_request = HRTIM_GetDMAFromOCMode(hhrtim, TimerIdx, OCChannel); |
bogdanm | 0:9b334a45a8ff | 1699 | |
bogdanm | 0:9b334a45a8ff | 1700 | /* Disable the timer DMA request */ |
bogdanm | 0:9b334a45a8ff | 1701 | __HAL_HRTIM_TIMER_DISABLE_DMA(hhrtim, TimerIdx, dma_request); |
bogdanm | 0:9b334a45a8ff | 1702 | |
bogdanm | 0:9b334a45a8ff | 1703 | /* Disable the timer counter */ |
bogdanm | 0:9b334a45a8ff | 1704 | __HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]); |
bogdanm | 0:9b334a45a8ff | 1705 | |
bogdanm | 0:9b334a45a8ff | 1706 | hhrtim->State = HAL_HRTIM_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 1707 | |
bogdanm | 0:9b334a45a8ff | 1708 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 1709 | __HAL_UNLOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 1710 | |
bogdanm | 0:9b334a45a8ff | 1711 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 1712 | } |
bogdanm | 0:9b334a45a8ff | 1713 | |
bogdanm | 0:9b334a45a8ff | 1714 | /** |
bogdanm | 0:9b334a45a8ff | 1715 | * @} |
bogdanm | 0:9b334a45a8ff | 1716 | */ |
bogdanm | 0:9b334a45a8ff | 1717 | |
bogdanm | 0:9b334a45a8ff | 1718 | /** @defgroup HRTIM_Exported_Functions_Group4 Simple PWM output mode functions |
bogdanm | 0:9b334a45a8ff | 1719 | * @brief When a HRTIM timer operates in simple PWM output mode |
bogdanm | 0:9b334a45a8ff | 1720 | * the output level is set to a programmable value when a match is |
bogdanm | 0:9b334a45a8ff | 1721 | * found between the compare register and the counter and reset when |
bogdanm | 0:9b334a45a8ff | 1722 | * the timer period is reached. Duty cycle is determined by the |
bogdanm | 0:9b334a45a8ff | 1723 | * comparison value. |
bogdanm | 0:9b334a45a8ff | 1724 | * Compare unit 1 is automatically associated to output 1 |
bogdanm | 0:9b334a45a8ff | 1725 | * Compare unit 2 is automatically associated to output 2 |
bogdanm | 0:9b334a45a8ff | 1726 | * |
bogdanm | 0:9b334a45a8ff | 1727 | @verbatim |
bogdanm | 0:9b334a45a8ff | 1728 | =============================================================================== |
bogdanm | 0:9b334a45a8ff | 1729 | ##### Simple PWM output functions ##### |
bogdanm | 0:9b334a45a8ff | 1730 | =============================================================================== |
bogdanm | 0:9b334a45a8ff | 1731 | [..] This section provides functions allowing to: |
bogdanm | 0:9b334a45a8ff | 1732 | (+) Configure simple PWM output channel |
bogdanm | 0:9b334a45a8ff | 1733 | (+) Start simple PWM output |
bogdanm | 0:9b334a45a8ff | 1734 | (+) Stop simple PWM output |
bogdanm | 0:9b334a45a8ff | 1735 | (+) Start simple PWM output and enable interrupt |
bogdanm | 0:9b334a45a8ff | 1736 | (+) Stop simple PWM output and disable interrupt |
bogdanm | 0:9b334a45a8ff | 1737 | (+) Start simple PWM output and enable DMA transfer |
bogdanm | 0:9b334a45a8ff | 1738 | (+) Stop simple PWM output and disable DMA transfer |
bogdanm | 0:9b334a45a8ff | 1739 | |
bogdanm | 0:9b334a45a8ff | 1740 | @endverbatim |
bogdanm | 0:9b334a45a8ff | 1741 | * @{ |
bogdanm | 0:9b334a45a8ff | 1742 | */ |
bogdanm | 0:9b334a45a8ff | 1743 | |
bogdanm | 0:9b334a45a8ff | 1744 | /** |
bogdanm | 0:9b334a45a8ff | 1745 | * @brief Configures an output in basic PWM mode |
bogdanm | 0:9b334a45a8ff | 1746 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 1747 | * @param TimerIdx: Timer index |
bogdanm | 0:9b334a45a8ff | 1748 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 1749 | * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
bogdanm | 0:9b334a45a8ff | 1750 | * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
bogdanm | 0:9b334a45a8ff | 1751 | * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
bogdanm | 0:9b334a45a8ff | 1752 | * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
bogdanm | 0:9b334a45a8ff | 1753 | * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
bogdanm | 0:9b334a45a8ff | 1754 | * @param PWMChannel: Timer output |
bogdanm | 0:9b334a45a8ff | 1755 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 1756 | * @arg HRTIM_OUTPUT_TA1: Timer A - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 1757 | * @arg HRTIM_OUTPUT_TA2: Timer A - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 1758 | * @arg HRTIM_OUTPUT_TB1: Timer B - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 1759 | * @arg HRTIM_OUTPUT_TB2: Timer B - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 1760 | * @arg HRTIM_OUTPUT_TC1: Timer C - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 1761 | * @arg HRTIM_OUTPUT_TC2: Timer C - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 1762 | * @arg HRTIM_OUTPUT_TD1: Timer D - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 1763 | * @arg HRTIM_OUTPUT_TD2: Timer D - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 1764 | * @arg HRTIM_OUTPUT_TE1: Timer E - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 1765 | * @arg HRTIM_OUTPUT_TE2: Timer E - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 1766 | * @param pSimplePWMChannelCfg: pointer to the basic PWM output configuration structure |
bogdanm | 0:9b334a45a8ff | 1767 | * @note When the timer operates in basic PWM output mode: |
bogdanm | 0:9b334a45a8ff | 1768 | * Output 1 is implicitely controled by the compare unit 1 |
bogdanm | 0:9b334a45a8ff | 1769 | * Output 2 is implicitely controled by the compare unit 2 |
bogdanm | 0:9b334a45a8ff | 1770 | * Output Set/Reset crossbar is set as follows: |
bogdanm | 0:9b334a45a8ff | 1771 | * Ouput 1: SETx1R = CMP1, RSTx1R = PER |
bogdanm | 0:9b334a45a8ff | 1772 | * Output 2: SETx2R = CMP2, RST2R = PER |
bogdanm | 0:9b334a45a8ff | 1773 | * @note When Simple PWM mode is used the registers preload mechanism is |
bogdanm | 0:9b334a45a8ff | 1774 | * enabled (otherwise the behavior is not guaranteed). |
bogdanm | 0:9b334a45a8ff | 1775 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 1776 | */ |
bogdanm | 0:9b334a45a8ff | 1777 | HAL_StatusTypeDef HAL_HRTIM_SimplePWMChannelConfig(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 1778 | uint32_t TimerIdx, |
bogdanm | 0:9b334a45a8ff | 1779 | uint32_t PWMChannel, |
bogdanm | 0:9b334a45a8ff | 1780 | HRTIM_SimplePWMChannelCfgTypeDef* pSimplePWMChannelCfg) |
bogdanm | 0:9b334a45a8ff | 1781 | { |
bogdanm | 0:9b334a45a8ff | 1782 | uint32_t CompareUnit = 0xFFFFFFFF; |
bogdanm | 0:9b334a45a8ff | 1783 | HRTIM_CompareCfgTypeDef CompareCfg; |
bogdanm | 0:9b334a45a8ff | 1784 | HRTIM_OutputCfgTypeDef OutputCfg; |
bogdanm | 0:9b334a45a8ff | 1785 | uint32_t hrtim_timcr; |
bogdanm | 0:9b334a45a8ff | 1786 | |
bogdanm | 0:9b334a45a8ff | 1787 | /* Check parameters */ |
bogdanm | 0:9b334a45a8ff | 1788 | assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, PWMChannel)); |
bogdanm | 0:9b334a45a8ff | 1789 | assert_param(IS_HRTIM_OUTPUTPOLARITY(pSimplePWMChannelCfg->Polarity)); |
bogdanm | 0:9b334a45a8ff | 1790 | assert_param(IS_HRTIM_OUTPUTIDLELEVEL(pSimplePWMChannelCfg->IdleLevel)); |
bogdanm | 0:9b334a45a8ff | 1791 | |
bogdanm | 0:9b334a45a8ff | 1792 | if(hhrtim->State == HAL_HRTIM_STATE_BUSY) |
bogdanm | 0:9b334a45a8ff | 1793 | { |
bogdanm | 0:9b334a45a8ff | 1794 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 1795 | } |
bogdanm | 0:9b334a45a8ff | 1796 | |
bogdanm | 0:9b334a45a8ff | 1797 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 1798 | __HAL_LOCK(hhrtim); hhrtim->State = HAL_HRTIM_STATE_BUSY; |
bogdanm | 0:9b334a45a8ff | 1799 | |
bogdanm | 0:9b334a45a8ff | 1800 | /* Configure timer compare unit */ |
bogdanm | 0:9b334a45a8ff | 1801 | switch (PWMChannel) |
bogdanm | 0:9b334a45a8ff | 1802 | { |
bogdanm | 0:9b334a45a8ff | 1803 | case HRTIM_OUTPUT_TA1: |
bogdanm | 0:9b334a45a8ff | 1804 | case HRTIM_OUTPUT_TB1: |
bogdanm | 0:9b334a45a8ff | 1805 | case HRTIM_OUTPUT_TC1: |
bogdanm | 0:9b334a45a8ff | 1806 | case HRTIM_OUTPUT_TD1: |
bogdanm | 0:9b334a45a8ff | 1807 | case HRTIM_OUTPUT_TE1: |
bogdanm | 0:9b334a45a8ff | 1808 | { |
bogdanm | 0:9b334a45a8ff | 1809 | CompareUnit = HRTIM_COMPAREUNIT_1; |
bogdanm | 0:9b334a45a8ff | 1810 | } |
bogdanm | 0:9b334a45a8ff | 1811 | break; |
bogdanm | 0:9b334a45a8ff | 1812 | case HRTIM_OUTPUT_TA2: |
bogdanm | 0:9b334a45a8ff | 1813 | case HRTIM_OUTPUT_TB2: |
bogdanm | 0:9b334a45a8ff | 1814 | case HRTIM_OUTPUT_TC2: |
bogdanm | 0:9b334a45a8ff | 1815 | case HRTIM_OUTPUT_TD2: |
bogdanm | 0:9b334a45a8ff | 1816 | case HRTIM_OUTPUT_TE2: |
bogdanm | 0:9b334a45a8ff | 1817 | { |
bogdanm | 0:9b334a45a8ff | 1818 | CompareUnit = HRTIM_COMPAREUNIT_2; |
bogdanm | 0:9b334a45a8ff | 1819 | } |
bogdanm | 0:9b334a45a8ff | 1820 | break; |
bogdanm | 0:9b334a45a8ff | 1821 | } |
bogdanm | 0:9b334a45a8ff | 1822 | |
bogdanm | 0:9b334a45a8ff | 1823 | CompareCfg.CompareValue = pSimplePWMChannelCfg->Pulse; |
bogdanm | 0:9b334a45a8ff | 1824 | CompareCfg.AutoDelayedMode = HRTIM_AUTODELAYEDMODE_REGULAR; |
bogdanm | 0:9b334a45a8ff | 1825 | CompareCfg.AutoDelayedTimeout = 0; |
bogdanm | 0:9b334a45a8ff | 1826 | |
bogdanm | 0:9b334a45a8ff | 1827 | HRTIM_CompareUnitConfig(hhrtim, |
bogdanm | 0:9b334a45a8ff | 1828 | TimerIdx, |
bogdanm | 0:9b334a45a8ff | 1829 | CompareUnit, |
bogdanm | 0:9b334a45a8ff | 1830 | &CompareCfg); |
bogdanm | 0:9b334a45a8ff | 1831 | |
bogdanm | 0:9b334a45a8ff | 1832 | /* Configure timer output */ |
bogdanm | 0:9b334a45a8ff | 1833 | OutputCfg.Polarity = pSimplePWMChannelCfg->Polarity; |
bogdanm | 0:9b334a45a8ff | 1834 | OutputCfg.IdleLevel = pSimplePWMChannelCfg->IdleLevel; |
bogdanm | 0:9b334a45a8ff | 1835 | OutputCfg.FaultLevel = HRTIM_OUTPUTFAULTLEVEL_NONE; |
bogdanm | 0:9b334a45a8ff | 1836 | OutputCfg.IdleMode = HRTIM_OUTPUTIDLEMODE_NONE; |
bogdanm | 0:9b334a45a8ff | 1837 | OutputCfg.ChopperModeEnable = HRTIM_OUTPUTCHOPPERMODE_DISABLED; |
bogdanm | 0:9b334a45a8ff | 1838 | OutputCfg.BurstModeEntryDelayed = HRTIM_OUTPUTBURSTMODEENTRY_REGULAR; |
bogdanm | 0:9b334a45a8ff | 1839 | |
bogdanm | 0:9b334a45a8ff | 1840 | if (CompareUnit == HRTIM_COMPAREUNIT_1) |
bogdanm | 0:9b334a45a8ff | 1841 | { |
bogdanm | 0:9b334a45a8ff | 1842 | OutputCfg.SetSource = HRTIM_OUTPUTSET_TIMCMP1; |
bogdanm | 0:9b334a45a8ff | 1843 | } |
bogdanm | 0:9b334a45a8ff | 1844 | else |
bogdanm | 0:9b334a45a8ff | 1845 | { |
bogdanm | 0:9b334a45a8ff | 1846 | OutputCfg.SetSource = HRTIM_OUTPUTSET_TIMCMP2; |
bogdanm | 0:9b334a45a8ff | 1847 | } |
bogdanm | 0:9b334a45a8ff | 1848 | OutputCfg.ResetSource = HRTIM_OUTPUTSET_TIMPER; |
bogdanm | 0:9b334a45a8ff | 1849 | |
bogdanm | 0:9b334a45a8ff | 1850 | HRTIM_OutputConfig(hhrtim, |
bogdanm | 0:9b334a45a8ff | 1851 | TimerIdx, |
bogdanm | 0:9b334a45a8ff | 1852 | PWMChannel, |
bogdanm | 0:9b334a45a8ff | 1853 | &OutputCfg); |
bogdanm | 0:9b334a45a8ff | 1854 | |
bogdanm | 0:9b334a45a8ff | 1855 | /* Enable the registers preload mechanism */ |
bogdanm | 0:9b334a45a8ff | 1856 | hrtim_timcr = hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxCR; |
bogdanm | 0:9b334a45a8ff | 1857 | hrtim_timcr |= HRTIM_TIMCR_PREEN; |
bogdanm | 0:9b334a45a8ff | 1858 | hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxCR = hrtim_timcr; |
bogdanm | 0:9b334a45a8ff | 1859 | |
bogdanm | 0:9b334a45a8ff | 1860 | hhrtim->State = HAL_HRTIM_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 1861 | |
bogdanm | 0:9b334a45a8ff | 1862 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 1863 | __HAL_UNLOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 1864 | |
bogdanm | 0:9b334a45a8ff | 1865 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 1866 | } |
bogdanm | 0:9b334a45a8ff | 1867 | |
bogdanm | 0:9b334a45a8ff | 1868 | /** |
bogdanm | 0:9b334a45a8ff | 1869 | * @brief Starts the PWM output signal generation on the designed timer output |
bogdanm | 0:9b334a45a8ff | 1870 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 1871 | * @param TimerIdx: Timer index |
bogdanm | 0:9b334a45a8ff | 1872 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 1873 | * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
bogdanm | 0:9b334a45a8ff | 1874 | * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
bogdanm | 0:9b334a45a8ff | 1875 | * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
bogdanm | 0:9b334a45a8ff | 1876 | * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
bogdanm | 0:9b334a45a8ff | 1877 | * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
bogdanm | 0:9b334a45a8ff | 1878 | * @param PWMChannel: Timer output |
bogdanm | 0:9b334a45a8ff | 1879 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 1880 | * @arg HRTIM_OUTPUT_TA1: Timer A - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 1881 | * @arg HRTIM_OUTPUT_TA2: Timer A - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 1882 | * @arg HRTIM_OUTPUT_TB1: Timer B - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 1883 | * @arg HRTIM_OUTPUT_TB2: Timer B - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 1884 | * @arg HRTIM_OUTPUT_TC1: Timer C - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 1885 | * @arg HRTIM_OUTPUT_TC2: Timer C - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 1886 | * @arg HRTIM_OUTPUT_TD1: Timer D - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 1887 | * @arg HRTIM_OUTPUT_TD2: Timer D - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 1888 | * @arg HRTIM_OUTPUT_TE1: Timer E - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 1889 | * @arg HRTIM_OUTPUT_TE2: Timer E - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 1890 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 1891 | */ |
bogdanm | 0:9b334a45a8ff | 1892 | HAL_StatusTypeDef HAL_HRTIM_SimplePWMStart(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 1893 | uint32_t TimerIdx, |
bogdanm | 0:9b334a45a8ff | 1894 | uint32_t PWMChannel) |
bogdanm | 0:9b334a45a8ff | 1895 | { |
bogdanm | 0:9b334a45a8ff | 1896 | /* Check the parameters */ |
bogdanm | 0:9b334a45a8ff | 1897 | assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, PWMChannel)); |
bogdanm | 0:9b334a45a8ff | 1898 | |
bogdanm | 0:9b334a45a8ff | 1899 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 1900 | __HAL_LOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 1901 | |
bogdanm | 0:9b334a45a8ff | 1902 | hhrtim->State = HAL_HRTIM_STATE_BUSY; |
bogdanm | 0:9b334a45a8ff | 1903 | |
bogdanm | 0:9b334a45a8ff | 1904 | /* Enable the timer output */ |
bogdanm | 0:9b334a45a8ff | 1905 | hhrtim->Instance->sCommonRegs.OENR |= PWMChannel; |
bogdanm | 0:9b334a45a8ff | 1906 | |
bogdanm | 0:9b334a45a8ff | 1907 | /* Enable the timer counter */ |
bogdanm | 0:9b334a45a8ff | 1908 | __HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]); |
bogdanm | 0:9b334a45a8ff | 1909 | |
bogdanm | 0:9b334a45a8ff | 1910 | hhrtim->State = HAL_HRTIM_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 1911 | |
bogdanm | 0:9b334a45a8ff | 1912 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 1913 | __HAL_UNLOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 1914 | |
bogdanm | 0:9b334a45a8ff | 1915 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 1916 | } |
bogdanm | 0:9b334a45a8ff | 1917 | |
bogdanm | 0:9b334a45a8ff | 1918 | /** |
bogdanm | 0:9b334a45a8ff | 1919 | * @brief Stops the PWM output signal generation on the designed timer output |
bogdanm | 0:9b334a45a8ff | 1920 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 1921 | * @param TimerIdx: Timer index |
bogdanm | 0:9b334a45a8ff | 1922 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 1923 | * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
bogdanm | 0:9b334a45a8ff | 1924 | * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
bogdanm | 0:9b334a45a8ff | 1925 | * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
bogdanm | 0:9b334a45a8ff | 1926 | * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
bogdanm | 0:9b334a45a8ff | 1927 | * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
bogdanm | 0:9b334a45a8ff | 1928 | * @param PWMChannel: Timer output |
bogdanm | 0:9b334a45a8ff | 1929 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 1930 | * @arg HRTIM_OUTPUT_TA1: Timer A - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 1931 | * @arg HRTIM_OUTPUT_TA2: Timer A - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 1932 | * @arg HRTIM_OUTPUT_TB1: Timer B - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 1933 | * @arg HRTIM_OUTPUT_TB2: Timer B - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 1934 | * @arg HRTIM_OUTPUT_TC1: Timer C - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 1935 | * @arg HRTIM_OUTPUT_TC2: Timer C - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 1936 | * @arg HRTIM_OUTPUT_TD1: Timer D - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 1937 | * @arg HRTIM_OUTPUT_TD2: Timer D - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 1938 | * @arg HRTIM_OUTPUT_TE1: Timer E - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 1939 | * @arg HRTIM_OUTPUT_TE2: Timer E - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 1940 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 1941 | */ |
bogdanm | 0:9b334a45a8ff | 1942 | HAL_StatusTypeDef HAL_HRTIM_SimplePWMStop(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 1943 | uint32_t TimerIdx, |
bogdanm | 0:9b334a45a8ff | 1944 | uint32_t PWMChannel) |
bogdanm | 0:9b334a45a8ff | 1945 | { |
bogdanm | 0:9b334a45a8ff | 1946 | /* Check the parameters */ |
bogdanm | 0:9b334a45a8ff | 1947 | assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, PWMChannel)); |
bogdanm | 0:9b334a45a8ff | 1948 | |
bogdanm | 0:9b334a45a8ff | 1949 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 1950 | __HAL_LOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 1951 | |
bogdanm | 0:9b334a45a8ff | 1952 | hhrtim->State = HAL_HRTIM_STATE_BUSY; |
bogdanm | 0:9b334a45a8ff | 1953 | |
bogdanm | 0:9b334a45a8ff | 1954 | /* Disable the timer output */ |
bogdanm | 0:9b334a45a8ff | 1955 | hhrtim->Instance->sCommonRegs.ODISR |= PWMChannel; |
bogdanm | 0:9b334a45a8ff | 1956 | |
bogdanm | 0:9b334a45a8ff | 1957 | /* Disable the timer counter */ |
bogdanm | 0:9b334a45a8ff | 1958 | __HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]); |
bogdanm | 0:9b334a45a8ff | 1959 | |
bogdanm | 0:9b334a45a8ff | 1960 | hhrtim->State = HAL_HRTIM_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 1961 | |
bogdanm | 0:9b334a45a8ff | 1962 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 1963 | __HAL_UNLOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 1964 | |
bogdanm | 0:9b334a45a8ff | 1965 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 1966 | } |
bogdanm | 0:9b334a45a8ff | 1967 | |
bogdanm | 0:9b334a45a8ff | 1968 | /** |
bogdanm | 0:9b334a45a8ff | 1969 | * @brief Starts the PWM output signal generation on the designed timer output |
bogdanm | 0:9b334a45a8ff | 1970 | * The compare interrupt is enabled. |
bogdanm | 0:9b334a45a8ff | 1971 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 1972 | * @param TimerIdx: Timer index |
bogdanm | 0:9b334a45a8ff | 1973 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 1974 | * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
bogdanm | 0:9b334a45a8ff | 1975 | * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
bogdanm | 0:9b334a45a8ff | 1976 | * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
bogdanm | 0:9b334a45a8ff | 1977 | * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
bogdanm | 0:9b334a45a8ff | 1978 | * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
bogdanm | 0:9b334a45a8ff | 1979 | * @param PWMChannel: Timer output |
bogdanm | 0:9b334a45a8ff | 1980 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 1981 | * @arg HRTIM_OUTPUT_TA1: Timer A - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 1982 | * @arg HRTIM_OUTPUT_TA2: Timer A - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 1983 | * @arg HRTIM_OUTPUT_TB1: Timer B - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 1984 | * @arg HRTIM_OUTPUT_TB2: Timer B - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 1985 | * @arg HRTIM_OUTPUT_TC1: Timer C - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 1986 | * @arg HRTIM_OUTPUT_TC2: Timer C - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 1987 | * @arg HRTIM_OUTPUT_TD1: Timer D - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 1988 | * @arg HRTIM_OUTPUT_TD2: Timer D - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 1989 | * @arg HRTIM_OUTPUT_TE1: Timer E - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 1990 | * @arg HRTIM_OUTPUT_TE2: Timer E - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 1991 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 1992 | */ |
bogdanm | 0:9b334a45a8ff | 1993 | HAL_StatusTypeDef HAL_HRTIM_SimplePWMStart_IT(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 1994 | uint32_t TimerIdx, |
bogdanm | 0:9b334a45a8ff | 1995 | uint32_t PWMChannel) |
bogdanm | 0:9b334a45a8ff | 1996 | { |
bogdanm | 0:9b334a45a8ff | 1997 | /* Check the parameters */ |
bogdanm | 0:9b334a45a8ff | 1998 | assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, PWMChannel)); |
bogdanm | 0:9b334a45a8ff | 1999 | |
bogdanm | 0:9b334a45a8ff | 2000 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 2001 | __HAL_LOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 2002 | |
bogdanm | 0:9b334a45a8ff | 2003 | hhrtim->State = HAL_HRTIM_STATE_BUSY; |
bogdanm | 0:9b334a45a8ff | 2004 | |
bogdanm | 0:9b334a45a8ff | 2005 | /* Enable the timer output */ |
bogdanm | 0:9b334a45a8ff | 2006 | hhrtim->Instance->sCommonRegs.OENR |= PWMChannel; |
bogdanm | 0:9b334a45a8ff | 2007 | |
bogdanm | 0:9b334a45a8ff | 2008 | /* Enable the timer interrupt (depends on the PWM output) */ |
bogdanm | 0:9b334a45a8ff | 2009 | switch (PWMChannel) |
bogdanm | 0:9b334a45a8ff | 2010 | { |
bogdanm | 0:9b334a45a8ff | 2011 | case HRTIM_OUTPUT_TA1: |
bogdanm | 0:9b334a45a8ff | 2012 | case HRTIM_OUTPUT_TB1: |
bogdanm | 0:9b334a45a8ff | 2013 | case HRTIM_OUTPUT_TC1: |
bogdanm | 0:9b334a45a8ff | 2014 | case HRTIM_OUTPUT_TD1: |
bogdanm | 0:9b334a45a8ff | 2015 | case HRTIM_OUTPUT_TE1: |
bogdanm | 0:9b334a45a8ff | 2016 | { |
bogdanm | 0:9b334a45a8ff | 2017 | __HAL_HRTIM_TIMER_ENABLE_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CMP1); |
bogdanm | 0:9b334a45a8ff | 2018 | } |
bogdanm | 0:9b334a45a8ff | 2019 | break; |
bogdanm | 0:9b334a45a8ff | 2020 | case HRTIM_OUTPUT_TA2: |
bogdanm | 0:9b334a45a8ff | 2021 | case HRTIM_OUTPUT_TB2: |
bogdanm | 0:9b334a45a8ff | 2022 | case HRTIM_OUTPUT_TC2: |
bogdanm | 0:9b334a45a8ff | 2023 | case HRTIM_OUTPUT_TD2: |
bogdanm | 0:9b334a45a8ff | 2024 | case HRTIM_OUTPUT_TE2: |
bogdanm | 0:9b334a45a8ff | 2025 | { |
bogdanm | 0:9b334a45a8ff | 2026 | __HAL_HRTIM_TIMER_ENABLE_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CMP2); |
bogdanm | 0:9b334a45a8ff | 2027 | } |
bogdanm | 0:9b334a45a8ff | 2028 | break; |
bogdanm | 0:9b334a45a8ff | 2029 | } |
bogdanm | 0:9b334a45a8ff | 2030 | |
bogdanm | 0:9b334a45a8ff | 2031 | /* Enable the timer counter */ |
bogdanm | 0:9b334a45a8ff | 2032 | __HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]); |
bogdanm | 0:9b334a45a8ff | 2033 | |
bogdanm | 0:9b334a45a8ff | 2034 | hhrtim->State = HAL_HRTIM_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 2035 | |
bogdanm | 0:9b334a45a8ff | 2036 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 2037 | __HAL_UNLOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 2038 | |
bogdanm | 0:9b334a45a8ff | 2039 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 2040 | } |
bogdanm | 0:9b334a45a8ff | 2041 | |
bogdanm | 0:9b334a45a8ff | 2042 | /** |
bogdanm | 0:9b334a45a8ff | 2043 | * @brief Stops the PWM output signal generation on the designed timer output |
bogdanm | 0:9b334a45a8ff | 2044 | * The compare interrupt is disabled. |
bogdanm | 0:9b334a45a8ff | 2045 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 2046 | * @param TimerIdx: Timer index |
bogdanm | 0:9b334a45a8ff | 2047 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 2048 | * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
bogdanm | 0:9b334a45a8ff | 2049 | * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
bogdanm | 0:9b334a45a8ff | 2050 | * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
bogdanm | 0:9b334a45a8ff | 2051 | * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
bogdanm | 0:9b334a45a8ff | 2052 | * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
bogdanm | 0:9b334a45a8ff | 2053 | * @param PWMChannel: Timer output |
bogdanm | 0:9b334a45a8ff | 2054 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 2055 | * @arg HRTIM_OUTPUT_TA1: Timer A - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 2056 | * @arg HRTIM_OUTPUT_TA2: Timer A - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 2057 | * @arg HRTIM_OUTPUT_TB1: Timer B - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 2058 | * @arg HRTIM_OUTPUT_TB2: Timer B - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 2059 | * @arg HRTIM_OUTPUT_TC1: Timer C - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 2060 | * @arg HRTIM_OUTPUT_TC2: Timer C - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 2061 | * @arg HRTIM_OUTPUT_TD1: Timer D - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 2062 | * @arg HRTIM_OUTPUT_TD2: Timer D - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 2063 | * @arg HRTIM_OUTPUT_TE1: Timer E - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 2064 | * @arg HRTIM_OUTPUT_TE2: Timer E - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 2065 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 2066 | */ |
bogdanm | 0:9b334a45a8ff | 2067 | HAL_StatusTypeDef HAL_HRTIM_SimplePWMStop_IT(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 2068 | uint32_t TimerIdx, |
bogdanm | 0:9b334a45a8ff | 2069 | uint32_t PWMChannel) |
bogdanm | 0:9b334a45a8ff | 2070 | { |
bogdanm | 0:9b334a45a8ff | 2071 | /* Check the parameters */ |
bogdanm | 0:9b334a45a8ff | 2072 | assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, PWMChannel)); |
bogdanm | 0:9b334a45a8ff | 2073 | |
bogdanm | 0:9b334a45a8ff | 2074 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 2075 | __HAL_LOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 2076 | |
bogdanm | 0:9b334a45a8ff | 2077 | hhrtim->State = HAL_HRTIM_STATE_BUSY; |
bogdanm | 0:9b334a45a8ff | 2078 | |
bogdanm | 0:9b334a45a8ff | 2079 | /* Disable the timer output */ |
bogdanm | 0:9b334a45a8ff | 2080 | hhrtim->Instance->sCommonRegs.ODISR |= PWMChannel; |
bogdanm | 0:9b334a45a8ff | 2081 | |
bogdanm | 0:9b334a45a8ff | 2082 | /* Disable the timer interrupt (depends on the PWM output) */ |
bogdanm | 0:9b334a45a8ff | 2083 | switch (PWMChannel) |
bogdanm | 0:9b334a45a8ff | 2084 | { |
bogdanm | 0:9b334a45a8ff | 2085 | case HRTIM_OUTPUT_TA1: |
bogdanm | 0:9b334a45a8ff | 2086 | case HRTIM_OUTPUT_TB1: |
bogdanm | 0:9b334a45a8ff | 2087 | case HRTIM_OUTPUT_TC1: |
bogdanm | 0:9b334a45a8ff | 2088 | case HRTIM_OUTPUT_TD1: |
bogdanm | 0:9b334a45a8ff | 2089 | case HRTIM_OUTPUT_TE1: |
bogdanm | 0:9b334a45a8ff | 2090 | { |
bogdanm | 0:9b334a45a8ff | 2091 | __HAL_HRTIM_TIMER_DISABLE_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CMP1); |
bogdanm | 0:9b334a45a8ff | 2092 | } |
bogdanm | 0:9b334a45a8ff | 2093 | break; |
bogdanm | 0:9b334a45a8ff | 2094 | case HRTIM_OUTPUT_TA2: |
bogdanm | 0:9b334a45a8ff | 2095 | case HRTIM_OUTPUT_TB2: |
bogdanm | 0:9b334a45a8ff | 2096 | case HRTIM_OUTPUT_TC2: |
bogdanm | 0:9b334a45a8ff | 2097 | case HRTIM_OUTPUT_TD2: |
bogdanm | 0:9b334a45a8ff | 2098 | case HRTIM_OUTPUT_TE2: |
bogdanm | 0:9b334a45a8ff | 2099 | { |
bogdanm | 0:9b334a45a8ff | 2100 | __HAL_HRTIM_TIMER_DISABLE_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CMP2); |
bogdanm | 0:9b334a45a8ff | 2101 | } |
bogdanm | 0:9b334a45a8ff | 2102 | break; |
bogdanm | 0:9b334a45a8ff | 2103 | } |
bogdanm | 0:9b334a45a8ff | 2104 | |
bogdanm | 0:9b334a45a8ff | 2105 | /* Disable the timer counter */ |
bogdanm | 0:9b334a45a8ff | 2106 | __HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]); |
bogdanm | 0:9b334a45a8ff | 2107 | |
bogdanm | 0:9b334a45a8ff | 2108 | hhrtim->State = HAL_HRTIM_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 2109 | |
bogdanm | 0:9b334a45a8ff | 2110 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 2111 | __HAL_UNLOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 2112 | |
bogdanm | 0:9b334a45a8ff | 2113 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 2114 | } |
bogdanm | 0:9b334a45a8ff | 2115 | |
bogdanm | 0:9b334a45a8ff | 2116 | /** |
bogdanm | 0:9b334a45a8ff | 2117 | * @brief Starts the PWM output signal generation on the designed timer output |
bogdanm | 0:9b334a45a8ff | 2118 | * The compare DMA request is enabled. |
bogdanm | 0:9b334a45a8ff | 2119 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 2120 | * @param TimerIdx: Timer index |
bogdanm | 0:9b334a45a8ff | 2121 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 2122 | * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
bogdanm | 0:9b334a45a8ff | 2123 | * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
bogdanm | 0:9b334a45a8ff | 2124 | * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
bogdanm | 0:9b334a45a8ff | 2125 | * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
bogdanm | 0:9b334a45a8ff | 2126 | * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
bogdanm | 0:9b334a45a8ff | 2127 | * @param PWMChannel: Timer output |
bogdanm | 0:9b334a45a8ff | 2128 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 2129 | * @arg HRTIM_OUTPUT_TA1: Timer A - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 2130 | * @arg HRTIM_OUTPUT_TA2: Timer A - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 2131 | * @arg HRTIM_OUTPUT_TB1: Timer B - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 2132 | * @arg HRTIM_OUTPUT_TB2: Timer B - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 2133 | * @arg HRTIM_OUTPUT_TC1: Timer C - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 2134 | * @arg HRTIM_OUTPUT_TC2: Timer C - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 2135 | * @arg HRTIM_OUTPUT_TD1: Timer D - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 2136 | * @arg HRTIM_OUTPUT_TD2: Timer D - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 2137 | * @arg HRTIM_OUTPUT_TE1: Timer E - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 2138 | * @arg HRTIM_OUTPUT_TE2: Timer E - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 2139 | * @param SrcAddr: DMA transfer source address |
bogdanm | 0:9b334a45a8ff | 2140 | * @param DestAddr: DMA transfer destination address |
bogdanm | 0:9b334a45a8ff | 2141 | * @param Length: The length of data items (data size) to be transferred |
bogdanm | 0:9b334a45a8ff | 2142 | * from source to destination |
bogdanm | 0:9b334a45a8ff | 2143 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 2144 | */ |
bogdanm | 0:9b334a45a8ff | 2145 | HAL_StatusTypeDef HAL_HRTIM_SimplePWMStart_DMA(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 2146 | uint32_t TimerIdx, |
bogdanm | 0:9b334a45a8ff | 2147 | uint32_t PWMChannel, |
bogdanm | 0:9b334a45a8ff | 2148 | uint32_t SrcAddr, |
bogdanm | 0:9b334a45a8ff | 2149 | uint32_t DestAddr, |
bogdanm | 0:9b334a45a8ff | 2150 | uint32_t Length) |
bogdanm | 0:9b334a45a8ff | 2151 | { |
bogdanm | 0:9b334a45a8ff | 2152 | DMA_HandleTypeDef * hdma; |
bogdanm | 0:9b334a45a8ff | 2153 | |
bogdanm | 0:9b334a45a8ff | 2154 | /* Check the parameters */ |
bogdanm | 0:9b334a45a8ff | 2155 | assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, PWMChannel)); |
bogdanm | 0:9b334a45a8ff | 2156 | |
bogdanm | 0:9b334a45a8ff | 2157 | if((hhrtim->State == HAL_HRTIM_STATE_BUSY)) |
bogdanm | 0:9b334a45a8ff | 2158 | { |
bogdanm | 0:9b334a45a8ff | 2159 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 2160 | } |
bogdanm | 0:9b334a45a8ff | 2161 | if((hhrtim->State == HAL_HRTIM_STATE_READY)) |
bogdanm | 0:9b334a45a8ff | 2162 | { |
bogdanm | 0:9b334a45a8ff | 2163 | if((SrcAddr == 0 ) || (DestAddr == 0 ) || (Length == 0)) |
bogdanm | 0:9b334a45a8ff | 2164 | { |
bogdanm | 0:9b334a45a8ff | 2165 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 2166 | } |
bogdanm | 0:9b334a45a8ff | 2167 | else |
bogdanm | 0:9b334a45a8ff | 2168 | { |
bogdanm | 0:9b334a45a8ff | 2169 | hhrtim->State = HAL_HRTIM_STATE_BUSY; |
bogdanm | 0:9b334a45a8ff | 2170 | } |
bogdanm | 0:9b334a45a8ff | 2171 | } |
bogdanm | 0:9b334a45a8ff | 2172 | |
bogdanm | 0:9b334a45a8ff | 2173 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 2174 | __HAL_LOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 2175 | |
bogdanm | 0:9b334a45a8ff | 2176 | /* Enable the timer output */ |
bogdanm | 0:9b334a45a8ff | 2177 | hhrtim->Instance->sCommonRegs.OENR |= PWMChannel; |
bogdanm | 0:9b334a45a8ff | 2178 | |
bogdanm | 0:9b334a45a8ff | 2179 | /* Get the timer DMA handler */ |
bogdanm | 0:9b334a45a8ff | 2180 | hdma = HRTIM_GetDMAHandleFromTimerIdx(hhrtim, TimerIdx); |
bogdanm | 0:9b334a45a8ff | 2181 | |
bogdanm | 0:9b334a45a8ff | 2182 | /* Set the DMA error callback */ |
bogdanm | 0:9b334a45a8ff | 2183 | hdma->XferErrorCallback = HRTIM_DMAError ; |
bogdanm | 0:9b334a45a8ff | 2184 | |
bogdanm | 0:9b334a45a8ff | 2185 | /* Set the DMA transfer completed callback */ |
bogdanm | 0:9b334a45a8ff | 2186 | hdma->XferCpltCallback = HRTIM_DMATimerxCplt; |
bogdanm | 0:9b334a45a8ff | 2187 | |
bogdanm | 0:9b334a45a8ff | 2188 | /* Enable the DMA channel */ |
bogdanm | 0:9b334a45a8ff | 2189 | HAL_DMA_Start_IT(hdma, SrcAddr, DestAddr, Length); |
bogdanm | 0:9b334a45a8ff | 2190 | |
bogdanm | 0:9b334a45a8ff | 2191 | /* Enable the timer DMA request */ |
bogdanm | 0:9b334a45a8ff | 2192 | switch (PWMChannel) |
bogdanm | 0:9b334a45a8ff | 2193 | { |
bogdanm | 0:9b334a45a8ff | 2194 | case HRTIM_OUTPUT_TA1: |
bogdanm | 0:9b334a45a8ff | 2195 | case HRTIM_OUTPUT_TB1: |
bogdanm | 0:9b334a45a8ff | 2196 | case HRTIM_OUTPUT_TC1: |
bogdanm | 0:9b334a45a8ff | 2197 | case HRTIM_OUTPUT_TD1: |
bogdanm | 0:9b334a45a8ff | 2198 | case HRTIM_OUTPUT_TE1: |
bogdanm | 0:9b334a45a8ff | 2199 | { |
bogdanm | 0:9b334a45a8ff | 2200 | __HAL_HRTIM_TIMER_ENABLE_DMA(hhrtim, TimerIdx, HRTIM_TIM_DMA_CMP1); |
bogdanm | 0:9b334a45a8ff | 2201 | } |
bogdanm | 0:9b334a45a8ff | 2202 | break; |
bogdanm | 0:9b334a45a8ff | 2203 | case HRTIM_OUTPUT_TA2: |
bogdanm | 0:9b334a45a8ff | 2204 | case HRTIM_OUTPUT_TB2: |
bogdanm | 0:9b334a45a8ff | 2205 | case HRTIM_OUTPUT_TC2: |
bogdanm | 0:9b334a45a8ff | 2206 | case HRTIM_OUTPUT_TD2: |
bogdanm | 0:9b334a45a8ff | 2207 | case HRTIM_OUTPUT_TE2: |
bogdanm | 0:9b334a45a8ff | 2208 | { |
bogdanm | 0:9b334a45a8ff | 2209 | __HAL_HRTIM_TIMER_ENABLE_DMA(hhrtim, TimerIdx, HRTIM_TIM_DMA_CMP2); |
bogdanm | 0:9b334a45a8ff | 2210 | } |
bogdanm | 0:9b334a45a8ff | 2211 | break; |
bogdanm | 0:9b334a45a8ff | 2212 | } |
bogdanm | 0:9b334a45a8ff | 2213 | |
bogdanm | 0:9b334a45a8ff | 2214 | /* Enable the timer counter */ |
bogdanm | 0:9b334a45a8ff | 2215 | __HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]); |
bogdanm | 0:9b334a45a8ff | 2216 | |
bogdanm | 0:9b334a45a8ff | 2217 | hhrtim->State = HAL_HRTIM_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 2218 | |
bogdanm | 0:9b334a45a8ff | 2219 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 2220 | __HAL_UNLOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 2221 | |
bogdanm | 0:9b334a45a8ff | 2222 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 2223 | } |
bogdanm | 0:9b334a45a8ff | 2224 | |
bogdanm | 0:9b334a45a8ff | 2225 | /** |
bogdanm | 0:9b334a45a8ff | 2226 | * @brief Stops the PWM output signal generation on the designed timer output |
bogdanm | 0:9b334a45a8ff | 2227 | * The compare DMA request is disabled. |
bogdanm | 0:9b334a45a8ff | 2228 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 2229 | * @param TimerIdx: Timer index |
bogdanm | 0:9b334a45a8ff | 2230 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 2231 | * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
bogdanm | 0:9b334a45a8ff | 2232 | * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
bogdanm | 0:9b334a45a8ff | 2233 | * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
bogdanm | 0:9b334a45a8ff | 2234 | * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
bogdanm | 0:9b334a45a8ff | 2235 | * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
bogdanm | 0:9b334a45a8ff | 2236 | * @param PWMChannel: Timer output |
bogdanm | 0:9b334a45a8ff | 2237 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 2238 | * @arg HRTIM_OUTPUT_TA1: Timer A - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 2239 | * @arg HRTIM_OUTPUT_TA2: Timer A - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 2240 | * @arg HRTIM_OUTPUT_TB1: Timer B - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 2241 | * @arg HRTIM_OUTPUT_TB2: Timer B - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 2242 | * @arg HRTIM_OUTPUT_TC1: Timer C - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 2243 | * @arg HRTIM_OUTPUT_TC2: Timer C - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 2244 | * @arg HRTIM_OUTPUT_TD1: Timer D - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 2245 | * @arg HRTIM_OUTPUT_TD2: Timer D - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 2246 | * @arg HRTIM_OUTPUT_TE1: Timer E - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 2247 | * @arg HRTIM_OUTPUT_TE2: Timer E - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 2248 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 2249 | */ |
bogdanm | 0:9b334a45a8ff | 2250 | HAL_StatusTypeDef HAL_HRTIM_SimplePWMStop_DMA(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 2251 | uint32_t TimerIdx, |
bogdanm | 0:9b334a45a8ff | 2252 | uint32_t PWMChannel) |
bogdanm | 0:9b334a45a8ff | 2253 | { |
bogdanm | 0:9b334a45a8ff | 2254 | DMA_HandleTypeDef * hdma; |
bogdanm | 0:9b334a45a8ff | 2255 | |
bogdanm | 0:9b334a45a8ff | 2256 | /* Check the parameters */ |
bogdanm | 0:9b334a45a8ff | 2257 | assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, PWMChannel)); |
bogdanm | 0:9b334a45a8ff | 2258 | |
bogdanm | 0:9b334a45a8ff | 2259 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 2260 | __HAL_LOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 2261 | |
bogdanm | 0:9b334a45a8ff | 2262 | hhrtim->State = HAL_HRTIM_STATE_BUSY; |
bogdanm | 0:9b334a45a8ff | 2263 | |
bogdanm | 0:9b334a45a8ff | 2264 | /* Disable the timer output */ |
bogdanm | 0:9b334a45a8ff | 2265 | hhrtim->Instance->sCommonRegs.ODISR |= PWMChannel; |
bogdanm | 0:9b334a45a8ff | 2266 | |
bogdanm | 0:9b334a45a8ff | 2267 | /* Get the timer DMA handler */ |
bogdanm | 0:9b334a45a8ff | 2268 | hdma = HRTIM_GetDMAHandleFromTimerIdx(hhrtim, TimerIdx); |
bogdanm | 0:9b334a45a8ff | 2269 | |
bogdanm | 0:9b334a45a8ff | 2270 | /* Disable the DMA */ |
bogdanm | 0:9b334a45a8ff | 2271 | HAL_DMA_Abort(hdma); |
bogdanm | 0:9b334a45a8ff | 2272 | |
bogdanm | 0:9b334a45a8ff | 2273 | /* Disable the timer DMA request */ |
bogdanm | 0:9b334a45a8ff | 2274 | switch (PWMChannel) |
bogdanm | 0:9b334a45a8ff | 2275 | { |
bogdanm | 0:9b334a45a8ff | 2276 | case HRTIM_OUTPUT_TA1: |
bogdanm | 0:9b334a45a8ff | 2277 | case HRTIM_OUTPUT_TB1: |
bogdanm | 0:9b334a45a8ff | 2278 | case HRTIM_OUTPUT_TC1: |
bogdanm | 0:9b334a45a8ff | 2279 | case HRTIM_OUTPUT_TD1: |
bogdanm | 0:9b334a45a8ff | 2280 | case HRTIM_OUTPUT_TE1: |
bogdanm | 0:9b334a45a8ff | 2281 | { |
bogdanm | 0:9b334a45a8ff | 2282 | __HAL_HRTIM_TIMER_DISABLE_DMA(hhrtim, TimerIdx, HRTIM_TIM_DMA_CMP1); |
bogdanm | 0:9b334a45a8ff | 2283 | } |
bogdanm | 0:9b334a45a8ff | 2284 | break; |
bogdanm | 0:9b334a45a8ff | 2285 | case HRTIM_OUTPUT_TA2: |
bogdanm | 0:9b334a45a8ff | 2286 | case HRTIM_OUTPUT_TB2: |
bogdanm | 0:9b334a45a8ff | 2287 | case HRTIM_OUTPUT_TC2: |
bogdanm | 0:9b334a45a8ff | 2288 | case HRTIM_OUTPUT_TD2: |
bogdanm | 0:9b334a45a8ff | 2289 | case HRTIM_OUTPUT_TE2: |
bogdanm | 0:9b334a45a8ff | 2290 | { |
bogdanm | 0:9b334a45a8ff | 2291 | __HAL_HRTIM_TIMER_DISABLE_DMA(hhrtim, TimerIdx, HRTIM_TIM_DMA_CMP2); |
bogdanm | 0:9b334a45a8ff | 2292 | } |
bogdanm | 0:9b334a45a8ff | 2293 | break; |
bogdanm | 0:9b334a45a8ff | 2294 | } |
bogdanm | 0:9b334a45a8ff | 2295 | |
bogdanm | 0:9b334a45a8ff | 2296 | /* Disable the timer counter */ |
bogdanm | 0:9b334a45a8ff | 2297 | __HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]); |
bogdanm | 0:9b334a45a8ff | 2298 | |
bogdanm | 0:9b334a45a8ff | 2299 | hhrtim->State = HAL_HRTIM_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 2300 | |
bogdanm | 0:9b334a45a8ff | 2301 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 2302 | __HAL_UNLOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 2303 | |
bogdanm | 0:9b334a45a8ff | 2304 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 2305 | } |
bogdanm | 0:9b334a45a8ff | 2306 | |
bogdanm | 0:9b334a45a8ff | 2307 | /** |
bogdanm | 0:9b334a45a8ff | 2308 | * @} |
bogdanm | 0:9b334a45a8ff | 2309 | */ |
bogdanm | 0:9b334a45a8ff | 2310 | |
bogdanm | 0:9b334a45a8ff | 2311 | /** @defgroup HRTIM_Exported_Functions_Group5 Simple input capture functions |
bogdanm | 0:9b334a45a8ff | 2312 | * @brief When a HRTIM timer operates in simple input capture mode |
bogdanm | 0:9b334a45a8ff | 2313 | * the Capture Register (HRTIM_CPT1/2xR) is used to latch the |
bogdanm | 0:9b334a45a8ff | 2314 | * value of the timer counter counter after a transition detected |
bogdanm | 0:9b334a45a8ff | 2315 | * on a given external event input. |
bogdanm | 0:9b334a45a8ff | 2316 | * |
bogdanm | 0:9b334a45a8ff | 2317 | @verbatim |
bogdanm | 0:9b334a45a8ff | 2318 | =============================================================================== |
bogdanm | 0:9b334a45a8ff | 2319 | ##### Simple input capture functions ##### |
bogdanm | 0:9b334a45a8ff | 2320 | =============================================================================== |
bogdanm | 0:9b334a45a8ff | 2321 | [..] This section provides functions allowing to: |
bogdanm | 0:9b334a45a8ff | 2322 | (+) Configure simple input capture channel |
bogdanm | 0:9b334a45a8ff | 2323 | (+) Start simple input capture |
bogdanm | 0:9b334a45a8ff | 2324 | (+) Stop simple input capture |
bogdanm | 0:9b334a45a8ff | 2325 | (+) Start simple input capture and enable interrupt |
bogdanm | 0:9b334a45a8ff | 2326 | (+) Stop simple input capture and disable interrupt |
bogdanm | 0:9b334a45a8ff | 2327 | (+) Start simple input capture and enable DMA transfer |
bogdanm | 0:9b334a45a8ff | 2328 | (+) Stop simple input capture and disable DMA transfer |
bogdanm | 0:9b334a45a8ff | 2329 | |
bogdanm | 0:9b334a45a8ff | 2330 | @endverbatim |
bogdanm | 0:9b334a45a8ff | 2331 | * @{ |
bogdanm | 0:9b334a45a8ff | 2332 | */ |
bogdanm | 0:9b334a45a8ff | 2333 | |
bogdanm | 0:9b334a45a8ff | 2334 | /** |
bogdanm | 0:9b334a45a8ff | 2335 | * @brief Configures a basic capture |
bogdanm | 0:9b334a45a8ff | 2336 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 2337 | * @param TimerIdx: Timer index |
bogdanm | 0:9b334a45a8ff | 2338 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 2339 | * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
bogdanm | 0:9b334a45a8ff | 2340 | * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
bogdanm | 0:9b334a45a8ff | 2341 | * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
bogdanm | 0:9b334a45a8ff | 2342 | * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
bogdanm | 0:9b334a45a8ff | 2343 | * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
bogdanm | 0:9b334a45a8ff | 2344 | * @param CaptureChannel: Capture unit |
bogdanm | 0:9b334a45a8ff | 2345 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 2346 | * @arg HRTIM_CAPTUREUNIT_1: Capture unit 1 |
bogdanm | 0:9b334a45a8ff | 2347 | * @arg HRTIM_CAPTUREUNIT_2: Capture unit 2 |
bogdanm | 0:9b334a45a8ff | 2348 | * @param pSimpleCaptureChannelCfg: pointer to the basic capture configuration structure |
bogdanm | 0:9b334a45a8ff | 2349 | * @note When the timer operates in basic capture mode the capture is trigerred |
bogdanm | 0:9b334a45a8ff | 2350 | * by the designated external event and GPIO input is implicitely used as event source. |
bogdanm | 0:9b334a45a8ff | 2351 | * The cature can be triggered by a rising edge, a falling edge or both |
bogdanm | 0:9b334a45a8ff | 2352 | * edges on event channel. |
bogdanm | 0:9b334a45a8ff | 2353 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 2354 | */ |
bogdanm | 0:9b334a45a8ff | 2355 | HAL_StatusTypeDef HAL_HRTIM_SimpleCaptureChannelConfig(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 2356 | uint32_t TimerIdx, |
bogdanm | 0:9b334a45a8ff | 2357 | uint32_t CaptureChannel, |
bogdanm | 0:9b334a45a8ff | 2358 | HRTIM_SimpleCaptureChannelCfgTypeDef* pSimpleCaptureChannelCfg) |
bogdanm | 0:9b334a45a8ff | 2359 | { |
bogdanm | 0:9b334a45a8ff | 2360 | HRTIM_EventCfgTypeDef EventCfg; |
bogdanm | 0:9b334a45a8ff | 2361 | |
bogdanm | 0:9b334a45a8ff | 2362 | /* Check parameters */ |
bogdanm | 0:9b334a45a8ff | 2363 | assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx)); |
bogdanm | 0:9b334a45a8ff | 2364 | assert_param(IS_HRTIM_CAPTUREUNIT(CaptureChannel)); |
bogdanm | 0:9b334a45a8ff | 2365 | assert_param(IS_HRTIM_EVENT(pSimpleCaptureChannelCfg->Event)); |
bogdanm | 0:9b334a45a8ff | 2366 | assert_param(IS_HRTIM_EVENTPOLARITY(pSimpleCaptureChannelCfg->EventSensitivity, |
bogdanm | 0:9b334a45a8ff | 2367 | pSimpleCaptureChannelCfg->EventPolarity)); |
bogdanm | 0:9b334a45a8ff | 2368 | assert_param(IS_HRTIM_EVENTSENSITIVITY(pSimpleCaptureChannelCfg->EventSensitivity)); |
bogdanm | 0:9b334a45a8ff | 2369 | assert_param(IS_HRTIM_EVENTFILTER(pSimpleCaptureChannelCfg->Event, |
bogdanm | 0:9b334a45a8ff | 2370 | pSimpleCaptureChannelCfg->EventFilter)); |
bogdanm | 0:9b334a45a8ff | 2371 | |
bogdanm | 0:9b334a45a8ff | 2372 | if(hhrtim->State == HAL_HRTIM_STATE_BUSY) |
bogdanm | 0:9b334a45a8ff | 2373 | { |
bogdanm | 0:9b334a45a8ff | 2374 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 2375 | } |
bogdanm | 0:9b334a45a8ff | 2376 | |
bogdanm | 0:9b334a45a8ff | 2377 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 2378 | __HAL_LOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 2379 | |
bogdanm | 0:9b334a45a8ff | 2380 | hhrtim->State = HAL_HRTIM_STATE_BUSY; |
bogdanm | 0:9b334a45a8ff | 2381 | |
bogdanm | 0:9b334a45a8ff | 2382 | /* Configure external event channel */ |
bogdanm | 0:9b334a45a8ff | 2383 | EventCfg.FastMode = HRTIM_EVENTFASTMODE_DISABLE; |
bogdanm | 0:9b334a45a8ff | 2384 | EventCfg.Filter = pSimpleCaptureChannelCfg->EventFilter; |
bogdanm | 0:9b334a45a8ff | 2385 | EventCfg.Polarity = pSimpleCaptureChannelCfg->EventPolarity; |
bogdanm | 0:9b334a45a8ff | 2386 | EventCfg.Sensitivity = pSimpleCaptureChannelCfg->EventSensitivity; |
bogdanm | 0:9b334a45a8ff | 2387 | EventCfg.Source = HRTIM_EVENTSRC_1; |
bogdanm | 0:9b334a45a8ff | 2388 | |
bogdanm | 0:9b334a45a8ff | 2389 | HRTIM_EventConfig(hhrtim, |
bogdanm | 0:9b334a45a8ff | 2390 | pSimpleCaptureChannelCfg->Event, |
bogdanm | 0:9b334a45a8ff | 2391 | &EventCfg); |
bogdanm | 0:9b334a45a8ff | 2392 | |
bogdanm | 0:9b334a45a8ff | 2393 | /* Memorize capture trigger (will be configured when the capture is started */ |
bogdanm | 0:9b334a45a8ff | 2394 | HRTIM_CaptureUnitConfig(hhrtim, |
bogdanm | 0:9b334a45a8ff | 2395 | TimerIdx, |
bogdanm | 0:9b334a45a8ff | 2396 | CaptureChannel, |
bogdanm | 0:9b334a45a8ff | 2397 | pSimpleCaptureChannelCfg->Event); |
bogdanm | 0:9b334a45a8ff | 2398 | |
bogdanm | 0:9b334a45a8ff | 2399 | hhrtim->State = HAL_HRTIM_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 2400 | |
bogdanm | 0:9b334a45a8ff | 2401 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 2402 | __HAL_UNLOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 2403 | |
bogdanm | 0:9b334a45a8ff | 2404 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 2405 | } |
bogdanm | 0:9b334a45a8ff | 2406 | |
bogdanm | 0:9b334a45a8ff | 2407 | /** |
bogdanm | 0:9b334a45a8ff | 2408 | * @brief Enables a basic capture on the designed capture unit |
bogdanm | 0:9b334a45a8ff | 2409 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 2410 | * @param TimerIdx: Timer index |
bogdanm | 0:9b334a45a8ff | 2411 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 2412 | * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
bogdanm | 0:9b334a45a8ff | 2413 | * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
bogdanm | 0:9b334a45a8ff | 2414 | * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
bogdanm | 0:9b334a45a8ff | 2415 | * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
bogdanm | 0:9b334a45a8ff | 2416 | * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
bogdanm | 0:9b334a45a8ff | 2417 | * @param CaptureChannel: Timer output |
bogdanm | 0:9b334a45a8ff | 2418 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 2419 | * @arg HRTIM_CAPTUREUNIT_1: Capture unit 1 |
bogdanm | 0:9b334a45a8ff | 2420 | * @arg HRTIM_CAPTUREUNIT_2: Capture unit 2 |
bogdanm | 0:9b334a45a8ff | 2421 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 2422 | * @note The external event triggering the capture is available for all timing |
bogdanm | 0:9b334a45a8ff | 2423 | * units. It can be used directly and is active as soon as the timing |
bogdanm | 0:9b334a45a8ff | 2424 | * unit counter is enabled. |
bogdanm | 0:9b334a45a8ff | 2425 | */ |
bogdanm | 0:9b334a45a8ff | 2426 | HAL_StatusTypeDef HAL_HRTIM_SimpleCaptureStart(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 2427 | uint32_t TimerIdx, |
bogdanm | 0:9b334a45a8ff | 2428 | uint32_t CaptureChannel) |
bogdanm | 0:9b334a45a8ff | 2429 | { |
bogdanm | 0:9b334a45a8ff | 2430 | /* Check the parameters */ |
bogdanm | 0:9b334a45a8ff | 2431 | assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx)); |
bogdanm | 0:9b334a45a8ff | 2432 | assert_param(IS_HRTIM_CAPTUREUNIT(CaptureChannel)); |
bogdanm | 0:9b334a45a8ff | 2433 | |
bogdanm | 0:9b334a45a8ff | 2434 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 2435 | __HAL_LOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 2436 | |
bogdanm | 0:9b334a45a8ff | 2437 | hhrtim->State = HAL_HRTIM_STATE_BUSY; |
bogdanm | 0:9b334a45a8ff | 2438 | |
bogdanm | 0:9b334a45a8ff | 2439 | /* Set the capture unit trigger */ |
bogdanm | 0:9b334a45a8ff | 2440 | switch (CaptureChannel) |
bogdanm | 0:9b334a45a8ff | 2441 | { |
bogdanm | 0:9b334a45a8ff | 2442 | case HRTIM_CAPTUREUNIT_1: |
bogdanm | 0:9b334a45a8ff | 2443 | { |
bogdanm | 0:9b334a45a8ff | 2444 | hhrtim->Instance->sTimerxRegs[TimerIdx].CPT1xCR = hhrtim->TimerParam[TimerIdx].CaptureTrigger1; |
bogdanm | 0:9b334a45a8ff | 2445 | } |
bogdanm | 0:9b334a45a8ff | 2446 | break; |
bogdanm | 0:9b334a45a8ff | 2447 | case HRTIM_CAPTUREUNIT_2: |
bogdanm | 0:9b334a45a8ff | 2448 | { |
bogdanm | 0:9b334a45a8ff | 2449 | hhrtim->Instance->sTimerxRegs[TimerIdx].CPT2xCR = hhrtim->TimerParam[TimerIdx].CaptureTrigger2; |
bogdanm | 0:9b334a45a8ff | 2450 | } |
bogdanm | 0:9b334a45a8ff | 2451 | break; |
bogdanm | 0:9b334a45a8ff | 2452 | } |
bogdanm | 0:9b334a45a8ff | 2453 | |
bogdanm | 0:9b334a45a8ff | 2454 | /* Enable the timer counter */ |
bogdanm | 0:9b334a45a8ff | 2455 | __HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]); |
bogdanm | 0:9b334a45a8ff | 2456 | |
bogdanm | 0:9b334a45a8ff | 2457 | hhrtim->State = HAL_HRTIM_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 2458 | |
bogdanm | 0:9b334a45a8ff | 2459 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 2460 | __HAL_UNLOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 2461 | |
bogdanm | 0:9b334a45a8ff | 2462 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 2463 | } |
bogdanm | 0:9b334a45a8ff | 2464 | |
bogdanm | 0:9b334a45a8ff | 2465 | /** |
bogdanm | 0:9b334a45a8ff | 2466 | * @brief Disables a basic capture on the designed capture unit |
bogdanm | 0:9b334a45a8ff | 2467 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 2468 | * @param TimerIdx: Timer index |
bogdanm | 0:9b334a45a8ff | 2469 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 2470 | * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
bogdanm | 0:9b334a45a8ff | 2471 | * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
bogdanm | 0:9b334a45a8ff | 2472 | * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
bogdanm | 0:9b334a45a8ff | 2473 | * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
bogdanm | 0:9b334a45a8ff | 2474 | * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
bogdanm | 0:9b334a45a8ff | 2475 | * @param CaptureChannel: Timer output |
bogdanm | 0:9b334a45a8ff | 2476 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 2477 | * @arg HRTIM_CAPTUREUNIT_1: Capture unit 1 |
bogdanm | 0:9b334a45a8ff | 2478 | * @arg HRTIM_CAPTUREUNIT_2: Capture unit 2 |
bogdanm | 0:9b334a45a8ff | 2479 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 2480 | */ |
bogdanm | 0:9b334a45a8ff | 2481 | HAL_StatusTypeDef HAL_HRTIM_SimpleCaptureStop(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 2482 | uint32_t TimerIdx, |
bogdanm | 0:9b334a45a8ff | 2483 | uint32_t CaptureChannel) |
bogdanm | 0:9b334a45a8ff | 2484 | { |
bogdanm | 0:9b334a45a8ff | 2485 | /* Check the parameters */ |
bogdanm | 0:9b334a45a8ff | 2486 | assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx)); |
bogdanm | 0:9b334a45a8ff | 2487 | assert_param(IS_HRTIM_CAPTUREUNIT(CaptureChannel)); |
bogdanm | 0:9b334a45a8ff | 2488 | |
bogdanm | 0:9b334a45a8ff | 2489 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 2490 | __HAL_LOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 2491 | |
bogdanm | 0:9b334a45a8ff | 2492 | hhrtim->State = HAL_HRTIM_STATE_BUSY; |
bogdanm | 0:9b334a45a8ff | 2493 | |
bogdanm | 0:9b334a45a8ff | 2494 | /* Set the capture unit trigger */ |
bogdanm | 0:9b334a45a8ff | 2495 | switch (CaptureChannel) |
bogdanm | 0:9b334a45a8ff | 2496 | { |
bogdanm | 0:9b334a45a8ff | 2497 | case HRTIM_CAPTUREUNIT_1: |
bogdanm | 0:9b334a45a8ff | 2498 | { |
bogdanm | 0:9b334a45a8ff | 2499 | hhrtim->Instance->sTimerxRegs[TimerIdx].CPT1xCR = HRTIM_CAPTURETRIGGER_NONE; |
bogdanm | 0:9b334a45a8ff | 2500 | } |
bogdanm | 0:9b334a45a8ff | 2501 | break; |
bogdanm | 0:9b334a45a8ff | 2502 | case HRTIM_CAPTUREUNIT_2: |
bogdanm | 0:9b334a45a8ff | 2503 | { |
bogdanm | 0:9b334a45a8ff | 2504 | hhrtim->Instance->sTimerxRegs[TimerIdx].CPT2xCR = HRTIM_CAPTURETRIGGER_NONE; |
bogdanm | 0:9b334a45a8ff | 2505 | } |
bogdanm | 0:9b334a45a8ff | 2506 | break; |
bogdanm | 0:9b334a45a8ff | 2507 | } |
bogdanm | 0:9b334a45a8ff | 2508 | |
bogdanm | 0:9b334a45a8ff | 2509 | /* Disable the timer counter */ |
bogdanm | 0:9b334a45a8ff | 2510 | if ((hhrtim->Instance->sTimerxRegs[TimerIdx].CPT1xCR == HRTIM_CAPTURETRIGGER_NONE) && |
bogdanm | 0:9b334a45a8ff | 2511 | (hhrtim->Instance->sTimerxRegs[TimerIdx].CPT2xCR == HRTIM_CAPTURETRIGGER_NONE)) |
bogdanm | 0:9b334a45a8ff | 2512 | { |
bogdanm | 0:9b334a45a8ff | 2513 | __HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]); |
bogdanm | 0:9b334a45a8ff | 2514 | } |
bogdanm | 0:9b334a45a8ff | 2515 | |
bogdanm | 0:9b334a45a8ff | 2516 | hhrtim->State = HAL_HRTIM_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 2517 | |
bogdanm | 0:9b334a45a8ff | 2518 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 2519 | __HAL_UNLOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 2520 | |
bogdanm | 0:9b334a45a8ff | 2521 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 2522 | } |
bogdanm | 0:9b334a45a8ff | 2523 | |
bogdanm | 0:9b334a45a8ff | 2524 | /** |
bogdanm | 0:9b334a45a8ff | 2525 | * @brief Enables a basic capture on the designed capture unit |
bogdanm | 0:9b334a45a8ff | 2526 | * Capture interrupt is enabled |
bogdanm | 0:9b334a45a8ff | 2527 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 2528 | * @param TimerIdx: Timer index |
bogdanm | 0:9b334a45a8ff | 2529 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 2530 | * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
bogdanm | 0:9b334a45a8ff | 2531 | * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
bogdanm | 0:9b334a45a8ff | 2532 | * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
bogdanm | 0:9b334a45a8ff | 2533 | * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
bogdanm | 0:9b334a45a8ff | 2534 | * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
bogdanm | 0:9b334a45a8ff | 2535 | * @param CaptureChannel: Timer output |
bogdanm | 0:9b334a45a8ff | 2536 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 2537 | * @arg HRTIM_CAPTUREUNIT_1: Capture unit 1 |
bogdanm | 0:9b334a45a8ff | 2538 | * @arg HRTIM_CAPTUREUNIT_2: Capture unit 2 |
bogdanm | 0:9b334a45a8ff | 2539 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 2540 | */ |
bogdanm | 0:9b334a45a8ff | 2541 | HAL_StatusTypeDef HAL_HRTIM_SimpleCaptureStart_IT(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 2542 | uint32_t TimerIdx, |
bogdanm | 0:9b334a45a8ff | 2543 | uint32_t CaptureChannel) |
bogdanm | 0:9b334a45a8ff | 2544 | { |
bogdanm | 0:9b334a45a8ff | 2545 | /* Check the parameters */ |
bogdanm | 0:9b334a45a8ff | 2546 | assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx)); |
bogdanm | 0:9b334a45a8ff | 2547 | assert_param(IS_HRTIM_CAPTUREUNIT(CaptureChannel)); |
bogdanm | 0:9b334a45a8ff | 2548 | |
bogdanm | 0:9b334a45a8ff | 2549 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 2550 | __HAL_LOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 2551 | |
bogdanm | 0:9b334a45a8ff | 2552 | hhrtim->State = HAL_HRTIM_STATE_BUSY; |
bogdanm | 0:9b334a45a8ff | 2553 | |
bogdanm | 0:9b334a45a8ff | 2554 | /* Set the capture unit trigger */ |
bogdanm | 0:9b334a45a8ff | 2555 | switch (CaptureChannel) |
bogdanm | 0:9b334a45a8ff | 2556 | { |
bogdanm | 0:9b334a45a8ff | 2557 | case HRTIM_CAPTUREUNIT_1: |
bogdanm | 0:9b334a45a8ff | 2558 | { |
bogdanm | 0:9b334a45a8ff | 2559 | hhrtim->Instance->sTimerxRegs[TimerIdx].CPT1xCR = hhrtim->TimerParam[TimerIdx].CaptureTrigger1; |
bogdanm | 0:9b334a45a8ff | 2560 | |
bogdanm | 0:9b334a45a8ff | 2561 | /* Enable the capture unit 1 interrupt */ |
bogdanm | 0:9b334a45a8ff | 2562 | __HAL_HRTIM_TIMER_ENABLE_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CPT1); |
bogdanm | 0:9b334a45a8ff | 2563 | } |
bogdanm | 0:9b334a45a8ff | 2564 | break; |
bogdanm | 0:9b334a45a8ff | 2565 | case HRTIM_CAPTUREUNIT_2: |
bogdanm | 0:9b334a45a8ff | 2566 | { |
bogdanm | 0:9b334a45a8ff | 2567 | hhrtim->Instance->sTimerxRegs[TimerIdx].CPT2xCR = hhrtim->TimerParam[TimerIdx].CaptureTrigger2; |
bogdanm | 0:9b334a45a8ff | 2568 | |
bogdanm | 0:9b334a45a8ff | 2569 | /* Enable the capture unit 2 interrupt */ |
bogdanm | 0:9b334a45a8ff | 2570 | __HAL_HRTIM_TIMER_ENABLE_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CPT2); |
bogdanm | 0:9b334a45a8ff | 2571 | } |
bogdanm | 0:9b334a45a8ff | 2572 | break; |
bogdanm | 0:9b334a45a8ff | 2573 | } |
bogdanm | 0:9b334a45a8ff | 2574 | |
bogdanm | 0:9b334a45a8ff | 2575 | /* Enable the timer counter */ |
bogdanm | 0:9b334a45a8ff | 2576 | __HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]); |
bogdanm | 0:9b334a45a8ff | 2577 | |
bogdanm | 0:9b334a45a8ff | 2578 | hhrtim->State = HAL_HRTIM_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 2579 | |
bogdanm | 0:9b334a45a8ff | 2580 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 2581 | __HAL_UNLOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 2582 | |
bogdanm | 0:9b334a45a8ff | 2583 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 2584 | } |
bogdanm | 0:9b334a45a8ff | 2585 | |
bogdanm | 0:9b334a45a8ff | 2586 | /** |
bogdanm | 0:9b334a45a8ff | 2587 | * @brief Disables a basic capture on the designed capture unit |
bogdanm | 0:9b334a45a8ff | 2588 | * Capture interrupt is disabled |
bogdanm | 0:9b334a45a8ff | 2589 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 2590 | * @param TimerIdx: Timer index |
bogdanm | 0:9b334a45a8ff | 2591 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 2592 | * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
bogdanm | 0:9b334a45a8ff | 2593 | * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
bogdanm | 0:9b334a45a8ff | 2594 | * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
bogdanm | 0:9b334a45a8ff | 2595 | * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
bogdanm | 0:9b334a45a8ff | 2596 | * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
bogdanm | 0:9b334a45a8ff | 2597 | * @param CaptureChannel: Timer output |
bogdanm | 0:9b334a45a8ff | 2598 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 2599 | * @arg HRTIM_CAPTUREUNIT_1: Capture unit 1 |
bogdanm | 0:9b334a45a8ff | 2600 | * @arg HRTIM_CAPTUREUNIT_2: Capture unit 2 |
bogdanm | 0:9b334a45a8ff | 2601 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 2602 | */ |
bogdanm | 0:9b334a45a8ff | 2603 | HAL_StatusTypeDef HAL_HRTIM_SimpleCaptureStop_IT(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 2604 | uint32_t TimerIdx, |
bogdanm | 0:9b334a45a8ff | 2605 | uint32_t CaptureChannel) |
bogdanm | 0:9b334a45a8ff | 2606 | { |
bogdanm | 0:9b334a45a8ff | 2607 | /* Check the parameters */ |
bogdanm | 0:9b334a45a8ff | 2608 | assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx)); |
bogdanm | 0:9b334a45a8ff | 2609 | assert_param(IS_HRTIM_CAPTUREUNIT(CaptureChannel)); |
bogdanm | 0:9b334a45a8ff | 2610 | |
bogdanm | 0:9b334a45a8ff | 2611 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 2612 | __HAL_LOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 2613 | |
bogdanm | 0:9b334a45a8ff | 2614 | hhrtim->State = HAL_HRTIM_STATE_BUSY; |
bogdanm | 0:9b334a45a8ff | 2615 | |
bogdanm | 0:9b334a45a8ff | 2616 | /* Set the capture unit trigger */ |
bogdanm | 0:9b334a45a8ff | 2617 | switch (CaptureChannel) |
bogdanm | 0:9b334a45a8ff | 2618 | { |
bogdanm | 0:9b334a45a8ff | 2619 | case HRTIM_CAPTUREUNIT_1: |
bogdanm | 0:9b334a45a8ff | 2620 | { |
bogdanm | 0:9b334a45a8ff | 2621 | hhrtim->Instance->sTimerxRegs[TimerIdx].CPT1xCR = HRTIM_CAPTURETRIGGER_NONE; |
bogdanm | 0:9b334a45a8ff | 2622 | |
bogdanm | 0:9b334a45a8ff | 2623 | /* Disable the capture unit 1 interrupt */ |
bogdanm | 0:9b334a45a8ff | 2624 | __HAL_HRTIM_TIMER_DISABLE_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CPT1); |
bogdanm | 0:9b334a45a8ff | 2625 | } |
bogdanm | 0:9b334a45a8ff | 2626 | break; |
bogdanm | 0:9b334a45a8ff | 2627 | case HRTIM_CAPTUREUNIT_2: |
bogdanm | 0:9b334a45a8ff | 2628 | { |
bogdanm | 0:9b334a45a8ff | 2629 | hhrtim->Instance->sTimerxRegs[TimerIdx].CPT2xCR = HRTIM_CAPTURETRIGGER_NONE; |
bogdanm | 0:9b334a45a8ff | 2630 | |
bogdanm | 0:9b334a45a8ff | 2631 | /* Disable the capture unit 2 interrupt */ |
bogdanm | 0:9b334a45a8ff | 2632 | __HAL_HRTIM_TIMER_DISABLE_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CPT2); |
bogdanm | 0:9b334a45a8ff | 2633 | } |
bogdanm | 0:9b334a45a8ff | 2634 | break; |
bogdanm | 0:9b334a45a8ff | 2635 | } |
bogdanm | 0:9b334a45a8ff | 2636 | |
bogdanm | 0:9b334a45a8ff | 2637 | /* Disable the timer counter */ |
bogdanm | 0:9b334a45a8ff | 2638 | if ((hhrtim->Instance->sTimerxRegs[TimerIdx].CPT1xCR == HRTIM_CAPTURETRIGGER_NONE) && |
bogdanm | 0:9b334a45a8ff | 2639 | (hhrtim->Instance->sTimerxRegs[TimerIdx].CPT2xCR == HRTIM_CAPTURETRIGGER_NONE)) |
bogdanm | 0:9b334a45a8ff | 2640 | { |
bogdanm | 0:9b334a45a8ff | 2641 | __HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]); |
bogdanm | 0:9b334a45a8ff | 2642 | } |
bogdanm | 0:9b334a45a8ff | 2643 | |
bogdanm | 0:9b334a45a8ff | 2644 | hhrtim->State = HAL_HRTIM_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 2645 | |
bogdanm | 0:9b334a45a8ff | 2646 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 2647 | __HAL_UNLOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 2648 | |
bogdanm | 0:9b334a45a8ff | 2649 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 2650 | } |
bogdanm | 0:9b334a45a8ff | 2651 | |
bogdanm | 0:9b334a45a8ff | 2652 | /** |
bogdanm | 0:9b334a45a8ff | 2653 | * @brief Enables a basic capture on the designed capture unit |
bogdanm | 0:9b334a45a8ff | 2654 | * Capture DMA request is enabled |
bogdanm | 0:9b334a45a8ff | 2655 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 2656 | * @param TimerIdx: Timer index |
bogdanm | 0:9b334a45a8ff | 2657 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 2658 | * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
bogdanm | 0:9b334a45a8ff | 2659 | * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
bogdanm | 0:9b334a45a8ff | 2660 | * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
bogdanm | 0:9b334a45a8ff | 2661 | * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
bogdanm | 0:9b334a45a8ff | 2662 | * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
bogdanm | 0:9b334a45a8ff | 2663 | * @param CaptureChannel: Timer output |
bogdanm | 0:9b334a45a8ff | 2664 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 2665 | * @arg HRTIM_CAPTUREUNIT_1: Capture unit 1 |
bogdanm | 0:9b334a45a8ff | 2666 | * @arg HRTIM_CAPTUREUNIT_2: Capture unit 2 |
bogdanm | 0:9b334a45a8ff | 2667 | * @param SrcAddr: DMA transfer source address |
bogdanm | 0:9b334a45a8ff | 2668 | * @param DestAddr: DMA transfer destination address |
bogdanm | 0:9b334a45a8ff | 2669 | * @param Length: The length of data items (data size) to be transferred |
bogdanm | 0:9b334a45a8ff | 2670 | * from source to destination |
bogdanm | 0:9b334a45a8ff | 2671 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 2672 | */ |
bogdanm | 0:9b334a45a8ff | 2673 | HAL_StatusTypeDef HAL_HRTIM_SimpleCaptureStart_DMA(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 2674 | uint32_t TimerIdx, |
bogdanm | 0:9b334a45a8ff | 2675 | uint32_t CaptureChannel, |
bogdanm | 0:9b334a45a8ff | 2676 | uint32_t SrcAddr, |
bogdanm | 0:9b334a45a8ff | 2677 | uint32_t DestAddr, |
bogdanm | 0:9b334a45a8ff | 2678 | uint32_t Length) |
bogdanm | 0:9b334a45a8ff | 2679 | { |
bogdanm | 0:9b334a45a8ff | 2680 | DMA_HandleTypeDef * hdma; |
bogdanm | 0:9b334a45a8ff | 2681 | |
bogdanm | 0:9b334a45a8ff | 2682 | /* Check the parameters */ |
bogdanm | 0:9b334a45a8ff | 2683 | assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx)); |
bogdanm | 0:9b334a45a8ff | 2684 | assert_param(IS_HRTIM_CAPTUREUNIT(CaptureChannel)); |
bogdanm | 0:9b334a45a8ff | 2685 | |
bogdanm | 0:9b334a45a8ff | 2686 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 2687 | __HAL_LOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 2688 | |
bogdanm | 0:9b334a45a8ff | 2689 | hhrtim->State = HAL_HRTIM_STATE_BUSY; |
bogdanm | 0:9b334a45a8ff | 2690 | |
bogdanm | 0:9b334a45a8ff | 2691 | /* Get the timer DMA handler */ |
bogdanm | 0:9b334a45a8ff | 2692 | hdma = HRTIM_GetDMAHandleFromTimerIdx(hhrtim, TimerIdx); |
bogdanm | 0:9b334a45a8ff | 2693 | |
bogdanm | 0:9b334a45a8ff | 2694 | /* Set the DMA error callback */ |
bogdanm | 0:9b334a45a8ff | 2695 | hdma->XferErrorCallback = HRTIM_DMAError ; |
bogdanm | 0:9b334a45a8ff | 2696 | |
bogdanm | 0:9b334a45a8ff | 2697 | /* Set the DMA transfer completed callback */ |
bogdanm | 0:9b334a45a8ff | 2698 | hdma->XferCpltCallback = HRTIM_DMATimerxCplt; |
bogdanm | 0:9b334a45a8ff | 2699 | |
bogdanm | 0:9b334a45a8ff | 2700 | /* Enable the DMA channel */ |
bogdanm | 0:9b334a45a8ff | 2701 | HAL_DMA_Start_IT(hdma, SrcAddr, DestAddr, Length); |
bogdanm | 0:9b334a45a8ff | 2702 | |
bogdanm | 0:9b334a45a8ff | 2703 | switch (CaptureChannel) |
bogdanm | 0:9b334a45a8ff | 2704 | { |
bogdanm | 0:9b334a45a8ff | 2705 | case HRTIM_CAPTUREUNIT_1: |
bogdanm | 0:9b334a45a8ff | 2706 | { |
bogdanm | 0:9b334a45a8ff | 2707 | /* Set the capture unit trigger */ |
bogdanm | 0:9b334a45a8ff | 2708 | hhrtim->Instance->sTimerxRegs[TimerIdx].CPT1xCR = hhrtim->TimerParam[TimerIdx].CaptureTrigger1; |
bogdanm | 0:9b334a45a8ff | 2709 | |
bogdanm | 0:9b334a45a8ff | 2710 | __HAL_HRTIM_TIMER_ENABLE_DMA(hhrtim, TimerIdx, HRTIM_TIM_DMA_CPT1); |
bogdanm | 0:9b334a45a8ff | 2711 | } |
bogdanm | 0:9b334a45a8ff | 2712 | break; |
bogdanm | 0:9b334a45a8ff | 2713 | case HRTIM_CAPTUREUNIT_2: |
bogdanm | 0:9b334a45a8ff | 2714 | { |
bogdanm | 0:9b334a45a8ff | 2715 | /* Set the capture unit trigger */ |
bogdanm | 0:9b334a45a8ff | 2716 | hhrtim->Instance->sTimerxRegs[TimerIdx].CPT2xCR = hhrtim->TimerParam[TimerIdx].CaptureTrigger2; |
bogdanm | 0:9b334a45a8ff | 2717 | |
bogdanm | 0:9b334a45a8ff | 2718 | /* Enable the timer DMA request */ |
bogdanm | 0:9b334a45a8ff | 2719 | __HAL_HRTIM_TIMER_ENABLE_DMA(hhrtim, TimerIdx, HRTIM_TIM_DMA_CPT2); |
bogdanm | 0:9b334a45a8ff | 2720 | } |
bogdanm | 0:9b334a45a8ff | 2721 | break; |
bogdanm | 0:9b334a45a8ff | 2722 | } |
bogdanm | 0:9b334a45a8ff | 2723 | |
bogdanm | 0:9b334a45a8ff | 2724 | /* Enable the timer counter */ |
bogdanm | 0:9b334a45a8ff | 2725 | __HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]); |
bogdanm | 0:9b334a45a8ff | 2726 | |
bogdanm | 0:9b334a45a8ff | 2727 | hhrtim->State = HAL_HRTIM_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 2728 | |
bogdanm | 0:9b334a45a8ff | 2729 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 2730 | __HAL_UNLOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 2731 | |
bogdanm | 0:9b334a45a8ff | 2732 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 2733 | } |
bogdanm | 0:9b334a45a8ff | 2734 | |
bogdanm | 0:9b334a45a8ff | 2735 | /** |
bogdanm | 0:9b334a45a8ff | 2736 | * @brief Disables a basic capture on the designed capture unit |
bogdanm | 0:9b334a45a8ff | 2737 | * Capture DMA request is disabled |
bogdanm | 0:9b334a45a8ff | 2738 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 2739 | * @param TimerIdx: Timer index |
bogdanm | 0:9b334a45a8ff | 2740 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 2741 | * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
bogdanm | 0:9b334a45a8ff | 2742 | * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
bogdanm | 0:9b334a45a8ff | 2743 | * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
bogdanm | 0:9b334a45a8ff | 2744 | * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
bogdanm | 0:9b334a45a8ff | 2745 | * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
bogdanm | 0:9b334a45a8ff | 2746 | * @param CaptureChannel: Timer output |
bogdanm | 0:9b334a45a8ff | 2747 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 2748 | * @arg HRTIM_CAPTUREUNIT_1: Capture unit 1 |
bogdanm | 0:9b334a45a8ff | 2749 | * @arg HRTIM_CAPTUREUNIT_2: Capture unit 2 |
bogdanm | 0:9b334a45a8ff | 2750 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 2751 | */ |
bogdanm | 0:9b334a45a8ff | 2752 | HAL_StatusTypeDef HAL_HRTIM_SimpleCaptureStop_DMA(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 2753 | uint32_t TimerIdx, |
bogdanm | 0:9b334a45a8ff | 2754 | uint32_t CaptureChannel) |
bogdanm | 0:9b334a45a8ff | 2755 | { |
bogdanm | 0:9b334a45a8ff | 2756 | DMA_HandleTypeDef * hdma; |
bogdanm | 0:9b334a45a8ff | 2757 | |
bogdanm | 0:9b334a45a8ff | 2758 | /* Check the parameters */ |
bogdanm | 0:9b334a45a8ff | 2759 | assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx)); |
bogdanm | 0:9b334a45a8ff | 2760 | assert_param(IS_HRTIM_CAPTUREUNIT(CaptureChannel)); |
bogdanm | 0:9b334a45a8ff | 2761 | |
bogdanm | 0:9b334a45a8ff | 2762 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 2763 | __HAL_LOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 2764 | |
bogdanm | 0:9b334a45a8ff | 2765 | hhrtim->State = HAL_HRTIM_STATE_BUSY; |
bogdanm | 0:9b334a45a8ff | 2766 | |
bogdanm | 0:9b334a45a8ff | 2767 | /* Get the timer DMA handler */ |
bogdanm | 0:9b334a45a8ff | 2768 | hdma = HRTIM_GetDMAHandleFromTimerIdx(hhrtim, TimerIdx); |
bogdanm | 0:9b334a45a8ff | 2769 | |
bogdanm | 0:9b334a45a8ff | 2770 | /* Disable the DMA */ |
bogdanm | 0:9b334a45a8ff | 2771 | HAL_DMA_Abort(hdma); |
bogdanm | 0:9b334a45a8ff | 2772 | |
bogdanm | 0:9b334a45a8ff | 2773 | switch (CaptureChannel) |
bogdanm | 0:9b334a45a8ff | 2774 | { |
bogdanm | 0:9b334a45a8ff | 2775 | case HRTIM_CAPTUREUNIT_1: |
bogdanm | 0:9b334a45a8ff | 2776 | { |
bogdanm | 0:9b334a45a8ff | 2777 | /* Reset the capture unit trigger */ |
bogdanm | 0:9b334a45a8ff | 2778 | hhrtim->Instance->sTimerxRegs[TimerIdx].CPT1xCR = HRTIM_CAPTURETRIGGER_NONE; |
bogdanm | 0:9b334a45a8ff | 2779 | |
bogdanm | 0:9b334a45a8ff | 2780 | /* Disable the capture unit 1 DMA request */ |
bogdanm | 0:9b334a45a8ff | 2781 | __HAL_HRTIM_TIMER_DISABLE_DMA(hhrtim, TimerIdx, HRTIM_TIM_DMA_CPT1); |
bogdanm | 0:9b334a45a8ff | 2782 | } |
bogdanm | 0:9b334a45a8ff | 2783 | break; |
bogdanm | 0:9b334a45a8ff | 2784 | case HRTIM_CAPTUREUNIT_2: |
bogdanm | 0:9b334a45a8ff | 2785 | { |
bogdanm | 0:9b334a45a8ff | 2786 | /* Reset the capture unit trigger */ |
bogdanm | 0:9b334a45a8ff | 2787 | hhrtim->Instance->sTimerxRegs[TimerIdx].CPT2xCR = HRTIM_CAPTURETRIGGER_NONE; |
bogdanm | 0:9b334a45a8ff | 2788 | |
bogdanm | 0:9b334a45a8ff | 2789 | /* Disable the capture unit 2 DMA request */ |
bogdanm | 0:9b334a45a8ff | 2790 | __HAL_HRTIM_TIMER_DISABLE_DMA(hhrtim, TimerIdx, HRTIM_TIM_DMA_CPT2); |
bogdanm | 0:9b334a45a8ff | 2791 | } |
bogdanm | 0:9b334a45a8ff | 2792 | break; |
bogdanm | 0:9b334a45a8ff | 2793 | } |
bogdanm | 0:9b334a45a8ff | 2794 | |
bogdanm | 0:9b334a45a8ff | 2795 | /* Disable the timer counter */ |
bogdanm | 0:9b334a45a8ff | 2796 | if ((hhrtim->Instance->sTimerxRegs[TimerIdx].CPT1xCR == HRTIM_CAPTURETRIGGER_NONE) && |
bogdanm | 0:9b334a45a8ff | 2797 | (hhrtim->Instance->sTimerxRegs[TimerIdx].CPT2xCR == HRTIM_CAPTURETRIGGER_NONE)) |
bogdanm | 0:9b334a45a8ff | 2798 | { |
bogdanm | 0:9b334a45a8ff | 2799 | __HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]); |
bogdanm | 0:9b334a45a8ff | 2800 | } |
bogdanm | 0:9b334a45a8ff | 2801 | |
bogdanm | 0:9b334a45a8ff | 2802 | hhrtim->State = HAL_HRTIM_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 2803 | |
bogdanm | 0:9b334a45a8ff | 2804 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 2805 | __HAL_UNLOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 2806 | |
bogdanm | 0:9b334a45a8ff | 2807 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 2808 | } |
bogdanm | 0:9b334a45a8ff | 2809 | |
bogdanm | 0:9b334a45a8ff | 2810 | /** |
bogdanm | 0:9b334a45a8ff | 2811 | * @} |
bogdanm | 0:9b334a45a8ff | 2812 | */ |
bogdanm | 0:9b334a45a8ff | 2813 | |
bogdanm | 0:9b334a45a8ff | 2814 | /** @defgroup HRTIM_Exported_Functions_Group6 Simple one pulse functions |
bogdanm | 0:9b334a45a8ff | 2815 | * @brief When a HRTIM timer operates in simple one pulse mode |
bogdanm | 0:9b334a45a8ff | 2816 | * the timer counter is started in response to transition detected |
bogdanm | 0:9b334a45a8ff | 2817 | * on a given external event input to generate a pulse with a |
bogdanm | 0:9b334a45a8ff | 2818 | * programmable length after a programmable delay. |
bogdanm | 0:9b334a45a8ff | 2819 | * |
bogdanm | 0:9b334a45a8ff | 2820 | @verbatim |
bogdanm | 0:9b334a45a8ff | 2821 | =============================================================================== |
bogdanm | 0:9b334a45a8ff | 2822 | ##### Simple one pulse functions ##### |
bogdanm | 0:9b334a45a8ff | 2823 | =============================================================================== |
bogdanm | 0:9b334a45a8ff | 2824 | [..] This section provides functions allowing to: |
bogdanm | 0:9b334a45a8ff | 2825 | (+) Configure one pulse channel |
bogdanm | 0:9b334a45a8ff | 2826 | (+) Start one pulse generation |
bogdanm | 0:9b334a45a8ff | 2827 | (+) Stop one pulse generation |
bogdanm | 0:9b334a45a8ff | 2828 | (+) Start one pulse generation and enable interrupt |
bogdanm | 0:9b334a45a8ff | 2829 | (+) Stop one pulse generation and disable interrupt |
bogdanm | 0:9b334a45a8ff | 2830 | |
bogdanm | 0:9b334a45a8ff | 2831 | @endverbatim |
bogdanm | 0:9b334a45a8ff | 2832 | * @{ |
bogdanm | 0:9b334a45a8ff | 2833 | */ |
bogdanm | 0:9b334a45a8ff | 2834 | |
bogdanm | 0:9b334a45a8ff | 2835 | /** |
bogdanm | 0:9b334a45a8ff | 2836 | * @brief Configures an output basic one pulse mode |
bogdanm | 0:9b334a45a8ff | 2837 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 2838 | * @param TimerIdx: Timer index |
bogdanm | 0:9b334a45a8ff | 2839 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 2840 | * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
bogdanm | 0:9b334a45a8ff | 2841 | * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
bogdanm | 0:9b334a45a8ff | 2842 | * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
bogdanm | 0:9b334a45a8ff | 2843 | * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
bogdanm | 0:9b334a45a8ff | 2844 | * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
bogdanm | 0:9b334a45a8ff | 2845 | * @param OnePulseChannel: Timer output |
bogdanm | 0:9b334a45a8ff | 2846 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 2847 | * @arg HRTIM_OUTPUT_TA1: Timer A - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 2848 | * @arg HRTIM_OUTPUT_TA2: Timer A - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 2849 | * @arg HRTIM_OUTPUT_TB1: Timer B - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 2850 | * @arg HRTIM_OUTPUT_TB2: Timer B - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 2851 | * @arg HRTIM_OUTPUT_TC1: Timer C - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 2852 | * @arg HRTIM_OUTPUT_TC2: Timer C - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 2853 | * @arg HRTIM_OUTPUT_TD1: Timer D - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 2854 | * @arg HRTIM_OUTPUT_TD2: Timer D - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 2855 | * @arg HRTIM_OUTPUT_TE1: Timer E - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 2856 | * @arg HRTIM_OUTPUT_TE2: Timer E - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 2857 | * @param pSimpleOnePulseChannelCfg: pointer to the basic one pulse output configuration structure |
bogdanm | 0:9b334a45a8ff | 2858 | * @note When the timer operates in basic one pulse mode: |
bogdanm | 0:9b334a45a8ff | 2859 | * the timer counter is implicitely started by the reset event, |
bogdanm | 0:9b334a45a8ff | 2860 | * the reset of the timer counter is triggered by the designated external event |
bogdanm | 0:9b334a45a8ff | 2861 | * GPIO input is implicitely used as event source, |
bogdanm | 0:9b334a45a8ff | 2862 | * Output 1 is implicitely controled by the compare unit 1, |
bogdanm | 0:9b334a45a8ff | 2863 | * Output 2 is implicitely controled by the compare unit 2. |
bogdanm | 0:9b334a45a8ff | 2864 | * Output Set/Reset crossbar is set as follows: |
bogdanm | 0:9b334a45a8ff | 2865 | * Ouput 1: SETx1R = CMP1, RSTx1R = PER |
bogdanm | 0:9b334a45a8ff | 2866 | * Output 2: SETx2R = CMP2, RST2R = PER |
bogdanm | 0:9b334a45a8ff | 2867 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 2868 | * @note If HAL_HRTIM_SimpleOnePulseChannelConfig is called for both timer |
bogdanm | 0:9b334a45a8ff | 2869 | * outputs, the reset event related configuration data provided in the |
bogdanm | 0:9b334a45a8ff | 2870 | * second call will override the reset event related configuration data |
bogdanm | 0:9b334a45a8ff | 2871 | * provided in the first call. |
bogdanm | 0:9b334a45a8ff | 2872 | */ |
bogdanm | 0:9b334a45a8ff | 2873 | HAL_StatusTypeDef HAL_HRTIM_SimpleOnePulseChannelConfig(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 2874 | uint32_t TimerIdx, |
bogdanm | 0:9b334a45a8ff | 2875 | uint32_t OnePulseChannel, |
bogdanm | 0:9b334a45a8ff | 2876 | HRTIM_SimpleOnePulseChannelCfgTypeDef* pSimpleOnePulseChannelCfg) |
bogdanm | 0:9b334a45a8ff | 2877 | { |
bogdanm | 0:9b334a45a8ff | 2878 | uint32_t CompareUnit = 0xFFFFFFFF; |
bogdanm | 0:9b334a45a8ff | 2879 | HRTIM_CompareCfgTypeDef CompareCfg; |
bogdanm | 0:9b334a45a8ff | 2880 | HRTIM_OutputCfgTypeDef OutputCfg; |
bogdanm | 0:9b334a45a8ff | 2881 | HRTIM_EventCfgTypeDef EventCfg; |
bogdanm | 0:9b334a45a8ff | 2882 | |
bogdanm | 0:9b334a45a8ff | 2883 | /* Check parameters */ |
bogdanm | 0:9b334a45a8ff | 2884 | assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OnePulseChannel)); |
bogdanm | 0:9b334a45a8ff | 2885 | assert_param(IS_HRTIM_OUTPUTPOLARITY(pSimpleOnePulseChannelCfg->OutputPolarity)); |
bogdanm | 0:9b334a45a8ff | 2886 | assert_param(IS_HRTIM_OUTPUTIDLELEVEL(pSimpleOnePulseChannelCfg->OutputIdleLevel)); |
bogdanm | 0:9b334a45a8ff | 2887 | assert_param(IS_HRTIM_EVENT(pSimpleOnePulseChannelCfg->Event)); |
bogdanm | 0:9b334a45a8ff | 2888 | assert_param(IS_HRTIM_EVENTPOLARITY(pSimpleOnePulseChannelCfg->EventSensitivity, |
bogdanm | 0:9b334a45a8ff | 2889 | pSimpleOnePulseChannelCfg->EventPolarity)); |
bogdanm | 0:9b334a45a8ff | 2890 | assert_param(IS_HRTIM_EVENTSENSITIVITY(pSimpleOnePulseChannelCfg->EventSensitivity)); |
bogdanm | 0:9b334a45a8ff | 2891 | assert_param(IS_HRTIM_EVENTFILTER(pSimpleOnePulseChannelCfg->Event, |
bogdanm | 0:9b334a45a8ff | 2892 | pSimpleOnePulseChannelCfg->EventFilter)); |
bogdanm | 0:9b334a45a8ff | 2893 | |
bogdanm | 0:9b334a45a8ff | 2894 | if(hhrtim->State == HAL_HRTIM_STATE_BUSY) |
bogdanm | 0:9b334a45a8ff | 2895 | { |
bogdanm | 0:9b334a45a8ff | 2896 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 2897 | } |
bogdanm | 0:9b334a45a8ff | 2898 | |
bogdanm | 0:9b334a45a8ff | 2899 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 2900 | __HAL_LOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 2901 | |
bogdanm | 0:9b334a45a8ff | 2902 | hhrtim->State = HAL_HRTIM_STATE_BUSY; |
bogdanm | 0:9b334a45a8ff | 2903 | |
bogdanm | 0:9b334a45a8ff | 2904 | /* Configure timer compare unit */ |
bogdanm | 0:9b334a45a8ff | 2905 | switch (OnePulseChannel) |
bogdanm | 0:9b334a45a8ff | 2906 | { |
bogdanm | 0:9b334a45a8ff | 2907 | case HRTIM_OUTPUT_TA1: |
bogdanm | 0:9b334a45a8ff | 2908 | case HRTIM_OUTPUT_TB1: |
bogdanm | 0:9b334a45a8ff | 2909 | case HRTIM_OUTPUT_TC1: |
bogdanm | 0:9b334a45a8ff | 2910 | case HRTIM_OUTPUT_TD1: |
bogdanm | 0:9b334a45a8ff | 2911 | case HRTIM_OUTPUT_TE1: |
bogdanm | 0:9b334a45a8ff | 2912 | { |
bogdanm | 0:9b334a45a8ff | 2913 | CompareUnit = HRTIM_COMPAREUNIT_1; |
bogdanm | 0:9b334a45a8ff | 2914 | } |
bogdanm | 0:9b334a45a8ff | 2915 | break; |
bogdanm | 0:9b334a45a8ff | 2916 | case HRTIM_OUTPUT_TA2: |
bogdanm | 0:9b334a45a8ff | 2917 | case HRTIM_OUTPUT_TB2: |
bogdanm | 0:9b334a45a8ff | 2918 | case HRTIM_OUTPUT_TC2: |
bogdanm | 0:9b334a45a8ff | 2919 | case HRTIM_OUTPUT_TD2: |
bogdanm | 0:9b334a45a8ff | 2920 | case HRTIM_OUTPUT_TE2: |
bogdanm | 0:9b334a45a8ff | 2921 | { |
bogdanm | 0:9b334a45a8ff | 2922 | CompareUnit = HRTIM_COMPAREUNIT_2; |
bogdanm | 0:9b334a45a8ff | 2923 | } |
bogdanm | 0:9b334a45a8ff | 2924 | break; |
bogdanm | 0:9b334a45a8ff | 2925 | } |
bogdanm | 0:9b334a45a8ff | 2926 | |
bogdanm | 0:9b334a45a8ff | 2927 | CompareCfg.CompareValue = pSimpleOnePulseChannelCfg->Pulse; |
bogdanm | 0:9b334a45a8ff | 2928 | CompareCfg.AutoDelayedMode = HRTIM_AUTODELAYEDMODE_REGULAR; |
bogdanm | 0:9b334a45a8ff | 2929 | CompareCfg.AutoDelayedTimeout = 0; |
bogdanm | 0:9b334a45a8ff | 2930 | |
bogdanm | 0:9b334a45a8ff | 2931 | HRTIM_CompareUnitConfig(hhrtim, |
bogdanm | 0:9b334a45a8ff | 2932 | TimerIdx, |
bogdanm | 0:9b334a45a8ff | 2933 | CompareUnit, |
bogdanm | 0:9b334a45a8ff | 2934 | &CompareCfg); |
bogdanm | 0:9b334a45a8ff | 2935 | |
bogdanm | 0:9b334a45a8ff | 2936 | /* Configure timer output */ |
bogdanm | 0:9b334a45a8ff | 2937 | OutputCfg.Polarity = pSimpleOnePulseChannelCfg->OutputPolarity; |
bogdanm | 0:9b334a45a8ff | 2938 | OutputCfg.IdleLevel = pSimpleOnePulseChannelCfg->OutputIdleLevel; |
bogdanm | 0:9b334a45a8ff | 2939 | OutputCfg.FaultLevel = HRTIM_OUTPUTFAULTLEVEL_NONE; |
bogdanm | 0:9b334a45a8ff | 2940 | OutputCfg.IdleMode = HRTIM_OUTPUTIDLEMODE_NONE; |
bogdanm | 0:9b334a45a8ff | 2941 | OutputCfg.ChopperModeEnable = HRTIM_OUTPUTCHOPPERMODE_DISABLED; |
bogdanm | 0:9b334a45a8ff | 2942 | OutputCfg.BurstModeEntryDelayed = HRTIM_OUTPUTBURSTMODEENTRY_REGULAR; |
bogdanm | 0:9b334a45a8ff | 2943 | |
bogdanm | 0:9b334a45a8ff | 2944 | if (CompareUnit == HRTIM_COMPAREUNIT_1) |
bogdanm | 0:9b334a45a8ff | 2945 | { |
bogdanm | 0:9b334a45a8ff | 2946 | OutputCfg.SetSource = HRTIM_OUTPUTSET_TIMCMP1; |
bogdanm | 0:9b334a45a8ff | 2947 | } |
bogdanm | 0:9b334a45a8ff | 2948 | else |
bogdanm | 0:9b334a45a8ff | 2949 | { |
bogdanm | 0:9b334a45a8ff | 2950 | OutputCfg.SetSource = HRTIM_OUTPUTSET_TIMCMP2; |
bogdanm | 0:9b334a45a8ff | 2951 | } |
bogdanm | 0:9b334a45a8ff | 2952 | OutputCfg.ResetSource = HRTIM_OUTPUTSET_TIMPER; |
bogdanm | 0:9b334a45a8ff | 2953 | |
bogdanm | 0:9b334a45a8ff | 2954 | HRTIM_OutputConfig(hhrtim, |
bogdanm | 0:9b334a45a8ff | 2955 | TimerIdx, |
bogdanm | 0:9b334a45a8ff | 2956 | OnePulseChannel, |
bogdanm | 0:9b334a45a8ff | 2957 | &OutputCfg); |
bogdanm | 0:9b334a45a8ff | 2958 | |
bogdanm | 0:9b334a45a8ff | 2959 | /* Configure external event channel */ |
bogdanm | 0:9b334a45a8ff | 2960 | EventCfg.FastMode = HRTIM_EVENTFASTMODE_DISABLE; |
bogdanm | 0:9b334a45a8ff | 2961 | EventCfg.Filter = pSimpleOnePulseChannelCfg->EventFilter; |
bogdanm | 0:9b334a45a8ff | 2962 | EventCfg.Polarity = pSimpleOnePulseChannelCfg->EventPolarity; |
bogdanm | 0:9b334a45a8ff | 2963 | EventCfg.Sensitivity = pSimpleOnePulseChannelCfg->EventSensitivity; |
bogdanm | 0:9b334a45a8ff | 2964 | EventCfg.Source = HRTIM_EVENTSRC_1; |
bogdanm | 0:9b334a45a8ff | 2965 | |
bogdanm | 0:9b334a45a8ff | 2966 | HRTIM_EventConfig(hhrtim, |
bogdanm | 0:9b334a45a8ff | 2967 | pSimpleOnePulseChannelCfg->Event, |
bogdanm | 0:9b334a45a8ff | 2968 | &EventCfg); |
bogdanm | 0:9b334a45a8ff | 2969 | |
bogdanm | 0:9b334a45a8ff | 2970 | /* Configure the timer reset register */ |
bogdanm | 0:9b334a45a8ff | 2971 | HRTIM_TIM_ResetConfig(hhrtim, |
bogdanm | 0:9b334a45a8ff | 2972 | TimerIdx, |
bogdanm | 0:9b334a45a8ff | 2973 | pSimpleOnePulseChannelCfg->Event); |
bogdanm | 0:9b334a45a8ff | 2974 | |
bogdanm | 0:9b334a45a8ff | 2975 | hhrtim->State = HAL_HRTIM_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 2976 | |
bogdanm | 0:9b334a45a8ff | 2977 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 2978 | __HAL_UNLOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 2979 | |
bogdanm | 0:9b334a45a8ff | 2980 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 2981 | } |
bogdanm | 0:9b334a45a8ff | 2982 | |
bogdanm | 0:9b334a45a8ff | 2983 | /** |
bogdanm | 0:9b334a45a8ff | 2984 | * @brief Enables the basic one pulse signal generation on the designed output |
bogdanm | 0:9b334a45a8ff | 2985 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 2986 | * @param TimerIdx: Timer index |
bogdanm | 0:9b334a45a8ff | 2987 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 2988 | * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
bogdanm | 0:9b334a45a8ff | 2989 | * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
bogdanm | 0:9b334a45a8ff | 2990 | * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
bogdanm | 0:9b334a45a8ff | 2991 | * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
bogdanm | 0:9b334a45a8ff | 2992 | * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
bogdanm | 0:9b334a45a8ff | 2993 | * @param OnePulseChannel: Timer output |
bogdanm | 0:9b334a45a8ff | 2994 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 2995 | * @arg HRTIM_OUTPUT_TA1: Timer A - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 2996 | * @arg HRTIM_OUTPUT_TA2: Timer A - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 2997 | * @arg HRTIM_OUTPUT_TB1: Timer B - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 2998 | * @arg HRTIM_OUTPUT_TB2: Timer B - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 2999 | * @arg HRTIM_OUTPUT_TC1: Timer C - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 3000 | * @arg HRTIM_OUTPUT_TC2: Timer C - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 3001 | * @arg HRTIM_OUTPUT_TD1: Timer D - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 3002 | * @arg HRTIM_OUTPUT_TD2: Timer D - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 3003 | * @arg HRTIM_OUTPUT_TE1: Timer E - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 3004 | * @arg HRTIM_OUTPUT_TE2: Timer E - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 3005 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 3006 | */ |
bogdanm | 0:9b334a45a8ff | 3007 | HAL_StatusTypeDef HAL_HRTIM_SimpleOnePulseStart(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 3008 | uint32_t TimerIdx, |
bogdanm | 0:9b334a45a8ff | 3009 | uint32_t OnePulseChannel) |
bogdanm | 0:9b334a45a8ff | 3010 | { |
bogdanm | 0:9b334a45a8ff | 3011 | /* Check the parameters */ |
bogdanm | 0:9b334a45a8ff | 3012 | assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OnePulseChannel)); |
bogdanm | 0:9b334a45a8ff | 3013 | |
bogdanm | 0:9b334a45a8ff | 3014 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 3015 | __HAL_LOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 3016 | |
bogdanm | 0:9b334a45a8ff | 3017 | hhrtim->State = HAL_HRTIM_STATE_BUSY; |
bogdanm | 0:9b334a45a8ff | 3018 | |
bogdanm | 0:9b334a45a8ff | 3019 | /* Enable the timer output */ |
bogdanm | 0:9b334a45a8ff | 3020 | hhrtim->Instance->sCommonRegs.OENR |= OnePulseChannel; |
bogdanm | 0:9b334a45a8ff | 3021 | |
bogdanm | 0:9b334a45a8ff | 3022 | /* Enable the timer counter */ |
bogdanm | 0:9b334a45a8ff | 3023 | __HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]); |
bogdanm | 0:9b334a45a8ff | 3024 | |
bogdanm | 0:9b334a45a8ff | 3025 | hhrtim->State = HAL_HRTIM_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 3026 | |
bogdanm | 0:9b334a45a8ff | 3027 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 3028 | __HAL_UNLOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 3029 | |
bogdanm | 0:9b334a45a8ff | 3030 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 3031 | } |
bogdanm | 0:9b334a45a8ff | 3032 | |
bogdanm | 0:9b334a45a8ff | 3033 | /** |
bogdanm | 0:9b334a45a8ff | 3034 | * @brief Disables the basic one pulse signal generation on the designed output |
bogdanm | 0:9b334a45a8ff | 3035 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 3036 | * @param TimerIdx: Timer index |
bogdanm | 0:9b334a45a8ff | 3037 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 3038 | * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
bogdanm | 0:9b334a45a8ff | 3039 | * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
bogdanm | 0:9b334a45a8ff | 3040 | * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
bogdanm | 0:9b334a45a8ff | 3041 | * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
bogdanm | 0:9b334a45a8ff | 3042 | * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
bogdanm | 0:9b334a45a8ff | 3043 | * @param OnePulseChannel: Timer output |
bogdanm | 0:9b334a45a8ff | 3044 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 3045 | * @arg HRTIM_OUTPUT_TA1: Timer A - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 3046 | * @arg HRTIM_OUTPUT_TA2: Timer A - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 3047 | * @arg HRTIM_OUTPUT_TB1: Timer B - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 3048 | * @arg HRTIM_OUTPUT_TB2: Timer B - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 3049 | * @arg HRTIM_OUTPUT_TC1: Timer C - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 3050 | * @arg HRTIM_OUTPUT_TC2: Timer C - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 3051 | * @arg HRTIM_OUTPUT_TD1: Timer D - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 3052 | * @arg HRTIM_OUTPUT_TD2: Timer D - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 3053 | * @arg HRTIM_OUTPUT_TE1: Timer E - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 3054 | * @arg HRTIM_OUTPUT_TE2: Timer E - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 3055 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 3056 | */ |
bogdanm | 0:9b334a45a8ff | 3057 | HAL_StatusTypeDef HAL_HRTIM_SimpleOnePulseStop(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 3058 | uint32_t TimerIdx, |
bogdanm | 0:9b334a45a8ff | 3059 | uint32_t OnePulseChannel) |
bogdanm | 0:9b334a45a8ff | 3060 | { |
bogdanm | 0:9b334a45a8ff | 3061 | /* Check the parameters */ |
bogdanm | 0:9b334a45a8ff | 3062 | assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OnePulseChannel)); |
bogdanm | 0:9b334a45a8ff | 3063 | |
bogdanm | 0:9b334a45a8ff | 3064 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 3065 | __HAL_LOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 3066 | |
bogdanm | 0:9b334a45a8ff | 3067 | hhrtim->State = HAL_HRTIM_STATE_BUSY; |
bogdanm | 0:9b334a45a8ff | 3068 | |
bogdanm | 0:9b334a45a8ff | 3069 | /* Disable the timer output */ |
bogdanm | 0:9b334a45a8ff | 3070 | hhrtim->Instance->sCommonRegs.ODISR |= OnePulseChannel; |
bogdanm | 0:9b334a45a8ff | 3071 | |
bogdanm | 0:9b334a45a8ff | 3072 | /* Disable the timer counter */ |
bogdanm | 0:9b334a45a8ff | 3073 | __HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]); |
bogdanm | 0:9b334a45a8ff | 3074 | |
bogdanm | 0:9b334a45a8ff | 3075 | hhrtim->State = HAL_HRTIM_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 3076 | |
bogdanm | 0:9b334a45a8ff | 3077 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 3078 | __HAL_UNLOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 3079 | |
bogdanm | 0:9b334a45a8ff | 3080 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 3081 | } |
bogdanm | 0:9b334a45a8ff | 3082 | |
bogdanm | 0:9b334a45a8ff | 3083 | /** |
bogdanm | 0:9b334a45a8ff | 3084 | * @brief Enables the basic one pulse signal generation on the designed output |
bogdanm | 0:9b334a45a8ff | 3085 | * The compare interrupt is enabled (pulse start) |
bogdanm | 0:9b334a45a8ff | 3086 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 3087 | * @param TimerIdx: Timer index |
bogdanm | 0:9b334a45a8ff | 3088 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 3089 | * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
bogdanm | 0:9b334a45a8ff | 3090 | * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
bogdanm | 0:9b334a45a8ff | 3091 | * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
bogdanm | 0:9b334a45a8ff | 3092 | * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
bogdanm | 0:9b334a45a8ff | 3093 | * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
bogdanm | 0:9b334a45a8ff | 3094 | * @param OnePulseChannel: Timer output |
bogdanm | 0:9b334a45a8ff | 3095 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 3096 | * @arg HRTIM_OUTPUT_TA1: Timer A - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 3097 | * @arg HRTIM_OUTPUT_TA2: Timer A - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 3098 | * @arg HRTIM_OUTPUT_TB1: Timer B - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 3099 | * @arg HRTIM_OUTPUT_TB2: Timer B - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 3100 | * @arg HRTIM_OUTPUT_TC1: Timer C - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 3101 | * @arg HRTIM_OUTPUT_TC2: Timer C - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 3102 | * @arg HRTIM_OUTPUT_TD1: Timer D - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 3103 | * @arg HRTIM_OUTPUT_TD2: Timer D - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 3104 | * @arg HRTIM_OUTPUT_TE1: Timer E - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 3105 | * @arg HRTIM_OUTPUT_TE2: Timer E - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 3106 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 3107 | */ |
bogdanm | 0:9b334a45a8ff | 3108 | HAL_StatusTypeDef HAL_HRTIM_SimpleOnePulseStart_IT(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 3109 | uint32_t TimerIdx, |
bogdanm | 0:9b334a45a8ff | 3110 | uint32_t OnePulseChannel) |
bogdanm | 0:9b334a45a8ff | 3111 | { |
bogdanm | 0:9b334a45a8ff | 3112 | /* Check the parameters */ |
bogdanm | 0:9b334a45a8ff | 3113 | assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OnePulseChannel)); |
bogdanm | 0:9b334a45a8ff | 3114 | |
bogdanm | 0:9b334a45a8ff | 3115 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 3116 | __HAL_LOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 3117 | |
bogdanm | 0:9b334a45a8ff | 3118 | hhrtim->State = HAL_HRTIM_STATE_BUSY; |
bogdanm | 0:9b334a45a8ff | 3119 | |
bogdanm | 0:9b334a45a8ff | 3120 | /* Enable the timer output */ |
bogdanm | 0:9b334a45a8ff | 3121 | hhrtim->Instance->sCommonRegs.OENR |= OnePulseChannel; |
bogdanm | 0:9b334a45a8ff | 3122 | |
bogdanm | 0:9b334a45a8ff | 3123 | /* Enable the timer interrupt (depends on the OnePulse output) */ |
bogdanm | 0:9b334a45a8ff | 3124 | switch (OnePulseChannel) |
bogdanm | 0:9b334a45a8ff | 3125 | { |
bogdanm | 0:9b334a45a8ff | 3126 | case HRTIM_OUTPUT_TA1: |
bogdanm | 0:9b334a45a8ff | 3127 | case HRTIM_OUTPUT_TB1: |
bogdanm | 0:9b334a45a8ff | 3128 | case HRTIM_OUTPUT_TC1: |
bogdanm | 0:9b334a45a8ff | 3129 | case HRTIM_OUTPUT_TD1: |
bogdanm | 0:9b334a45a8ff | 3130 | case HRTIM_OUTPUT_TE1: |
bogdanm | 0:9b334a45a8ff | 3131 | { |
bogdanm | 0:9b334a45a8ff | 3132 | __HAL_HRTIM_TIMER_ENABLE_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CMP1); |
bogdanm | 0:9b334a45a8ff | 3133 | } |
bogdanm | 0:9b334a45a8ff | 3134 | break; |
bogdanm | 0:9b334a45a8ff | 3135 | case HRTIM_OUTPUT_TA2: |
bogdanm | 0:9b334a45a8ff | 3136 | case HRTIM_OUTPUT_TB2: |
bogdanm | 0:9b334a45a8ff | 3137 | case HRTIM_OUTPUT_TC2: |
bogdanm | 0:9b334a45a8ff | 3138 | case HRTIM_OUTPUT_TD2: |
bogdanm | 0:9b334a45a8ff | 3139 | case HRTIM_OUTPUT_TE2: |
bogdanm | 0:9b334a45a8ff | 3140 | { |
bogdanm | 0:9b334a45a8ff | 3141 | __HAL_HRTIM_TIMER_ENABLE_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CMP2); |
bogdanm | 0:9b334a45a8ff | 3142 | } |
bogdanm | 0:9b334a45a8ff | 3143 | break; |
bogdanm | 0:9b334a45a8ff | 3144 | } |
bogdanm | 0:9b334a45a8ff | 3145 | |
bogdanm | 0:9b334a45a8ff | 3146 | /* Enable the timer counter */ |
bogdanm | 0:9b334a45a8ff | 3147 | __HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]); |
bogdanm | 0:9b334a45a8ff | 3148 | |
bogdanm | 0:9b334a45a8ff | 3149 | hhrtim->State = HAL_HRTIM_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 3150 | |
bogdanm | 0:9b334a45a8ff | 3151 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 3152 | __HAL_UNLOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 3153 | |
bogdanm | 0:9b334a45a8ff | 3154 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 3155 | } |
bogdanm | 0:9b334a45a8ff | 3156 | |
bogdanm | 0:9b334a45a8ff | 3157 | /** |
bogdanm | 0:9b334a45a8ff | 3158 | * @brief Disables the basic one pulse signal generation on the designed output |
bogdanm | 0:9b334a45a8ff | 3159 | * The compare interrupt is disabled |
bogdanm | 0:9b334a45a8ff | 3160 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 3161 | * @param TimerIdx: Timer index |
bogdanm | 0:9b334a45a8ff | 3162 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 3163 | * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
bogdanm | 0:9b334a45a8ff | 3164 | * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
bogdanm | 0:9b334a45a8ff | 3165 | * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
bogdanm | 0:9b334a45a8ff | 3166 | * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
bogdanm | 0:9b334a45a8ff | 3167 | * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
bogdanm | 0:9b334a45a8ff | 3168 | * @param OnePulseChannel: Timer output |
bogdanm | 0:9b334a45a8ff | 3169 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 3170 | * @arg HRTIM_OUTPUT_TA1: Timer A - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 3171 | * @arg HRTIM_OUTPUT_TA2: Timer A - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 3172 | * @arg HRTIM_OUTPUT_TB1: Timer B - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 3173 | * @arg HRTIM_OUTPUT_TB2: Timer B - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 3174 | * @arg HRTIM_OUTPUT_TC1: Timer C - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 3175 | * @arg HRTIM_OUTPUT_TC2: Timer C - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 3176 | * @arg HRTIM_OUTPUT_TD1: Timer D - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 3177 | * @arg HRTIM_OUTPUT_TD2: Timer D - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 3178 | * @arg HRTIM_OUTPUT_TE1: Timer E - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 3179 | * @arg HRTIM_OUTPUT_TE2: Timer E - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 3180 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 3181 | */ |
bogdanm | 0:9b334a45a8ff | 3182 | HAL_StatusTypeDef HAL_HRTIM_SimpleOnePulseStop_IT(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 3183 | uint32_t TimerIdx, |
bogdanm | 0:9b334a45a8ff | 3184 | uint32_t OnePulseChannel) |
bogdanm | 0:9b334a45a8ff | 3185 | { |
bogdanm | 0:9b334a45a8ff | 3186 | /* Check the parameters */ |
bogdanm | 0:9b334a45a8ff | 3187 | assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OnePulseChannel)); |
bogdanm | 0:9b334a45a8ff | 3188 | |
bogdanm | 0:9b334a45a8ff | 3189 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 3190 | __HAL_LOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 3191 | |
bogdanm | 0:9b334a45a8ff | 3192 | hhrtim->State = HAL_HRTIM_STATE_BUSY; |
bogdanm | 0:9b334a45a8ff | 3193 | |
bogdanm | 0:9b334a45a8ff | 3194 | /* Disable the timer output */ |
bogdanm | 0:9b334a45a8ff | 3195 | hhrtim->Instance->sCommonRegs.ODISR |= OnePulseChannel; |
bogdanm | 0:9b334a45a8ff | 3196 | |
bogdanm | 0:9b334a45a8ff | 3197 | /* Disable the timer interrupt (depends on the OnePulse output) */ |
bogdanm | 0:9b334a45a8ff | 3198 | switch (OnePulseChannel) |
bogdanm | 0:9b334a45a8ff | 3199 | { |
bogdanm | 0:9b334a45a8ff | 3200 | case HRTIM_OUTPUT_TA1: |
bogdanm | 0:9b334a45a8ff | 3201 | case HRTIM_OUTPUT_TB1: |
bogdanm | 0:9b334a45a8ff | 3202 | case HRTIM_OUTPUT_TC1: |
bogdanm | 0:9b334a45a8ff | 3203 | case HRTIM_OUTPUT_TD1: |
bogdanm | 0:9b334a45a8ff | 3204 | case HRTIM_OUTPUT_TE1: |
bogdanm | 0:9b334a45a8ff | 3205 | { |
bogdanm | 0:9b334a45a8ff | 3206 | __HAL_HRTIM_TIMER_DISABLE_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CMP1); |
bogdanm | 0:9b334a45a8ff | 3207 | } |
bogdanm | 0:9b334a45a8ff | 3208 | break; |
bogdanm | 0:9b334a45a8ff | 3209 | case HRTIM_OUTPUT_TA2: |
bogdanm | 0:9b334a45a8ff | 3210 | case HRTIM_OUTPUT_TB2: |
bogdanm | 0:9b334a45a8ff | 3211 | case HRTIM_OUTPUT_TC2: |
bogdanm | 0:9b334a45a8ff | 3212 | case HRTIM_OUTPUT_TD2: |
bogdanm | 0:9b334a45a8ff | 3213 | case HRTIM_OUTPUT_TE2: |
bogdanm | 0:9b334a45a8ff | 3214 | { |
bogdanm | 0:9b334a45a8ff | 3215 | __HAL_HRTIM_TIMER_DISABLE_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CMP2); |
bogdanm | 0:9b334a45a8ff | 3216 | } |
bogdanm | 0:9b334a45a8ff | 3217 | break; |
bogdanm | 0:9b334a45a8ff | 3218 | } |
bogdanm | 0:9b334a45a8ff | 3219 | |
bogdanm | 0:9b334a45a8ff | 3220 | /* Disable the timer counter */ |
bogdanm | 0:9b334a45a8ff | 3221 | __HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]); |
bogdanm | 0:9b334a45a8ff | 3222 | |
bogdanm | 0:9b334a45a8ff | 3223 | hhrtim->State = HAL_HRTIM_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 3224 | |
bogdanm | 0:9b334a45a8ff | 3225 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 3226 | __HAL_UNLOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 3227 | |
bogdanm | 0:9b334a45a8ff | 3228 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 3229 | } |
bogdanm | 0:9b334a45a8ff | 3230 | |
bogdanm | 0:9b334a45a8ff | 3231 | /** |
bogdanm | 0:9b334a45a8ff | 3232 | * @} |
bogdanm | 0:9b334a45a8ff | 3233 | */ |
bogdanm | 0:9b334a45a8ff | 3234 | |
bogdanm | 0:9b334a45a8ff | 3235 | /** @defgroup HRTIM_Exported_Functions_Group7 Configuration functions |
bogdanm | 0:9b334a45a8ff | 3236 | * @brief Functions configuring the HRTIM resources shared by all the |
bogdanm | 0:9b334a45a8ff | 3237 | * HRTIM timers operating in waveform mode. |
bogdanm | 0:9b334a45a8ff | 3238 | * |
bogdanm | 0:9b334a45a8ff | 3239 | @verbatim |
bogdanm | 0:9b334a45a8ff | 3240 | =============================================================================== |
bogdanm | 0:9b334a45a8ff | 3241 | ##### HRTIM configuration functions ##### |
bogdanm | 0:9b334a45a8ff | 3242 | =============================================================================== |
bogdanm | 0:9b334a45a8ff | 3243 | [..] This section provides functions allowing to: |
bogdanm | 0:9b334a45a8ff | 3244 | (+) Configure the burst mode controller |
bogdanm | 0:9b334a45a8ff | 3245 | (+) Configure an external event conditionning |
bogdanm | 0:9b334a45a8ff | 3246 | (+) Configure the external events sampling clock |
bogdanm | 0:9b334a45a8ff | 3247 | (+) Configure a fault conditionning |
bogdanm | 0:9b334a45a8ff | 3248 | (+) Enable or disable fault inputs |
bogdanm | 0:9b334a45a8ff | 3249 | (+) Configure the faults sampling clock |
bogdanm | 0:9b334a45a8ff | 3250 | (+) Configure an ADC trigger |
bogdanm | 0:9b334a45a8ff | 3251 | |
bogdanm | 0:9b334a45a8ff | 3252 | @endverbatim |
bogdanm | 0:9b334a45a8ff | 3253 | * @{ |
bogdanm | 0:9b334a45a8ff | 3254 | */ |
bogdanm | 0:9b334a45a8ff | 3255 | |
bogdanm | 0:9b334a45a8ff | 3256 | /** |
bogdanm | 0:9b334a45a8ff | 3257 | * @brief Configures the burst mode feature of the HRTIM |
bogdanm | 0:9b334a45a8ff | 3258 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 3259 | * @param pBurstModeCfg: pointer to the burst mode configuration structure |
bogdanm | 0:9b334a45a8ff | 3260 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 3261 | * @note This function must be called before starting the burst mode |
bogdanm | 0:9b334a45a8ff | 3262 | * controller |
bogdanm | 0:9b334a45a8ff | 3263 | */ |
bogdanm | 0:9b334a45a8ff | 3264 | HAL_StatusTypeDef HAL_HRTIM_BurstModeConfig(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 3265 | HRTIM_BurstModeCfgTypeDef* pBurstModeCfg) |
bogdanm | 0:9b334a45a8ff | 3266 | { |
bogdanm | 0:9b334a45a8ff | 3267 | uint32_t hrtim_bmcr; |
bogdanm | 0:9b334a45a8ff | 3268 | |
bogdanm | 0:9b334a45a8ff | 3269 | /* Check parameters */ |
bogdanm | 0:9b334a45a8ff | 3270 | assert_param(IS_HRTIM_BURSTMODE(pBurstModeCfg->Mode)); |
bogdanm | 0:9b334a45a8ff | 3271 | assert_param(IS_HRTIM_BURSTMODECLOCKSOURCE(pBurstModeCfg->ClockSource)); |
bogdanm | 0:9b334a45a8ff | 3272 | assert_param(IS_HRTIM_HRTIM_BURSTMODEPRESCALER(pBurstModeCfg->Prescaler)); |
bogdanm | 0:9b334a45a8ff | 3273 | assert_param(IS_HRTIM_BURSTMODEPRELOAD(pBurstModeCfg->PreloadEnable)); |
bogdanm | 0:9b334a45a8ff | 3274 | |
bogdanm | 0:9b334a45a8ff | 3275 | if(hhrtim->State == HAL_HRTIM_STATE_BUSY) |
bogdanm | 0:9b334a45a8ff | 3276 | { |
bogdanm | 0:9b334a45a8ff | 3277 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 3278 | } |
bogdanm | 0:9b334a45a8ff | 3279 | |
bogdanm | 0:9b334a45a8ff | 3280 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 3281 | __HAL_LOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 3282 | |
bogdanm | 0:9b334a45a8ff | 3283 | hhrtim->State = HAL_HRTIM_STATE_BUSY; |
bogdanm | 0:9b334a45a8ff | 3284 | |
bogdanm | 0:9b334a45a8ff | 3285 | hrtim_bmcr = hhrtim->Instance->sCommonRegs.BMCR; |
bogdanm | 0:9b334a45a8ff | 3286 | |
bogdanm | 0:9b334a45a8ff | 3287 | /* Set the burst mode operating mode */ |
bogdanm | 0:9b334a45a8ff | 3288 | hrtim_bmcr &= ~(HRTIM_BMCR_BMOM); |
bogdanm | 0:9b334a45a8ff | 3289 | hrtim_bmcr |= pBurstModeCfg->Mode; |
bogdanm | 0:9b334a45a8ff | 3290 | |
bogdanm | 0:9b334a45a8ff | 3291 | /* Set the burst mode clock source */ |
bogdanm | 0:9b334a45a8ff | 3292 | hrtim_bmcr &= ~(HRTIM_BMCR_BMCLK); |
bogdanm | 0:9b334a45a8ff | 3293 | hrtim_bmcr |= pBurstModeCfg->ClockSource; |
bogdanm | 0:9b334a45a8ff | 3294 | |
bogdanm | 0:9b334a45a8ff | 3295 | /* Set the burst mode prescaler */ |
bogdanm | 0:9b334a45a8ff | 3296 | hrtim_bmcr &= ~(HRTIM_BMCR_BMPRSC); |
bogdanm | 0:9b334a45a8ff | 3297 | hrtim_bmcr |= pBurstModeCfg->Prescaler; |
bogdanm | 0:9b334a45a8ff | 3298 | |
bogdanm | 0:9b334a45a8ff | 3299 | /* Enable/disable burst mode registers preload */ |
bogdanm | 0:9b334a45a8ff | 3300 | hrtim_bmcr &= ~(HRTIM_BMCR_BMPREN); |
bogdanm | 0:9b334a45a8ff | 3301 | hrtim_bmcr |= pBurstModeCfg->PreloadEnable; |
bogdanm | 0:9b334a45a8ff | 3302 | |
bogdanm | 0:9b334a45a8ff | 3303 | /* Set the burst mode trigger */ |
bogdanm | 0:9b334a45a8ff | 3304 | hhrtim->Instance->sCommonRegs.BMTRGR = pBurstModeCfg->Trigger; |
bogdanm | 0:9b334a45a8ff | 3305 | |
bogdanm | 0:9b334a45a8ff | 3306 | /* Set the burst mode compare value */ |
bogdanm | 0:9b334a45a8ff | 3307 | hhrtim->Instance->sCommonRegs.BMCMPR = pBurstModeCfg->IdleDuration; |
bogdanm | 0:9b334a45a8ff | 3308 | |
bogdanm | 0:9b334a45a8ff | 3309 | /* Set the burst mode period */ |
bogdanm | 0:9b334a45a8ff | 3310 | hhrtim->Instance->sCommonRegs.BMPER = pBurstModeCfg->Period; |
bogdanm | 0:9b334a45a8ff | 3311 | |
bogdanm | 0:9b334a45a8ff | 3312 | /* Update the HRTIM registers */ |
bogdanm | 0:9b334a45a8ff | 3313 | hhrtim->Instance->sCommonRegs.BMCR = hrtim_bmcr; |
bogdanm | 0:9b334a45a8ff | 3314 | |
bogdanm | 0:9b334a45a8ff | 3315 | hhrtim->State = HAL_HRTIM_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 3316 | |
bogdanm | 0:9b334a45a8ff | 3317 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 3318 | __HAL_UNLOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 3319 | |
bogdanm | 0:9b334a45a8ff | 3320 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 3321 | } |
bogdanm | 0:9b334a45a8ff | 3322 | |
bogdanm | 0:9b334a45a8ff | 3323 | /** |
bogdanm | 0:9b334a45a8ff | 3324 | * @brief Configures the conditioning of an external event |
bogdanm | 0:9b334a45a8ff | 3325 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 3326 | * @param Event: external event to configure |
bogdanm | 0:9b334a45a8ff | 3327 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 3328 | * @arg HRTIM_EVENT_1: External event 1 |
bogdanm | 0:9b334a45a8ff | 3329 | * @arg HRTIM_EVENT_2: External event 2 |
bogdanm | 0:9b334a45a8ff | 3330 | * @arg HRTIM_EVENT_3: External event 3 |
bogdanm | 0:9b334a45a8ff | 3331 | * @arg HRTIM_EVENT_4: External event 4 |
bogdanm | 0:9b334a45a8ff | 3332 | * @arg HRTIM_EVENT_5: External event 5 |
bogdanm | 0:9b334a45a8ff | 3333 | * @arg HRTIM_EVENT_6: External event 6 |
bogdanm | 0:9b334a45a8ff | 3334 | * @arg HRTIM_EVENT_7: External event 7 |
bogdanm | 0:9b334a45a8ff | 3335 | * @arg HRTIM_EVENT_8: External event 8 |
bogdanm | 0:9b334a45a8ff | 3336 | * @arg HRTIM_EVENT_9: External event 9 |
bogdanm | 0:9b334a45a8ff | 3337 | * @arg HRTIM_EVENT_10: External event 10 |
bogdanm | 0:9b334a45a8ff | 3338 | * @param pEventCfg: pointer to the event conditioning configuration structure |
bogdanm | 0:9b334a45a8ff | 3339 | * @note This function must be called before starting the timer |
bogdanm | 0:9b334a45a8ff | 3340 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 3341 | */ |
bogdanm | 0:9b334a45a8ff | 3342 | HAL_StatusTypeDef HAL_HRTIM_EventConfig(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 3343 | uint32_t Event, |
bogdanm | 0:9b334a45a8ff | 3344 | HRTIM_EventCfgTypeDef* pEventCfg) |
bogdanm | 0:9b334a45a8ff | 3345 | { |
bogdanm | 0:9b334a45a8ff | 3346 | /* Check parameters */ |
bogdanm | 0:9b334a45a8ff | 3347 | assert_param(IS_HRTIM_EVENTSRC(pEventCfg->Source)); |
bogdanm | 0:9b334a45a8ff | 3348 | assert_param(IS_HRTIM_EVENTPOLARITY(pEventCfg->Sensitivity, pEventCfg->Polarity)); |
bogdanm | 0:9b334a45a8ff | 3349 | assert_param(IS_HRTIM_EVENTSENSITIVITY(pEventCfg->Sensitivity)); |
bogdanm | 0:9b334a45a8ff | 3350 | assert_param(IS_HRTIM_EVENTFASTMODE(Event, pEventCfg->FastMode)); |
bogdanm | 0:9b334a45a8ff | 3351 | assert_param(IS_HRTIM_EVENTFILTER(Event, pEventCfg->Filter)); |
bogdanm | 0:9b334a45a8ff | 3352 | |
bogdanm | 0:9b334a45a8ff | 3353 | if(hhrtim->State == HAL_HRTIM_STATE_BUSY) |
bogdanm | 0:9b334a45a8ff | 3354 | { |
bogdanm | 0:9b334a45a8ff | 3355 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 3356 | } |
bogdanm | 0:9b334a45a8ff | 3357 | |
bogdanm | 0:9b334a45a8ff | 3358 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 3359 | __HAL_LOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 3360 | |
bogdanm | 0:9b334a45a8ff | 3361 | hhrtim->State = HAL_HRTIM_STATE_BUSY; |
bogdanm | 0:9b334a45a8ff | 3362 | |
bogdanm | 0:9b334a45a8ff | 3363 | /* Configure the event channel */ |
bogdanm | 0:9b334a45a8ff | 3364 | HRTIM_EventConfig(hhrtim, Event, pEventCfg); |
bogdanm | 0:9b334a45a8ff | 3365 | |
bogdanm | 0:9b334a45a8ff | 3366 | hhrtim->State = HAL_HRTIM_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 3367 | |
bogdanm | 0:9b334a45a8ff | 3368 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 3369 | __HAL_UNLOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 3370 | |
bogdanm | 0:9b334a45a8ff | 3371 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 3372 | } |
bogdanm | 0:9b334a45a8ff | 3373 | |
bogdanm | 0:9b334a45a8ff | 3374 | /** |
bogdanm | 0:9b334a45a8ff | 3375 | * @brief Configures the external event conditioning block prescaler |
bogdanm | 0:9b334a45a8ff | 3376 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 3377 | * @param Prescaler: Prescaler value |
bogdanm | 0:9b334a45a8ff | 3378 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 3379 | * @arg HRTIM_EVENTPRESCALER_DIV1: fEEVS=fHRTIM |
bogdanm | 0:9b334a45a8ff | 3380 | * @arg HRTIM_EVENTPRESCALER_DIV2: fEEVS=fHRTIM / 2 |
bogdanm | 0:9b334a45a8ff | 3381 | * @arg HRTIM_EVENTPRESCALER_DIV4: fEEVS=fHRTIM / 4 |
bogdanm | 0:9b334a45a8ff | 3382 | * @arg HRTIM_EVENTPRESCALER_DIV8: fEEVS=fHRTIM / 8 |
bogdanm | 0:9b334a45a8ff | 3383 | * @note This function must be called before starting the timer |
bogdanm | 0:9b334a45a8ff | 3384 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 3385 | */ |
bogdanm | 0:9b334a45a8ff | 3386 | HAL_StatusTypeDef HAL_HRTIM_EventPrescalerConfig(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 3387 | uint32_t Prescaler) |
bogdanm | 0:9b334a45a8ff | 3388 | { |
bogdanm | 0:9b334a45a8ff | 3389 | uint32_t hrtim_eecr3; |
bogdanm | 0:9b334a45a8ff | 3390 | |
bogdanm | 0:9b334a45a8ff | 3391 | /* Check parameters */ |
bogdanm | 0:9b334a45a8ff | 3392 | assert_param(IS_HRTIM_EVENTPRESCALER(Prescaler)); |
bogdanm | 0:9b334a45a8ff | 3393 | |
bogdanm | 0:9b334a45a8ff | 3394 | if(hhrtim->State == HAL_HRTIM_STATE_BUSY) |
bogdanm | 0:9b334a45a8ff | 3395 | { |
bogdanm | 0:9b334a45a8ff | 3396 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 3397 | } |
bogdanm | 0:9b334a45a8ff | 3398 | |
bogdanm | 0:9b334a45a8ff | 3399 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 3400 | __HAL_LOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 3401 | |
bogdanm | 0:9b334a45a8ff | 3402 | hhrtim->State = HAL_HRTIM_STATE_BUSY; |
bogdanm | 0:9b334a45a8ff | 3403 | |
bogdanm | 0:9b334a45a8ff | 3404 | /* Set the external event prescaler */ |
bogdanm | 0:9b334a45a8ff | 3405 | hrtim_eecr3 = hhrtim->Instance->sCommonRegs.EECR3; |
bogdanm | 0:9b334a45a8ff | 3406 | hrtim_eecr3 &= ~(HRTIM_EECR3_EEVSD); |
bogdanm | 0:9b334a45a8ff | 3407 | hrtim_eecr3 |= Prescaler; |
bogdanm | 0:9b334a45a8ff | 3408 | |
bogdanm | 0:9b334a45a8ff | 3409 | /* Update the HRTIM registers */ |
bogdanm | 0:9b334a45a8ff | 3410 | hhrtim->Instance->sCommonRegs.EECR3 = hrtim_eecr3; |
bogdanm | 0:9b334a45a8ff | 3411 | |
bogdanm | 0:9b334a45a8ff | 3412 | hhrtim->State = HAL_HRTIM_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 3413 | |
bogdanm | 0:9b334a45a8ff | 3414 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 3415 | __HAL_UNLOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 3416 | |
bogdanm | 0:9b334a45a8ff | 3417 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 3418 | } |
bogdanm | 0:9b334a45a8ff | 3419 | |
bogdanm | 0:9b334a45a8ff | 3420 | /** |
bogdanm | 0:9b334a45a8ff | 3421 | * @brief Configures the conditioning of fault input |
bogdanm | 0:9b334a45a8ff | 3422 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 3423 | * @param Fault: fault input to configure |
bogdanm | 0:9b334a45a8ff | 3424 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 3425 | * @arg HRTIM_FAULT_1: Fault input 1 |
bogdanm | 0:9b334a45a8ff | 3426 | * @arg HRTIM_FAULT_2: Fault input 2 |
bogdanm | 0:9b334a45a8ff | 3427 | * @arg HRTIM_FAULT_3: Fault input 3 |
bogdanm | 0:9b334a45a8ff | 3428 | * @arg HRTIM_FAULT_4: Fault input 4 |
bogdanm | 0:9b334a45a8ff | 3429 | * @arg HRTIM_FAULT_5: Fault input 5 |
bogdanm | 0:9b334a45a8ff | 3430 | * @param pFaultCfg: pointer to the fault conditioning configuration structure |
bogdanm | 0:9b334a45a8ff | 3431 | * @note This function must be called before starting the timer and before |
bogdanm | 0:9b334a45a8ff | 3432 | * enabling faults inputs |
bogdanm | 0:9b334a45a8ff | 3433 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 3434 | */ |
bogdanm | 0:9b334a45a8ff | 3435 | HAL_StatusTypeDef HAL_HRTIM_FaultConfig(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 3436 | uint32_t Fault, |
bogdanm | 0:9b334a45a8ff | 3437 | HRTIM_FaultCfgTypeDef* pFaultCfg) |
bogdanm | 0:9b334a45a8ff | 3438 | { |
bogdanm | 0:9b334a45a8ff | 3439 | uint32_t hrtim_fltinr1; |
bogdanm | 0:9b334a45a8ff | 3440 | uint32_t hrtim_fltinr2; |
bogdanm | 0:9b334a45a8ff | 3441 | |
bogdanm | 0:9b334a45a8ff | 3442 | /* Check parameters */ |
bogdanm | 0:9b334a45a8ff | 3443 | assert_param(IS_HRTIM_FAULT(Fault)); |
bogdanm | 0:9b334a45a8ff | 3444 | assert_param(IS_HRTIM_FAULTSOURCE(pFaultCfg->Source)); |
bogdanm | 0:9b334a45a8ff | 3445 | assert_param(IS_HRTIM_FAULTPOLARITY(pFaultCfg->Polarity)); |
bogdanm | 0:9b334a45a8ff | 3446 | assert_param(IS_HRTIM_FAULTFILTER(pFaultCfg->Filter)); |
bogdanm | 0:9b334a45a8ff | 3447 | assert_param(IS_HRTIM_FAULTLOCK(pFaultCfg->Lock)); |
bogdanm | 0:9b334a45a8ff | 3448 | |
bogdanm | 0:9b334a45a8ff | 3449 | if(hhrtim->State == HAL_HRTIM_STATE_BUSY) |
bogdanm | 0:9b334a45a8ff | 3450 | { |
bogdanm | 0:9b334a45a8ff | 3451 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 3452 | } |
bogdanm | 0:9b334a45a8ff | 3453 | |
bogdanm | 0:9b334a45a8ff | 3454 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 3455 | __HAL_LOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 3456 | |
bogdanm | 0:9b334a45a8ff | 3457 | hhrtim->State = HAL_HRTIM_STATE_BUSY; |
bogdanm | 0:9b334a45a8ff | 3458 | |
bogdanm | 0:9b334a45a8ff | 3459 | /* Configure fault channel */ |
bogdanm | 0:9b334a45a8ff | 3460 | hrtim_fltinr1 = hhrtim->Instance->sCommonRegs.FLTINR1; |
bogdanm | 0:9b334a45a8ff | 3461 | hrtim_fltinr2 = hhrtim->Instance->sCommonRegs.FLTINR2; |
bogdanm | 0:9b334a45a8ff | 3462 | |
bogdanm | 0:9b334a45a8ff | 3463 | switch (Fault) |
bogdanm | 0:9b334a45a8ff | 3464 | { |
bogdanm | 0:9b334a45a8ff | 3465 | case HRTIM_FAULT_1: |
bogdanm | 0:9b334a45a8ff | 3466 | { |
bogdanm | 0:9b334a45a8ff | 3467 | hrtim_fltinr1 &= ~(HRTIM_FLTINR1_FLT1P | HRTIM_FLTINR1_FLT1SRC | HRTIM_FLTINR1_FLT1F | HRTIM_FLTINR1_FLT1LCK); |
bogdanm | 0:9b334a45a8ff | 3468 | hrtim_fltinr1 |= pFaultCfg->Polarity; |
bogdanm | 0:9b334a45a8ff | 3469 | hrtim_fltinr1 |= pFaultCfg->Source; |
bogdanm | 0:9b334a45a8ff | 3470 | hrtim_fltinr1 |= pFaultCfg->Filter; |
bogdanm | 0:9b334a45a8ff | 3471 | hrtim_fltinr1 |= pFaultCfg->Lock; |
bogdanm | 0:9b334a45a8ff | 3472 | } |
bogdanm | 0:9b334a45a8ff | 3473 | break; |
bogdanm | 0:9b334a45a8ff | 3474 | case HRTIM_FAULT_2: |
bogdanm | 0:9b334a45a8ff | 3475 | { |
bogdanm | 0:9b334a45a8ff | 3476 | hrtim_fltinr1 &= ~(HRTIM_FLTINR1_FLT2P | HRTIM_FLTINR1_FLT2SRC | HRTIM_FLTINR1_FLT2F | HRTIM_FLTINR1_FLT2LCK); |
bogdanm | 0:9b334a45a8ff | 3477 | hrtim_fltinr1 |= (pFaultCfg->Polarity << 8); |
bogdanm | 0:9b334a45a8ff | 3478 | hrtim_fltinr1 |= (pFaultCfg->Source << 8); |
bogdanm | 0:9b334a45a8ff | 3479 | hrtim_fltinr1 |= (pFaultCfg->Filter << 8); |
bogdanm | 0:9b334a45a8ff | 3480 | hrtim_fltinr1 |= (pFaultCfg->Lock << 8); |
bogdanm | 0:9b334a45a8ff | 3481 | } |
bogdanm | 0:9b334a45a8ff | 3482 | break; |
bogdanm | 0:9b334a45a8ff | 3483 | case HRTIM_FAULT_3: |
bogdanm | 0:9b334a45a8ff | 3484 | { |
bogdanm | 0:9b334a45a8ff | 3485 | hrtim_fltinr1 &= ~(HRTIM_FLTINR1_FLT3P | HRTIM_FLTINR1_FLT3SRC | HRTIM_FLTINR1_FLT3F | HRTIM_FLTINR1_FLT3LCK); |
bogdanm | 0:9b334a45a8ff | 3486 | hrtim_fltinr1 |= (pFaultCfg->Polarity << 16); |
bogdanm | 0:9b334a45a8ff | 3487 | hrtim_fltinr1 |= (pFaultCfg->Source << 16); |
bogdanm | 0:9b334a45a8ff | 3488 | hrtim_fltinr1 |= (pFaultCfg->Filter << 16); |
bogdanm | 0:9b334a45a8ff | 3489 | hrtim_fltinr1 |= (pFaultCfg->Lock << 16); |
bogdanm | 0:9b334a45a8ff | 3490 | } |
bogdanm | 0:9b334a45a8ff | 3491 | break; |
bogdanm | 0:9b334a45a8ff | 3492 | case HRTIM_FAULT_4: |
bogdanm | 0:9b334a45a8ff | 3493 | { |
bogdanm | 0:9b334a45a8ff | 3494 | hrtim_fltinr1 &= ~(HRTIM_FLTINR1_FLT4P | HRTIM_FLTINR1_FLT4SRC | HRTIM_FLTINR1_FLT4F | HRTIM_FLTINR1_FLT4LCK); |
bogdanm | 0:9b334a45a8ff | 3495 | hrtim_fltinr1 |= (pFaultCfg->Polarity << 24); |
bogdanm | 0:9b334a45a8ff | 3496 | hrtim_fltinr1 |= (pFaultCfg->Source << 24); |
bogdanm | 0:9b334a45a8ff | 3497 | hrtim_fltinr1 |= (pFaultCfg->Filter << 24); |
bogdanm | 0:9b334a45a8ff | 3498 | hrtim_fltinr1 |= (pFaultCfg->Lock << 24); |
bogdanm | 0:9b334a45a8ff | 3499 | } |
bogdanm | 0:9b334a45a8ff | 3500 | break; |
bogdanm | 0:9b334a45a8ff | 3501 | case HRTIM_FAULT_5: |
bogdanm | 0:9b334a45a8ff | 3502 | { |
bogdanm | 0:9b334a45a8ff | 3503 | hrtim_fltinr2 &= ~(HRTIM_FLTINR2_FLT5P | HRTIM_FLTINR2_FLT5SRC | HRTIM_FLTINR2_FLT5F | HRTIM_FLTINR2_FLT5LCK); |
bogdanm | 0:9b334a45a8ff | 3504 | hrtim_fltinr2 |= pFaultCfg->Polarity; |
bogdanm | 0:9b334a45a8ff | 3505 | hrtim_fltinr2 |= pFaultCfg->Source; |
bogdanm | 0:9b334a45a8ff | 3506 | hrtim_fltinr2 |= pFaultCfg->Filter; |
bogdanm | 0:9b334a45a8ff | 3507 | hrtim_fltinr2 |= pFaultCfg->Lock; |
bogdanm | 0:9b334a45a8ff | 3508 | } |
bogdanm | 0:9b334a45a8ff | 3509 | break; |
bogdanm | 0:9b334a45a8ff | 3510 | default: |
bogdanm | 0:9b334a45a8ff | 3511 | break; |
bogdanm | 0:9b334a45a8ff | 3512 | } |
bogdanm | 0:9b334a45a8ff | 3513 | |
bogdanm | 0:9b334a45a8ff | 3514 | /* Update the HRTIM registers */ |
bogdanm | 0:9b334a45a8ff | 3515 | hhrtim->Instance->sCommonRegs.FLTINR1 = hrtim_fltinr1; |
bogdanm | 0:9b334a45a8ff | 3516 | hhrtim->Instance->sCommonRegs.FLTINR2 = hrtim_fltinr2; |
bogdanm | 0:9b334a45a8ff | 3517 | |
bogdanm | 0:9b334a45a8ff | 3518 | hhrtim->State = HAL_HRTIM_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 3519 | |
bogdanm | 0:9b334a45a8ff | 3520 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 3521 | __HAL_UNLOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 3522 | |
bogdanm | 0:9b334a45a8ff | 3523 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 3524 | } |
bogdanm | 0:9b334a45a8ff | 3525 | |
bogdanm | 0:9b334a45a8ff | 3526 | /** |
bogdanm | 0:9b334a45a8ff | 3527 | * @brief Configures the fault conditioning block prescaler |
bogdanm | 0:9b334a45a8ff | 3528 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 3529 | * @param Prescaler: Prescaler value |
bogdanm | 0:9b334a45a8ff | 3530 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 3531 | * @arg HRTIM_FAULTPRESCALER_DIV1: fFLTS=fHRTIM |
bogdanm | 0:9b334a45a8ff | 3532 | * @arg HRTIM_FAULTPRESCALER_DIV2: fFLTS=fHRTIM / 2 |
bogdanm | 0:9b334a45a8ff | 3533 | * @arg HRTIM_FAULTPRESCALER_DIV4: fFLTS=fHRTIM / 4 |
bogdanm | 0:9b334a45a8ff | 3534 | * @arg HRTIM_FAULTPRESCALER_DIV8: fFLTS=fHRTIM / 8 |
bogdanm | 0:9b334a45a8ff | 3535 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 3536 | * @note This function must be called before starting the timer and before |
bogdanm | 0:9b334a45a8ff | 3537 | * enabling faults inputs |
bogdanm | 0:9b334a45a8ff | 3538 | */ |
bogdanm | 0:9b334a45a8ff | 3539 | HAL_StatusTypeDef HAL_HRTIM_FaultPrescalerConfig(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 3540 | uint32_t Prescaler) |
bogdanm | 0:9b334a45a8ff | 3541 | { |
bogdanm | 0:9b334a45a8ff | 3542 | uint32_t hrtim_fltinr2; |
bogdanm | 0:9b334a45a8ff | 3543 | |
bogdanm | 0:9b334a45a8ff | 3544 | /* Check parameters */ |
bogdanm | 0:9b334a45a8ff | 3545 | assert_param(IS_HRTIM_FAULTPRESCALER(Prescaler)); |
bogdanm | 0:9b334a45a8ff | 3546 | |
bogdanm | 0:9b334a45a8ff | 3547 | if(hhrtim->State == HAL_HRTIM_STATE_BUSY) |
bogdanm | 0:9b334a45a8ff | 3548 | { |
bogdanm | 0:9b334a45a8ff | 3549 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 3550 | } |
bogdanm | 0:9b334a45a8ff | 3551 | |
bogdanm | 0:9b334a45a8ff | 3552 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 3553 | __HAL_LOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 3554 | |
bogdanm | 0:9b334a45a8ff | 3555 | hhrtim->State = HAL_HRTIM_STATE_BUSY; |
bogdanm | 0:9b334a45a8ff | 3556 | |
bogdanm | 0:9b334a45a8ff | 3557 | /* Set the external event prescaler */ |
bogdanm | 0:9b334a45a8ff | 3558 | hrtim_fltinr2 = hhrtim->Instance->sCommonRegs.FLTINR2; |
bogdanm | 0:9b334a45a8ff | 3559 | hrtim_fltinr2 &= ~(HRTIM_FLTINR2_FLTSD); |
bogdanm | 0:9b334a45a8ff | 3560 | hrtim_fltinr2 |= Prescaler; |
bogdanm | 0:9b334a45a8ff | 3561 | |
bogdanm | 0:9b334a45a8ff | 3562 | /* Update the HRTIM registers */ |
bogdanm | 0:9b334a45a8ff | 3563 | hhrtim->Instance->sCommonRegs.FLTINR2 = hrtim_fltinr2; |
bogdanm | 0:9b334a45a8ff | 3564 | |
bogdanm | 0:9b334a45a8ff | 3565 | hhrtim->State = HAL_HRTIM_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 3566 | |
bogdanm | 0:9b334a45a8ff | 3567 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 3568 | __HAL_UNLOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 3569 | |
bogdanm | 0:9b334a45a8ff | 3570 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 3571 | } |
bogdanm | 0:9b334a45a8ff | 3572 | |
bogdanm | 0:9b334a45a8ff | 3573 | /** |
bogdanm | 0:9b334a45a8ff | 3574 | * @brief Enables or disables the HRTIMx Fault mode. |
bogdanm | 0:9b334a45a8ff | 3575 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 3576 | * @param Faults: fault input(s) to enable or disable |
bogdanm | 0:9b334a45a8ff | 3577 | * This parameter can be any combination of the following values: |
bogdanm | 0:9b334a45a8ff | 3578 | * @arg HRTIM_FAULT_1: Fault input 1 |
bogdanm | 0:9b334a45a8ff | 3579 | * @arg HRTIM_FAULT_2: Fault input 2 |
bogdanm | 0:9b334a45a8ff | 3580 | * @arg HRTIM_FAULT_3: Fault input 3 |
bogdanm | 0:9b334a45a8ff | 3581 | * @arg HRTIM_FAULT_4: Fault input 4 |
bogdanm | 0:9b334a45a8ff | 3582 | * @arg HRTIM_FAULT_5: Fault input 5 |
bogdanm | 0:9b334a45a8ff | 3583 | * @param Enable: Fault(s) enabling |
bogdanm | 0:9b334a45a8ff | 3584 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 3585 | * @arg HRTIM_FAULTMODECTL_ENABLED: Fault(s) enabled |
bogdanm | 0:9b334a45a8ff | 3586 | * @arg HRTIM_FAULTMODECTL_DISABLED: Fault(s) disabled |
bogdanm | 0:9b334a45a8ff | 3587 | * @retval None |
bogdanm | 0:9b334a45a8ff | 3588 | */ |
bogdanm | 0:9b334a45a8ff | 3589 | void HAL_HRTIM_FaultModeCtl(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 3590 | uint32_t Faults, |
bogdanm | 0:9b334a45a8ff | 3591 | uint32_t Enable) |
bogdanm | 0:9b334a45a8ff | 3592 | { |
bogdanm | 0:9b334a45a8ff | 3593 | uint32_t hrtim_fltinr1; |
bogdanm | 0:9b334a45a8ff | 3594 | uint32_t hrtim_fltinr2; |
bogdanm | 0:9b334a45a8ff | 3595 | |
bogdanm | 0:9b334a45a8ff | 3596 | /* Check parameters */ |
bogdanm | 0:9b334a45a8ff | 3597 | assert_param(IS_HRTIM_FAULT(Faults)); |
bogdanm | 0:9b334a45a8ff | 3598 | assert_param(IS_HRTIM_FAULTMODECTL(Enable)); |
bogdanm | 0:9b334a45a8ff | 3599 | |
bogdanm | 0:9b334a45a8ff | 3600 | /* Configure fault channel */ |
bogdanm | 0:9b334a45a8ff | 3601 | hrtim_fltinr1 = hhrtim->Instance->sCommonRegs.FLTINR1; |
bogdanm | 0:9b334a45a8ff | 3602 | hrtim_fltinr2 = hhrtim->Instance->sCommonRegs.FLTINR2; |
bogdanm | 0:9b334a45a8ff | 3603 | |
bogdanm | 0:9b334a45a8ff | 3604 | if ((Faults & HRTIM_FAULT_1) != RESET) |
bogdanm | 0:9b334a45a8ff | 3605 | { |
bogdanm | 0:9b334a45a8ff | 3606 | hrtim_fltinr1 &= ~HRTIM_FLTINR1_FLT1E; |
bogdanm | 0:9b334a45a8ff | 3607 | hrtim_fltinr1 |= Enable; |
bogdanm | 0:9b334a45a8ff | 3608 | } |
bogdanm | 0:9b334a45a8ff | 3609 | if ((Faults & HRTIM_FAULT_2) != RESET) |
bogdanm | 0:9b334a45a8ff | 3610 | { |
bogdanm | 0:9b334a45a8ff | 3611 | hrtim_fltinr1 &= ~HRTIM_FLTINR1_FLT2E; |
bogdanm | 0:9b334a45a8ff | 3612 | hrtim_fltinr1 |= (Enable << 8); |
bogdanm | 0:9b334a45a8ff | 3613 | } |
bogdanm | 0:9b334a45a8ff | 3614 | if ((Faults & HRTIM_FAULT_3) != RESET) |
bogdanm | 0:9b334a45a8ff | 3615 | { |
bogdanm | 0:9b334a45a8ff | 3616 | hrtim_fltinr1 &= ~HRTIM_FLTINR1_FLT3E; |
bogdanm | 0:9b334a45a8ff | 3617 | hrtim_fltinr1 |= (Enable << 16); |
bogdanm | 0:9b334a45a8ff | 3618 | } |
bogdanm | 0:9b334a45a8ff | 3619 | if ((Faults & HRTIM_FAULT_4) != RESET) |
bogdanm | 0:9b334a45a8ff | 3620 | { |
bogdanm | 0:9b334a45a8ff | 3621 | hrtim_fltinr1 &= ~HRTIM_FLTINR1_FLT4E; |
bogdanm | 0:9b334a45a8ff | 3622 | hrtim_fltinr1 |= (Enable << 24); |
bogdanm | 0:9b334a45a8ff | 3623 | } |
bogdanm | 0:9b334a45a8ff | 3624 | if ((Faults & HRTIM_FAULT_5) != RESET) |
bogdanm | 0:9b334a45a8ff | 3625 | { |
bogdanm | 0:9b334a45a8ff | 3626 | hrtim_fltinr2 &= ~HRTIM_FLTINR2_FLT5E; |
bogdanm | 0:9b334a45a8ff | 3627 | hrtim_fltinr2 |= Enable; |
bogdanm | 0:9b334a45a8ff | 3628 | } |
bogdanm | 0:9b334a45a8ff | 3629 | |
bogdanm | 0:9b334a45a8ff | 3630 | /* Update the HRTIMx registers */ |
bogdanm | 0:9b334a45a8ff | 3631 | hhrtim->Instance->sCommonRegs.FLTINR1 = hrtim_fltinr1; |
bogdanm | 0:9b334a45a8ff | 3632 | hhrtim->Instance->sCommonRegs.FLTINR2 = hrtim_fltinr2; |
bogdanm | 0:9b334a45a8ff | 3633 | } |
bogdanm | 0:9b334a45a8ff | 3634 | |
bogdanm | 0:9b334a45a8ff | 3635 | /** |
bogdanm | 0:9b334a45a8ff | 3636 | * @brief Configures both the ADC trigger register update source and the ADC |
bogdanm | 0:9b334a45a8ff | 3637 | * trigger source. |
bogdanm | 0:9b334a45a8ff | 3638 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 3639 | * @param ADCTrigger: ADC trigger to configure |
bogdanm | 0:9b334a45a8ff | 3640 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 3641 | * @arg HRTIM_ADCTRIGGER_1: ADC trigger 1 |
bogdanm | 0:9b334a45a8ff | 3642 | * @arg HRTIM_ADCTRIGGER_2: ADC trigger 2 |
bogdanm | 0:9b334a45a8ff | 3643 | * @arg HRTIM_ADCTRIGGER_3: ADC trigger 3 |
bogdanm | 0:9b334a45a8ff | 3644 | * @arg HRTIM_ADCTRIGGER_4: ADC trigger 4 |
bogdanm | 0:9b334a45a8ff | 3645 | * @param pADCTriggerCfg: pointer to the ADC trigger configuration structure |
bogdanm | 0:9b334a45a8ff | 3646 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 3647 | * @note This function must be called before starting the timer |
bogdanm | 0:9b334a45a8ff | 3648 | */ |
bogdanm | 0:9b334a45a8ff | 3649 | HAL_StatusTypeDef HAL_HRTIM_ADCTriggerConfig(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 3650 | uint32_t ADCTrigger, |
bogdanm | 0:9b334a45a8ff | 3651 | HRTIM_ADCTriggerCfgTypeDef* pADCTriggerCfg) |
bogdanm | 0:9b334a45a8ff | 3652 | { |
bogdanm | 0:9b334a45a8ff | 3653 | uint32_t hrtim_cr1; |
bogdanm | 0:9b334a45a8ff | 3654 | |
bogdanm | 0:9b334a45a8ff | 3655 | /* Check parameters */ |
bogdanm | 0:9b334a45a8ff | 3656 | assert_param(IS_HRTIM_ADCTRIGGER(ADCTrigger)); |
bogdanm | 0:9b334a45a8ff | 3657 | assert_param(IS_HRTIM_ADCTRIGGERUPDATE(pADCTriggerCfg->UpdateSource)); |
bogdanm | 0:9b334a45a8ff | 3658 | |
bogdanm | 0:9b334a45a8ff | 3659 | if(hhrtim->State == HAL_HRTIM_STATE_BUSY) |
bogdanm | 0:9b334a45a8ff | 3660 | { |
bogdanm | 0:9b334a45a8ff | 3661 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 3662 | } |
bogdanm | 0:9b334a45a8ff | 3663 | |
bogdanm | 0:9b334a45a8ff | 3664 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 3665 | __HAL_LOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 3666 | |
bogdanm | 0:9b334a45a8ff | 3667 | hhrtim->State = HAL_HRTIM_STATE_BUSY; |
bogdanm | 0:9b334a45a8ff | 3668 | |
bogdanm | 0:9b334a45a8ff | 3669 | /* Set the ADC trigger update source */ |
bogdanm | 0:9b334a45a8ff | 3670 | hrtim_cr1 = hhrtim->Instance->sCommonRegs.CR1; |
bogdanm | 0:9b334a45a8ff | 3671 | |
bogdanm | 0:9b334a45a8ff | 3672 | switch (ADCTrigger) |
bogdanm | 0:9b334a45a8ff | 3673 | { |
bogdanm | 0:9b334a45a8ff | 3674 | case HRTIM_ADCTRIGGER_1: |
bogdanm | 0:9b334a45a8ff | 3675 | { |
bogdanm | 0:9b334a45a8ff | 3676 | hrtim_cr1 &= ~(HRTIM_CR1_ADC1USRC); |
bogdanm | 0:9b334a45a8ff | 3677 | hrtim_cr1 |= (pADCTriggerCfg->UpdateSource & HRTIM_CR1_ADC1USRC); |
bogdanm | 0:9b334a45a8ff | 3678 | |
bogdanm | 0:9b334a45a8ff | 3679 | /* Set the ADC trigger 1 source */ |
bogdanm | 0:9b334a45a8ff | 3680 | hhrtim->Instance->sCommonRegs.ADC1R = pADCTriggerCfg->Trigger; |
bogdanm | 0:9b334a45a8ff | 3681 | } |
bogdanm | 0:9b334a45a8ff | 3682 | break; |
bogdanm | 0:9b334a45a8ff | 3683 | case HRTIM_ADCTRIGGER_2: |
bogdanm | 0:9b334a45a8ff | 3684 | { |
bogdanm | 0:9b334a45a8ff | 3685 | hrtim_cr1 &= ~(HRTIM_CR1_ADC2USRC); |
bogdanm | 0:9b334a45a8ff | 3686 | hrtim_cr1 |= ((pADCTriggerCfg->UpdateSource << 3) & HRTIM_CR1_ADC2USRC); |
bogdanm | 0:9b334a45a8ff | 3687 | |
bogdanm | 0:9b334a45a8ff | 3688 | /* Set the ADC trigger 2 source */ |
bogdanm | 0:9b334a45a8ff | 3689 | hhrtim->Instance->sCommonRegs.ADC2R = pADCTriggerCfg->Trigger; |
bogdanm | 0:9b334a45a8ff | 3690 | } |
bogdanm | 0:9b334a45a8ff | 3691 | break; |
bogdanm | 0:9b334a45a8ff | 3692 | case HRTIM_ADCTRIGGER_3: |
bogdanm | 0:9b334a45a8ff | 3693 | { |
bogdanm | 0:9b334a45a8ff | 3694 | hrtim_cr1 &= ~(HRTIM_CR1_ADC3USRC); |
bogdanm | 0:9b334a45a8ff | 3695 | hrtim_cr1 |= ((pADCTriggerCfg->UpdateSource << 6) & HRTIM_CR1_ADC3USRC); |
bogdanm | 0:9b334a45a8ff | 3696 | |
bogdanm | 0:9b334a45a8ff | 3697 | /* Set the ADC trigger 3 source */ |
bogdanm | 0:9b334a45a8ff | 3698 | hhrtim->Instance->sCommonRegs.ADC3R = pADCTriggerCfg->Trigger; |
bogdanm | 0:9b334a45a8ff | 3699 | } |
bogdanm | 0:9b334a45a8ff | 3700 | break; |
bogdanm | 0:9b334a45a8ff | 3701 | case HRTIM_ADCTRIGGER_4: |
bogdanm | 0:9b334a45a8ff | 3702 | { |
bogdanm | 0:9b334a45a8ff | 3703 | hrtim_cr1 &= ~(HRTIM_CR1_ADC4USRC); |
bogdanm | 0:9b334a45a8ff | 3704 | hrtim_cr1 |= ((pADCTriggerCfg->UpdateSource << 9) & HRTIM_CR1_ADC4USRC); |
bogdanm | 0:9b334a45a8ff | 3705 | |
bogdanm | 0:9b334a45a8ff | 3706 | /* Set the ADC trigger 4 source */ |
bogdanm | 0:9b334a45a8ff | 3707 | hhrtim->Instance->sCommonRegs.ADC4R = pADCTriggerCfg->Trigger; |
bogdanm | 0:9b334a45a8ff | 3708 | } |
bogdanm | 0:9b334a45a8ff | 3709 | break; |
bogdanm | 0:9b334a45a8ff | 3710 | } |
bogdanm | 0:9b334a45a8ff | 3711 | |
bogdanm | 0:9b334a45a8ff | 3712 | /* Update the HRTIM registers */ |
bogdanm | 0:9b334a45a8ff | 3713 | hhrtim->Instance->sCommonRegs.CR1 = hrtim_cr1; |
bogdanm | 0:9b334a45a8ff | 3714 | |
bogdanm | 0:9b334a45a8ff | 3715 | hhrtim->State = HAL_HRTIM_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 3716 | |
bogdanm | 0:9b334a45a8ff | 3717 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 3718 | __HAL_UNLOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 3719 | |
bogdanm | 0:9b334a45a8ff | 3720 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 3721 | } |
bogdanm | 0:9b334a45a8ff | 3722 | |
bogdanm | 0:9b334a45a8ff | 3723 | /** |
bogdanm | 0:9b334a45a8ff | 3724 | * @} |
bogdanm | 0:9b334a45a8ff | 3725 | */ |
bogdanm | 0:9b334a45a8ff | 3726 | |
bogdanm | 0:9b334a45a8ff | 3727 | /** @defgroup HRTIM_Exported_Functions_Group8 Timer waveform configuration and functions |
bogdanm | 0:9b334a45a8ff | 3728 | * @brief Functions used to configure and control a HRTIM timer |
bogdanm | 0:9b334a45a8ff | 3729 | * operating in waveform mode. |
bogdanm | 0:9b334a45a8ff | 3730 | * |
bogdanm | 0:9b334a45a8ff | 3731 | @verbatim |
bogdanm | 0:9b334a45a8ff | 3732 | =============================================================================== |
bogdanm | 0:9b334a45a8ff | 3733 | ##### HRTIM timer configuration and control functions ##### |
bogdanm | 0:9b334a45a8ff | 3734 | =============================================================================== |
bogdanm | 0:9b334a45a8ff | 3735 | [..] This section provides functions allowing to: |
bogdanm | 0:9b334a45a8ff | 3736 | (+) Configure HRTIM timer general behavior |
bogdanm | 0:9b334a45a8ff | 3737 | (+) Configure HRTIM timer event filtering |
bogdanm | 0:9b334a45a8ff | 3738 | (+) Configure HRTIM timer deadtime insertion |
bogdanm | 0:9b334a45a8ff | 3739 | (+) Configure HRTIM timer chopper mode |
bogdanm | 0:9b334a45a8ff | 3740 | (+) Configure HRTIM timer burst DMA |
bogdanm | 0:9b334a45a8ff | 3741 | (+) Configure HRTIM timer compare unit |
bogdanm | 0:9b334a45a8ff | 3742 | (+) Configure HRTIM timer capture unit |
bogdanm | 0:9b334a45a8ff | 3743 | (+) Configure HRTIM timer output |
bogdanm | 0:9b334a45a8ff | 3744 | (+) Set HRTIM timer output level |
bogdanm | 0:9b334a45a8ff | 3745 | (+) Enable HRTIM timer output |
bogdanm | 0:9b334a45a8ff | 3746 | (+) Disable HRTIM timer output |
bogdanm | 0:9b334a45a8ff | 3747 | (+) Start HRTIM timer |
bogdanm | 0:9b334a45a8ff | 3748 | (+) Stop HRTIM timer |
bogdanm | 0:9b334a45a8ff | 3749 | (+) Start HRTIM timer and enable interrupt |
bogdanm | 0:9b334a45a8ff | 3750 | (+) Stop HRTIM timer and disable interrupt |
bogdanm | 0:9b334a45a8ff | 3751 | (+) Start HRTIM timer and enable DMA transfer |
bogdanm | 0:9b334a45a8ff | 3752 | (+) Stop HRTIM timer and disable DMA transfer |
bogdanm | 0:9b334a45a8ff | 3753 | (+) Enable or disable the burst mode controller |
bogdanm | 0:9b334a45a8ff | 3754 | (+) Start the burst mode controller (by software) |
bogdanm | 0:9b334a45a8ff | 3755 | (+) Trigger a Capture (by software) |
bogdanm | 0:9b334a45a8ff | 3756 | (+) Update the HRTIM timer preloadable registers (by software) |
bogdanm | 0:9b334a45a8ff | 3757 | (+) Reset the HRTIM timer counter (by software) |
bogdanm | 0:9b334a45a8ff | 3758 | (+) Start a burst DMA transfer |
bogdanm | 0:9b334a45a8ff | 3759 | (+) Enable timer register update |
bogdanm | 0:9b334a45a8ff | 3760 | (+) Disable timer register update |
bogdanm | 0:9b334a45a8ff | 3761 | |
bogdanm | 0:9b334a45a8ff | 3762 | @endverbatim |
bogdanm | 0:9b334a45a8ff | 3763 | * @{ |
bogdanm | 0:9b334a45a8ff | 3764 | */ |
bogdanm | 0:9b334a45a8ff | 3765 | |
bogdanm | 0:9b334a45a8ff | 3766 | /** |
bogdanm | 0:9b334a45a8ff | 3767 | * @brief Configures the general behavior of a timer operating in waveform mode |
bogdanm | 0:9b334a45a8ff | 3768 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 3769 | * @param TimerIdx: Timer index |
bogdanm | 0:9b334a45a8ff | 3770 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 3771 | * @arg HRTIM_TIMERINDEX_MASTER for master timer |
bogdanm | 0:9b334a45a8ff | 3772 | * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
bogdanm | 0:9b334a45a8ff | 3773 | * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
bogdanm | 0:9b334a45a8ff | 3774 | * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
bogdanm | 0:9b334a45a8ff | 3775 | * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
bogdanm | 0:9b334a45a8ff | 3776 | * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
bogdanm | 0:9b334a45a8ff | 3777 | * @param pTimerCfg: pointer to the timer configuration structure |
bogdanm | 0:9b334a45a8ff | 3778 | * @note When the timer operates in waveform mode, all the features supported by |
bogdanm | 0:9b334a45a8ff | 3779 | * the HRTIM are available without any limitation. |
bogdanm | 0:9b334a45a8ff | 3780 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 3781 | * @note This function must be called before starting the timer |
bogdanm | 0:9b334a45a8ff | 3782 | */ |
bogdanm | 0:9b334a45a8ff | 3783 | HAL_StatusTypeDef HAL_HRTIM_WaveformTimerConfig(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 3784 | uint32_t TimerIdx, |
bogdanm | 0:9b334a45a8ff | 3785 | HRTIM_TimerCfgTypeDef * pTimerCfg) |
bogdanm | 0:9b334a45a8ff | 3786 | { |
bogdanm | 0:9b334a45a8ff | 3787 | /* Check parameters */ |
bogdanm | 0:9b334a45a8ff | 3788 | assert_param(IS_HRTIM_TIMERINDEX(TimerIdx)); |
bogdanm | 0:9b334a45a8ff | 3789 | |
bogdanm | 0:9b334a45a8ff | 3790 | /* Relevant for all HRTIM timers, including the master */ |
bogdanm | 0:9b334a45a8ff | 3791 | assert_param(IS_HRTIM_HALFMODE(pTimerCfg->HalfModeEnable)); |
bogdanm | 0:9b334a45a8ff | 3792 | assert_param(IS_HRTIM_SYNCSTART(pTimerCfg->StartOnSync)); |
bogdanm | 0:9b334a45a8ff | 3793 | assert_param(IS_HRTIM_SYNCRESET(pTimerCfg->ResetOnSync)); |
bogdanm | 0:9b334a45a8ff | 3794 | assert_param(IS_HHRTIM_DACSYNC(pTimerCfg->DACSynchro)); |
bogdanm | 0:9b334a45a8ff | 3795 | assert_param(IS_HRTIM_PRELOAD(pTimerCfg->PreloadEnable)); |
bogdanm | 0:9b334a45a8ff | 3796 | assert_param(IS_HRTIM_TIMERBURSTMODE(pTimerCfg->BurstMode)); |
bogdanm | 0:9b334a45a8ff | 3797 | assert_param(IS_HRTIM_UPDATEONREPETITION(pTimerCfg->RepetitionUpdate)); |
bogdanm | 0:9b334a45a8ff | 3798 | |
bogdanm | 0:9b334a45a8ff | 3799 | if(hhrtim->State == HAL_HRTIM_STATE_BUSY) |
bogdanm | 0:9b334a45a8ff | 3800 | { |
bogdanm | 0:9b334a45a8ff | 3801 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 3802 | } |
bogdanm | 0:9b334a45a8ff | 3803 | |
bogdanm | 0:9b334a45a8ff | 3804 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 3805 | __HAL_LOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 3806 | |
bogdanm | 0:9b334a45a8ff | 3807 | hhrtim->State = HAL_HRTIM_STATE_BUSY; |
bogdanm | 0:9b334a45a8ff | 3808 | |
bogdanm | 0:9b334a45a8ff | 3809 | if (TimerIdx == HRTIM_TIMERINDEX_MASTER) |
bogdanm | 0:9b334a45a8ff | 3810 | { |
bogdanm | 0:9b334a45a8ff | 3811 | /* Check parameters */ |
bogdanm | 0:9b334a45a8ff | 3812 | assert_param(IS_HRTIM_UPDATEGATING_MASTER(pTimerCfg->UpdateGating)); |
bogdanm | 0:9b334a45a8ff | 3813 | assert_param(IS_HRTIM_MASTER_IT(pTimerCfg->InterruptRequests)); |
bogdanm | 0:9b334a45a8ff | 3814 | assert_param(IS_HRTIM_MASTER_DMA(pTimerCfg->DMARequests)); |
bogdanm | 0:9b334a45a8ff | 3815 | |
bogdanm | 0:9b334a45a8ff | 3816 | /* Configure master timer */ |
bogdanm | 0:9b334a45a8ff | 3817 | HRTIM_MasterWaveform_Config(hhrtim, pTimerCfg); |
bogdanm | 0:9b334a45a8ff | 3818 | } |
bogdanm | 0:9b334a45a8ff | 3819 | else |
bogdanm | 0:9b334a45a8ff | 3820 | { |
bogdanm | 0:9b334a45a8ff | 3821 | /* Check parameters */ |
bogdanm | 0:9b334a45a8ff | 3822 | assert_param(IS_HRTIM_UPDATEGATING_TIM(pTimerCfg->UpdateGating)); |
bogdanm | 0:9b334a45a8ff | 3823 | assert_param(IS_HRTIM_TIM_IT(pTimerCfg->InterruptRequests)); |
bogdanm | 0:9b334a45a8ff | 3824 | assert_param(IS_HRTIM_TIM_DMA(pTimerCfg->DMARequests)); |
bogdanm | 0:9b334a45a8ff | 3825 | assert_param(IS_HRTIM_TIMPUSHPULLMODE(pTimerCfg->PushPull)); |
bogdanm | 0:9b334a45a8ff | 3826 | assert_param(IS_HRTIM_TIMFAULTENABLE(pTimerCfg->FaultEnable)); |
bogdanm | 0:9b334a45a8ff | 3827 | assert_param(IS_HRTIM_TIMFAULTLOCK(pTimerCfg->FaultLock)); |
bogdanm | 0:9b334a45a8ff | 3828 | assert_param(IS_HRTIM_TIMDEADTIMEINSERTION(pTimerCfg->PushPull, |
bogdanm | 0:9b334a45a8ff | 3829 | pTimerCfg->DeadTimeInsertion)); |
bogdanm | 0:9b334a45a8ff | 3830 | assert_param(IS_HRTIM_TIMDELAYEDPROTECTION(pTimerCfg->PushPull, |
bogdanm | 0:9b334a45a8ff | 3831 | pTimerCfg->DelayedProtectionMode)); |
bogdanm | 0:9b334a45a8ff | 3832 | assert_param(IS_HRTIM_TIMUPDATETRIGGER(pTimerCfg->UpdateTrigger)); |
bogdanm | 0:9b334a45a8ff | 3833 | assert_param(IS_HRTIM_TIMRESETTRIGGER(pTimerCfg->ResetTrigger)); |
bogdanm | 0:9b334a45a8ff | 3834 | assert_param(IS_HRTIM_TIMUPDATEONRESET(pTimerCfg->ResetUpdate)); |
bogdanm | 0:9b334a45a8ff | 3835 | |
bogdanm | 0:9b334a45a8ff | 3836 | /* Configure timing unit */ |
bogdanm | 0:9b334a45a8ff | 3837 | HRTIM_TimingUnitWaveform_Config(hhrtim, TimerIdx, pTimerCfg); |
bogdanm | 0:9b334a45a8ff | 3838 | } |
bogdanm | 0:9b334a45a8ff | 3839 | |
bogdanm | 0:9b334a45a8ff | 3840 | /* Update timer parameters */ |
bogdanm | 0:9b334a45a8ff | 3841 | hhrtim->TimerParam[TimerIdx].InterruptRequests = pTimerCfg->InterruptRequests; |
bogdanm | 0:9b334a45a8ff | 3842 | hhrtim->TimerParam[TimerIdx].DMARequests = pTimerCfg->DMARequests; |
bogdanm | 0:9b334a45a8ff | 3843 | hhrtim->TimerParam[TimerIdx].DMASrcAddress = pTimerCfg->DMASrcAddress; |
bogdanm | 0:9b334a45a8ff | 3844 | hhrtim->TimerParam[TimerIdx].DMADstAddress = pTimerCfg->DMADstAddress; |
bogdanm | 0:9b334a45a8ff | 3845 | hhrtim->TimerParam[TimerIdx].DMASize = pTimerCfg->DMASize; |
bogdanm | 0:9b334a45a8ff | 3846 | |
bogdanm | 0:9b334a45a8ff | 3847 | /* Force a software update */ |
bogdanm | 0:9b334a45a8ff | 3848 | HRTIM_ForceRegistersUpdate(hhrtim, TimerIdx); |
bogdanm | 0:9b334a45a8ff | 3849 | |
bogdanm | 0:9b334a45a8ff | 3850 | hhrtim->State = HAL_HRTIM_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 3851 | |
bogdanm | 0:9b334a45a8ff | 3852 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 3853 | __HAL_UNLOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 3854 | |
bogdanm | 0:9b334a45a8ff | 3855 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 3856 | } |
bogdanm | 0:9b334a45a8ff | 3857 | |
bogdanm | 0:9b334a45a8ff | 3858 | /** |
bogdanm | 0:9b334a45a8ff | 3859 | * @brief Configures the event filtering capabilities of a timer (blanking, windowing) |
bogdanm | 0:9b334a45a8ff | 3860 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 3861 | * @param TimerIdx: Timer index |
bogdanm | 0:9b334a45a8ff | 3862 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 3863 | * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
bogdanm | 0:9b334a45a8ff | 3864 | * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
bogdanm | 0:9b334a45a8ff | 3865 | * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
bogdanm | 0:9b334a45a8ff | 3866 | * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
bogdanm | 0:9b334a45a8ff | 3867 | * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
bogdanm | 0:9b334a45a8ff | 3868 | * @param Event: external event for which timer event filtering must be configured |
bogdanm | 0:9b334a45a8ff | 3869 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 3870 | * @arg HRTIM_EVENT_NONE: Reset timer event filtering configuration |
bogdanm | 0:9b334a45a8ff | 3871 | * @arg HRTIM_EVENT_1: External event 1 |
bogdanm | 0:9b334a45a8ff | 3872 | * @arg HRTIM_EVENT_2: External event 2 |
bogdanm | 0:9b334a45a8ff | 3873 | * @arg HRTIM_EVENT_3: External event 3 |
bogdanm | 0:9b334a45a8ff | 3874 | * @arg HRTIM_EVENT_4: External event 4 |
bogdanm | 0:9b334a45a8ff | 3875 | * @arg HRTIM_EVENT_5: External event 5 |
bogdanm | 0:9b334a45a8ff | 3876 | * @arg HRTIM_EVENT_6: External event 6 |
bogdanm | 0:9b334a45a8ff | 3877 | * @arg HRTIM_EVENT_7: External event 7 |
bogdanm | 0:9b334a45a8ff | 3878 | * @arg HRTIM_EVENT_8: External event 8 |
bogdanm | 0:9b334a45a8ff | 3879 | * @arg HRTIM_EVENT_9: External event 9 |
bogdanm | 0:9b334a45a8ff | 3880 | * @arg HRTIM_EVENT_10: External event 10 |
bogdanm | 0:9b334a45a8ff | 3881 | * @param pTimerEventFilteringCfg: pointer to the timer event filtering configuration structure |
bogdanm | 0:9b334a45a8ff | 3882 | * @note This function must be called before starting the timer |
bogdanm | 0:9b334a45a8ff | 3883 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 3884 | */ |
bogdanm | 0:9b334a45a8ff | 3885 | HAL_StatusTypeDef HAL_HRTIM_TimerEventFilteringConfig(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 3886 | uint32_t TimerIdx, |
bogdanm | 0:9b334a45a8ff | 3887 | uint32_t Event, |
bogdanm | 0:9b334a45a8ff | 3888 | HRTIM_TimerEventFilteringCfgTypeDef* pTimerEventFilteringCfg) |
bogdanm | 0:9b334a45a8ff | 3889 | { |
bogdanm | 0:9b334a45a8ff | 3890 | uint32_t hrtim_eefr; |
bogdanm | 0:9b334a45a8ff | 3891 | |
bogdanm | 0:9b334a45a8ff | 3892 | /* Check parameters */ |
bogdanm | 0:9b334a45a8ff | 3893 | assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx)); |
bogdanm | 0:9b334a45a8ff | 3894 | assert_param(IS_HRTIM_EVENT(Event)); |
bogdanm | 0:9b334a45a8ff | 3895 | assert_param(IS_HRTIM_TIMEVENTFILTER(pTimerEventFilteringCfg->Filter)); |
bogdanm | 0:9b334a45a8ff | 3896 | assert_param(IS_HRTIM_TIMEVENTLATCH(pTimerEventFilteringCfg->Latch)); |
bogdanm | 0:9b334a45a8ff | 3897 | |
bogdanm | 0:9b334a45a8ff | 3898 | if(hhrtim->State == HAL_HRTIM_STATE_BUSY) |
bogdanm | 0:9b334a45a8ff | 3899 | { |
bogdanm | 0:9b334a45a8ff | 3900 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 3901 | } |
bogdanm | 0:9b334a45a8ff | 3902 | |
bogdanm | 0:9b334a45a8ff | 3903 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 3904 | __HAL_LOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 3905 | |
bogdanm | 0:9b334a45a8ff | 3906 | hhrtim->State = HAL_HRTIM_STATE_BUSY; |
bogdanm | 0:9b334a45a8ff | 3907 | |
bogdanm | 0:9b334a45a8ff | 3908 | /* Configure timer event filtering capabilities */ |
bogdanm | 0:9b334a45a8ff | 3909 | switch (Event) |
bogdanm | 0:9b334a45a8ff | 3910 | { |
bogdanm | 0:9b334a45a8ff | 3911 | case HRTIM_EVENT_NONE: |
bogdanm | 0:9b334a45a8ff | 3912 | { |
bogdanm | 0:9b334a45a8ff | 3913 | hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR1 = 0; |
bogdanm | 0:9b334a45a8ff | 3914 | hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR2 = 0; |
bogdanm | 0:9b334a45a8ff | 3915 | } |
bogdanm | 0:9b334a45a8ff | 3916 | break; |
bogdanm | 0:9b334a45a8ff | 3917 | case HRTIM_EVENT_1: |
bogdanm | 0:9b334a45a8ff | 3918 | { |
bogdanm | 0:9b334a45a8ff | 3919 | hrtim_eefr = hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR1; |
bogdanm | 0:9b334a45a8ff | 3920 | hrtim_eefr &= ~(HRTIM_EEFR1_EE1FLTR | HRTIM_EEFR1_EE1LTCH); |
bogdanm | 0:9b334a45a8ff | 3921 | hrtim_eefr |= (pTimerEventFilteringCfg->Filter | pTimerEventFilteringCfg->Latch); |
bogdanm | 0:9b334a45a8ff | 3922 | hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR1 = hrtim_eefr; |
bogdanm | 0:9b334a45a8ff | 3923 | } |
bogdanm | 0:9b334a45a8ff | 3924 | break; |
bogdanm | 0:9b334a45a8ff | 3925 | case HRTIM_EVENT_2: |
bogdanm | 0:9b334a45a8ff | 3926 | { |
bogdanm | 0:9b334a45a8ff | 3927 | hrtim_eefr = hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR1; |
bogdanm | 0:9b334a45a8ff | 3928 | hrtim_eefr &= ~(HRTIM_EEFR1_EE2FLTR | HRTIM_EEFR1_EE2LTCH); |
bogdanm | 0:9b334a45a8ff | 3929 | hrtim_eefr |= ((pTimerEventFilteringCfg->Filter | pTimerEventFilteringCfg->Latch) << 6); |
bogdanm | 0:9b334a45a8ff | 3930 | hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR1 = hrtim_eefr; |
bogdanm | 0:9b334a45a8ff | 3931 | } |
bogdanm | 0:9b334a45a8ff | 3932 | break; |
bogdanm | 0:9b334a45a8ff | 3933 | case HRTIM_EVENT_3: |
bogdanm | 0:9b334a45a8ff | 3934 | { |
bogdanm | 0:9b334a45a8ff | 3935 | hrtim_eefr = hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR1; |
bogdanm | 0:9b334a45a8ff | 3936 | hrtim_eefr &= ~(HRTIM_EEFR1_EE3FLTR | HRTIM_EEFR1_EE3LTCH); |
bogdanm | 0:9b334a45a8ff | 3937 | hrtim_eefr |= ((pTimerEventFilteringCfg->Filter | pTimerEventFilteringCfg->Latch) << 12); |
bogdanm | 0:9b334a45a8ff | 3938 | hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR1 = hrtim_eefr; |
bogdanm | 0:9b334a45a8ff | 3939 | } |
bogdanm | 0:9b334a45a8ff | 3940 | break; |
bogdanm | 0:9b334a45a8ff | 3941 | case HRTIM_EVENT_4: |
bogdanm | 0:9b334a45a8ff | 3942 | { |
bogdanm | 0:9b334a45a8ff | 3943 | hrtim_eefr = hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR1; |
bogdanm | 0:9b334a45a8ff | 3944 | hrtim_eefr &= ~(HRTIM_EEFR1_EE4FLTR | HRTIM_EEFR1_EE4LTCH); |
bogdanm | 0:9b334a45a8ff | 3945 | hrtim_eefr |= ((pTimerEventFilteringCfg->Filter | pTimerEventFilteringCfg->Latch) << 18); |
bogdanm | 0:9b334a45a8ff | 3946 | hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR1 = hrtim_eefr; |
bogdanm | 0:9b334a45a8ff | 3947 | } |
bogdanm | 0:9b334a45a8ff | 3948 | break; |
bogdanm | 0:9b334a45a8ff | 3949 | case HRTIM_EVENT_5: |
bogdanm | 0:9b334a45a8ff | 3950 | { |
bogdanm | 0:9b334a45a8ff | 3951 | hrtim_eefr = hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR1; |
bogdanm | 0:9b334a45a8ff | 3952 | hrtim_eefr &= ~(HRTIM_EEFR1_EE5FLTR | HRTIM_EEFR1_EE5LTCH); |
bogdanm | 0:9b334a45a8ff | 3953 | hrtim_eefr |= ((pTimerEventFilteringCfg->Filter | pTimerEventFilteringCfg->Latch) << 24); |
bogdanm | 0:9b334a45a8ff | 3954 | hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR1 = hrtim_eefr; |
bogdanm | 0:9b334a45a8ff | 3955 | } |
bogdanm | 0:9b334a45a8ff | 3956 | break; |
bogdanm | 0:9b334a45a8ff | 3957 | case HRTIM_EVENT_6: |
bogdanm | 0:9b334a45a8ff | 3958 | { |
bogdanm | 0:9b334a45a8ff | 3959 | hrtim_eefr = hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR2; |
bogdanm | 0:9b334a45a8ff | 3960 | hrtim_eefr &= ~(HRTIM_EEFR2_EE6FLTR | HRTIM_EEFR2_EE6LTCH); |
bogdanm | 0:9b334a45a8ff | 3961 | hrtim_eefr |= (pTimerEventFilteringCfg->Filter | pTimerEventFilteringCfg->Latch); |
bogdanm | 0:9b334a45a8ff | 3962 | hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR2 = hrtim_eefr; |
bogdanm | 0:9b334a45a8ff | 3963 | } |
bogdanm | 0:9b334a45a8ff | 3964 | break; |
bogdanm | 0:9b334a45a8ff | 3965 | case HRTIM_EVENT_7: |
bogdanm | 0:9b334a45a8ff | 3966 | { |
bogdanm | 0:9b334a45a8ff | 3967 | hrtim_eefr = hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR2; |
bogdanm | 0:9b334a45a8ff | 3968 | hrtim_eefr &= ~(HRTIM_EEFR2_EE7FLTR | HRTIM_EEFR2_EE7LTCH); |
bogdanm | 0:9b334a45a8ff | 3969 | hrtim_eefr |= ((pTimerEventFilteringCfg->Filter | pTimerEventFilteringCfg->Latch) << 6); |
bogdanm | 0:9b334a45a8ff | 3970 | hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR2 = hrtim_eefr; |
bogdanm | 0:9b334a45a8ff | 3971 | } |
bogdanm | 0:9b334a45a8ff | 3972 | break; |
bogdanm | 0:9b334a45a8ff | 3973 | case HRTIM_EVENT_8: |
bogdanm | 0:9b334a45a8ff | 3974 | { |
bogdanm | 0:9b334a45a8ff | 3975 | hrtim_eefr = hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR2; |
bogdanm | 0:9b334a45a8ff | 3976 | hrtim_eefr &= ~(HRTIM_EEFR2_EE8FLTR | HRTIM_EEFR2_EE8LTCH); |
bogdanm | 0:9b334a45a8ff | 3977 | hrtim_eefr |= ((pTimerEventFilteringCfg->Filter | pTimerEventFilteringCfg->Latch) << 12); |
bogdanm | 0:9b334a45a8ff | 3978 | hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR2 = hrtim_eefr; |
bogdanm | 0:9b334a45a8ff | 3979 | } |
bogdanm | 0:9b334a45a8ff | 3980 | break; |
bogdanm | 0:9b334a45a8ff | 3981 | case HRTIM_EVENT_9: |
bogdanm | 0:9b334a45a8ff | 3982 | { |
bogdanm | 0:9b334a45a8ff | 3983 | hrtim_eefr = hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR2; |
bogdanm | 0:9b334a45a8ff | 3984 | hrtim_eefr &= ~(HRTIM_EEFR2_EE9FLTR | HRTIM_EEFR2_EE9LTCH); |
bogdanm | 0:9b334a45a8ff | 3985 | hrtim_eefr |= ((pTimerEventFilteringCfg->Filter | pTimerEventFilteringCfg->Latch) << 18); |
bogdanm | 0:9b334a45a8ff | 3986 | hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR2 = hrtim_eefr; |
bogdanm | 0:9b334a45a8ff | 3987 | } |
bogdanm | 0:9b334a45a8ff | 3988 | break; |
bogdanm | 0:9b334a45a8ff | 3989 | case HRTIM_EVENT_10: |
bogdanm | 0:9b334a45a8ff | 3990 | { |
bogdanm | 0:9b334a45a8ff | 3991 | hrtim_eefr = hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR2; |
bogdanm | 0:9b334a45a8ff | 3992 | hrtim_eefr &= ~(HRTIM_EEFR2_EE10FLTR | HRTIM_EEFR2_EE10LTCH); |
bogdanm | 0:9b334a45a8ff | 3993 | hrtim_eefr |= ((pTimerEventFilteringCfg->Filter | pTimerEventFilteringCfg->Latch) << 24); |
bogdanm | 0:9b334a45a8ff | 3994 | hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR2 = hrtim_eefr; |
bogdanm | 0:9b334a45a8ff | 3995 | } |
bogdanm | 0:9b334a45a8ff | 3996 | break; |
bogdanm | 0:9b334a45a8ff | 3997 | } |
bogdanm | 0:9b334a45a8ff | 3998 | |
bogdanm | 0:9b334a45a8ff | 3999 | hhrtim->State = HAL_HRTIM_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 4000 | |
bogdanm | 0:9b334a45a8ff | 4001 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 4002 | __HAL_UNLOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 4003 | |
bogdanm | 0:9b334a45a8ff | 4004 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 4005 | } |
bogdanm | 0:9b334a45a8ff | 4006 | |
bogdanm | 0:9b334a45a8ff | 4007 | /** |
bogdanm | 0:9b334a45a8ff | 4008 | * @brief Configures the deadtime insertion feature for a timer |
bogdanm | 0:9b334a45a8ff | 4009 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 4010 | * @param TimerIdx: Timer index |
bogdanm | 0:9b334a45a8ff | 4011 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 4012 | * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
bogdanm | 0:9b334a45a8ff | 4013 | * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
bogdanm | 0:9b334a45a8ff | 4014 | * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
bogdanm | 0:9b334a45a8ff | 4015 | * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
bogdanm | 0:9b334a45a8ff | 4016 | * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
bogdanm | 0:9b334a45a8ff | 4017 | * @param pDeadTimeCfg: pointer to the deadtime insertion configuration structure |
bogdanm | 0:9b334a45a8ff | 4018 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 4019 | * @note This function must be called before starting the timer |
bogdanm | 0:9b334a45a8ff | 4020 | */ |
bogdanm | 0:9b334a45a8ff | 4021 | HAL_StatusTypeDef HAL_HRTIM_DeadTimeConfig(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 4022 | uint32_t TimerIdx, |
bogdanm | 0:9b334a45a8ff | 4023 | HRTIM_DeadTimeCfgTypeDef* pDeadTimeCfg) |
bogdanm | 0:9b334a45a8ff | 4024 | { |
bogdanm | 0:9b334a45a8ff | 4025 | uint32_t hrtim_dtr; |
bogdanm | 0:9b334a45a8ff | 4026 | |
bogdanm | 0:9b334a45a8ff | 4027 | /* Check parameters */ |
bogdanm | 0:9b334a45a8ff | 4028 | assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx)); |
bogdanm | 0:9b334a45a8ff | 4029 | assert_param(IS_HRTIM_TIMDEADTIME_PRESCALERRATIO(pDeadTimeCfg->Prescaler)); |
bogdanm | 0:9b334a45a8ff | 4030 | assert_param(IS_HRTIM_TIMDEADTIME_RISINGSIGN(pDeadTimeCfg->RisingSign)); |
bogdanm | 0:9b334a45a8ff | 4031 | assert_param(IS_HRTIM_TIMDEADTIME_RISINGLOCK(pDeadTimeCfg->RisingLock)); |
bogdanm | 0:9b334a45a8ff | 4032 | assert_param(IS_HRTIM_TIMDEADTIME_RISINGSIGNLOCK(pDeadTimeCfg->RisingSignLock)); |
bogdanm | 0:9b334a45a8ff | 4033 | assert_param(IS_HRTIM_TIMDEADTIME_FALLINGSIGN(pDeadTimeCfg->FallingSign)); |
bogdanm | 0:9b334a45a8ff | 4034 | assert_param(IS_HRTIM_TIMDEADTIME_FALLINGLOCK(pDeadTimeCfg->FallingLock)); |
bogdanm | 0:9b334a45a8ff | 4035 | assert_param(IS_HRTIM_TIMDEADTIME_FALLINGSIGNLOCK(pDeadTimeCfg->FallingSignLock)); |
bogdanm | 0:9b334a45a8ff | 4036 | |
bogdanm | 0:9b334a45a8ff | 4037 | if(hhrtim->State == HAL_HRTIM_STATE_BUSY) |
bogdanm | 0:9b334a45a8ff | 4038 | { |
bogdanm | 0:9b334a45a8ff | 4039 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 4040 | } |
bogdanm | 0:9b334a45a8ff | 4041 | |
bogdanm | 0:9b334a45a8ff | 4042 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 4043 | __HAL_LOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 4044 | |
bogdanm | 0:9b334a45a8ff | 4045 | hhrtim->State = HAL_HRTIM_STATE_BUSY; |
bogdanm | 0:9b334a45a8ff | 4046 | |
bogdanm | 0:9b334a45a8ff | 4047 | hrtim_dtr = hhrtim->Instance->sTimerxRegs[TimerIdx].DTxR; |
bogdanm | 0:9b334a45a8ff | 4048 | |
bogdanm | 0:9b334a45a8ff | 4049 | /* Clear timer deadtime configuration */ |
bogdanm | 0:9b334a45a8ff | 4050 | hrtim_dtr &= ~(HRTIM_DTR_DTR | HRTIM_DTR_SDTR | HRTIM_DTR_DTPRSC | |
bogdanm | 0:9b334a45a8ff | 4051 | HRTIM_DTR_DTRSLK | HRTIM_DTR_DTRLK | HRTIM_DTR_DTF | |
bogdanm | 0:9b334a45a8ff | 4052 | HRTIM_DTR_SDTF | HRTIM_DTR_DTFSLK | HRTIM_DTR_DTFLK); |
bogdanm | 0:9b334a45a8ff | 4053 | |
bogdanm | 0:9b334a45a8ff | 4054 | /* Set timer deadtime configuration */ |
bogdanm | 0:9b334a45a8ff | 4055 | hrtim_dtr |= pDeadTimeCfg->Prescaler; |
bogdanm | 0:9b334a45a8ff | 4056 | hrtim_dtr |= pDeadTimeCfg->RisingValue; |
bogdanm | 0:9b334a45a8ff | 4057 | hrtim_dtr |= pDeadTimeCfg->RisingSign; |
bogdanm | 0:9b334a45a8ff | 4058 | hrtim_dtr |= pDeadTimeCfg->RisingSignLock; |
bogdanm | 0:9b334a45a8ff | 4059 | hrtim_dtr |= pDeadTimeCfg->RisingLock; |
bogdanm | 0:9b334a45a8ff | 4060 | hrtim_dtr |= (pDeadTimeCfg->FallingValue << 16); |
bogdanm | 0:9b334a45a8ff | 4061 | hrtim_dtr |= pDeadTimeCfg->FallingSign; |
bogdanm | 0:9b334a45a8ff | 4062 | hrtim_dtr |= pDeadTimeCfg->FallingSignLock; |
bogdanm | 0:9b334a45a8ff | 4063 | hrtim_dtr |= pDeadTimeCfg->FallingLock; |
bogdanm | 0:9b334a45a8ff | 4064 | |
bogdanm | 0:9b334a45a8ff | 4065 | /* Update the HRTIM registers */ |
bogdanm | 0:9b334a45a8ff | 4066 | hhrtim->Instance->sTimerxRegs[TimerIdx].DTxR = hrtim_dtr; |
bogdanm | 0:9b334a45a8ff | 4067 | |
bogdanm | 0:9b334a45a8ff | 4068 | hhrtim->State = HAL_HRTIM_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 4069 | |
bogdanm | 0:9b334a45a8ff | 4070 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 4071 | __HAL_UNLOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 4072 | |
bogdanm | 0:9b334a45a8ff | 4073 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 4074 | } |
bogdanm | 0:9b334a45a8ff | 4075 | |
bogdanm | 0:9b334a45a8ff | 4076 | /** |
bogdanm | 0:9b334a45a8ff | 4077 | * @brief Configures the chopper mode feature for a timer |
bogdanm | 0:9b334a45a8ff | 4078 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 4079 | * @param TimerIdx: Timer index |
bogdanm | 0:9b334a45a8ff | 4080 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 4081 | * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
bogdanm | 0:9b334a45a8ff | 4082 | * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
bogdanm | 0:9b334a45a8ff | 4083 | * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
bogdanm | 0:9b334a45a8ff | 4084 | * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
bogdanm | 0:9b334a45a8ff | 4085 | * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
bogdanm | 0:9b334a45a8ff | 4086 | * @param pChopperModeCfg: pointer to the chopper mode configuration structure |
bogdanm | 0:9b334a45a8ff | 4087 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 4088 | * @note This function must be called before configuring the timer output(s) |
bogdanm | 0:9b334a45a8ff | 4089 | */ |
bogdanm | 0:9b334a45a8ff | 4090 | HAL_StatusTypeDef HAL_HRTIM_ChopperModeConfig(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 4091 | uint32_t TimerIdx, |
bogdanm | 0:9b334a45a8ff | 4092 | HRTIM_ChopperModeCfgTypeDef* pChopperModeCfg) |
bogdanm | 0:9b334a45a8ff | 4093 | { |
bogdanm | 0:9b334a45a8ff | 4094 | uint32_t hrtim_chpr; |
bogdanm | 0:9b334a45a8ff | 4095 | |
bogdanm | 0:9b334a45a8ff | 4096 | /* Check parameters */ |
bogdanm | 0:9b334a45a8ff | 4097 | assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx)); |
bogdanm | 0:9b334a45a8ff | 4098 | assert_param(IS_HRTIM_CHOPPER_PRESCALERRATIO(pChopperModeCfg->CarrierFreq)); |
bogdanm | 0:9b334a45a8ff | 4099 | assert_param(IS_HRTIM_CHOPPER_DUTYCYCLE(pChopperModeCfg->DutyCycle)); |
bogdanm | 0:9b334a45a8ff | 4100 | assert_param(IS_HRTIM_CHOPPER_PULSEWIDTH(pChopperModeCfg->StartPulse)); |
bogdanm | 0:9b334a45a8ff | 4101 | |
bogdanm | 0:9b334a45a8ff | 4102 | if(hhrtim->State == HAL_HRTIM_STATE_BUSY) |
bogdanm | 0:9b334a45a8ff | 4103 | { |
bogdanm | 0:9b334a45a8ff | 4104 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 4105 | } |
bogdanm | 0:9b334a45a8ff | 4106 | |
bogdanm | 0:9b334a45a8ff | 4107 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 4108 | __HAL_LOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 4109 | |
bogdanm | 0:9b334a45a8ff | 4110 | hhrtim->State = HAL_HRTIM_STATE_BUSY; |
bogdanm | 0:9b334a45a8ff | 4111 | |
bogdanm | 0:9b334a45a8ff | 4112 | hrtim_chpr = hhrtim->Instance->sTimerxRegs[TimerIdx].CHPxR; |
bogdanm | 0:9b334a45a8ff | 4113 | |
bogdanm | 0:9b334a45a8ff | 4114 | /* Clear timer chopper mode configuration */ |
bogdanm | 0:9b334a45a8ff | 4115 | hrtim_chpr &= ~(HRTIM_CHPR_CARFRQ | HRTIM_CHPR_CARDTY | HRTIM_CHPR_STRPW); |
bogdanm | 0:9b334a45a8ff | 4116 | |
bogdanm | 0:9b334a45a8ff | 4117 | /* Set timer choppe mode configuration */ |
bogdanm | 0:9b334a45a8ff | 4118 | hrtim_chpr |= pChopperModeCfg->CarrierFreq; |
bogdanm | 0:9b334a45a8ff | 4119 | hrtim_chpr |= (pChopperModeCfg->DutyCycle); |
bogdanm | 0:9b334a45a8ff | 4120 | hrtim_chpr |= (pChopperModeCfg->StartPulse); |
bogdanm | 0:9b334a45a8ff | 4121 | |
bogdanm | 0:9b334a45a8ff | 4122 | /* Update the HRTIM registers */ |
bogdanm | 0:9b334a45a8ff | 4123 | hhrtim->Instance->sTimerxRegs[TimerIdx].CHPxR = hrtim_chpr; |
bogdanm | 0:9b334a45a8ff | 4124 | |
bogdanm | 0:9b334a45a8ff | 4125 | hhrtim->State = HAL_HRTIM_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 4126 | |
bogdanm | 0:9b334a45a8ff | 4127 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 4128 | __HAL_UNLOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 4129 | |
bogdanm | 0:9b334a45a8ff | 4130 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 4131 | } |
bogdanm | 0:9b334a45a8ff | 4132 | |
bogdanm | 0:9b334a45a8ff | 4133 | /** |
bogdanm | 0:9b334a45a8ff | 4134 | * @brief Configures the burst DMA controller for a timer |
bogdanm | 0:9b334a45a8ff | 4135 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 4136 | * @param TimerIdx: Timer index |
bogdanm | 0:9b334a45a8ff | 4137 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 4138 | * @arg HRTIM_TIMERINDEX_MASTER for master timer |
bogdanm | 0:9b334a45a8ff | 4139 | * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
bogdanm | 0:9b334a45a8ff | 4140 | * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
bogdanm | 0:9b334a45a8ff | 4141 | * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
bogdanm | 0:9b334a45a8ff | 4142 | * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
bogdanm | 0:9b334a45a8ff | 4143 | * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
bogdanm | 0:9b334a45a8ff | 4144 | * @param RegistersToUpdate: registers to be written by DMA |
bogdanm | 0:9b334a45a8ff | 4145 | * This parameter can be any combination of the following values: |
bogdanm | 0:9b334a45a8ff | 4146 | * @arg HRTIM_BURSTDMA_CR: HRTIM_MCR or HRTIM_TIMxCR |
bogdanm | 0:9b334a45a8ff | 4147 | * @arg HRTIM_BURSTDMA_ICR: HRTIM_MICR or HRTIM_TIMxICR |
bogdanm | 0:9b334a45a8ff | 4148 | * @arg HRTIM_BURSTDMA_DIER: HRTIM_MDIER or HRTIM_TIMxDIER |
bogdanm | 0:9b334a45a8ff | 4149 | * @arg HRTIM_BURSTDMA_CNT: HRTIM_MCNT or HRTIM_TIMxCNT |
bogdanm | 0:9b334a45a8ff | 4150 | * @arg HRTIM_BURSTDMA_PER: HRTIM_MPER or HRTIM_TIMxPER |
bogdanm | 0:9b334a45a8ff | 4151 | * @arg HRTIM_BURSTDMA_REP: HRTIM_MREP or HRTIM_TIMxREP |
bogdanm | 0:9b334a45a8ff | 4152 | * @arg HRTIM_BURSTDMA_CMP1: HRTIM_MCMP1 or HRTIM_TIMxCMP1 |
bogdanm | 0:9b334a45a8ff | 4153 | * @arg HRTIM_BURSTDMA_CMP2: HRTIM_MCMP2 or HRTIM_TIMxCMP2 |
bogdanm | 0:9b334a45a8ff | 4154 | * @arg HRTIM_BURSTDMA_CMP3: HRTIM_MCMP3 or HRTIM_TIMxCMP3 |
bogdanm | 0:9b334a45a8ff | 4155 | * @arg HRTIM_BURSTDMA_CMP4: HRTIM_MCMP4 or HRTIM_TIMxCMP4 |
bogdanm | 0:9b334a45a8ff | 4156 | * @arg HRTIM_BURSTDMA_DTR: HRTIM_TIMxDTR |
bogdanm | 0:9b334a45a8ff | 4157 | * @arg HRTIM_BURSTDMA_SET1R: HRTIM_TIMxSET1R |
bogdanm | 0:9b334a45a8ff | 4158 | * @arg HRTIM_BURSTDMA_RST1R: HRTIM_TIMxRST1R |
bogdanm | 0:9b334a45a8ff | 4159 | * @arg HRTIM_BURSTDMA_SET2R: HRTIM_TIMxSET2R |
bogdanm | 0:9b334a45a8ff | 4160 | * @arg HRTIM_BURSTDMA_RST2R: HRTIM_TIMxRST2R |
bogdanm | 0:9b334a45a8ff | 4161 | * @arg HRTIM_BURSTDMA_EEFR1: HRTIM_TIMxEEFR1 |
bogdanm | 0:9b334a45a8ff | 4162 | * @arg HRTIM_BURSTDMA_EEFR2: HRTIM_TIMxEEFR2 |
bogdanm | 0:9b334a45a8ff | 4163 | * @arg HRTIM_BURSTDMA_RSTR: HRTIM_TIMxRSTR |
bogdanm | 0:9b334a45a8ff | 4164 | * @arg HRTIM_BURSTDMA_CHPR: HRTIM_TIMxCHPR |
bogdanm | 0:9b334a45a8ff | 4165 | * @arg HRTIM_BURSTDMA_OUTR: HRTIM_TIMxOUTR |
bogdanm | 0:9b334a45a8ff | 4166 | * @arg HRTIM_BURSTDMA_FLTR: HRTIM_TIMxFLTR |
bogdanm | 0:9b334a45a8ff | 4167 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 4168 | * @note This function must be called before starting the timer |
bogdanm | 0:9b334a45a8ff | 4169 | */ |
bogdanm | 0:9b334a45a8ff | 4170 | HAL_StatusTypeDef HAL_HRTIM_BurstDMAConfig(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 4171 | uint32_t TimerIdx, |
bogdanm | 0:9b334a45a8ff | 4172 | uint32_t RegistersToUpdate) |
bogdanm | 0:9b334a45a8ff | 4173 | { |
bogdanm | 0:9b334a45a8ff | 4174 | /* Check parameters */ |
bogdanm | 0:9b334a45a8ff | 4175 | assert_param(IS_HRTIM_TIMER_BURSTDMA(TimerIdx, RegistersToUpdate)); |
bogdanm | 0:9b334a45a8ff | 4176 | |
bogdanm | 0:9b334a45a8ff | 4177 | if(hhrtim->State == HAL_HRTIM_STATE_BUSY) |
bogdanm | 0:9b334a45a8ff | 4178 | { |
bogdanm | 0:9b334a45a8ff | 4179 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 4180 | } |
bogdanm | 0:9b334a45a8ff | 4181 | |
bogdanm | 0:9b334a45a8ff | 4182 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 4183 | __HAL_LOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 4184 | |
bogdanm | 0:9b334a45a8ff | 4185 | hhrtim->State = HAL_HRTIM_STATE_BUSY; |
bogdanm | 0:9b334a45a8ff | 4186 | |
bogdanm | 0:9b334a45a8ff | 4187 | /* Set the burst DMA timer update register */ |
bogdanm | 0:9b334a45a8ff | 4188 | switch (TimerIdx) |
bogdanm | 0:9b334a45a8ff | 4189 | { |
bogdanm | 0:9b334a45a8ff | 4190 | case HRTIM_TIMERINDEX_TIMER_A: |
bogdanm | 0:9b334a45a8ff | 4191 | { |
bogdanm | 0:9b334a45a8ff | 4192 | hhrtim->Instance->sCommonRegs.BDTAUPR = RegistersToUpdate; |
bogdanm | 0:9b334a45a8ff | 4193 | } |
bogdanm | 0:9b334a45a8ff | 4194 | break; |
bogdanm | 0:9b334a45a8ff | 4195 | case HRTIM_TIMERINDEX_TIMER_B: |
bogdanm | 0:9b334a45a8ff | 4196 | { |
bogdanm | 0:9b334a45a8ff | 4197 | hhrtim->Instance->sCommonRegs.BDTBUPR = RegistersToUpdate; |
bogdanm | 0:9b334a45a8ff | 4198 | } |
bogdanm | 0:9b334a45a8ff | 4199 | break; |
bogdanm | 0:9b334a45a8ff | 4200 | case HRTIM_TIMERINDEX_TIMER_C: |
bogdanm | 0:9b334a45a8ff | 4201 | { |
bogdanm | 0:9b334a45a8ff | 4202 | hhrtim->Instance->sCommonRegs.BDTCUPR = RegistersToUpdate; |
bogdanm | 0:9b334a45a8ff | 4203 | } |
bogdanm | 0:9b334a45a8ff | 4204 | break; |
bogdanm | 0:9b334a45a8ff | 4205 | case HRTIM_TIMERINDEX_TIMER_D: |
bogdanm | 0:9b334a45a8ff | 4206 | { |
bogdanm | 0:9b334a45a8ff | 4207 | hhrtim->Instance->sCommonRegs.BDTDUPR = RegistersToUpdate; |
bogdanm | 0:9b334a45a8ff | 4208 | } |
bogdanm | 0:9b334a45a8ff | 4209 | break; |
bogdanm | 0:9b334a45a8ff | 4210 | case HRTIM_TIMERINDEX_TIMER_E: |
bogdanm | 0:9b334a45a8ff | 4211 | { |
bogdanm | 0:9b334a45a8ff | 4212 | hhrtim->Instance->sCommonRegs.BDTEUPR = RegistersToUpdate; |
bogdanm | 0:9b334a45a8ff | 4213 | } |
bogdanm | 0:9b334a45a8ff | 4214 | break; |
bogdanm | 0:9b334a45a8ff | 4215 | case HRTIM_TIMERINDEX_MASTER: |
bogdanm | 0:9b334a45a8ff | 4216 | { |
bogdanm | 0:9b334a45a8ff | 4217 | hhrtim->Instance->sCommonRegs.BDMUPR = RegistersToUpdate; |
bogdanm | 0:9b334a45a8ff | 4218 | } |
bogdanm | 0:9b334a45a8ff | 4219 | break; |
bogdanm | 0:9b334a45a8ff | 4220 | } |
bogdanm | 0:9b334a45a8ff | 4221 | |
bogdanm | 0:9b334a45a8ff | 4222 | hhrtim->State = HAL_HRTIM_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 4223 | |
bogdanm | 0:9b334a45a8ff | 4224 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 4225 | __HAL_UNLOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 4226 | |
bogdanm | 0:9b334a45a8ff | 4227 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 4228 | } |
bogdanm | 0:9b334a45a8ff | 4229 | |
bogdanm | 0:9b334a45a8ff | 4230 | /** |
bogdanm | 0:9b334a45a8ff | 4231 | * @brief Configures the compare unit of a timer operating in waveform mode |
bogdanm | 0:9b334a45a8ff | 4232 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 4233 | * @param TimerIdx: Timer index |
bogdanm | 0:9b334a45a8ff | 4234 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 4235 | * @arg HRTIM_TIMERINDEX_MASTER for master timer |
bogdanm | 0:9b334a45a8ff | 4236 | * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
bogdanm | 0:9b334a45a8ff | 4237 | * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
bogdanm | 0:9b334a45a8ff | 4238 | * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
bogdanm | 0:9b334a45a8ff | 4239 | * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
bogdanm | 0:9b334a45a8ff | 4240 | * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
bogdanm | 0:9b334a45a8ff | 4241 | * @param CompareUnit: Compare unit to configure |
bogdanm | 0:9b334a45a8ff | 4242 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 4243 | * @arg HRTIM_COMPAREUNIT_1: Compare unit 1 |
bogdanm | 0:9b334a45a8ff | 4244 | * @arg HRTIM_COMPAREUNIT_2: Compare unit 2 |
bogdanm | 0:9b334a45a8ff | 4245 | * @arg HRTIM_COMPAREUNIT_3: Compare unit 3 |
bogdanm | 0:9b334a45a8ff | 4246 | * @arg HRTIM_COMPAREUNIT_4: Compare unit 4 |
bogdanm | 0:9b334a45a8ff | 4247 | * @param pCompareCfg: pointer to the compare unit configuration structure |
bogdanm | 0:9b334a45a8ff | 4248 | * @note When auto delayed mode is required for compare unit 2 or compare unit 4, |
bogdanm | 0:9b334a45a8ff | 4249 | * application has to configure separately the capture unit. Capture unit |
bogdanm | 0:9b334a45a8ff | 4250 | * to configure in that case depends on the compare unit auto delayed mode |
bogdanm | 0:9b334a45a8ff | 4251 | * is applied to (see below): |
bogdanm | 0:9b334a45a8ff | 4252 | * Auto delayed on output compare 2: capture unit 1 must be configured |
bogdanm | 0:9b334a45a8ff | 4253 | * Auto delayed on output compare 4: capture unit 2 must be configured |
bogdanm | 0:9b334a45a8ff | 4254 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 4255 | * @note This function must be called before starting the timer |
bogdanm | 0:9b334a45a8ff | 4256 | */ |
bogdanm | 0:9b334a45a8ff | 4257 | HAL_StatusTypeDef HAL_HRTIM_WaveformCompareConfig(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 4258 | uint32_t TimerIdx, |
bogdanm | 0:9b334a45a8ff | 4259 | uint32_t CompareUnit, |
bogdanm | 0:9b334a45a8ff | 4260 | HRTIM_CompareCfgTypeDef* pCompareCfg) |
bogdanm | 0:9b334a45a8ff | 4261 | { |
bogdanm | 0:9b334a45a8ff | 4262 | /* Check parameters */ |
bogdanm | 0:9b334a45a8ff | 4263 | assert_param(IS_HRTIM_TIMERINDEX(TimerIdx)); |
bogdanm | 0:9b334a45a8ff | 4264 | |
bogdanm | 0:9b334a45a8ff | 4265 | if(hhrtim->State == HAL_HRTIM_STATE_BUSY) |
bogdanm | 0:9b334a45a8ff | 4266 | { |
bogdanm | 0:9b334a45a8ff | 4267 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 4268 | } |
bogdanm | 0:9b334a45a8ff | 4269 | |
bogdanm | 0:9b334a45a8ff | 4270 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 4271 | __HAL_LOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 4272 | |
bogdanm | 0:9b334a45a8ff | 4273 | hhrtim->State = HAL_HRTIM_STATE_BUSY; |
bogdanm | 0:9b334a45a8ff | 4274 | |
bogdanm | 0:9b334a45a8ff | 4275 | /* Configure the compare unit */ |
bogdanm | 0:9b334a45a8ff | 4276 | if (TimerIdx == HRTIM_TIMERINDEX_MASTER) |
bogdanm | 0:9b334a45a8ff | 4277 | { |
bogdanm | 0:9b334a45a8ff | 4278 | switch (CompareUnit) |
bogdanm | 0:9b334a45a8ff | 4279 | { |
bogdanm | 0:9b334a45a8ff | 4280 | case HRTIM_COMPAREUNIT_1: |
bogdanm | 0:9b334a45a8ff | 4281 | { |
bogdanm | 0:9b334a45a8ff | 4282 | hhrtim->Instance->sMasterRegs.MCMP1R = pCompareCfg->CompareValue; |
bogdanm | 0:9b334a45a8ff | 4283 | } |
bogdanm | 0:9b334a45a8ff | 4284 | break; |
bogdanm | 0:9b334a45a8ff | 4285 | case HRTIM_COMPAREUNIT_2: |
bogdanm | 0:9b334a45a8ff | 4286 | { |
bogdanm | 0:9b334a45a8ff | 4287 | hhrtim->Instance->sMasterRegs.MCMP2R = pCompareCfg->CompareValue; |
bogdanm | 0:9b334a45a8ff | 4288 | } |
bogdanm | 0:9b334a45a8ff | 4289 | break; |
bogdanm | 0:9b334a45a8ff | 4290 | case HRTIM_COMPAREUNIT_3: |
bogdanm | 0:9b334a45a8ff | 4291 | { |
bogdanm | 0:9b334a45a8ff | 4292 | hhrtim->Instance->sMasterRegs.MCMP3R = pCompareCfg->CompareValue; |
bogdanm | 0:9b334a45a8ff | 4293 | } |
bogdanm | 0:9b334a45a8ff | 4294 | break; |
bogdanm | 0:9b334a45a8ff | 4295 | case HRTIM_COMPAREUNIT_4: |
bogdanm | 0:9b334a45a8ff | 4296 | { |
bogdanm | 0:9b334a45a8ff | 4297 | hhrtim->Instance->sMasterRegs.MCMP4R = pCompareCfg->CompareValue; |
bogdanm | 0:9b334a45a8ff | 4298 | } |
bogdanm | 0:9b334a45a8ff | 4299 | break; |
bogdanm | 0:9b334a45a8ff | 4300 | } |
bogdanm | 0:9b334a45a8ff | 4301 | } |
bogdanm | 0:9b334a45a8ff | 4302 | else |
bogdanm | 0:9b334a45a8ff | 4303 | { |
bogdanm | 0:9b334a45a8ff | 4304 | switch (CompareUnit) |
bogdanm | 0:9b334a45a8ff | 4305 | { |
bogdanm | 0:9b334a45a8ff | 4306 | case HRTIM_COMPAREUNIT_1: |
bogdanm | 0:9b334a45a8ff | 4307 | { |
bogdanm | 0:9b334a45a8ff | 4308 | /* Set the compare value */ |
bogdanm | 0:9b334a45a8ff | 4309 | hhrtim->Instance->sTimerxRegs[TimerIdx].CMP1xR = pCompareCfg->CompareValue; |
bogdanm | 0:9b334a45a8ff | 4310 | } |
bogdanm | 0:9b334a45a8ff | 4311 | break; |
bogdanm | 0:9b334a45a8ff | 4312 | case HRTIM_COMPAREUNIT_2: |
bogdanm | 0:9b334a45a8ff | 4313 | { |
bogdanm | 0:9b334a45a8ff | 4314 | /* Check parameters */ |
bogdanm | 0:9b334a45a8ff | 4315 | assert_param(IS_HRTIM_COMPAREUNIT_AUTODELAYEDMODE(CompareUnit, pCompareCfg->AutoDelayedMode)); |
bogdanm | 0:9b334a45a8ff | 4316 | |
bogdanm | 0:9b334a45a8ff | 4317 | /* Set the compare value */ |
bogdanm | 0:9b334a45a8ff | 4318 | hhrtim->Instance->sTimerxRegs[TimerIdx].CMP2xR = pCompareCfg->CompareValue; |
bogdanm | 0:9b334a45a8ff | 4319 | |
bogdanm | 0:9b334a45a8ff | 4320 | if (pCompareCfg->AutoDelayedMode != HRTIM_AUTODELAYEDMODE_REGULAR) |
bogdanm | 0:9b334a45a8ff | 4321 | { |
bogdanm | 0:9b334a45a8ff | 4322 | /* Configure auto-delayed mode */ |
bogdanm | 0:9b334a45a8ff | 4323 | /* DELCMP2 bitfield must be reset when reprogrammed from one value */ |
bogdanm | 0:9b334a45a8ff | 4324 | /* to the other to reinitialize properly the auto-delayed mechanism */ |
bogdanm | 0:9b334a45a8ff | 4325 | hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxCR &= ~HRTIM_TIMCR_DELCMP2; |
bogdanm | 0:9b334a45a8ff | 4326 | hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxCR |= pCompareCfg->AutoDelayedMode; |
bogdanm | 0:9b334a45a8ff | 4327 | |
bogdanm | 0:9b334a45a8ff | 4328 | /* Set the compare value for timeout compare unit (if any) */ |
bogdanm | 0:9b334a45a8ff | 4329 | if (pCompareCfg->AutoDelayedMode == HRTIM_AUTODELAYEDMODE_AUTODELAYED_TIMEOUTCMP1) |
bogdanm | 0:9b334a45a8ff | 4330 | { |
bogdanm | 0:9b334a45a8ff | 4331 | hhrtim->Instance->sTimerxRegs[TimerIdx].CMP1xR = pCompareCfg->AutoDelayedTimeout; |
bogdanm | 0:9b334a45a8ff | 4332 | } |
bogdanm | 0:9b334a45a8ff | 4333 | else if (pCompareCfg->AutoDelayedMode == HRTIM_AUTODELAYEDMODE_AUTODELAYED_TIMEOUTCMP3) |
bogdanm | 0:9b334a45a8ff | 4334 | { |
bogdanm | 0:9b334a45a8ff | 4335 | hhrtim->Instance->sTimerxRegs[TimerIdx].CMP3xR = pCompareCfg->AutoDelayedTimeout; |
bogdanm | 0:9b334a45a8ff | 4336 | } |
bogdanm | 0:9b334a45a8ff | 4337 | } |
bogdanm | 0:9b334a45a8ff | 4338 | } |
bogdanm | 0:9b334a45a8ff | 4339 | break; |
bogdanm | 0:9b334a45a8ff | 4340 | case HRTIM_COMPAREUNIT_3: |
bogdanm | 0:9b334a45a8ff | 4341 | { |
bogdanm | 0:9b334a45a8ff | 4342 | /* Set the compare value */ |
bogdanm | 0:9b334a45a8ff | 4343 | hhrtim->Instance->sTimerxRegs[TimerIdx].CMP3xR = pCompareCfg->CompareValue; |
bogdanm | 0:9b334a45a8ff | 4344 | } |
bogdanm | 0:9b334a45a8ff | 4345 | break; |
bogdanm | 0:9b334a45a8ff | 4346 | case HRTIM_COMPAREUNIT_4: |
bogdanm | 0:9b334a45a8ff | 4347 | { |
bogdanm | 0:9b334a45a8ff | 4348 | /* Check parameters */ |
bogdanm | 0:9b334a45a8ff | 4349 | assert_param(IS_HRTIM_COMPAREUNIT_AUTODELAYEDMODE(CompareUnit, pCompareCfg->AutoDelayedMode)); |
bogdanm | 0:9b334a45a8ff | 4350 | |
bogdanm | 0:9b334a45a8ff | 4351 | /* Set the compare value */ |
bogdanm | 0:9b334a45a8ff | 4352 | hhrtim->Instance->sTimerxRegs[TimerIdx].CMP4xR = pCompareCfg->CompareValue; |
bogdanm | 0:9b334a45a8ff | 4353 | |
bogdanm | 0:9b334a45a8ff | 4354 | if (pCompareCfg->AutoDelayedMode != HRTIM_AUTODELAYEDMODE_REGULAR) |
bogdanm | 0:9b334a45a8ff | 4355 | { |
bogdanm | 0:9b334a45a8ff | 4356 | /* Configure auto-delayed mode */ |
bogdanm | 0:9b334a45a8ff | 4357 | /* DELCMP4 bitfield must be reset when reprogrammed from one value */ |
bogdanm | 0:9b334a45a8ff | 4358 | /* to the other to reinitialize properly the auto-delayed mechanism */ |
bogdanm | 0:9b334a45a8ff | 4359 | hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxCR &= ~HRTIM_TIMCR_DELCMP4; |
bogdanm | 0:9b334a45a8ff | 4360 | hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxCR |= (pCompareCfg->AutoDelayedMode << 2); |
bogdanm | 0:9b334a45a8ff | 4361 | |
bogdanm | 0:9b334a45a8ff | 4362 | /* Set the compare value for timeout compare unit (if any) */ |
bogdanm | 0:9b334a45a8ff | 4363 | if (pCompareCfg->AutoDelayedMode == HRTIM_AUTODELAYEDMODE_AUTODELAYED_TIMEOUTCMP1) |
bogdanm | 0:9b334a45a8ff | 4364 | { |
bogdanm | 0:9b334a45a8ff | 4365 | hhrtim->Instance->sTimerxRegs[TimerIdx].CMP1xR = pCompareCfg->AutoDelayedTimeout; |
bogdanm | 0:9b334a45a8ff | 4366 | } |
bogdanm | 0:9b334a45a8ff | 4367 | else if (pCompareCfg->AutoDelayedMode == HRTIM_AUTODELAYEDMODE_AUTODELAYED_TIMEOUTCMP3) |
bogdanm | 0:9b334a45a8ff | 4368 | { |
bogdanm | 0:9b334a45a8ff | 4369 | hhrtim->Instance->sTimerxRegs[TimerIdx].CMP3xR = pCompareCfg->AutoDelayedTimeout; |
bogdanm | 0:9b334a45a8ff | 4370 | } |
bogdanm | 0:9b334a45a8ff | 4371 | } |
bogdanm | 0:9b334a45a8ff | 4372 | } |
bogdanm | 0:9b334a45a8ff | 4373 | break; |
bogdanm | 0:9b334a45a8ff | 4374 | } |
bogdanm | 0:9b334a45a8ff | 4375 | } |
bogdanm | 0:9b334a45a8ff | 4376 | hhrtim->State = HAL_HRTIM_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 4377 | |
bogdanm | 0:9b334a45a8ff | 4378 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 4379 | __HAL_UNLOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 4380 | |
bogdanm | 0:9b334a45a8ff | 4381 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 4382 | } |
bogdanm | 0:9b334a45a8ff | 4383 | |
bogdanm | 0:9b334a45a8ff | 4384 | /** |
bogdanm | 0:9b334a45a8ff | 4385 | * @brief Configures the cature unit of a timer operating in waveform mode |
bogdanm | 0:9b334a45a8ff | 4386 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 4387 | * @param TimerIdx: Timer index |
bogdanm | 0:9b334a45a8ff | 4388 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 4389 | * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
bogdanm | 0:9b334a45a8ff | 4390 | * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
bogdanm | 0:9b334a45a8ff | 4391 | * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
bogdanm | 0:9b334a45a8ff | 4392 | * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
bogdanm | 0:9b334a45a8ff | 4393 | * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
bogdanm | 0:9b334a45a8ff | 4394 | * @param CaptureUnit: Capture unit to configure |
bogdanm | 0:9b334a45a8ff | 4395 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 4396 | * @arg HRTIM_CAPTUREUNIT_1: Capture unit 1 |
bogdanm | 0:9b334a45a8ff | 4397 | * @arg HRTIM_CAPTUREUNIT_2: Capture unit 2 |
bogdanm | 0:9b334a45a8ff | 4398 | * @param pCaptureCfg: pointer to the compare unit configuration structure |
bogdanm | 0:9b334a45a8ff | 4399 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 4400 | * @note This function must be called before starting the timer |
bogdanm | 0:9b334a45a8ff | 4401 | */ |
bogdanm | 0:9b334a45a8ff | 4402 | HAL_StatusTypeDef HAL_HRTIM_WaveformCaptureConfig(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 4403 | uint32_t TimerIdx, |
bogdanm | 0:9b334a45a8ff | 4404 | uint32_t CaptureUnit, |
bogdanm | 0:9b334a45a8ff | 4405 | HRTIM_CaptureCfgTypeDef* pCaptureCfg) |
bogdanm | 0:9b334a45a8ff | 4406 | { |
bogdanm | 0:9b334a45a8ff | 4407 | /* Check parameters */ |
bogdanm | 0:9b334a45a8ff | 4408 | assert_param(IS_HRTIM_TIMER_CAPTURETRIGGER(TimerIdx, pCaptureCfg->Trigger)); |
bogdanm | 0:9b334a45a8ff | 4409 | |
bogdanm | 0:9b334a45a8ff | 4410 | if(hhrtim->State == HAL_HRTIM_STATE_BUSY) |
bogdanm | 0:9b334a45a8ff | 4411 | { |
bogdanm | 0:9b334a45a8ff | 4412 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 4413 | } |
bogdanm | 0:9b334a45a8ff | 4414 | |
bogdanm | 0:9b334a45a8ff | 4415 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 4416 | __HAL_LOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 4417 | |
bogdanm | 0:9b334a45a8ff | 4418 | hhrtim->State = HAL_HRTIM_STATE_BUSY; |
bogdanm | 0:9b334a45a8ff | 4419 | |
bogdanm | 0:9b334a45a8ff | 4420 | /* Configure the capture unit */ |
bogdanm | 0:9b334a45a8ff | 4421 | switch (CaptureUnit) |
bogdanm | 0:9b334a45a8ff | 4422 | { |
bogdanm | 0:9b334a45a8ff | 4423 | case HRTIM_CAPTUREUNIT_1: |
bogdanm | 0:9b334a45a8ff | 4424 | { |
bogdanm | 0:9b334a45a8ff | 4425 | hhrtim->Instance->sTimerxRegs[TimerIdx].CPT1xCR = pCaptureCfg->Trigger; |
bogdanm | 0:9b334a45a8ff | 4426 | } |
bogdanm | 0:9b334a45a8ff | 4427 | break; |
bogdanm | 0:9b334a45a8ff | 4428 | case HRTIM_CAPTUREUNIT_2: |
bogdanm | 0:9b334a45a8ff | 4429 | { |
bogdanm | 0:9b334a45a8ff | 4430 | hhrtim->Instance->sTimerxRegs[TimerIdx].CPT2xCR = pCaptureCfg->Trigger; |
bogdanm | 0:9b334a45a8ff | 4431 | } |
bogdanm | 0:9b334a45a8ff | 4432 | break; |
bogdanm | 0:9b334a45a8ff | 4433 | } |
bogdanm | 0:9b334a45a8ff | 4434 | |
bogdanm | 0:9b334a45a8ff | 4435 | hhrtim->State = HAL_HRTIM_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 4436 | |
bogdanm | 0:9b334a45a8ff | 4437 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 4438 | __HAL_UNLOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 4439 | |
bogdanm | 0:9b334a45a8ff | 4440 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 4441 | } |
bogdanm | 0:9b334a45a8ff | 4442 | |
bogdanm | 0:9b334a45a8ff | 4443 | /** |
bogdanm | 0:9b334a45a8ff | 4444 | * @brief Configures the output of a timer operating in waveform mode |
bogdanm | 0:9b334a45a8ff | 4445 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 4446 | * @param TimerIdx: Timer index |
bogdanm | 0:9b334a45a8ff | 4447 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 4448 | * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
bogdanm | 0:9b334a45a8ff | 4449 | * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
bogdanm | 0:9b334a45a8ff | 4450 | * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
bogdanm | 0:9b334a45a8ff | 4451 | * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
bogdanm | 0:9b334a45a8ff | 4452 | * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
bogdanm | 0:9b334a45a8ff | 4453 | * @param Output: Timer output |
bogdanm | 0:9b334a45a8ff | 4454 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 4455 | * @arg HRTIM_OUTPUT_TA1: Timer A - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 4456 | * @arg HRTIM_OUTPUT_TA2: Timer A - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 4457 | * @arg HRTIM_OUTPUT_TB1: Timer B - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 4458 | * @arg HRTIM_OUTPUT_TB2: Timer B - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 4459 | * @arg HRTIM_OUTPUT_TC1: Timer C - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 4460 | * @arg HRTIM_OUTPUT_TC2: Timer C - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 4461 | * @arg HRTIM_OUTPUT_TD1: Timer D - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 4462 | * @arg HRTIM_OUTPUT_TD2: Timer D - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 4463 | * @arg HRTIM_OUTPUT_TE1: Timer E - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 4464 | * @arg HRTIM_OUTPUT_TE2: Timer E - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 4465 | * @param pOutputCfg: pointer to the timer output configuration structure |
bogdanm | 0:9b334a45a8ff | 4466 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 4467 | * @note This function must be called before configuring the timer and after |
bogdanm | 0:9b334a45a8ff | 4468 | * configuring the deadtime insertion feature (if required). |
bogdanm | 0:9b334a45a8ff | 4469 | */ |
bogdanm | 0:9b334a45a8ff | 4470 | HAL_StatusTypeDef HAL_HRTIM_WaveformOutputConfig(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 4471 | uint32_t TimerIdx, |
bogdanm | 0:9b334a45a8ff | 4472 | uint32_t Output, |
bogdanm | 0:9b334a45a8ff | 4473 | HRTIM_OutputCfgTypeDef * pOutputCfg) |
bogdanm | 0:9b334a45a8ff | 4474 | { |
bogdanm | 0:9b334a45a8ff | 4475 | /* Check parameters */ |
bogdanm | 0:9b334a45a8ff | 4476 | assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, Output)); |
bogdanm | 0:9b334a45a8ff | 4477 | assert_param(IS_HRTIM_OUTPUTPOLARITY(pOutputCfg->Polarity)); |
bogdanm | 0:9b334a45a8ff | 4478 | assert_param(IS_HRTIM_OUTPUTIDLELEVEL(pOutputCfg->IdleLevel)); |
bogdanm | 0:9b334a45a8ff | 4479 | assert_param(IS_HRTIM_OUTPUTIDLEMODE(pOutputCfg->IdleMode)); |
bogdanm | 0:9b334a45a8ff | 4480 | assert_param(IS_HRTIM_OUTPUTFAULTLEVEL(pOutputCfg->FaultLevel)); |
bogdanm | 0:9b334a45a8ff | 4481 | assert_param(IS_HRTIM_OUTPUTCHOPPERMODE(pOutputCfg->ChopperModeEnable)); |
bogdanm | 0:9b334a45a8ff | 4482 | assert_param(IS_HRTIM_OUTPUTBURSTMODEENTRY(pOutputCfg->BurstModeEntryDelayed)); |
bogdanm | 0:9b334a45a8ff | 4483 | |
bogdanm | 0:9b334a45a8ff | 4484 | if(hhrtim->State == HAL_HRTIM_STATE_BUSY) |
bogdanm | 0:9b334a45a8ff | 4485 | { |
bogdanm | 0:9b334a45a8ff | 4486 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 4487 | } |
bogdanm | 0:9b334a45a8ff | 4488 | |
bogdanm | 0:9b334a45a8ff | 4489 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 4490 | __HAL_LOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 4491 | |
bogdanm | 0:9b334a45a8ff | 4492 | hhrtim->State = HAL_HRTIM_STATE_BUSY; |
bogdanm | 0:9b334a45a8ff | 4493 | |
bogdanm | 0:9b334a45a8ff | 4494 | /* Configure the timer output */ |
bogdanm | 0:9b334a45a8ff | 4495 | HRTIM_OutputConfig(hhrtim, |
bogdanm | 0:9b334a45a8ff | 4496 | TimerIdx, |
bogdanm | 0:9b334a45a8ff | 4497 | Output, |
bogdanm | 0:9b334a45a8ff | 4498 | pOutputCfg); |
bogdanm | 0:9b334a45a8ff | 4499 | |
bogdanm | 0:9b334a45a8ff | 4500 | hhrtim->State = HAL_HRTIM_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 4501 | |
bogdanm | 0:9b334a45a8ff | 4502 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 4503 | __HAL_UNLOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 4504 | |
bogdanm | 0:9b334a45a8ff | 4505 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 4506 | } |
bogdanm | 0:9b334a45a8ff | 4507 | |
bogdanm | 0:9b334a45a8ff | 4508 | /** |
bogdanm | 0:9b334a45a8ff | 4509 | * @brief Forces the timer output to its active or inactive state |
bogdanm | 0:9b334a45a8ff | 4510 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 4511 | * @param TimerIdx: Timer index |
bogdanm | 0:9b334a45a8ff | 4512 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 4513 | * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
bogdanm | 0:9b334a45a8ff | 4514 | * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
bogdanm | 0:9b334a45a8ff | 4515 | * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
bogdanm | 0:9b334a45a8ff | 4516 | * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
bogdanm | 0:9b334a45a8ff | 4517 | * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
bogdanm | 0:9b334a45a8ff | 4518 | * @param Output: Timer output |
bogdanm | 0:9b334a45a8ff | 4519 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 4520 | * @arg HRTIM_OUTPUT_TA1: Timer A - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 4521 | * @arg HRTIM_OUTPUT_TA2: Timer A - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 4522 | * @arg HRTIM_OUTPUT_TB1: Timer B - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 4523 | * @arg HRTIM_OUTPUT_TB2: Timer B - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 4524 | * @arg HRTIM_OUTPUT_TC1: Timer C - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 4525 | * @arg HRTIM_OUTPUT_TC2: Timer C - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 4526 | * @arg HRTIM_OUTPUT_TD1: Timer D - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 4527 | * @arg HRTIM_OUTPUT_TD2: Timer D - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 4528 | * @arg HRTIM_OUTPUT_TE1: Timer E - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 4529 | * @arg HRTIM_OUTPUT_TE2: Timer E - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 4530 | * @param OutputLevel: indicates whether the output is forced to its active or inactive level |
bogdanm | 0:9b334a45a8ff | 4531 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 4532 | * @arg HRTIM_OUTPUTLEVEL_ACTIVE: output is forced to its active level |
bogdanm | 0:9b334a45a8ff | 4533 | * @arg HRTIM_OUTPUTLEVEL_INACTIVE: output is forced to its inactive level |
bogdanm | 0:9b334a45a8ff | 4534 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 4535 | * @note The 'software set/reset trigger' bit in the output set/reset registers |
bogdanm | 0:9b334a45a8ff | 4536 | * is automatically reset by hardware |
bogdanm | 0:9b334a45a8ff | 4537 | */ |
bogdanm | 0:9b334a45a8ff | 4538 | HAL_StatusTypeDef HAL_HRTIM_WaveformSetOutputLevel(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 4539 | uint32_t TimerIdx, |
bogdanm | 0:9b334a45a8ff | 4540 | uint32_t Output, |
bogdanm | 0:9b334a45a8ff | 4541 | uint32_t OutputLevel) |
bogdanm | 0:9b334a45a8ff | 4542 | { |
bogdanm | 0:9b334a45a8ff | 4543 | /* Check parameters */ |
bogdanm | 0:9b334a45a8ff | 4544 | assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, Output)); |
bogdanm | 0:9b334a45a8ff | 4545 | assert_param(IS_HRTIM_OUTPUTLEVEL(OutputLevel)); |
bogdanm | 0:9b334a45a8ff | 4546 | |
bogdanm | 0:9b334a45a8ff | 4547 | if(hhrtim->State == HAL_HRTIM_STATE_BUSY) |
bogdanm | 0:9b334a45a8ff | 4548 | { |
bogdanm | 0:9b334a45a8ff | 4549 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 4550 | } |
bogdanm | 0:9b334a45a8ff | 4551 | |
bogdanm | 0:9b334a45a8ff | 4552 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 4553 | __HAL_LOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 4554 | |
bogdanm | 0:9b334a45a8ff | 4555 | hhrtim->State = HAL_HRTIM_STATE_BUSY; |
bogdanm | 0:9b334a45a8ff | 4556 | |
bogdanm | 0:9b334a45a8ff | 4557 | /* Force timer output level */ |
bogdanm | 0:9b334a45a8ff | 4558 | switch (Output) |
bogdanm | 0:9b334a45a8ff | 4559 | { |
bogdanm | 0:9b334a45a8ff | 4560 | case HRTIM_OUTPUT_TA1: |
bogdanm | 0:9b334a45a8ff | 4561 | case HRTIM_OUTPUT_TB1: |
bogdanm | 0:9b334a45a8ff | 4562 | case HRTIM_OUTPUT_TC1: |
bogdanm | 0:9b334a45a8ff | 4563 | case HRTIM_OUTPUT_TD1: |
bogdanm | 0:9b334a45a8ff | 4564 | case HRTIM_OUTPUT_TE1: |
bogdanm | 0:9b334a45a8ff | 4565 | { |
bogdanm | 0:9b334a45a8ff | 4566 | if (OutputLevel == HRTIM_OUTPUTLEVEL_ACTIVE) |
bogdanm | 0:9b334a45a8ff | 4567 | { |
bogdanm | 0:9b334a45a8ff | 4568 | /* Force output to its active state */ |
bogdanm | 0:9b334a45a8ff | 4569 | hhrtim->Instance->sTimerxRegs[TimerIdx].SETx1R |= HRTIM_SET1R_SST; |
bogdanm | 0:9b334a45a8ff | 4570 | } |
bogdanm | 0:9b334a45a8ff | 4571 | else |
bogdanm | 0:9b334a45a8ff | 4572 | { |
bogdanm | 0:9b334a45a8ff | 4573 | /* Force output to its inactive state */ |
bogdanm | 0:9b334a45a8ff | 4574 | hhrtim->Instance->sTimerxRegs[TimerIdx].RSTx1R |= HRTIM_RST1R_SRT; |
bogdanm | 0:9b334a45a8ff | 4575 | } |
bogdanm | 0:9b334a45a8ff | 4576 | } |
bogdanm | 0:9b334a45a8ff | 4577 | break; |
bogdanm | 0:9b334a45a8ff | 4578 | case HRTIM_OUTPUT_TA2: |
bogdanm | 0:9b334a45a8ff | 4579 | case HRTIM_OUTPUT_TB2: |
bogdanm | 0:9b334a45a8ff | 4580 | case HRTIM_OUTPUT_TC2: |
bogdanm | 0:9b334a45a8ff | 4581 | case HRTIM_OUTPUT_TD2: |
bogdanm | 0:9b334a45a8ff | 4582 | case HRTIM_OUTPUT_TE2: |
bogdanm | 0:9b334a45a8ff | 4583 | { |
bogdanm | 0:9b334a45a8ff | 4584 | if (OutputLevel == HRTIM_OUTPUTLEVEL_ACTIVE) |
bogdanm | 0:9b334a45a8ff | 4585 | { |
bogdanm | 0:9b334a45a8ff | 4586 | /* Force output to its active state */ |
bogdanm | 0:9b334a45a8ff | 4587 | hhrtim->Instance->sTimerxRegs[TimerIdx].SETx2R |= HRTIM_SET2R_SST; |
bogdanm | 0:9b334a45a8ff | 4588 | } |
bogdanm | 0:9b334a45a8ff | 4589 | else |
bogdanm | 0:9b334a45a8ff | 4590 | { |
bogdanm | 0:9b334a45a8ff | 4591 | /* Force output to its inactive state */ |
bogdanm | 0:9b334a45a8ff | 4592 | hhrtim->Instance->sTimerxRegs[TimerIdx].RSTx2R |= HRTIM_RST2R_SRT; |
bogdanm | 0:9b334a45a8ff | 4593 | } |
bogdanm | 0:9b334a45a8ff | 4594 | } |
bogdanm | 0:9b334a45a8ff | 4595 | break; |
bogdanm | 0:9b334a45a8ff | 4596 | } |
bogdanm | 0:9b334a45a8ff | 4597 | |
bogdanm | 0:9b334a45a8ff | 4598 | hhrtim->State = HAL_HRTIM_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 4599 | |
bogdanm | 0:9b334a45a8ff | 4600 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 4601 | __HAL_UNLOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 4602 | |
bogdanm | 0:9b334a45a8ff | 4603 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 4604 | } |
bogdanm | 0:9b334a45a8ff | 4605 | |
bogdanm | 0:9b334a45a8ff | 4606 | /** |
bogdanm | 0:9b334a45a8ff | 4607 | * @brief Enables the generation of the waveform signal on the designated output(s) |
bogdanm | 0:9b334a45a8ff | 4608 | * Ouputs can becombined (ORed) to allow for simultaneous output enabling |
bogdanm | 0:9b334a45a8ff | 4609 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 4610 | * @param OutputsToStart: Timer output(s) to enable |
bogdanm | 0:9b334a45a8ff | 4611 | * This parameter can be any combination of the following values: |
bogdanm | 0:9b334a45a8ff | 4612 | * @arg HRTIM_OUTPUT_TA1: Timer A - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 4613 | * @arg HRTIM_OUTPUT_TA2: Timer A - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 4614 | * @arg HRTIM_OUTPUT_TB1: Timer B - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 4615 | * @arg HRTIM_OUTPUT_TB2: Timer B - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 4616 | * @arg HRTIM_OUTPUT_TC1: Timer C - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 4617 | * @arg HRTIM_OUTPUT_TC2: Timer C - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 4618 | * @arg HRTIM_OUTPUT_TD1: Timer D - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 4619 | * @arg HRTIM_OUTPUT_TD2: Timer D - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 4620 | * @arg HRTIM_OUTPUT_TE1: Timer E - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 4621 | * @arg HRTIM_OUTPUT_TE2: Timer E - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 4622 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 4623 | */ |
bogdanm | 0:9b334a45a8ff | 4624 | HAL_StatusTypeDef HAL_HRTIM_WaveformOutputStart(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 4625 | uint32_t OutputsToStart) |
bogdanm | 0:9b334a45a8ff | 4626 | { |
bogdanm | 0:9b334a45a8ff | 4627 | /* Check the parameters */ |
bogdanm | 0:9b334a45a8ff | 4628 | assert_param(IS_HRTIM_OUTPUT(OutputsToStart)); |
bogdanm | 0:9b334a45a8ff | 4629 | |
bogdanm | 0:9b334a45a8ff | 4630 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 4631 | __HAL_LOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 4632 | |
bogdanm | 0:9b334a45a8ff | 4633 | hhrtim->State = HAL_HRTIM_STATE_BUSY; |
bogdanm | 0:9b334a45a8ff | 4634 | |
bogdanm | 0:9b334a45a8ff | 4635 | /* Enable the HRTIM outputs */ |
bogdanm | 0:9b334a45a8ff | 4636 | hhrtim->Instance->sCommonRegs.OENR |= (OutputsToStart); |
bogdanm | 0:9b334a45a8ff | 4637 | |
bogdanm | 0:9b334a45a8ff | 4638 | hhrtim->State = HAL_HRTIM_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 4639 | |
bogdanm | 0:9b334a45a8ff | 4640 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 4641 | __HAL_UNLOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 4642 | |
bogdanm | 0:9b334a45a8ff | 4643 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 4644 | } |
bogdanm | 0:9b334a45a8ff | 4645 | |
bogdanm | 0:9b334a45a8ff | 4646 | /** |
bogdanm | 0:9b334a45a8ff | 4647 | * @brief Disables the generation of the waveform signal on the designated output(s) |
bogdanm | 0:9b334a45a8ff | 4648 | * Ouputs can becombined (ORed) to allow for simultaneous output disabling |
bogdanm | 0:9b334a45a8ff | 4649 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 4650 | * @param OutputsToStop: Timer output(s) to disable |
bogdanm | 0:9b334a45a8ff | 4651 | * This parameter can be any combination of the following values: |
bogdanm | 0:9b334a45a8ff | 4652 | * @arg HRTIM_OUTPUT_TA1: Timer A - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 4653 | * @arg HRTIM_OUTPUT_TA2: Timer A - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 4654 | * @arg HRTIM_OUTPUT_TB1: Timer B - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 4655 | * @arg HRTIM_OUTPUT_TB2: Timer B - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 4656 | * @arg HRTIM_OUTPUT_TC1: Timer C - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 4657 | * @arg HRTIM_OUTPUT_TC2: Timer C - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 4658 | * @arg HRTIM_OUTPUT_TD1: Timer D - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 4659 | * @arg HRTIM_OUTPUT_TD2: Timer D - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 4660 | * @arg HRTIM_OUTPUT_TE1: Timer E - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 4661 | * @arg HRTIM_OUTPUT_TE2: Timer E - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 4662 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 4663 | */ |
bogdanm | 0:9b334a45a8ff | 4664 | HAL_StatusTypeDef HAL_HRTIM_WaveformOutputStop(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 4665 | uint32_t OutputsToStop) |
bogdanm | 0:9b334a45a8ff | 4666 | { |
bogdanm | 0:9b334a45a8ff | 4667 | /* Check the parameters */ |
bogdanm | 0:9b334a45a8ff | 4668 | assert_param(IS_HRTIM_OUTPUT(OutputsToStop)); |
bogdanm | 0:9b334a45a8ff | 4669 | |
bogdanm | 0:9b334a45a8ff | 4670 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 4671 | __HAL_LOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 4672 | |
bogdanm | 0:9b334a45a8ff | 4673 | hhrtim->State = HAL_HRTIM_STATE_BUSY; |
bogdanm | 0:9b334a45a8ff | 4674 | |
bogdanm | 0:9b334a45a8ff | 4675 | /* Enable the HRTIM outputs */ |
bogdanm | 0:9b334a45a8ff | 4676 | hhrtim->Instance->sCommonRegs.ODISR |= (OutputsToStop); |
bogdanm | 0:9b334a45a8ff | 4677 | |
bogdanm | 0:9b334a45a8ff | 4678 | hhrtim->State = HAL_HRTIM_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 4679 | |
bogdanm | 0:9b334a45a8ff | 4680 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 4681 | __HAL_UNLOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 4682 | |
bogdanm | 0:9b334a45a8ff | 4683 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 4684 | } |
bogdanm | 0:9b334a45a8ff | 4685 | |
bogdanm | 0:9b334a45a8ff | 4686 | /** |
bogdanm | 0:9b334a45a8ff | 4687 | * @brief Starts the counter of the designated timer(s) operating in waveform mode |
bogdanm | 0:9b334a45a8ff | 4688 | * Timers can be combined (ORed) to allow for simultaneous counter start |
bogdanm | 0:9b334a45a8ff | 4689 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 4690 | * @param Timers: Timer counter(s) to start |
bogdanm | 0:9b334a45a8ff | 4691 | * This parameter can be any combination of the following values: |
bogdanm | 0:9b334a45a8ff | 4692 | * @arg HRTIM_TIMERID_MASTER |
bogdanm | 0:9b334a45a8ff | 4693 | * @arg HRTIM_TIMERID_TIMER_A |
bogdanm | 0:9b334a45a8ff | 4694 | * @arg HRTIM_TIMERID_TIMER_B |
bogdanm | 0:9b334a45a8ff | 4695 | * @arg HRTIM_TIMERID_TIMER_C |
bogdanm | 0:9b334a45a8ff | 4696 | * @arg HRTIM_TIMERID_TIMER_D |
bogdanm | 0:9b334a45a8ff | 4697 | * @arg HRTIM_TIMERID_TIMER_E |
bogdanm | 0:9b334a45a8ff | 4698 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 4699 | */ |
bogdanm | 0:9b334a45a8ff | 4700 | HAL_StatusTypeDef HAL_HRTIM_WaveformCounterStart(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 4701 | uint32_t Timers) |
bogdanm | 0:9b334a45a8ff | 4702 | { |
bogdanm | 0:9b334a45a8ff | 4703 | /* Check the parameters */ |
bogdanm | 0:9b334a45a8ff | 4704 | assert_param(IS_HRTIM_TIMERID(Timers)); |
bogdanm | 0:9b334a45a8ff | 4705 | |
bogdanm | 0:9b334a45a8ff | 4706 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 4707 | __HAL_LOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 4708 | |
bogdanm | 0:9b334a45a8ff | 4709 | hhrtim->State = HAL_HRTIM_STATE_BUSY; |
bogdanm | 0:9b334a45a8ff | 4710 | |
bogdanm | 0:9b334a45a8ff | 4711 | /* Enable timer(s) counter */ |
bogdanm | 0:9b334a45a8ff | 4712 | hhrtim->Instance->sMasterRegs.MCR |= (Timers); |
bogdanm | 0:9b334a45a8ff | 4713 | |
bogdanm | 0:9b334a45a8ff | 4714 | hhrtim->State = HAL_HRTIM_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 4715 | |
bogdanm | 0:9b334a45a8ff | 4716 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 4717 | __HAL_UNLOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 4718 | |
bogdanm | 0:9b334a45a8ff | 4719 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 4720 | } |
bogdanm | 0:9b334a45a8ff | 4721 | |
bogdanm | 0:9b334a45a8ff | 4722 | /** |
bogdanm | 0:9b334a45a8ff | 4723 | * @brief Stops the counter of the designated timer(s) operating in waveform mode |
bogdanm | 0:9b334a45a8ff | 4724 | * Timers can be combined (ORed) to allow for simultaneous counter stop |
bogdanm | 0:9b334a45a8ff | 4725 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 4726 | * @param Timers: Timer counter(s) to stop |
bogdanm | 0:9b334a45a8ff | 4727 | * This parameter can be any combination of the following values: |
bogdanm | 0:9b334a45a8ff | 4728 | * @arg HRTIM_TIMER_MASTER |
bogdanm | 0:9b334a45a8ff | 4729 | * @arg HRTIM_TIMER_A |
bogdanm | 0:9b334a45a8ff | 4730 | * @arg HRTIM_TIMER_B |
bogdanm | 0:9b334a45a8ff | 4731 | * @arg HRTIM_TIMER_C |
bogdanm | 0:9b334a45a8ff | 4732 | * @arg HRTIM_TIMER_D |
bogdanm | 0:9b334a45a8ff | 4733 | * @arg HRTIM_TIMER_E |
bogdanm | 0:9b334a45a8ff | 4734 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 4735 | * @note The counter of a timer is stopped only if all timer outputs are disabled |
bogdanm | 0:9b334a45a8ff | 4736 | */ |
bogdanm | 0:9b334a45a8ff | 4737 | HAL_StatusTypeDef HAL_HRTIM_WaveformCounterStop(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 4738 | uint32_t Timers) |
bogdanm | 0:9b334a45a8ff | 4739 | { |
bogdanm | 0:9b334a45a8ff | 4740 | /* Check the parameters */ |
bogdanm | 0:9b334a45a8ff | 4741 | assert_param(IS_HRTIM_TIMERID(Timers)); |
bogdanm | 0:9b334a45a8ff | 4742 | |
bogdanm | 0:9b334a45a8ff | 4743 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 4744 | __HAL_LOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 4745 | |
bogdanm | 0:9b334a45a8ff | 4746 | hhrtim->State = HAL_HRTIM_STATE_BUSY; |
bogdanm | 0:9b334a45a8ff | 4747 | |
bogdanm | 0:9b334a45a8ff | 4748 | /* Disable timer(s) counter */ |
bogdanm | 0:9b334a45a8ff | 4749 | hhrtim->Instance->sMasterRegs.MCR &= ~(Timers); |
bogdanm | 0:9b334a45a8ff | 4750 | |
bogdanm | 0:9b334a45a8ff | 4751 | hhrtim->State = HAL_HRTIM_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 4752 | |
bogdanm | 0:9b334a45a8ff | 4753 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 4754 | __HAL_UNLOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 4755 | |
bogdanm | 0:9b334a45a8ff | 4756 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 4757 | } |
bogdanm | 0:9b334a45a8ff | 4758 | |
bogdanm | 0:9b334a45a8ff | 4759 | /** |
bogdanm | 0:9b334a45a8ff | 4760 | * @brief Starts the counter of the designated timer(s) operating in waveform mode |
bogdanm | 0:9b334a45a8ff | 4761 | * Timers can be combined (ORed) to allow for simultaneous counter start |
bogdanm | 0:9b334a45a8ff | 4762 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 4763 | * @param Timers: Timer counter(s) to start |
bogdanm | 0:9b334a45a8ff | 4764 | * This parameter can be any combination of the following values: |
bogdanm | 0:9b334a45a8ff | 4765 | * @arg HRTIM_TIMERID_MASTER |
bogdanm | 0:9b334a45a8ff | 4766 | * @arg HRTIM_TIMERID_A |
bogdanm | 0:9b334a45a8ff | 4767 | * @arg HRTIM_TIMERID_B |
bogdanm | 0:9b334a45a8ff | 4768 | * @arg HRTIM_TIMERID_C |
bogdanm | 0:9b334a45a8ff | 4769 | * @arg HRTIM_TIMERID_D |
bogdanm | 0:9b334a45a8ff | 4770 | * @arg HRTIM_TIMERID_E |
bogdanm | 0:9b334a45a8ff | 4771 | * @note HRTIM interrupts (e.g. faults interrupts) and interrupts related |
bogdanm | 0:9b334a45a8ff | 4772 | * to the timers to start are enabled within this function. |
bogdanm | 0:9b334a45a8ff | 4773 | * Interrupts to enable are selected through HAL_HRTIM_WaveformTimerConfig |
bogdanm | 0:9b334a45a8ff | 4774 | * function. |
bogdanm | 0:9b334a45a8ff | 4775 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 4776 | */ |
bogdanm | 0:9b334a45a8ff | 4777 | HAL_StatusTypeDef HAL_HRTIM_WaveformCounterStart_IT(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 4778 | uint32_t Timers) |
bogdanm | 0:9b334a45a8ff | 4779 | { |
bogdanm | 0:9b334a45a8ff | 4780 | uint8_t timer_idx; |
bogdanm | 0:9b334a45a8ff | 4781 | |
bogdanm | 0:9b334a45a8ff | 4782 | /* Check the parameters */ |
bogdanm | 0:9b334a45a8ff | 4783 | assert_param(IS_HRTIM_TIMERID(Timers)); |
bogdanm | 0:9b334a45a8ff | 4784 | |
bogdanm | 0:9b334a45a8ff | 4785 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 4786 | __HAL_LOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 4787 | |
bogdanm | 0:9b334a45a8ff | 4788 | hhrtim->State = HAL_HRTIM_STATE_BUSY; |
bogdanm | 0:9b334a45a8ff | 4789 | |
bogdanm | 0:9b334a45a8ff | 4790 | /* Enable HRTIM interrupts (if required) */ |
bogdanm | 0:9b334a45a8ff | 4791 | __HAL_HRTIM_ENABLE_IT(hhrtim, hhrtim->Init.HRTIMInterruptResquests); |
bogdanm | 0:9b334a45a8ff | 4792 | |
bogdanm | 0:9b334a45a8ff | 4793 | /* Enable master timer related interrupts (if required) */ |
bogdanm | 0:9b334a45a8ff | 4794 | if ((Timers & HRTIM_TIMERID_MASTER) != RESET) |
bogdanm | 0:9b334a45a8ff | 4795 | { |
bogdanm | 0:9b334a45a8ff | 4796 | __HAL_HRTIM_MASTER_ENABLE_IT(hhrtim, |
bogdanm | 0:9b334a45a8ff | 4797 | hhrtim->TimerParam[HRTIM_TIMERINDEX_MASTER].InterruptRequests); |
bogdanm | 0:9b334a45a8ff | 4798 | } |
bogdanm | 0:9b334a45a8ff | 4799 | |
bogdanm | 0:9b334a45a8ff | 4800 | /* Enable timing unit related interrupts (if required) */ |
bogdanm | 0:9b334a45a8ff | 4801 | for (timer_idx = HRTIM_TIMERINDEX_TIMER_A ; |
bogdanm | 0:9b334a45a8ff | 4802 | timer_idx < HRTIM_TIMERINDEX_MASTER ; |
bogdanm | 0:9b334a45a8ff | 4803 | timer_idx++) |
bogdanm | 0:9b334a45a8ff | 4804 | { |
bogdanm | 0:9b334a45a8ff | 4805 | if ((Timers & TimerIdxToTimerId[timer_idx]) != RESET) |
bogdanm | 0:9b334a45a8ff | 4806 | { |
bogdanm | 0:9b334a45a8ff | 4807 | __HAL_HRTIM_TIMER_ENABLE_IT(hhrtim, |
bogdanm | 0:9b334a45a8ff | 4808 | timer_idx, |
bogdanm | 0:9b334a45a8ff | 4809 | hhrtim->TimerParam[timer_idx].InterruptRequests); |
bogdanm | 0:9b334a45a8ff | 4810 | } |
bogdanm | 0:9b334a45a8ff | 4811 | } |
bogdanm | 0:9b334a45a8ff | 4812 | |
bogdanm | 0:9b334a45a8ff | 4813 | /* Enable timer(s) counter */ |
bogdanm | 0:9b334a45a8ff | 4814 | hhrtim->Instance->sMasterRegs.MCR |= (Timers); |
bogdanm | 0:9b334a45a8ff | 4815 | |
bogdanm | 0:9b334a45a8ff | 4816 | hhrtim->State = HAL_HRTIM_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 4817 | |
bogdanm | 0:9b334a45a8ff | 4818 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 4819 | __HAL_UNLOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 4820 | |
bogdanm | 0:9b334a45a8ff | 4821 | return HAL_OK;} |
bogdanm | 0:9b334a45a8ff | 4822 | |
bogdanm | 0:9b334a45a8ff | 4823 | /** |
bogdanm | 0:9b334a45a8ff | 4824 | * @brief Stops the counter of the designated timer(s) operating in waveform mode |
bogdanm | 0:9b334a45a8ff | 4825 | * Timers can be combined (ORed) to allow for simultaneous counter stop |
bogdanm | 0:9b334a45a8ff | 4826 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 4827 | * @param Timers: Timer counter(s) to stop |
bogdanm | 0:9b334a45a8ff | 4828 | * This parameter can be any combination of the following values: |
bogdanm | 0:9b334a45a8ff | 4829 | * @arg HRTIM_TIMER_MASTER |
bogdanm | 0:9b334a45a8ff | 4830 | * @arg HRTIM_TIMER_A |
bogdanm | 0:9b334a45a8ff | 4831 | * @arg HRTIM_TIMER_B |
bogdanm | 0:9b334a45a8ff | 4832 | * @arg HRTIM_TIMER_C |
bogdanm | 0:9b334a45a8ff | 4833 | * @arg HRTIM_TIMER_D |
bogdanm | 0:9b334a45a8ff | 4834 | * @arg HRTIM_TIMER_E |
bogdanm | 0:9b334a45a8ff | 4835 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 4836 | * @note The counter of a timer is stopped only if all timer outputs are disabled |
bogdanm | 0:9b334a45a8ff | 4837 | * @note All enabled timer related interrupts are disabled. |
bogdanm | 0:9b334a45a8ff | 4838 | */ |
bogdanm | 0:9b334a45a8ff | 4839 | HAL_StatusTypeDef HAL_HRTIM_WaveformCounterStop_IT(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 4840 | uint32_t Timers) |
bogdanm | 0:9b334a45a8ff | 4841 | { |
bogdanm | 0:9b334a45a8ff | 4842 | /* ++ WA */ |
bogdanm | 0:9b334a45a8ff | 4843 | __IO uint32_t delai = (uint32_t)(0x17F); |
bogdanm | 0:9b334a45a8ff | 4844 | /* -- WA */ |
bogdanm | 0:9b334a45a8ff | 4845 | |
bogdanm | 0:9b334a45a8ff | 4846 | uint8_t timer_idx; |
bogdanm | 0:9b334a45a8ff | 4847 | |
bogdanm | 0:9b334a45a8ff | 4848 | /* Check the parameters */ |
bogdanm | 0:9b334a45a8ff | 4849 | assert_param(IS_HRTIM_TIMERID(Timers)); |
bogdanm | 0:9b334a45a8ff | 4850 | |
bogdanm | 0:9b334a45a8ff | 4851 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 4852 | __HAL_LOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 4853 | |
bogdanm | 0:9b334a45a8ff | 4854 | hhrtim->State = HAL_HRTIM_STATE_BUSY; |
bogdanm | 0:9b334a45a8ff | 4855 | |
bogdanm | 0:9b334a45a8ff | 4856 | /* Disable HRTIM interrupts (if required) */ |
bogdanm | 0:9b334a45a8ff | 4857 | __HAL_HRTIM_DISABLE_IT(hhrtim, hhrtim->Init.HRTIMInterruptResquests); |
bogdanm | 0:9b334a45a8ff | 4858 | |
bogdanm | 0:9b334a45a8ff | 4859 | /* Disable master timer related interrupts (if required) */ |
bogdanm | 0:9b334a45a8ff | 4860 | if ((Timers & HRTIM_TIMERID_MASTER) != RESET) |
bogdanm | 0:9b334a45a8ff | 4861 | { |
bogdanm | 0:9b334a45a8ff | 4862 | /* Interrupts enable flag must be cleared one by one */ |
bogdanm | 0:9b334a45a8ff | 4863 | __HAL_HRTIM_MASTER_DISABLE_IT(hhrtim, hhrtim->TimerParam[HRTIM_TIMERINDEX_MASTER].InterruptRequests); |
bogdanm | 0:9b334a45a8ff | 4864 | } |
bogdanm | 0:9b334a45a8ff | 4865 | |
bogdanm | 0:9b334a45a8ff | 4866 | /* Disable timing unit related interrupts (if required) */ |
bogdanm | 0:9b334a45a8ff | 4867 | for (timer_idx = HRTIM_TIMERINDEX_TIMER_A ; |
bogdanm | 0:9b334a45a8ff | 4868 | timer_idx < HRTIM_TIMERINDEX_MASTER ; |
bogdanm | 0:9b334a45a8ff | 4869 | timer_idx++) |
bogdanm | 0:9b334a45a8ff | 4870 | { |
bogdanm | 0:9b334a45a8ff | 4871 | if ((Timers & TimerIdxToTimerId[timer_idx]) != RESET) |
bogdanm | 0:9b334a45a8ff | 4872 | { |
bogdanm | 0:9b334a45a8ff | 4873 | __HAL_HRTIM_TIMER_DISABLE_IT(hhrtim, timer_idx, hhrtim->TimerParam[timer_idx].InterruptRequests); |
bogdanm | 0:9b334a45a8ff | 4874 | } |
bogdanm | 0:9b334a45a8ff | 4875 | } |
bogdanm | 0:9b334a45a8ff | 4876 | |
bogdanm | 0:9b334a45a8ff | 4877 | /* ++ WA */ |
bogdanm | 0:9b334a45a8ff | 4878 | do { delai--; } while (delai != 0); |
bogdanm | 0:9b334a45a8ff | 4879 | /* -- WA */ |
bogdanm | 0:9b334a45a8ff | 4880 | |
bogdanm | 0:9b334a45a8ff | 4881 | /* Disable timer(s) counter */ |
bogdanm | 0:9b334a45a8ff | 4882 | hhrtim->Instance->sMasterRegs.MCR &= ~(Timers); |
bogdanm | 0:9b334a45a8ff | 4883 | |
bogdanm | 0:9b334a45a8ff | 4884 | hhrtim->State = HAL_HRTIM_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 4885 | |
bogdanm | 0:9b334a45a8ff | 4886 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 4887 | __HAL_UNLOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 4888 | |
bogdanm | 0:9b334a45a8ff | 4889 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 4890 | } |
bogdanm | 0:9b334a45a8ff | 4891 | |
bogdanm | 0:9b334a45a8ff | 4892 | /** |
bogdanm | 0:9b334a45a8ff | 4893 | * @brief Starts the counter of the designated timer(s) operating in waveform mode |
bogdanm | 0:9b334a45a8ff | 4894 | * Timers can be combined (ORed) to allow for simultaneous counter start |
bogdanm | 0:9b334a45a8ff | 4895 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 4896 | * @param Timers: Timer counter(s) to start |
bogdanm | 0:9b334a45a8ff | 4897 | * This parameter can be any combination of the following values: |
bogdanm | 0:9b334a45a8ff | 4898 | * HRTIM_TIMER_MASTER |
bogdanm | 0:9b334a45a8ff | 4899 | * @arg HRTIM_TIMER_A |
bogdanm | 0:9b334a45a8ff | 4900 | * @arg HRTIM_TIMER_B |
bogdanm | 0:9b334a45a8ff | 4901 | * @arg HRTIM_TIMER_C |
bogdanm | 0:9b334a45a8ff | 4902 | * @arg HRTIM_TIMER_D |
bogdanm | 0:9b334a45a8ff | 4903 | * @arg HRTIM_TIMER_E |
bogdanm | 0:9b334a45a8ff | 4904 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 4905 | * @note This function enables the dma request(s) mentionned in the timer |
bogdanm | 0:9b334a45a8ff | 4906 | * configuration data structure for every timers to start. |
bogdanm | 0:9b334a45a8ff | 4907 | * @note The source memory address, the destination memory address and the |
bogdanm | 0:9b334a45a8ff | 4908 | * size of each DMA transfer are specified at timer configuration time |
bogdanm | 0:9b334a45a8ff | 4909 | * (see HAL_HRTIM_WaveformTimerConfig) |
bogdanm | 0:9b334a45a8ff | 4910 | */ |
bogdanm | 0:9b334a45a8ff | 4911 | HAL_StatusTypeDef HAL_HRTIM_WaveformCounterStart_DMA(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 4912 | uint32_t Timers) |
bogdanm | 0:9b334a45a8ff | 4913 | { |
bogdanm | 0:9b334a45a8ff | 4914 | uint8_t timer_idx; |
bogdanm | 0:9b334a45a8ff | 4915 | DMA_HandleTypeDef * hdma; |
bogdanm | 0:9b334a45a8ff | 4916 | |
bogdanm | 0:9b334a45a8ff | 4917 | /* Check the parameters */ |
bogdanm | 0:9b334a45a8ff | 4918 | assert_param(IS_HRTIM_TIMERID(Timers)); |
bogdanm | 0:9b334a45a8ff | 4919 | |
bogdanm | 0:9b334a45a8ff | 4920 | if((hhrtim->State == HAL_HRTIM_STATE_BUSY)) |
bogdanm | 0:9b334a45a8ff | 4921 | { |
bogdanm | 0:9b334a45a8ff | 4922 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 4923 | } |
bogdanm | 0:9b334a45a8ff | 4924 | |
bogdanm | 0:9b334a45a8ff | 4925 | hhrtim->State = HAL_HRTIM_STATE_BUSY; |
bogdanm | 0:9b334a45a8ff | 4926 | |
bogdanm | 0:9b334a45a8ff | 4927 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 4928 | __HAL_LOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 4929 | |
bogdanm | 0:9b334a45a8ff | 4930 | if (((Timers & HRTIM_TIMERID_MASTER) != RESET) && |
bogdanm | 0:9b334a45a8ff | 4931 | (hhrtim->TimerParam[HRTIM_TIMERINDEX_MASTER].DMARequests != 0)) |
bogdanm | 0:9b334a45a8ff | 4932 | { |
bogdanm | 0:9b334a45a8ff | 4933 | /* Set the DMA error callback */ |
bogdanm | 0:9b334a45a8ff | 4934 | hhrtim->hdmaMaster->XferErrorCallback = HRTIM_DMAError ; |
bogdanm | 0:9b334a45a8ff | 4935 | |
bogdanm | 0:9b334a45a8ff | 4936 | /* Set the DMA transfer completed callback */ |
bogdanm | 0:9b334a45a8ff | 4937 | hhrtim->hdmaMaster->XferCpltCallback = HRTIM_DMAMasterCplt; |
bogdanm | 0:9b334a45a8ff | 4938 | |
bogdanm | 0:9b334a45a8ff | 4939 | /* Enable the DMA channel */ |
bogdanm | 0:9b334a45a8ff | 4940 | HAL_DMA_Start_IT(hhrtim->hdmaMaster, |
bogdanm | 0:9b334a45a8ff | 4941 | hhrtim->TimerParam[HRTIM_TIMERINDEX_MASTER].DMASrcAddress, |
bogdanm | 0:9b334a45a8ff | 4942 | hhrtim->TimerParam[HRTIM_TIMERINDEX_MASTER].DMADstAddress, |
bogdanm | 0:9b334a45a8ff | 4943 | hhrtim->TimerParam[HRTIM_TIMERINDEX_MASTER].DMASize); |
bogdanm | 0:9b334a45a8ff | 4944 | |
bogdanm | 0:9b334a45a8ff | 4945 | /* Enable the timer DMA request */ |
bogdanm | 0:9b334a45a8ff | 4946 | __HAL_HRTIM_MASTER_ENABLE_DMA(hhrtim, |
bogdanm | 0:9b334a45a8ff | 4947 | hhrtim->TimerParam[HRTIM_TIMERINDEX_MASTER].DMARequests); |
bogdanm | 0:9b334a45a8ff | 4948 | } |
bogdanm | 0:9b334a45a8ff | 4949 | |
bogdanm | 0:9b334a45a8ff | 4950 | for (timer_idx = HRTIM_TIMERINDEX_TIMER_A ; |
bogdanm | 0:9b334a45a8ff | 4951 | timer_idx < HRTIM_TIMERINDEX_MASTER ; |
bogdanm | 0:9b334a45a8ff | 4952 | timer_idx++) |
bogdanm | 0:9b334a45a8ff | 4953 | { |
bogdanm | 0:9b334a45a8ff | 4954 | if (((Timers & TimerIdxToTimerId[timer_idx]) != RESET) && |
bogdanm | 0:9b334a45a8ff | 4955 | (hhrtim->TimerParam[timer_idx].DMARequests != 0)) |
bogdanm | 0:9b334a45a8ff | 4956 | { |
bogdanm | 0:9b334a45a8ff | 4957 | /* Get the timer DMA handler */ |
bogdanm | 0:9b334a45a8ff | 4958 | hdma = HRTIM_GetDMAHandleFromTimerIdx(hhrtim, timer_idx); |
bogdanm | 0:9b334a45a8ff | 4959 | |
bogdanm | 0:9b334a45a8ff | 4960 | /* Set the DMA error callback */ |
bogdanm | 0:9b334a45a8ff | 4961 | hdma->XferErrorCallback = HRTIM_DMAError ; |
bogdanm | 0:9b334a45a8ff | 4962 | |
bogdanm | 0:9b334a45a8ff | 4963 | /* Set the DMA transfer completed callback */ |
bogdanm | 0:9b334a45a8ff | 4964 | hdma->XferCpltCallback = HRTIM_DMATimerxCplt; |
bogdanm | 0:9b334a45a8ff | 4965 | |
bogdanm | 0:9b334a45a8ff | 4966 | /* Enable the DMA channel */ |
bogdanm | 0:9b334a45a8ff | 4967 | HAL_DMA_Start_IT(hdma, |
bogdanm | 0:9b334a45a8ff | 4968 | hhrtim->TimerParam[timer_idx].DMASrcAddress, |
bogdanm | 0:9b334a45a8ff | 4969 | hhrtim->TimerParam[timer_idx].DMADstAddress, |
bogdanm | 0:9b334a45a8ff | 4970 | hhrtim->TimerParam[timer_idx].DMASize); |
bogdanm | 0:9b334a45a8ff | 4971 | |
bogdanm | 0:9b334a45a8ff | 4972 | /* Enable the timer DMA request */ |
bogdanm | 0:9b334a45a8ff | 4973 | __HAL_HRTIM_TIMER_ENABLE_DMA(hhrtim, |
bogdanm | 0:9b334a45a8ff | 4974 | timer_idx, |
bogdanm | 0:9b334a45a8ff | 4975 | hhrtim->TimerParam[timer_idx].DMARequests); |
bogdanm | 0:9b334a45a8ff | 4976 | } |
bogdanm | 0:9b334a45a8ff | 4977 | } |
bogdanm | 0:9b334a45a8ff | 4978 | |
bogdanm | 0:9b334a45a8ff | 4979 | /* Enable the timer counter */ |
bogdanm | 0:9b334a45a8ff | 4980 | __HAL_HRTIM_ENABLE(hhrtim, Timers); |
bogdanm | 0:9b334a45a8ff | 4981 | |
bogdanm | 0:9b334a45a8ff | 4982 | hhrtim->State = HAL_HRTIM_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 4983 | |
bogdanm | 0:9b334a45a8ff | 4984 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 4985 | __HAL_UNLOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 4986 | |
bogdanm | 0:9b334a45a8ff | 4987 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 4988 | } |
bogdanm | 0:9b334a45a8ff | 4989 | |
bogdanm | 0:9b334a45a8ff | 4990 | /** |
bogdanm | 0:9b334a45a8ff | 4991 | * @brief Stops the counter of the designated timer(s) operating in waveform mode |
bogdanm | 0:9b334a45a8ff | 4992 | * Timers can be combined (ORed) to allow for simultaneous counter stop |
bogdanm | 0:9b334a45a8ff | 4993 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 4994 | * @param Timers: Timer counter(s) to stop |
bogdanm | 0:9b334a45a8ff | 4995 | * This parameter can be any combination of the following values: |
bogdanm | 0:9b334a45a8ff | 4996 | * @arg HRTIM_TIMER_MASTER |
bogdanm | 0:9b334a45a8ff | 4997 | * @arg HRTIM_TIMER_A |
bogdanm | 0:9b334a45a8ff | 4998 | * @arg HRTIM_TIMER_B |
bogdanm | 0:9b334a45a8ff | 4999 | * @arg HRTIM_TIMER_C |
bogdanm | 0:9b334a45a8ff | 5000 | * @arg HRTIM_TIMER_D |
bogdanm | 0:9b334a45a8ff | 5001 | * @arg HRTIM_TIMER_E |
bogdanm | 0:9b334a45a8ff | 5002 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 5003 | * @note The counter of a timer is stopped only if all timer outputs are disabled |
bogdanm | 0:9b334a45a8ff | 5004 | * @note All enabled timer related DMA requests are disabled. |
bogdanm | 0:9b334a45a8ff | 5005 | */ |
bogdanm | 0:9b334a45a8ff | 5006 | HAL_StatusTypeDef HAL_HRTIM_WaveformCounterStop_DMA(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 5007 | uint32_t Timers) |
bogdanm | 0:9b334a45a8ff | 5008 | { |
bogdanm | 0:9b334a45a8ff | 5009 | uint8_t timer_idx; |
bogdanm | 0:9b334a45a8ff | 5010 | DMA_HandleTypeDef * hdma; |
bogdanm | 0:9b334a45a8ff | 5011 | |
bogdanm | 0:9b334a45a8ff | 5012 | /* Check the parameters */ |
bogdanm | 0:9b334a45a8ff | 5013 | assert_param(IS_HRTIM_TIMERID(Timers)); |
bogdanm | 0:9b334a45a8ff | 5014 | |
bogdanm | 0:9b334a45a8ff | 5015 | hhrtim->State = HAL_HRTIM_STATE_BUSY; |
bogdanm | 0:9b334a45a8ff | 5016 | |
bogdanm | 0:9b334a45a8ff | 5017 | if (((Timers & HRTIM_TIMERID_MASTER) != RESET) && |
bogdanm | 0:9b334a45a8ff | 5018 | (hhrtim->TimerParam[HRTIM_TIMERINDEX_MASTER].DMARequests != 0)) |
bogdanm | 0:9b334a45a8ff | 5019 | { |
bogdanm | 0:9b334a45a8ff | 5020 | /* Disable the DMA */ |
bogdanm | 0:9b334a45a8ff | 5021 | HAL_DMA_Abort(hhrtim->hdmaMaster); |
bogdanm | 0:9b334a45a8ff | 5022 | |
bogdanm | 0:9b334a45a8ff | 5023 | /* Disable the DMA request(s) */ |
bogdanm | 0:9b334a45a8ff | 5024 | __HAL_HRTIM_MASTER_DISABLE_DMA(hhrtim, |
bogdanm | 0:9b334a45a8ff | 5025 | hhrtim->TimerParam[HRTIM_TIMERINDEX_MASTER].DMARequests); |
bogdanm | 0:9b334a45a8ff | 5026 | } |
bogdanm | 0:9b334a45a8ff | 5027 | |
bogdanm | 0:9b334a45a8ff | 5028 | for (timer_idx = HRTIM_TIMERINDEX_TIMER_A ; |
bogdanm | 0:9b334a45a8ff | 5029 | timer_idx < HRTIM_TIMERINDEX_MASTER ; |
bogdanm | 0:9b334a45a8ff | 5030 | timer_idx++) |
bogdanm | 0:9b334a45a8ff | 5031 | { |
bogdanm | 0:9b334a45a8ff | 5032 | if (((Timers & TimerIdxToTimerId[timer_idx]) != RESET) && |
bogdanm | 0:9b334a45a8ff | 5033 | (hhrtim->TimerParam[timer_idx].DMARequests != 0)) |
bogdanm | 0:9b334a45a8ff | 5034 | { |
bogdanm | 0:9b334a45a8ff | 5035 | /* Get the timer DMA handler */ |
bogdanm | 0:9b334a45a8ff | 5036 | hdma = HRTIM_GetDMAHandleFromTimerIdx(hhrtim, timer_idx); |
bogdanm | 0:9b334a45a8ff | 5037 | |
bogdanm | 0:9b334a45a8ff | 5038 | /* Disable the DMA */ |
bogdanm | 0:9b334a45a8ff | 5039 | HAL_DMA_Abort(hdma); |
bogdanm | 0:9b334a45a8ff | 5040 | |
bogdanm | 0:9b334a45a8ff | 5041 | /* Disable the DMA request(s) */ |
bogdanm | 0:9b334a45a8ff | 5042 | __HAL_HRTIM_TIMER_DISABLE_DMA(hhrtim, |
bogdanm | 0:9b334a45a8ff | 5043 | timer_idx, |
bogdanm | 0:9b334a45a8ff | 5044 | hhrtim->TimerParam[timer_idx].DMARequests); |
bogdanm | 0:9b334a45a8ff | 5045 | } |
bogdanm | 0:9b334a45a8ff | 5046 | } |
bogdanm | 0:9b334a45a8ff | 5047 | |
bogdanm | 0:9b334a45a8ff | 5048 | /* Disable the timer counter */ |
bogdanm | 0:9b334a45a8ff | 5049 | __HAL_HRTIM_DISABLE(hhrtim, Timers); |
bogdanm | 0:9b334a45a8ff | 5050 | |
bogdanm | 0:9b334a45a8ff | 5051 | hhrtim->State = HAL_HRTIM_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 5052 | |
bogdanm | 0:9b334a45a8ff | 5053 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 5054 | } |
bogdanm | 0:9b334a45a8ff | 5055 | |
bogdanm | 0:9b334a45a8ff | 5056 | /** |
bogdanm | 0:9b334a45a8ff | 5057 | * @brief Enables or disables the HRTIM burst mode controller. |
bogdanm | 0:9b334a45a8ff | 5058 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 5059 | * @param Enable: Burst mode controller enabling |
bogdanm | 0:9b334a45a8ff | 5060 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 5061 | * @arg HRTIM_BURSTMODECTL_ENABLED: Burst mode enabled |
bogdanm | 0:9b334a45a8ff | 5062 | * @arg HRTIM_BURSTMODECTL_DISABLED: Burst mode disabled |
bogdanm | 0:9b334a45a8ff | 5063 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 5064 | * @note This function must be called after starting the timer(s) |
bogdanm | 0:9b334a45a8ff | 5065 | */ |
bogdanm | 0:9b334a45a8ff | 5066 | HAL_StatusTypeDef HAL_HRTIM_BurstModeCtl(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 5067 | uint32_t Enable) |
bogdanm | 0:9b334a45a8ff | 5068 | { |
bogdanm | 0:9b334a45a8ff | 5069 | uint32_t hrtim_bmcr; |
bogdanm | 0:9b334a45a8ff | 5070 | |
bogdanm | 0:9b334a45a8ff | 5071 | /* Check parameters */ |
bogdanm | 0:9b334a45a8ff | 5072 | assert_param(IS_HRTIM_BURSTMODECTL(Enable)); |
bogdanm | 0:9b334a45a8ff | 5073 | |
bogdanm | 0:9b334a45a8ff | 5074 | if(hhrtim->State == HAL_HRTIM_STATE_BUSY) |
bogdanm | 0:9b334a45a8ff | 5075 | { |
bogdanm | 0:9b334a45a8ff | 5076 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 5077 | } |
bogdanm | 0:9b334a45a8ff | 5078 | |
bogdanm | 0:9b334a45a8ff | 5079 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 5080 | __HAL_LOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 5081 | |
bogdanm | 0:9b334a45a8ff | 5082 | hhrtim->State = HAL_HRTIM_STATE_BUSY; |
bogdanm | 0:9b334a45a8ff | 5083 | |
bogdanm | 0:9b334a45a8ff | 5084 | /* Enable/Disable the burst mode controller */ |
bogdanm | 0:9b334a45a8ff | 5085 | hrtim_bmcr = hhrtim->Instance->sCommonRegs.BMCR; |
bogdanm | 0:9b334a45a8ff | 5086 | hrtim_bmcr &= ~(HRTIM_BMCR_BME); |
bogdanm | 0:9b334a45a8ff | 5087 | hrtim_bmcr |= Enable; |
bogdanm | 0:9b334a45a8ff | 5088 | |
bogdanm | 0:9b334a45a8ff | 5089 | /* Update the HRTIM registers */ |
bogdanm | 0:9b334a45a8ff | 5090 | hhrtim->Instance->sCommonRegs.BMCR = hrtim_bmcr; |
bogdanm | 0:9b334a45a8ff | 5091 | |
bogdanm | 0:9b334a45a8ff | 5092 | hhrtim->State = HAL_HRTIM_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 5093 | |
bogdanm | 0:9b334a45a8ff | 5094 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 5095 | __HAL_UNLOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 5096 | |
bogdanm | 0:9b334a45a8ff | 5097 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 5098 | } |
bogdanm | 0:9b334a45a8ff | 5099 | |
bogdanm | 0:9b334a45a8ff | 5100 | /** |
bogdanm | 0:9b334a45a8ff | 5101 | * @brief Triggers the burst mode operation. |
bogdanm | 0:9b334a45a8ff | 5102 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 5103 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 5104 | */ |
bogdanm | 0:9b334a45a8ff | 5105 | HAL_StatusTypeDef HAL_HRTIM_BurstModeSoftwareTrigger(HRTIM_HandleTypeDef *hhrtim) |
bogdanm | 0:9b334a45a8ff | 5106 | { |
bogdanm | 0:9b334a45a8ff | 5107 | if(hhrtim->State == HAL_HRTIM_STATE_BUSY) |
bogdanm | 0:9b334a45a8ff | 5108 | { |
bogdanm | 0:9b334a45a8ff | 5109 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 5110 | } |
bogdanm | 0:9b334a45a8ff | 5111 | |
bogdanm | 0:9b334a45a8ff | 5112 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 5113 | __HAL_LOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 5114 | |
bogdanm | 0:9b334a45a8ff | 5115 | hhrtim->State = HAL_HRTIM_STATE_BUSY; |
bogdanm | 0:9b334a45a8ff | 5116 | |
bogdanm | 0:9b334a45a8ff | 5117 | /* Software trigger of the burst mode controller */ |
bogdanm | 0:9b334a45a8ff | 5118 | hhrtim->Instance->sCommonRegs.BMTRGR |= HRTIM_BMTRGR_SW; |
bogdanm | 0:9b334a45a8ff | 5119 | |
bogdanm | 0:9b334a45a8ff | 5120 | hhrtim->State = HAL_HRTIM_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 5121 | |
bogdanm | 0:9b334a45a8ff | 5122 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 5123 | __HAL_UNLOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 5124 | |
bogdanm | 0:9b334a45a8ff | 5125 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 5126 | } |
bogdanm | 0:9b334a45a8ff | 5127 | |
bogdanm | 0:9b334a45a8ff | 5128 | /** |
bogdanm | 0:9b334a45a8ff | 5129 | * @brief Triggers a software capture on the designed capture unit |
bogdanm | 0:9b334a45a8ff | 5130 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 5131 | * @param TimerIdx: Timer index |
bogdanm | 0:9b334a45a8ff | 5132 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 5133 | * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
bogdanm | 0:9b334a45a8ff | 5134 | * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
bogdanm | 0:9b334a45a8ff | 5135 | * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
bogdanm | 0:9b334a45a8ff | 5136 | * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
bogdanm | 0:9b334a45a8ff | 5137 | * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
bogdanm | 0:9b334a45a8ff | 5138 | * @param CaptureUnit: Capture unit to trig |
bogdanm | 0:9b334a45a8ff | 5139 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 5140 | * @arg HRTIM_CAPTUREUNIT_1: Capture unit 1 |
bogdanm | 0:9b334a45a8ff | 5141 | * @arg HRTIM_CAPTUREUNIT_2: Capture unit 2 |
bogdanm | 0:9b334a45a8ff | 5142 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 5143 | * @note The 'software capture' bit in the capure configuration register is |
bogdanm | 0:9b334a45a8ff | 5144 | * automatically reset by hardware |
bogdanm | 0:9b334a45a8ff | 5145 | */ |
bogdanm | 0:9b334a45a8ff | 5146 | HAL_StatusTypeDef HAL_HRTIM_SoftwareCapture(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 5147 | uint32_t TimerIdx, |
bogdanm | 0:9b334a45a8ff | 5148 | uint32_t CaptureUnit) |
bogdanm | 0:9b334a45a8ff | 5149 | { |
bogdanm | 0:9b334a45a8ff | 5150 | /* Check parameters */ |
bogdanm | 0:9b334a45a8ff | 5151 | assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx)); |
bogdanm | 0:9b334a45a8ff | 5152 | assert_param(IS_HRTIM_CAPTUREUNIT(CaptureUnit)); |
bogdanm | 0:9b334a45a8ff | 5153 | |
bogdanm | 0:9b334a45a8ff | 5154 | if(hhrtim->State == HAL_HRTIM_STATE_BUSY) |
bogdanm | 0:9b334a45a8ff | 5155 | { |
bogdanm | 0:9b334a45a8ff | 5156 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 5157 | } |
bogdanm | 0:9b334a45a8ff | 5158 | |
bogdanm | 0:9b334a45a8ff | 5159 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 5160 | __HAL_LOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 5161 | |
bogdanm | 0:9b334a45a8ff | 5162 | hhrtim->State = HAL_HRTIM_STATE_BUSY; |
bogdanm | 0:9b334a45a8ff | 5163 | |
bogdanm | 0:9b334a45a8ff | 5164 | /* Force a software capture on concerned capture unit */ |
bogdanm | 0:9b334a45a8ff | 5165 | switch (CaptureUnit) |
bogdanm | 0:9b334a45a8ff | 5166 | { |
bogdanm | 0:9b334a45a8ff | 5167 | case HRTIM_CAPTUREUNIT_1: |
bogdanm | 0:9b334a45a8ff | 5168 | { |
bogdanm | 0:9b334a45a8ff | 5169 | hhrtim->Instance->sTimerxRegs[TimerIdx].CPT1xCR |= HRTIM_CPT1CR_SWCPT; |
bogdanm | 0:9b334a45a8ff | 5170 | } |
bogdanm | 0:9b334a45a8ff | 5171 | break; |
bogdanm | 0:9b334a45a8ff | 5172 | case HRTIM_CAPTUREUNIT_2: |
bogdanm | 0:9b334a45a8ff | 5173 | { |
bogdanm | 0:9b334a45a8ff | 5174 | hhrtim->Instance->sTimerxRegs[TimerIdx].CPT2xCR |= HRTIM_CPT2CR_SWCPT; |
bogdanm | 0:9b334a45a8ff | 5175 | } |
bogdanm | 0:9b334a45a8ff | 5176 | break; |
bogdanm | 0:9b334a45a8ff | 5177 | } |
bogdanm | 0:9b334a45a8ff | 5178 | |
bogdanm | 0:9b334a45a8ff | 5179 | hhrtim->State = HAL_HRTIM_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 5180 | |
bogdanm | 0:9b334a45a8ff | 5181 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 5182 | __HAL_UNLOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 5183 | |
bogdanm | 0:9b334a45a8ff | 5184 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 5185 | } |
bogdanm | 0:9b334a45a8ff | 5186 | |
bogdanm | 0:9b334a45a8ff | 5187 | /** |
bogdanm | 0:9b334a45a8ff | 5188 | * @brief Triggers the update of the registers of one or several timers |
bogdanm | 0:9b334a45a8ff | 5189 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 5190 | * @param Timers: timers concerned with the software register update |
bogdanm | 0:9b334a45a8ff | 5191 | * This parameter can be any combination of the following values: |
bogdanm | 0:9b334a45a8ff | 5192 | * @arg HRTIM_TIMERUPDATE_MASTER |
bogdanm | 0:9b334a45a8ff | 5193 | * @arg HRTIM_TIMERUPDATE_A |
bogdanm | 0:9b334a45a8ff | 5194 | * @arg HRTIM_TIMERUPDATE_B |
bogdanm | 0:9b334a45a8ff | 5195 | * @arg HRTIM_TIMERUPDATE_C |
bogdanm | 0:9b334a45a8ff | 5196 | * @arg HRTIM_TIMERUPDATE_D |
bogdanm | 0:9b334a45a8ff | 5197 | * @arg HRTIM_TIMERUPDATE_E |
bogdanm | 0:9b334a45a8ff | 5198 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 5199 | * @note The 'software update' bits in the HRTIM conrol register 2 register are |
bogdanm | 0:9b334a45a8ff | 5200 | * automatically reset by hardware |
bogdanm | 0:9b334a45a8ff | 5201 | */ |
bogdanm | 0:9b334a45a8ff | 5202 | HAL_StatusTypeDef HAL_HRTIM_SoftwareUpdate(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 5203 | uint32_t Timers) |
bogdanm | 0:9b334a45a8ff | 5204 | { |
bogdanm | 0:9b334a45a8ff | 5205 | /* Check parameters */ |
bogdanm | 0:9b334a45a8ff | 5206 | assert_param(IS_HRTIM_TIMERUPDATE(Timers)); |
bogdanm | 0:9b334a45a8ff | 5207 | |
bogdanm | 0:9b334a45a8ff | 5208 | if(hhrtim->State == HAL_HRTIM_STATE_BUSY) |
bogdanm | 0:9b334a45a8ff | 5209 | { |
bogdanm | 0:9b334a45a8ff | 5210 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 5211 | } |
bogdanm | 0:9b334a45a8ff | 5212 | |
bogdanm | 0:9b334a45a8ff | 5213 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 5214 | __HAL_LOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 5215 | |
bogdanm | 0:9b334a45a8ff | 5216 | hhrtim->State = HAL_HRTIM_STATE_BUSY; |
bogdanm | 0:9b334a45a8ff | 5217 | |
bogdanm | 0:9b334a45a8ff | 5218 | /* Force timer(s) registers update */ |
bogdanm | 0:9b334a45a8ff | 5219 | hhrtim->Instance->sCommonRegs.CR2 |= Timers; |
bogdanm | 0:9b334a45a8ff | 5220 | |
bogdanm | 0:9b334a45a8ff | 5221 | hhrtim->State = HAL_HRTIM_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 5222 | |
bogdanm | 0:9b334a45a8ff | 5223 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 5224 | __HAL_UNLOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 5225 | |
bogdanm | 0:9b334a45a8ff | 5226 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 5227 | } |
bogdanm | 0:9b334a45a8ff | 5228 | |
bogdanm | 0:9b334a45a8ff | 5229 | /** |
bogdanm | 0:9b334a45a8ff | 5230 | * @brief Triggers the reset of one or several timers |
bogdanm | 0:9b334a45a8ff | 5231 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 5232 | * @param Timers: timers concerned with the software counter reset |
bogdanm | 0:9b334a45a8ff | 5233 | * This parameter can be any combination of the following values: |
bogdanm | 0:9b334a45a8ff | 5234 | * @arg HRTIM_TIMERRESET_MASTER |
bogdanm | 0:9b334a45a8ff | 5235 | * @arg HRTIM_TIMERRESET_TIMER_A |
bogdanm | 0:9b334a45a8ff | 5236 | * @arg HRTIM_TIMERRESET_TIMER_B |
bogdanm | 0:9b334a45a8ff | 5237 | * @arg HRTIM_TIMERRESET_TIMER_C |
bogdanm | 0:9b334a45a8ff | 5238 | * @arg HRTIM_TIMERRESET_TIMER_D |
bogdanm | 0:9b334a45a8ff | 5239 | * @arg HRTIM_TIMERRESET_TIMER_E |
bogdanm | 0:9b334a45a8ff | 5240 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 5241 | * @note The 'software reset' bits in the HRTIM conrol register 2 are |
bogdanm | 0:9b334a45a8ff | 5242 | * automatically reset by hardware |
bogdanm | 0:9b334a45a8ff | 5243 | */ |
bogdanm | 0:9b334a45a8ff | 5244 | HAL_StatusTypeDef HAL_HRTIM_SoftwareReset(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 5245 | uint32_t Timers) |
bogdanm | 0:9b334a45a8ff | 5246 | { |
bogdanm | 0:9b334a45a8ff | 5247 | /* Check parameters */ |
bogdanm | 0:9b334a45a8ff | 5248 | assert_param(IS_HRTIM_TIMERRESET(Timers)); |
bogdanm | 0:9b334a45a8ff | 5249 | |
bogdanm | 0:9b334a45a8ff | 5250 | if(hhrtim->State == HAL_HRTIM_STATE_BUSY) |
bogdanm | 0:9b334a45a8ff | 5251 | { |
bogdanm | 0:9b334a45a8ff | 5252 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 5253 | } |
bogdanm | 0:9b334a45a8ff | 5254 | |
bogdanm | 0:9b334a45a8ff | 5255 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 5256 | __HAL_LOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 5257 | |
bogdanm | 0:9b334a45a8ff | 5258 | hhrtim->State = HAL_HRTIM_STATE_BUSY; |
bogdanm | 0:9b334a45a8ff | 5259 | |
bogdanm | 0:9b334a45a8ff | 5260 | /* Force timer(s) registers reset */ |
bogdanm | 0:9b334a45a8ff | 5261 | hhrtim->Instance->sCommonRegs.CR2 = Timers; |
bogdanm | 0:9b334a45a8ff | 5262 | |
bogdanm | 0:9b334a45a8ff | 5263 | hhrtim->State = HAL_HRTIM_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 5264 | |
bogdanm | 0:9b334a45a8ff | 5265 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 5266 | __HAL_UNLOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 5267 | |
bogdanm | 0:9b334a45a8ff | 5268 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 5269 | } |
bogdanm | 0:9b334a45a8ff | 5270 | |
bogdanm | 0:9b334a45a8ff | 5271 | /** |
bogdanm | 0:9b334a45a8ff | 5272 | * @brief Starts a burst DMA operation to update HRTIM control registers content |
bogdanm | 0:9b334a45a8ff | 5273 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 5274 | * @param TimerIdx: Timer index |
bogdanm | 0:9b334a45a8ff | 5275 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 5276 | * @arg HRTIM_TIMERINDEX_MASTER for master timer |
bogdanm | 0:9b334a45a8ff | 5277 | * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
bogdanm | 0:9b334a45a8ff | 5278 | * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
bogdanm | 0:9b334a45a8ff | 5279 | * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
bogdanm | 0:9b334a45a8ff | 5280 | * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
bogdanm | 0:9b334a45a8ff | 5281 | * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
bogdanm | 0:9b334a45a8ff | 5282 | * @param BurstBufferAddress: address of the buffer the HRTIM control registers |
bogdanm | 0:9b334a45a8ff | 5283 | * content will be updated from. |
bogdanm | 0:9b334a45a8ff | 5284 | * @param BurstBufferLength: size (in WORDS) of the burst buffer. |
bogdanm | 0:9b334a45a8ff | 5285 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 5286 | * @note The TimerIdx parameter determines the dma channel to be used by the |
bogdanm | 0:9b334a45a8ff | 5287 | * DMA burst controller (see below) |
bogdanm | 0:9b334a45a8ff | 5288 | * HRTIM_TIMERINDEX_MASTER: DMA channel 2 is used by the DMA burst controller |
bogdanm | 0:9b334a45a8ff | 5289 | * HRTIM_TIMERINDEX_TIMER_A: DMA channel 3 is used by the DMA burst controller |
bogdanm | 0:9b334a45a8ff | 5290 | * HRTIM_TIMERINDEX_TIMER_B: DMA channel 4 is used by the DMA burst controller |
bogdanm | 0:9b334a45a8ff | 5291 | * HRTIM_TIMERINDEX_TIMER_C: DMA channel 5 is used by the DMA burst controller |
bogdanm | 0:9b334a45a8ff | 5292 | * HRTIM_TIMERINDEX_TIMER_D: DMA channel 6 is used by the DMA burst controller |
bogdanm | 0:9b334a45a8ff | 5293 | * HRTIM_TIMERINDEX_TIMER_E: DMA channel 7 is used by the DMA burst controller |
bogdanm | 0:9b334a45a8ff | 5294 | */ |
bogdanm | 0:9b334a45a8ff | 5295 | HAL_StatusTypeDef HAL_HRTIM_BurstDMATransfer(HRTIM_HandleTypeDef *hhrtim, |
bogdanm | 0:9b334a45a8ff | 5296 | uint32_t TimerIdx, |
bogdanm | 0:9b334a45a8ff | 5297 | uint32_t BurstBufferAddress, |
bogdanm | 0:9b334a45a8ff | 5298 | uint32_t BurstBufferLength) |
bogdanm | 0:9b334a45a8ff | 5299 | { |
bogdanm | 0:9b334a45a8ff | 5300 | DMA_HandleTypeDef * hdma; |
bogdanm | 0:9b334a45a8ff | 5301 | |
bogdanm | 0:9b334a45a8ff | 5302 | /* Check the parameters */ |
bogdanm | 0:9b334a45a8ff | 5303 | assert_param(IS_HRTIM_TIMERINDEX(TimerIdx)); |
bogdanm | 0:9b334a45a8ff | 5304 | |
bogdanm | 0:9b334a45a8ff | 5305 | if((hhrtim->State == HAL_HRTIM_STATE_BUSY)) |
bogdanm | 0:9b334a45a8ff | 5306 | { |
bogdanm | 0:9b334a45a8ff | 5307 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 5308 | } |
bogdanm | 0:9b334a45a8ff | 5309 | if((hhrtim->State == HAL_HRTIM_STATE_READY)) |
bogdanm | 0:9b334a45a8ff | 5310 | { |
bogdanm | 0:9b334a45a8ff | 5311 | if((BurstBufferAddress == 0 ) || (BurstBufferLength == 0)) |
bogdanm | 0:9b334a45a8ff | 5312 | { |
bogdanm | 0:9b334a45a8ff | 5313 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 5314 | } |
bogdanm | 0:9b334a45a8ff | 5315 | else |
bogdanm | 0:9b334a45a8ff | 5316 | { |
bogdanm | 0:9b334a45a8ff | 5317 | hhrtim->State = HAL_HRTIM_STATE_BUSY; |
bogdanm | 0:9b334a45a8ff | 5318 | } |
bogdanm | 0:9b334a45a8ff | 5319 | } |
bogdanm | 0:9b334a45a8ff | 5320 | |
bogdanm | 0:9b334a45a8ff | 5321 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 5322 | __HAL_LOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 5323 | |
bogdanm | 0:9b334a45a8ff | 5324 | /* Get the timer DMA handler */ |
bogdanm | 0:9b334a45a8ff | 5325 | hdma = HRTIM_GetDMAHandleFromTimerIdx(hhrtim, TimerIdx); |
bogdanm | 0:9b334a45a8ff | 5326 | |
bogdanm | 0:9b334a45a8ff | 5327 | /* Set the DMA transfer completed callback */ |
bogdanm | 0:9b334a45a8ff | 5328 | hdma->XferCpltCallback = HRTIM_BurstDMACplt; |
bogdanm | 0:9b334a45a8ff | 5329 | |
bogdanm | 0:9b334a45a8ff | 5330 | /* Set the DMA error callback */ |
bogdanm | 0:9b334a45a8ff | 5331 | hdma->XferErrorCallback = HRTIM_DMAError ; |
bogdanm | 0:9b334a45a8ff | 5332 | |
bogdanm | 0:9b334a45a8ff | 5333 | /* Enable the DMA channel */ |
bogdanm | 0:9b334a45a8ff | 5334 | HAL_DMA_Start_IT(hdma, |
bogdanm | 0:9b334a45a8ff | 5335 | BurstBufferAddress, |
bogdanm | 0:9b334a45a8ff | 5336 | (uint32_t)&(hhrtim->Instance->sCommonRegs.BDMADR), |
bogdanm | 0:9b334a45a8ff | 5337 | BurstBufferLength); |
bogdanm | 0:9b334a45a8ff | 5338 | |
bogdanm | 0:9b334a45a8ff | 5339 | hhrtim->State = HAL_HRTIM_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 5340 | |
bogdanm | 0:9b334a45a8ff | 5341 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 5342 | __HAL_UNLOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 5343 | |
bogdanm | 0:9b334a45a8ff | 5344 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 5345 | } |
bogdanm | 0:9b334a45a8ff | 5346 | |
bogdanm | 0:9b334a45a8ff | 5347 | /** |
bogdanm | 0:9b334a45a8ff | 5348 | * @brief Enables the transfer from preload to active registers for one |
bogdanm | 0:9b334a45a8ff | 5349 | * or several timing units (including master timer) |
bogdanm | 0:9b334a45a8ff | 5350 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 5351 | * @param Timers: Timer(s) concerned by the register preload enabling command |
bogdanm | 0:9b334a45a8ff | 5352 | * This parameter can be any combination of the following values: |
bogdanm | 0:9b334a45a8ff | 5353 | * @arg HRTIM_TIMERUPDATE_MASTER |
bogdanm | 0:9b334a45a8ff | 5354 | * @arg HRTIM_TIMERUPDATE_A |
bogdanm | 0:9b334a45a8ff | 5355 | * @arg HRTIM_TIMERUPDATE_B |
bogdanm | 0:9b334a45a8ff | 5356 | * @arg HRTIM_TIMERUPDATE_C |
bogdanm | 0:9b334a45a8ff | 5357 | * @arg HRTIM_TIMERUPDATE_D |
bogdanm | 0:9b334a45a8ff | 5358 | * @arg HRTIM_TIMERUPDATE_E |
bogdanm | 0:9b334a45a8ff | 5359 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 5360 | */ |
bogdanm | 0:9b334a45a8ff | 5361 | HAL_StatusTypeDef HAL_HRTIM_UpdateEnable(HRTIM_HandleTypeDef *hhrtim, |
bogdanm | 0:9b334a45a8ff | 5362 | uint32_t Timers) |
bogdanm | 0:9b334a45a8ff | 5363 | { |
bogdanm | 0:9b334a45a8ff | 5364 | /* Check the parameters */ |
bogdanm | 0:9b334a45a8ff | 5365 | assert_param(IS_HRTIM_TIMERUPDATE(Timers)); |
bogdanm | 0:9b334a45a8ff | 5366 | |
bogdanm | 0:9b334a45a8ff | 5367 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 5368 | __HAL_LOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 5369 | |
bogdanm | 0:9b334a45a8ff | 5370 | hhrtim->State = HAL_HRTIM_STATE_BUSY; |
bogdanm | 0:9b334a45a8ff | 5371 | |
bogdanm | 0:9b334a45a8ff | 5372 | /* Enable timer(s) registers update */ |
bogdanm | 0:9b334a45a8ff | 5373 | hhrtim->Instance->sCommonRegs.CR1 &= ~(Timers); |
bogdanm | 0:9b334a45a8ff | 5374 | |
bogdanm | 0:9b334a45a8ff | 5375 | hhrtim->State = HAL_HRTIM_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 5376 | |
bogdanm | 0:9b334a45a8ff | 5377 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 5378 | __HAL_UNLOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 5379 | |
bogdanm | 0:9b334a45a8ff | 5380 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 5381 | } |
bogdanm | 0:9b334a45a8ff | 5382 | |
bogdanm | 0:9b334a45a8ff | 5383 | /** |
bogdanm | 0:9b334a45a8ff | 5384 | * @brief Disables the transfer from preload to active registers for one |
bogdanm | 0:9b334a45a8ff | 5385 | * or several timing units (including master timer) |
bogdanm | 0:9b334a45a8ff | 5386 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 5387 | * @param Timers: Timer(s) concerned by the register preload disabling command |
bogdanm | 0:9b334a45a8ff | 5388 | * This parameter can be any combination of the following values: |
bogdanm | 0:9b334a45a8ff | 5389 | * @arg HRTIM_TIMERUPDATE_MASTER |
bogdanm | 0:9b334a45a8ff | 5390 | * @arg HRTIM_TIMERUPDATE_A |
bogdanm | 0:9b334a45a8ff | 5391 | * @arg HRTIM_TIMERUPDATE_B |
bogdanm | 0:9b334a45a8ff | 5392 | * @arg HRTIM_TIMERUPDATE_C |
bogdanm | 0:9b334a45a8ff | 5393 | * @arg HRTIM_TIMERUPDATE_D |
bogdanm | 0:9b334a45a8ff | 5394 | * @arg HRTIM_TIMERUPDATE_E |
bogdanm | 0:9b334a45a8ff | 5395 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 5396 | */ |
bogdanm | 0:9b334a45a8ff | 5397 | HAL_StatusTypeDef HAL_HRTIM_UpdateDisable(HRTIM_HandleTypeDef *hhrtim, |
bogdanm | 0:9b334a45a8ff | 5398 | uint32_t Timers) |
bogdanm | 0:9b334a45a8ff | 5399 | { |
bogdanm | 0:9b334a45a8ff | 5400 | /* Check the parameters */ |
bogdanm | 0:9b334a45a8ff | 5401 | assert_param(IS_HRTIM_TIMERUPDATE(Timers)); |
bogdanm | 0:9b334a45a8ff | 5402 | |
bogdanm | 0:9b334a45a8ff | 5403 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 5404 | __HAL_LOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 5405 | |
bogdanm | 0:9b334a45a8ff | 5406 | hhrtim->State = HAL_HRTIM_STATE_BUSY; |
bogdanm | 0:9b334a45a8ff | 5407 | |
bogdanm | 0:9b334a45a8ff | 5408 | /* Enable timer(s) registers update */ |
bogdanm | 0:9b334a45a8ff | 5409 | hhrtim->Instance->sCommonRegs.CR1 |= (Timers); |
bogdanm | 0:9b334a45a8ff | 5410 | |
bogdanm | 0:9b334a45a8ff | 5411 | hhrtim->State = HAL_HRTIM_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 5412 | |
bogdanm | 0:9b334a45a8ff | 5413 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 5414 | __HAL_UNLOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 5415 | |
bogdanm | 0:9b334a45a8ff | 5416 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 5417 | } |
bogdanm | 0:9b334a45a8ff | 5418 | |
bogdanm | 0:9b334a45a8ff | 5419 | /** |
bogdanm | 0:9b334a45a8ff | 5420 | * @} |
bogdanm | 0:9b334a45a8ff | 5421 | */ |
bogdanm | 0:9b334a45a8ff | 5422 | |
bogdanm | 0:9b334a45a8ff | 5423 | /** @defgroup HRTIM_Exported_Functions_Group9 Peripheral state functions |
bogdanm | 0:9b334a45a8ff | 5424 | * @brief Functions used to get HRTIM or HRTIM timer specific |
bogdanm | 0:9b334a45a8ff | 5425 | * information. |
bogdanm | 0:9b334a45a8ff | 5426 | * |
bogdanm | 0:9b334a45a8ff | 5427 | @verbatim |
bogdanm | 0:9b334a45a8ff | 5428 | =============================================================================== |
bogdanm | 0:9b334a45a8ff | 5429 | ##### Peripheral State functions ##### |
bogdanm | 0:9b334a45a8ff | 5430 | =============================================================================== |
bogdanm | 0:9b334a45a8ff | 5431 | [..] This section provides functions allowing to: |
bogdanm | 0:9b334a45a8ff | 5432 | (+) Get HRTIM HAL state |
bogdanm | 0:9b334a45a8ff | 5433 | (+) Get captured value |
bogdanm | 0:9b334a45a8ff | 5434 | (+) Get HRTIM timer output level |
bogdanm | 0:9b334a45a8ff | 5435 | (+) Get HRTIM timer output state |
bogdanm | 0:9b334a45a8ff | 5436 | (+) Get delayed protection status |
bogdanm | 0:9b334a45a8ff | 5437 | (+) Get burst status |
bogdanm | 0:9b334a45a8ff | 5438 | (+) Get current push-pull status |
bogdanm | 0:9b334a45a8ff | 5439 | (+) Get idle push-pull status |
bogdanm | 0:9b334a45a8ff | 5440 | |
bogdanm | 0:9b334a45a8ff | 5441 | @endverbatim |
bogdanm | 0:9b334a45a8ff | 5442 | * @{ |
bogdanm | 0:9b334a45a8ff | 5443 | */ |
bogdanm | 0:9b334a45a8ff | 5444 | |
bogdanm | 0:9b334a45a8ff | 5445 | /** |
bogdanm | 0:9b334a45a8ff | 5446 | * @brief return the HRTIM HAL state |
bogdanm | 0:9b334a45a8ff | 5447 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 5448 | * @retval HAL state |
bogdanm | 0:9b334a45a8ff | 5449 | */ |
bogdanm | 0:9b334a45a8ff | 5450 | HAL_HRTIM_StateTypeDef HAL_HRTIM_GetState(HRTIM_HandleTypeDef* hhrtim) |
bogdanm | 0:9b334a45a8ff | 5451 | { |
bogdanm | 0:9b334a45a8ff | 5452 | /* Return ADC state */ |
bogdanm | 0:9b334a45a8ff | 5453 | return hhrtim->State; |
bogdanm | 0:9b334a45a8ff | 5454 | } |
bogdanm | 0:9b334a45a8ff | 5455 | |
bogdanm | 0:9b334a45a8ff | 5456 | /** |
bogdanm | 0:9b334a45a8ff | 5457 | * @brief Returns actual value of the capture register of the designated capture unit |
bogdanm | 0:9b334a45a8ff | 5458 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 5459 | * @param TimerIdx: Timer index |
bogdanm | 0:9b334a45a8ff | 5460 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 5461 | * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
bogdanm | 0:9b334a45a8ff | 5462 | * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
bogdanm | 0:9b334a45a8ff | 5463 | * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
bogdanm | 0:9b334a45a8ff | 5464 | * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
bogdanm | 0:9b334a45a8ff | 5465 | * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
bogdanm | 0:9b334a45a8ff | 5466 | * @param CaptureUnit: Capture unit to trig |
bogdanm | 0:9b334a45a8ff | 5467 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 5468 | * @arg HRTIM_CAPTUREUNIT_1: Capture unit 1 |
bogdanm | 0:9b334a45a8ff | 5469 | * @arg HRTIM_CAPTUREUNIT_2: Capture unit 2 |
bogdanm | 0:9b334a45a8ff | 5470 | * @retval Captured value |
bogdanm | 0:9b334a45a8ff | 5471 | */ |
bogdanm | 0:9b334a45a8ff | 5472 | uint32_t HAL_HRTIM_GetCapturedValue(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 5473 | uint32_t TimerIdx, |
bogdanm | 0:9b334a45a8ff | 5474 | uint32_t CaptureUnit) |
bogdanm | 0:9b334a45a8ff | 5475 | { |
bogdanm | 0:9b334a45a8ff | 5476 | uint32_t captured_value = 0; |
bogdanm | 0:9b334a45a8ff | 5477 | |
bogdanm | 0:9b334a45a8ff | 5478 | /* Check parameters */ |
bogdanm | 0:9b334a45a8ff | 5479 | assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx)); |
bogdanm | 0:9b334a45a8ff | 5480 | assert_param(IS_HRTIM_CAPTUREUNIT(CaptureUnit)); |
bogdanm | 0:9b334a45a8ff | 5481 | |
bogdanm | 0:9b334a45a8ff | 5482 | /* Read captured value */ |
bogdanm | 0:9b334a45a8ff | 5483 | switch (CaptureUnit) |
bogdanm | 0:9b334a45a8ff | 5484 | { |
bogdanm | 0:9b334a45a8ff | 5485 | case HRTIM_CAPTUREUNIT_1: |
bogdanm | 0:9b334a45a8ff | 5486 | { |
bogdanm | 0:9b334a45a8ff | 5487 | captured_value = hhrtim->Instance->sTimerxRegs[TimerIdx].CPT1xR; |
bogdanm | 0:9b334a45a8ff | 5488 | } |
bogdanm | 0:9b334a45a8ff | 5489 | break; |
bogdanm | 0:9b334a45a8ff | 5490 | case HRTIM_CAPTUREUNIT_2: |
bogdanm | 0:9b334a45a8ff | 5491 | { |
bogdanm | 0:9b334a45a8ff | 5492 | captured_value = hhrtim->Instance->sTimerxRegs[TimerIdx].CPT2xR; |
bogdanm | 0:9b334a45a8ff | 5493 | } |
bogdanm | 0:9b334a45a8ff | 5494 | break; |
bogdanm | 0:9b334a45a8ff | 5495 | } |
bogdanm | 0:9b334a45a8ff | 5496 | |
bogdanm | 0:9b334a45a8ff | 5497 | return captured_value; |
bogdanm | 0:9b334a45a8ff | 5498 | } |
bogdanm | 0:9b334a45a8ff | 5499 | |
bogdanm | 0:9b334a45a8ff | 5500 | /** |
bogdanm | 0:9b334a45a8ff | 5501 | * @brief Returns actual level (active or inactive) of the designated output |
bogdanm | 0:9b334a45a8ff | 5502 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 5503 | * @param TimerIdx: Timer index |
bogdanm | 0:9b334a45a8ff | 5504 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 5505 | * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
bogdanm | 0:9b334a45a8ff | 5506 | * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
bogdanm | 0:9b334a45a8ff | 5507 | * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
bogdanm | 0:9b334a45a8ff | 5508 | * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
bogdanm | 0:9b334a45a8ff | 5509 | * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
bogdanm | 0:9b334a45a8ff | 5510 | * @param Output: Timer output |
bogdanm | 0:9b334a45a8ff | 5511 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 5512 | * @arg HRTIM_OUTPUT_TA1: Timer A - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 5513 | * @arg HRTIM_OUTPUT_TA2: Timer A - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 5514 | * @arg HRTIM_OUTPUT_TB1: Timer B - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 5515 | * @arg HRTIM_OUTPUT_TB2: Timer B - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 5516 | * @arg HRTIM_OUTPUT_TC1: Timer C - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 5517 | * @arg HRTIM_OUTPUT_TC2: Timer C - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 5518 | * @arg HRTIM_OUTPUT_TD1: Timer D - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 5519 | * @arg HRTIM_OUTPUT_TD2: Timer D - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 5520 | * @arg HRTIM_OUTPUT_TE1: Timer E - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 5521 | * @arg HRTIM_OUTPUT_TE2: Timer E - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 5522 | * @retval Output level |
bogdanm | 0:9b334a45a8ff | 5523 | * @note Returned output level is taken before the output stage (chopper, |
bogdanm | 0:9b334a45a8ff | 5524 | * polarity). |
bogdanm | 0:9b334a45a8ff | 5525 | */ |
bogdanm | 0:9b334a45a8ff | 5526 | uint32_t HAL_HRTIM_WaveformGetOutputLevel(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 5527 | uint32_t TimerIdx, |
bogdanm | 0:9b334a45a8ff | 5528 | uint32_t Output) |
bogdanm | 0:9b334a45a8ff | 5529 | { |
bogdanm | 0:9b334a45a8ff | 5530 | uint32_t output_level = HRTIM_OUTPUTLEVEL_INACTIVE; |
bogdanm | 0:9b334a45a8ff | 5531 | |
bogdanm | 0:9b334a45a8ff | 5532 | /* Check parameters */ |
bogdanm | 0:9b334a45a8ff | 5533 | assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, Output)); |
bogdanm | 0:9b334a45a8ff | 5534 | |
bogdanm | 0:9b334a45a8ff | 5535 | /* Read the output level */ |
bogdanm | 0:9b334a45a8ff | 5536 | switch (Output) |
bogdanm | 0:9b334a45a8ff | 5537 | { |
bogdanm | 0:9b334a45a8ff | 5538 | case HRTIM_OUTPUT_TA1: |
bogdanm | 0:9b334a45a8ff | 5539 | case HRTIM_OUTPUT_TB1: |
bogdanm | 0:9b334a45a8ff | 5540 | case HRTIM_OUTPUT_TC1: |
bogdanm | 0:9b334a45a8ff | 5541 | case HRTIM_OUTPUT_TD1: |
bogdanm | 0:9b334a45a8ff | 5542 | case HRTIM_OUTPUT_TE1: |
bogdanm | 0:9b334a45a8ff | 5543 | { |
bogdanm | 0:9b334a45a8ff | 5544 | if ((hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxISR & HRTIM_TIMISR_O1CPY) != RESET) |
bogdanm | 0:9b334a45a8ff | 5545 | { |
bogdanm | 0:9b334a45a8ff | 5546 | output_level = HRTIM_OUTPUTLEVEL_ACTIVE; |
bogdanm | 0:9b334a45a8ff | 5547 | } |
bogdanm | 0:9b334a45a8ff | 5548 | else |
bogdanm | 0:9b334a45a8ff | 5549 | { |
bogdanm | 0:9b334a45a8ff | 5550 | output_level = HRTIM_OUTPUTLEVEL_INACTIVE; |
bogdanm | 0:9b334a45a8ff | 5551 | } |
bogdanm | 0:9b334a45a8ff | 5552 | } |
bogdanm | 0:9b334a45a8ff | 5553 | break; |
bogdanm | 0:9b334a45a8ff | 5554 | case HRTIM_OUTPUT_TA2: |
bogdanm | 0:9b334a45a8ff | 5555 | case HRTIM_OUTPUT_TB2: |
bogdanm | 0:9b334a45a8ff | 5556 | case HRTIM_OUTPUT_TC2: |
bogdanm | 0:9b334a45a8ff | 5557 | case HRTIM_OUTPUT_TD2: |
bogdanm | 0:9b334a45a8ff | 5558 | case HRTIM_OUTPUT_TE2: |
bogdanm | 0:9b334a45a8ff | 5559 | { |
bogdanm | 0:9b334a45a8ff | 5560 | if ((hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxISR & HRTIM_TIMISR_O2CPY) != RESET) |
bogdanm | 0:9b334a45a8ff | 5561 | { |
bogdanm | 0:9b334a45a8ff | 5562 | output_level = HRTIM_OUTPUTLEVEL_ACTIVE; |
bogdanm | 0:9b334a45a8ff | 5563 | } |
bogdanm | 0:9b334a45a8ff | 5564 | else |
bogdanm | 0:9b334a45a8ff | 5565 | { |
bogdanm | 0:9b334a45a8ff | 5566 | output_level = HRTIM_OUTPUTLEVEL_INACTIVE; |
bogdanm | 0:9b334a45a8ff | 5567 | } |
bogdanm | 0:9b334a45a8ff | 5568 | } |
bogdanm | 0:9b334a45a8ff | 5569 | break; |
bogdanm | 0:9b334a45a8ff | 5570 | } |
bogdanm | 0:9b334a45a8ff | 5571 | |
bogdanm | 0:9b334a45a8ff | 5572 | return output_level; |
bogdanm | 0:9b334a45a8ff | 5573 | } |
bogdanm | 0:9b334a45a8ff | 5574 | |
bogdanm | 0:9b334a45a8ff | 5575 | /** |
bogdanm | 0:9b334a45a8ff | 5576 | * @brief Returns actual state (RUN, IDLE, FAULT) of the designated output |
bogdanm | 0:9b334a45a8ff | 5577 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 5578 | * @param TimerIdx: Timer index |
bogdanm | 0:9b334a45a8ff | 5579 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 5580 | * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
bogdanm | 0:9b334a45a8ff | 5581 | * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
bogdanm | 0:9b334a45a8ff | 5582 | * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
bogdanm | 0:9b334a45a8ff | 5583 | * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
bogdanm | 0:9b334a45a8ff | 5584 | * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
bogdanm | 0:9b334a45a8ff | 5585 | * @param Output: Timer output |
bogdanm | 0:9b334a45a8ff | 5586 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 5587 | * @arg HRTIM_OUTPUT_TA1: Timer A - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 5588 | * @arg HRTIM_OUTPUT_TA2: Timer A - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 5589 | * @arg HRTIM_OUTPUT_TB1: Timer B - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 5590 | * @arg HRTIM_OUTPUT_TB2: Timer B - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 5591 | * @arg HRTIM_OUTPUT_TC1: Timer C - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 5592 | * @arg HRTIM_OUTPUT_TC2: Timer C - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 5593 | * @arg HRTIM_OUTPUT_TD1: Timer D - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 5594 | * @arg HRTIM_OUTPUT_TD2: Timer D - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 5595 | * @arg HRTIM_OUTPUT_TE1: Timer E - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 5596 | * @arg HRTIM_OUTPUT_TE2: Timer E - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 5597 | * @retval Output state |
bogdanm | 0:9b334a45a8ff | 5598 | */ |
bogdanm | 0:9b334a45a8ff | 5599 | uint32_t HAL_HRTIM_WaveformGetOutputState(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 5600 | uint32_t TimerIdx, |
bogdanm | 0:9b334a45a8ff | 5601 | uint32_t Output) |
bogdanm | 0:9b334a45a8ff | 5602 | { |
bogdanm | 0:9b334a45a8ff | 5603 | uint32_t output_bit = 0; |
bogdanm | 0:9b334a45a8ff | 5604 | uint32_t output_state = HRTIM_OUTPUTSTATE_IDLE; |
bogdanm | 0:9b334a45a8ff | 5605 | |
bogdanm | 0:9b334a45a8ff | 5606 | /* Check parameters */ |
bogdanm | 0:9b334a45a8ff | 5607 | assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, Output)); |
bogdanm | 0:9b334a45a8ff | 5608 | |
bogdanm | 0:9b334a45a8ff | 5609 | /* Set output state according to output control status and output disable status */ |
bogdanm | 0:9b334a45a8ff | 5610 | switch (Output) |
bogdanm | 0:9b334a45a8ff | 5611 | { |
bogdanm | 0:9b334a45a8ff | 5612 | case HRTIM_OUTPUT_TA1: |
bogdanm | 0:9b334a45a8ff | 5613 | { |
bogdanm | 0:9b334a45a8ff | 5614 | output_bit = HRTIM_OENR_TA1OEN; |
bogdanm | 0:9b334a45a8ff | 5615 | } |
bogdanm | 0:9b334a45a8ff | 5616 | break; |
bogdanm | 0:9b334a45a8ff | 5617 | case HRTIM_OUTPUT_TA2: |
bogdanm | 0:9b334a45a8ff | 5618 | { |
bogdanm | 0:9b334a45a8ff | 5619 | output_bit = HRTIM_OENR_TA2OEN; |
bogdanm | 0:9b334a45a8ff | 5620 | } |
bogdanm | 0:9b334a45a8ff | 5621 | break; |
bogdanm | 0:9b334a45a8ff | 5622 | case HRTIM_OUTPUT_TB1: |
bogdanm | 0:9b334a45a8ff | 5623 | { |
bogdanm | 0:9b334a45a8ff | 5624 | output_bit = HRTIM_OENR_TB1OEN; |
bogdanm | 0:9b334a45a8ff | 5625 | } |
bogdanm | 0:9b334a45a8ff | 5626 | break; |
bogdanm | 0:9b334a45a8ff | 5627 | case HRTIM_OUTPUT_TB2: |
bogdanm | 0:9b334a45a8ff | 5628 | { |
bogdanm | 0:9b334a45a8ff | 5629 | output_bit = HRTIM_OENR_TB2OEN; |
bogdanm | 0:9b334a45a8ff | 5630 | } |
bogdanm | 0:9b334a45a8ff | 5631 | break; |
bogdanm | 0:9b334a45a8ff | 5632 | case HRTIM_OUTPUT_TC1: |
bogdanm | 0:9b334a45a8ff | 5633 | { |
bogdanm | 0:9b334a45a8ff | 5634 | output_bit = HRTIM_OENR_TC1OEN; |
bogdanm | 0:9b334a45a8ff | 5635 | } |
bogdanm | 0:9b334a45a8ff | 5636 | break; |
bogdanm | 0:9b334a45a8ff | 5637 | case HRTIM_OUTPUT_TC2: |
bogdanm | 0:9b334a45a8ff | 5638 | { |
bogdanm | 0:9b334a45a8ff | 5639 | output_bit = HRTIM_OENR_TC2OEN; |
bogdanm | 0:9b334a45a8ff | 5640 | } |
bogdanm | 0:9b334a45a8ff | 5641 | break; |
bogdanm | 0:9b334a45a8ff | 5642 | case HRTIM_OUTPUT_TD1: |
bogdanm | 0:9b334a45a8ff | 5643 | { |
bogdanm | 0:9b334a45a8ff | 5644 | output_bit = HRTIM_OENR_TD1OEN; |
bogdanm | 0:9b334a45a8ff | 5645 | } |
bogdanm | 0:9b334a45a8ff | 5646 | break; |
bogdanm | 0:9b334a45a8ff | 5647 | case HRTIM_OUTPUT_TD2: |
bogdanm | 0:9b334a45a8ff | 5648 | { |
bogdanm | 0:9b334a45a8ff | 5649 | output_bit = HRTIM_OENR_TD2OEN; |
bogdanm | 0:9b334a45a8ff | 5650 | } |
bogdanm | 0:9b334a45a8ff | 5651 | break; |
bogdanm | 0:9b334a45a8ff | 5652 | case HRTIM_OUTPUT_TE1: |
bogdanm | 0:9b334a45a8ff | 5653 | { |
bogdanm | 0:9b334a45a8ff | 5654 | output_bit = HRTIM_OENR_TE1OEN; |
bogdanm | 0:9b334a45a8ff | 5655 | } |
bogdanm | 0:9b334a45a8ff | 5656 | break; |
bogdanm | 0:9b334a45a8ff | 5657 | case HRTIM_OUTPUT_TE2: |
bogdanm | 0:9b334a45a8ff | 5658 | { |
bogdanm | 0:9b334a45a8ff | 5659 | output_bit = HRTIM_OENR_TE2OEN; |
bogdanm | 0:9b334a45a8ff | 5660 | } |
bogdanm | 0:9b334a45a8ff | 5661 | break; |
bogdanm | 0:9b334a45a8ff | 5662 | } |
bogdanm | 0:9b334a45a8ff | 5663 | |
bogdanm | 0:9b334a45a8ff | 5664 | if ((hhrtim->Instance->sCommonRegs.OENR & output_bit) != RESET) |
bogdanm | 0:9b334a45a8ff | 5665 | { |
bogdanm | 0:9b334a45a8ff | 5666 | /* Output is enabled: output in RUN state (whatever ouput disable status is)*/ |
bogdanm | 0:9b334a45a8ff | 5667 | output_state = HRTIM_OUTPUTSTATE_RUN; |
bogdanm | 0:9b334a45a8ff | 5668 | } |
bogdanm | 0:9b334a45a8ff | 5669 | else |
bogdanm | 0:9b334a45a8ff | 5670 | { |
bogdanm | 0:9b334a45a8ff | 5671 | if ((hhrtim->Instance->sCommonRegs.ODSR & output_bit) != RESET) |
bogdanm | 0:9b334a45a8ff | 5672 | { |
bogdanm | 0:9b334a45a8ff | 5673 | /* Output is disabled: output in FAULT state */ |
bogdanm | 0:9b334a45a8ff | 5674 | output_state = HRTIM_OUTPUTSTATE_FAULT; |
bogdanm | 0:9b334a45a8ff | 5675 | } |
bogdanm | 0:9b334a45a8ff | 5676 | else |
bogdanm | 0:9b334a45a8ff | 5677 | { |
bogdanm | 0:9b334a45a8ff | 5678 | /* Output is disabled: output in IDLE state */ |
bogdanm | 0:9b334a45a8ff | 5679 | output_state = HRTIM_OUTPUTSTATE_IDLE; |
bogdanm | 0:9b334a45a8ff | 5680 | } |
bogdanm | 0:9b334a45a8ff | 5681 | } |
bogdanm | 0:9b334a45a8ff | 5682 | |
bogdanm | 0:9b334a45a8ff | 5683 | return(output_state); |
bogdanm | 0:9b334a45a8ff | 5684 | } |
bogdanm | 0:9b334a45a8ff | 5685 | |
bogdanm | 0:9b334a45a8ff | 5686 | /** |
bogdanm | 0:9b334a45a8ff | 5687 | * @brief Returns the level (active or inactive) of the designated output |
bogdanm | 0:9b334a45a8ff | 5688 | * when the delayed protection was triggered |
bogdanm | 0:9b334a45a8ff | 5689 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 5690 | * @param TimerIdx: Timer index |
bogdanm | 0:9b334a45a8ff | 5691 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 5692 | * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
bogdanm | 0:9b334a45a8ff | 5693 | * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
bogdanm | 0:9b334a45a8ff | 5694 | * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
bogdanm | 0:9b334a45a8ff | 5695 | * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
bogdanm | 0:9b334a45a8ff | 5696 | * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
bogdanm | 0:9b334a45a8ff | 5697 | * @param Output: Timer output |
bogdanm | 0:9b334a45a8ff | 5698 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 5699 | * @arg HRTIM_OUTPUT_TA1: Timer A - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 5700 | * @arg HRTIM_OUTPUT_TA2: Timer A - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 5701 | * @arg HRTIM_OUTPUT_TB1: Timer B - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 5702 | * @arg HRTIM_OUTPUT_TB2: Timer B - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 5703 | * @arg HRTIM_OUTPUT_TC1: Timer C - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 5704 | * @arg HRTIM_OUTPUT_TC2: Timer C - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 5705 | * @arg HRTIM_OUTPUT_TD1: Timer D - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 5706 | * @arg HRTIM_OUTPUT_TD2: Timer D - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 5707 | * @arg HRTIM_OUTPUT_TD1: Timer E - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 5708 | * @arg HRTIM_OUTPUT_TD2: Timer E - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 5709 | * @retval Delayed protection status |
bogdanm | 0:9b334a45a8ff | 5710 | */ |
bogdanm | 0:9b334a45a8ff | 5711 | uint32_t HAL_HRTIM_GetDelayedProtectionStatus(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 5712 | uint32_t TimerIdx, |
bogdanm | 0:9b334a45a8ff | 5713 | uint32_t Output) |
bogdanm | 0:9b334a45a8ff | 5714 | { |
bogdanm | 0:9b334a45a8ff | 5715 | uint32_t delayed_protection_status = HRTIM_OUTPUTLEVEL_INACTIVE; |
bogdanm | 0:9b334a45a8ff | 5716 | |
bogdanm | 0:9b334a45a8ff | 5717 | /* Check parameters */ |
bogdanm | 0:9b334a45a8ff | 5718 | assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, Output)); |
bogdanm | 0:9b334a45a8ff | 5719 | |
bogdanm | 0:9b334a45a8ff | 5720 | /* Read the delayed protection status */ |
bogdanm | 0:9b334a45a8ff | 5721 | switch (Output) |
bogdanm | 0:9b334a45a8ff | 5722 | { |
bogdanm | 0:9b334a45a8ff | 5723 | case HRTIM_OUTPUT_TA1: |
bogdanm | 0:9b334a45a8ff | 5724 | case HRTIM_OUTPUT_TB1: |
bogdanm | 0:9b334a45a8ff | 5725 | case HRTIM_OUTPUT_TC1: |
bogdanm | 0:9b334a45a8ff | 5726 | case HRTIM_OUTPUT_TD1: |
bogdanm | 0:9b334a45a8ff | 5727 | case HRTIM_OUTPUT_TE1: |
bogdanm | 0:9b334a45a8ff | 5728 | { |
bogdanm | 0:9b334a45a8ff | 5729 | if ((hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxISR & HRTIM_TIMISR_O1STAT) != RESET) |
bogdanm | 0:9b334a45a8ff | 5730 | { |
bogdanm | 0:9b334a45a8ff | 5731 | /* Output 1 was active when the delayed idle protection was triggered */ |
bogdanm | 0:9b334a45a8ff | 5732 | delayed_protection_status = HRTIM_OUTPUTLEVEL_ACTIVE; |
bogdanm | 0:9b334a45a8ff | 5733 | } |
bogdanm | 0:9b334a45a8ff | 5734 | else |
bogdanm | 0:9b334a45a8ff | 5735 | { |
bogdanm | 0:9b334a45a8ff | 5736 | /* Output 1 was inactive when the delayed idle protection was triggered */ |
bogdanm | 0:9b334a45a8ff | 5737 | delayed_protection_status = HRTIM_OUTPUTLEVEL_INACTIVE; |
bogdanm | 0:9b334a45a8ff | 5738 | } |
bogdanm | 0:9b334a45a8ff | 5739 | } |
bogdanm | 0:9b334a45a8ff | 5740 | break; |
bogdanm | 0:9b334a45a8ff | 5741 | case HRTIM_OUTPUT_TA2: |
bogdanm | 0:9b334a45a8ff | 5742 | case HRTIM_OUTPUT_TB2: |
bogdanm | 0:9b334a45a8ff | 5743 | case HRTIM_OUTPUT_TC2: |
bogdanm | 0:9b334a45a8ff | 5744 | case HRTIM_OUTPUT_TD2: |
bogdanm | 0:9b334a45a8ff | 5745 | case HRTIM_OUTPUT_TE2: |
bogdanm | 0:9b334a45a8ff | 5746 | { |
bogdanm | 0:9b334a45a8ff | 5747 | if ((hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxISR & HRTIM_TIMISR_O2STAT) != RESET) |
bogdanm | 0:9b334a45a8ff | 5748 | { |
bogdanm | 0:9b334a45a8ff | 5749 | /* Output 2 was active when the delayed idle protection was triggered */ |
bogdanm | 0:9b334a45a8ff | 5750 | delayed_protection_status = HRTIM_OUTPUTLEVEL_ACTIVE; |
bogdanm | 0:9b334a45a8ff | 5751 | } |
bogdanm | 0:9b334a45a8ff | 5752 | else |
bogdanm | 0:9b334a45a8ff | 5753 | { |
bogdanm | 0:9b334a45a8ff | 5754 | /* Output 2 was inactive when the delayed idle protection was triggered */ |
bogdanm | 0:9b334a45a8ff | 5755 | delayed_protection_status = HRTIM_OUTPUTLEVEL_INACTIVE; |
bogdanm | 0:9b334a45a8ff | 5756 | } |
bogdanm | 0:9b334a45a8ff | 5757 | } |
bogdanm | 0:9b334a45a8ff | 5758 | break; |
bogdanm | 0:9b334a45a8ff | 5759 | } |
bogdanm | 0:9b334a45a8ff | 5760 | |
bogdanm | 0:9b334a45a8ff | 5761 | return delayed_protection_status; |
bogdanm | 0:9b334a45a8ff | 5762 | } |
bogdanm | 0:9b334a45a8ff | 5763 | |
bogdanm | 0:9b334a45a8ff | 5764 | /** |
bogdanm | 0:9b334a45a8ff | 5765 | * @brief Returns the actual status (active or inactive) of the burst mode controller |
bogdanm | 0:9b334a45a8ff | 5766 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 5767 | * @retval Burst mode controller status |
bogdanm | 0:9b334a45a8ff | 5768 | */ |
bogdanm | 0:9b334a45a8ff | 5769 | uint32_t HAL_HRTIM_GetBurstStatus(HRTIM_HandleTypeDef * hhrtim) |
bogdanm | 0:9b334a45a8ff | 5770 | { |
bogdanm | 0:9b334a45a8ff | 5771 | uint32_t burst_mode_status; |
bogdanm | 0:9b334a45a8ff | 5772 | |
bogdanm | 0:9b334a45a8ff | 5773 | /* Read burst mode status */ |
bogdanm | 0:9b334a45a8ff | 5774 | burst_mode_status = (hhrtim->Instance->sCommonRegs.BMCR & HRTIM_BMCR_BMSTAT); |
bogdanm | 0:9b334a45a8ff | 5775 | |
bogdanm | 0:9b334a45a8ff | 5776 | return burst_mode_status; |
bogdanm | 0:9b334a45a8ff | 5777 | } |
bogdanm | 0:9b334a45a8ff | 5778 | |
bogdanm | 0:9b334a45a8ff | 5779 | /** |
bogdanm | 0:9b334a45a8ff | 5780 | * @brief Indicates on which output the signal is currently active (when the |
bogdanm | 0:9b334a45a8ff | 5781 | * push pull mode is enabled) |
bogdanm | 0:9b334a45a8ff | 5782 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 5783 | * @param TimerIdx: Timer index |
bogdanm | 0:9b334a45a8ff | 5784 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 5785 | * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
bogdanm | 0:9b334a45a8ff | 5786 | * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
bogdanm | 0:9b334a45a8ff | 5787 | * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
bogdanm | 0:9b334a45a8ff | 5788 | * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
bogdanm | 0:9b334a45a8ff | 5789 | * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
bogdanm | 0:9b334a45a8ff | 5790 | * @retval Burst mode controller status |
bogdanm | 0:9b334a45a8ff | 5791 | */ |
bogdanm | 0:9b334a45a8ff | 5792 | uint32_t HAL_HRTIM_GetCurrentPushPullStatus(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 5793 | uint32_t TimerIdx) |
bogdanm | 0:9b334a45a8ff | 5794 | { |
bogdanm | 0:9b334a45a8ff | 5795 | uint32_t current_pushpull_status; |
bogdanm | 0:9b334a45a8ff | 5796 | |
bogdanm | 0:9b334a45a8ff | 5797 | /* Check the parameters */ |
bogdanm | 0:9b334a45a8ff | 5798 | assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx)); |
bogdanm | 0:9b334a45a8ff | 5799 | |
bogdanm | 0:9b334a45a8ff | 5800 | /* Read current push pull status */ |
bogdanm | 0:9b334a45a8ff | 5801 | current_pushpull_status = (hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxISR & HRTIM_TIMISR_CPPSTAT); |
bogdanm | 0:9b334a45a8ff | 5802 | |
bogdanm | 0:9b334a45a8ff | 5803 | return current_pushpull_status; |
bogdanm | 0:9b334a45a8ff | 5804 | } |
bogdanm | 0:9b334a45a8ff | 5805 | |
bogdanm | 0:9b334a45a8ff | 5806 | |
bogdanm | 0:9b334a45a8ff | 5807 | /** |
bogdanm | 0:9b334a45a8ff | 5808 | * @brief Indicates on which output the signal was applied, in push-pull mode |
bogdanm | 0:9b334a45a8ff | 5809 | balanced fault mode or delayed idle mode, when the protection was triggered |
bogdanm | 0:9b334a45a8ff | 5810 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 5811 | * @param TimerIdx: Timer index |
bogdanm | 0:9b334a45a8ff | 5812 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 5813 | * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
bogdanm | 0:9b334a45a8ff | 5814 | * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
bogdanm | 0:9b334a45a8ff | 5815 | * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
bogdanm | 0:9b334a45a8ff | 5816 | * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
bogdanm | 0:9b334a45a8ff | 5817 | * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
bogdanm | 0:9b334a45a8ff | 5818 | * @retval Idle Push Pull Status |
bogdanm | 0:9b334a45a8ff | 5819 | */ |
bogdanm | 0:9b334a45a8ff | 5820 | uint32_t HAL_HRTIM_GetIdlePushPullStatus(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 5821 | uint32_t TimerIdx) |
bogdanm | 0:9b334a45a8ff | 5822 | { |
bogdanm | 0:9b334a45a8ff | 5823 | uint32_t idle_pushpull_status; |
bogdanm | 0:9b334a45a8ff | 5824 | |
bogdanm | 0:9b334a45a8ff | 5825 | /* Check the parameters */ |
bogdanm | 0:9b334a45a8ff | 5826 | assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx)); |
bogdanm | 0:9b334a45a8ff | 5827 | |
bogdanm | 0:9b334a45a8ff | 5828 | /* Read current push pull status */ |
bogdanm | 0:9b334a45a8ff | 5829 | idle_pushpull_status = (hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxISR & HRTIM_TIMISR_IPPSTAT); |
bogdanm | 0:9b334a45a8ff | 5830 | |
bogdanm | 0:9b334a45a8ff | 5831 | return idle_pushpull_status; |
bogdanm | 0:9b334a45a8ff | 5832 | } |
bogdanm | 0:9b334a45a8ff | 5833 | |
bogdanm | 0:9b334a45a8ff | 5834 | /** |
bogdanm | 0:9b334a45a8ff | 5835 | * @} |
bogdanm | 0:9b334a45a8ff | 5836 | */ |
bogdanm | 0:9b334a45a8ff | 5837 | |
bogdanm | 0:9b334a45a8ff | 5838 | /** @defgroup HRTIM_Exported_Functions_Group10 Interrupts handling |
bogdanm | 0:9b334a45a8ff | 5839 | * @brief Functions called when HRTIM generates an interrupt |
bogdanm | 0:9b334a45a8ff | 5840 | * 7 interrupts can be generated by the master timer: |
bogdanm | 0:9b334a45a8ff | 5841 | * - Master timer registers update |
bogdanm | 0:9b334a45a8ff | 5842 | * - Synchronization event received |
bogdanm | 0:9b334a45a8ff | 5843 | * - Master timer repetition event |
bogdanm | 0:9b334a45a8ff | 5844 | * - Master Compare 1 to 4 event |
bogdanm | 0:9b334a45a8ff | 5845 | * 14 interrupts can be generated by each timing unit: |
bogdanm | 0:9b334a45a8ff | 5846 | * - Delayed protection triggered |
bogdanm | 0:9b334a45a8ff | 5847 | * - Counter reset or roll-over event |
bogdanm | 0:9b334a45a8ff | 5848 | * - Output 1 and output 2 reset (transition active to inactive) |
bogdanm | 0:9b334a45a8ff | 5849 | * - Output 1 and output 2 set (transition inactive to active) |
bogdanm | 0:9b334a45a8ff | 5850 | * - Capture 1 and 2 events |
bogdanm | 0:9b334a45a8ff | 5851 | * - Timing unit registers update |
bogdanm | 0:9b334a45a8ff | 5852 | * - Repetition event |
bogdanm | 0:9b334a45a8ff | 5853 | * - Compare 1 to 4 event |
bogdanm | 0:9b334a45a8ff | 5854 | * 8 global interrupts are generated for the whole HRTIM: |
bogdanm | 0:9b334a45a8ff | 5855 | * - System fault and Fault 1 to 5 (regardless of the timing unit attribution) |
bogdanm | 0:9b334a45a8ff | 5856 | * - DLL calibration done |
bogdanm | 0:9b334a45a8ff | 5857 | * - Burst mode period completed |
bogdanm | 0:9b334a45a8ff | 5858 | * |
bogdanm | 0:9b334a45a8ff | 5859 | @verbatim |
bogdanm | 0:9b334a45a8ff | 5860 | =============================================================================== |
bogdanm | 0:9b334a45a8ff | 5861 | ##### HRTIM interrupts handling ##### |
bogdanm | 0:9b334a45a8ff | 5862 | =============================================================================== |
bogdanm | 0:9b334a45a8ff | 5863 | [..] |
bogdanm | 0:9b334a45a8ff | 5864 | This subsection provides a set of functions allowing to manage the HRTIM |
bogdanm | 0:9b334a45a8ff | 5865 | interrupts |
bogdanm | 0:9b334a45a8ff | 5866 | (+) HRTIM interrupt handler |
bogdanm | 0:9b334a45a8ff | 5867 | (+) Callback function called when Fault1 interrupt occurs |
bogdanm | 0:9b334a45a8ff | 5868 | (+) Callback function called when Fault2 interrupt occurs |
bogdanm | 0:9b334a45a8ff | 5869 | (+) Callback function called when Fault3 interrupt occurs |
bogdanm | 0:9b334a45a8ff | 5870 | (+) Callback function called when Fault4 interrupt occurs |
bogdanm | 0:9b334a45a8ff | 5871 | (+) Callback function called when Fault5 interrupt occurs |
bogdanm | 0:9b334a45a8ff | 5872 | (+) Callback function called when system Fault interrupt occurs |
bogdanm | 0:9b334a45a8ff | 5873 | (+) Callback function called when DLL ready interrupt occurs |
bogdanm | 0:9b334a45a8ff | 5874 | (+) Callback function called when burst mode period interrupt occurs |
bogdanm | 0:9b334a45a8ff | 5875 | (+) Callback function called when synchronization input interrupt occurs |
bogdanm | 0:9b334a45a8ff | 5876 | (+) Callback function called when a timer register update interrupt occurs |
bogdanm | 0:9b334a45a8ff | 5877 | (+) Callback function called when a timer repetition interrupt occurs |
bogdanm | 0:9b334a45a8ff | 5878 | (+) Callback function called when a compare 1 match interrupt occurs |
bogdanm | 0:9b334a45a8ff | 5879 | (+) Callback function called when a compare 2 match interrupt occurs |
bogdanm | 0:9b334a45a8ff | 5880 | (+) Callback function called when a compare 3 match interrupt occurs |
bogdanm | 0:9b334a45a8ff | 5881 | (+) Callback function called when a compare 4 match interrupt occurs |
bogdanm | 0:9b334a45a8ff | 5882 | (+) Callback function called when a capture 1 interrupt occurs |
bogdanm | 0:9b334a45a8ff | 5883 | (+) Callback function called when a capture 2 interrupt occurs |
bogdanm | 0:9b334a45a8ff | 5884 | (+) Callback function called when a delayed protection interrupt occurs |
bogdanm | 0:9b334a45a8ff | 5885 | (+) Callback function called when a timer counter reset interrupt occurs |
bogdanm | 0:9b334a45a8ff | 5886 | (+) Callback function called when a timer output 1 set interrupt occurs |
bogdanm | 0:9b334a45a8ff | 5887 | (+) Callback function called when a timer output 1 reset interrupt occurs |
bogdanm | 0:9b334a45a8ff | 5888 | (+) Callback function called when a timer output 2 set interrupt occurs |
bogdanm | 0:9b334a45a8ff | 5889 | (+) Callback function called when a timer output 2 reset interrupt occurs |
bogdanm | 0:9b334a45a8ff | 5890 | (+) Callback function called when a timer output 2 reset interrupt occurs |
bogdanm | 0:9b334a45a8ff | 5891 | (+) Callback function called upon completion of a burst DMA transfer |
bogdanm | 0:9b334a45a8ff | 5892 | |
bogdanm | 0:9b334a45a8ff | 5893 | @endverbatim |
bogdanm | 0:9b334a45a8ff | 5894 | * @{ |
bogdanm | 0:9b334a45a8ff | 5895 | */ |
bogdanm | 0:9b334a45a8ff | 5896 | |
bogdanm | 0:9b334a45a8ff | 5897 | /** |
bogdanm | 0:9b334a45a8ff | 5898 | * @brief This function handles HRTIM interrupt request. |
bogdanm | 0:9b334a45a8ff | 5899 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 5900 | * @param TimerIdx: Timer index |
bogdanm | 0:9b334a45a8ff | 5901 | * This parameter can be any value of @ref HRTIM_Timer_Index |
bogdanm | 0:9b334a45a8ff | 5902 | * @retval None |
bogdanm | 0:9b334a45a8ff | 5903 | */ |
bogdanm | 0:9b334a45a8ff | 5904 | void HAL_HRTIM_IRQHandler(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 5905 | uint32_t TimerIdx) |
bogdanm | 0:9b334a45a8ff | 5906 | { |
bogdanm | 0:9b334a45a8ff | 5907 | /* HRTIM interrupts handling */ |
bogdanm | 0:9b334a45a8ff | 5908 | if (TimerIdx == HRTIM_TIMERINDEX_COMMON) |
bogdanm | 0:9b334a45a8ff | 5909 | { |
bogdanm | 0:9b334a45a8ff | 5910 | HRTIM_HRTIM_ISR(hhrtim); |
bogdanm | 0:9b334a45a8ff | 5911 | } |
bogdanm | 0:9b334a45a8ff | 5912 | else if (TimerIdx == HRTIM_TIMERINDEX_MASTER) |
bogdanm | 0:9b334a45a8ff | 5913 | { |
bogdanm | 0:9b334a45a8ff | 5914 | /* Master related interrupts handling */ |
bogdanm | 0:9b334a45a8ff | 5915 | HRTIM_Master_ISR(hhrtim); |
bogdanm | 0:9b334a45a8ff | 5916 | } |
bogdanm | 0:9b334a45a8ff | 5917 | else |
bogdanm | 0:9b334a45a8ff | 5918 | { |
bogdanm | 0:9b334a45a8ff | 5919 | /* Timing unit related interrupts handling */ |
bogdanm | 0:9b334a45a8ff | 5920 | HRTIM_Timer_ISR(hhrtim, TimerIdx); |
bogdanm | 0:9b334a45a8ff | 5921 | } |
bogdanm | 0:9b334a45a8ff | 5922 | |
bogdanm | 0:9b334a45a8ff | 5923 | } |
bogdanm | 0:9b334a45a8ff | 5924 | |
bogdanm | 0:9b334a45a8ff | 5925 | /** |
bogdanm | 0:9b334a45a8ff | 5926 | * @brief Callback function invoked when a fault 1 interrupt occured |
bogdanm | 0:9b334a45a8ff | 5927 | * @param hhrtim: pointer to HAL HRTIM handle * @retval None |
bogdanm | 0:9b334a45a8ff | 5928 | * @retval None |
bogdanm | 0:9b334a45a8ff | 5929 | */ |
bogdanm | 0:9b334a45a8ff | 5930 | __weak void HAL_HRTIM_Fault1Callback(HRTIM_HandleTypeDef * hhrtim) |
bogdanm | 0:9b334a45a8ff | 5931 | { |
bogdanm | 0:9b334a45a8ff | 5932 | /* NOTE : This function should not be modified, when the callback is needed, |
bogdanm | 0:9b334a45a8ff | 5933 | the HAL_HRTIM_Fault1Callback could be implenetd in the user file |
bogdanm | 0:9b334a45a8ff | 5934 | */ |
bogdanm | 0:9b334a45a8ff | 5935 | } |
bogdanm | 0:9b334a45a8ff | 5936 | |
bogdanm | 0:9b334a45a8ff | 5937 | /** |
bogdanm | 0:9b334a45a8ff | 5938 | * @brief Callback function invoked when a fault 2 interrupt occured |
bogdanm | 0:9b334a45a8ff | 5939 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 5940 | * @retval None |
bogdanm | 0:9b334a45a8ff | 5941 | */ |
bogdanm | 0:9b334a45a8ff | 5942 | __weak void HAL_HRTIM_Fault2Callback(HRTIM_HandleTypeDef * hhrtim) |
bogdanm | 0:9b334a45a8ff | 5943 | { |
bogdanm | 0:9b334a45a8ff | 5944 | /* NOTE : This function should not be modified, when the callback is needed, |
bogdanm | 0:9b334a45a8ff | 5945 | the HAL_HRTIM_Fault2Callback could be implenetd in the user file |
bogdanm | 0:9b334a45a8ff | 5946 | */ |
bogdanm | 0:9b334a45a8ff | 5947 | } |
bogdanm | 0:9b334a45a8ff | 5948 | |
bogdanm | 0:9b334a45a8ff | 5949 | /** |
bogdanm | 0:9b334a45a8ff | 5950 | * @brief Callback function invoked when a fault 3 interrupt occured |
bogdanm | 0:9b334a45a8ff | 5951 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 5952 | * @retval None |
bogdanm | 0:9b334a45a8ff | 5953 | */ |
bogdanm | 0:9b334a45a8ff | 5954 | __weak void HAL_HRTIM_Fault3Callback(HRTIM_HandleTypeDef * hhrtim) |
bogdanm | 0:9b334a45a8ff | 5955 | { |
bogdanm | 0:9b334a45a8ff | 5956 | /* NOTE : This function should not be modified, when the callback is needed, |
bogdanm | 0:9b334a45a8ff | 5957 | the HAL_HRTIM_Fault3Callback could be implenetd in the user file |
bogdanm | 0:9b334a45a8ff | 5958 | */ |
bogdanm | 0:9b334a45a8ff | 5959 | } |
bogdanm | 0:9b334a45a8ff | 5960 | |
bogdanm | 0:9b334a45a8ff | 5961 | /** |
bogdanm | 0:9b334a45a8ff | 5962 | * @brief Callback function invoked when a fault 4 interrupt occured |
bogdanm | 0:9b334a45a8ff | 5963 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 5964 | * @retval None |
bogdanm | 0:9b334a45a8ff | 5965 | */ |
bogdanm | 0:9b334a45a8ff | 5966 | __weak void HAL_HRTIM_Fault4Callback(HRTIM_HandleTypeDef * hhrtim) |
bogdanm | 0:9b334a45a8ff | 5967 | { |
bogdanm | 0:9b334a45a8ff | 5968 | /* NOTE : This function should not be modified, when the callback is needed, |
bogdanm | 0:9b334a45a8ff | 5969 | the HAL_HRTIM_Fault4Callback could be implenetd in the user file |
bogdanm | 0:9b334a45a8ff | 5970 | */ |
bogdanm | 0:9b334a45a8ff | 5971 | } |
bogdanm | 0:9b334a45a8ff | 5972 | |
bogdanm | 0:9b334a45a8ff | 5973 | /** |
bogdanm | 0:9b334a45a8ff | 5974 | * @brief Callback function invoked when a fault 5 interrupt occured |
bogdanm | 0:9b334a45a8ff | 5975 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 5976 | * @retval None |
bogdanm | 0:9b334a45a8ff | 5977 | */ |
bogdanm | 0:9b334a45a8ff | 5978 | __weak void HAL_HRTIM_Fault5Callback(HRTIM_HandleTypeDef * hhrtim) |
bogdanm | 0:9b334a45a8ff | 5979 | { |
bogdanm | 0:9b334a45a8ff | 5980 | /* NOTE : This function should not be modified, when the callback is needed, |
bogdanm | 0:9b334a45a8ff | 5981 | the HAL_HRTIM_Fault5Callback could be implenetd in the user file |
bogdanm | 0:9b334a45a8ff | 5982 | */ |
bogdanm | 0:9b334a45a8ff | 5983 | } |
bogdanm | 0:9b334a45a8ff | 5984 | |
bogdanm | 0:9b334a45a8ff | 5985 | /** |
bogdanm | 0:9b334a45a8ff | 5986 | * @brief Callback function invoked when a system fault interrupt occured |
bogdanm | 0:9b334a45a8ff | 5987 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 5988 | * @retval None |
bogdanm | 0:9b334a45a8ff | 5989 | */ |
bogdanm | 0:9b334a45a8ff | 5990 | __weak void HAL_HRTIM_SystemFaultCallback(HRTIM_HandleTypeDef * hhrtim) |
bogdanm | 0:9b334a45a8ff | 5991 | { |
bogdanm | 0:9b334a45a8ff | 5992 | /* NOTE : This function should not be modified, when the callback is needed, |
bogdanm | 0:9b334a45a8ff | 5993 | the HAL_HRTIM_SystemFaultCallback could be implenetd in the user file |
bogdanm | 0:9b334a45a8ff | 5994 | */ |
bogdanm | 0:9b334a45a8ff | 5995 | } |
bogdanm | 0:9b334a45a8ff | 5996 | |
bogdanm | 0:9b334a45a8ff | 5997 | /** |
bogdanm | 0:9b334a45a8ff | 5998 | * @brief Callback function invoked when a the DLL calibration is completed |
bogdanm | 0:9b334a45a8ff | 5999 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 6000 | * @retval None |
bogdanm | 0:9b334a45a8ff | 6001 | */ |
bogdanm | 0:9b334a45a8ff | 6002 | __weak void HAL_HRTIM_DLLCalbrationReadyCallback(HRTIM_HandleTypeDef * hhrtim) |
bogdanm | 0:9b334a45a8ff | 6003 | { |
bogdanm | 0:9b334a45a8ff | 6004 | /* NOTE : This function should not be modified, when the callback is needed, |
bogdanm | 0:9b334a45a8ff | 6005 | the HAL_HRTIM_DLLCalbrationCallback could be implenetd in the user file |
bogdanm | 0:9b334a45a8ff | 6006 | */ |
bogdanm | 0:9b334a45a8ff | 6007 | } |
bogdanm | 0:9b334a45a8ff | 6008 | |
bogdanm | 0:9b334a45a8ff | 6009 | /** |
bogdanm | 0:9b334a45a8ff | 6010 | * @brief Callback function invoked when the end of the burst mode period is reached |
bogdanm | 0:9b334a45a8ff | 6011 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 6012 | * @retval None |
bogdanm | 0:9b334a45a8ff | 6013 | */ |
bogdanm | 0:9b334a45a8ff | 6014 | __weak void HAL_HRTIM_BurstModePeriodCallback(HRTIM_HandleTypeDef * hhrtim) |
bogdanm | 0:9b334a45a8ff | 6015 | { |
bogdanm | 0:9b334a45a8ff | 6016 | /* NOTE : This function should not be modified, when the callback is needed, |
bogdanm | 0:9b334a45a8ff | 6017 | the HAL_HRTIM_BurstModeCallback could be implenetd in the user file |
bogdanm | 0:9b334a45a8ff | 6018 | */ |
bogdanm | 0:9b334a45a8ff | 6019 | } |
bogdanm | 0:9b334a45a8ff | 6020 | |
bogdanm | 0:9b334a45a8ff | 6021 | /** |
bogdanm | 0:9b334a45a8ff | 6022 | * @brief Callback function invoked when a synchronization input event is received |
bogdanm | 0:9b334a45a8ff | 6023 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 6024 | * @retval None |
bogdanm | 0:9b334a45a8ff | 6025 | */ |
bogdanm | 0:9b334a45a8ff | 6026 | __weak void HAL_HRTIM_SynchronizationEventCallback(HRTIM_HandleTypeDef * hhrtim) |
bogdanm | 0:9b334a45a8ff | 6027 | { |
bogdanm | 0:9b334a45a8ff | 6028 | /* NOTE : This function should not be modified, when the callback is needed, |
bogdanm | 0:9b334a45a8ff | 6029 | the HAL_HRTIM_Master_SynchronizationEventCallback could be implenetd in the user file |
bogdanm | 0:9b334a45a8ff | 6030 | */ |
bogdanm | 0:9b334a45a8ff | 6031 | } |
bogdanm | 0:9b334a45a8ff | 6032 | |
bogdanm | 0:9b334a45a8ff | 6033 | /** |
bogdanm | 0:9b334a45a8ff | 6034 | * @brief Callback function invoked when timer registers are updated |
bogdanm | 0:9b334a45a8ff | 6035 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 6036 | * @param TimerIdx: Timer index |
bogdanm | 0:9b334a45a8ff | 6037 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 6038 | * @arg HRTIM_TIMERINDEX_MASTER for master timer |
bogdanm | 0:9b334a45a8ff | 6039 | * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
bogdanm | 0:9b334a45a8ff | 6040 | * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
bogdanm | 0:9b334a45a8ff | 6041 | * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
bogdanm | 0:9b334a45a8ff | 6042 | * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
bogdanm | 0:9b334a45a8ff | 6043 | * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
bogdanm | 0:9b334a45a8ff | 6044 | * @retval None |
bogdanm | 0:9b334a45a8ff | 6045 | */ |
bogdanm | 0:9b334a45a8ff | 6046 | __weak void HAL_HRTIM_RegistersUpdateCallback(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 6047 | uint32_t TimerIdx) |
bogdanm | 0:9b334a45a8ff | 6048 | { |
bogdanm | 0:9b334a45a8ff | 6049 | /* NOTE : This function should not be modified, when the callback is needed, |
bogdanm | 0:9b334a45a8ff | 6050 | the HAL_HRTIM_Master_RegistersUpdateCallback could be implenetd in the user file |
bogdanm | 0:9b334a45a8ff | 6051 | */ |
bogdanm | 0:9b334a45a8ff | 6052 | } |
bogdanm | 0:9b334a45a8ff | 6053 | |
bogdanm | 0:9b334a45a8ff | 6054 | /** |
bogdanm | 0:9b334a45a8ff | 6055 | * @brief Callback function invoked when timer repetition period has elapsed |
bogdanm | 0:9b334a45a8ff | 6056 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 6057 | * @param TimerIdx: Timer index |
bogdanm | 0:9b334a45a8ff | 6058 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 6059 | * @arg HRTIM_TIMERINDEX_MASTER for master timer |
bogdanm | 0:9b334a45a8ff | 6060 | * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
bogdanm | 0:9b334a45a8ff | 6061 | * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
bogdanm | 0:9b334a45a8ff | 6062 | * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
bogdanm | 0:9b334a45a8ff | 6063 | * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
bogdanm | 0:9b334a45a8ff | 6064 | * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
bogdanm | 0:9b334a45a8ff | 6065 | * @retval None |
bogdanm | 0:9b334a45a8ff | 6066 | */ |
bogdanm | 0:9b334a45a8ff | 6067 | __weak void HAL_HRTIM_RepetitionEventCallback(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 6068 | uint32_t TimerIdx) |
bogdanm | 0:9b334a45a8ff | 6069 | { |
bogdanm | 0:9b334a45a8ff | 6070 | /* NOTE : This function should not be modified, when the callback is needed, |
bogdanm | 0:9b334a45a8ff | 6071 | the HAL_HRTIM_Master_RepetitionEventCallback could be implenetd in the user file |
bogdanm | 0:9b334a45a8ff | 6072 | */ |
bogdanm | 0:9b334a45a8ff | 6073 | } |
bogdanm | 0:9b334a45a8ff | 6074 | |
bogdanm | 0:9b334a45a8ff | 6075 | /** |
bogdanm | 0:9b334a45a8ff | 6076 | * @brief Callback function invoked when the timer counter matches the value |
bogdanm | 0:9b334a45a8ff | 6077 | * programmed in the compare 1 register |
bogdanm | 0:9b334a45a8ff | 6078 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 6079 | * @param TimerIdx: Timer index |
bogdanm | 0:9b334a45a8ff | 6080 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 6081 | * @arg HRTIM_TIMERINDEX_MASTER for master timer |
bogdanm | 0:9b334a45a8ff | 6082 | * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
bogdanm | 0:9b334a45a8ff | 6083 | * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
bogdanm | 0:9b334a45a8ff | 6084 | * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
bogdanm | 0:9b334a45a8ff | 6085 | * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
bogdanm | 0:9b334a45a8ff | 6086 | * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
bogdanm | 0:9b334a45a8ff | 6087 | * @retval None |
bogdanm | 0:9b334a45a8ff | 6088 | */ |
bogdanm | 0:9b334a45a8ff | 6089 | __weak void HAL_HRTIM_Compare1EventCallback(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 6090 | uint32_t TimerIdx) |
bogdanm | 0:9b334a45a8ff | 6091 | { |
bogdanm | 0:9b334a45a8ff | 6092 | /* NOTE : This function should not be modified, when the callback is needed, |
bogdanm | 0:9b334a45a8ff | 6093 | the HAL_HRTIM_Master_Compare1EventCallback could be implenetd in the user file |
bogdanm | 0:9b334a45a8ff | 6094 | */ |
bogdanm | 0:9b334a45a8ff | 6095 | } |
bogdanm | 0:9b334a45a8ff | 6096 | |
bogdanm | 0:9b334a45a8ff | 6097 | /** |
bogdanm | 0:9b334a45a8ff | 6098 | * @brief Callback function invoked when the timer counter matches the value |
bogdanm | 0:9b334a45a8ff | 6099 | * programmed in the compare 2 register |
bogdanm | 0:9b334a45a8ff | 6100 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 6101 | * @retval None |
bogdanm | 0:9b334a45a8ff | 6102 | * @param TimerIdx: Timer index |
bogdanm | 0:9b334a45a8ff | 6103 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 6104 | * @arg HRTIM_TIMERINDEX_MASTER for master timer |
bogdanm | 0:9b334a45a8ff | 6105 | * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
bogdanm | 0:9b334a45a8ff | 6106 | * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
bogdanm | 0:9b334a45a8ff | 6107 | * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
bogdanm | 0:9b334a45a8ff | 6108 | * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
bogdanm | 0:9b334a45a8ff | 6109 | * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
bogdanm | 0:9b334a45a8ff | 6110 | */ |
bogdanm | 0:9b334a45a8ff | 6111 | __weak void HAL_HRTIM_Compare2EventCallback(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 6112 | uint32_t TimerIdx) |
bogdanm | 0:9b334a45a8ff | 6113 | { |
bogdanm | 0:9b334a45a8ff | 6114 | /* NOTE : This function should not be modified, when the callback is needed, |
bogdanm | 0:9b334a45a8ff | 6115 | the HAL_HRTIM_Master_Compare2EventCallback could be implenetd in the user file |
bogdanm | 0:9b334a45a8ff | 6116 | */ |
bogdanm | 0:9b334a45a8ff | 6117 | } |
bogdanm | 0:9b334a45a8ff | 6118 | |
bogdanm | 0:9b334a45a8ff | 6119 | /** |
bogdanm | 0:9b334a45a8ff | 6120 | * @brief Callback function invoked when the timer counter matches the value |
bogdanm | 0:9b334a45a8ff | 6121 | * programmed in the compare 3 register |
bogdanm | 0:9b334a45a8ff | 6122 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 6123 | * @param TimerIdx: Timer index |
bogdanm | 0:9b334a45a8ff | 6124 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 6125 | * @arg HRTIM_TIMERINDEX_MASTER for master timer |
bogdanm | 0:9b334a45a8ff | 6126 | * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
bogdanm | 0:9b334a45a8ff | 6127 | * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
bogdanm | 0:9b334a45a8ff | 6128 | * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
bogdanm | 0:9b334a45a8ff | 6129 | * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
bogdanm | 0:9b334a45a8ff | 6130 | * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
bogdanm | 0:9b334a45a8ff | 6131 | * @retval None |
bogdanm | 0:9b334a45a8ff | 6132 | */ |
bogdanm | 0:9b334a45a8ff | 6133 | __weak void HAL_HRTIM_Compare3EventCallback(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 6134 | uint32_t TimerIdx) |
bogdanm | 0:9b334a45a8ff | 6135 | { |
bogdanm | 0:9b334a45a8ff | 6136 | /* NOTE : This function should not be modified, when the callback is needed, |
bogdanm | 0:9b334a45a8ff | 6137 | the HAL_HRTIM_Master_Compare3EventCallback could be implenetd in the user file |
bogdanm | 0:9b334a45a8ff | 6138 | */ |
bogdanm | 0:9b334a45a8ff | 6139 | } |
bogdanm | 0:9b334a45a8ff | 6140 | |
bogdanm | 0:9b334a45a8ff | 6141 | /** |
bogdanm | 0:9b334a45a8ff | 6142 | * @brief Callback function invoked when the timer counter matches the value |
bogdanm | 0:9b334a45a8ff | 6143 | * programmed in the compare 4 register |
bogdanm | 0:9b334a45a8ff | 6144 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 6145 | * @param TimerIdx: Timer index |
bogdanm | 0:9b334a45a8ff | 6146 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 6147 | * @arg HRTIM_TIMERINDEX_MASTER for master timer |
bogdanm | 0:9b334a45a8ff | 6148 | * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
bogdanm | 0:9b334a45a8ff | 6149 | * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
bogdanm | 0:9b334a45a8ff | 6150 | * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
bogdanm | 0:9b334a45a8ff | 6151 | * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
bogdanm | 0:9b334a45a8ff | 6152 | * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
bogdanm | 0:9b334a45a8ff | 6153 | * @retval None |
bogdanm | 0:9b334a45a8ff | 6154 | */ |
bogdanm | 0:9b334a45a8ff | 6155 | __weak void HAL_HRTIM_Compare4EventCallback(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 6156 | uint32_t TimerIdx) |
bogdanm | 0:9b334a45a8ff | 6157 | { |
bogdanm | 0:9b334a45a8ff | 6158 | /* NOTE : This function should not be modified, when the callback is needed, |
bogdanm | 0:9b334a45a8ff | 6159 | the HAL_HRTIM_Master_Compare4EventCallback could be implenetd in the user file |
bogdanm | 0:9b334a45a8ff | 6160 | */ |
bogdanm | 0:9b334a45a8ff | 6161 | } |
bogdanm | 0:9b334a45a8ff | 6162 | |
bogdanm | 0:9b334a45a8ff | 6163 | /** |
bogdanm | 0:9b334a45a8ff | 6164 | * @brief Callback function invoked when the timer x capture 1 event occurs |
bogdanm | 0:9b334a45a8ff | 6165 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 6166 | * @param TimerIdx: Timer index |
bogdanm | 0:9b334a45a8ff | 6167 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 6168 | * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
bogdanm | 0:9b334a45a8ff | 6169 | * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
bogdanm | 0:9b334a45a8ff | 6170 | * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
bogdanm | 0:9b334a45a8ff | 6171 | * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
bogdanm | 0:9b334a45a8ff | 6172 | * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
bogdanm | 0:9b334a45a8ff | 6173 | * @retval None |
bogdanm | 0:9b334a45a8ff | 6174 | */ |
bogdanm | 0:9b334a45a8ff | 6175 | __weak void HAL_HRTIM_Capture1EventCallback(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 6176 | uint32_t TimerIdx) |
bogdanm | 0:9b334a45a8ff | 6177 | { |
bogdanm | 0:9b334a45a8ff | 6178 | /* NOTE : This function should not be modified, when the callback is needed, |
bogdanm | 0:9b334a45a8ff | 6179 | the HAL_HRTIM_Timer_Capture1EventCallback could be implenetd in the user file |
bogdanm | 0:9b334a45a8ff | 6180 | */ |
bogdanm | 0:9b334a45a8ff | 6181 | } |
bogdanm | 0:9b334a45a8ff | 6182 | |
bogdanm | 0:9b334a45a8ff | 6183 | /** |
bogdanm | 0:9b334a45a8ff | 6184 | * @brief Callback function invoked when the timer x capture 2 event occurs |
bogdanm | 0:9b334a45a8ff | 6185 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 6186 | * @param TimerIdx: Timer index |
bogdanm | 0:9b334a45a8ff | 6187 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 6188 | * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
bogdanm | 0:9b334a45a8ff | 6189 | * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
bogdanm | 0:9b334a45a8ff | 6190 | * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
bogdanm | 0:9b334a45a8ff | 6191 | * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
bogdanm | 0:9b334a45a8ff | 6192 | * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
bogdanm | 0:9b334a45a8ff | 6193 | * @retval None |
bogdanm | 0:9b334a45a8ff | 6194 | */ |
bogdanm | 0:9b334a45a8ff | 6195 | __weak void HAL_HRTIM_Capture2EventCallback(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 6196 | uint32_t TimerIdx) |
bogdanm | 0:9b334a45a8ff | 6197 | { |
bogdanm | 0:9b334a45a8ff | 6198 | /* NOTE : This function should not be modified, when the callback is needed, |
bogdanm | 0:9b334a45a8ff | 6199 | the HAL_HRTIM_Timer_Capture2EventCallback could be implenetd in the user file |
bogdanm | 0:9b334a45a8ff | 6200 | */ |
bogdanm | 0:9b334a45a8ff | 6201 | } |
bogdanm | 0:9b334a45a8ff | 6202 | |
bogdanm | 0:9b334a45a8ff | 6203 | /** |
bogdanm | 0:9b334a45a8ff | 6204 | * @brief Callback function invoked when the delayed idle or balanced idle mode is |
bogdanm | 0:9b334a45a8ff | 6205 | * entered |
bogdanm | 0:9b334a45a8ff | 6206 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 6207 | * @param TimerIdx: Timer index |
bogdanm | 0:9b334a45a8ff | 6208 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 6209 | * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
bogdanm | 0:9b334a45a8ff | 6210 | * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
bogdanm | 0:9b334a45a8ff | 6211 | * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
bogdanm | 0:9b334a45a8ff | 6212 | * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
bogdanm | 0:9b334a45a8ff | 6213 | * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
bogdanm | 0:9b334a45a8ff | 6214 | * @retval None |
bogdanm | 0:9b334a45a8ff | 6215 | */ |
bogdanm | 0:9b334a45a8ff | 6216 | __weak void HAL_HRTIM_DelayedProtectionCallback(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 6217 | uint32_t TimerIdx) |
bogdanm | 0:9b334a45a8ff | 6218 | { |
bogdanm | 0:9b334a45a8ff | 6219 | /* NOTE : This function should not be modified, when the callback is needed, |
bogdanm | 0:9b334a45a8ff | 6220 | the HAL_HRTIM_Timer_DelayedProtectionCallback could be implenetd in the user file |
bogdanm | 0:9b334a45a8ff | 6221 | */ |
bogdanm | 0:9b334a45a8ff | 6222 | } |
bogdanm | 0:9b334a45a8ff | 6223 | |
bogdanm | 0:9b334a45a8ff | 6224 | /** |
bogdanm | 0:9b334a45a8ff | 6225 | * @brief Callback function invoked when the timer x counter reset/roll-over |
bogdanm | 0:9b334a45a8ff | 6226 | * event occurs |
bogdanm | 0:9b334a45a8ff | 6227 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 6228 | * @param TimerIdx: Timer index |
bogdanm | 0:9b334a45a8ff | 6229 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 6230 | * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
bogdanm | 0:9b334a45a8ff | 6231 | * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
bogdanm | 0:9b334a45a8ff | 6232 | * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
bogdanm | 0:9b334a45a8ff | 6233 | * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
bogdanm | 0:9b334a45a8ff | 6234 | * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
bogdanm | 0:9b334a45a8ff | 6235 | * @retval None |
bogdanm | 0:9b334a45a8ff | 6236 | */ |
bogdanm | 0:9b334a45a8ff | 6237 | __weak void HAL_HRTIM_CounterResetCallback(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 6238 | uint32_t TimerIdx) |
bogdanm | 0:9b334a45a8ff | 6239 | { |
bogdanm | 0:9b334a45a8ff | 6240 | /* NOTE : This function should not be modified, when the callback is needed, |
bogdanm | 0:9b334a45a8ff | 6241 | the HAL_HRTIM_Timer_CounterResetCallback could be implenetd in the user file |
bogdanm | 0:9b334a45a8ff | 6242 | */ |
bogdanm | 0:9b334a45a8ff | 6243 | } |
bogdanm | 0:9b334a45a8ff | 6244 | |
bogdanm | 0:9b334a45a8ff | 6245 | /** |
bogdanm | 0:9b334a45a8ff | 6246 | * @brief Callback function invoked when the timer x output 1 is set |
bogdanm | 0:9b334a45a8ff | 6247 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 6248 | * @param TimerIdx: Timer index |
bogdanm | 0:9b334a45a8ff | 6249 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 6250 | * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
bogdanm | 0:9b334a45a8ff | 6251 | * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
bogdanm | 0:9b334a45a8ff | 6252 | * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
bogdanm | 0:9b334a45a8ff | 6253 | * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
bogdanm | 0:9b334a45a8ff | 6254 | * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
bogdanm | 0:9b334a45a8ff | 6255 | * @retval None |
bogdanm | 0:9b334a45a8ff | 6256 | */ |
bogdanm | 0:9b334a45a8ff | 6257 | __weak void HAL_HRTIM_Output1SetCallback(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 6258 | uint32_t TimerIdx) |
bogdanm | 0:9b334a45a8ff | 6259 | { |
bogdanm | 0:9b334a45a8ff | 6260 | /* NOTE : This function should not be modified, when the callback is needed, |
bogdanm | 0:9b334a45a8ff | 6261 | the HAL_HRTIM_Timer_Output1SetCallback could be implenetd in the user file |
bogdanm | 0:9b334a45a8ff | 6262 | */ |
bogdanm | 0:9b334a45a8ff | 6263 | } |
bogdanm | 0:9b334a45a8ff | 6264 | |
bogdanm | 0:9b334a45a8ff | 6265 | /** |
bogdanm | 0:9b334a45a8ff | 6266 | * @brief Callback function invoked when the timer x output 1 is reset |
bogdanm | 0:9b334a45a8ff | 6267 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 6268 | * @param TimerIdx: Timer index |
bogdanm | 0:9b334a45a8ff | 6269 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 6270 | * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
bogdanm | 0:9b334a45a8ff | 6271 | * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
bogdanm | 0:9b334a45a8ff | 6272 | * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
bogdanm | 0:9b334a45a8ff | 6273 | * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
bogdanm | 0:9b334a45a8ff | 6274 | * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
bogdanm | 0:9b334a45a8ff | 6275 | * @retval None |
bogdanm | 0:9b334a45a8ff | 6276 | */ |
bogdanm | 0:9b334a45a8ff | 6277 | __weak void HAL_HRTIM_Output1ResetCallback(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 6278 | uint32_t TimerIdx) |
bogdanm | 0:9b334a45a8ff | 6279 | { |
bogdanm | 0:9b334a45a8ff | 6280 | /* NOTE : This function should not be modified, when the callback is needed, |
bogdanm | 0:9b334a45a8ff | 6281 | the HAL_HRTIM_Timer_Output1ResetCallback could be implenetd in the user file |
bogdanm | 0:9b334a45a8ff | 6282 | */ |
bogdanm | 0:9b334a45a8ff | 6283 | } |
bogdanm | 0:9b334a45a8ff | 6284 | |
bogdanm | 0:9b334a45a8ff | 6285 | /** |
bogdanm | 0:9b334a45a8ff | 6286 | * @brief Callback function invoked when the timer x output 2 is set |
bogdanm | 0:9b334a45a8ff | 6287 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 6288 | * @param TimerIdx: Timer index |
bogdanm | 0:9b334a45a8ff | 6289 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 6290 | * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
bogdanm | 0:9b334a45a8ff | 6291 | * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
bogdanm | 0:9b334a45a8ff | 6292 | * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
bogdanm | 0:9b334a45a8ff | 6293 | * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
bogdanm | 0:9b334a45a8ff | 6294 | * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
bogdanm | 0:9b334a45a8ff | 6295 | * @retval None |
bogdanm | 0:9b334a45a8ff | 6296 | */ |
bogdanm | 0:9b334a45a8ff | 6297 | __weak void HAL_HRTIM_Output2SetCallback(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 6298 | uint32_t TimerIdx) |
bogdanm | 0:9b334a45a8ff | 6299 | { |
bogdanm | 0:9b334a45a8ff | 6300 | /* NOTE : This function should not be modified, when the callback is needed, |
bogdanm | 0:9b334a45a8ff | 6301 | the HAL_HRTIM_Timer_Output2SetCallback could be implenetd in the user file |
bogdanm | 0:9b334a45a8ff | 6302 | */ |
bogdanm | 0:9b334a45a8ff | 6303 | } |
bogdanm | 0:9b334a45a8ff | 6304 | |
bogdanm | 0:9b334a45a8ff | 6305 | /** |
bogdanm | 0:9b334a45a8ff | 6306 | * @brief Callback function invoked when the timer x output 2 is reset |
bogdanm | 0:9b334a45a8ff | 6307 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 6308 | * @param TimerIdx: Timer index |
bogdanm | 0:9b334a45a8ff | 6309 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 6310 | * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
bogdanm | 0:9b334a45a8ff | 6311 | * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
bogdanm | 0:9b334a45a8ff | 6312 | * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
bogdanm | 0:9b334a45a8ff | 6313 | * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
bogdanm | 0:9b334a45a8ff | 6314 | * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
bogdanm | 0:9b334a45a8ff | 6315 | * @retval None |
bogdanm | 0:9b334a45a8ff | 6316 | */ |
bogdanm | 0:9b334a45a8ff | 6317 | __weak void HAL_HRTIM_Output2ResetCallback(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 6318 | uint32_t TimerIdx) |
bogdanm | 0:9b334a45a8ff | 6319 | { |
bogdanm | 0:9b334a45a8ff | 6320 | /* NOTE : This function should not be modified, when the callback is needed, |
bogdanm | 0:9b334a45a8ff | 6321 | the HAL_HRTIM_Timer_Output2ResetCallback could be implenetd in the user file |
bogdanm | 0:9b334a45a8ff | 6322 | */ |
bogdanm | 0:9b334a45a8ff | 6323 | } |
bogdanm | 0:9b334a45a8ff | 6324 | |
bogdanm | 0:9b334a45a8ff | 6325 | /** |
bogdanm | 0:9b334a45a8ff | 6326 | * @brief Callback function invoked when a DMA burst transfer is completed |
bogdanm | 0:9b334a45a8ff | 6327 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 6328 | * @param TimerIdx: Timer index |
bogdanm | 0:9b334a45a8ff | 6329 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 6330 | * @arg HRTIM_TIMERINDEX_MASTER for master timer |
bogdanm | 0:9b334a45a8ff | 6331 | * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
bogdanm | 0:9b334a45a8ff | 6332 | * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
bogdanm | 0:9b334a45a8ff | 6333 | * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
bogdanm | 0:9b334a45a8ff | 6334 | * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
bogdanm | 0:9b334a45a8ff | 6335 | * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
bogdanm | 0:9b334a45a8ff | 6336 | * @retval None |
bogdanm | 0:9b334a45a8ff | 6337 | */ |
bogdanm | 0:9b334a45a8ff | 6338 | __weak void HAL_HRTIM_BurstDMATransferCallback(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 6339 | uint32_t TimerIdx) |
bogdanm | 0:9b334a45a8ff | 6340 | { |
bogdanm | 0:9b334a45a8ff | 6341 | /* NOTE : This function should not be modified, when the callback is needed, |
bogdanm | 0:9b334a45a8ff | 6342 | the HAL_HRTIM_BurstDMATransferCallback could be implenetd in the user file |
bogdanm | 0:9b334a45a8ff | 6343 | */ |
bogdanm | 0:9b334a45a8ff | 6344 | } |
bogdanm | 0:9b334a45a8ff | 6345 | |
bogdanm | 0:9b334a45a8ff | 6346 | /** |
bogdanm | 0:9b334a45a8ff | 6347 | * @brief Callback function invoked when a DMA error occurs |
bogdanm | 0:9b334a45a8ff | 6348 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 6349 | * @retval None |
bogdanm | 0:9b334a45a8ff | 6350 | */ |
bogdanm | 0:9b334a45a8ff | 6351 | __weak void HAL_HRTIM_ErrorCallback(HRTIM_HandleTypeDef *hhrtim) |
bogdanm | 0:9b334a45a8ff | 6352 | { |
bogdanm | 0:9b334a45a8ff | 6353 | /* NOTE : This function should not be modified, when the callback is needed, |
bogdanm | 0:9b334a45a8ff | 6354 | the HAL_HRTIM_ErrorCallback could be implenetd in the user file |
bogdanm | 0:9b334a45a8ff | 6355 | */ |
bogdanm | 0:9b334a45a8ff | 6356 | } |
bogdanm | 0:9b334a45a8ff | 6357 | |
bogdanm | 0:9b334a45a8ff | 6358 | /** |
bogdanm | 0:9b334a45a8ff | 6359 | * @} |
bogdanm | 0:9b334a45a8ff | 6360 | */ |
bogdanm | 0:9b334a45a8ff | 6361 | |
bogdanm | 0:9b334a45a8ff | 6362 | /** |
bogdanm | 0:9b334a45a8ff | 6363 | * @} |
bogdanm | 0:9b334a45a8ff | 6364 | */ |
bogdanm | 0:9b334a45a8ff | 6365 | |
bogdanm | 0:9b334a45a8ff | 6366 | /** @addtogroup HRTIM_Private_Functions HRTIM Private Functions |
bogdanm | 0:9b334a45a8ff | 6367 | * @{ |
bogdanm | 0:9b334a45a8ff | 6368 | */ |
bogdanm | 0:9b334a45a8ff | 6369 | |
bogdanm | 0:9b334a45a8ff | 6370 | /** |
bogdanm | 0:9b334a45a8ff | 6371 | * @brief Configures the master timer time base |
bogdanm | 0:9b334a45a8ff | 6372 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 6373 | * @param pTimeBaseCfg: pointer to the time base configuration structure |
bogdanm | 0:9b334a45a8ff | 6374 | * @retval None |
bogdanm | 0:9b334a45a8ff | 6375 | */ |
bogdanm | 0:9b334a45a8ff | 6376 | static void HRTIM_MasterBase_Config(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 6377 | HRTIM_TimeBaseCfgTypeDef * pTimeBaseCfg) |
bogdanm | 0:9b334a45a8ff | 6378 | { |
bogdanm | 0:9b334a45a8ff | 6379 | uint32_t hrtim_mcr; |
bogdanm | 0:9b334a45a8ff | 6380 | |
bogdanm | 0:9b334a45a8ff | 6381 | /* Configure master timer */ |
bogdanm | 0:9b334a45a8ff | 6382 | hrtim_mcr = hhrtim->Instance->sMasterRegs.MCR; |
bogdanm | 0:9b334a45a8ff | 6383 | |
bogdanm | 0:9b334a45a8ff | 6384 | /* Set the prescaler ratio */ |
bogdanm | 0:9b334a45a8ff | 6385 | hrtim_mcr &= (uint32_t) ~(HRTIM_MCR_CK_PSC); |
bogdanm | 0:9b334a45a8ff | 6386 | hrtim_mcr |= (uint32_t)pTimeBaseCfg->PrescalerRatio; |
bogdanm | 0:9b334a45a8ff | 6387 | |
bogdanm | 0:9b334a45a8ff | 6388 | /* Set the operating mode */ |
bogdanm | 0:9b334a45a8ff | 6389 | hrtim_mcr &= (uint32_t) ~(HRTIM_MCR_CONT | HRTIM_MCR_RETRIG); |
bogdanm | 0:9b334a45a8ff | 6390 | hrtim_mcr |= (uint32_t)pTimeBaseCfg->Mode; |
bogdanm | 0:9b334a45a8ff | 6391 | |
bogdanm | 0:9b334a45a8ff | 6392 | /* Update the HRTIM registers */ |
bogdanm | 0:9b334a45a8ff | 6393 | hhrtim->Instance->sMasterRegs.MCR = hrtim_mcr; |
bogdanm | 0:9b334a45a8ff | 6394 | hhrtim->Instance->sMasterRegs.MPER = pTimeBaseCfg->Period; |
bogdanm | 0:9b334a45a8ff | 6395 | hhrtim->Instance->sMasterRegs.MREP = pTimeBaseCfg->RepetitionCounter; |
bogdanm | 0:9b334a45a8ff | 6396 | } |
bogdanm | 0:9b334a45a8ff | 6397 | |
bogdanm | 0:9b334a45a8ff | 6398 | /** |
bogdanm | 0:9b334a45a8ff | 6399 | * @brief Configures timing unit (timer A to timer E) time base |
bogdanm | 0:9b334a45a8ff | 6400 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 6401 | * @param TimerIdx: Timer index |
bogdanm | 0:9b334a45a8ff | 6402 | * @param pTimeBaseCfg: pointer to the time base configuration structure |
bogdanm | 0:9b334a45a8ff | 6403 | * @retval None |
bogdanm | 0:9b334a45a8ff | 6404 | */ |
bogdanm | 0:9b334a45a8ff | 6405 | static void HRTIM_TimingUnitBase_Config(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 6406 | uint32_t TimerIdx , |
bogdanm | 0:9b334a45a8ff | 6407 | HRTIM_TimeBaseCfgTypeDef * pTimeBaseCfg) |
bogdanm | 0:9b334a45a8ff | 6408 | { |
bogdanm | 0:9b334a45a8ff | 6409 | uint32_t hrtim_timcr; |
bogdanm | 0:9b334a45a8ff | 6410 | |
bogdanm | 0:9b334a45a8ff | 6411 | /* Configure master timing unit */ |
bogdanm | 0:9b334a45a8ff | 6412 | hrtim_timcr = hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxCR; |
bogdanm | 0:9b334a45a8ff | 6413 | |
bogdanm | 0:9b334a45a8ff | 6414 | /* Set the prescaler ratio */ |
bogdanm | 0:9b334a45a8ff | 6415 | hrtim_timcr &= (uint32_t) ~(HRTIM_TIMCR_CK_PSC); |
bogdanm | 0:9b334a45a8ff | 6416 | hrtim_timcr |= (uint32_t)pTimeBaseCfg->PrescalerRatio; |
bogdanm | 0:9b334a45a8ff | 6417 | |
bogdanm | 0:9b334a45a8ff | 6418 | /* Set the operating mode */ |
bogdanm | 0:9b334a45a8ff | 6419 | hrtim_timcr &= (uint32_t) ~(HRTIM_TIMCR_CONT | HRTIM_TIMCR_RETRIG); |
bogdanm | 0:9b334a45a8ff | 6420 | hrtim_timcr |= (uint32_t)pTimeBaseCfg->Mode; |
bogdanm | 0:9b334a45a8ff | 6421 | |
bogdanm | 0:9b334a45a8ff | 6422 | /* Update the HRTIM registers */ |
bogdanm | 0:9b334a45a8ff | 6423 | hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxCR = hrtim_timcr; |
bogdanm | 0:9b334a45a8ff | 6424 | hhrtim->Instance->sTimerxRegs[TimerIdx].PERxR = pTimeBaseCfg->Period; |
bogdanm | 0:9b334a45a8ff | 6425 | hhrtim->Instance->sTimerxRegs[TimerIdx].REPxR = pTimeBaseCfg->RepetitionCounter; |
bogdanm | 0:9b334a45a8ff | 6426 | } |
bogdanm | 0:9b334a45a8ff | 6427 | |
bogdanm | 0:9b334a45a8ff | 6428 | /** |
bogdanm | 0:9b334a45a8ff | 6429 | * @brief Configures the master timer in waveform mode |
bogdanm | 0:9b334a45a8ff | 6430 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 6431 | * @param pTimerCfg: pointer to the timer configuration data structure |
bogdanm | 0:9b334a45a8ff | 6432 | * @retval None |
bogdanm | 0:9b334a45a8ff | 6433 | */ |
bogdanm | 0:9b334a45a8ff | 6434 | static void HRTIM_MasterWaveform_Config(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 6435 | HRTIM_TimerCfgTypeDef * pTimerCfg) |
bogdanm | 0:9b334a45a8ff | 6436 | { |
bogdanm | 0:9b334a45a8ff | 6437 | uint32_t hrtim_mcr; |
bogdanm | 0:9b334a45a8ff | 6438 | uint32_t hrtim_bmcr; |
bogdanm | 0:9b334a45a8ff | 6439 | |
bogdanm | 0:9b334a45a8ff | 6440 | /* Configure master timer */ |
bogdanm | 0:9b334a45a8ff | 6441 | hrtim_mcr = hhrtim->Instance->sMasterRegs.MCR; |
bogdanm | 0:9b334a45a8ff | 6442 | hrtim_bmcr = hhrtim->Instance->sCommonRegs.BMCR; |
bogdanm | 0:9b334a45a8ff | 6443 | |
bogdanm | 0:9b334a45a8ff | 6444 | /* Enable/Disable the half mode */ |
bogdanm | 0:9b334a45a8ff | 6445 | hrtim_mcr &= ~(HRTIM_MCR_HALF); |
bogdanm | 0:9b334a45a8ff | 6446 | hrtim_mcr |= pTimerCfg->HalfModeEnable; |
bogdanm | 0:9b334a45a8ff | 6447 | |
bogdanm | 0:9b334a45a8ff | 6448 | /* Enable/Disable the timer start upon synchronization event reception */ |
bogdanm | 0:9b334a45a8ff | 6449 | hrtim_mcr &= ~(HRTIM_MCR_SYNCSTRTM); |
bogdanm | 0:9b334a45a8ff | 6450 | hrtim_mcr |= pTimerCfg->StartOnSync; |
bogdanm | 0:9b334a45a8ff | 6451 | |
bogdanm | 0:9b334a45a8ff | 6452 | /* Enable/Disable the timer reset upon synchronization event reception */ |
bogdanm | 0:9b334a45a8ff | 6453 | hrtim_mcr &= ~(HRTIM_MCR_SYNCRSTM); |
bogdanm | 0:9b334a45a8ff | 6454 | hrtim_mcr |= pTimerCfg->ResetOnSync; |
bogdanm | 0:9b334a45a8ff | 6455 | |
bogdanm | 0:9b334a45a8ff | 6456 | /* Enable/Disable the DAC synchronization event generation */ |
bogdanm | 0:9b334a45a8ff | 6457 | hrtim_mcr &= ~(HRTIM_MCR_DACSYNC); |
bogdanm | 0:9b334a45a8ff | 6458 | hrtim_mcr |= pTimerCfg->DACSynchro; |
bogdanm | 0:9b334a45a8ff | 6459 | |
bogdanm | 0:9b334a45a8ff | 6460 | /* Enable/Disable preload meachanism for timer registers */ |
bogdanm | 0:9b334a45a8ff | 6461 | hrtim_mcr &= ~(HRTIM_MCR_PREEN); |
bogdanm | 0:9b334a45a8ff | 6462 | hrtim_mcr |= pTimerCfg->PreloadEnable; |
bogdanm | 0:9b334a45a8ff | 6463 | |
bogdanm | 0:9b334a45a8ff | 6464 | /* Master timer registers update handling */ |
bogdanm | 0:9b334a45a8ff | 6465 | hrtim_mcr &= ~(HRTIM_MCR_BRSTDMA); |
bogdanm | 0:9b334a45a8ff | 6466 | hrtim_mcr |= (pTimerCfg->UpdateGating << 2); |
bogdanm | 0:9b334a45a8ff | 6467 | |
bogdanm | 0:9b334a45a8ff | 6468 | /* Enable/Disable registers update on repetition */ |
bogdanm | 0:9b334a45a8ff | 6469 | hrtim_mcr &= ~(HRTIM_MCR_MREPU); |
bogdanm | 0:9b334a45a8ff | 6470 | hrtim_mcr |= pTimerCfg->RepetitionUpdate; |
bogdanm | 0:9b334a45a8ff | 6471 | |
bogdanm | 0:9b334a45a8ff | 6472 | /* Set the timer burst mode */ |
bogdanm | 0:9b334a45a8ff | 6473 | hrtim_bmcr &= ~(HRTIM_BMCR_MTBM); |
bogdanm | 0:9b334a45a8ff | 6474 | hrtim_bmcr |= pTimerCfg->BurstMode; |
bogdanm | 0:9b334a45a8ff | 6475 | |
bogdanm | 0:9b334a45a8ff | 6476 | /* Update the HRTIM registers */ |
bogdanm | 0:9b334a45a8ff | 6477 | hhrtim->Instance->sMasterRegs.MCR = hrtim_mcr; |
bogdanm | 0:9b334a45a8ff | 6478 | hhrtim->Instance->sCommonRegs.BMCR = hrtim_bmcr; |
bogdanm | 0:9b334a45a8ff | 6479 | } |
bogdanm | 0:9b334a45a8ff | 6480 | |
bogdanm | 0:9b334a45a8ff | 6481 | /** |
bogdanm | 0:9b334a45a8ff | 6482 | * @brief Configures timing unit (timer A to timer E) in waveform mode |
bogdanm | 0:9b334a45a8ff | 6483 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 6484 | * @param TimerIdx: Timer index |
bogdanm | 0:9b334a45a8ff | 6485 | * @param pTimerCfg: pointer to the timer configuration data structure |
bogdanm | 0:9b334a45a8ff | 6486 | * @retval None |
bogdanm | 0:9b334a45a8ff | 6487 | */ |
bogdanm | 0:9b334a45a8ff | 6488 | static void HRTIM_TimingUnitWaveform_Config(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 6489 | uint32_t TimerIdx, |
bogdanm | 0:9b334a45a8ff | 6490 | HRTIM_TimerCfgTypeDef * pTimerCfg) |
bogdanm | 0:9b334a45a8ff | 6491 | { |
bogdanm | 0:9b334a45a8ff | 6492 | uint32_t hrtim_timcr; |
bogdanm | 0:9b334a45a8ff | 6493 | uint32_t hrtim_timfltr; |
bogdanm | 0:9b334a45a8ff | 6494 | uint32_t hrtim_timoutr; |
bogdanm | 0:9b334a45a8ff | 6495 | uint32_t hrtim_timrstr; |
bogdanm | 0:9b334a45a8ff | 6496 | uint32_t hrtim_bmcr; |
bogdanm | 0:9b334a45a8ff | 6497 | |
bogdanm | 0:9b334a45a8ff | 6498 | /* UPDGAT bitfield must be reset before programming a new value */ |
bogdanm | 0:9b334a45a8ff | 6499 | hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxCR &= ~(HRTIM_TIMCR_UPDGAT); |
bogdanm | 0:9b334a45a8ff | 6500 | |
bogdanm | 0:9b334a45a8ff | 6501 | /* Configure timing unit (Timer A to Timer E) */ |
bogdanm | 0:9b334a45a8ff | 6502 | hrtim_timcr = hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxCR; |
bogdanm | 0:9b334a45a8ff | 6503 | hrtim_timfltr = hhrtim->Instance->sTimerxRegs[TimerIdx].FLTxR; |
bogdanm | 0:9b334a45a8ff | 6504 | hrtim_timoutr = hhrtim->Instance->sTimerxRegs[TimerIdx].OUTxR; |
bogdanm | 0:9b334a45a8ff | 6505 | hrtim_timrstr = hhrtim->Instance->sTimerxRegs[TimerIdx].RSTxR; |
bogdanm | 0:9b334a45a8ff | 6506 | hrtim_bmcr = hhrtim->Instance->sCommonRegs.BMCR; |
bogdanm | 0:9b334a45a8ff | 6507 | |
bogdanm | 0:9b334a45a8ff | 6508 | /* Enable/Disable the half mode */ |
bogdanm | 0:9b334a45a8ff | 6509 | hrtim_timcr &= ~(HRTIM_TIMCR_HALF); |
bogdanm | 0:9b334a45a8ff | 6510 | hrtim_timcr |= pTimerCfg->HalfModeEnable; |
bogdanm | 0:9b334a45a8ff | 6511 | |
bogdanm | 0:9b334a45a8ff | 6512 | /* Enable/Disable the timer start upon synchronization event reception */ |
bogdanm | 0:9b334a45a8ff | 6513 | hrtim_timcr &= ~(HRTIM_TIMCR_SYNCSTRT); |
bogdanm | 0:9b334a45a8ff | 6514 | hrtim_timcr |= pTimerCfg->StartOnSync; |
bogdanm | 0:9b334a45a8ff | 6515 | |
bogdanm | 0:9b334a45a8ff | 6516 | /* Enable/Disable the timer reset upon synchronization event reception */ |
bogdanm | 0:9b334a45a8ff | 6517 | hrtim_timcr &= ~(HRTIM_TIMCR_SYNCRST); |
bogdanm | 0:9b334a45a8ff | 6518 | hrtim_timcr |= pTimerCfg->ResetOnSync; |
bogdanm | 0:9b334a45a8ff | 6519 | |
bogdanm | 0:9b334a45a8ff | 6520 | /* Enable/Disable the DAC synchronization event generation */ |
bogdanm | 0:9b334a45a8ff | 6521 | hrtim_timcr &= ~(HRTIM_TIMCR_DACSYNC); |
bogdanm | 0:9b334a45a8ff | 6522 | hrtim_timcr |= pTimerCfg->DACSynchro; |
bogdanm | 0:9b334a45a8ff | 6523 | |
bogdanm | 0:9b334a45a8ff | 6524 | /* Enable/Disable preload meachanism for timer registers */ |
bogdanm | 0:9b334a45a8ff | 6525 | hrtim_timcr &= ~(HRTIM_TIMCR_PREEN); |
bogdanm | 0:9b334a45a8ff | 6526 | hrtim_timcr |= pTimerCfg->PreloadEnable; |
bogdanm | 0:9b334a45a8ff | 6527 | |
bogdanm | 0:9b334a45a8ff | 6528 | /* Timing unit registers update handling */ |
bogdanm | 0:9b334a45a8ff | 6529 | hrtim_timcr &= ~(HRTIM_TIMCR_UPDGAT); |
bogdanm | 0:9b334a45a8ff | 6530 | hrtim_timcr |= pTimerCfg->UpdateGating; |
bogdanm | 0:9b334a45a8ff | 6531 | |
bogdanm | 0:9b334a45a8ff | 6532 | /* Enable/Disable registers update on repetition */ |
bogdanm | 0:9b334a45a8ff | 6533 | hrtim_timcr &= ~(HRTIM_TIMCR_TREPU); |
bogdanm | 0:9b334a45a8ff | 6534 | if (pTimerCfg->RepetitionUpdate == HRTIM_UPDATEONREPETITION_ENABLED) |
bogdanm | 0:9b334a45a8ff | 6535 | { |
bogdanm | 0:9b334a45a8ff | 6536 | hrtim_timcr |= HRTIM_TIMCR_TREPU; |
bogdanm | 0:9b334a45a8ff | 6537 | } |
bogdanm | 0:9b334a45a8ff | 6538 | |
bogdanm | 0:9b334a45a8ff | 6539 | /* Set the push-pull mode */ |
bogdanm | 0:9b334a45a8ff | 6540 | hrtim_timcr &= ~(HRTIM_TIMCR_PSHPLL); |
bogdanm | 0:9b334a45a8ff | 6541 | hrtim_timcr |= pTimerCfg->PushPull; |
bogdanm | 0:9b334a45a8ff | 6542 | |
bogdanm | 0:9b334a45a8ff | 6543 | /* Enable/Disable registers update on timer counter reset */ |
bogdanm | 0:9b334a45a8ff | 6544 | hrtim_timcr &= ~(HRTIM_TIMCR_TRSTU); |
bogdanm | 0:9b334a45a8ff | 6545 | hrtim_timcr |= pTimerCfg->ResetUpdate; |
bogdanm | 0:9b334a45a8ff | 6546 | |
bogdanm | 0:9b334a45a8ff | 6547 | /* Set the timer update trigger */ |
bogdanm | 0:9b334a45a8ff | 6548 | hrtim_timcr &= ~(HRTIM_TIMCR_TIMUPDATETRIGGER); |
bogdanm | 0:9b334a45a8ff | 6549 | hrtim_timcr |= pTimerCfg->UpdateTrigger; |
bogdanm | 0:9b334a45a8ff | 6550 | |
bogdanm | 0:9b334a45a8ff | 6551 | |
bogdanm | 0:9b334a45a8ff | 6552 | /* Enable/Disable the fault channel at timer level */ |
bogdanm | 0:9b334a45a8ff | 6553 | hrtim_timfltr &= ~(HRTIM_FLTR_FLTxEN); |
bogdanm | 0:9b334a45a8ff | 6554 | hrtim_timfltr |= (pTimerCfg->FaultEnable & HRTIM_FLTR_FLTxEN); |
bogdanm | 0:9b334a45a8ff | 6555 | |
bogdanm | 0:9b334a45a8ff | 6556 | /* Lock/Unlock fault sources at timer level */ |
bogdanm | 0:9b334a45a8ff | 6557 | hrtim_timfltr &= ~(HRTIM_FLTR_FLTLCK); |
bogdanm | 0:9b334a45a8ff | 6558 | hrtim_timfltr |= pTimerCfg->FaultLock; |
bogdanm | 0:9b334a45a8ff | 6559 | |
bogdanm | 0:9b334a45a8ff | 6560 | /* The deadtime cannot be used simultaneously with the push-pull mode */ |
bogdanm | 0:9b334a45a8ff | 6561 | if (pTimerCfg->PushPull == HRTIM_TIMPUSHPULLMODE_DISABLED) |
bogdanm | 0:9b334a45a8ff | 6562 | { |
bogdanm | 0:9b334a45a8ff | 6563 | /* Enable/Disable dead time insertion at timer level */ |
bogdanm | 0:9b334a45a8ff | 6564 | hrtim_timoutr &= ~(HRTIM_OUTR_DTEN); |
bogdanm | 0:9b334a45a8ff | 6565 | hrtim_timoutr |= pTimerCfg->DeadTimeInsertion; |
bogdanm | 0:9b334a45a8ff | 6566 | } |
bogdanm | 0:9b334a45a8ff | 6567 | |
bogdanm | 0:9b334a45a8ff | 6568 | /* Enable/Disable delayed protection at timer level |
bogdanm | 0:9b334a45a8ff | 6569 | Delayed Idle is available whatever the timer operating mode (regular, push-pull) |
bogdanm | 0:9b334a45a8ff | 6570 | Balanced Idle is only available in push-pull mode |
bogdanm | 0:9b334a45a8ff | 6571 | */ |
bogdanm | 0:9b334a45a8ff | 6572 | if ( ((pTimerCfg->DelayedProtectionMode != HRTIM_TIMDELAYEDPROTECTION_BALANCED_EEV68) |
bogdanm | 0:9b334a45a8ff | 6573 | && (pTimerCfg->DelayedProtectionMode != HRTIM_TIMDELAYEDPROTECTION_BALANCED_EEV79)) |
bogdanm | 0:9b334a45a8ff | 6574 | || (pTimerCfg->PushPull == HRTIM_TIMPUSHPULLMODE_ENABLED)) |
bogdanm | 0:9b334a45a8ff | 6575 | { |
bogdanm | 0:9b334a45a8ff | 6576 | hrtim_timoutr &= ~(HRTIM_OUTR_DLYPRT| HRTIM_OUTR_DLYPRTEN); |
bogdanm | 0:9b334a45a8ff | 6577 | hrtim_timoutr |= pTimerCfg->DelayedProtectionMode; |
bogdanm | 0:9b334a45a8ff | 6578 | } |
bogdanm | 0:9b334a45a8ff | 6579 | |
bogdanm | 0:9b334a45a8ff | 6580 | /* Set the timer counter reset trigger */ |
bogdanm | 0:9b334a45a8ff | 6581 | hrtim_timrstr = pTimerCfg->ResetTrigger; |
bogdanm | 0:9b334a45a8ff | 6582 | |
bogdanm | 0:9b334a45a8ff | 6583 | /* Set the timer burst mode */ |
bogdanm | 0:9b334a45a8ff | 6584 | switch (TimerIdx) |
bogdanm | 0:9b334a45a8ff | 6585 | { |
bogdanm | 0:9b334a45a8ff | 6586 | case HRTIM_TIMERINDEX_TIMER_A: |
bogdanm | 0:9b334a45a8ff | 6587 | { |
bogdanm | 0:9b334a45a8ff | 6588 | hrtim_bmcr &= ~(HRTIM_BMCR_TABM); |
bogdanm | 0:9b334a45a8ff | 6589 | hrtim_bmcr |= ( pTimerCfg->BurstMode << 1); |
bogdanm | 0:9b334a45a8ff | 6590 | } |
bogdanm | 0:9b334a45a8ff | 6591 | break; |
bogdanm | 0:9b334a45a8ff | 6592 | case HRTIM_TIMERINDEX_TIMER_B: |
bogdanm | 0:9b334a45a8ff | 6593 | { |
bogdanm | 0:9b334a45a8ff | 6594 | hrtim_bmcr &= ~(HRTIM_BMCR_TBBM); |
bogdanm | 0:9b334a45a8ff | 6595 | hrtim_bmcr |= ( pTimerCfg->BurstMode << 2); |
bogdanm | 0:9b334a45a8ff | 6596 | } |
bogdanm | 0:9b334a45a8ff | 6597 | break; |
bogdanm | 0:9b334a45a8ff | 6598 | case HRTIM_TIMERINDEX_TIMER_C: |
bogdanm | 0:9b334a45a8ff | 6599 | { |
bogdanm | 0:9b334a45a8ff | 6600 | hrtim_bmcr &= ~(HRTIM_BMCR_TCBM); |
bogdanm | 0:9b334a45a8ff | 6601 | hrtim_bmcr |= ( pTimerCfg->BurstMode << 3); |
bogdanm | 0:9b334a45a8ff | 6602 | } |
bogdanm | 0:9b334a45a8ff | 6603 | break; |
bogdanm | 0:9b334a45a8ff | 6604 | case HRTIM_TIMERINDEX_TIMER_D: |
bogdanm | 0:9b334a45a8ff | 6605 | { |
bogdanm | 0:9b334a45a8ff | 6606 | hrtim_bmcr &= ~(HRTIM_BMCR_TDBM); |
bogdanm | 0:9b334a45a8ff | 6607 | hrtim_bmcr |= ( pTimerCfg->BurstMode << 4); |
bogdanm | 0:9b334a45a8ff | 6608 | } |
bogdanm | 0:9b334a45a8ff | 6609 | break; |
bogdanm | 0:9b334a45a8ff | 6610 | case HRTIM_TIMERINDEX_TIMER_E: |
bogdanm | 0:9b334a45a8ff | 6611 | { |
bogdanm | 0:9b334a45a8ff | 6612 | hrtim_bmcr &= ~(HRTIM_BMCR_TEBM); |
bogdanm | 0:9b334a45a8ff | 6613 | hrtim_bmcr |= ( pTimerCfg->BurstMode << 5); |
bogdanm | 0:9b334a45a8ff | 6614 | } |
bogdanm | 0:9b334a45a8ff | 6615 | break; |
bogdanm | 0:9b334a45a8ff | 6616 | } |
bogdanm | 0:9b334a45a8ff | 6617 | |
bogdanm | 0:9b334a45a8ff | 6618 | /* Update the HRTIM registers */ |
bogdanm | 0:9b334a45a8ff | 6619 | hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxCR = hrtim_timcr; |
bogdanm | 0:9b334a45a8ff | 6620 | hhrtim->Instance->sTimerxRegs[TimerIdx].FLTxR = hrtim_timfltr; |
bogdanm | 0:9b334a45a8ff | 6621 | hhrtim->Instance->sTimerxRegs[TimerIdx].OUTxR = hrtim_timoutr; |
bogdanm | 0:9b334a45a8ff | 6622 | hhrtim->Instance->sTimerxRegs[TimerIdx].RSTxR = hrtim_timrstr; |
bogdanm | 0:9b334a45a8ff | 6623 | hhrtim->Instance->sCommonRegs.BMCR = hrtim_bmcr; |
bogdanm | 0:9b334a45a8ff | 6624 | } |
bogdanm | 0:9b334a45a8ff | 6625 | |
bogdanm | 0:9b334a45a8ff | 6626 | /** |
bogdanm | 0:9b334a45a8ff | 6627 | * @brief Configures a compare unit |
bogdanm | 0:9b334a45a8ff | 6628 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 6629 | * @param TimerIdx: Timer index |
bogdanm | 0:9b334a45a8ff | 6630 | * @param CompareUnit: Compare unit identifier |
bogdanm | 0:9b334a45a8ff | 6631 | * @param pCompareCfg: pointer to the compare unit configuration data structure |
bogdanm | 0:9b334a45a8ff | 6632 | * @retval None |
bogdanm | 0:9b334a45a8ff | 6633 | */ |
bogdanm | 0:9b334a45a8ff | 6634 | static void HRTIM_CompareUnitConfig(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 6635 | uint32_t TimerIdx, |
bogdanm | 0:9b334a45a8ff | 6636 | uint32_t CompareUnit, |
bogdanm | 0:9b334a45a8ff | 6637 | HRTIM_CompareCfgTypeDef * pCompareCfg) |
bogdanm | 0:9b334a45a8ff | 6638 | { |
bogdanm | 0:9b334a45a8ff | 6639 | if (TimerIdx == HRTIM_TIMERINDEX_MASTER) |
bogdanm | 0:9b334a45a8ff | 6640 | { |
bogdanm | 0:9b334a45a8ff | 6641 | /* Configure the compare unit of the master timer */ |
bogdanm | 0:9b334a45a8ff | 6642 | switch (CompareUnit) |
bogdanm | 0:9b334a45a8ff | 6643 | { |
bogdanm | 0:9b334a45a8ff | 6644 | case HRTIM_COMPAREUNIT_1: |
bogdanm | 0:9b334a45a8ff | 6645 | { |
bogdanm | 0:9b334a45a8ff | 6646 | hhrtim->Instance->sMasterRegs.MCMP1R = pCompareCfg->CompareValue; |
bogdanm | 0:9b334a45a8ff | 6647 | } |
bogdanm | 0:9b334a45a8ff | 6648 | break; |
bogdanm | 0:9b334a45a8ff | 6649 | case HRTIM_COMPAREUNIT_2: |
bogdanm | 0:9b334a45a8ff | 6650 | { |
bogdanm | 0:9b334a45a8ff | 6651 | hhrtim->Instance->sMasterRegs.MCMP2R = pCompareCfg->CompareValue; |
bogdanm | 0:9b334a45a8ff | 6652 | } |
bogdanm | 0:9b334a45a8ff | 6653 | break; |
bogdanm | 0:9b334a45a8ff | 6654 | case HRTIM_COMPAREUNIT_3: |
bogdanm | 0:9b334a45a8ff | 6655 | { |
bogdanm | 0:9b334a45a8ff | 6656 | hhrtim->Instance->sMasterRegs.MCMP3R = pCompareCfg->CompareValue; |
bogdanm | 0:9b334a45a8ff | 6657 | } |
bogdanm | 0:9b334a45a8ff | 6658 | break; |
bogdanm | 0:9b334a45a8ff | 6659 | case HRTIM_COMPAREUNIT_4: |
bogdanm | 0:9b334a45a8ff | 6660 | { |
bogdanm | 0:9b334a45a8ff | 6661 | hhrtim->Instance->sMasterRegs.MCMP4R = pCompareCfg->CompareValue; |
bogdanm | 0:9b334a45a8ff | 6662 | } |
bogdanm | 0:9b334a45a8ff | 6663 | break; |
bogdanm | 0:9b334a45a8ff | 6664 | } |
bogdanm | 0:9b334a45a8ff | 6665 | } |
bogdanm | 0:9b334a45a8ff | 6666 | else |
bogdanm | 0:9b334a45a8ff | 6667 | { |
bogdanm | 0:9b334a45a8ff | 6668 | /* Configure the compare unit of the timing unit */ |
bogdanm | 0:9b334a45a8ff | 6669 | switch (CompareUnit) |
bogdanm | 0:9b334a45a8ff | 6670 | { |
bogdanm | 0:9b334a45a8ff | 6671 | case HRTIM_COMPAREUNIT_1: |
bogdanm | 0:9b334a45a8ff | 6672 | { |
bogdanm | 0:9b334a45a8ff | 6673 | hhrtim->Instance->sTimerxRegs[TimerIdx].CMP1xR = pCompareCfg->CompareValue; |
bogdanm | 0:9b334a45a8ff | 6674 | } |
bogdanm | 0:9b334a45a8ff | 6675 | break; |
bogdanm | 0:9b334a45a8ff | 6676 | case HRTIM_COMPAREUNIT_2: |
bogdanm | 0:9b334a45a8ff | 6677 | { |
bogdanm | 0:9b334a45a8ff | 6678 | hhrtim->Instance->sTimerxRegs[TimerIdx].CMP2xR = pCompareCfg->CompareValue; |
bogdanm | 0:9b334a45a8ff | 6679 | } |
bogdanm | 0:9b334a45a8ff | 6680 | break; |
bogdanm | 0:9b334a45a8ff | 6681 | case HRTIM_COMPAREUNIT_3: |
bogdanm | 0:9b334a45a8ff | 6682 | { |
bogdanm | 0:9b334a45a8ff | 6683 | hhrtim->Instance->sTimerxRegs[TimerIdx].CMP3xR = pCompareCfg->CompareValue; |
bogdanm | 0:9b334a45a8ff | 6684 | } |
bogdanm | 0:9b334a45a8ff | 6685 | break; |
bogdanm | 0:9b334a45a8ff | 6686 | case HRTIM_COMPAREUNIT_4: |
bogdanm | 0:9b334a45a8ff | 6687 | { |
bogdanm | 0:9b334a45a8ff | 6688 | hhrtim->Instance->sTimerxRegs[TimerIdx].CMP4xR = pCompareCfg->CompareValue; |
bogdanm | 0:9b334a45a8ff | 6689 | } |
bogdanm | 0:9b334a45a8ff | 6690 | break; |
bogdanm | 0:9b334a45a8ff | 6691 | } |
bogdanm | 0:9b334a45a8ff | 6692 | } |
bogdanm | 0:9b334a45a8ff | 6693 | } |
bogdanm | 0:9b334a45a8ff | 6694 | |
bogdanm | 0:9b334a45a8ff | 6695 | /** |
bogdanm | 0:9b334a45a8ff | 6696 | * @brief Configures a capture unit |
bogdanm | 0:9b334a45a8ff | 6697 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 6698 | * @param TimerIdx: Timer index |
bogdanm | 0:9b334a45a8ff | 6699 | * @param CaptureUnit: Capture unit identifier |
bogdanm | 0:9b334a45a8ff | 6700 | * @param Event: Event reference |
bogdanm | 0:9b334a45a8ff | 6701 | * @retval None |
bogdanm | 0:9b334a45a8ff | 6702 | */ |
bogdanm | 0:9b334a45a8ff | 6703 | static void HRTIM_CaptureUnitConfig(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 6704 | uint32_t TimerIdx, |
bogdanm | 0:9b334a45a8ff | 6705 | uint32_t CaptureUnit, |
bogdanm | 0:9b334a45a8ff | 6706 | uint32_t Event) |
bogdanm | 0:9b334a45a8ff | 6707 | { |
bogdanm | 0:9b334a45a8ff | 6708 | uint32_t CaptureTrigger = 0xFFFFFFFF; |
bogdanm | 0:9b334a45a8ff | 6709 | |
bogdanm | 0:9b334a45a8ff | 6710 | switch (Event) |
bogdanm | 0:9b334a45a8ff | 6711 | { |
bogdanm | 0:9b334a45a8ff | 6712 | case HRTIM_EVENT_1: |
bogdanm | 0:9b334a45a8ff | 6713 | { |
bogdanm | 0:9b334a45a8ff | 6714 | CaptureTrigger = HRTIM_CAPTURETRIGGER_EEV_1; |
bogdanm | 0:9b334a45a8ff | 6715 | } |
bogdanm | 0:9b334a45a8ff | 6716 | break; |
bogdanm | 0:9b334a45a8ff | 6717 | case HRTIM_EVENT_2: |
bogdanm | 0:9b334a45a8ff | 6718 | { |
bogdanm | 0:9b334a45a8ff | 6719 | CaptureTrigger = HRTIM_CAPTURETRIGGER_EEV_2; |
bogdanm | 0:9b334a45a8ff | 6720 | } |
bogdanm | 0:9b334a45a8ff | 6721 | break; |
bogdanm | 0:9b334a45a8ff | 6722 | case HRTIM_EVENT_3: |
bogdanm | 0:9b334a45a8ff | 6723 | { |
bogdanm | 0:9b334a45a8ff | 6724 | CaptureTrigger = HRTIM_CAPTURETRIGGER_EEV_3; |
bogdanm | 0:9b334a45a8ff | 6725 | } |
bogdanm | 0:9b334a45a8ff | 6726 | break; |
bogdanm | 0:9b334a45a8ff | 6727 | case HRTIM_EVENT_4: |
bogdanm | 0:9b334a45a8ff | 6728 | { |
bogdanm | 0:9b334a45a8ff | 6729 | CaptureTrigger = HRTIM_CAPTURETRIGGER_EEV_4; |
bogdanm | 0:9b334a45a8ff | 6730 | } |
bogdanm | 0:9b334a45a8ff | 6731 | break; |
bogdanm | 0:9b334a45a8ff | 6732 | case HRTIM_EVENT_5: |
bogdanm | 0:9b334a45a8ff | 6733 | { |
bogdanm | 0:9b334a45a8ff | 6734 | CaptureTrigger = HRTIM_CAPTURETRIGGER_EEV_5; |
bogdanm | 0:9b334a45a8ff | 6735 | } |
bogdanm | 0:9b334a45a8ff | 6736 | break; |
bogdanm | 0:9b334a45a8ff | 6737 | case HRTIM_EVENT_6: |
bogdanm | 0:9b334a45a8ff | 6738 | { |
bogdanm | 0:9b334a45a8ff | 6739 | CaptureTrigger = HRTIM_CAPTURETRIGGER_EEV_6; |
bogdanm | 0:9b334a45a8ff | 6740 | } |
bogdanm | 0:9b334a45a8ff | 6741 | break; |
bogdanm | 0:9b334a45a8ff | 6742 | case HRTIM_EVENT_7: |
bogdanm | 0:9b334a45a8ff | 6743 | { |
bogdanm | 0:9b334a45a8ff | 6744 | CaptureTrigger = HRTIM_CAPTURETRIGGER_EEV_7; |
bogdanm | 0:9b334a45a8ff | 6745 | } |
bogdanm | 0:9b334a45a8ff | 6746 | break; |
bogdanm | 0:9b334a45a8ff | 6747 | case HRTIM_EVENT_8: |
bogdanm | 0:9b334a45a8ff | 6748 | { |
bogdanm | 0:9b334a45a8ff | 6749 | CaptureTrigger = HRTIM_CAPTURETRIGGER_EEV_8; |
bogdanm | 0:9b334a45a8ff | 6750 | } |
bogdanm | 0:9b334a45a8ff | 6751 | break; |
bogdanm | 0:9b334a45a8ff | 6752 | case HRTIM_EVENT_9: |
bogdanm | 0:9b334a45a8ff | 6753 | { |
bogdanm | 0:9b334a45a8ff | 6754 | CaptureTrigger = HRTIM_CAPTURETRIGGER_EEV_9; |
bogdanm | 0:9b334a45a8ff | 6755 | } |
bogdanm | 0:9b334a45a8ff | 6756 | break; |
bogdanm | 0:9b334a45a8ff | 6757 | case HRTIM_EVENT_10: |
bogdanm | 0:9b334a45a8ff | 6758 | { |
bogdanm | 0:9b334a45a8ff | 6759 | CaptureTrigger = HRTIM_CAPTURETRIGGER_EEV_10; |
bogdanm | 0:9b334a45a8ff | 6760 | } |
bogdanm | 0:9b334a45a8ff | 6761 | break; |
bogdanm | 0:9b334a45a8ff | 6762 | } |
bogdanm | 0:9b334a45a8ff | 6763 | |
bogdanm | 0:9b334a45a8ff | 6764 | switch (CaptureUnit) |
bogdanm | 0:9b334a45a8ff | 6765 | { |
bogdanm | 0:9b334a45a8ff | 6766 | case HRTIM_CAPTUREUNIT_1: |
bogdanm | 0:9b334a45a8ff | 6767 | { |
bogdanm | 0:9b334a45a8ff | 6768 | hhrtim->TimerParam[TimerIdx].CaptureTrigger1 = CaptureTrigger; |
bogdanm | 0:9b334a45a8ff | 6769 | } |
bogdanm | 0:9b334a45a8ff | 6770 | break; |
bogdanm | 0:9b334a45a8ff | 6771 | case HRTIM_CAPTUREUNIT_2: |
bogdanm | 0:9b334a45a8ff | 6772 | { |
bogdanm | 0:9b334a45a8ff | 6773 | hhrtim->TimerParam[TimerIdx].CaptureTrigger2 = CaptureTrigger; |
bogdanm | 0:9b334a45a8ff | 6774 | } |
bogdanm | 0:9b334a45a8ff | 6775 | break; |
bogdanm | 0:9b334a45a8ff | 6776 | } |
bogdanm | 0:9b334a45a8ff | 6777 | } |
bogdanm | 0:9b334a45a8ff | 6778 | |
bogdanm | 0:9b334a45a8ff | 6779 | /** |
bogdanm | 0:9b334a45a8ff | 6780 | * @brief Configures the output of a timing unit |
bogdanm | 0:9b334a45a8ff | 6781 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 6782 | * @param TimerIdx: Timer index |
bogdanm | 0:9b334a45a8ff | 6783 | * @param Output: timing unit output identifier |
bogdanm | 0:9b334a45a8ff | 6784 | * @param pOutputCfg: pointer to the output configuration data structure |
bogdanm | 0:9b334a45a8ff | 6785 | * @retval None |
bogdanm | 0:9b334a45a8ff | 6786 | */ |
bogdanm | 0:9b334a45a8ff | 6787 | static void HRTIM_OutputConfig(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 6788 | uint32_t TimerIdx, |
bogdanm | 0:9b334a45a8ff | 6789 | uint32_t Output, |
bogdanm | 0:9b334a45a8ff | 6790 | HRTIM_OutputCfgTypeDef * pOutputCfg) |
bogdanm | 0:9b334a45a8ff | 6791 | { |
bogdanm | 0:9b334a45a8ff | 6792 | uint32_t hrtim_outr; |
bogdanm | 0:9b334a45a8ff | 6793 | uint32_t hrtim_dtr; |
bogdanm | 0:9b334a45a8ff | 6794 | |
bogdanm | 0:9b334a45a8ff | 6795 | uint32_t shift = 0xFFFFFFFF; |
bogdanm | 0:9b334a45a8ff | 6796 | |
bogdanm | 0:9b334a45a8ff | 6797 | hrtim_outr = hhrtim->Instance->sTimerxRegs[TimerIdx].OUTxR; |
bogdanm | 0:9b334a45a8ff | 6798 | hrtim_dtr = hhrtim->Instance->sTimerxRegs[TimerIdx].DTxR; |
bogdanm | 0:9b334a45a8ff | 6799 | |
bogdanm | 0:9b334a45a8ff | 6800 | switch (Output) |
bogdanm | 0:9b334a45a8ff | 6801 | { |
bogdanm | 0:9b334a45a8ff | 6802 | case HRTIM_OUTPUT_TA1: |
bogdanm | 0:9b334a45a8ff | 6803 | case HRTIM_OUTPUT_TB1: |
bogdanm | 0:9b334a45a8ff | 6804 | case HRTIM_OUTPUT_TC1: |
bogdanm | 0:9b334a45a8ff | 6805 | case HRTIM_OUTPUT_TD1: |
bogdanm | 0:9b334a45a8ff | 6806 | case HRTIM_OUTPUT_TE1: |
bogdanm | 0:9b334a45a8ff | 6807 | { |
bogdanm | 0:9b334a45a8ff | 6808 | /* Set the output set/reset crossbar */ |
bogdanm | 0:9b334a45a8ff | 6809 | hhrtim->Instance->sTimerxRegs[TimerIdx].SETx1R = pOutputCfg->SetSource; |
bogdanm | 0:9b334a45a8ff | 6810 | hhrtim->Instance->sTimerxRegs[TimerIdx].RSTx1R = pOutputCfg->ResetSource; |
bogdanm | 0:9b334a45a8ff | 6811 | |
bogdanm | 0:9b334a45a8ff | 6812 | shift = 0; |
bogdanm | 0:9b334a45a8ff | 6813 | } |
bogdanm | 0:9b334a45a8ff | 6814 | break; |
bogdanm | 0:9b334a45a8ff | 6815 | case HRTIM_OUTPUT_TA2: |
bogdanm | 0:9b334a45a8ff | 6816 | case HRTIM_OUTPUT_TB2: |
bogdanm | 0:9b334a45a8ff | 6817 | case HRTIM_OUTPUT_TC2: |
bogdanm | 0:9b334a45a8ff | 6818 | case HRTIM_OUTPUT_TD2: |
bogdanm | 0:9b334a45a8ff | 6819 | case HRTIM_OUTPUT_TE2: |
bogdanm | 0:9b334a45a8ff | 6820 | { |
bogdanm | 0:9b334a45a8ff | 6821 | /* Set the output set/reset crossbar */ |
bogdanm | 0:9b334a45a8ff | 6822 | hhrtim->Instance->sTimerxRegs[TimerIdx].SETx2R = pOutputCfg->SetSource; |
bogdanm | 0:9b334a45a8ff | 6823 | hhrtim->Instance->sTimerxRegs[TimerIdx].RSTx2R = pOutputCfg->ResetSource; |
bogdanm | 0:9b334a45a8ff | 6824 | |
bogdanm | 0:9b334a45a8ff | 6825 | shift = 16; |
bogdanm | 0:9b334a45a8ff | 6826 | } |
bogdanm | 0:9b334a45a8ff | 6827 | break; |
bogdanm | 0:9b334a45a8ff | 6828 | } |
bogdanm | 0:9b334a45a8ff | 6829 | |
bogdanm | 0:9b334a45a8ff | 6830 | /* Clear output config */ |
bogdanm | 0:9b334a45a8ff | 6831 | hrtim_outr &= ~((HRTIM_OUTR_POL1 | |
bogdanm | 0:9b334a45a8ff | 6832 | HRTIM_OUTR_IDLM1 | |
bogdanm | 0:9b334a45a8ff | 6833 | HRTIM_OUTR_IDLES1| |
bogdanm | 0:9b334a45a8ff | 6834 | HRTIM_OUTR_FAULT1| |
bogdanm | 0:9b334a45a8ff | 6835 | HRTIM_OUTR_CHP1 | |
bogdanm | 0:9b334a45a8ff | 6836 | HRTIM_OUTR_DIDL1) << shift); |
bogdanm | 0:9b334a45a8ff | 6837 | |
bogdanm | 0:9b334a45a8ff | 6838 | /* Set the polarity */ |
bogdanm | 0:9b334a45a8ff | 6839 | hrtim_outr |= (pOutputCfg->Polarity << shift); |
bogdanm | 0:9b334a45a8ff | 6840 | |
bogdanm | 0:9b334a45a8ff | 6841 | /* Set the IDLE mode */ |
bogdanm | 0:9b334a45a8ff | 6842 | hrtim_outr |= (pOutputCfg->IdleMode << shift); |
bogdanm | 0:9b334a45a8ff | 6843 | |
bogdanm | 0:9b334a45a8ff | 6844 | /* Set the IDLE state */ |
bogdanm | 0:9b334a45a8ff | 6845 | hrtim_outr |= (pOutputCfg->IdleLevel << shift); |
bogdanm | 0:9b334a45a8ff | 6846 | |
bogdanm | 0:9b334a45a8ff | 6847 | /* Set the FAULT state */ |
bogdanm | 0:9b334a45a8ff | 6848 | hrtim_outr |= (pOutputCfg->FaultLevel << shift); |
bogdanm | 0:9b334a45a8ff | 6849 | |
bogdanm | 0:9b334a45a8ff | 6850 | /* Set the chopper mode */ |
bogdanm | 0:9b334a45a8ff | 6851 | hrtim_outr |= (pOutputCfg->ChopperModeEnable << shift); |
bogdanm | 0:9b334a45a8ff | 6852 | |
bogdanm | 0:9b334a45a8ff | 6853 | /* Set the burst mode entry mode : deadtime insertion when entering the idle |
bogdanm | 0:9b334a45a8ff | 6854 | state during a burst mode operation is allowed only under the following |
bogdanm | 0:9b334a45a8ff | 6855 | conditions: |
bogdanm | 0:9b334a45a8ff | 6856 | - the outputs is active during the burst mode (IDLES=1) |
bogdanm | 0:9b334a45a8ff | 6857 | - positive deadtimes (SDTR/SDTF set to 0) |
bogdanm | 0:9b334a45a8ff | 6858 | */ |
bogdanm | 0:9b334a45a8ff | 6859 | if ((pOutputCfg->IdleLevel == HRTIM_OUTPUTIDLELEVEL_ACTIVE) && |
bogdanm | 0:9b334a45a8ff | 6860 | ((hrtim_dtr & HRTIM_DTR_SDTR) == RESET) && |
bogdanm | 0:9b334a45a8ff | 6861 | ((hrtim_dtr & HRTIM_DTR_SDTF) == RESET)) |
bogdanm | 0:9b334a45a8ff | 6862 | { |
bogdanm | 0:9b334a45a8ff | 6863 | hrtim_outr |= (pOutputCfg->BurstModeEntryDelayed << shift); |
bogdanm | 0:9b334a45a8ff | 6864 | } |
bogdanm | 0:9b334a45a8ff | 6865 | |
bogdanm | 0:9b334a45a8ff | 6866 | /* Update HRTIM register */ |
bogdanm | 0:9b334a45a8ff | 6867 | hhrtim->Instance->sTimerxRegs[TimerIdx].OUTxR = hrtim_outr; |
bogdanm | 0:9b334a45a8ff | 6868 | } |
bogdanm | 0:9b334a45a8ff | 6869 | |
bogdanm | 0:9b334a45a8ff | 6870 | /** |
bogdanm | 0:9b334a45a8ff | 6871 | * @brief Configures an external event channel |
bogdanm | 0:9b334a45a8ff | 6872 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 6873 | * @param Event: Event channel identifier |
bogdanm | 0:9b334a45a8ff | 6874 | * @param pEventCfg: pointer to the event channel configuration data structure |
bogdanm | 0:9b334a45a8ff | 6875 | * @retval None |
bogdanm | 0:9b334a45a8ff | 6876 | */ |
bogdanm | 0:9b334a45a8ff | 6877 | static void HRTIM_EventConfig(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 6878 | uint32_t Event, |
bogdanm | 0:9b334a45a8ff | 6879 | HRTIM_EventCfgTypeDef *pEventCfg) |
bogdanm | 0:9b334a45a8ff | 6880 | { |
bogdanm | 0:9b334a45a8ff | 6881 | uint32_t hrtim_eecr1; |
bogdanm | 0:9b334a45a8ff | 6882 | uint32_t hrtim_eecr2; |
bogdanm | 0:9b334a45a8ff | 6883 | uint32_t hrtim_eecr3; |
bogdanm | 0:9b334a45a8ff | 6884 | |
bogdanm | 0:9b334a45a8ff | 6885 | /* Configure external event channel */ |
bogdanm | 0:9b334a45a8ff | 6886 | hrtim_eecr1 = hhrtim->Instance->sCommonRegs.EECR1; |
bogdanm | 0:9b334a45a8ff | 6887 | hrtim_eecr2 = hhrtim->Instance->sCommonRegs.EECR2; |
bogdanm | 0:9b334a45a8ff | 6888 | hrtim_eecr3 = hhrtim->Instance->sCommonRegs.EECR3; |
bogdanm | 0:9b334a45a8ff | 6889 | |
bogdanm | 0:9b334a45a8ff | 6890 | switch (Event) |
bogdanm | 0:9b334a45a8ff | 6891 | { |
bogdanm | 0:9b334a45a8ff | 6892 | case HRTIM_EVENT_1: |
bogdanm | 0:9b334a45a8ff | 6893 | { |
bogdanm | 0:9b334a45a8ff | 6894 | hrtim_eecr1 &= ~(HRTIM_EECR1_EE1SRC | HRTIM_EECR1_EE1POL | HRTIM_EECR1_EE1SNS | HRTIM_EECR1_EE1FAST); |
bogdanm | 0:9b334a45a8ff | 6895 | hrtim_eecr1 |= pEventCfg->Source; |
bogdanm | 0:9b334a45a8ff | 6896 | hrtim_eecr1 |= (pEventCfg->Polarity & HRTIM_EECR1_EE1POL); |
bogdanm | 0:9b334a45a8ff | 6897 | hrtim_eecr1 |= pEventCfg->Sensitivity; |
bogdanm | 0:9b334a45a8ff | 6898 | /* Update the HRTIM registers (all bitfields but EE1FAST bit) */ |
bogdanm | 0:9b334a45a8ff | 6899 | hhrtim->Instance->sCommonRegs.EECR1 = hrtim_eecr1; |
bogdanm | 0:9b334a45a8ff | 6900 | /* Update the HRTIM registers (EE1FAST bit) */ |
bogdanm | 0:9b334a45a8ff | 6901 | hrtim_eecr1 |= pEventCfg->FastMode; |
bogdanm | 0:9b334a45a8ff | 6902 | hhrtim->Instance->sCommonRegs.EECR1 = hrtim_eecr1; |
bogdanm | 0:9b334a45a8ff | 6903 | } |
bogdanm | 0:9b334a45a8ff | 6904 | break; |
bogdanm | 0:9b334a45a8ff | 6905 | case HRTIM_EVENT_2: |
bogdanm | 0:9b334a45a8ff | 6906 | { |
bogdanm | 0:9b334a45a8ff | 6907 | hrtim_eecr1 &= ~(HRTIM_EECR1_EE2SRC | HRTIM_EECR1_EE2POL | HRTIM_EECR1_EE2SNS | HRTIM_EECR1_EE2FAST); |
bogdanm | 0:9b334a45a8ff | 6908 | hrtim_eecr1 |= (pEventCfg->Source << 6); |
bogdanm | 0:9b334a45a8ff | 6909 | hrtim_eecr1 |= ((pEventCfg->Polarity << 6) & (HRTIM_EECR1_EE2POL)); |
bogdanm | 0:9b334a45a8ff | 6910 | hrtim_eecr1 |= (pEventCfg->Sensitivity << 6); |
bogdanm | 0:9b334a45a8ff | 6911 | /* Update the HRTIM registers (all bitfields but EE2FAST bit) */ |
bogdanm | 0:9b334a45a8ff | 6912 | hhrtim->Instance->sCommonRegs.EECR1 = hrtim_eecr1; |
bogdanm | 0:9b334a45a8ff | 6913 | /* Update the HRTIM registers (EE2FAST bit) */ |
bogdanm | 0:9b334a45a8ff | 6914 | hrtim_eecr1 |= (pEventCfg->FastMode << 6); |
bogdanm | 0:9b334a45a8ff | 6915 | hhrtim->Instance->sCommonRegs.EECR1 = hrtim_eecr1; |
bogdanm | 0:9b334a45a8ff | 6916 | } |
bogdanm | 0:9b334a45a8ff | 6917 | break; |
bogdanm | 0:9b334a45a8ff | 6918 | case HRTIM_EVENT_3: |
bogdanm | 0:9b334a45a8ff | 6919 | { |
bogdanm | 0:9b334a45a8ff | 6920 | hrtim_eecr1 &= ~(HRTIM_EECR1_EE3SRC | HRTIM_EECR1_EE3POL | HRTIM_EECR1_EE3SNS | HRTIM_EECR1_EE3FAST); |
bogdanm | 0:9b334a45a8ff | 6921 | hrtim_eecr1 |= (pEventCfg->Source << 12); |
bogdanm | 0:9b334a45a8ff | 6922 | hrtim_eecr1 |= ((pEventCfg->Polarity << 12) & (HRTIM_EECR1_EE3POL)); |
bogdanm | 0:9b334a45a8ff | 6923 | hrtim_eecr1 |= (pEventCfg->Sensitivity << 12); |
bogdanm | 0:9b334a45a8ff | 6924 | /* Update the HRTIM registers (all bitfields but EE3FAST bit) */ |
bogdanm | 0:9b334a45a8ff | 6925 | hhrtim->Instance->sCommonRegs.EECR1 = hrtim_eecr1; |
bogdanm | 0:9b334a45a8ff | 6926 | /* Update the HRTIM registers (EE3FAST bit) */ |
bogdanm | 0:9b334a45a8ff | 6927 | hrtim_eecr1 |= (pEventCfg->FastMode << 12); |
bogdanm | 0:9b334a45a8ff | 6928 | hhrtim->Instance->sCommonRegs.EECR1 = hrtim_eecr1; |
bogdanm | 0:9b334a45a8ff | 6929 | } |
bogdanm | 0:9b334a45a8ff | 6930 | break; |
bogdanm | 0:9b334a45a8ff | 6931 | case HRTIM_EVENT_4: |
bogdanm | 0:9b334a45a8ff | 6932 | { |
bogdanm | 0:9b334a45a8ff | 6933 | hrtim_eecr1 &= ~(HRTIM_EECR1_EE4SRC | HRTIM_EECR1_EE4POL | HRTIM_EECR1_EE4SNS | HRTIM_EECR1_EE4FAST); |
bogdanm | 0:9b334a45a8ff | 6934 | hrtim_eecr1 |= (pEventCfg->Source << 18); |
bogdanm | 0:9b334a45a8ff | 6935 | hrtim_eecr1 |= ((pEventCfg->Polarity << 18) & (HRTIM_EECR1_EE4POL)); |
bogdanm | 0:9b334a45a8ff | 6936 | hrtim_eecr1 |= (pEventCfg->Sensitivity << 18); |
bogdanm | 0:9b334a45a8ff | 6937 | /* Update the HRTIM registers (all bitfields but EE4FAST bit) */ |
bogdanm | 0:9b334a45a8ff | 6938 | hhrtim->Instance->sCommonRegs.EECR1 = hrtim_eecr1; |
bogdanm | 0:9b334a45a8ff | 6939 | /* Update the HRTIM registers (EE4FAST bit) */ |
bogdanm | 0:9b334a45a8ff | 6940 | hrtim_eecr1 |= (pEventCfg->FastMode << 18); |
bogdanm | 0:9b334a45a8ff | 6941 | hhrtim->Instance->sCommonRegs.EECR1 = hrtim_eecr1; |
bogdanm | 0:9b334a45a8ff | 6942 | } |
bogdanm | 0:9b334a45a8ff | 6943 | break; |
bogdanm | 0:9b334a45a8ff | 6944 | case HRTIM_EVENT_5: |
bogdanm | 0:9b334a45a8ff | 6945 | { |
bogdanm | 0:9b334a45a8ff | 6946 | hrtim_eecr1 &= ~(HRTIM_EECR1_EE5SRC | HRTIM_EECR1_EE5POL | HRTIM_EECR1_EE5SNS | HRTIM_EECR1_EE5FAST); |
bogdanm | 0:9b334a45a8ff | 6947 | hrtim_eecr1 |= (pEventCfg->Source << 24); |
bogdanm | 0:9b334a45a8ff | 6948 | hrtim_eecr1 |= ((pEventCfg->Polarity << 24) & (HRTIM_EECR1_EE5POL)); |
bogdanm | 0:9b334a45a8ff | 6949 | hrtim_eecr1 |= (pEventCfg->Sensitivity << 24); |
bogdanm | 0:9b334a45a8ff | 6950 | /* Update the HRTIM registers (all bitfields but EE5FAST bit) */ |
bogdanm | 0:9b334a45a8ff | 6951 | hhrtim->Instance->sCommonRegs.EECR1 = hrtim_eecr1; |
bogdanm | 0:9b334a45a8ff | 6952 | /* Update the HRTIM registers (EE5FAST bit) */ |
bogdanm | 0:9b334a45a8ff | 6953 | hrtim_eecr1 |= (pEventCfg->FastMode << 24); |
bogdanm | 0:9b334a45a8ff | 6954 | hhrtim->Instance->sCommonRegs.EECR1 = hrtim_eecr1; |
bogdanm | 0:9b334a45a8ff | 6955 | } |
bogdanm | 0:9b334a45a8ff | 6956 | break; |
bogdanm | 0:9b334a45a8ff | 6957 | case HRTIM_EVENT_6: |
bogdanm | 0:9b334a45a8ff | 6958 | { |
bogdanm | 0:9b334a45a8ff | 6959 | hrtim_eecr2 &= ~(HRTIM_EECR2_EE6SRC | HRTIM_EECR2_EE6POL | HRTIM_EECR2_EE6SNS); |
bogdanm | 0:9b334a45a8ff | 6960 | hrtim_eecr2 |= pEventCfg->Source; |
bogdanm | 0:9b334a45a8ff | 6961 | hrtim_eecr2 |= (pEventCfg->Polarity & HRTIM_EECR2_EE6POL); |
bogdanm | 0:9b334a45a8ff | 6962 | hrtim_eecr2 |= pEventCfg->Sensitivity; |
bogdanm | 0:9b334a45a8ff | 6963 | hrtim_eecr3 &= ~(HRTIM_EECR3_EE6F); |
bogdanm | 0:9b334a45a8ff | 6964 | hrtim_eecr3 |= pEventCfg->Filter; |
bogdanm | 0:9b334a45a8ff | 6965 | /* Update the HRTIM registers */ |
bogdanm | 0:9b334a45a8ff | 6966 | hhrtim->Instance->sCommonRegs.EECR2 = hrtim_eecr2; |
bogdanm | 0:9b334a45a8ff | 6967 | hhrtim->Instance->sCommonRegs.EECR3 = hrtim_eecr3; |
bogdanm | 0:9b334a45a8ff | 6968 | } |
bogdanm | 0:9b334a45a8ff | 6969 | break; |
bogdanm | 0:9b334a45a8ff | 6970 | case HRTIM_EVENT_7: |
bogdanm | 0:9b334a45a8ff | 6971 | { |
bogdanm | 0:9b334a45a8ff | 6972 | hrtim_eecr2 &= ~(HRTIM_EECR2_EE7SRC | HRTIM_EECR2_EE7POL | HRTIM_EECR2_EE7SNS); |
bogdanm | 0:9b334a45a8ff | 6973 | hrtim_eecr2 |= (pEventCfg->Source << 6); |
bogdanm | 0:9b334a45a8ff | 6974 | hrtim_eecr2 |= ((pEventCfg->Polarity << 6) & (HRTIM_EECR2_EE7POL)); |
bogdanm | 0:9b334a45a8ff | 6975 | hrtim_eecr2 |= (pEventCfg->Sensitivity << 6); |
bogdanm | 0:9b334a45a8ff | 6976 | hrtim_eecr3 &= ~(HRTIM_EECR3_EE7F); |
bogdanm | 0:9b334a45a8ff | 6977 | hrtim_eecr3 |= (pEventCfg->Filter << 6); |
bogdanm | 0:9b334a45a8ff | 6978 | /* Update the HRTIM registers */ |
bogdanm | 0:9b334a45a8ff | 6979 | hhrtim->Instance->sCommonRegs.EECR2 = hrtim_eecr2; |
bogdanm | 0:9b334a45a8ff | 6980 | hhrtim->Instance->sCommonRegs.EECR3 = hrtim_eecr3; |
bogdanm | 0:9b334a45a8ff | 6981 | } |
bogdanm | 0:9b334a45a8ff | 6982 | break; |
bogdanm | 0:9b334a45a8ff | 6983 | case HRTIM_EVENT_8: |
bogdanm | 0:9b334a45a8ff | 6984 | { |
bogdanm | 0:9b334a45a8ff | 6985 | hrtim_eecr2 &= ~(HRTIM_EECR2_EE8SRC | HRTIM_EECR2_EE8POL | HRTIM_EECR2_EE8SNS); |
bogdanm | 0:9b334a45a8ff | 6986 | hrtim_eecr2 |= (pEventCfg->Source << 12); |
bogdanm | 0:9b334a45a8ff | 6987 | hrtim_eecr2 |= ((pEventCfg->Polarity << 12) & (HRTIM_EECR2_EE8POL)); |
bogdanm | 0:9b334a45a8ff | 6988 | hrtim_eecr2 |= (pEventCfg->Sensitivity << 12); |
bogdanm | 0:9b334a45a8ff | 6989 | hrtim_eecr3 &= ~(HRTIM_EECR3_EE8F); |
bogdanm | 0:9b334a45a8ff | 6990 | hrtim_eecr3 |= (pEventCfg->Filter << 12); |
bogdanm | 0:9b334a45a8ff | 6991 | /* Update the HRTIM registers */ |
bogdanm | 0:9b334a45a8ff | 6992 | hhrtim->Instance->sCommonRegs.EECR2 = hrtim_eecr2; |
bogdanm | 0:9b334a45a8ff | 6993 | hhrtim->Instance->sCommonRegs.EECR3 = hrtim_eecr3; |
bogdanm | 0:9b334a45a8ff | 6994 | } |
bogdanm | 0:9b334a45a8ff | 6995 | break; |
bogdanm | 0:9b334a45a8ff | 6996 | case HRTIM_EVENT_9: |
bogdanm | 0:9b334a45a8ff | 6997 | { |
bogdanm | 0:9b334a45a8ff | 6998 | hrtim_eecr2 &= ~(HRTIM_EECR2_EE9SRC | HRTIM_EECR2_EE9POL | HRTIM_EECR2_EE9SNS); |
bogdanm | 0:9b334a45a8ff | 6999 | hrtim_eecr2 |= (pEventCfg->Source << 18); |
bogdanm | 0:9b334a45a8ff | 7000 | hrtim_eecr2 |= ((pEventCfg->Polarity << 18) & (HRTIM_EECR2_EE9POL)); |
bogdanm | 0:9b334a45a8ff | 7001 | hrtim_eecr2 |= (pEventCfg->Sensitivity << 18); |
bogdanm | 0:9b334a45a8ff | 7002 | hrtim_eecr3 &= ~(HRTIM_EECR3_EE9F); |
bogdanm | 0:9b334a45a8ff | 7003 | hrtim_eecr3 |= (pEventCfg->Filter << 18); |
bogdanm | 0:9b334a45a8ff | 7004 | /* Update the HRTIM registers */ |
bogdanm | 0:9b334a45a8ff | 7005 | hhrtim->Instance->sCommonRegs.EECR2 = hrtim_eecr2; |
bogdanm | 0:9b334a45a8ff | 7006 | hhrtim->Instance->sCommonRegs.EECR3 = hrtim_eecr3; |
bogdanm | 0:9b334a45a8ff | 7007 | } |
bogdanm | 0:9b334a45a8ff | 7008 | break; |
bogdanm | 0:9b334a45a8ff | 7009 | case HRTIM_EVENT_10: |
bogdanm | 0:9b334a45a8ff | 7010 | { |
bogdanm | 0:9b334a45a8ff | 7011 | hrtim_eecr2 &= ~(HRTIM_EECR2_EE10SRC | HRTIM_EECR2_EE10POL | HRTIM_EECR2_EE10SNS); |
bogdanm | 0:9b334a45a8ff | 7012 | hrtim_eecr2 |= (pEventCfg->Source << 24); |
bogdanm | 0:9b334a45a8ff | 7013 | hrtim_eecr2 |= ((pEventCfg->Polarity << 24) & (HRTIM_EECR2_EE10POL)); |
bogdanm | 0:9b334a45a8ff | 7014 | hrtim_eecr2 |= (pEventCfg->Sensitivity << 24); |
bogdanm | 0:9b334a45a8ff | 7015 | hrtim_eecr3 &= ~(HRTIM_EECR3_EE10F); |
bogdanm | 0:9b334a45a8ff | 7016 | hrtim_eecr3 |= (pEventCfg->Filter << 24); |
bogdanm | 0:9b334a45a8ff | 7017 | /* Update the HRTIM registers */ |
bogdanm | 0:9b334a45a8ff | 7018 | hhrtim->Instance->sCommonRegs.EECR2 = hrtim_eecr2; |
bogdanm | 0:9b334a45a8ff | 7019 | hhrtim->Instance->sCommonRegs.EECR3 = hrtim_eecr3; |
bogdanm | 0:9b334a45a8ff | 7020 | } |
bogdanm | 0:9b334a45a8ff | 7021 | break; |
bogdanm | 0:9b334a45a8ff | 7022 | default: |
bogdanm | 0:9b334a45a8ff | 7023 | break; |
bogdanm | 0:9b334a45a8ff | 7024 | } |
bogdanm | 0:9b334a45a8ff | 7025 | } |
bogdanm | 0:9b334a45a8ff | 7026 | |
bogdanm | 0:9b334a45a8ff | 7027 | /** |
bogdanm | 0:9b334a45a8ff | 7028 | * @brief Configures the timer counter reset |
bogdanm | 0:9b334a45a8ff | 7029 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 7030 | * @param TimerIdx: Timer index |
bogdanm | 0:9b334a45a8ff | 7031 | * @param Event: Event channel identifier |
bogdanm | 0:9b334a45a8ff | 7032 | * @retval None |
bogdanm | 0:9b334a45a8ff | 7033 | */ |
bogdanm | 0:9b334a45a8ff | 7034 | static void HRTIM_TIM_ResetConfig(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 7035 | uint32_t TimerIdx, |
bogdanm | 0:9b334a45a8ff | 7036 | uint32_t Event) |
bogdanm | 0:9b334a45a8ff | 7037 | { |
bogdanm | 0:9b334a45a8ff | 7038 | switch (Event) |
bogdanm | 0:9b334a45a8ff | 7039 | { |
bogdanm | 0:9b334a45a8ff | 7040 | case HRTIM_EVENT_1: |
bogdanm | 0:9b334a45a8ff | 7041 | { |
bogdanm | 0:9b334a45a8ff | 7042 | hhrtim->Instance->sTimerxRegs[TimerIdx].RSTxR = HRTIM_TIMRESETTRIGGER_EEV_1; |
bogdanm | 0:9b334a45a8ff | 7043 | } |
bogdanm | 0:9b334a45a8ff | 7044 | break; |
bogdanm | 0:9b334a45a8ff | 7045 | case HRTIM_EVENT_2: |
bogdanm | 0:9b334a45a8ff | 7046 | { |
bogdanm | 0:9b334a45a8ff | 7047 | hhrtim->Instance->sTimerxRegs[TimerIdx].RSTxR = HRTIM_TIMRESETTRIGGER_EEV_2; |
bogdanm | 0:9b334a45a8ff | 7048 | } |
bogdanm | 0:9b334a45a8ff | 7049 | break; |
bogdanm | 0:9b334a45a8ff | 7050 | case HRTIM_EVENT_3: |
bogdanm | 0:9b334a45a8ff | 7051 | { |
bogdanm | 0:9b334a45a8ff | 7052 | hhrtim->Instance->sTimerxRegs[TimerIdx].RSTxR = HRTIM_TIMRESETTRIGGER_EEV_3; |
bogdanm | 0:9b334a45a8ff | 7053 | } |
bogdanm | 0:9b334a45a8ff | 7054 | break; |
bogdanm | 0:9b334a45a8ff | 7055 | case HRTIM_EVENT_4: |
bogdanm | 0:9b334a45a8ff | 7056 | { |
bogdanm | 0:9b334a45a8ff | 7057 | hhrtim->Instance->sTimerxRegs[TimerIdx].RSTxR = HRTIM_TIMRESETTRIGGER_EEV_4; |
bogdanm | 0:9b334a45a8ff | 7058 | } |
bogdanm | 0:9b334a45a8ff | 7059 | break; |
bogdanm | 0:9b334a45a8ff | 7060 | case HRTIM_EVENT_5: |
bogdanm | 0:9b334a45a8ff | 7061 | { |
bogdanm | 0:9b334a45a8ff | 7062 | hhrtim->Instance->sTimerxRegs[TimerIdx].RSTxR = HRTIM_TIMRESETTRIGGER_EEV_5; |
bogdanm | 0:9b334a45a8ff | 7063 | } |
bogdanm | 0:9b334a45a8ff | 7064 | break; |
bogdanm | 0:9b334a45a8ff | 7065 | case HRTIM_EVENT_6: |
bogdanm | 0:9b334a45a8ff | 7066 | { |
bogdanm | 0:9b334a45a8ff | 7067 | hhrtim->Instance->sTimerxRegs[TimerIdx].RSTxR = HRTIM_TIMRESETTRIGGER_EEV_6; |
bogdanm | 0:9b334a45a8ff | 7068 | } |
bogdanm | 0:9b334a45a8ff | 7069 | break; |
bogdanm | 0:9b334a45a8ff | 7070 | case HRTIM_EVENT_7: |
bogdanm | 0:9b334a45a8ff | 7071 | { |
bogdanm | 0:9b334a45a8ff | 7072 | hhrtim->Instance->sTimerxRegs[TimerIdx].RSTxR = HRTIM_TIMRESETTRIGGER_EEV_7; |
bogdanm | 0:9b334a45a8ff | 7073 | } |
bogdanm | 0:9b334a45a8ff | 7074 | break; |
bogdanm | 0:9b334a45a8ff | 7075 | case HRTIM_EVENT_8: |
bogdanm | 0:9b334a45a8ff | 7076 | { |
bogdanm | 0:9b334a45a8ff | 7077 | hhrtim->Instance->sTimerxRegs[TimerIdx].RSTxR = HRTIM_TIMRESETTRIGGER_EEV_8; |
bogdanm | 0:9b334a45a8ff | 7078 | } |
bogdanm | 0:9b334a45a8ff | 7079 | break; |
bogdanm | 0:9b334a45a8ff | 7080 | case HRTIM_EVENT_9: |
bogdanm | 0:9b334a45a8ff | 7081 | { |
bogdanm | 0:9b334a45a8ff | 7082 | hhrtim->Instance->sTimerxRegs[TimerIdx].RSTxR = HRTIM_TIMRESETTRIGGER_EEV_9; |
bogdanm | 0:9b334a45a8ff | 7083 | } |
bogdanm | 0:9b334a45a8ff | 7084 | break; |
bogdanm | 0:9b334a45a8ff | 7085 | case HRTIM_EVENT_10: |
bogdanm | 0:9b334a45a8ff | 7086 | { |
bogdanm | 0:9b334a45a8ff | 7087 | hhrtim->Instance->sTimerxRegs[TimerIdx].RSTxR = HRTIM_TIMRESETTRIGGER_EEV_10; |
bogdanm | 0:9b334a45a8ff | 7088 | } |
bogdanm | 0:9b334a45a8ff | 7089 | break; |
bogdanm | 0:9b334a45a8ff | 7090 | } |
bogdanm | 0:9b334a45a8ff | 7091 | } |
bogdanm | 0:9b334a45a8ff | 7092 | |
bogdanm | 0:9b334a45a8ff | 7093 | /** |
bogdanm | 0:9b334a45a8ff | 7094 | * @brief Returns the interrupt to enable or disable according to the |
bogdanm | 0:9b334a45a8ff | 7095 | * OC mode. |
bogdanm | 0:9b334a45a8ff | 7096 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 7097 | * @param TimerIdx: Timer index |
bogdanm | 0:9b334a45a8ff | 7098 | * @param OCChannel: Timer output |
bogdanm | 0:9b334a45a8ff | 7099 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 7100 | * @arg HRTIM_OUTPUT_TA1: Timer A - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 7101 | * @arg HRTIM_OUTPUT_TA2: Timer A - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 7102 | * @arg HRTIM_OUTPUT_TB1: Timer B - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 7103 | * @arg HRTIM_OUTPUT_TB2: Timer B - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 7104 | * @arg HRTIM_OUTPUT_TC1: Timer C - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 7105 | * @arg HRTIM_OUTPUT_TC2: Timer C - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 7106 | * @arg HRTIM_OUTPUT_TD1: Timer D - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 7107 | * @arg HRTIM_OUTPUT_TD2: Timer D - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 7108 | * @arg HRTIM_OUTPUT_TE1: Timer E - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 7109 | * @arg HRTIM_OUTPUT_TE2: Timer E - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 7110 | * @retval Interrupt to enable or disable |
bogdanm | 0:9b334a45a8ff | 7111 | */ |
bogdanm | 0:9b334a45a8ff | 7112 | static uint32_t HRTIM_GetITFromOCMode(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 7113 | uint32_t TimerIdx, |
bogdanm | 0:9b334a45a8ff | 7114 | uint32_t OCChannel) |
bogdanm | 0:9b334a45a8ff | 7115 | { |
bogdanm | 0:9b334a45a8ff | 7116 | uint32_t hrtim_set; |
bogdanm | 0:9b334a45a8ff | 7117 | uint32_t hrtim_reset; |
bogdanm | 0:9b334a45a8ff | 7118 | uint32_t interrupt = 0; |
bogdanm | 0:9b334a45a8ff | 7119 | |
bogdanm | 0:9b334a45a8ff | 7120 | switch (OCChannel) |
bogdanm | 0:9b334a45a8ff | 7121 | { |
bogdanm | 0:9b334a45a8ff | 7122 | case HRTIM_OUTPUT_TA1: |
bogdanm | 0:9b334a45a8ff | 7123 | case HRTIM_OUTPUT_TB1: |
bogdanm | 0:9b334a45a8ff | 7124 | case HRTIM_OUTPUT_TC1: |
bogdanm | 0:9b334a45a8ff | 7125 | case HRTIM_OUTPUT_TD1: |
bogdanm | 0:9b334a45a8ff | 7126 | case HRTIM_OUTPUT_TE1: |
bogdanm | 0:9b334a45a8ff | 7127 | { |
bogdanm | 0:9b334a45a8ff | 7128 | /* Retreives actual OC mode and set interrupt accordingly */ |
bogdanm | 0:9b334a45a8ff | 7129 | hrtim_set = hhrtim->Instance->sTimerxRegs[TimerIdx].SETx1R; |
bogdanm | 0:9b334a45a8ff | 7130 | hrtim_reset = hhrtim->Instance->sTimerxRegs[TimerIdx].RSTx1R; |
bogdanm | 0:9b334a45a8ff | 7131 | |
bogdanm | 0:9b334a45a8ff | 7132 | if (((hrtim_set & HRTIM_OUTPUTSET_TIMCMP1) == HRTIM_OUTPUTSET_TIMCMP1) && |
bogdanm | 0:9b334a45a8ff | 7133 | ((hrtim_reset & HRTIM_OUTPUTSET_TIMCMP1) == HRTIM_OUTPUTSET_TIMCMP1)) |
bogdanm | 0:9b334a45a8ff | 7134 | { |
bogdanm | 0:9b334a45a8ff | 7135 | /* OC mode: HRTIM_BASICOCMODE_TOGGLE */ |
bogdanm | 0:9b334a45a8ff | 7136 | interrupt = HRTIM_TIM_IT_CMP1; |
bogdanm | 0:9b334a45a8ff | 7137 | } |
bogdanm | 0:9b334a45a8ff | 7138 | else if (((hrtim_set & HRTIM_OUTPUTSET_TIMCMP1) == HRTIM_OUTPUTSET_TIMCMP1) && |
bogdanm | 0:9b334a45a8ff | 7139 | (hrtim_reset == 0)) |
bogdanm | 0:9b334a45a8ff | 7140 | { |
bogdanm | 0:9b334a45a8ff | 7141 | /* OC mode: HRTIM_BASICOCMODE_ACTIVE */ |
bogdanm | 0:9b334a45a8ff | 7142 | interrupt = HRTIM_TIM_IT_SET1; |
bogdanm | 0:9b334a45a8ff | 7143 | } |
bogdanm | 0:9b334a45a8ff | 7144 | else if ((hrtim_set == 0) && |
bogdanm | 0:9b334a45a8ff | 7145 | ((hrtim_reset & HRTIM_OUTPUTSET_TIMCMP1) == HRTIM_OUTPUTSET_TIMCMP1)) |
bogdanm | 0:9b334a45a8ff | 7146 | { |
bogdanm | 0:9b334a45a8ff | 7147 | /* OC mode: HRTIM_BASICOCMODE_INACTIVE */ |
bogdanm | 0:9b334a45a8ff | 7148 | interrupt = HRTIM_TIM_IT_RST1; |
bogdanm | 0:9b334a45a8ff | 7149 | } |
bogdanm | 0:9b334a45a8ff | 7150 | } |
bogdanm | 0:9b334a45a8ff | 7151 | break; |
bogdanm | 0:9b334a45a8ff | 7152 | case HRTIM_OUTPUT_TA2: |
bogdanm | 0:9b334a45a8ff | 7153 | case HRTIM_OUTPUT_TB2: |
bogdanm | 0:9b334a45a8ff | 7154 | case HRTIM_OUTPUT_TC2: |
bogdanm | 0:9b334a45a8ff | 7155 | case HRTIM_OUTPUT_TD2: |
bogdanm | 0:9b334a45a8ff | 7156 | case HRTIM_OUTPUT_TE2: |
bogdanm | 0:9b334a45a8ff | 7157 | { |
bogdanm | 0:9b334a45a8ff | 7158 | /* Retreives actual OC mode and set interrupt accordingly */ |
bogdanm | 0:9b334a45a8ff | 7159 | hrtim_set = hhrtim->Instance->sTimerxRegs[TimerIdx].SETx2R; |
bogdanm | 0:9b334a45a8ff | 7160 | hrtim_reset = hhrtim->Instance->sTimerxRegs[TimerIdx].RSTx2R; |
bogdanm | 0:9b334a45a8ff | 7161 | |
bogdanm | 0:9b334a45a8ff | 7162 | if (((hrtim_set & HRTIM_OUTPUTSET_TIMCMP2) == HRTIM_OUTPUTSET_TIMCMP2) && |
bogdanm | 0:9b334a45a8ff | 7163 | ((hrtim_reset & HRTIM_OUTPUTSET_TIMCMP2) == HRTIM_OUTPUTSET_TIMCMP2)) |
bogdanm | 0:9b334a45a8ff | 7164 | { |
bogdanm | 0:9b334a45a8ff | 7165 | /* OC mode: HRTIM_BASICOCMODE_TOGGLE */ |
bogdanm | 0:9b334a45a8ff | 7166 | interrupt = HRTIM_TIM_IT_CMP2; |
bogdanm | 0:9b334a45a8ff | 7167 | } |
bogdanm | 0:9b334a45a8ff | 7168 | else if (((hrtim_set & HRTIM_OUTPUTSET_TIMCMP2) == HRTIM_OUTPUTSET_TIMCMP2) && |
bogdanm | 0:9b334a45a8ff | 7169 | (hrtim_reset == 0)) |
bogdanm | 0:9b334a45a8ff | 7170 | { |
bogdanm | 0:9b334a45a8ff | 7171 | /* OC mode: HRTIM_BASICOCMODE_ACTIVE */ |
bogdanm | 0:9b334a45a8ff | 7172 | interrupt = HRTIM_TIM_IT_SET2; |
bogdanm | 0:9b334a45a8ff | 7173 | } |
bogdanm | 0:9b334a45a8ff | 7174 | else if ((hrtim_set == 0) && |
bogdanm | 0:9b334a45a8ff | 7175 | ((hrtim_reset & HRTIM_OUTPUTSET_TIMCMP2) == HRTIM_OUTPUTSET_TIMCMP2)) |
bogdanm | 0:9b334a45a8ff | 7176 | { |
bogdanm | 0:9b334a45a8ff | 7177 | /* OC mode: HRTIM_BASICOCMODE_INACTIVE */ |
bogdanm | 0:9b334a45a8ff | 7178 | interrupt = HRTIM_TIM_IT_RST2; |
bogdanm | 0:9b334a45a8ff | 7179 | } |
bogdanm | 0:9b334a45a8ff | 7180 | } |
bogdanm | 0:9b334a45a8ff | 7181 | break; |
bogdanm | 0:9b334a45a8ff | 7182 | } |
bogdanm | 0:9b334a45a8ff | 7183 | |
bogdanm | 0:9b334a45a8ff | 7184 | return interrupt; |
bogdanm | 0:9b334a45a8ff | 7185 | } |
bogdanm | 0:9b334a45a8ff | 7186 | |
bogdanm | 0:9b334a45a8ff | 7187 | /** |
bogdanm | 0:9b334a45a8ff | 7188 | * @brief Returns the DMA request to enable or disable according to the |
bogdanm | 0:9b334a45a8ff | 7189 | * OC mode. |
bogdanm | 0:9b334a45a8ff | 7190 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 7191 | * @param TimerIdx: Timer index |
bogdanm | 0:9b334a45a8ff | 7192 | * @param OCChannel: Timer output |
bogdanm | 0:9b334a45a8ff | 7193 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 7194 | * @arg HRTIM_OUTPUT_TA1: Timer A - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 7195 | * @arg HRTIM_OUTPUT_TA2: Timer A - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 7196 | * @arg HRTIM_OUTPUT_TB1: Timer B - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 7197 | * @arg HRTIM_OUTPUT_TB2: Timer B - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 7198 | * @arg HRTIM_OUTPUT_TC1: Timer C - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 7199 | * @arg HRTIM_OUTPUT_TC2: Timer C - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 7200 | * @arg HRTIM_OUTPUT_TD1: Timer D - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 7201 | * @arg HRTIM_OUTPUT_TD2: Timer D - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 7202 | * @arg HRTIM_OUTPUT_TE1: Timer E - Ouput 1 |
bogdanm | 0:9b334a45a8ff | 7203 | * @arg HRTIM_OUTPUT_TE2: Timer E - Ouput 2 |
bogdanm | 0:9b334a45a8ff | 7204 | * @retval DMA request to enable or disable |
bogdanm | 0:9b334a45a8ff | 7205 | */ |
bogdanm | 0:9b334a45a8ff | 7206 | static uint32_t HRTIM_GetDMAFromOCMode(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 7207 | uint32_t TimerIdx, |
bogdanm | 0:9b334a45a8ff | 7208 | uint32_t OCChannel) |
bogdanm | 0:9b334a45a8ff | 7209 | { |
bogdanm | 0:9b334a45a8ff | 7210 | uint32_t hrtim_set; |
bogdanm | 0:9b334a45a8ff | 7211 | uint32_t hrtim_reset; |
bogdanm | 0:9b334a45a8ff | 7212 | uint32_t dma_request = 0; |
bogdanm | 0:9b334a45a8ff | 7213 | |
bogdanm | 0:9b334a45a8ff | 7214 | switch (OCChannel) |
bogdanm | 0:9b334a45a8ff | 7215 | { |
bogdanm | 0:9b334a45a8ff | 7216 | case HRTIM_OUTPUT_TA1: |
bogdanm | 0:9b334a45a8ff | 7217 | case HRTIM_OUTPUT_TB1: |
bogdanm | 0:9b334a45a8ff | 7218 | case HRTIM_OUTPUT_TC1: |
bogdanm | 0:9b334a45a8ff | 7219 | case HRTIM_OUTPUT_TD1: |
bogdanm | 0:9b334a45a8ff | 7220 | case HRTIM_OUTPUT_TE1: |
bogdanm | 0:9b334a45a8ff | 7221 | { |
bogdanm | 0:9b334a45a8ff | 7222 | /* Retreives actual OC mode and set dma_request accordingly */ |
bogdanm | 0:9b334a45a8ff | 7223 | hrtim_set = hhrtim->Instance->sTimerxRegs[TimerIdx].SETx1R; |
bogdanm | 0:9b334a45a8ff | 7224 | hrtim_reset = hhrtim->Instance->sTimerxRegs[TimerIdx].RSTx1R; |
bogdanm | 0:9b334a45a8ff | 7225 | |
bogdanm | 0:9b334a45a8ff | 7226 | if (((hrtim_set & HRTIM_OUTPUTSET_TIMCMP1) == HRTIM_OUTPUTSET_TIMCMP1) && |
bogdanm | 0:9b334a45a8ff | 7227 | ((hrtim_reset & HRTIM_OUTPUTSET_TIMCMP1) == HRTIM_OUTPUTSET_TIMCMP1)) |
bogdanm | 0:9b334a45a8ff | 7228 | { |
bogdanm | 0:9b334a45a8ff | 7229 | /* OC mode: HRTIM_BASICOCMODE_TOGGLE */ |
bogdanm | 0:9b334a45a8ff | 7230 | dma_request = HRTIM_TIM_DMA_CMP1; |
bogdanm | 0:9b334a45a8ff | 7231 | } |
bogdanm | 0:9b334a45a8ff | 7232 | else if (((hrtim_set & HRTIM_OUTPUTSET_TIMCMP1) == HRTIM_OUTPUTSET_TIMCMP1) && |
bogdanm | 0:9b334a45a8ff | 7233 | (hrtim_reset == 0)) |
bogdanm | 0:9b334a45a8ff | 7234 | { |
bogdanm | 0:9b334a45a8ff | 7235 | /* OC mode: HRTIM_BASICOCMODE_ACTIVE */ |
bogdanm | 0:9b334a45a8ff | 7236 | dma_request = HRTIM_TIM_DMA_SET1; |
bogdanm | 0:9b334a45a8ff | 7237 | } |
bogdanm | 0:9b334a45a8ff | 7238 | else if ((hrtim_set == 0) && |
bogdanm | 0:9b334a45a8ff | 7239 | ((hrtim_reset & HRTIM_OUTPUTSET_TIMCMP1) == HRTIM_OUTPUTSET_TIMCMP1)) |
bogdanm | 0:9b334a45a8ff | 7240 | { |
bogdanm | 0:9b334a45a8ff | 7241 | /* OC mode: HRTIM_BASICOCMODE_INACTIVE */ |
bogdanm | 0:9b334a45a8ff | 7242 | dma_request = HRTIM_TIM_DMA_RST1; |
bogdanm | 0:9b334a45a8ff | 7243 | } |
bogdanm | 0:9b334a45a8ff | 7244 | } |
bogdanm | 0:9b334a45a8ff | 7245 | break; |
bogdanm | 0:9b334a45a8ff | 7246 | case HRTIM_OUTPUT_TA2: |
bogdanm | 0:9b334a45a8ff | 7247 | case HRTIM_OUTPUT_TB2: |
bogdanm | 0:9b334a45a8ff | 7248 | case HRTIM_OUTPUT_TC2: |
bogdanm | 0:9b334a45a8ff | 7249 | case HRTIM_OUTPUT_TD2: |
bogdanm | 0:9b334a45a8ff | 7250 | case HRTIM_OUTPUT_TE2: |
bogdanm | 0:9b334a45a8ff | 7251 | { |
bogdanm | 0:9b334a45a8ff | 7252 | /* Retreives actual OC mode and set dma_request accordingly */ |
bogdanm | 0:9b334a45a8ff | 7253 | hrtim_set = hhrtim->Instance->sTimerxRegs[TimerIdx].SETx2R; |
bogdanm | 0:9b334a45a8ff | 7254 | hrtim_reset = hhrtim->Instance->sTimerxRegs[TimerIdx].RSTx2R; |
bogdanm | 0:9b334a45a8ff | 7255 | |
bogdanm | 0:9b334a45a8ff | 7256 | if (((hrtim_set & HRTIM_OUTPUTSET_TIMCMP2) == HRTIM_OUTPUTSET_TIMCMP2) && |
bogdanm | 0:9b334a45a8ff | 7257 | ((hrtim_reset & HRTIM_OUTPUTSET_TIMCMP2) == HRTIM_OUTPUTSET_TIMCMP2)) |
bogdanm | 0:9b334a45a8ff | 7258 | { |
bogdanm | 0:9b334a45a8ff | 7259 | /* OC mode: HRTIM_BASICOCMODE_TOGGLE */ |
bogdanm | 0:9b334a45a8ff | 7260 | dma_request = HRTIM_TIM_DMA_CMP2; |
bogdanm | 0:9b334a45a8ff | 7261 | } |
bogdanm | 0:9b334a45a8ff | 7262 | else if (((hrtim_set & HRTIM_OUTPUTSET_TIMCMP2) == HRTIM_OUTPUTSET_TIMCMP2) && |
bogdanm | 0:9b334a45a8ff | 7263 | (hrtim_reset == 0)) |
bogdanm | 0:9b334a45a8ff | 7264 | { |
bogdanm | 0:9b334a45a8ff | 7265 | /* OC mode: HRTIM_BASICOCMODE_ACTIVE */ |
bogdanm | 0:9b334a45a8ff | 7266 | dma_request = HRTIM_TIM_DMA_SET2; |
bogdanm | 0:9b334a45a8ff | 7267 | } |
bogdanm | 0:9b334a45a8ff | 7268 | else if ((hrtim_set == 0) && |
bogdanm | 0:9b334a45a8ff | 7269 | ((hrtim_reset & HRTIM_OUTPUTSET_TIMCMP2) == HRTIM_OUTPUTSET_TIMCMP2)) |
bogdanm | 0:9b334a45a8ff | 7270 | { |
bogdanm | 0:9b334a45a8ff | 7271 | /* OC mode: HRTIM_BASICOCMODE_INACTIVE */ |
bogdanm | 0:9b334a45a8ff | 7272 | dma_request = HRTIM_TIM_DMA_RST2; |
bogdanm | 0:9b334a45a8ff | 7273 | } |
bogdanm | 0:9b334a45a8ff | 7274 | } |
bogdanm | 0:9b334a45a8ff | 7275 | break; |
bogdanm | 0:9b334a45a8ff | 7276 | } |
bogdanm | 0:9b334a45a8ff | 7277 | |
bogdanm | 0:9b334a45a8ff | 7278 | return dma_request; |
bogdanm | 0:9b334a45a8ff | 7279 | } |
bogdanm | 0:9b334a45a8ff | 7280 | |
bogdanm | 0:9b334a45a8ff | 7281 | static DMA_HandleTypeDef * HRTIM_GetDMAHandleFromTimerIdx(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 7282 | uint32_t TimerIdx) |
bogdanm | 0:9b334a45a8ff | 7283 | { |
bogdanm | 0:9b334a45a8ff | 7284 | DMA_HandleTypeDef * hdma = (DMA_HandleTypeDef *)HAL_NULL; |
bogdanm | 0:9b334a45a8ff | 7285 | |
bogdanm | 0:9b334a45a8ff | 7286 | switch (TimerIdx) |
bogdanm | 0:9b334a45a8ff | 7287 | { |
bogdanm | 0:9b334a45a8ff | 7288 | case HRTIM_TIMERINDEX_MASTER: |
bogdanm | 0:9b334a45a8ff | 7289 | { |
bogdanm | 0:9b334a45a8ff | 7290 | hdma = hhrtim->hdmaMaster; |
bogdanm | 0:9b334a45a8ff | 7291 | } |
bogdanm | 0:9b334a45a8ff | 7292 | break; |
bogdanm | 0:9b334a45a8ff | 7293 | case HRTIM_TIMERINDEX_TIMER_A: |
bogdanm | 0:9b334a45a8ff | 7294 | { |
bogdanm | 0:9b334a45a8ff | 7295 | hdma = hhrtim->hdmaTimerA; |
bogdanm | 0:9b334a45a8ff | 7296 | } |
bogdanm | 0:9b334a45a8ff | 7297 | break; |
bogdanm | 0:9b334a45a8ff | 7298 | case HRTIM_TIMERINDEX_TIMER_B: |
bogdanm | 0:9b334a45a8ff | 7299 | { |
bogdanm | 0:9b334a45a8ff | 7300 | hdma = hhrtim->hdmaTimerB; |
bogdanm | 0:9b334a45a8ff | 7301 | } |
bogdanm | 0:9b334a45a8ff | 7302 | break; |
bogdanm | 0:9b334a45a8ff | 7303 | case HRTIM_TIMERINDEX_TIMER_C: |
bogdanm | 0:9b334a45a8ff | 7304 | { |
bogdanm | 0:9b334a45a8ff | 7305 | hdma = hhrtim->hdmaTimerC; |
bogdanm | 0:9b334a45a8ff | 7306 | } |
bogdanm | 0:9b334a45a8ff | 7307 | break; |
bogdanm | 0:9b334a45a8ff | 7308 | case HRTIM_TIMERINDEX_TIMER_D: |
bogdanm | 0:9b334a45a8ff | 7309 | { |
bogdanm | 0:9b334a45a8ff | 7310 | hdma = hhrtim->hdmaTimerD; |
bogdanm | 0:9b334a45a8ff | 7311 | } |
bogdanm | 0:9b334a45a8ff | 7312 | break; |
bogdanm | 0:9b334a45a8ff | 7313 | case HRTIM_TIMERINDEX_TIMER_E: |
bogdanm | 0:9b334a45a8ff | 7314 | { |
bogdanm | 0:9b334a45a8ff | 7315 | hdma = hhrtim->hdmaTimerE; |
bogdanm | 0:9b334a45a8ff | 7316 | } |
bogdanm | 0:9b334a45a8ff | 7317 | break; |
bogdanm | 0:9b334a45a8ff | 7318 | } |
bogdanm | 0:9b334a45a8ff | 7319 | |
bogdanm | 0:9b334a45a8ff | 7320 | return hdma; |
bogdanm | 0:9b334a45a8ff | 7321 | } |
bogdanm | 0:9b334a45a8ff | 7322 | |
bogdanm | 0:9b334a45a8ff | 7323 | static uint32_t GetTimerIdxFromDMAHandle(DMA_HandleTypeDef *hdma) |
bogdanm | 0:9b334a45a8ff | 7324 | { |
bogdanm | 0:9b334a45a8ff | 7325 | uint32_t timed_idx = 0xFFFFFFFF; |
bogdanm | 0:9b334a45a8ff | 7326 | |
bogdanm | 0:9b334a45a8ff | 7327 | if (hdma->Instance == DMA1_Channel2) |
bogdanm | 0:9b334a45a8ff | 7328 | { |
bogdanm | 0:9b334a45a8ff | 7329 | timed_idx = HRTIM_TIMERINDEX_MASTER; |
bogdanm | 0:9b334a45a8ff | 7330 | } |
bogdanm | 0:9b334a45a8ff | 7331 | else if (hdma->Instance == DMA1_Channel3) |
bogdanm | 0:9b334a45a8ff | 7332 | { |
bogdanm | 0:9b334a45a8ff | 7333 | timed_idx = HRTIM_TIMERINDEX_TIMER_A; |
bogdanm | 0:9b334a45a8ff | 7334 | } |
bogdanm | 0:9b334a45a8ff | 7335 | else if (hdma->Instance == DMA1_Channel4) |
bogdanm | 0:9b334a45a8ff | 7336 | { |
bogdanm | 0:9b334a45a8ff | 7337 | timed_idx = HRTIM_TIMERINDEX_TIMER_B; |
bogdanm | 0:9b334a45a8ff | 7338 | } |
bogdanm | 0:9b334a45a8ff | 7339 | else if (hdma->Instance == DMA1_Channel5) |
bogdanm | 0:9b334a45a8ff | 7340 | { |
bogdanm | 0:9b334a45a8ff | 7341 | timed_idx = HRTIM_TIMERINDEX_TIMER_C; |
bogdanm | 0:9b334a45a8ff | 7342 | } |
bogdanm | 0:9b334a45a8ff | 7343 | else if (hdma->Instance == DMA1_Channel6) |
bogdanm | 0:9b334a45a8ff | 7344 | { |
bogdanm | 0:9b334a45a8ff | 7345 | timed_idx = HRTIM_TIMERINDEX_TIMER_D; |
bogdanm | 0:9b334a45a8ff | 7346 | } |
bogdanm | 0:9b334a45a8ff | 7347 | else if (hdma->Instance == DMA1_Channel7) |
bogdanm | 0:9b334a45a8ff | 7348 | { |
bogdanm | 0:9b334a45a8ff | 7349 | timed_idx = HRTIM_TIMERINDEX_TIMER_E; |
bogdanm | 0:9b334a45a8ff | 7350 | } |
bogdanm | 0:9b334a45a8ff | 7351 | |
bogdanm | 0:9b334a45a8ff | 7352 | return timed_idx; |
bogdanm | 0:9b334a45a8ff | 7353 | } |
bogdanm | 0:9b334a45a8ff | 7354 | |
bogdanm | 0:9b334a45a8ff | 7355 | /** |
bogdanm | 0:9b334a45a8ff | 7356 | * @brief Forces an immediate transfer from the preload to the active |
bogdanm | 0:9b334a45a8ff | 7357 | * registers. |
bogdanm | 0:9b334a45a8ff | 7358 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 7359 | * @param TimerIdx: Timer index |
bogdanm | 0:9b334a45a8ff | 7360 | * @retval None |
bogdanm | 0:9b334a45a8ff | 7361 | */ |
bogdanm | 0:9b334a45a8ff | 7362 | static void HRTIM_ForceRegistersUpdate(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 7363 | uint32_t TimerIdx) |
bogdanm | 0:9b334a45a8ff | 7364 | { |
bogdanm | 0:9b334a45a8ff | 7365 | switch (TimerIdx) |
bogdanm | 0:9b334a45a8ff | 7366 | { |
bogdanm | 0:9b334a45a8ff | 7367 | case HRTIM_TIMERINDEX_MASTER: |
bogdanm | 0:9b334a45a8ff | 7368 | { |
bogdanm | 0:9b334a45a8ff | 7369 | hhrtim->Instance->sCommonRegs.CR2 |= HRTIM_CR2_MSWU; |
bogdanm | 0:9b334a45a8ff | 7370 | } |
bogdanm | 0:9b334a45a8ff | 7371 | break; |
bogdanm | 0:9b334a45a8ff | 7372 | case HRTIM_TIMERINDEX_TIMER_A: |
bogdanm | 0:9b334a45a8ff | 7373 | { |
bogdanm | 0:9b334a45a8ff | 7374 | hhrtim->Instance->sCommonRegs.CR2 |= HRTIM_CR2_TASWU; |
bogdanm | 0:9b334a45a8ff | 7375 | } |
bogdanm | 0:9b334a45a8ff | 7376 | break; |
bogdanm | 0:9b334a45a8ff | 7377 | case HRTIM_TIMERINDEX_TIMER_B: |
bogdanm | 0:9b334a45a8ff | 7378 | { |
bogdanm | 0:9b334a45a8ff | 7379 | hhrtim->Instance->sCommonRegs.CR2 |= HRTIM_CR2_TBSWU; |
bogdanm | 0:9b334a45a8ff | 7380 | } |
bogdanm | 0:9b334a45a8ff | 7381 | break; |
bogdanm | 0:9b334a45a8ff | 7382 | case HRTIM_TIMERINDEX_TIMER_C: |
bogdanm | 0:9b334a45a8ff | 7383 | { |
bogdanm | 0:9b334a45a8ff | 7384 | hhrtim->Instance->sCommonRegs.CR2 |= HRTIM_CR2_TCSWU; |
bogdanm | 0:9b334a45a8ff | 7385 | } |
bogdanm | 0:9b334a45a8ff | 7386 | break; |
bogdanm | 0:9b334a45a8ff | 7387 | case HRTIM_TIMERINDEX_TIMER_D: |
bogdanm | 0:9b334a45a8ff | 7388 | { |
bogdanm | 0:9b334a45a8ff | 7389 | hhrtim->Instance->sCommonRegs.CR2 |= HRTIM_CR2_TDSWU; |
bogdanm | 0:9b334a45a8ff | 7390 | } |
bogdanm | 0:9b334a45a8ff | 7391 | break; |
bogdanm | 0:9b334a45a8ff | 7392 | case HRTIM_TIMERINDEX_TIMER_E: |
bogdanm | 0:9b334a45a8ff | 7393 | { |
bogdanm | 0:9b334a45a8ff | 7394 | hhrtim->Instance->sCommonRegs.CR2 |= HRTIM_CR2_TESWU; |
bogdanm | 0:9b334a45a8ff | 7395 | } |
bogdanm | 0:9b334a45a8ff | 7396 | break; |
bogdanm | 0:9b334a45a8ff | 7397 | } |
bogdanm | 0:9b334a45a8ff | 7398 | } |
bogdanm | 0:9b334a45a8ff | 7399 | |
bogdanm | 0:9b334a45a8ff | 7400 | |
bogdanm | 0:9b334a45a8ff | 7401 | /** |
bogdanm | 0:9b334a45a8ff | 7402 | * @brief HRTIM interrupts service routine |
bogdanm | 0:9b334a45a8ff | 7403 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 7404 | * @retval None |
bogdanm | 0:9b334a45a8ff | 7405 | */ |
bogdanm | 0:9b334a45a8ff | 7406 | static void HRTIM_HRTIM_ISR(HRTIM_HandleTypeDef * hhrtim) |
bogdanm | 0:9b334a45a8ff | 7407 | { |
bogdanm | 0:9b334a45a8ff | 7408 | /* Fault 1 event */ |
bogdanm | 0:9b334a45a8ff | 7409 | if(__HAL_HRTIM_GET_FLAG(hhrtim, HRTIM_FLAG_FLT1) != RESET) |
bogdanm | 0:9b334a45a8ff | 7410 | { |
bogdanm | 0:9b334a45a8ff | 7411 | if(__HAL_HRTIM_GET_ITSTATUS(hhrtim, HRTIM_IT_FLT1) != RESET) |
bogdanm | 0:9b334a45a8ff | 7412 | { |
bogdanm | 0:9b334a45a8ff | 7413 | __HAL_HRTIM_CLEAR_IT(hhrtim, HRTIM_IT_FLT1); |
bogdanm | 0:9b334a45a8ff | 7414 | |
bogdanm | 0:9b334a45a8ff | 7415 | /* Invoke Fault 1 event callback */ |
bogdanm | 0:9b334a45a8ff | 7416 | HAL_HRTIM_Fault1Callback(hhrtim); |
bogdanm | 0:9b334a45a8ff | 7417 | } |
bogdanm | 0:9b334a45a8ff | 7418 | } |
bogdanm | 0:9b334a45a8ff | 7419 | |
bogdanm | 0:9b334a45a8ff | 7420 | /* Fault 2 event */ |
bogdanm | 0:9b334a45a8ff | 7421 | if(__HAL_HRTIM_GET_FLAG(hhrtim, HRTIM_FLAG_FLT2) != RESET) |
bogdanm | 0:9b334a45a8ff | 7422 | { |
bogdanm | 0:9b334a45a8ff | 7423 | if(__HAL_HRTIM_GET_ITSTATUS(hhrtim, HRTIM_IT_FLT2) != RESET) |
bogdanm | 0:9b334a45a8ff | 7424 | { |
bogdanm | 0:9b334a45a8ff | 7425 | __HAL_HRTIM_CLEAR_IT(hhrtim, HRTIM_IT_FLT2); |
bogdanm | 0:9b334a45a8ff | 7426 | |
bogdanm | 0:9b334a45a8ff | 7427 | /* Invoke Fault 2 event callback */ |
bogdanm | 0:9b334a45a8ff | 7428 | HAL_HRTIM_Fault2Callback(hhrtim); |
bogdanm | 0:9b334a45a8ff | 7429 | } |
bogdanm | 0:9b334a45a8ff | 7430 | } |
bogdanm | 0:9b334a45a8ff | 7431 | |
bogdanm | 0:9b334a45a8ff | 7432 | /* Fault 3 event */ |
bogdanm | 0:9b334a45a8ff | 7433 | if(__HAL_HRTIM_GET_FLAG(hhrtim, HRTIM_FLAG_FLT3) != RESET) |
bogdanm | 0:9b334a45a8ff | 7434 | { |
bogdanm | 0:9b334a45a8ff | 7435 | if(__HAL_HRTIM_GET_ITSTATUS(hhrtim, HRTIM_IT_FLT3) != RESET) |
bogdanm | 0:9b334a45a8ff | 7436 | { |
bogdanm | 0:9b334a45a8ff | 7437 | __HAL_HRTIM_CLEAR_IT(hhrtim, HRTIM_IT_FLT3); |
bogdanm | 0:9b334a45a8ff | 7438 | |
bogdanm | 0:9b334a45a8ff | 7439 | /* Invoke Fault 3 event callback */ |
bogdanm | 0:9b334a45a8ff | 7440 | HAL_HRTIM_Fault3Callback(hhrtim); |
bogdanm | 0:9b334a45a8ff | 7441 | } |
bogdanm | 0:9b334a45a8ff | 7442 | } |
bogdanm | 0:9b334a45a8ff | 7443 | |
bogdanm | 0:9b334a45a8ff | 7444 | /* Fault 4 event */ |
bogdanm | 0:9b334a45a8ff | 7445 | if(__HAL_HRTIM_GET_FLAG(hhrtim, HRTIM_FLAG_FLT4) != RESET) |
bogdanm | 0:9b334a45a8ff | 7446 | { |
bogdanm | 0:9b334a45a8ff | 7447 | if(__HAL_HRTIM_GET_ITSTATUS(hhrtim, HRTIM_IT_FLT4) != RESET) |
bogdanm | 0:9b334a45a8ff | 7448 | { |
bogdanm | 0:9b334a45a8ff | 7449 | __HAL_HRTIM_CLEAR_IT(hhrtim, HRTIM_IT_FLT4); |
bogdanm | 0:9b334a45a8ff | 7450 | |
bogdanm | 0:9b334a45a8ff | 7451 | /* Invoke Fault 4 event callback */ |
bogdanm | 0:9b334a45a8ff | 7452 | HAL_HRTIM_Fault4Callback(hhrtim); |
bogdanm | 0:9b334a45a8ff | 7453 | } |
bogdanm | 0:9b334a45a8ff | 7454 | } |
bogdanm | 0:9b334a45a8ff | 7455 | |
bogdanm | 0:9b334a45a8ff | 7456 | /* Fault 5 event */ |
bogdanm | 0:9b334a45a8ff | 7457 | if(__HAL_HRTIM_GET_FLAG(hhrtim, HRTIM_FLAG_FLT5) != RESET) |
bogdanm | 0:9b334a45a8ff | 7458 | { |
bogdanm | 0:9b334a45a8ff | 7459 | if(__HAL_HRTIM_GET_ITSTATUS(hhrtim, HRTIM_IT_FLT5) != RESET) |
bogdanm | 0:9b334a45a8ff | 7460 | { |
bogdanm | 0:9b334a45a8ff | 7461 | __HAL_HRTIM_CLEAR_IT(hhrtim, HRTIM_IT_FLT5); |
bogdanm | 0:9b334a45a8ff | 7462 | |
bogdanm | 0:9b334a45a8ff | 7463 | /* Invoke Fault 5 event callback */ |
bogdanm | 0:9b334a45a8ff | 7464 | HAL_HRTIM_Fault5Callback(hhrtim); |
bogdanm | 0:9b334a45a8ff | 7465 | } |
bogdanm | 0:9b334a45a8ff | 7466 | } |
bogdanm | 0:9b334a45a8ff | 7467 | |
bogdanm | 0:9b334a45a8ff | 7468 | /* System fault event */ |
bogdanm | 0:9b334a45a8ff | 7469 | if(__HAL_HRTIM_GET_FLAG(hhrtim, HRTIM_FLAG_SYSFLT) != RESET) |
bogdanm | 0:9b334a45a8ff | 7470 | { |
bogdanm | 0:9b334a45a8ff | 7471 | if(__HAL_HRTIM_GET_ITSTATUS(hhrtim, HRTIM_IT_SYSFLT) != RESET) |
bogdanm | 0:9b334a45a8ff | 7472 | { |
bogdanm | 0:9b334a45a8ff | 7473 | __HAL_HRTIM_CLEAR_IT(hhrtim, HRTIM_IT_SYSFLT); |
bogdanm | 0:9b334a45a8ff | 7474 | |
bogdanm | 0:9b334a45a8ff | 7475 | /* Invoke System fault event callback */ |
bogdanm | 0:9b334a45a8ff | 7476 | HAL_HRTIM_SystemFaultCallback(hhrtim); |
bogdanm | 0:9b334a45a8ff | 7477 | } |
bogdanm | 0:9b334a45a8ff | 7478 | } |
bogdanm | 0:9b334a45a8ff | 7479 | } |
bogdanm | 0:9b334a45a8ff | 7480 | |
bogdanm | 0:9b334a45a8ff | 7481 | /** |
bogdanm | 0:9b334a45a8ff | 7482 | * @brief Master timer interrupts service routine |
bogdanm | 0:9b334a45a8ff | 7483 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 7484 | * @retval None |
bogdanm | 0:9b334a45a8ff | 7485 | */ |
bogdanm | 0:9b334a45a8ff | 7486 | static void HRTIM_Master_ISR(HRTIM_HandleTypeDef * hhrtim) |
bogdanm | 0:9b334a45a8ff | 7487 | { |
bogdanm | 0:9b334a45a8ff | 7488 | /* DLL calibration ready event */ |
bogdanm | 0:9b334a45a8ff | 7489 | if(__HAL_HRTIM_GET_FLAG(hhrtim, HRTIM_FLAG_DLLRDY) != RESET) |
bogdanm | 0:9b334a45a8ff | 7490 | { |
bogdanm | 0:9b334a45a8ff | 7491 | if(__HAL_HRTIM_GET_ITSTATUS(hhrtim, HRTIM_IT_DLLRDY) != RESET) |
bogdanm | 0:9b334a45a8ff | 7492 | { |
bogdanm | 0:9b334a45a8ff | 7493 | __HAL_HRTIM_CLEAR_IT(hhrtim, HRTIM_IT_DLLRDY); |
bogdanm | 0:9b334a45a8ff | 7494 | |
bogdanm | 0:9b334a45a8ff | 7495 | /* Set HRTIM State */ |
bogdanm | 0:9b334a45a8ff | 7496 | hhrtim->State = HAL_HRTIM_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 7497 | |
bogdanm | 0:9b334a45a8ff | 7498 | /* Process unlocked */ |
bogdanm | 0:9b334a45a8ff | 7499 | __HAL_UNLOCK(hhrtim); |
bogdanm | 0:9b334a45a8ff | 7500 | |
bogdanm | 0:9b334a45a8ff | 7501 | /* Invoke System fault event callback */ |
bogdanm | 0:9b334a45a8ff | 7502 | HAL_HRTIM_DLLCalbrationReadyCallback(hhrtim); |
bogdanm | 0:9b334a45a8ff | 7503 | } |
bogdanm | 0:9b334a45a8ff | 7504 | } |
bogdanm | 0:9b334a45a8ff | 7505 | |
bogdanm | 0:9b334a45a8ff | 7506 | /* Burst mode period event */ |
bogdanm | 0:9b334a45a8ff | 7507 | if(__HAL_HRTIM_GET_FLAG(hhrtim, HRTIM_FLAG_BMPER) != RESET) |
bogdanm | 0:9b334a45a8ff | 7508 | { |
bogdanm | 0:9b334a45a8ff | 7509 | if(__HAL_HRTIM_GET_ITSTATUS(hhrtim, HRTIM_IT_BMPER) != RESET) |
bogdanm | 0:9b334a45a8ff | 7510 | { |
bogdanm | 0:9b334a45a8ff | 7511 | __HAL_HRTIM_CLEAR_IT(hhrtim, HRTIM_IT_BMPER); |
bogdanm | 0:9b334a45a8ff | 7512 | |
bogdanm | 0:9b334a45a8ff | 7513 | /* Invoke Burst mode period event callback */ |
bogdanm | 0:9b334a45a8ff | 7514 | HAL_HRTIM_BurstModePeriodCallback(hhrtim); |
bogdanm | 0:9b334a45a8ff | 7515 | } |
bogdanm | 0:9b334a45a8ff | 7516 | } |
bogdanm | 0:9b334a45a8ff | 7517 | |
bogdanm | 0:9b334a45a8ff | 7518 | /* Master timer compare 1 event */ |
bogdanm | 0:9b334a45a8ff | 7519 | if(__HAL_HRTIM_MASTER_GET_FLAG(hhrtim, HRTIM_MASTER_FLAG_MCMP1) != RESET) |
bogdanm | 0:9b334a45a8ff | 7520 | { |
bogdanm | 0:9b334a45a8ff | 7521 | if(__HAL_HRTIM_MASTER_GET_ITSTATUS(hhrtim, HRTIM_MASTER_IT_MCMP1) != RESET) |
bogdanm | 0:9b334a45a8ff | 7522 | { |
bogdanm | 0:9b334a45a8ff | 7523 | __HAL_HRTIM_MASTER_CLEAR_IT(hhrtim, HRTIM_MASTER_IT_MCMP1); |
bogdanm | 0:9b334a45a8ff | 7524 | |
bogdanm | 0:9b334a45a8ff | 7525 | /* Invoke compare 1 event callback */ |
bogdanm | 0:9b334a45a8ff | 7526 | HAL_HRTIM_Compare1EventCallback(hhrtim, HRTIM_TIMERINDEX_MASTER); |
bogdanm | 0:9b334a45a8ff | 7527 | } |
bogdanm | 0:9b334a45a8ff | 7528 | } |
bogdanm | 0:9b334a45a8ff | 7529 | |
bogdanm | 0:9b334a45a8ff | 7530 | /* Master timer compare 2 event */ |
bogdanm | 0:9b334a45a8ff | 7531 | if(__HAL_HRTIM_MASTER_GET_FLAG(hhrtim, HRTIM_MASTER_FLAG_MCMP2) != RESET) |
bogdanm | 0:9b334a45a8ff | 7532 | { |
bogdanm | 0:9b334a45a8ff | 7533 | if(__HAL_HRTIM_MASTER_GET_ITSTATUS(hhrtim, HRTIM_MASTER_IT_MCMP2) != RESET) |
bogdanm | 0:9b334a45a8ff | 7534 | { |
bogdanm | 0:9b334a45a8ff | 7535 | __HAL_HRTIM_MASTER_CLEAR_IT(hhrtim, HRTIM_MASTER_IT_MCMP2); |
bogdanm | 0:9b334a45a8ff | 7536 | |
bogdanm | 0:9b334a45a8ff | 7537 | /* Invoke compare 2 event callback */ |
bogdanm | 0:9b334a45a8ff | 7538 | HAL_HRTIM_Compare2EventCallback(hhrtim, HRTIM_TIMERINDEX_MASTER); |
bogdanm | 0:9b334a45a8ff | 7539 | } |
bogdanm | 0:9b334a45a8ff | 7540 | } |
bogdanm | 0:9b334a45a8ff | 7541 | |
bogdanm | 0:9b334a45a8ff | 7542 | /* Master timer compare 3 event */ |
bogdanm | 0:9b334a45a8ff | 7543 | if(__HAL_HRTIM_MASTER_GET_FLAG(hhrtim, HRTIM_MASTER_FLAG_MCMP3) != RESET) |
bogdanm | 0:9b334a45a8ff | 7544 | { |
bogdanm | 0:9b334a45a8ff | 7545 | if(__HAL_HRTIM_MASTER_GET_ITSTATUS(hhrtim, HRTIM_MASTER_IT_MCMP3) != RESET) |
bogdanm | 0:9b334a45a8ff | 7546 | { |
bogdanm | 0:9b334a45a8ff | 7547 | __HAL_HRTIM_MASTER_CLEAR_IT(hhrtim, HRTIM_MASTER_IT_MCMP3); |
bogdanm | 0:9b334a45a8ff | 7548 | |
bogdanm | 0:9b334a45a8ff | 7549 | /* Invoke compare 3 event callback */ |
bogdanm | 0:9b334a45a8ff | 7550 | HAL_HRTIM_Compare3EventCallback(hhrtim, HRTIM_TIMERINDEX_MASTER); |
bogdanm | 0:9b334a45a8ff | 7551 | } |
bogdanm | 0:9b334a45a8ff | 7552 | } |
bogdanm | 0:9b334a45a8ff | 7553 | |
bogdanm | 0:9b334a45a8ff | 7554 | /* Master timer compare 4 event */ |
bogdanm | 0:9b334a45a8ff | 7555 | if(__HAL_HRTIM_MASTER_GET_FLAG(hhrtim, HRTIM_MASTER_FLAG_MCMP4) != RESET) |
bogdanm | 0:9b334a45a8ff | 7556 | { |
bogdanm | 0:9b334a45a8ff | 7557 | if(__HAL_HRTIM_MASTER_GET_ITSTATUS(hhrtim, HRTIM_MASTER_IT_MCMP4) != RESET) |
bogdanm | 0:9b334a45a8ff | 7558 | { |
bogdanm | 0:9b334a45a8ff | 7559 | __HAL_HRTIM_MASTER_CLEAR_IT(hhrtim, HRTIM_MASTER_IT_MCMP4); |
bogdanm | 0:9b334a45a8ff | 7560 | |
bogdanm | 0:9b334a45a8ff | 7561 | /* Invoke compare 4 event callback */ |
bogdanm | 0:9b334a45a8ff | 7562 | HAL_HRTIM_Compare4EventCallback(hhrtim, HRTIM_TIMERINDEX_MASTER); |
bogdanm | 0:9b334a45a8ff | 7563 | } |
bogdanm | 0:9b334a45a8ff | 7564 | } |
bogdanm | 0:9b334a45a8ff | 7565 | |
bogdanm | 0:9b334a45a8ff | 7566 | /* Master timer repetition event */ |
bogdanm | 0:9b334a45a8ff | 7567 | if(__HAL_HRTIM_MASTER_GET_FLAG(hhrtim, HRTIM_MASTER_FLAG_MREP) != RESET) |
bogdanm | 0:9b334a45a8ff | 7568 | { |
bogdanm | 0:9b334a45a8ff | 7569 | if(__HAL_HRTIM_MASTER_GET_ITSTATUS(hhrtim, HRTIM_MASTER_IT_MREP) != RESET) |
bogdanm | 0:9b334a45a8ff | 7570 | { |
bogdanm | 0:9b334a45a8ff | 7571 | __HAL_HRTIM_MASTER_CLEAR_IT(hhrtim, HRTIM_MASTER_IT_MREP); |
bogdanm | 0:9b334a45a8ff | 7572 | |
bogdanm | 0:9b334a45a8ff | 7573 | /* Invoke repetition event callback */ |
bogdanm | 0:9b334a45a8ff | 7574 | HAL_HRTIM_RepetitionEventCallback(hhrtim, HRTIM_TIMERINDEX_MASTER); |
bogdanm | 0:9b334a45a8ff | 7575 | } |
bogdanm | 0:9b334a45a8ff | 7576 | } |
bogdanm | 0:9b334a45a8ff | 7577 | |
bogdanm | 0:9b334a45a8ff | 7578 | /* Synchronization input event */ |
bogdanm | 0:9b334a45a8ff | 7579 | if(__HAL_HRTIM_MASTER_GET_FLAG(hhrtim, HRTIM_MASTER_FLAG_SYNC) != RESET) |
bogdanm | 0:9b334a45a8ff | 7580 | { |
bogdanm | 0:9b334a45a8ff | 7581 | if(__HAL_HRTIM_MASTER_GET_ITSTATUS(hhrtim, HRTIM_MASTER_IT_SYNC) != RESET) |
bogdanm | 0:9b334a45a8ff | 7582 | { |
bogdanm | 0:9b334a45a8ff | 7583 | __HAL_HRTIM_MASTER_CLEAR_IT(hhrtim, HRTIM_MASTER_IT_SYNC); |
bogdanm | 0:9b334a45a8ff | 7584 | |
bogdanm | 0:9b334a45a8ff | 7585 | /* Invoke synchronization event callback */ |
bogdanm | 0:9b334a45a8ff | 7586 | HAL_HRTIM_SynchronizationEventCallback(hhrtim); |
bogdanm | 0:9b334a45a8ff | 7587 | } |
bogdanm | 0:9b334a45a8ff | 7588 | } |
bogdanm | 0:9b334a45a8ff | 7589 | |
bogdanm | 0:9b334a45a8ff | 7590 | /* Master timer registers update event */ |
bogdanm | 0:9b334a45a8ff | 7591 | if(__HAL_HRTIM_MASTER_GET_FLAG(hhrtim, HRTIM_MASTER_FLAG_MUPD) != RESET) |
bogdanm | 0:9b334a45a8ff | 7592 | { |
bogdanm | 0:9b334a45a8ff | 7593 | if(__HAL_HRTIM_MASTER_GET_ITSTATUS(hhrtim, HRTIM_MASTER_IT_MUPD) != RESET) |
bogdanm | 0:9b334a45a8ff | 7594 | { |
bogdanm | 0:9b334a45a8ff | 7595 | __HAL_HRTIM_MASTER_CLEAR_IT(hhrtim, HRTIM_MASTER_IT_MUPD); |
bogdanm | 0:9b334a45a8ff | 7596 | |
bogdanm | 0:9b334a45a8ff | 7597 | /* Invoke registers update event callback */ |
bogdanm | 0:9b334a45a8ff | 7598 | HAL_HRTIM_RegistersUpdateCallback(hhrtim, HRTIM_TIMERINDEX_MASTER); |
bogdanm | 0:9b334a45a8ff | 7599 | } |
bogdanm | 0:9b334a45a8ff | 7600 | } |
bogdanm | 0:9b334a45a8ff | 7601 | } |
bogdanm | 0:9b334a45a8ff | 7602 | |
bogdanm | 0:9b334a45a8ff | 7603 | /** |
bogdanm | 0:9b334a45a8ff | 7604 | * @brief Timer interrupts service routine |
bogdanm | 0:9b334a45a8ff | 7605 | * @param hhrtim: pointer to HAL HRTIM handle |
bogdanm | 0:9b334a45a8ff | 7606 | * @param TimerIdx: Timer index |
bogdanm | 0:9b334a45a8ff | 7607 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 7608 | * @arg HRTIM_TIMERINDEX_TIMER_A for timer A |
bogdanm | 0:9b334a45a8ff | 7609 | * @arg HRTIM_TIMERINDEX_TIMER_B for timer B |
bogdanm | 0:9b334a45a8ff | 7610 | * @arg HRTIM_TIMERINDEX_TIMER_C for timer C |
bogdanm | 0:9b334a45a8ff | 7611 | * @arg HRTIM_TIMERINDEX_TIMER_D for timer D |
bogdanm | 0:9b334a45a8ff | 7612 | * @arg HRTIM_TIMERINDEX_TIMER_E for timer E |
bogdanm | 0:9b334a45a8ff | 7613 | * @retval None |
bogdanm | 0:9b334a45a8ff | 7614 | */ |
bogdanm | 0:9b334a45a8ff | 7615 | static void HRTIM_Timer_ISR(HRTIM_HandleTypeDef * hhrtim, |
bogdanm | 0:9b334a45a8ff | 7616 | uint32_t TimerIdx) |
bogdanm | 0:9b334a45a8ff | 7617 | { |
bogdanm | 0:9b334a45a8ff | 7618 | /* Timer compare 1 event */ |
bogdanm | 0:9b334a45a8ff | 7619 | if(__HAL_HRTIM_TIMER_GET_FLAG(hhrtim, TimerIdx, HRTIM_TIM_FLAG_CMP1) != RESET) |
bogdanm | 0:9b334a45a8ff | 7620 | { |
bogdanm | 0:9b334a45a8ff | 7621 | if(__HAL_HRTIM_TIMER_GET_ITSTATUS(hhrtim, TimerIdx, HRTIM_TIM_IT_CMP1) != RESET) |
bogdanm | 0:9b334a45a8ff | 7622 | { |
bogdanm | 0:9b334a45a8ff | 7623 | __HAL_HRTIM_TIMER_CLEAR_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CMP1); |
bogdanm | 0:9b334a45a8ff | 7624 | |
bogdanm | 0:9b334a45a8ff | 7625 | /* Invoke compare 1 event callback */ |
bogdanm | 0:9b334a45a8ff | 7626 | HAL_HRTIM_Compare1EventCallback(hhrtim, TimerIdx); |
bogdanm | 0:9b334a45a8ff | 7627 | } |
bogdanm | 0:9b334a45a8ff | 7628 | } |
bogdanm | 0:9b334a45a8ff | 7629 | |
bogdanm | 0:9b334a45a8ff | 7630 | /* Timer compare 2 event */ |
bogdanm | 0:9b334a45a8ff | 7631 | if(__HAL_HRTIM_TIMER_GET_FLAG(hhrtim, TimerIdx, HRTIM_TIM_FLAG_CMP2) != RESET) |
bogdanm | 0:9b334a45a8ff | 7632 | { |
bogdanm | 0:9b334a45a8ff | 7633 | if(__HAL_HRTIM_TIMER_GET_ITSTATUS(hhrtim, TimerIdx, HRTIM_TIM_IT_CMP2) != RESET) |
bogdanm | 0:9b334a45a8ff | 7634 | { |
bogdanm | 0:9b334a45a8ff | 7635 | __HAL_HRTIM_TIMER_CLEAR_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CMP2); |
bogdanm | 0:9b334a45a8ff | 7636 | |
bogdanm | 0:9b334a45a8ff | 7637 | /* Invoke compare 2 event callback */ |
bogdanm | 0:9b334a45a8ff | 7638 | HAL_HRTIM_Compare2EventCallback(hhrtim, TimerIdx); |
bogdanm | 0:9b334a45a8ff | 7639 | } |
bogdanm | 0:9b334a45a8ff | 7640 | } |
bogdanm | 0:9b334a45a8ff | 7641 | |
bogdanm | 0:9b334a45a8ff | 7642 | /* Timer compare 3 event */ |
bogdanm | 0:9b334a45a8ff | 7643 | if(__HAL_HRTIM_TIMER_GET_FLAG(hhrtim, TimerIdx, HRTIM_TIM_FLAG_CMP3) != RESET) |
bogdanm | 0:9b334a45a8ff | 7644 | { |
bogdanm | 0:9b334a45a8ff | 7645 | if(__HAL_HRTIM_TIMER_GET_ITSTATUS(hhrtim, TimerIdx, HRTIM_TIM_IT_CMP3) != RESET) |
bogdanm | 0:9b334a45a8ff | 7646 | { |
bogdanm | 0:9b334a45a8ff | 7647 | __HAL_HRTIM_TIMER_CLEAR_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CMP3); |
bogdanm | 0:9b334a45a8ff | 7648 | |
bogdanm | 0:9b334a45a8ff | 7649 | /* Invoke compare 3 event callback */ |
bogdanm | 0:9b334a45a8ff | 7650 | HAL_HRTIM_Compare3EventCallback(hhrtim, TimerIdx); |
bogdanm | 0:9b334a45a8ff | 7651 | } |
bogdanm | 0:9b334a45a8ff | 7652 | } |
bogdanm | 0:9b334a45a8ff | 7653 | |
bogdanm | 0:9b334a45a8ff | 7654 | /* Timer compare 4 event */ |
bogdanm | 0:9b334a45a8ff | 7655 | if(__HAL_HRTIM_TIMER_GET_FLAG(hhrtim, TimerIdx, HRTIM_TIM_FLAG_CMP4) != RESET) |
bogdanm | 0:9b334a45a8ff | 7656 | { |
bogdanm | 0:9b334a45a8ff | 7657 | if(__HAL_HRTIM_TIMER_GET_ITSTATUS(hhrtim, TimerIdx, HRTIM_TIM_IT_CMP4) != RESET) |
bogdanm | 0:9b334a45a8ff | 7658 | { |
bogdanm | 0:9b334a45a8ff | 7659 | __HAL_HRTIM_TIMER_CLEAR_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CMP4); |
bogdanm | 0:9b334a45a8ff | 7660 | |
bogdanm | 0:9b334a45a8ff | 7661 | /* Invoke compare 4 event callback */ |
bogdanm | 0:9b334a45a8ff | 7662 | HAL_HRTIM_Compare4EventCallback(hhrtim, TimerIdx); |
bogdanm | 0:9b334a45a8ff | 7663 | } |
bogdanm | 0:9b334a45a8ff | 7664 | } |
bogdanm | 0:9b334a45a8ff | 7665 | |
bogdanm | 0:9b334a45a8ff | 7666 | /* Timer repetition event */ |
bogdanm | 0:9b334a45a8ff | 7667 | if(__HAL_HRTIM_TIMER_GET_FLAG(hhrtim, TimerIdx, HRTIM_TIM_FLAG_REP) != RESET) |
bogdanm | 0:9b334a45a8ff | 7668 | { |
bogdanm | 0:9b334a45a8ff | 7669 | if(__HAL_HRTIM_TIMER_GET_ITSTATUS(hhrtim, TimerIdx, HRTIM_TIM_IT_REP) != RESET) |
bogdanm | 0:9b334a45a8ff | 7670 | { |
bogdanm | 0:9b334a45a8ff | 7671 | __HAL_HRTIM_TIMER_CLEAR_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_REP); |
bogdanm | 0:9b334a45a8ff | 7672 | |
bogdanm | 0:9b334a45a8ff | 7673 | /* Invoke repetition event callback */ |
bogdanm | 0:9b334a45a8ff | 7674 | HAL_HRTIM_RepetitionEventCallback(hhrtim, TimerIdx); |
bogdanm | 0:9b334a45a8ff | 7675 | } |
bogdanm | 0:9b334a45a8ff | 7676 | } |
bogdanm | 0:9b334a45a8ff | 7677 | |
bogdanm | 0:9b334a45a8ff | 7678 | /* Timer registers update event */ |
bogdanm | 0:9b334a45a8ff | 7679 | if(__HAL_HRTIM_TIMER_GET_FLAG(hhrtim, TimerIdx, HRTIM_TIM_FLAG_UPD) != RESET) |
bogdanm | 0:9b334a45a8ff | 7680 | { |
bogdanm | 0:9b334a45a8ff | 7681 | if(__HAL_HRTIM_TIMER_GET_ITSTATUS(hhrtim, TimerIdx, HRTIM_TIM_IT_UPD) != RESET) |
bogdanm | 0:9b334a45a8ff | 7682 | { |
bogdanm | 0:9b334a45a8ff | 7683 | __HAL_HRTIM_TIMER_CLEAR_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_UPD); |
bogdanm | 0:9b334a45a8ff | 7684 | |
bogdanm | 0:9b334a45a8ff | 7685 | /* Invoke registers update event callback */ |
bogdanm | 0:9b334a45a8ff | 7686 | HAL_HRTIM_RegistersUpdateCallback(hhrtim, TimerIdx); |
bogdanm | 0:9b334a45a8ff | 7687 | } |
bogdanm | 0:9b334a45a8ff | 7688 | } |
bogdanm | 0:9b334a45a8ff | 7689 | |
bogdanm | 0:9b334a45a8ff | 7690 | /* Timer capture 1 event */ |
bogdanm | 0:9b334a45a8ff | 7691 | if(__HAL_HRTIM_TIMER_GET_FLAG(hhrtim, TimerIdx, HRTIM_TIM_FLAG_CPT1) != RESET) |
bogdanm | 0:9b334a45a8ff | 7692 | { |
bogdanm | 0:9b334a45a8ff | 7693 | if(__HAL_HRTIM_TIMER_GET_ITSTATUS(hhrtim, TimerIdx, HRTIM_TIM_IT_CPT1) != RESET) |
bogdanm | 0:9b334a45a8ff | 7694 | { |
bogdanm | 0:9b334a45a8ff | 7695 | __HAL_HRTIM_TIMER_CLEAR_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CPT1); |
bogdanm | 0:9b334a45a8ff | 7696 | |
bogdanm | 0:9b334a45a8ff | 7697 | /* Invoke capture 1 event callback */ |
bogdanm | 0:9b334a45a8ff | 7698 | HAL_HRTIM_Capture1EventCallback(hhrtim, TimerIdx); |
bogdanm | 0:9b334a45a8ff | 7699 | } |
bogdanm | 0:9b334a45a8ff | 7700 | } |
bogdanm | 0:9b334a45a8ff | 7701 | |
bogdanm | 0:9b334a45a8ff | 7702 | /* Timer capture 2 event */ |
bogdanm | 0:9b334a45a8ff | 7703 | if(__HAL_HRTIM_TIMER_GET_FLAG(hhrtim, TimerIdx, HRTIM_TIM_FLAG_CPT2) != RESET) |
bogdanm | 0:9b334a45a8ff | 7704 | { |
bogdanm | 0:9b334a45a8ff | 7705 | if(__HAL_HRTIM_TIMER_GET_ITSTATUS(hhrtim, TimerIdx, HRTIM_TIM_IT_CPT2) != RESET) |
bogdanm | 0:9b334a45a8ff | 7706 | { |
bogdanm | 0:9b334a45a8ff | 7707 | __HAL_HRTIM_TIMER_CLEAR_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CPT2); |
bogdanm | 0:9b334a45a8ff | 7708 | |
bogdanm | 0:9b334a45a8ff | 7709 | /* Invoke capture 2 event callback */ |
bogdanm | 0:9b334a45a8ff | 7710 | HAL_HRTIM_Capture2EventCallback(hhrtim, TimerIdx); |
bogdanm | 0:9b334a45a8ff | 7711 | } |
bogdanm | 0:9b334a45a8ff | 7712 | } |
bogdanm | 0:9b334a45a8ff | 7713 | |
bogdanm | 0:9b334a45a8ff | 7714 | /* Timer ouput 1 set event */ |
bogdanm | 0:9b334a45a8ff | 7715 | if(__HAL_HRTIM_TIMER_GET_FLAG(hhrtim, TimerIdx, HRTIM_TIM_FLAG_SET1) != RESET) |
bogdanm | 0:9b334a45a8ff | 7716 | { |
bogdanm | 0:9b334a45a8ff | 7717 | if(__HAL_HRTIM_TIMER_GET_ITSTATUS(hhrtim, TimerIdx, HRTIM_TIM_IT_SET1) != RESET) |
bogdanm | 0:9b334a45a8ff | 7718 | { |
bogdanm | 0:9b334a45a8ff | 7719 | __HAL_HRTIM_TIMER_CLEAR_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_SET1); |
bogdanm | 0:9b334a45a8ff | 7720 | |
bogdanm | 0:9b334a45a8ff | 7721 | /* Invoke ouput 1 set event callback */ |
bogdanm | 0:9b334a45a8ff | 7722 | HAL_HRTIM_Output1SetCallback(hhrtim, TimerIdx); |
bogdanm | 0:9b334a45a8ff | 7723 | } |
bogdanm | 0:9b334a45a8ff | 7724 | } |
bogdanm | 0:9b334a45a8ff | 7725 | |
bogdanm | 0:9b334a45a8ff | 7726 | /* Timer ouput 1 reset event */ |
bogdanm | 0:9b334a45a8ff | 7727 | if(__HAL_HRTIM_TIMER_GET_FLAG(hhrtim, TimerIdx, HRTIM_TIM_FLAG_RST1) != RESET) |
bogdanm | 0:9b334a45a8ff | 7728 | { |
bogdanm | 0:9b334a45a8ff | 7729 | if(__HAL_HRTIM_TIMER_GET_ITSTATUS(hhrtim, TimerIdx, HRTIM_TIM_IT_RST1) != RESET) |
bogdanm | 0:9b334a45a8ff | 7730 | { |
bogdanm | 0:9b334a45a8ff | 7731 | __HAL_HRTIM_TIMER_CLEAR_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_RST1); |
bogdanm | 0:9b334a45a8ff | 7732 | |
bogdanm | 0:9b334a45a8ff | 7733 | /* Invoke ouput 1 reset event callback */ |
bogdanm | 0:9b334a45a8ff | 7734 | HAL_HRTIM_Output1ResetCallback(hhrtim, TimerIdx); |
bogdanm | 0:9b334a45a8ff | 7735 | } |
bogdanm | 0:9b334a45a8ff | 7736 | } |
bogdanm | 0:9b334a45a8ff | 7737 | |
bogdanm | 0:9b334a45a8ff | 7738 | /* Timer ouput 2 set event */ |
bogdanm | 0:9b334a45a8ff | 7739 | if(__HAL_HRTIM_TIMER_GET_FLAG(hhrtim, TimerIdx, HRTIM_TIM_FLAG_SET2) != RESET) |
bogdanm | 0:9b334a45a8ff | 7740 | { |
bogdanm | 0:9b334a45a8ff | 7741 | if(__HAL_HRTIM_TIMER_GET_ITSTATUS(hhrtim, TimerIdx, HRTIM_TIM_IT_SET2) != RESET) |
bogdanm | 0:9b334a45a8ff | 7742 | { |
bogdanm | 0:9b334a45a8ff | 7743 | __HAL_HRTIM_TIMER_CLEAR_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_SET2); |
bogdanm | 0:9b334a45a8ff | 7744 | |
bogdanm | 0:9b334a45a8ff | 7745 | /* Invoke ouput 2 set event callback */ |
bogdanm | 0:9b334a45a8ff | 7746 | HAL_HRTIM_Output2SetCallback(hhrtim, TimerIdx); |
bogdanm | 0:9b334a45a8ff | 7747 | } |
bogdanm | 0:9b334a45a8ff | 7748 | } |
bogdanm | 0:9b334a45a8ff | 7749 | |
bogdanm | 0:9b334a45a8ff | 7750 | /* Timer ouput 2 reset event */ |
bogdanm | 0:9b334a45a8ff | 7751 | if(__HAL_HRTIM_TIMER_GET_FLAG(hhrtim, TimerIdx, HRTIM_TIM_FLAG_RST2) != RESET) |
bogdanm | 0:9b334a45a8ff | 7752 | { |
bogdanm | 0:9b334a45a8ff | 7753 | if(__HAL_HRTIM_TIMER_GET_ITSTATUS(hhrtim, TimerIdx, HRTIM_TIM_IT_RST2) != RESET) |
bogdanm | 0:9b334a45a8ff | 7754 | { |
bogdanm | 0:9b334a45a8ff | 7755 | __HAL_HRTIM_TIMER_CLEAR_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_RST2); |
bogdanm | 0:9b334a45a8ff | 7756 | |
bogdanm | 0:9b334a45a8ff | 7757 | /* Invoke ouput 2 reset event callback */ |
bogdanm | 0:9b334a45a8ff | 7758 | HAL_HRTIM_Output2ResetCallback(hhrtim, TimerIdx); |
bogdanm | 0:9b334a45a8ff | 7759 | } |
bogdanm | 0:9b334a45a8ff | 7760 | } |
bogdanm | 0:9b334a45a8ff | 7761 | |
bogdanm | 0:9b334a45a8ff | 7762 | /* Timer reset event */ |
bogdanm | 0:9b334a45a8ff | 7763 | if(__HAL_HRTIM_TIMER_GET_FLAG(hhrtim, TimerIdx, HRTIM_TIM_FLAG_RST) != RESET) |
bogdanm | 0:9b334a45a8ff | 7764 | { |
bogdanm | 0:9b334a45a8ff | 7765 | if(__HAL_HRTIM_TIMER_GET_ITSTATUS(hhrtim, TimerIdx, HRTIM_TIM_IT_RST) != RESET) |
bogdanm | 0:9b334a45a8ff | 7766 | { |
bogdanm | 0:9b334a45a8ff | 7767 | __HAL_HRTIM_TIMER_CLEAR_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_RST); |
bogdanm | 0:9b334a45a8ff | 7768 | |
bogdanm | 0:9b334a45a8ff | 7769 | /* Invoke timer reset callback */ |
bogdanm | 0:9b334a45a8ff | 7770 | HAL_HRTIM_CounterResetCallback(hhrtim, TimerIdx); |
bogdanm | 0:9b334a45a8ff | 7771 | } |
bogdanm | 0:9b334a45a8ff | 7772 | } |
bogdanm | 0:9b334a45a8ff | 7773 | |
bogdanm | 0:9b334a45a8ff | 7774 | /* Delayed protection event */ |
bogdanm | 0:9b334a45a8ff | 7775 | if(__HAL_HRTIM_TIMER_GET_FLAG(hhrtim, TimerIdx, HRTIM_TIM_FLAG_DLYPRT) != RESET) |
bogdanm | 0:9b334a45a8ff | 7776 | { |
bogdanm | 0:9b334a45a8ff | 7777 | if(__HAL_HRTIM_TIMER_GET_ITSTATUS(hhrtim, TimerIdx, HRTIM_TIM_IT_DLYPRT) != RESET) |
bogdanm | 0:9b334a45a8ff | 7778 | { |
bogdanm | 0:9b334a45a8ff | 7779 | __HAL_HRTIM_TIMER_CLEAR_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_DLYPRT); |
bogdanm | 0:9b334a45a8ff | 7780 | |
bogdanm | 0:9b334a45a8ff | 7781 | /* Invoke delayed protection callback */ |
bogdanm | 0:9b334a45a8ff | 7782 | HAL_HRTIM_DelayedProtectionCallback(hhrtim, TimerIdx); |
bogdanm | 0:9b334a45a8ff | 7783 | } |
bogdanm | 0:9b334a45a8ff | 7784 | } |
bogdanm | 0:9b334a45a8ff | 7785 | } |
bogdanm | 0:9b334a45a8ff | 7786 | |
bogdanm | 0:9b334a45a8ff | 7787 | /** |
bogdanm | 0:9b334a45a8ff | 7788 | * @brief DMA callback invoked upon master timer related DMA request completion |
bogdanm | 0:9b334a45a8ff | 7789 | * @param hdma: pointer to DMA handle. |
bogdanm | 0:9b334a45a8ff | 7790 | * @retval None |
bogdanm | 0:9b334a45a8ff | 7791 | */ |
bogdanm | 0:9b334a45a8ff | 7792 | static void HRTIM_DMAMasterCplt(DMA_HandleTypeDef *hdma) |
bogdanm | 0:9b334a45a8ff | 7793 | { |
bogdanm | 0:9b334a45a8ff | 7794 | HRTIM_HandleTypeDef * hrtim = (HRTIM_HandleTypeDef *)((DMA_HandleTypeDef* )hdma)->Parent; |
bogdanm | 0:9b334a45a8ff | 7795 | |
bogdanm | 0:9b334a45a8ff | 7796 | if ((hrtim->Instance->sMasterRegs.MDIER & HRTIM_MASTER_DMA_MCMP1) != RESET) |
bogdanm | 0:9b334a45a8ff | 7797 | { |
bogdanm | 0:9b334a45a8ff | 7798 | HAL_HRTIM_Compare1EventCallback(hrtim, HRTIM_TIMERINDEX_MASTER); |
bogdanm | 0:9b334a45a8ff | 7799 | } |
bogdanm | 0:9b334a45a8ff | 7800 | else if ((hrtim->Instance->sMasterRegs.MDIER & HRTIM_MASTER_DMA_MCMP2) != RESET) |
bogdanm | 0:9b334a45a8ff | 7801 | { |
bogdanm | 0:9b334a45a8ff | 7802 | HAL_HRTIM_Compare2EventCallback(hrtim, HRTIM_TIMERINDEX_MASTER); |
bogdanm | 0:9b334a45a8ff | 7803 | } |
bogdanm | 0:9b334a45a8ff | 7804 | else if ((hrtim->Instance->sMasterRegs.MDIER & HRTIM_MASTER_DMA_MCMP3) != RESET) |
bogdanm | 0:9b334a45a8ff | 7805 | { |
bogdanm | 0:9b334a45a8ff | 7806 | HAL_HRTIM_Compare3EventCallback(hrtim, HRTIM_TIMERINDEX_MASTER); |
bogdanm | 0:9b334a45a8ff | 7807 | } |
bogdanm | 0:9b334a45a8ff | 7808 | else if ((hrtim->Instance->sMasterRegs.MDIER & HRTIM_MASTER_DMA_MCMP4) != RESET) |
bogdanm | 0:9b334a45a8ff | 7809 | { |
bogdanm | 0:9b334a45a8ff | 7810 | HAL_HRTIM_Compare4EventCallback(hrtim, HRTIM_TIMERINDEX_MASTER); |
bogdanm | 0:9b334a45a8ff | 7811 | } |
bogdanm | 0:9b334a45a8ff | 7812 | else if ((hrtim->Instance->sMasterRegs.MDIER & HRTIM_MASTER_DMA_MREP) != RESET) |
bogdanm | 0:9b334a45a8ff | 7813 | { |
bogdanm | 0:9b334a45a8ff | 7814 | HAL_HRTIM_RepetitionEventCallback(hrtim, HRTIM_TIMERINDEX_MASTER); |
bogdanm | 0:9b334a45a8ff | 7815 | } |
bogdanm | 0:9b334a45a8ff | 7816 | else if ((hrtim->Instance->sMasterRegs.MDIER & HRTIM_MASTER_DMA_SYNC) != RESET) |
bogdanm | 0:9b334a45a8ff | 7817 | { |
bogdanm | 0:9b334a45a8ff | 7818 | HAL_HRTIM_SynchronizationEventCallback(hrtim); |
bogdanm | 0:9b334a45a8ff | 7819 | } |
bogdanm | 0:9b334a45a8ff | 7820 | else if ((hrtim->Instance->sMasterRegs.MDIER & HRTIM_MASTER_DMA_MUPD) != RESET) |
bogdanm | 0:9b334a45a8ff | 7821 | { |
bogdanm | 0:9b334a45a8ff | 7822 | HAL_HRTIM_RegistersUpdateCallback(hrtim, HRTIM_TIMERINDEX_MASTER); |
bogdanm | 0:9b334a45a8ff | 7823 | } |
bogdanm | 0:9b334a45a8ff | 7824 | } |
bogdanm | 0:9b334a45a8ff | 7825 | |
bogdanm | 0:9b334a45a8ff | 7826 | /** |
bogdanm | 0:9b334a45a8ff | 7827 | * @brief DMA callback invoked upon timer A..E related DMA request completion |
bogdanm | 0:9b334a45a8ff | 7828 | * @param hdma: pointer to DMA handle. |
bogdanm | 0:9b334a45a8ff | 7829 | * @retval None |
bogdanm | 0:9b334a45a8ff | 7830 | */ |
bogdanm | 0:9b334a45a8ff | 7831 | static void HRTIM_DMATimerxCplt(DMA_HandleTypeDef *hdma) |
bogdanm | 0:9b334a45a8ff | 7832 | { |
bogdanm | 0:9b334a45a8ff | 7833 | uint8_t timer_idx; |
bogdanm | 0:9b334a45a8ff | 7834 | |
bogdanm | 0:9b334a45a8ff | 7835 | HRTIM_HandleTypeDef * hrtim = (HRTIM_HandleTypeDef *)((DMA_HandleTypeDef* )hdma)->Parent; |
bogdanm | 0:9b334a45a8ff | 7836 | |
bogdanm | 0:9b334a45a8ff | 7837 | timer_idx = GetTimerIdxFromDMAHandle(hdma); |
bogdanm | 0:9b334a45a8ff | 7838 | |
bogdanm | 0:9b334a45a8ff | 7839 | if ((hrtim->Instance->sTimerxRegs[timer_idx].TIMxDIER & HRTIM_TIM_DMA_CMP1) != RESET) |
bogdanm | 0:9b334a45a8ff | 7840 | { |
bogdanm | 0:9b334a45a8ff | 7841 | HAL_HRTIM_Compare1EventCallback(hrtim, timer_idx); |
bogdanm | 0:9b334a45a8ff | 7842 | } |
bogdanm | 0:9b334a45a8ff | 7843 | else if ((hrtim->Instance->sTimerxRegs[timer_idx].TIMxDIER & HRTIM_TIM_DMA_CMP2) != RESET) |
bogdanm | 0:9b334a45a8ff | 7844 | { |
bogdanm | 0:9b334a45a8ff | 7845 | HAL_HRTIM_Compare2EventCallback(hrtim, timer_idx); |
bogdanm | 0:9b334a45a8ff | 7846 | } |
bogdanm | 0:9b334a45a8ff | 7847 | else if ((hrtim->Instance->sTimerxRegs[timer_idx].TIMxDIER & HRTIM_TIM_DMA_CMP3) != RESET) |
bogdanm | 0:9b334a45a8ff | 7848 | { |
bogdanm | 0:9b334a45a8ff | 7849 | HAL_HRTIM_Compare3EventCallback(hrtim, timer_idx); |
bogdanm | 0:9b334a45a8ff | 7850 | } |
bogdanm | 0:9b334a45a8ff | 7851 | else if ((hrtim->Instance->sTimerxRegs[timer_idx].TIMxDIER & HRTIM_TIM_DMA_CMP4) != RESET) |
bogdanm | 0:9b334a45a8ff | 7852 | { |
bogdanm | 0:9b334a45a8ff | 7853 | HAL_HRTIM_Compare4EventCallback(hrtim, timer_idx); |
bogdanm | 0:9b334a45a8ff | 7854 | } |
bogdanm | 0:9b334a45a8ff | 7855 | else if ((hrtim->Instance->sTimerxRegs[timer_idx].TIMxDIER & HRTIM_TIM_DMA_REP) != RESET) |
bogdanm | 0:9b334a45a8ff | 7856 | { |
bogdanm | 0:9b334a45a8ff | 7857 | HAL_HRTIM_RepetitionEventCallback(hrtim, timer_idx); |
bogdanm | 0:9b334a45a8ff | 7858 | } |
bogdanm | 0:9b334a45a8ff | 7859 | else if ((hrtim->Instance->sTimerxRegs[timer_idx].TIMxDIER & HRTIM_TIM_DMA_UPD) != RESET) |
bogdanm | 0:9b334a45a8ff | 7860 | { |
bogdanm | 0:9b334a45a8ff | 7861 | HAL_HRTIM_RegistersUpdateCallback(hrtim, timer_idx); |
bogdanm | 0:9b334a45a8ff | 7862 | } |
bogdanm | 0:9b334a45a8ff | 7863 | else if ((hrtim->Instance->sTimerxRegs[timer_idx].TIMxDIER & HRTIM_TIM_DMA_CPT1) != RESET) |
bogdanm | 0:9b334a45a8ff | 7864 | { |
bogdanm | 0:9b334a45a8ff | 7865 | HAL_HRTIM_Capture1EventCallback(hrtim, timer_idx); |
bogdanm | 0:9b334a45a8ff | 7866 | } |
bogdanm | 0:9b334a45a8ff | 7867 | else if ((hrtim->Instance->sTimerxRegs[timer_idx].TIMxDIER & HRTIM_TIM_DMA_CPT2) != RESET) |
bogdanm | 0:9b334a45a8ff | 7868 | { |
bogdanm | 0:9b334a45a8ff | 7869 | HAL_HRTIM_Capture2EventCallback(hrtim, timer_idx); |
bogdanm | 0:9b334a45a8ff | 7870 | } |
bogdanm | 0:9b334a45a8ff | 7871 | else if ((hrtim->Instance->sTimerxRegs[timer_idx].TIMxDIER & HRTIM_TIM_DMA_SET1) != RESET) |
bogdanm | 0:9b334a45a8ff | 7872 | { |
bogdanm | 0:9b334a45a8ff | 7873 | HAL_HRTIM_Output1SetCallback(hrtim, timer_idx); |
bogdanm | 0:9b334a45a8ff | 7874 | } |
bogdanm | 0:9b334a45a8ff | 7875 | else if ((hrtim->Instance->sTimerxRegs[timer_idx].TIMxDIER & HRTIM_TIM_DMA_RST1) != RESET) |
bogdanm | 0:9b334a45a8ff | 7876 | { |
bogdanm | 0:9b334a45a8ff | 7877 | HAL_HRTIM_Output1ResetCallback(hrtim, timer_idx); |
bogdanm | 0:9b334a45a8ff | 7878 | } |
bogdanm | 0:9b334a45a8ff | 7879 | else if ((hrtim->Instance->sTimerxRegs[timer_idx].TIMxDIER & HRTIM_TIM_DMA_SET2) != RESET) |
bogdanm | 0:9b334a45a8ff | 7880 | { |
bogdanm | 0:9b334a45a8ff | 7881 | HAL_HRTIM_Output2SetCallback(hrtim, timer_idx); |
bogdanm | 0:9b334a45a8ff | 7882 | } |
bogdanm | 0:9b334a45a8ff | 7883 | else if ((hrtim->Instance->sTimerxRegs[timer_idx].TIMxDIER & HRTIM_TIM_DMA_RST2) != RESET) |
bogdanm | 0:9b334a45a8ff | 7884 | { |
bogdanm | 0:9b334a45a8ff | 7885 | HAL_HRTIM_Output2ResetCallback(hrtim, timer_idx); |
bogdanm | 0:9b334a45a8ff | 7886 | } |
bogdanm | 0:9b334a45a8ff | 7887 | else if ((hrtim->Instance->sTimerxRegs[timer_idx].TIMxDIER & HRTIM_TIM_DMA_RST) != RESET) |
bogdanm | 0:9b334a45a8ff | 7888 | { |
bogdanm | 0:9b334a45a8ff | 7889 | HAL_HRTIM_CounterResetCallback(hrtim, timer_idx); |
bogdanm | 0:9b334a45a8ff | 7890 | } |
bogdanm | 0:9b334a45a8ff | 7891 | else if ((hrtim->Instance->sTimerxRegs[timer_idx].TIMxDIER & HRTIM_TIM_DMA_DLYPRT) != RESET) |
bogdanm | 0:9b334a45a8ff | 7892 | { |
bogdanm | 0:9b334a45a8ff | 7893 | HAL_HRTIM_DelayedProtectionCallback(hrtim, timer_idx); |
bogdanm | 0:9b334a45a8ff | 7894 | } |
bogdanm | 0:9b334a45a8ff | 7895 | } |
bogdanm | 0:9b334a45a8ff | 7896 | |
bogdanm | 0:9b334a45a8ff | 7897 | /** |
bogdanm | 0:9b334a45a8ff | 7898 | * @brief DMA error callback |
bogdanm | 0:9b334a45a8ff | 7899 | * @param hdma: pointer to DMA handle. |
bogdanm | 0:9b334a45a8ff | 7900 | * @retval None |
bogdanm | 0:9b334a45a8ff | 7901 | */ |
bogdanm | 0:9b334a45a8ff | 7902 | static void HRTIM_DMAError(DMA_HandleTypeDef *hdma) |
bogdanm | 0:9b334a45a8ff | 7903 | { |
bogdanm | 0:9b334a45a8ff | 7904 | HRTIM_HandleTypeDef * hrtim = (HRTIM_HandleTypeDef *)((DMA_HandleTypeDef* )hdma)->Parent; |
bogdanm | 0:9b334a45a8ff | 7905 | |
bogdanm | 0:9b334a45a8ff | 7906 | HAL_HRTIM_ErrorCallback(hrtim); |
bogdanm | 0:9b334a45a8ff | 7907 | } |
bogdanm | 0:9b334a45a8ff | 7908 | |
bogdanm | 0:9b334a45a8ff | 7909 | /** |
bogdanm | 0:9b334a45a8ff | 7910 | * @brief DMA callback invoked upon burst DMA transfer completion |
bogdanm | 0:9b334a45a8ff | 7911 | * @param hdma: pointer to DMA handle. |
bogdanm | 0:9b334a45a8ff | 7912 | * @retval None |
bogdanm | 0:9b334a45a8ff | 7913 | */ |
bogdanm | 0:9b334a45a8ff | 7914 | static void HRTIM_BurstDMACplt(DMA_HandleTypeDef *hdma) |
bogdanm | 0:9b334a45a8ff | 7915 | { |
bogdanm | 0:9b334a45a8ff | 7916 | HRTIM_HandleTypeDef * hrtim = (HRTIM_HandleTypeDef *)((DMA_HandleTypeDef* )hdma)->Parent; |
bogdanm | 0:9b334a45a8ff | 7917 | |
bogdanm | 0:9b334a45a8ff | 7918 | HAL_HRTIM_BurstDMATransferCallback(hrtim, GetTimerIdxFromDMAHandle(hdma)); |
bogdanm | 0:9b334a45a8ff | 7919 | } |
bogdanm | 0:9b334a45a8ff | 7920 | |
bogdanm | 0:9b334a45a8ff | 7921 | /** |
bogdanm | 0:9b334a45a8ff | 7922 | * @} |
bogdanm | 0:9b334a45a8ff | 7923 | */ |
bogdanm | 0:9b334a45a8ff | 7924 | |
bogdanm | 0:9b334a45a8ff | 7925 | /** |
bogdanm | 0:9b334a45a8ff | 7926 | * @} |
bogdanm | 0:9b334a45a8ff | 7927 | */ |
bogdanm | 0:9b334a45a8ff | 7928 | #endif /* STM32F334x8 */ |
bogdanm | 0:9b334a45a8ff | 7929 | |
bogdanm | 0:9b334a45a8ff | 7930 | #endif /* HAL_HRTIM_MODULE_ENABLED */ |
bogdanm | 0:9b334a45a8ff | 7931 | |
bogdanm | 0:9b334a45a8ff | 7932 | /** |
bogdanm | 0:9b334a45a8ff | 7933 | * @} |
bogdanm | 0:9b334a45a8ff | 7934 | */ |
bogdanm | 0:9b334a45a8ff | 7935 | |
bogdanm | 0:9b334a45a8ff | 7936 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
bogdanm | 0:9b334a45a8ff | 7937 | |
bogdanm | 0:9b334a45a8ff | 7938 | |
bogdanm | 0:9b334a45a8ff | 7939 |