fix LPC812 PWM
Fork of mbed-dev by
targets/cmsis/TARGET_STM/TARGET_STM32F1/stm32f1xx_hal_i2c.c@129:2e517c56bcfb, 2016-05-16 (annotated)
- Committer:
- nameless129
- Date:
- Mon May 16 16:50:30 2016 +0000
- Revision:
- 129:2e517c56bcfb
- Parent:
- 124:6a4a5b7d7324
PWM Fix:Duty 0%??H???????????????
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
bogdanm | 0:9b334a45a8ff | 1 | /** |
bogdanm | 0:9b334a45a8ff | 2 | ****************************************************************************** |
bogdanm | 0:9b334a45a8ff | 3 | * @file stm32f1xx_hal_i2c.c |
bogdanm | 0:9b334a45a8ff | 4 | * @author MCD Application Team |
mbed_official | 124:6a4a5b7d7324 | 5 | * @version V1.0.4 |
mbed_official | 124:6a4a5b7d7324 | 6 | * @date 29-April-2016 |
bogdanm | 0:9b334a45a8ff | 7 | * @brief I2C HAL module driver. |
bogdanm | 0:9b334a45a8ff | 8 | * This file provides firmware functions to manage the following |
bogdanm | 0:9b334a45a8ff | 9 | * functionalities of the Inter Integrated Circuit (I2C) peripheral: |
bogdanm | 0:9b334a45a8ff | 10 | * + Initialization and de-initialization functions |
bogdanm | 0:9b334a45a8ff | 11 | * + IO operation functions |
bogdanm | 0:9b334a45a8ff | 12 | * + Peripheral Control functions |
bogdanm | 0:9b334a45a8ff | 13 | * + Peripheral State functions |
bogdanm | 0:9b334a45a8ff | 14 | * |
bogdanm | 0:9b334a45a8ff | 15 | @verbatim |
bogdanm | 0:9b334a45a8ff | 16 | ============================================================================== |
bogdanm | 0:9b334a45a8ff | 17 | ##### How to use this driver ##### |
bogdanm | 0:9b334a45a8ff | 18 | ============================================================================== |
bogdanm | 0:9b334a45a8ff | 19 | [..] |
bogdanm | 0:9b334a45a8ff | 20 | The I2C HAL driver can be used as follows: |
bogdanm | 0:9b334a45a8ff | 21 | |
bogdanm | 0:9b334a45a8ff | 22 | (#) Declare a I2C_HandleTypeDef handle structure, for example: |
bogdanm | 0:9b334a45a8ff | 23 | I2C_HandleTypeDef hi2c; |
bogdanm | 0:9b334a45a8ff | 24 | |
mbed_official | 124:6a4a5b7d7324 | 25 | (#)Initialize the I2C low level resources by implementing the HAL_I2C_MspInit() API: |
bogdanm | 0:9b334a45a8ff | 26 | (##) Enable the I2Cx interface clock |
bogdanm | 0:9b334a45a8ff | 27 | (##) I2C pins configuration |
bogdanm | 0:9b334a45a8ff | 28 | (+++) Enable the clock for the I2C GPIOs |
bogdanm | 0:9b334a45a8ff | 29 | (+++) Configure I2C pins as alternate function open-drain |
bogdanm | 0:9b334a45a8ff | 30 | (##) NVIC configuration if you need to use interrupt process |
bogdanm | 0:9b334a45a8ff | 31 | (+++) Configure the I2Cx interrupt priority |
bogdanm | 0:9b334a45a8ff | 32 | (+++) Enable the NVIC I2C IRQ Channel |
bogdanm | 0:9b334a45a8ff | 33 | (##) DMA Configuration if you need to use DMA process |
bogdanm | 0:9b334a45a8ff | 34 | (+++) Declare a DMA_HandleTypeDef handle structure for the transmit or receive channel |
bogdanm | 0:9b334a45a8ff | 35 | (+++) Enable the DMAx interface clock using |
bogdanm | 0:9b334a45a8ff | 36 | (+++) Configure the DMA handle parameters |
bogdanm | 0:9b334a45a8ff | 37 | (+++) Configure the DMA Tx or Rx channel |
mbed_official | 124:6a4a5b7d7324 | 38 | (+++) Associate the initialized DMA handle to the hi2c DMA Tx or Rx handle |
bogdanm | 0:9b334a45a8ff | 39 | (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on |
bogdanm | 0:9b334a45a8ff | 40 | the DMA Tx or Rx channel |
bogdanm | 0:9b334a45a8ff | 41 | |
bogdanm | 0:9b334a45a8ff | 42 | (#) Configure the Communication Speed, Duty cycle, Addressing mode, Own Address1, |
bogdanm | 0:9b334a45a8ff | 43 | Dual Addressing mode, Own Address2, General call and Nostretch mode in the hi2c Init structure. |
bogdanm | 0:9b334a45a8ff | 44 | |
bogdanm | 0:9b334a45a8ff | 45 | (#) Initialize the I2C registers by calling the HAL_I2C_Init(), configures also the low level Hardware |
mbed_official | 124:6a4a5b7d7324 | 46 | (GPIO, CLOCK, NVIC...etc) by calling the customized HAL_I2C_MspInit(&hi2c) API. |
bogdanm | 0:9b334a45a8ff | 47 | |
bogdanm | 0:9b334a45a8ff | 48 | (#) To check if target device is ready for communication, use the function HAL_I2C_IsDeviceReady() |
bogdanm | 0:9b334a45a8ff | 49 | |
bogdanm | 0:9b334a45a8ff | 50 | (#) For I2C IO and IO MEM operations, three operation modes are available within this driver : |
bogdanm | 0:9b334a45a8ff | 51 | |
bogdanm | 0:9b334a45a8ff | 52 | *** Polling mode IO operation *** |
bogdanm | 0:9b334a45a8ff | 53 | ================================= |
bogdanm | 0:9b334a45a8ff | 54 | [..] |
bogdanm | 0:9b334a45a8ff | 55 | (+) Transmit in master mode an amount of data in blocking mode using HAL_I2C_Master_Transmit() |
bogdanm | 0:9b334a45a8ff | 56 | (+) Receive in master mode an amount of data in blocking mode using HAL_I2C_Master_Receive() |
bogdanm | 0:9b334a45a8ff | 57 | (+) Transmit in slave mode an amount of data in blocking mode using HAL_I2C_Slave_Transmit() |
bogdanm | 0:9b334a45a8ff | 58 | (+) Receive in slave mode an amount of data in blocking mode using HAL_I2C_Slave_Receive() |
bogdanm | 0:9b334a45a8ff | 59 | |
bogdanm | 0:9b334a45a8ff | 60 | *** Polling mode IO MEM operation *** |
bogdanm | 0:9b334a45a8ff | 61 | ===================================== |
bogdanm | 0:9b334a45a8ff | 62 | [..] |
bogdanm | 0:9b334a45a8ff | 63 | (+) Write an amount of data in blocking mode to a specific memory address using HAL_I2C_Mem_Write() |
bogdanm | 0:9b334a45a8ff | 64 | (+) Read an amount of data in blocking mode from a specific memory address using HAL_I2C_Mem_Read() |
bogdanm | 0:9b334a45a8ff | 65 | |
bogdanm | 0:9b334a45a8ff | 66 | |
bogdanm | 0:9b334a45a8ff | 67 | *** Interrupt mode IO operation *** |
bogdanm | 0:9b334a45a8ff | 68 | =================================== |
bogdanm | 0:9b334a45a8ff | 69 | [..] |
bogdanm | 0:9b334a45a8ff | 70 | (+) The I2C interrupts should have the highest priority in the application in order |
bogdanm | 0:9b334a45a8ff | 71 | to make them uninterruptible. |
mbed_official | 124:6a4a5b7d7324 | 72 | (+) Transmit in master mode an amount of data in non-blocking mode using HAL_I2C_Master_Transmit_IT() |
mbed_official | 124:6a4a5b7d7324 | 73 | (+) At transmission end of transfer, HAL_I2C_MasterTxCpltCallback() is executed and user can |
mbed_official | 124:6a4a5b7d7324 | 74 | add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback() |
mbed_official | 124:6a4a5b7d7324 | 75 | (+) Receive in master mode an amount of data in non-blocking mode using HAL_I2C_Master_Receive_IT() |
mbed_official | 124:6a4a5b7d7324 | 76 | (+) At reception end of transfer, HAL_I2C_MasterRxCpltCallback() is executed and user can |
mbed_official | 124:6a4a5b7d7324 | 77 | add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback() |
mbed_official | 124:6a4a5b7d7324 | 78 | (+) Transmit in slave mode an amount of data in non-blocking mode using HAL_I2C_Slave_Transmit_IT() |
mbed_official | 124:6a4a5b7d7324 | 79 | (+) At transmission end of transfer, HAL_I2C_SlaveTxCpltCallback() is executed and user can |
mbed_official | 124:6a4a5b7d7324 | 80 | add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback() |
mbed_official | 124:6a4a5b7d7324 | 81 | (+) Receive in slave mode an amount of data in non-blocking mode using HAL_I2C_Slave_Receive_IT() |
mbed_official | 124:6a4a5b7d7324 | 82 | (+) At reception end of transfer, HAL_I2C_SlaveRxCpltCallback() is executed and user can |
mbed_official | 124:6a4a5b7d7324 | 83 | add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback() |
bogdanm | 0:9b334a45a8ff | 84 | (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can |
mbed_official | 124:6a4a5b7d7324 | 85 | add his own code by customization of function pointer HAL_I2C_ErrorCallback() |
bogdanm | 0:9b334a45a8ff | 86 | |
bogdanm | 0:9b334a45a8ff | 87 | *** Interrupt mode IO MEM operation *** |
bogdanm | 0:9b334a45a8ff | 88 | ======================================= |
bogdanm | 0:9b334a45a8ff | 89 | [..] |
bogdanm | 0:9b334a45a8ff | 90 | (+) The I2C interrupts should have the highest priority in the application in order |
bogdanm | 0:9b334a45a8ff | 91 | to make them uninterruptible. |
mbed_official | 124:6a4a5b7d7324 | 92 | (+) Write an amount of data in non-blocking mode with Interrupt to a specific memory address using |
bogdanm | 0:9b334a45a8ff | 93 | HAL_I2C_Mem_Write_IT() |
mbed_official | 124:6a4a5b7d7324 | 94 | (+) At Memory end of write transfer, HAL_I2C_MemTxCpltCallback() is executed and user can |
mbed_official | 124:6a4a5b7d7324 | 95 | add his own code by customization of function pointer HAL_I2C_MemTxCpltCallback() |
mbed_official | 124:6a4a5b7d7324 | 96 | (+) Read an amount of data in non-blocking mode with Interrupt from a specific memory address using |
bogdanm | 0:9b334a45a8ff | 97 | HAL_I2C_Mem_Read_IT() |
mbed_official | 124:6a4a5b7d7324 | 98 | (+) At Memory end of read transfer, HAL_I2C_MemRxCpltCallback() is executed and user can |
mbed_official | 124:6a4a5b7d7324 | 99 | add his own code by customization of function pointer HAL_I2C_MemRxCpltCallback() |
bogdanm | 0:9b334a45a8ff | 100 | (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can |
mbed_official | 124:6a4a5b7d7324 | 101 | add his own code by customization of function pointer HAL_I2C_ErrorCallback() |
bogdanm | 0:9b334a45a8ff | 102 | |
bogdanm | 0:9b334a45a8ff | 103 | *** DMA mode IO operation *** |
bogdanm | 0:9b334a45a8ff | 104 | ============================== |
bogdanm | 0:9b334a45a8ff | 105 | [..] |
mbed_official | 124:6a4a5b7d7324 | 106 | (+) Transmit in master mode an amount of data in non-blocking mode (DMA) using |
bogdanm | 0:9b334a45a8ff | 107 | HAL_I2C_Master_Transmit_DMA() |
mbed_official | 124:6a4a5b7d7324 | 108 | (+) At transmission end of transfer, HAL_I2C_MasterTxCpltCallback() is executed and user can |
mbed_official | 124:6a4a5b7d7324 | 109 | add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback() |
mbed_official | 124:6a4a5b7d7324 | 110 | (+) Receive in master mode an amount of data in non-blocking mode (DMA) using |
bogdanm | 0:9b334a45a8ff | 111 | HAL_I2C_Master_Receive_DMA() |
mbed_official | 124:6a4a5b7d7324 | 112 | (+) At reception end of transfer, HAL_I2C_MasterRxCpltCallback() is executed and user can |
mbed_official | 124:6a4a5b7d7324 | 113 | add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback() |
mbed_official | 124:6a4a5b7d7324 | 114 | (+) Transmit in slave mode an amount of data in non-blocking mode (DMA) using |
bogdanm | 0:9b334a45a8ff | 115 | HAL_I2C_Slave_Transmit_DMA() |
mbed_official | 124:6a4a5b7d7324 | 116 | (+) At transmission end of transfer, HAL_I2C_SlaveTxCpltCallback() is executed and user can |
mbed_official | 124:6a4a5b7d7324 | 117 | add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback() |
mbed_official | 124:6a4a5b7d7324 | 118 | (+) Receive in slave mode an amount of data in non-blocking mode (DMA) using |
bogdanm | 0:9b334a45a8ff | 119 | HAL_I2C_Slave_Receive_DMA() |
mbed_official | 124:6a4a5b7d7324 | 120 | (+) At reception end of transfer, HAL_I2C_SlaveRxCpltCallback() is executed and user can |
mbed_official | 124:6a4a5b7d7324 | 121 | add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback() |
bogdanm | 0:9b334a45a8ff | 122 | (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can |
mbed_official | 124:6a4a5b7d7324 | 123 | add his own code by customization of function pointer HAL_I2C_ErrorCallback() |
bogdanm | 0:9b334a45a8ff | 124 | |
bogdanm | 0:9b334a45a8ff | 125 | *** DMA mode IO MEM operation *** |
bogdanm | 0:9b334a45a8ff | 126 | ================================= |
bogdanm | 0:9b334a45a8ff | 127 | [..] |
mbed_official | 124:6a4a5b7d7324 | 128 | (+) Write an amount of data in non-blocking mode with DMA to a specific memory address using |
bogdanm | 0:9b334a45a8ff | 129 | HAL_I2C_Mem_Write_DMA() |
mbed_official | 124:6a4a5b7d7324 | 130 | (+) At Memory end of write transfer, HAL_I2C_MemTxCpltCallback() is executed and user can |
mbed_official | 124:6a4a5b7d7324 | 131 | add his own code by customization of function pointer HAL_I2C_MemTxCpltCallback() |
mbed_official | 124:6a4a5b7d7324 | 132 | (+) Read an amount of data in non-blocking mode with DMA from a specific memory address using |
bogdanm | 0:9b334a45a8ff | 133 | HAL_I2C_Mem_Read_DMA() |
mbed_official | 124:6a4a5b7d7324 | 134 | (+) At Memory end of read transfer, HAL_I2C_MemRxCpltCallback() is executed and user can |
mbed_official | 124:6a4a5b7d7324 | 135 | add his own code by customization of function pointer HAL_I2C_MemRxCpltCallback() |
bogdanm | 0:9b334a45a8ff | 136 | (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can |
mbed_official | 124:6a4a5b7d7324 | 137 | add his own code by customization of function pointer HAL_I2C_ErrorCallback() |
bogdanm | 0:9b334a45a8ff | 138 | |
bogdanm | 0:9b334a45a8ff | 139 | |
bogdanm | 0:9b334a45a8ff | 140 | *** I2C HAL driver macros list *** |
bogdanm | 0:9b334a45a8ff | 141 | ================================== |
bogdanm | 0:9b334a45a8ff | 142 | [..] |
bogdanm | 0:9b334a45a8ff | 143 | Below the list of most used macros in I2C HAL driver. |
bogdanm | 0:9b334a45a8ff | 144 | |
bogdanm | 0:9b334a45a8ff | 145 | (+) __HAL_I2C_ENABLE: Enable the I2C peripheral |
bogdanm | 0:9b334a45a8ff | 146 | (+) __HAL_I2C_DISABLE: Disable the I2C peripheral |
mbed_official | 124:6a4a5b7d7324 | 147 | (+) __HAL_I2C_GET_FLAG: Check whether the specified I2C flag is set or not |
bogdanm | 0:9b334a45a8ff | 148 | (+) __HAL_I2C_CLEAR_FLAG : Clear the specified I2C pending flag |
bogdanm | 0:9b334a45a8ff | 149 | (+) __HAL_I2C_ENABLE_IT: Enable the specified I2C interrupt |
bogdanm | 0:9b334a45a8ff | 150 | (+) __HAL_I2C_DISABLE_IT: Disable the specified I2C interrupt |
bogdanm | 0:9b334a45a8ff | 151 | (@) You can refer to the I2C HAL driver header file for more useful macros |
bogdanm | 0:9b334a45a8ff | 152 | |
bogdanm | 0:9b334a45a8ff | 153 | |
bogdanm | 0:9b334a45a8ff | 154 | *** I2C Workarounds linked to Silicon Limitation *** |
bogdanm | 0:9b334a45a8ff | 155 | ==================================================== |
bogdanm | 0:9b334a45a8ff | 156 | [..] |
bogdanm | 0:9b334a45a8ff | 157 | Below the list of all silicon limitations implemented for HAL on STM32F1xx product. |
bogdanm | 0:9b334a45a8ff | 158 | (@) See ErrataSheet to know full silicon limitation list of your product. |
bogdanm | 0:9b334a45a8ff | 159 | |
bogdanm | 0:9b334a45a8ff | 160 | (#) Workarounds Implemented inside I2C HAL Driver |
bogdanm | 0:9b334a45a8ff | 161 | (##) Wrong data read into data register (Polling and Interrupt mode) |
bogdanm | 0:9b334a45a8ff | 162 | (##) Start cannot be generated after a misplaced Stop |
bogdanm | 0:9b334a45a8ff | 163 | (##) Some software events must be managed before the current byte is being transferred: |
bogdanm | 0:9b334a45a8ff | 164 | Workaround: Use DMA in general, except when the Master is receiving a single byte. |
bogdanm | 0:9b334a45a8ff | 165 | For Interupt mode, I2C should have the highest priority in the application. |
bogdanm | 0:9b334a45a8ff | 166 | (##) Mismatch on the "Setup time for a repeated Start condition" timing parameter: |
bogdanm | 0:9b334a45a8ff | 167 | Workaround: Reduce the frequency down to 88 kHz or use the I2C Fast-mode if |
bogdanm | 0:9b334a45a8ff | 168 | supported by the slave. |
bogdanm | 0:9b334a45a8ff | 169 | (##) Data valid time (tVD;DAT) violated without the OVR flag being set: |
bogdanm | 0:9b334a45a8ff | 170 | Workaround: If the slave device allows it, use the clock stretching mechanism |
bogdanm | 0:9b334a45a8ff | 171 | by programming NoStretchMode = I2C_NOSTRETCH_DISABLE in HAL_I2C_Init. |
bogdanm | 0:9b334a45a8ff | 172 | |
bogdanm | 0:9b334a45a8ff | 173 | @endverbatim |
bogdanm | 0:9b334a45a8ff | 174 | ****************************************************************************** |
bogdanm | 0:9b334a45a8ff | 175 | * @attention |
bogdanm | 0:9b334a45a8ff | 176 | * |
mbed_official | 124:6a4a5b7d7324 | 177 | * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
bogdanm | 0:9b334a45a8ff | 178 | * |
bogdanm | 0:9b334a45a8ff | 179 | * Redistribution and use in source and binary forms, with or without modification, |
bogdanm | 0:9b334a45a8ff | 180 | * are permitted provided that the following conditions are met: |
bogdanm | 0:9b334a45a8ff | 181 | * 1. Redistributions of source code must retain the above copyright notice, |
bogdanm | 0:9b334a45a8ff | 182 | * this list of conditions and the following disclaimer. |
bogdanm | 0:9b334a45a8ff | 183 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
bogdanm | 0:9b334a45a8ff | 184 | * this list of conditions and the following disclaimer in the documentation |
bogdanm | 0:9b334a45a8ff | 185 | * and/or other materials provided with the distribution. |
bogdanm | 0:9b334a45a8ff | 186 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
bogdanm | 0:9b334a45a8ff | 187 | * may be used to endorse or promote products derived from this software |
bogdanm | 0:9b334a45a8ff | 188 | * without specific prior written permission. |
bogdanm | 0:9b334a45a8ff | 189 | * |
bogdanm | 0:9b334a45a8ff | 190 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
bogdanm | 0:9b334a45a8ff | 191 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
bogdanm | 0:9b334a45a8ff | 192 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
bogdanm | 0:9b334a45a8ff | 193 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
bogdanm | 0:9b334a45a8ff | 194 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
bogdanm | 0:9b334a45a8ff | 195 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
bogdanm | 0:9b334a45a8ff | 196 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
bogdanm | 0:9b334a45a8ff | 197 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
bogdanm | 0:9b334a45a8ff | 198 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
bogdanm | 0:9b334a45a8ff | 199 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
bogdanm | 0:9b334a45a8ff | 200 | * |
bogdanm | 0:9b334a45a8ff | 201 | ****************************************************************************** |
bogdanm | 0:9b334a45a8ff | 202 | */ |
bogdanm | 0:9b334a45a8ff | 203 | |
bogdanm | 0:9b334a45a8ff | 204 | /* Includes ------------------------------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 205 | #include "stm32f1xx_hal.h" |
bogdanm | 0:9b334a45a8ff | 206 | |
bogdanm | 0:9b334a45a8ff | 207 | /** @addtogroup STM32F1xx_HAL_Driver |
bogdanm | 0:9b334a45a8ff | 208 | * @{ |
bogdanm | 0:9b334a45a8ff | 209 | */ |
bogdanm | 0:9b334a45a8ff | 210 | |
bogdanm | 0:9b334a45a8ff | 211 | /** @defgroup I2C I2C |
bogdanm | 0:9b334a45a8ff | 212 | * @brief I2C HAL module driver |
bogdanm | 0:9b334a45a8ff | 213 | * @{ |
bogdanm | 0:9b334a45a8ff | 214 | */ |
bogdanm | 0:9b334a45a8ff | 215 | |
bogdanm | 0:9b334a45a8ff | 216 | #ifdef HAL_I2C_MODULE_ENABLED |
bogdanm | 0:9b334a45a8ff | 217 | |
bogdanm | 0:9b334a45a8ff | 218 | /* Private typedef -----------------------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 219 | /* Private constants ---------------------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 220 | /** @addtogroup I2C_Private_Constants I2C Private Constants |
bogdanm | 0:9b334a45a8ff | 221 | * @{ |
bogdanm | 0:9b334a45a8ff | 222 | */ |
mbed_official | 124:6a4a5b7d7324 | 223 | #define I2C_TIMEOUT_FLAG ((uint32_t)35) /*!< Timeout 35 ms */ |
mbed_official | 124:6a4a5b7d7324 | 224 | #define I2C_TIMEOUT_ADDR_SLAVE ((uint32_t)10000) /*!< Timeout 10 s */ |
mbed_official | 124:6a4a5b7d7324 | 225 | #define I2C_TIMEOUT_BUSY_FLAG ((uint32_t)10000) /*!< Timeout 10 s */ |
bogdanm | 0:9b334a45a8ff | 226 | /** |
bogdanm | 0:9b334a45a8ff | 227 | * @} |
bogdanm | 0:9b334a45a8ff | 228 | */ |
bogdanm | 0:9b334a45a8ff | 229 | |
bogdanm | 0:9b334a45a8ff | 230 | /* Private macro -------------------------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 231 | /* Private variables ---------------------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 232 | /* Private function prototypes -----------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 233 | /** @addtogroup I2C_Private_Functions I2C Private Functions |
bogdanm | 0:9b334a45a8ff | 234 | * @{ |
bogdanm | 0:9b334a45a8ff | 235 | */ |
bogdanm | 0:9b334a45a8ff | 236 | static void I2C_DMAMasterTransmitCplt(DMA_HandleTypeDef *hdma); |
bogdanm | 0:9b334a45a8ff | 237 | static void I2C_DMAMasterReceiveCplt(DMA_HandleTypeDef *hdma); |
bogdanm | 0:9b334a45a8ff | 238 | static void I2C_DMASlaveTransmitCplt(DMA_HandleTypeDef *hdma); |
bogdanm | 0:9b334a45a8ff | 239 | static void I2C_DMASlaveReceiveCplt(DMA_HandleTypeDef *hdma); |
bogdanm | 0:9b334a45a8ff | 240 | static void I2C_DMAMemTransmitCplt(DMA_HandleTypeDef *hdma); |
bogdanm | 0:9b334a45a8ff | 241 | static void I2C_DMAMemReceiveCplt(DMA_HandleTypeDef *hdma); |
bogdanm | 0:9b334a45a8ff | 242 | static void I2C_DMAError(DMA_HandleTypeDef *hdma); |
bogdanm | 0:9b334a45a8ff | 243 | |
bogdanm | 0:9b334a45a8ff | 244 | static HAL_StatusTypeDef I2C_MasterRequestWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout); |
bogdanm | 0:9b334a45a8ff | 245 | static HAL_StatusTypeDef I2C_MasterRequestRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout); |
bogdanm | 0:9b334a45a8ff | 246 | static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout); |
bogdanm | 0:9b334a45a8ff | 247 | static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout); |
bogdanm | 0:9b334a45a8ff | 248 | static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout); |
bogdanm | 0:9b334a45a8ff | 249 | static HAL_StatusTypeDef I2C_WaitOnMasterAddressFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, uint32_t Timeout); |
mbed_official | 124:6a4a5b7d7324 | 250 | static HAL_StatusTypeDef I2C_WaitOnTXEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout); |
mbed_official | 124:6a4a5b7d7324 | 251 | static HAL_StatusTypeDef I2C_WaitOnBTFFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout); |
mbed_official | 124:6a4a5b7d7324 | 252 | static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout); |
mbed_official | 124:6a4a5b7d7324 | 253 | static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout); |
mbed_official | 124:6a4a5b7d7324 | 254 | static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c); |
bogdanm | 0:9b334a45a8ff | 255 | |
bogdanm | 0:9b334a45a8ff | 256 | static HAL_StatusTypeDef I2C_MasterTransmit_TXE(I2C_HandleTypeDef *hi2c); |
bogdanm | 0:9b334a45a8ff | 257 | static HAL_StatusTypeDef I2C_MasterTransmit_BTF(I2C_HandleTypeDef *hi2c); |
bogdanm | 0:9b334a45a8ff | 258 | static HAL_StatusTypeDef I2C_MasterReceive_RXNE(I2C_HandleTypeDef *hi2c); |
bogdanm | 0:9b334a45a8ff | 259 | static HAL_StatusTypeDef I2C_MasterReceive_BTF(I2C_HandleTypeDef *hi2c); |
bogdanm | 0:9b334a45a8ff | 260 | |
bogdanm | 0:9b334a45a8ff | 261 | static HAL_StatusTypeDef I2C_SlaveTransmit_TXE(I2C_HandleTypeDef *hi2c); |
bogdanm | 0:9b334a45a8ff | 262 | static HAL_StatusTypeDef I2C_SlaveTransmit_BTF(I2C_HandleTypeDef *hi2c); |
bogdanm | 0:9b334a45a8ff | 263 | static HAL_StatusTypeDef I2C_SlaveReceive_RXNE(I2C_HandleTypeDef *hi2c); |
bogdanm | 0:9b334a45a8ff | 264 | static HAL_StatusTypeDef I2C_SlaveReceive_BTF(I2C_HandleTypeDef *hi2c); |
bogdanm | 0:9b334a45a8ff | 265 | static HAL_StatusTypeDef I2C_Slave_ADDR(I2C_HandleTypeDef *hi2c); |
bogdanm | 0:9b334a45a8ff | 266 | static HAL_StatusTypeDef I2C_Slave_STOPF(I2C_HandleTypeDef *hi2c); |
bogdanm | 0:9b334a45a8ff | 267 | static HAL_StatusTypeDef I2C_Slave_AF(I2C_HandleTypeDef *hi2c); |
bogdanm | 0:9b334a45a8ff | 268 | |
bogdanm | 0:9b334a45a8ff | 269 | static uint32_t I2C_Configure_Speed(I2C_HandleTypeDef *hi2c, uint32_t I2CClkSrcFreq); |
bogdanm | 0:9b334a45a8ff | 270 | /** |
bogdanm | 0:9b334a45a8ff | 271 | * @} |
bogdanm | 0:9b334a45a8ff | 272 | */ |
bogdanm | 0:9b334a45a8ff | 273 | |
bogdanm | 0:9b334a45a8ff | 274 | /* Exported functions ---------------------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 275 | |
bogdanm | 0:9b334a45a8ff | 276 | /** @defgroup I2C_Exported_Functions I2C Exported Functions |
bogdanm | 0:9b334a45a8ff | 277 | * @{ |
bogdanm | 0:9b334a45a8ff | 278 | */ |
bogdanm | 0:9b334a45a8ff | 279 | |
bogdanm | 0:9b334a45a8ff | 280 | /** @defgroup I2C_Exported_Functions_Group1 Initialization and de-initialization functions |
bogdanm | 0:9b334a45a8ff | 281 | * @brief Initialization and Configuration functions |
bogdanm | 0:9b334a45a8ff | 282 | * |
bogdanm | 0:9b334a45a8ff | 283 | @verbatim |
bogdanm | 0:9b334a45a8ff | 284 | =============================================================================== |
bogdanm | 0:9b334a45a8ff | 285 | ##### Initialization and de-initialization functions ##### |
bogdanm | 0:9b334a45a8ff | 286 | =============================================================================== |
bogdanm | 0:9b334a45a8ff | 287 | [..] This subsection provides a set of functions allowing to initialize and |
bogdanm | 0:9b334a45a8ff | 288 | de-initialiaze the I2Cx peripheral: |
bogdanm | 0:9b334a45a8ff | 289 | |
bogdanm | 0:9b334a45a8ff | 290 | (+) User must Implement HAL_I2C_MspInit() function in which he configures |
bogdanm | 0:9b334a45a8ff | 291 | all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC). |
bogdanm | 0:9b334a45a8ff | 292 | |
bogdanm | 0:9b334a45a8ff | 293 | (+) Call the function HAL_I2C_Init() to configure the selected device with |
bogdanm | 0:9b334a45a8ff | 294 | the selected configuration: |
bogdanm | 0:9b334a45a8ff | 295 | (++) Communication Speed |
bogdanm | 0:9b334a45a8ff | 296 | (++) Duty cycle |
bogdanm | 0:9b334a45a8ff | 297 | (++) Addressing mode |
bogdanm | 0:9b334a45a8ff | 298 | (++) Own Address 1 |
bogdanm | 0:9b334a45a8ff | 299 | (++) Dual Addressing mode |
bogdanm | 0:9b334a45a8ff | 300 | (++) Own Address 2 |
bogdanm | 0:9b334a45a8ff | 301 | (++) General call mode |
bogdanm | 0:9b334a45a8ff | 302 | (++) Nostretch mode |
bogdanm | 0:9b334a45a8ff | 303 | |
bogdanm | 0:9b334a45a8ff | 304 | (+) Call the function HAL_I2C_DeInit() to restore the default configuration |
bogdanm | 0:9b334a45a8ff | 305 | of the selected I2Cx periperal. |
bogdanm | 0:9b334a45a8ff | 306 | |
bogdanm | 0:9b334a45a8ff | 307 | @endverbatim |
bogdanm | 0:9b334a45a8ff | 308 | * @{ |
bogdanm | 0:9b334a45a8ff | 309 | */ |
bogdanm | 0:9b334a45a8ff | 310 | |
bogdanm | 0:9b334a45a8ff | 311 | /** |
bogdanm | 0:9b334a45a8ff | 312 | * @brief Initializes the I2C according to the specified parameters |
mbed_official | 124:6a4a5b7d7324 | 313 | * in the I2C_InitTypeDef and initialize the associated handle. |
mbed_official | 124:6a4a5b7d7324 | 314 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 315 | * the configuration information for the specified I2C. |
bogdanm | 0:9b334a45a8ff | 316 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 317 | */ |
bogdanm | 0:9b334a45a8ff | 318 | HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c) |
bogdanm | 0:9b334a45a8ff | 319 | { |
bogdanm | 0:9b334a45a8ff | 320 | uint32_t freqrange = 0; |
bogdanm | 0:9b334a45a8ff | 321 | uint32_t pclk1 = 0; |
bogdanm | 0:9b334a45a8ff | 322 | |
bogdanm | 0:9b334a45a8ff | 323 | /* Check the I2C handle allocation */ |
bogdanm | 0:9b334a45a8ff | 324 | if(hi2c == NULL) |
bogdanm | 0:9b334a45a8ff | 325 | { |
bogdanm | 0:9b334a45a8ff | 326 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 327 | } |
bogdanm | 0:9b334a45a8ff | 328 | |
bogdanm | 0:9b334a45a8ff | 329 | /* Check the parameters */ |
bogdanm | 0:9b334a45a8ff | 330 | assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance)); |
bogdanm | 0:9b334a45a8ff | 331 | assert_param(IS_I2C_CLOCK_SPEED(hi2c->Init.ClockSpeed)); |
bogdanm | 0:9b334a45a8ff | 332 | assert_param(IS_I2C_DUTY_CYCLE(hi2c->Init.DutyCycle)); |
bogdanm | 0:9b334a45a8ff | 333 | assert_param(IS_I2C_OWN_ADDRESS1(hi2c->Init.OwnAddress1)); |
bogdanm | 0:9b334a45a8ff | 334 | assert_param(IS_I2C_ADDRESSING_MODE(hi2c->Init.AddressingMode)); |
bogdanm | 0:9b334a45a8ff | 335 | assert_param(IS_I2C_DUAL_ADDRESS(hi2c->Init.DualAddressMode)); |
bogdanm | 0:9b334a45a8ff | 336 | assert_param(IS_I2C_OWN_ADDRESS2(hi2c->Init.OwnAddress2)); |
bogdanm | 0:9b334a45a8ff | 337 | assert_param(IS_I2C_GENERAL_CALL(hi2c->Init.GeneralCallMode)); |
bogdanm | 0:9b334a45a8ff | 338 | assert_param(IS_I2C_NO_STRETCH(hi2c->Init.NoStretchMode)); |
bogdanm | 0:9b334a45a8ff | 339 | |
bogdanm | 0:9b334a45a8ff | 340 | if(hi2c->State == HAL_I2C_STATE_RESET) |
bogdanm | 0:9b334a45a8ff | 341 | { |
bogdanm | 0:9b334a45a8ff | 342 | /* Allocate lock resource and initialize it */ |
mbed_official | 124:6a4a5b7d7324 | 343 | hi2c->Lock = HAL_UNLOCKED; |
bogdanm | 0:9b334a45a8ff | 344 | |
bogdanm | 0:9b334a45a8ff | 345 | /* Init the low level hardware : GPIO, CLOCK, NVIC */ |
bogdanm | 0:9b334a45a8ff | 346 | HAL_I2C_MspInit(hi2c); |
bogdanm | 0:9b334a45a8ff | 347 | } |
bogdanm | 0:9b334a45a8ff | 348 | |
bogdanm | 0:9b334a45a8ff | 349 | hi2c->State = HAL_I2C_STATE_BUSY; |
bogdanm | 0:9b334a45a8ff | 350 | |
bogdanm | 0:9b334a45a8ff | 351 | /* Disable the selected I2C peripheral */ |
bogdanm | 0:9b334a45a8ff | 352 | __HAL_I2C_DISABLE(hi2c); |
bogdanm | 0:9b334a45a8ff | 353 | |
bogdanm | 0:9b334a45a8ff | 354 | /* Get PCLK1 frequency */ |
bogdanm | 0:9b334a45a8ff | 355 | pclk1 = HAL_RCC_GetPCLK1Freq(); |
bogdanm | 0:9b334a45a8ff | 356 | |
bogdanm | 0:9b334a45a8ff | 357 | /* Calculate frequency range */ |
bogdanm | 0:9b334a45a8ff | 358 | freqrange = I2C_FREQ_RANGE(pclk1); |
bogdanm | 0:9b334a45a8ff | 359 | |
bogdanm | 0:9b334a45a8ff | 360 | /*---------------------------- I2Cx CR2 Configuration ----------------------*/ |
bogdanm | 0:9b334a45a8ff | 361 | /* Configure I2Cx: Frequency range */ |
bogdanm | 0:9b334a45a8ff | 362 | hi2c->Instance->CR2 = freqrange; |
bogdanm | 0:9b334a45a8ff | 363 | |
bogdanm | 0:9b334a45a8ff | 364 | /*---------------------------- I2Cx TRISE Configuration --------------------*/ |
bogdanm | 0:9b334a45a8ff | 365 | /* Configure I2Cx: Rise Time */ |
bogdanm | 0:9b334a45a8ff | 366 | hi2c->Instance->TRISE = I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed); |
bogdanm | 0:9b334a45a8ff | 367 | |
bogdanm | 0:9b334a45a8ff | 368 | /*---------------------------- I2Cx CCR Configuration ----------------------*/ |
bogdanm | 0:9b334a45a8ff | 369 | /* Configure I2Cx: Speed */ |
bogdanm | 0:9b334a45a8ff | 370 | hi2c->Instance->CCR = I2C_Configure_Speed(hi2c, pclk1); |
bogdanm | 0:9b334a45a8ff | 371 | |
bogdanm | 0:9b334a45a8ff | 372 | /*---------------------------- I2Cx CR1 Configuration ----------------------*/ |
bogdanm | 0:9b334a45a8ff | 373 | /* Configure I2Cx: Generalcall and NoStretch mode */ |
bogdanm | 0:9b334a45a8ff | 374 | hi2c->Instance->CR1 = (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode); |
bogdanm | 0:9b334a45a8ff | 375 | |
bogdanm | 0:9b334a45a8ff | 376 | /*---------------------------- I2Cx OAR1 Configuration ---------------------*/ |
bogdanm | 0:9b334a45a8ff | 377 | /* Configure I2Cx: Own Address1 and addressing mode */ |
bogdanm | 0:9b334a45a8ff | 378 | hi2c->Instance->OAR1 = (hi2c->Init.AddressingMode | hi2c->Init.OwnAddress1); |
bogdanm | 0:9b334a45a8ff | 379 | |
bogdanm | 0:9b334a45a8ff | 380 | /*---------------------------- I2Cx OAR2 Configuration ---------------------*/ |
bogdanm | 0:9b334a45a8ff | 381 | /* Configure I2Cx: Dual mode and Own Address2 */ |
bogdanm | 0:9b334a45a8ff | 382 | hi2c->Instance->OAR2 = (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2); |
bogdanm | 0:9b334a45a8ff | 383 | |
bogdanm | 0:9b334a45a8ff | 384 | /* Enable the selected I2C peripheral */ |
bogdanm | 0:9b334a45a8ff | 385 | __HAL_I2C_ENABLE(hi2c); |
bogdanm | 0:9b334a45a8ff | 386 | |
bogdanm | 0:9b334a45a8ff | 387 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
bogdanm | 0:9b334a45a8ff | 388 | hi2c->State = HAL_I2C_STATE_READY; |
mbed_official | 124:6a4a5b7d7324 | 389 | hi2c->Mode = HAL_I2C_MODE_NONE; |
bogdanm | 0:9b334a45a8ff | 390 | |
bogdanm | 0:9b334a45a8ff | 391 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 392 | } |
bogdanm | 0:9b334a45a8ff | 393 | |
bogdanm | 0:9b334a45a8ff | 394 | /** |
mbed_official | 124:6a4a5b7d7324 | 395 | * @brief DeInitialize the I2C peripheral. |
mbed_official | 124:6a4a5b7d7324 | 396 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 397 | * the configuration information for the specified I2C. |
bogdanm | 0:9b334a45a8ff | 398 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 399 | */ |
bogdanm | 0:9b334a45a8ff | 400 | HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c) |
bogdanm | 0:9b334a45a8ff | 401 | { |
bogdanm | 0:9b334a45a8ff | 402 | /* Check the I2C handle allocation */ |
bogdanm | 0:9b334a45a8ff | 403 | if(hi2c == NULL) |
bogdanm | 0:9b334a45a8ff | 404 | { |
bogdanm | 0:9b334a45a8ff | 405 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 406 | } |
bogdanm | 0:9b334a45a8ff | 407 | |
bogdanm | 0:9b334a45a8ff | 408 | /* Check the parameters */ |
bogdanm | 0:9b334a45a8ff | 409 | assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance)); |
bogdanm | 0:9b334a45a8ff | 410 | |
bogdanm | 0:9b334a45a8ff | 411 | hi2c->State = HAL_I2C_STATE_BUSY; |
bogdanm | 0:9b334a45a8ff | 412 | |
bogdanm | 0:9b334a45a8ff | 413 | /* Disable the I2C Peripheral Clock */ |
bogdanm | 0:9b334a45a8ff | 414 | __HAL_I2C_DISABLE(hi2c); |
bogdanm | 0:9b334a45a8ff | 415 | |
bogdanm | 0:9b334a45a8ff | 416 | /* DeInit the low level hardware: GPIO, CLOCK, NVIC */ |
bogdanm | 0:9b334a45a8ff | 417 | HAL_I2C_MspDeInit(hi2c); |
bogdanm | 0:9b334a45a8ff | 418 | |
bogdanm | 0:9b334a45a8ff | 419 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
bogdanm | 0:9b334a45a8ff | 420 | hi2c->State = HAL_I2C_STATE_RESET; |
mbed_official | 124:6a4a5b7d7324 | 421 | hi2c->Mode = HAL_I2C_MODE_NONE; |
bogdanm | 0:9b334a45a8ff | 422 | |
bogdanm | 0:9b334a45a8ff | 423 | /* Release Lock */ |
bogdanm | 0:9b334a45a8ff | 424 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 425 | |
bogdanm | 0:9b334a45a8ff | 426 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 427 | } |
bogdanm | 0:9b334a45a8ff | 428 | |
bogdanm | 0:9b334a45a8ff | 429 | /** |
mbed_official | 124:6a4a5b7d7324 | 430 | * @brief Initialize the I2C MSP. |
mbed_official | 124:6a4a5b7d7324 | 431 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 432 | * the configuration information for the specified I2C. |
bogdanm | 0:9b334a45a8ff | 433 | * @retval None |
bogdanm | 0:9b334a45a8ff | 434 | */ |
bogdanm | 0:9b334a45a8ff | 435 | __weak void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c) |
bogdanm | 0:9b334a45a8ff | 436 | { |
mbed_official | 124:6a4a5b7d7324 | 437 | /* Prevent unused argument(s) compilation warning */ |
mbed_official | 124:6a4a5b7d7324 | 438 | UNUSED(hi2c); |
mbed_official | 124:6a4a5b7d7324 | 439 | /* NOTE : This function should not be modified, when the callback is needed, |
bogdanm | 0:9b334a45a8ff | 440 | the HAL_I2C_MspInit could be implemented in the user file |
bogdanm | 0:9b334a45a8ff | 441 | */ |
bogdanm | 0:9b334a45a8ff | 442 | } |
bogdanm | 0:9b334a45a8ff | 443 | |
bogdanm | 0:9b334a45a8ff | 444 | /** |
mbed_official | 124:6a4a5b7d7324 | 445 | * @brief DeInitialize the I2C MSP. |
mbed_official | 124:6a4a5b7d7324 | 446 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 447 | * the configuration information for the specified I2C. |
bogdanm | 0:9b334a45a8ff | 448 | * @retval None |
bogdanm | 0:9b334a45a8ff | 449 | */ |
bogdanm | 0:9b334a45a8ff | 450 | __weak void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c) |
bogdanm | 0:9b334a45a8ff | 451 | { |
mbed_official | 124:6a4a5b7d7324 | 452 | /* Prevent unused argument(s) compilation warning */ |
mbed_official | 124:6a4a5b7d7324 | 453 | UNUSED(hi2c); |
mbed_official | 124:6a4a5b7d7324 | 454 | /* NOTE : This function should not be modified, when the callback is needed, |
bogdanm | 0:9b334a45a8ff | 455 | the HAL_I2C_MspDeInit could be implemented in the user file |
bogdanm | 0:9b334a45a8ff | 456 | */ |
bogdanm | 0:9b334a45a8ff | 457 | } |
bogdanm | 0:9b334a45a8ff | 458 | |
bogdanm | 0:9b334a45a8ff | 459 | /** |
bogdanm | 0:9b334a45a8ff | 460 | * @} |
bogdanm | 0:9b334a45a8ff | 461 | */ |
bogdanm | 0:9b334a45a8ff | 462 | |
bogdanm | 0:9b334a45a8ff | 463 | /** @defgroup I2C_Exported_Functions_Group2 Input and Output operation functions |
bogdanm | 0:9b334a45a8ff | 464 | * @brief Data transfers functions |
bogdanm | 0:9b334a45a8ff | 465 | * |
bogdanm | 0:9b334a45a8ff | 466 | @verbatim |
bogdanm | 0:9b334a45a8ff | 467 | =============================================================================== |
bogdanm | 0:9b334a45a8ff | 468 | ##### IO operation functions ##### |
bogdanm | 0:9b334a45a8ff | 469 | =============================================================================== |
bogdanm | 0:9b334a45a8ff | 470 | [..] |
bogdanm | 0:9b334a45a8ff | 471 | This subsection provides a set of functions allowing to manage the I2C data |
bogdanm | 0:9b334a45a8ff | 472 | transfers. |
bogdanm | 0:9b334a45a8ff | 473 | |
bogdanm | 0:9b334a45a8ff | 474 | (#) There are two modes of transfer: |
bogdanm | 0:9b334a45a8ff | 475 | (++) Blocking mode : The communication is performed in the polling mode. |
bogdanm | 0:9b334a45a8ff | 476 | The status of all data processing is returned by the same function |
bogdanm | 0:9b334a45a8ff | 477 | after finishing transfer. |
mbed_official | 124:6a4a5b7d7324 | 478 | (++) No-Blocking mode : The communication is performed using Interrupts |
bogdanm | 0:9b334a45a8ff | 479 | or DMA. These functions return the status of the transfer startup. |
bogdanm | 0:9b334a45a8ff | 480 | The end of the data processing will be indicated through the |
bogdanm | 0:9b334a45a8ff | 481 | dedicated I2C IRQ when using Interrupt mode or the DMA IRQ when |
bogdanm | 0:9b334a45a8ff | 482 | using DMA mode. |
bogdanm | 0:9b334a45a8ff | 483 | |
bogdanm | 0:9b334a45a8ff | 484 | (#) Blocking mode functions are : |
bogdanm | 0:9b334a45a8ff | 485 | (++) HAL_I2C_Master_Transmit() |
bogdanm | 0:9b334a45a8ff | 486 | (++) HAL_I2C_Master_Receive() |
bogdanm | 0:9b334a45a8ff | 487 | (++) HAL_I2C_Slave_Transmit() |
bogdanm | 0:9b334a45a8ff | 488 | (++) HAL_I2C_Slave_Receive() |
bogdanm | 0:9b334a45a8ff | 489 | (++) HAL_I2C_Mem_Write() |
bogdanm | 0:9b334a45a8ff | 490 | (++) HAL_I2C_Mem_Read() |
bogdanm | 0:9b334a45a8ff | 491 | (++) HAL_I2C_IsDeviceReady() |
bogdanm | 0:9b334a45a8ff | 492 | |
bogdanm | 0:9b334a45a8ff | 493 | (#) No-Blocking mode functions with Interrupt are : |
bogdanm | 0:9b334a45a8ff | 494 | (++) HAL_I2C_Master_Transmit_IT() |
bogdanm | 0:9b334a45a8ff | 495 | (++) HAL_I2C_Master_Receive_IT() |
bogdanm | 0:9b334a45a8ff | 496 | (++) HAL_I2C_Slave_Transmit_IT() |
bogdanm | 0:9b334a45a8ff | 497 | (++) HAL_I2C_Slave_Receive_IT() |
bogdanm | 0:9b334a45a8ff | 498 | (++) HAL_I2C_Mem_Write_IT() |
bogdanm | 0:9b334a45a8ff | 499 | (++) HAL_I2C_Mem_Read_IT() |
bogdanm | 0:9b334a45a8ff | 500 | |
bogdanm | 0:9b334a45a8ff | 501 | (#) No-Blocking mode functions with DMA are : |
bogdanm | 0:9b334a45a8ff | 502 | (++) HAL_I2C_Master_Transmit_DMA() |
bogdanm | 0:9b334a45a8ff | 503 | (++) HAL_I2C_Master_Receive_DMA() |
bogdanm | 0:9b334a45a8ff | 504 | (++) HAL_I2C_Slave_Transmit_DMA() |
bogdanm | 0:9b334a45a8ff | 505 | (++) HAL_I2C_Slave_Receive_DMA() |
bogdanm | 0:9b334a45a8ff | 506 | (++) HAL_I2C_Mem_Write_DMA() |
bogdanm | 0:9b334a45a8ff | 507 | (++) HAL_I2C_Mem_Read_DMA() |
bogdanm | 0:9b334a45a8ff | 508 | |
bogdanm | 0:9b334a45a8ff | 509 | (#) A set of Transfer Complete Callbacks are provided in non Blocking mode: |
bogdanm | 0:9b334a45a8ff | 510 | (++) HAL_I2C_MemTxCpltCallback() |
bogdanm | 0:9b334a45a8ff | 511 | (++) HAL_I2C_MemRxCpltCallback() |
bogdanm | 0:9b334a45a8ff | 512 | (++) HAL_I2C_MasterTxCpltCallback() |
bogdanm | 0:9b334a45a8ff | 513 | (++) HAL_I2C_MasterRxCpltCallback() |
bogdanm | 0:9b334a45a8ff | 514 | (++) HAL_I2C_SlaveTxCpltCallback() |
bogdanm | 0:9b334a45a8ff | 515 | (++) HAL_I2C_SlaveRxCpltCallback() |
bogdanm | 0:9b334a45a8ff | 516 | (++) HAL_I2C_ErrorCallback() |
bogdanm | 0:9b334a45a8ff | 517 | |
bogdanm | 0:9b334a45a8ff | 518 | @endverbatim |
bogdanm | 0:9b334a45a8ff | 519 | * @{ |
bogdanm | 0:9b334a45a8ff | 520 | */ |
bogdanm | 0:9b334a45a8ff | 521 | |
bogdanm | 0:9b334a45a8ff | 522 | /** |
bogdanm | 0:9b334a45a8ff | 523 | * @brief Transmits in master mode an amount of data in blocking mode. |
mbed_official | 124:6a4a5b7d7324 | 524 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 525 | * the configuration information for the specified I2C. |
mbed_official | 124:6a4a5b7d7324 | 526 | * @param DevAddress Target device address |
mbed_official | 124:6a4a5b7d7324 | 527 | * @param pData Pointer to data buffer |
mbed_official | 124:6a4a5b7d7324 | 528 | * @param Size Amount of data to be sent |
mbed_official | 124:6a4a5b7d7324 | 529 | * @param Timeout Timeout duration |
bogdanm | 0:9b334a45a8ff | 530 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 531 | */ |
bogdanm | 0:9b334a45a8ff | 532 | HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout) |
bogdanm | 0:9b334a45a8ff | 533 | { |
bogdanm | 0:9b334a45a8ff | 534 | if(hi2c->State == HAL_I2C_STATE_READY) |
bogdanm | 0:9b334a45a8ff | 535 | { |
bogdanm | 0:9b334a45a8ff | 536 | if((pData == NULL) || (Size == 0)) |
bogdanm | 0:9b334a45a8ff | 537 | { |
bogdanm | 0:9b334a45a8ff | 538 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 539 | } |
bogdanm | 0:9b334a45a8ff | 540 | |
mbed_official | 124:6a4a5b7d7324 | 541 | /* Wait until BUSY flag is reset */ |
mbed_official | 124:6a4a5b7d7324 | 542 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 543 | { |
bogdanm | 0:9b334a45a8ff | 544 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 545 | } |
bogdanm | 0:9b334a45a8ff | 546 | |
bogdanm | 0:9b334a45a8ff | 547 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 548 | __HAL_LOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 549 | |
mbed_official | 124:6a4a5b7d7324 | 550 | /* Disable Pos */ |
mbed_official | 124:6a4a5b7d7324 | 551 | CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); |
mbed_official | 124:6a4a5b7d7324 | 552 | |
bogdanm | 0:9b334a45a8ff | 553 | hi2c->State = HAL_I2C_STATE_BUSY_TX; |
mbed_official | 124:6a4a5b7d7324 | 554 | hi2c->Mode = HAL_I2C_MODE_MASTER; |
bogdanm | 0:9b334a45a8ff | 555 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
bogdanm | 0:9b334a45a8ff | 556 | |
bogdanm | 0:9b334a45a8ff | 557 | /* Send Slave Address */ |
bogdanm | 0:9b334a45a8ff | 558 | if(I2C_MasterRequestWrite(hi2c, DevAddress, Timeout) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 559 | { |
bogdanm | 0:9b334a45a8ff | 560 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
bogdanm | 0:9b334a45a8ff | 561 | { |
bogdanm | 0:9b334a45a8ff | 562 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 563 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 564 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 565 | } |
bogdanm | 0:9b334a45a8ff | 566 | else |
bogdanm | 0:9b334a45a8ff | 567 | { |
bogdanm | 0:9b334a45a8ff | 568 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 569 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 570 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 571 | } |
bogdanm | 0:9b334a45a8ff | 572 | } |
bogdanm | 0:9b334a45a8ff | 573 | |
bogdanm | 0:9b334a45a8ff | 574 | /* Clear ADDR flag */ |
bogdanm | 0:9b334a45a8ff | 575 | __HAL_I2C_CLEAR_ADDRFLAG(hi2c); |
bogdanm | 0:9b334a45a8ff | 576 | |
bogdanm | 0:9b334a45a8ff | 577 | while(Size > 0) |
bogdanm | 0:9b334a45a8ff | 578 | { |
bogdanm | 0:9b334a45a8ff | 579 | /* Wait until TXE flag is set */ |
mbed_official | 124:6a4a5b7d7324 | 580 | if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 581 | { |
mbed_official | 124:6a4a5b7d7324 | 582 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
mbed_official | 124:6a4a5b7d7324 | 583 | { |
mbed_official | 124:6a4a5b7d7324 | 584 | /* Generate Stop */ |
mbed_official | 124:6a4a5b7d7324 | 585 | SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP); |
mbed_official | 124:6a4a5b7d7324 | 586 | return HAL_ERROR; |
mbed_official | 124:6a4a5b7d7324 | 587 | } |
mbed_official | 124:6a4a5b7d7324 | 588 | else |
mbed_official | 124:6a4a5b7d7324 | 589 | { |
mbed_official | 124:6a4a5b7d7324 | 590 | return HAL_TIMEOUT; |
mbed_official | 124:6a4a5b7d7324 | 591 | } |
bogdanm | 0:9b334a45a8ff | 592 | } |
bogdanm | 0:9b334a45a8ff | 593 | |
bogdanm | 0:9b334a45a8ff | 594 | /* Write data to DR */ |
bogdanm | 0:9b334a45a8ff | 595 | hi2c->Instance->DR = (*pData++); |
bogdanm | 0:9b334a45a8ff | 596 | Size--; |
bogdanm | 0:9b334a45a8ff | 597 | |
bogdanm | 0:9b334a45a8ff | 598 | if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (Size != 0)) |
bogdanm | 0:9b334a45a8ff | 599 | { |
bogdanm | 0:9b334a45a8ff | 600 | /* Write data to DR */ |
bogdanm | 0:9b334a45a8ff | 601 | hi2c->Instance->DR = (*pData++); |
bogdanm | 0:9b334a45a8ff | 602 | Size--; |
bogdanm | 0:9b334a45a8ff | 603 | } |
bogdanm | 0:9b334a45a8ff | 604 | } |
bogdanm | 0:9b334a45a8ff | 605 | |
mbed_official | 124:6a4a5b7d7324 | 606 | /* Wait until BTF flag is set */ |
mbed_official | 124:6a4a5b7d7324 | 607 | if(I2C_WaitOnBTFFlagUntilTimeout(hi2c, Timeout) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 608 | { |
mbed_official | 124:6a4a5b7d7324 | 609 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
mbed_official | 124:6a4a5b7d7324 | 610 | { |
mbed_official | 124:6a4a5b7d7324 | 611 | /* Generate Stop */ |
mbed_official | 124:6a4a5b7d7324 | 612 | SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP); |
mbed_official | 124:6a4a5b7d7324 | 613 | return HAL_ERROR; |
mbed_official | 124:6a4a5b7d7324 | 614 | } |
mbed_official | 124:6a4a5b7d7324 | 615 | else |
mbed_official | 124:6a4a5b7d7324 | 616 | { |
mbed_official | 124:6a4a5b7d7324 | 617 | return HAL_TIMEOUT; |
mbed_official | 124:6a4a5b7d7324 | 618 | } |
bogdanm | 0:9b334a45a8ff | 619 | } |
bogdanm | 0:9b334a45a8ff | 620 | |
bogdanm | 0:9b334a45a8ff | 621 | /* Generate Stop */ |
bogdanm | 0:9b334a45a8ff | 622 | SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); |
bogdanm | 0:9b334a45a8ff | 623 | |
bogdanm | 0:9b334a45a8ff | 624 | hi2c->State = HAL_I2C_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 625 | |
bogdanm | 0:9b334a45a8ff | 626 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 627 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 628 | |
bogdanm | 0:9b334a45a8ff | 629 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 630 | } |
bogdanm | 0:9b334a45a8ff | 631 | else |
bogdanm | 0:9b334a45a8ff | 632 | { |
bogdanm | 0:9b334a45a8ff | 633 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 634 | } |
bogdanm | 0:9b334a45a8ff | 635 | } |
bogdanm | 0:9b334a45a8ff | 636 | |
bogdanm | 0:9b334a45a8ff | 637 | /** |
bogdanm | 0:9b334a45a8ff | 638 | * @brief Receives in master mode an amount of data in blocking mode. |
mbed_official | 124:6a4a5b7d7324 | 639 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 640 | * the configuration information for the specified I2C. |
mbed_official | 124:6a4a5b7d7324 | 641 | * @param DevAddress Target device address |
mbed_official | 124:6a4a5b7d7324 | 642 | * @param pData Pointer to data buffer |
mbed_official | 124:6a4a5b7d7324 | 643 | * @param Size Amount of data to be sent |
mbed_official | 124:6a4a5b7d7324 | 644 | * @param Timeout Timeout duration |
bogdanm | 0:9b334a45a8ff | 645 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 646 | */ |
bogdanm | 0:9b334a45a8ff | 647 | HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout) |
bogdanm | 0:9b334a45a8ff | 648 | { |
bogdanm | 0:9b334a45a8ff | 649 | if(hi2c->State == HAL_I2C_STATE_READY) |
bogdanm | 0:9b334a45a8ff | 650 | { |
bogdanm | 0:9b334a45a8ff | 651 | if((pData == NULL) || (Size == 0)) |
bogdanm | 0:9b334a45a8ff | 652 | { |
bogdanm | 0:9b334a45a8ff | 653 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 654 | } |
bogdanm | 0:9b334a45a8ff | 655 | |
mbed_official | 124:6a4a5b7d7324 | 656 | /* Wait until BUSY flag is reset */ |
mbed_official | 124:6a4a5b7d7324 | 657 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 658 | { |
bogdanm | 0:9b334a45a8ff | 659 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 660 | } |
bogdanm | 0:9b334a45a8ff | 661 | |
bogdanm | 0:9b334a45a8ff | 662 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 663 | __HAL_LOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 664 | |
mbed_official | 124:6a4a5b7d7324 | 665 | /* Disable Pos */ |
mbed_official | 124:6a4a5b7d7324 | 666 | CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); |
mbed_official | 124:6a4a5b7d7324 | 667 | |
bogdanm | 0:9b334a45a8ff | 668 | hi2c->State = HAL_I2C_STATE_BUSY_RX; |
mbed_official | 124:6a4a5b7d7324 | 669 | hi2c->Mode = HAL_I2C_MODE_MASTER; |
bogdanm | 0:9b334a45a8ff | 670 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
bogdanm | 0:9b334a45a8ff | 671 | |
bogdanm | 0:9b334a45a8ff | 672 | /* Send Slave Address */ |
bogdanm | 0:9b334a45a8ff | 673 | if(I2C_MasterRequestRead(hi2c, DevAddress, Timeout) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 674 | { |
bogdanm | 0:9b334a45a8ff | 675 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
bogdanm | 0:9b334a45a8ff | 676 | { |
bogdanm | 0:9b334a45a8ff | 677 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 678 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 679 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 680 | } |
bogdanm | 0:9b334a45a8ff | 681 | else |
bogdanm | 0:9b334a45a8ff | 682 | { |
bogdanm | 0:9b334a45a8ff | 683 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 684 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 685 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 686 | } |
bogdanm | 0:9b334a45a8ff | 687 | } |
bogdanm | 0:9b334a45a8ff | 688 | |
bogdanm | 0:9b334a45a8ff | 689 | if(Size == 1) |
bogdanm | 0:9b334a45a8ff | 690 | { |
bogdanm | 0:9b334a45a8ff | 691 | /* Disable Acknowledge */ |
bogdanm | 0:9b334a45a8ff | 692 | CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); |
bogdanm | 0:9b334a45a8ff | 693 | |
bogdanm | 0:9b334a45a8ff | 694 | /* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3 |
bogdanm | 0:9b334a45a8ff | 695 | software sequence must complete before the current byte end of transfer */ |
bogdanm | 0:9b334a45a8ff | 696 | __disable_irq(); |
bogdanm | 0:9b334a45a8ff | 697 | |
bogdanm | 0:9b334a45a8ff | 698 | /* Clear ADDR flag */ |
bogdanm | 0:9b334a45a8ff | 699 | __HAL_I2C_CLEAR_ADDRFLAG(hi2c); |
bogdanm | 0:9b334a45a8ff | 700 | |
bogdanm | 0:9b334a45a8ff | 701 | /* Generate Stop */ |
bogdanm | 0:9b334a45a8ff | 702 | SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); |
bogdanm | 0:9b334a45a8ff | 703 | |
bogdanm | 0:9b334a45a8ff | 704 | /* Re-enable IRQs */ |
bogdanm | 0:9b334a45a8ff | 705 | __enable_irq(); |
bogdanm | 0:9b334a45a8ff | 706 | } |
bogdanm | 0:9b334a45a8ff | 707 | else if(Size == 2) |
bogdanm | 0:9b334a45a8ff | 708 | { |
bogdanm | 0:9b334a45a8ff | 709 | /* Enable Pos */ |
bogdanm | 0:9b334a45a8ff | 710 | SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS); |
bogdanm | 0:9b334a45a8ff | 711 | |
bogdanm | 0:9b334a45a8ff | 712 | /* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3 |
bogdanm | 0:9b334a45a8ff | 713 | software sequence must complete before the current byte end of transfer */ |
bogdanm | 0:9b334a45a8ff | 714 | __disable_irq(); |
bogdanm | 0:9b334a45a8ff | 715 | |
bogdanm | 0:9b334a45a8ff | 716 | /* Clear ADDR flag */ |
bogdanm | 0:9b334a45a8ff | 717 | __HAL_I2C_CLEAR_ADDRFLAG(hi2c); |
bogdanm | 0:9b334a45a8ff | 718 | |
bogdanm | 0:9b334a45a8ff | 719 | /* Disable Acknowledge */ |
bogdanm | 0:9b334a45a8ff | 720 | CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); |
bogdanm | 0:9b334a45a8ff | 721 | |
bogdanm | 0:9b334a45a8ff | 722 | /* Re-enable IRQs */ |
bogdanm | 0:9b334a45a8ff | 723 | __enable_irq(); |
bogdanm | 0:9b334a45a8ff | 724 | } |
bogdanm | 0:9b334a45a8ff | 725 | else |
bogdanm | 0:9b334a45a8ff | 726 | { |
bogdanm | 0:9b334a45a8ff | 727 | /* Enable Acknowledge */ |
bogdanm | 0:9b334a45a8ff | 728 | SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); |
bogdanm | 0:9b334a45a8ff | 729 | |
bogdanm | 0:9b334a45a8ff | 730 | /* Clear ADDR flag */ |
bogdanm | 0:9b334a45a8ff | 731 | __HAL_I2C_CLEAR_ADDRFLAG(hi2c); |
bogdanm | 0:9b334a45a8ff | 732 | } |
bogdanm | 0:9b334a45a8ff | 733 | |
bogdanm | 0:9b334a45a8ff | 734 | while(Size > 0) |
bogdanm | 0:9b334a45a8ff | 735 | { |
bogdanm | 0:9b334a45a8ff | 736 | if(Size <= 3) |
bogdanm | 0:9b334a45a8ff | 737 | { |
bogdanm | 0:9b334a45a8ff | 738 | /* One byte */ |
bogdanm | 0:9b334a45a8ff | 739 | if(Size == 1) |
bogdanm | 0:9b334a45a8ff | 740 | { |
bogdanm | 0:9b334a45a8ff | 741 | /* Wait until RXNE flag is set */ |
mbed_official | 124:6a4a5b7d7324 | 742 | if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 743 | { |
mbed_official | 124:6a4a5b7d7324 | 744 | if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT) |
mbed_official | 124:6a4a5b7d7324 | 745 | { |
mbed_official | 124:6a4a5b7d7324 | 746 | return HAL_TIMEOUT; |
mbed_official | 124:6a4a5b7d7324 | 747 | } |
mbed_official | 124:6a4a5b7d7324 | 748 | else |
mbed_official | 124:6a4a5b7d7324 | 749 | { |
mbed_official | 124:6a4a5b7d7324 | 750 | return HAL_ERROR; |
mbed_official | 124:6a4a5b7d7324 | 751 | } |
bogdanm | 0:9b334a45a8ff | 752 | } |
bogdanm | 0:9b334a45a8ff | 753 | |
bogdanm | 0:9b334a45a8ff | 754 | /* Read data from DR */ |
bogdanm | 0:9b334a45a8ff | 755 | (*pData++) = hi2c->Instance->DR; |
bogdanm | 0:9b334a45a8ff | 756 | Size--; |
bogdanm | 0:9b334a45a8ff | 757 | } |
bogdanm | 0:9b334a45a8ff | 758 | /* Two bytes */ |
bogdanm | 0:9b334a45a8ff | 759 | else if(Size == 2) |
bogdanm | 0:9b334a45a8ff | 760 | { |
bogdanm | 0:9b334a45a8ff | 761 | /* Wait until BTF flag is set */ |
bogdanm | 0:9b334a45a8ff | 762 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 763 | { |
bogdanm | 0:9b334a45a8ff | 764 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 765 | } |
bogdanm | 0:9b334a45a8ff | 766 | |
bogdanm | 0:9b334a45a8ff | 767 | /* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3 |
bogdanm | 0:9b334a45a8ff | 768 | software sequence must complete before the current byte end of transfer */ |
bogdanm | 0:9b334a45a8ff | 769 | __disable_irq(); |
bogdanm | 0:9b334a45a8ff | 770 | |
bogdanm | 0:9b334a45a8ff | 771 | /* Generate Stop */ |
bogdanm | 0:9b334a45a8ff | 772 | SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); |
bogdanm | 0:9b334a45a8ff | 773 | |
bogdanm | 0:9b334a45a8ff | 774 | /* Read data from DR */ |
bogdanm | 0:9b334a45a8ff | 775 | (*pData++) = hi2c->Instance->DR; |
bogdanm | 0:9b334a45a8ff | 776 | Size--; |
bogdanm | 0:9b334a45a8ff | 777 | |
bogdanm | 0:9b334a45a8ff | 778 | /* Re-enable IRQs */ |
bogdanm | 0:9b334a45a8ff | 779 | __enable_irq(); |
bogdanm | 0:9b334a45a8ff | 780 | |
bogdanm | 0:9b334a45a8ff | 781 | /* Read data from DR */ |
bogdanm | 0:9b334a45a8ff | 782 | (*pData++) = hi2c->Instance->DR; |
bogdanm | 0:9b334a45a8ff | 783 | Size--; |
bogdanm | 0:9b334a45a8ff | 784 | } |
bogdanm | 0:9b334a45a8ff | 785 | /* 3 Last bytes */ |
bogdanm | 0:9b334a45a8ff | 786 | else |
bogdanm | 0:9b334a45a8ff | 787 | { |
bogdanm | 0:9b334a45a8ff | 788 | /* Wait until BTF flag is set */ |
bogdanm | 0:9b334a45a8ff | 789 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 790 | { |
bogdanm | 0:9b334a45a8ff | 791 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 792 | } |
bogdanm | 0:9b334a45a8ff | 793 | |
bogdanm | 0:9b334a45a8ff | 794 | /* Disable Acknowledge */ |
bogdanm | 0:9b334a45a8ff | 795 | CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); |
bogdanm | 0:9b334a45a8ff | 796 | |
bogdanm | 0:9b334a45a8ff | 797 | /* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3 |
bogdanm | 0:9b334a45a8ff | 798 | software sequence must complete before the current byte end of transfer */ |
bogdanm | 0:9b334a45a8ff | 799 | __disable_irq(); |
bogdanm | 0:9b334a45a8ff | 800 | |
bogdanm | 0:9b334a45a8ff | 801 | /* Read data from DR */ |
bogdanm | 0:9b334a45a8ff | 802 | (*pData++) = hi2c->Instance->DR; |
bogdanm | 0:9b334a45a8ff | 803 | Size--; |
bogdanm | 0:9b334a45a8ff | 804 | |
bogdanm | 0:9b334a45a8ff | 805 | /* Wait until BTF flag is set */ |
bogdanm | 0:9b334a45a8ff | 806 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 807 | { |
bogdanm | 0:9b334a45a8ff | 808 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 809 | } |
bogdanm | 0:9b334a45a8ff | 810 | |
bogdanm | 0:9b334a45a8ff | 811 | /* Generate Stop */ |
bogdanm | 0:9b334a45a8ff | 812 | SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); |
bogdanm | 0:9b334a45a8ff | 813 | |
bogdanm | 0:9b334a45a8ff | 814 | /* Read data from DR */ |
bogdanm | 0:9b334a45a8ff | 815 | (*pData++) = hi2c->Instance->DR; |
bogdanm | 0:9b334a45a8ff | 816 | Size--; |
bogdanm | 0:9b334a45a8ff | 817 | |
bogdanm | 0:9b334a45a8ff | 818 | /* Re-enable IRQs */ |
bogdanm | 0:9b334a45a8ff | 819 | __enable_irq(); |
bogdanm | 0:9b334a45a8ff | 820 | |
bogdanm | 0:9b334a45a8ff | 821 | /* Read data from DR */ |
bogdanm | 0:9b334a45a8ff | 822 | (*pData++) = hi2c->Instance->DR; |
bogdanm | 0:9b334a45a8ff | 823 | Size--; |
bogdanm | 0:9b334a45a8ff | 824 | } |
bogdanm | 0:9b334a45a8ff | 825 | } |
bogdanm | 0:9b334a45a8ff | 826 | else |
bogdanm | 0:9b334a45a8ff | 827 | { |
bogdanm | 0:9b334a45a8ff | 828 | /* Wait until RXNE flag is set */ |
mbed_official | 124:6a4a5b7d7324 | 829 | if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 830 | { |
mbed_official | 124:6a4a5b7d7324 | 831 | if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT) |
mbed_official | 124:6a4a5b7d7324 | 832 | { |
mbed_official | 124:6a4a5b7d7324 | 833 | return HAL_TIMEOUT; |
mbed_official | 124:6a4a5b7d7324 | 834 | } |
mbed_official | 124:6a4a5b7d7324 | 835 | else |
mbed_official | 124:6a4a5b7d7324 | 836 | { |
mbed_official | 124:6a4a5b7d7324 | 837 | return HAL_ERROR; |
mbed_official | 124:6a4a5b7d7324 | 838 | } |
bogdanm | 0:9b334a45a8ff | 839 | } |
bogdanm | 0:9b334a45a8ff | 840 | |
bogdanm | 0:9b334a45a8ff | 841 | /* Read data from DR */ |
bogdanm | 0:9b334a45a8ff | 842 | (*pData++) = hi2c->Instance->DR; |
bogdanm | 0:9b334a45a8ff | 843 | Size--; |
bogdanm | 0:9b334a45a8ff | 844 | |
bogdanm | 0:9b334a45a8ff | 845 | if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) |
bogdanm | 0:9b334a45a8ff | 846 | { |
bogdanm | 0:9b334a45a8ff | 847 | /* Read data from DR */ |
bogdanm | 0:9b334a45a8ff | 848 | (*pData++) = hi2c->Instance->DR; |
bogdanm | 0:9b334a45a8ff | 849 | Size--; |
bogdanm | 0:9b334a45a8ff | 850 | } |
bogdanm | 0:9b334a45a8ff | 851 | } |
bogdanm | 0:9b334a45a8ff | 852 | } |
bogdanm | 0:9b334a45a8ff | 853 | |
bogdanm | 0:9b334a45a8ff | 854 | hi2c->State = HAL_I2C_STATE_READY; |
mbed_official | 124:6a4a5b7d7324 | 855 | hi2c->Mode = HAL_I2C_MODE_NONE; |
bogdanm | 0:9b334a45a8ff | 856 | |
bogdanm | 0:9b334a45a8ff | 857 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 858 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 859 | |
bogdanm | 0:9b334a45a8ff | 860 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 861 | } |
bogdanm | 0:9b334a45a8ff | 862 | else |
bogdanm | 0:9b334a45a8ff | 863 | { |
bogdanm | 0:9b334a45a8ff | 864 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 865 | } |
bogdanm | 0:9b334a45a8ff | 866 | } |
bogdanm | 0:9b334a45a8ff | 867 | |
bogdanm | 0:9b334a45a8ff | 868 | /** |
bogdanm | 0:9b334a45a8ff | 869 | * @brief Transmits in slave mode an amount of data in blocking mode. |
mbed_official | 124:6a4a5b7d7324 | 870 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 871 | * the configuration information for the specified I2C. |
mbed_official | 124:6a4a5b7d7324 | 872 | * @param pData Pointer to data buffer |
mbed_official | 124:6a4a5b7d7324 | 873 | * @param Size Amount of data to be sent |
mbed_official | 124:6a4a5b7d7324 | 874 | * @param Timeout Timeout duration |
bogdanm | 0:9b334a45a8ff | 875 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 876 | */ |
bogdanm | 0:9b334a45a8ff | 877 | HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout) |
bogdanm | 0:9b334a45a8ff | 878 | { |
bogdanm | 0:9b334a45a8ff | 879 | if(hi2c->State == HAL_I2C_STATE_READY) |
bogdanm | 0:9b334a45a8ff | 880 | { |
bogdanm | 0:9b334a45a8ff | 881 | if((pData == NULL) || (Size == 0)) |
bogdanm | 0:9b334a45a8ff | 882 | { |
bogdanm | 0:9b334a45a8ff | 883 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 884 | } |
bogdanm | 0:9b334a45a8ff | 885 | |
mbed_official | 124:6a4a5b7d7324 | 886 | /* Wait until BUSY flag is reset */ |
mbed_official | 124:6a4a5b7d7324 | 887 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 888 | { |
bogdanm | 0:9b334a45a8ff | 889 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 890 | } |
bogdanm | 0:9b334a45a8ff | 891 | |
bogdanm | 0:9b334a45a8ff | 892 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 893 | __HAL_LOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 894 | |
mbed_official | 124:6a4a5b7d7324 | 895 | /* Disable Pos */ |
mbed_official | 124:6a4a5b7d7324 | 896 | CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); |
mbed_official | 124:6a4a5b7d7324 | 897 | |
bogdanm | 0:9b334a45a8ff | 898 | hi2c->State = HAL_I2C_STATE_BUSY_TX; |
mbed_official | 124:6a4a5b7d7324 | 899 | hi2c->Mode = HAL_I2C_MODE_SLAVE; |
bogdanm | 0:9b334a45a8ff | 900 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
bogdanm | 0:9b334a45a8ff | 901 | |
bogdanm | 0:9b334a45a8ff | 902 | /* Enable Address Acknowledge */ |
bogdanm | 0:9b334a45a8ff | 903 | SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); |
bogdanm | 0:9b334a45a8ff | 904 | |
bogdanm | 0:9b334a45a8ff | 905 | /* Wait until ADDR flag is set */ |
bogdanm | 0:9b334a45a8ff | 906 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 907 | { |
bogdanm | 0:9b334a45a8ff | 908 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 909 | } |
bogdanm | 0:9b334a45a8ff | 910 | |
bogdanm | 0:9b334a45a8ff | 911 | /* Clear ADDR flag */ |
bogdanm | 0:9b334a45a8ff | 912 | __HAL_I2C_CLEAR_ADDRFLAG(hi2c); |
bogdanm | 0:9b334a45a8ff | 913 | |
bogdanm | 0:9b334a45a8ff | 914 | /* If 10bit addressing mode is selected */ |
bogdanm | 0:9b334a45a8ff | 915 | if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT) |
bogdanm | 0:9b334a45a8ff | 916 | { |
bogdanm | 0:9b334a45a8ff | 917 | /* Wait until ADDR flag is set */ |
bogdanm | 0:9b334a45a8ff | 918 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 919 | { |
bogdanm | 0:9b334a45a8ff | 920 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 921 | } |
bogdanm | 0:9b334a45a8ff | 922 | |
bogdanm | 0:9b334a45a8ff | 923 | /* Clear ADDR flag */ |
bogdanm | 0:9b334a45a8ff | 924 | __HAL_I2C_CLEAR_ADDRFLAG(hi2c); |
bogdanm | 0:9b334a45a8ff | 925 | } |
bogdanm | 0:9b334a45a8ff | 926 | |
bogdanm | 0:9b334a45a8ff | 927 | while(Size > 0) |
bogdanm | 0:9b334a45a8ff | 928 | { |
bogdanm | 0:9b334a45a8ff | 929 | /* Wait until TXE flag is set */ |
mbed_official | 124:6a4a5b7d7324 | 930 | if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 931 | { |
mbed_official | 124:6a4a5b7d7324 | 932 | /* Disable Address Acknowledge */ |
mbed_official | 124:6a4a5b7d7324 | 933 | CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); |
mbed_official | 124:6a4a5b7d7324 | 934 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
mbed_official | 124:6a4a5b7d7324 | 935 | { |
mbed_official | 124:6a4a5b7d7324 | 936 | return HAL_ERROR; |
mbed_official | 124:6a4a5b7d7324 | 937 | } |
mbed_official | 124:6a4a5b7d7324 | 938 | else |
mbed_official | 124:6a4a5b7d7324 | 939 | { |
mbed_official | 124:6a4a5b7d7324 | 940 | return HAL_TIMEOUT; |
mbed_official | 124:6a4a5b7d7324 | 941 | } |
bogdanm | 0:9b334a45a8ff | 942 | } |
bogdanm | 0:9b334a45a8ff | 943 | |
bogdanm | 0:9b334a45a8ff | 944 | /* Write data to DR */ |
bogdanm | 0:9b334a45a8ff | 945 | hi2c->Instance->DR = (*pData++); |
bogdanm | 0:9b334a45a8ff | 946 | Size--; |
bogdanm | 0:9b334a45a8ff | 947 | |
bogdanm | 0:9b334a45a8ff | 948 | if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (Size != 0)) |
bogdanm | 0:9b334a45a8ff | 949 | { |
bogdanm | 0:9b334a45a8ff | 950 | /* Write data to DR */ |
bogdanm | 0:9b334a45a8ff | 951 | hi2c->Instance->DR = (*pData++); |
bogdanm | 0:9b334a45a8ff | 952 | Size--; |
bogdanm | 0:9b334a45a8ff | 953 | } |
bogdanm | 0:9b334a45a8ff | 954 | } |
bogdanm | 0:9b334a45a8ff | 955 | |
bogdanm | 0:9b334a45a8ff | 956 | /* Wait until AF flag is set */ |
bogdanm | 0:9b334a45a8ff | 957 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_AF, RESET, Timeout) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 958 | { |
bogdanm | 0:9b334a45a8ff | 959 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 960 | } |
bogdanm | 0:9b334a45a8ff | 961 | |
bogdanm | 0:9b334a45a8ff | 962 | /* Clear AF flag */ |
bogdanm | 0:9b334a45a8ff | 963 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); |
bogdanm | 0:9b334a45a8ff | 964 | |
bogdanm | 0:9b334a45a8ff | 965 | /* Disable Address Acknowledge */ |
bogdanm | 0:9b334a45a8ff | 966 | CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); |
bogdanm | 0:9b334a45a8ff | 967 | |
bogdanm | 0:9b334a45a8ff | 968 | hi2c->State = HAL_I2C_STATE_READY; |
mbed_official | 124:6a4a5b7d7324 | 969 | hi2c->Mode = HAL_I2C_MODE_NONE; |
bogdanm | 0:9b334a45a8ff | 970 | |
bogdanm | 0:9b334a45a8ff | 971 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 972 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 973 | |
bogdanm | 0:9b334a45a8ff | 974 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 975 | } |
bogdanm | 0:9b334a45a8ff | 976 | else |
bogdanm | 0:9b334a45a8ff | 977 | { |
bogdanm | 0:9b334a45a8ff | 978 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 979 | } |
bogdanm | 0:9b334a45a8ff | 980 | } |
bogdanm | 0:9b334a45a8ff | 981 | |
bogdanm | 0:9b334a45a8ff | 982 | /** |
bogdanm | 0:9b334a45a8ff | 983 | * @brief Receive in slave mode an amount of data in blocking mode |
mbed_official | 124:6a4a5b7d7324 | 984 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 985 | * the configuration information for the specified I2C. |
mbed_official | 124:6a4a5b7d7324 | 986 | * @param pData Pointer to data buffer |
mbed_official | 124:6a4a5b7d7324 | 987 | * @param Size Amount of data to be sent |
mbed_official | 124:6a4a5b7d7324 | 988 | * @param Timeout Timeout duration |
bogdanm | 0:9b334a45a8ff | 989 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 990 | */ |
bogdanm | 0:9b334a45a8ff | 991 | HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout) |
bogdanm | 0:9b334a45a8ff | 992 | { |
bogdanm | 0:9b334a45a8ff | 993 | if(hi2c->State == HAL_I2C_STATE_READY) |
bogdanm | 0:9b334a45a8ff | 994 | { |
bogdanm | 0:9b334a45a8ff | 995 | if((pData == NULL) || (Size == 0)) |
bogdanm | 0:9b334a45a8ff | 996 | { |
bogdanm | 0:9b334a45a8ff | 997 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 998 | } |
bogdanm | 0:9b334a45a8ff | 999 | |
mbed_official | 124:6a4a5b7d7324 | 1000 | /* Wait until BUSY flag is reset */ |
mbed_official | 124:6a4a5b7d7324 | 1001 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 1002 | { |
bogdanm | 0:9b334a45a8ff | 1003 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 1004 | } |
bogdanm | 0:9b334a45a8ff | 1005 | |
bogdanm | 0:9b334a45a8ff | 1006 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 1007 | __HAL_LOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 1008 | |
mbed_official | 124:6a4a5b7d7324 | 1009 | /* Disable Pos */ |
mbed_official | 124:6a4a5b7d7324 | 1010 | CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); |
mbed_official | 124:6a4a5b7d7324 | 1011 | |
bogdanm | 0:9b334a45a8ff | 1012 | hi2c->State = HAL_I2C_STATE_BUSY_RX; |
mbed_official | 124:6a4a5b7d7324 | 1013 | hi2c->Mode = HAL_I2C_MODE_SLAVE; |
bogdanm | 0:9b334a45a8ff | 1014 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
bogdanm | 0:9b334a45a8ff | 1015 | |
bogdanm | 0:9b334a45a8ff | 1016 | /* Enable Address Acknowledge */ |
bogdanm | 0:9b334a45a8ff | 1017 | SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); |
bogdanm | 0:9b334a45a8ff | 1018 | |
bogdanm | 0:9b334a45a8ff | 1019 | /* Wait until ADDR flag is set */ |
bogdanm | 0:9b334a45a8ff | 1020 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 1021 | { |
bogdanm | 0:9b334a45a8ff | 1022 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 1023 | } |
bogdanm | 0:9b334a45a8ff | 1024 | |
bogdanm | 0:9b334a45a8ff | 1025 | /* Clear ADDR flag */ |
bogdanm | 0:9b334a45a8ff | 1026 | __HAL_I2C_CLEAR_ADDRFLAG(hi2c); |
bogdanm | 0:9b334a45a8ff | 1027 | |
bogdanm | 0:9b334a45a8ff | 1028 | while(Size > 0) |
bogdanm | 0:9b334a45a8ff | 1029 | { |
bogdanm | 0:9b334a45a8ff | 1030 | /* Wait until RXNE flag is set */ |
mbed_official | 124:6a4a5b7d7324 | 1031 | if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 1032 | { |
mbed_official | 124:6a4a5b7d7324 | 1033 | /* Disable Address Acknowledge */ |
mbed_official | 124:6a4a5b7d7324 | 1034 | hi2c->Instance->CR1 &= ~I2C_CR1_ACK; |
mbed_official | 124:6a4a5b7d7324 | 1035 | if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT) |
mbed_official | 124:6a4a5b7d7324 | 1036 | { |
mbed_official | 124:6a4a5b7d7324 | 1037 | return HAL_TIMEOUT; |
mbed_official | 124:6a4a5b7d7324 | 1038 | } |
mbed_official | 124:6a4a5b7d7324 | 1039 | else |
mbed_official | 124:6a4a5b7d7324 | 1040 | { |
mbed_official | 124:6a4a5b7d7324 | 1041 | return HAL_ERROR; |
mbed_official | 124:6a4a5b7d7324 | 1042 | } |
bogdanm | 0:9b334a45a8ff | 1043 | } |
bogdanm | 0:9b334a45a8ff | 1044 | |
bogdanm | 0:9b334a45a8ff | 1045 | /* Read data from DR */ |
bogdanm | 0:9b334a45a8ff | 1046 | (*pData++) = hi2c->Instance->DR; |
bogdanm | 0:9b334a45a8ff | 1047 | Size--; |
bogdanm | 0:9b334a45a8ff | 1048 | |
bogdanm | 0:9b334a45a8ff | 1049 | if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (Size != 0)) |
bogdanm | 0:9b334a45a8ff | 1050 | { |
bogdanm | 0:9b334a45a8ff | 1051 | /* Read data from DR */ |
bogdanm | 0:9b334a45a8ff | 1052 | (*pData++) = hi2c->Instance->DR; |
bogdanm | 0:9b334a45a8ff | 1053 | Size--; |
bogdanm | 0:9b334a45a8ff | 1054 | } |
bogdanm | 0:9b334a45a8ff | 1055 | } |
bogdanm | 0:9b334a45a8ff | 1056 | |
bogdanm | 0:9b334a45a8ff | 1057 | /* Wait until STOP flag is set */ |
mbed_official | 124:6a4a5b7d7324 | 1058 | if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_FLAG) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 1059 | { |
mbed_official | 124:6a4a5b7d7324 | 1060 | /* Disable Address Acknowledge */ |
mbed_official | 124:6a4a5b7d7324 | 1061 | hi2c->Instance->CR1 &= ~I2C_CR1_ACK; |
mbed_official | 124:6a4a5b7d7324 | 1062 | |
mbed_official | 124:6a4a5b7d7324 | 1063 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
mbed_official | 124:6a4a5b7d7324 | 1064 | { |
mbed_official | 124:6a4a5b7d7324 | 1065 | return HAL_ERROR; |
mbed_official | 124:6a4a5b7d7324 | 1066 | } |
mbed_official | 124:6a4a5b7d7324 | 1067 | else |
mbed_official | 124:6a4a5b7d7324 | 1068 | { |
mbed_official | 124:6a4a5b7d7324 | 1069 | return HAL_TIMEOUT; |
mbed_official | 124:6a4a5b7d7324 | 1070 | } |
bogdanm | 0:9b334a45a8ff | 1071 | } |
bogdanm | 0:9b334a45a8ff | 1072 | |
bogdanm | 0:9b334a45a8ff | 1073 | /* Clear STOP flag */ |
bogdanm | 0:9b334a45a8ff | 1074 | __HAL_I2C_CLEAR_STOPFLAG(hi2c); |
bogdanm | 0:9b334a45a8ff | 1075 | |
bogdanm | 0:9b334a45a8ff | 1076 | /* Disable Address Acknowledge */ |
bogdanm | 0:9b334a45a8ff | 1077 | CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); |
bogdanm | 0:9b334a45a8ff | 1078 | |
bogdanm | 0:9b334a45a8ff | 1079 | hi2c->State = HAL_I2C_STATE_READY; |
mbed_official | 124:6a4a5b7d7324 | 1080 | hi2c->Mode = HAL_I2C_MODE_NONE; |
bogdanm | 0:9b334a45a8ff | 1081 | |
bogdanm | 0:9b334a45a8ff | 1082 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 1083 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 1084 | |
bogdanm | 0:9b334a45a8ff | 1085 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 1086 | } |
bogdanm | 0:9b334a45a8ff | 1087 | else |
bogdanm | 0:9b334a45a8ff | 1088 | { |
bogdanm | 0:9b334a45a8ff | 1089 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 1090 | } |
bogdanm | 0:9b334a45a8ff | 1091 | } |
bogdanm | 0:9b334a45a8ff | 1092 | |
bogdanm | 0:9b334a45a8ff | 1093 | /** |
mbed_official | 124:6a4a5b7d7324 | 1094 | * @brief Transmit in master mode an amount of data in non-blocking mode with Interrupt |
mbed_official | 124:6a4a5b7d7324 | 1095 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 1096 | * the configuration information for the specified I2C. |
mbed_official | 124:6a4a5b7d7324 | 1097 | * @param DevAddress Target device address |
mbed_official | 124:6a4a5b7d7324 | 1098 | * @param pData Pointer to data buffer |
mbed_official | 124:6a4a5b7d7324 | 1099 | * @param Size Amount of data to be sent |
bogdanm | 0:9b334a45a8ff | 1100 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 1101 | */ |
bogdanm | 0:9b334a45a8ff | 1102 | HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size) |
bogdanm | 0:9b334a45a8ff | 1103 | { |
bogdanm | 0:9b334a45a8ff | 1104 | if(hi2c->State == HAL_I2C_STATE_READY) |
bogdanm | 0:9b334a45a8ff | 1105 | { |
bogdanm | 0:9b334a45a8ff | 1106 | if((pData == NULL) || (Size == 0)) |
bogdanm | 0:9b334a45a8ff | 1107 | { |
bogdanm | 0:9b334a45a8ff | 1108 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 1109 | } |
bogdanm | 0:9b334a45a8ff | 1110 | |
mbed_official | 124:6a4a5b7d7324 | 1111 | /* Wait until BUSY flag is reset */ |
mbed_official | 124:6a4a5b7d7324 | 1112 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 1113 | { |
bogdanm | 0:9b334a45a8ff | 1114 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 1115 | } |
bogdanm | 0:9b334a45a8ff | 1116 | |
bogdanm | 0:9b334a45a8ff | 1117 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 1118 | __HAL_LOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 1119 | |
mbed_official | 124:6a4a5b7d7324 | 1120 | /* Disable Pos */ |
mbed_official | 124:6a4a5b7d7324 | 1121 | CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); |
mbed_official | 124:6a4a5b7d7324 | 1122 | |
bogdanm | 0:9b334a45a8ff | 1123 | hi2c->State = HAL_I2C_STATE_BUSY_TX; |
mbed_official | 124:6a4a5b7d7324 | 1124 | hi2c->Mode = HAL_I2C_MODE_MASTER; |
bogdanm | 0:9b334a45a8ff | 1125 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
bogdanm | 0:9b334a45a8ff | 1126 | |
bogdanm | 0:9b334a45a8ff | 1127 | hi2c->pBuffPtr = pData; |
bogdanm | 0:9b334a45a8ff | 1128 | hi2c->XferSize = Size; |
bogdanm | 0:9b334a45a8ff | 1129 | hi2c->XferCount = Size; |
bogdanm | 0:9b334a45a8ff | 1130 | |
bogdanm | 0:9b334a45a8ff | 1131 | /* Send Slave Address */ |
bogdanm | 0:9b334a45a8ff | 1132 | if(I2C_MasterRequestWrite(hi2c, DevAddress, I2C_TIMEOUT_FLAG) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 1133 | { |
bogdanm | 0:9b334a45a8ff | 1134 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
bogdanm | 0:9b334a45a8ff | 1135 | { |
bogdanm | 0:9b334a45a8ff | 1136 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 1137 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 1138 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 1139 | } |
bogdanm | 0:9b334a45a8ff | 1140 | else |
bogdanm | 0:9b334a45a8ff | 1141 | { |
bogdanm | 0:9b334a45a8ff | 1142 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 1143 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 1144 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 1145 | } |
bogdanm | 0:9b334a45a8ff | 1146 | } |
bogdanm | 0:9b334a45a8ff | 1147 | |
bogdanm | 0:9b334a45a8ff | 1148 | /* Clear ADDR flag */ |
bogdanm | 0:9b334a45a8ff | 1149 | __HAL_I2C_CLEAR_ADDRFLAG(hi2c); |
bogdanm | 0:9b334a45a8ff | 1150 | |
bogdanm | 0:9b334a45a8ff | 1151 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 1152 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 1153 | |
bogdanm | 0:9b334a45a8ff | 1154 | /* Note : The I2C interrupts must be enabled after unlocking current process |
bogdanm | 0:9b334a45a8ff | 1155 | to avoid the risk of I2C interrupt handle execution before current |
bogdanm | 0:9b334a45a8ff | 1156 | process unlock */ |
bogdanm | 0:9b334a45a8ff | 1157 | |
bogdanm | 0:9b334a45a8ff | 1158 | /* Enable EVT, BUF and ERR interrupt */ |
bogdanm | 0:9b334a45a8ff | 1159 | __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR); |
bogdanm | 0:9b334a45a8ff | 1160 | |
bogdanm | 0:9b334a45a8ff | 1161 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 1162 | } |
bogdanm | 0:9b334a45a8ff | 1163 | else |
bogdanm | 0:9b334a45a8ff | 1164 | { |
bogdanm | 0:9b334a45a8ff | 1165 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 1166 | } |
bogdanm | 0:9b334a45a8ff | 1167 | } |
bogdanm | 0:9b334a45a8ff | 1168 | |
bogdanm | 0:9b334a45a8ff | 1169 | /** |
mbed_official | 124:6a4a5b7d7324 | 1170 | * @brief Receive in master mode an amount of data in non-blocking mode with Interrupt |
mbed_official | 124:6a4a5b7d7324 | 1171 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 1172 | * the configuration information for the specified I2C. |
mbed_official | 124:6a4a5b7d7324 | 1173 | * @param DevAddress Target device address |
mbed_official | 124:6a4a5b7d7324 | 1174 | * @param pData Pointer to data buffer |
mbed_official | 124:6a4a5b7d7324 | 1175 | * @param Size Amount of data to be sent |
bogdanm | 0:9b334a45a8ff | 1176 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 1177 | */ |
bogdanm | 0:9b334a45a8ff | 1178 | HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size) |
bogdanm | 0:9b334a45a8ff | 1179 | { |
bogdanm | 0:9b334a45a8ff | 1180 | if(hi2c->State == HAL_I2C_STATE_READY) |
bogdanm | 0:9b334a45a8ff | 1181 | { |
bogdanm | 0:9b334a45a8ff | 1182 | if((pData == NULL) || (Size == 0)) |
bogdanm | 0:9b334a45a8ff | 1183 | { |
bogdanm | 0:9b334a45a8ff | 1184 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 1185 | } |
bogdanm | 0:9b334a45a8ff | 1186 | |
mbed_official | 124:6a4a5b7d7324 | 1187 | /* Wait until BUSY flag is reset */ |
mbed_official | 124:6a4a5b7d7324 | 1188 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 1189 | { |
bogdanm | 0:9b334a45a8ff | 1190 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 1191 | } |
bogdanm | 0:9b334a45a8ff | 1192 | |
bogdanm | 0:9b334a45a8ff | 1193 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 1194 | __HAL_LOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 1195 | |
mbed_official | 124:6a4a5b7d7324 | 1196 | /* Disable Pos */ |
mbed_official | 124:6a4a5b7d7324 | 1197 | CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); |
mbed_official | 124:6a4a5b7d7324 | 1198 | |
bogdanm | 0:9b334a45a8ff | 1199 | hi2c->State = HAL_I2C_STATE_BUSY_RX; |
mbed_official | 124:6a4a5b7d7324 | 1200 | hi2c->Mode = HAL_I2C_MODE_MASTER; |
bogdanm | 0:9b334a45a8ff | 1201 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
bogdanm | 0:9b334a45a8ff | 1202 | |
bogdanm | 0:9b334a45a8ff | 1203 | hi2c->pBuffPtr = pData; |
bogdanm | 0:9b334a45a8ff | 1204 | hi2c->XferSize = Size; |
bogdanm | 0:9b334a45a8ff | 1205 | hi2c->XferCount = Size; |
bogdanm | 0:9b334a45a8ff | 1206 | |
bogdanm | 0:9b334a45a8ff | 1207 | /* Send Slave Address */ |
bogdanm | 0:9b334a45a8ff | 1208 | if(I2C_MasterRequestRead(hi2c, DevAddress, I2C_TIMEOUT_FLAG) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 1209 | { |
bogdanm | 0:9b334a45a8ff | 1210 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
bogdanm | 0:9b334a45a8ff | 1211 | { |
bogdanm | 0:9b334a45a8ff | 1212 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 1213 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 1214 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 1215 | } |
bogdanm | 0:9b334a45a8ff | 1216 | else |
bogdanm | 0:9b334a45a8ff | 1217 | { |
bogdanm | 0:9b334a45a8ff | 1218 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 1219 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 1220 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 1221 | } |
bogdanm | 0:9b334a45a8ff | 1222 | } |
bogdanm | 0:9b334a45a8ff | 1223 | |
bogdanm | 0:9b334a45a8ff | 1224 | if(hi2c->XferCount == 1) |
bogdanm | 0:9b334a45a8ff | 1225 | { |
bogdanm | 0:9b334a45a8ff | 1226 | /* Disable Acknowledge */ |
bogdanm | 0:9b334a45a8ff | 1227 | CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); |
bogdanm | 0:9b334a45a8ff | 1228 | |
bogdanm | 0:9b334a45a8ff | 1229 | /* Clear ADDR flag */ |
bogdanm | 0:9b334a45a8ff | 1230 | __HAL_I2C_CLEAR_ADDRFLAG(hi2c); |
bogdanm | 0:9b334a45a8ff | 1231 | |
bogdanm | 0:9b334a45a8ff | 1232 | /* Generate Stop */ |
bogdanm | 0:9b334a45a8ff | 1233 | SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); |
bogdanm | 0:9b334a45a8ff | 1234 | } |
bogdanm | 0:9b334a45a8ff | 1235 | else if(hi2c->XferCount == 2) |
bogdanm | 0:9b334a45a8ff | 1236 | { |
bogdanm | 0:9b334a45a8ff | 1237 | /* Enable Pos */ |
bogdanm | 0:9b334a45a8ff | 1238 | SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS); |
bogdanm | 0:9b334a45a8ff | 1239 | |
bogdanm | 0:9b334a45a8ff | 1240 | /* Clear ADDR flag */ |
bogdanm | 0:9b334a45a8ff | 1241 | __HAL_I2C_CLEAR_ADDRFLAG(hi2c); |
mbed_official | 124:6a4a5b7d7324 | 1242 | |
mbed_official | 124:6a4a5b7d7324 | 1243 | /* Disable Acknowledge */ |
mbed_official | 124:6a4a5b7d7324 | 1244 | CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); |
bogdanm | 0:9b334a45a8ff | 1245 | } |
bogdanm | 0:9b334a45a8ff | 1246 | else |
bogdanm | 0:9b334a45a8ff | 1247 | { |
bogdanm | 0:9b334a45a8ff | 1248 | /* Enable Acknowledge */ |
bogdanm | 0:9b334a45a8ff | 1249 | SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); |
bogdanm | 0:9b334a45a8ff | 1250 | |
bogdanm | 0:9b334a45a8ff | 1251 | /* Clear ADDR flag */ |
bogdanm | 0:9b334a45a8ff | 1252 | __HAL_I2C_CLEAR_ADDRFLAG(hi2c); |
bogdanm | 0:9b334a45a8ff | 1253 | } |
bogdanm | 0:9b334a45a8ff | 1254 | |
bogdanm | 0:9b334a45a8ff | 1255 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 1256 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 1257 | |
bogdanm | 0:9b334a45a8ff | 1258 | /* Note : The I2C interrupts must be enabled after unlocking current process |
bogdanm | 0:9b334a45a8ff | 1259 | to avoid the risk of I2C interrupt handle execution before current |
bogdanm | 0:9b334a45a8ff | 1260 | process unlock */ |
bogdanm | 0:9b334a45a8ff | 1261 | |
bogdanm | 0:9b334a45a8ff | 1262 | /* Enable EVT, BUF and ERR interrupt */ |
bogdanm | 0:9b334a45a8ff | 1263 | __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR); |
bogdanm | 0:9b334a45a8ff | 1264 | |
bogdanm | 0:9b334a45a8ff | 1265 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 1266 | } |
bogdanm | 0:9b334a45a8ff | 1267 | else |
bogdanm | 0:9b334a45a8ff | 1268 | { |
bogdanm | 0:9b334a45a8ff | 1269 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 1270 | } |
bogdanm | 0:9b334a45a8ff | 1271 | } |
bogdanm | 0:9b334a45a8ff | 1272 | |
bogdanm | 0:9b334a45a8ff | 1273 | /** |
mbed_official | 124:6a4a5b7d7324 | 1274 | * @brief Transmit in slave mode an amount of data in non-blocking mode with Interrupt |
mbed_official | 124:6a4a5b7d7324 | 1275 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 1276 | * the configuration information for the specified I2C. |
mbed_official | 124:6a4a5b7d7324 | 1277 | * @param pData Pointer to data buffer |
mbed_official | 124:6a4a5b7d7324 | 1278 | * @param Size Amount of data to be sent |
bogdanm | 0:9b334a45a8ff | 1279 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 1280 | */ |
bogdanm | 0:9b334a45a8ff | 1281 | HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size) |
bogdanm | 0:9b334a45a8ff | 1282 | { |
bogdanm | 0:9b334a45a8ff | 1283 | if(hi2c->State == HAL_I2C_STATE_READY) |
bogdanm | 0:9b334a45a8ff | 1284 | { |
bogdanm | 0:9b334a45a8ff | 1285 | if((pData == NULL) || (Size == 0)) |
bogdanm | 0:9b334a45a8ff | 1286 | { |
bogdanm | 0:9b334a45a8ff | 1287 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 1288 | } |
bogdanm | 0:9b334a45a8ff | 1289 | |
mbed_official | 124:6a4a5b7d7324 | 1290 | /* Wait until BUSY flag is reset */ |
mbed_official | 124:6a4a5b7d7324 | 1291 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 1292 | { |
bogdanm | 0:9b334a45a8ff | 1293 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 1294 | } |
bogdanm | 0:9b334a45a8ff | 1295 | |
bogdanm | 0:9b334a45a8ff | 1296 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 1297 | __HAL_LOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 1298 | |
mbed_official | 124:6a4a5b7d7324 | 1299 | /* Disable Pos */ |
mbed_official | 124:6a4a5b7d7324 | 1300 | CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); |
mbed_official | 124:6a4a5b7d7324 | 1301 | |
bogdanm | 0:9b334a45a8ff | 1302 | hi2c->State = HAL_I2C_STATE_BUSY_TX; |
mbed_official | 124:6a4a5b7d7324 | 1303 | hi2c->Mode = HAL_I2C_MODE_SLAVE; |
bogdanm | 0:9b334a45a8ff | 1304 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
bogdanm | 0:9b334a45a8ff | 1305 | |
bogdanm | 0:9b334a45a8ff | 1306 | hi2c->pBuffPtr = pData; |
bogdanm | 0:9b334a45a8ff | 1307 | hi2c->XferSize = Size; |
bogdanm | 0:9b334a45a8ff | 1308 | hi2c->XferCount = Size; |
bogdanm | 0:9b334a45a8ff | 1309 | |
bogdanm | 0:9b334a45a8ff | 1310 | /* Enable Address Acknowledge */ |
bogdanm | 0:9b334a45a8ff | 1311 | SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); |
bogdanm | 0:9b334a45a8ff | 1312 | |
bogdanm | 0:9b334a45a8ff | 1313 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 1314 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 1315 | |
bogdanm | 0:9b334a45a8ff | 1316 | /* Note : The I2C interrupts must be enabled after unlocking current process |
bogdanm | 0:9b334a45a8ff | 1317 | to avoid the risk of I2C interrupt handle execution before current |
bogdanm | 0:9b334a45a8ff | 1318 | process unlock */ |
bogdanm | 0:9b334a45a8ff | 1319 | |
bogdanm | 0:9b334a45a8ff | 1320 | /* Enable EVT, BUF and ERR interrupt */ |
bogdanm | 0:9b334a45a8ff | 1321 | __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR); |
bogdanm | 0:9b334a45a8ff | 1322 | |
bogdanm | 0:9b334a45a8ff | 1323 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 1324 | } |
bogdanm | 0:9b334a45a8ff | 1325 | else |
bogdanm | 0:9b334a45a8ff | 1326 | { |
bogdanm | 0:9b334a45a8ff | 1327 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 1328 | } |
bogdanm | 0:9b334a45a8ff | 1329 | } |
bogdanm | 0:9b334a45a8ff | 1330 | |
bogdanm | 0:9b334a45a8ff | 1331 | /** |
mbed_official | 124:6a4a5b7d7324 | 1332 | * @brief Receive in slave mode an amount of data in non-blocking mode with Interrupt |
mbed_official | 124:6a4a5b7d7324 | 1333 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 1334 | * the configuration information for the specified I2C. |
mbed_official | 124:6a4a5b7d7324 | 1335 | * @param pData Pointer to data buffer |
mbed_official | 124:6a4a5b7d7324 | 1336 | * @param Size Amount of data to be sent |
bogdanm | 0:9b334a45a8ff | 1337 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 1338 | */ |
bogdanm | 0:9b334a45a8ff | 1339 | HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size) |
bogdanm | 0:9b334a45a8ff | 1340 | { |
bogdanm | 0:9b334a45a8ff | 1341 | if(hi2c->State == HAL_I2C_STATE_READY) |
bogdanm | 0:9b334a45a8ff | 1342 | { |
bogdanm | 0:9b334a45a8ff | 1343 | if((pData == NULL) || (Size == 0)) |
bogdanm | 0:9b334a45a8ff | 1344 | { |
bogdanm | 0:9b334a45a8ff | 1345 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 1346 | } |
bogdanm | 0:9b334a45a8ff | 1347 | |
mbed_official | 124:6a4a5b7d7324 | 1348 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 1349 | { |
bogdanm | 0:9b334a45a8ff | 1350 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 1351 | } |
bogdanm | 0:9b334a45a8ff | 1352 | |
bogdanm | 0:9b334a45a8ff | 1353 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 1354 | __HAL_LOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 1355 | |
mbed_official | 124:6a4a5b7d7324 | 1356 | /* Disable Pos */ |
mbed_official | 124:6a4a5b7d7324 | 1357 | CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); |
mbed_official | 124:6a4a5b7d7324 | 1358 | |
bogdanm | 0:9b334a45a8ff | 1359 | hi2c->State = HAL_I2C_STATE_BUSY_RX; |
mbed_official | 124:6a4a5b7d7324 | 1360 | hi2c->Mode = HAL_I2C_MODE_SLAVE; |
bogdanm | 0:9b334a45a8ff | 1361 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
bogdanm | 0:9b334a45a8ff | 1362 | |
bogdanm | 0:9b334a45a8ff | 1363 | hi2c->pBuffPtr = pData; |
bogdanm | 0:9b334a45a8ff | 1364 | hi2c->XferSize = Size; |
bogdanm | 0:9b334a45a8ff | 1365 | hi2c->XferCount = Size; |
bogdanm | 0:9b334a45a8ff | 1366 | |
bogdanm | 0:9b334a45a8ff | 1367 | /* Enable Address Acknowledge */ |
bogdanm | 0:9b334a45a8ff | 1368 | SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); |
bogdanm | 0:9b334a45a8ff | 1369 | |
bogdanm | 0:9b334a45a8ff | 1370 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 1371 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 1372 | |
bogdanm | 0:9b334a45a8ff | 1373 | /* Note : The I2C interrupts must be enabled after unlocking current process |
bogdanm | 0:9b334a45a8ff | 1374 | to avoid the risk of I2C interrupt handle execution before current |
bogdanm | 0:9b334a45a8ff | 1375 | process unlock */ |
bogdanm | 0:9b334a45a8ff | 1376 | |
bogdanm | 0:9b334a45a8ff | 1377 | /* Enable EVT, BUF and ERR interrupt */ |
bogdanm | 0:9b334a45a8ff | 1378 | __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR); |
bogdanm | 0:9b334a45a8ff | 1379 | |
bogdanm | 0:9b334a45a8ff | 1380 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 1381 | } |
bogdanm | 0:9b334a45a8ff | 1382 | else |
bogdanm | 0:9b334a45a8ff | 1383 | { |
bogdanm | 0:9b334a45a8ff | 1384 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 1385 | } |
bogdanm | 0:9b334a45a8ff | 1386 | } |
bogdanm | 0:9b334a45a8ff | 1387 | |
bogdanm | 0:9b334a45a8ff | 1388 | |
bogdanm | 0:9b334a45a8ff | 1389 | /** |
mbed_official | 124:6a4a5b7d7324 | 1390 | * @brief Transmit in master mode an amount of data in non-blocking mode with DMA |
mbed_official | 124:6a4a5b7d7324 | 1391 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 1392 | * the configuration information for the specified I2C. |
mbed_official | 124:6a4a5b7d7324 | 1393 | * @param DevAddress Target device address |
mbed_official | 124:6a4a5b7d7324 | 1394 | * @param pData Pointer to data buffer |
mbed_official | 124:6a4a5b7d7324 | 1395 | * @param Size Amount of data to be sent |
bogdanm | 0:9b334a45a8ff | 1396 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 1397 | */ |
bogdanm | 0:9b334a45a8ff | 1398 | HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size) |
bogdanm | 0:9b334a45a8ff | 1399 | { |
bogdanm | 0:9b334a45a8ff | 1400 | if(hi2c->State == HAL_I2C_STATE_READY) |
bogdanm | 0:9b334a45a8ff | 1401 | { |
bogdanm | 0:9b334a45a8ff | 1402 | if((pData == NULL) || (Size == 0)) |
bogdanm | 0:9b334a45a8ff | 1403 | { |
bogdanm | 0:9b334a45a8ff | 1404 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 1405 | } |
bogdanm | 0:9b334a45a8ff | 1406 | |
mbed_official | 124:6a4a5b7d7324 | 1407 | /* Wait until BUSY flag is reset */ |
mbed_official | 124:6a4a5b7d7324 | 1408 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 1409 | { |
bogdanm | 0:9b334a45a8ff | 1410 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 1411 | } |
bogdanm | 0:9b334a45a8ff | 1412 | |
bogdanm | 0:9b334a45a8ff | 1413 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 1414 | __HAL_LOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 1415 | |
mbed_official | 124:6a4a5b7d7324 | 1416 | /* Disable Pos */ |
mbed_official | 124:6a4a5b7d7324 | 1417 | CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); |
mbed_official | 124:6a4a5b7d7324 | 1418 | |
bogdanm | 0:9b334a45a8ff | 1419 | hi2c->State = HAL_I2C_STATE_BUSY_TX; |
mbed_official | 124:6a4a5b7d7324 | 1420 | hi2c->Mode = HAL_I2C_MODE_MASTER; |
bogdanm | 0:9b334a45a8ff | 1421 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
bogdanm | 0:9b334a45a8ff | 1422 | |
bogdanm | 0:9b334a45a8ff | 1423 | hi2c->pBuffPtr = pData; |
bogdanm | 0:9b334a45a8ff | 1424 | hi2c->XferSize = Size; |
bogdanm | 0:9b334a45a8ff | 1425 | hi2c->XferCount = Size; |
bogdanm | 0:9b334a45a8ff | 1426 | |
bogdanm | 0:9b334a45a8ff | 1427 | /* Set the I2C DMA transfert complete callback */ |
bogdanm | 0:9b334a45a8ff | 1428 | hi2c->hdmatx->XferCpltCallback = I2C_DMAMasterTransmitCplt; |
bogdanm | 0:9b334a45a8ff | 1429 | |
bogdanm | 0:9b334a45a8ff | 1430 | /* Set the DMA error callback */ |
bogdanm | 0:9b334a45a8ff | 1431 | hi2c->hdmatx->XferErrorCallback = I2C_DMAError; |
bogdanm | 0:9b334a45a8ff | 1432 | |
bogdanm | 0:9b334a45a8ff | 1433 | /* Enable the DMA channel */ |
bogdanm | 0:9b334a45a8ff | 1434 | HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->DR, Size); |
bogdanm | 0:9b334a45a8ff | 1435 | |
bogdanm | 0:9b334a45a8ff | 1436 | /* Send Slave Address */ |
bogdanm | 0:9b334a45a8ff | 1437 | if(I2C_MasterRequestWrite(hi2c, DevAddress, I2C_TIMEOUT_FLAG) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 1438 | { |
bogdanm | 0:9b334a45a8ff | 1439 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
bogdanm | 0:9b334a45a8ff | 1440 | { |
bogdanm | 0:9b334a45a8ff | 1441 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 1442 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 1443 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 1444 | } |
bogdanm | 0:9b334a45a8ff | 1445 | else |
bogdanm | 0:9b334a45a8ff | 1446 | { |
bogdanm | 0:9b334a45a8ff | 1447 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 1448 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 1449 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 1450 | } |
bogdanm | 0:9b334a45a8ff | 1451 | } |
bogdanm | 0:9b334a45a8ff | 1452 | |
bogdanm | 0:9b334a45a8ff | 1453 | /* Enable DMA Request */ |
bogdanm | 0:9b334a45a8ff | 1454 | SET_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN); |
bogdanm | 0:9b334a45a8ff | 1455 | |
bogdanm | 0:9b334a45a8ff | 1456 | /* Clear ADDR flag */ |
bogdanm | 0:9b334a45a8ff | 1457 | __HAL_I2C_CLEAR_ADDRFLAG(hi2c); |
bogdanm | 0:9b334a45a8ff | 1458 | |
bogdanm | 0:9b334a45a8ff | 1459 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 1460 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 1461 | |
bogdanm | 0:9b334a45a8ff | 1462 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 1463 | } |
bogdanm | 0:9b334a45a8ff | 1464 | else |
bogdanm | 0:9b334a45a8ff | 1465 | { |
bogdanm | 0:9b334a45a8ff | 1466 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 1467 | } |
bogdanm | 0:9b334a45a8ff | 1468 | } |
bogdanm | 0:9b334a45a8ff | 1469 | |
bogdanm | 0:9b334a45a8ff | 1470 | /** |
mbed_official | 124:6a4a5b7d7324 | 1471 | * @brief Receive in master mode an amount of data in non-blocking mode with DMA |
mbed_official | 124:6a4a5b7d7324 | 1472 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 1473 | * the configuration information for the specified I2C. |
mbed_official | 124:6a4a5b7d7324 | 1474 | * @param DevAddress Target device address |
mbed_official | 124:6a4a5b7d7324 | 1475 | * @param pData Pointer to data buffer |
mbed_official | 124:6a4a5b7d7324 | 1476 | * @param Size Amount of data to be sent |
bogdanm | 0:9b334a45a8ff | 1477 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 1478 | */ |
bogdanm | 0:9b334a45a8ff | 1479 | HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size) |
bogdanm | 0:9b334a45a8ff | 1480 | { |
bogdanm | 0:9b334a45a8ff | 1481 | if(hi2c->State == HAL_I2C_STATE_READY) |
bogdanm | 0:9b334a45a8ff | 1482 | { |
bogdanm | 0:9b334a45a8ff | 1483 | if((pData == NULL) || (Size == 0)) |
bogdanm | 0:9b334a45a8ff | 1484 | { |
bogdanm | 0:9b334a45a8ff | 1485 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 1486 | } |
bogdanm | 0:9b334a45a8ff | 1487 | |
mbed_official | 124:6a4a5b7d7324 | 1488 | /* Wait until BUSY flag is reset */ |
mbed_official | 124:6a4a5b7d7324 | 1489 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 1490 | { |
bogdanm | 0:9b334a45a8ff | 1491 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 1492 | } |
bogdanm | 0:9b334a45a8ff | 1493 | |
bogdanm | 0:9b334a45a8ff | 1494 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 1495 | __HAL_LOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 1496 | |
mbed_official | 124:6a4a5b7d7324 | 1497 | /* Disable Pos */ |
mbed_official | 124:6a4a5b7d7324 | 1498 | CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); |
mbed_official | 124:6a4a5b7d7324 | 1499 | |
bogdanm | 0:9b334a45a8ff | 1500 | hi2c->State = HAL_I2C_STATE_BUSY_RX; |
mbed_official | 124:6a4a5b7d7324 | 1501 | hi2c->Mode = HAL_I2C_MODE_MASTER; |
bogdanm | 0:9b334a45a8ff | 1502 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
bogdanm | 0:9b334a45a8ff | 1503 | |
bogdanm | 0:9b334a45a8ff | 1504 | hi2c->pBuffPtr = pData; |
bogdanm | 0:9b334a45a8ff | 1505 | hi2c->XferSize = Size; |
bogdanm | 0:9b334a45a8ff | 1506 | hi2c->XferCount = Size; |
bogdanm | 0:9b334a45a8ff | 1507 | |
bogdanm | 0:9b334a45a8ff | 1508 | /* Set the I2C DMA transfert complete callback */ |
bogdanm | 0:9b334a45a8ff | 1509 | hi2c->hdmarx->XferCpltCallback = I2C_DMAMasterReceiveCplt; |
bogdanm | 0:9b334a45a8ff | 1510 | |
bogdanm | 0:9b334a45a8ff | 1511 | /* Set the DMA error callback */ |
bogdanm | 0:9b334a45a8ff | 1512 | hi2c->hdmarx->XferErrorCallback = I2C_DMAError; |
bogdanm | 0:9b334a45a8ff | 1513 | |
bogdanm | 0:9b334a45a8ff | 1514 | /* Enable the DMA channel */ |
bogdanm | 0:9b334a45a8ff | 1515 | HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)pData, Size); |
bogdanm | 0:9b334a45a8ff | 1516 | |
bogdanm | 0:9b334a45a8ff | 1517 | /* Send Slave Address */ |
bogdanm | 0:9b334a45a8ff | 1518 | if(I2C_MasterRequestRead(hi2c, DevAddress, I2C_TIMEOUT_FLAG) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 1519 | { |
bogdanm | 0:9b334a45a8ff | 1520 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
bogdanm | 0:9b334a45a8ff | 1521 | { |
bogdanm | 0:9b334a45a8ff | 1522 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 1523 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 1524 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 1525 | } |
bogdanm | 0:9b334a45a8ff | 1526 | else |
bogdanm | 0:9b334a45a8ff | 1527 | { |
bogdanm | 0:9b334a45a8ff | 1528 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 1529 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 1530 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 1531 | } |
bogdanm | 0:9b334a45a8ff | 1532 | } |
bogdanm | 0:9b334a45a8ff | 1533 | |
bogdanm | 0:9b334a45a8ff | 1534 | if(Size == 1) |
bogdanm | 0:9b334a45a8ff | 1535 | { |
bogdanm | 0:9b334a45a8ff | 1536 | /* Disable Acknowledge */ |
bogdanm | 0:9b334a45a8ff | 1537 | CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); |
bogdanm | 0:9b334a45a8ff | 1538 | } |
bogdanm | 0:9b334a45a8ff | 1539 | else |
bogdanm | 0:9b334a45a8ff | 1540 | { |
bogdanm | 0:9b334a45a8ff | 1541 | /* Enable Last DMA bit */ |
bogdanm | 0:9b334a45a8ff | 1542 | SET_BIT(hi2c->Instance->CR2, I2C_CR2_LAST); |
bogdanm | 0:9b334a45a8ff | 1543 | } |
bogdanm | 0:9b334a45a8ff | 1544 | |
bogdanm | 0:9b334a45a8ff | 1545 | /* Enable DMA Request */ |
bogdanm | 0:9b334a45a8ff | 1546 | SET_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN); |
bogdanm | 0:9b334a45a8ff | 1547 | |
bogdanm | 0:9b334a45a8ff | 1548 | /* Clear ADDR flag */ |
bogdanm | 0:9b334a45a8ff | 1549 | __HAL_I2C_CLEAR_ADDRFLAG(hi2c); |
bogdanm | 0:9b334a45a8ff | 1550 | |
bogdanm | 0:9b334a45a8ff | 1551 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 1552 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 1553 | |
bogdanm | 0:9b334a45a8ff | 1554 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 1555 | } |
bogdanm | 0:9b334a45a8ff | 1556 | else |
bogdanm | 0:9b334a45a8ff | 1557 | { |
bogdanm | 0:9b334a45a8ff | 1558 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 1559 | } |
bogdanm | 0:9b334a45a8ff | 1560 | } |
bogdanm | 0:9b334a45a8ff | 1561 | |
bogdanm | 0:9b334a45a8ff | 1562 | /** |
mbed_official | 124:6a4a5b7d7324 | 1563 | * @brief Transmit in slave mode an amount of data in non-blocking mode with DMA |
mbed_official | 124:6a4a5b7d7324 | 1564 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 1565 | * the configuration information for the specified I2C. |
mbed_official | 124:6a4a5b7d7324 | 1566 | * @param pData Pointer to data buffer |
mbed_official | 124:6a4a5b7d7324 | 1567 | * @param Size Amount of data to be sent |
bogdanm | 0:9b334a45a8ff | 1568 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 1569 | */ |
bogdanm | 0:9b334a45a8ff | 1570 | HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size) |
bogdanm | 0:9b334a45a8ff | 1571 | { |
bogdanm | 0:9b334a45a8ff | 1572 | if(hi2c->State == HAL_I2C_STATE_READY) |
bogdanm | 0:9b334a45a8ff | 1573 | { |
bogdanm | 0:9b334a45a8ff | 1574 | if((pData == NULL) || (Size == 0)) |
bogdanm | 0:9b334a45a8ff | 1575 | { |
bogdanm | 0:9b334a45a8ff | 1576 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 1577 | } |
bogdanm | 0:9b334a45a8ff | 1578 | |
mbed_official | 124:6a4a5b7d7324 | 1579 | /* Wait until BUSY flag is reset */ |
mbed_official | 124:6a4a5b7d7324 | 1580 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 1581 | { |
bogdanm | 0:9b334a45a8ff | 1582 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 1583 | } |
bogdanm | 0:9b334a45a8ff | 1584 | |
bogdanm | 0:9b334a45a8ff | 1585 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 1586 | __HAL_LOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 1587 | |
mbed_official | 124:6a4a5b7d7324 | 1588 | /* Disable Pos */ |
mbed_official | 124:6a4a5b7d7324 | 1589 | CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); |
mbed_official | 124:6a4a5b7d7324 | 1590 | |
bogdanm | 0:9b334a45a8ff | 1591 | hi2c->State = HAL_I2C_STATE_BUSY_TX; |
mbed_official | 124:6a4a5b7d7324 | 1592 | hi2c->Mode = HAL_I2C_MODE_SLAVE; |
bogdanm | 0:9b334a45a8ff | 1593 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
bogdanm | 0:9b334a45a8ff | 1594 | |
bogdanm | 0:9b334a45a8ff | 1595 | hi2c->pBuffPtr = pData; |
bogdanm | 0:9b334a45a8ff | 1596 | hi2c->XferSize = Size; |
bogdanm | 0:9b334a45a8ff | 1597 | hi2c->XferCount = Size; |
bogdanm | 0:9b334a45a8ff | 1598 | |
bogdanm | 0:9b334a45a8ff | 1599 | /* Set the I2C DMA transfert complete callback */ |
bogdanm | 0:9b334a45a8ff | 1600 | hi2c->hdmatx->XferCpltCallback = I2C_DMASlaveTransmitCplt; |
bogdanm | 0:9b334a45a8ff | 1601 | |
bogdanm | 0:9b334a45a8ff | 1602 | /* Set the DMA error callback */ |
bogdanm | 0:9b334a45a8ff | 1603 | hi2c->hdmatx->XferErrorCallback = I2C_DMAError; |
bogdanm | 0:9b334a45a8ff | 1604 | |
bogdanm | 0:9b334a45a8ff | 1605 | /* Enable the DMA channel */ |
bogdanm | 0:9b334a45a8ff | 1606 | HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->DR, Size); |
bogdanm | 0:9b334a45a8ff | 1607 | |
bogdanm | 0:9b334a45a8ff | 1608 | /* Enable DMA Request */ |
bogdanm | 0:9b334a45a8ff | 1609 | SET_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN); |
bogdanm | 0:9b334a45a8ff | 1610 | |
bogdanm | 0:9b334a45a8ff | 1611 | /* Enable Address Acknowledge */ |
bogdanm | 0:9b334a45a8ff | 1612 | SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); |
bogdanm | 0:9b334a45a8ff | 1613 | |
bogdanm | 0:9b334a45a8ff | 1614 | /* Wait until ADDR flag is set */ |
bogdanm | 0:9b334a45a8ff | 1615 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, I2C_TIMEOUT_ADDR_SLAVE) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 1616 | { |
bogdanm | 0:9b334a45a8ff | 1617 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 1618 | } |
bogdanm | 0:9b334a45a8ff | 1619 | |
bogdanm | 0:9b334a45a8ff | 1620 | /* If 7bit addressing mode is selected */ |
bogdanm | 0:9b334a45a8ff | 1621 | if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT) |
bogdanm | 0:9b334a45a8ff | 1622 | { |
bogdanm | 0:9b334a45a8ff | 1623 | /* Clear ADDR flag */ |
bogdanm | 0:9b334a45a8ff | 1624 | __HAL_I2C_CLEAR_ADDRFLAG(hi2c); |
bogdanm | 0:9b334a45a8ff | 1625 | } |
bogdanm | 0:9b334a45a8ff | 1626 | else |
bogdanm | 0:9b334a45a8ff | 1627 | { |
bogdanm | 0:9b334a45a8ff | 1628 | /* Clear ADDR flag */ |
bogdanm | 0:9b334a45a8ff | 1629 | __HAL_I2C_CLEAR_ADDRFLAG(hi2c); |
bogdanm | 0:9b334a45a8ff | 1630 | |
bogdanm | 0:9b334a45a8ff | 1631 | /* Wait until ADDR flag is set */ |
bogdanm | 0:9b334a45a8ff | 1632 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, I2C_TIMEOUT_ADDR_SLAVE) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 1633 | { |
bogdanm | 0:9b334a45a8ff | 1634 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 1635 | } |
bogdanm | 0:9b334a45a8ff | 1636 | |
bogdanm | 0:9b334a45a8ff | 1637 | /* Clear ADDR flag */ |
bogdanm | 0:9b334a45a8ff | 1638 | __HAL_I2C_CLEAR_ADDRFLAG(hi2c); |
bogdanm | 0:9b334a45a8ff | 1639 | } |
bogdanm | 0:9b334a45a8ff | 1640 | |
bogdanm | 0:9b334a45a8ff | 1641 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 1642 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 1643 | |
bogdanm | 0:9b334a45a8ff | 1644 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 1645 | } |
bogdanm | 0:9b334a45a8ff | 1646 | else |
bogdanm | 0:9b334a45a8ff | 1647 | { |
bogdanm | 0:9b334a45a8ff | 1648 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 1649 | } |
bogdanm | 0:9b334a45a8ff | 1650 | } |
bogdanm | 0:9b334a45a8ff | 1651 | |
bogdanm | 0:9b334a45a8ff | 1652 | /** |
mbed_official | 124:6a4a5b7d7324 | 1653 | * @brief Receive in slave mode an amount of data in non-blocking mode with DMA |
mbed_official | 124:6a4a5b7d7324 | 1654 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 1655 | * the configuration information for the specified I2C. |
mbed_official | 124:6a4a5b7d7324 | 1656 | * @param pData Pointer to data buffer |
mbed_official | 124:6a4a5b7d7324 | 1657 | * @param Size Amount of data to be sent |
bogdanm | 0:9b334a45a8ff | 1658 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 1659 | */ |
bogdanm | 0:9b334a45a8ff | 1660 | HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size) |
bogdanm | 0:9b334a45a8ff | 1661 | { |
bogdanm | 0:9b334a45a8ff | 1662 | if(hi2c->State == HAL_I2C_STATE_READY) |
bogdanm | 0:9b334a45a8ff | 1663 | { |
bogdanm | 0:9b334a45a8ff | 1664 | if((pData == NULL) || (Size == 0)) |
bogdanm | 0:9b334a45a8ff | 1665 | { |
bogdanm | 0:9b334a45a8ff | 1666 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 1667 | } |
bogdanm | 0:9b334a45a8ff | 1668 | |
mbed_official | 124:6a4a5b7d7324 | 1669 | /* Wait until BUSY flag is reset */ |
mbed_official | 124:6a4a5b7d7324 | 1670 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 1671 | { |
bogdanm | 0:9b334a45a8ff | 1672 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 1673 | } |
bogdanm | 0:9b334a45a8ff | 1674 | |
bogdanm | 0:9b334a45a8ff | 1675 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 1676 | __HAL_LOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 1677 | |
mbed_official | 124:6a4a5b7d7324 | 1678 | /* Disable Pos */ |
mbed_official | 124:6a4a5b7d7324 | 1679 | CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); |
mbed_official | 124:6a4a5b7d7324 | 1680 | |
bogdanm | 0:9b334a45a8ff | 1681 | hi2c->State = HAL_I2C_STATE_BUSY_RX; |
mbed_official | 124:6a4a5b7d7324 | 1682 | hi2c->Mode = HAL_I2C_MODE_SLAVE; |
bogdanm | 0:9b334a45a8ff | 1683 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
bogdanm | 0:9b334a45a8ff | 1684 | |
bogdanm | 0:9b334a45a8ff | 1685 | hi2c->pBuffPtr = pData; |
bogdanm | 0:9b334a45a8ff | 1686 | hi2c->XferSize = Size; |
bogdanm | 0:9b334a45a8ff | 1687 | hi2c->XferCount = Size; |
bogdanm | 0:9b334a45a8ff | 1688 | |
mbed_official | 124:6a4a5b7d7324 | 1689 | /* Set the I2C DMA transfer complete callback */ |
bogdanm | 0:9b334a45a8ff | 1690 | hi2c->hdmarx->XferCpltCallback = I2C_DMASlaveReceiveCplt; |
bogdanm | 0:9b334a45a8ff | 1691 | |
bogdanm | 0:9b334a45a8ff | 1692 | /* Set the DMA error callback */ |
bogdanm | 0:9b334a45a8ff | 1693 | hi2c->hdmarx->XferErrorCallback = I2C_DMAError; |
bogdanm | 0:9b334a45a8ff | 1694 | |
bogdanm | 0:9b334a45a8ff | 1695 | /* Enable the DMA channel */ |
bogdanm | 0:9b334a45a8ff | 1696 | HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)pData, Size); |
bogdanm | 0:9b334a45a8ff | 1697 | |
bogdanm | 0:9b334a45a8ff | 1698 | /* Enable DMA Request */ |
bogdanm | 0:9b334a45a8ff | 1699 | SET_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN); |
bogdanm | 0:9b334a45a8ff | 1700 | |
bogdanm | 0:9b334a45a8ff | 1701 | /* Enable Address Acknowledge */ |
bogdanm | 0:9b334a45a8ff | 1702 | SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); |
bogdanm | 0:9b334a45a8ff | 1703 | |
bogdanm | 0:9b334a45a8ff | 1704 | /* Wait until ADDR flag is set */ |
bogdanm | 0:9b334a45a8ff | 1705 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, I2C_TIMEOUT_ADDR_SLAVE) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 1706 | { |
bogdanm | 0:9b334a45a8ff | 1707 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 1708 | } |
bogdanm | 0:9b334a45a8ff | 1709 | |
bogdanm | 0:9b334a45a8ff | 1710 | /* Clear ADDR flag */ |
bogdanm | 0:9b334a45a8ff | 1711 | __HAL_I2C_CLEAR_ADDRFLAG(hi2c); |
bogdanm | 0:9b334a45a8ff | 1712 | |
bogdanm | 0:9b334a45a8ff | 1713 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 1714 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 1715 | |
bogdanm | 0:9b334a45a8ff | 1716 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 1717 | } |
bogdanm | 0:9b334a45a8ff | 1718 | else |
bogdanm | 0:9b334a45a8ff | 1719 | { |
bogdanm | 0:9b334a45a8ff | 1720 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 1721 | } |
bogdanm | 0:9b334a45a8ff | 1722 | } |
bogdanm | 0:9b334a45a8ff | 1723 | |
bogdanm | 0:9b334a45a8ff | 1724 | /** |
bogdanm | 0:9b334a45a8ff | 1725 | * @brief Write an amount of data in blocking mode to a specific memory address |
mbed_official | 124:6a4a5b7d7324 | 1726 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 1727 | * the configuration information for the specified I2C. |
mbed_official | 124:6a4a5b7d7324 | 1728 | * @param DevAddress Target device address |
mbed_official | 124:6a4a5b7d7324 | 1729 | * @param MemAddress Internal memory address |
mbed_official | 124:6a4a5b7d7324 | 1730 | * @param MemAddSize Size of internal memory address |
mbed_official | 124:6a4a5b7d7324 | 1731 | * @param pData Pointer to data buffer |
mbed_official | 124:6a4a5b7d7324 | 1732 | * @param Size Amount of data to be sent |
mbed_official | 124:6a4a5b7d7324 | 1733 | * @param Timeout Timeout duration |
bogdanm | 0:9b334a45a8ff | 1734 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 1735 | */ |
bogdanm | 0:9b334a45a8ff | 1736 | HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout) |
bogdanm | 0:9b334a45a8ff | 1737 | { |
bogdanm | 0:9b334a45a8ff | 1738 | /* Check the parameters */ |
bogdanm | 0:9b334a45a8ff | 1739 | assert_param(IS_I2C_MEMADD_SIZE(MemAddSize)); |
bogdanm | 0:9b334a45a8ff | 1740 | |
bogdanm | 0:9b334a45a8ff | 1741 | if(hi2c->State == HAL_I2C_STATE_READY) |
bogdanm | 0:9b334a45a8ff | 1742 | { |
bogdanm | 0:9b334a45a8ff | 1743 | if((pData == NULL) || (Size == 0)) |
bogdanm | 0:9b334a45a8ff | 1744 | { |
bogdanm | 0:9b334a45a8ff | 1745 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 1746 | } |
bogdanm | 0:9b334a45a8ff | 1747 | |
mbed_official | 124:6a4a5b7d7324 | 1748 | /* Wait until BUSY flag is reset */ |
mbed_official | 124:6a4a5b7d7324 | 1749 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 1750 | { |
bogdanm | 0:9b334a45a8ff | 1751 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 1752 | } |
bogdanm | 0:9b334a45a8ff | 1753 | |
bogdanm | 0:9b334a45a8ff | 1754 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 1755 | __HAL_LOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 1756 | |
mbed_official | 124:6a4a5b7d7324 | 1757 | /* Disable Pos */ |
mbed_official | 124:6a4a5b7d7324 | 1758 | CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); |
mbed_official | 124:6a4a5b7d7324 | 1759 | |
mbed_official | 124:6a4a5b7d7324 | 1760 | hi2c->State = HAL_I2C_STATE_BUSY_TX; |
mbed_official | 124:6a4a5b7d7324 | 1761 | hi2c->Mode = HAL_I2C_MODE_MEM; |
bogdanm | 0:9b334a45a8ff | 1762 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
bogdanm | 0:9b334a45a8ff | 1763 | |
bogdanm | 0:9b334a45a8ff | 1764 | /* Send Slave Address and Memory Address */ |
bogdanm | 0:9b334a45a8ff | 1765 | if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 1766 | { |
bogdanm | 0:9b334a45a8ff | 1767 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
bogdanm | 0:9b334a45a8ff | 1768 | { |
bogdanm | 0:9b334a45a8ff | 1769 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 1770 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 1771 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 1772 | } |
bogdanm | 0:9b334a45a8ff | 1773 | else |
bogdanm | 0:9b334a45a8ff | 1774 | { |
bogdanm | 0:9b334a45a8ff | 1775 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 1776 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 1777 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 1778 | } |
bogdanm | 0:9b334a45a8ff | 1779 | } |
bogdanm | 0:9b334a45a8ff | 1780 | |
bogdanm | 0:9b334a45a8ff | 1781 | while(Size > 0) |
bogdanm | 0:9b334a45a8ff | 1782 | { |
bogdanm | 0:9b334a45a8ff | 1783 | /* Wait until TXE flag is set */ |
mbed_official | 124:6a4a5b7d7324 | 1784 | if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 1785 | { |
mbed_official | 124:6a4a5b7d7324 | 1786 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
mbed_official | 124:6a4a5b7d7324 | 1787 | { |
mbed_official | 124:6a4a5b7d7324 | 1788 | /* Generate Stop */ |
mbed_official | 124:6a4a5b7d7324 | 1789 | SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP); |
mbed_official | 124:6a4a5b7d7324 | 1790 | return HAL_ERROR; |
mbed_official | 124:6a4a5b7d7324 | 1791 | } |
mbed_official | 124:6a4a5b7d7324 | 1792 | else |
mbed_official | 124:6a4a5b7d7324 | 1793 | { |
mbed_official | 124:6a4a5b7d7324 | 1794 | return HAL_TIMEOUT; |
mbed_official | 124:6a4a5b7d7324 | 1795 | } |
bogdanm | 0:9b334a45a8ff | 1796 | } |
bogdanm | 0:9b334a45a8ff | 1797 | |
bogdanm | 0:9b334a45a8ff | 1798 | /* Write data to DR */ |
bogdanm | 0:9b334a45a8ff | 1799 | hi2c->Instance->DR = (*pData++); |
bogdanm | 0:9b334a45a8ff | 1800 | Size--; |
bogdanm | 0:9b334a45a8ff | 1801 | |
bogdanm | 0:9b334a45a8ff | 1802 | if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (Size != 0)) |
bogdanm | 0:9b334a45a8ff | 1803 | { |
bogdanm | 0:9b334a45a8ff | 1804 | /* Write data to DR */ |
bogdanm | 0:9b334a45a8ff | 1805 | hi2c->Instance->DR = (*pData++); |
bogdanm | 0:9b334a45a8ff | 1806 | Size--; |
bogdanm | 0:9b334a45a8ff | 1807 | } |
bogdanm | 0:9b334a45a8ff | 1808 | } |
bogdanm | 0:9b334a45a8ff | 1809 | |
bogdanm | 0:9b334a45a8ff | 1810 | /* Wait until TXE flag is set */ |
mbed_official | 124:6a4a5b7d7324 | 1811 | if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 1812 | { |
mbed_official | 124:6a4a5b7d7324 | 1813 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
mbed_official | 124:6a4a5b7d7324 | 1814 | { |
mbed_official | 124:6a4a5b7d7324 | 1815 | /* Generate Stop */ |
mbed_official | 124:6a4a5b7d7324 | 1816 | SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP); |
mbed_official | 124:6a4a5b7d7324 | 1817 | return HAL_ERROR; |
mbed_official | 124:6a4a5b7d7324 | 1818 | } |
mbed_official | 124:6a4a5b7d7324 | 1819 | else |
mbed_official | 124:6a4a5b7d7324 | 1820 | { |
mbed_official | 124:6a4a5b7d7324 | 1821 | return HAL_TIMEOUT; |
mbed_official | 124:6a4a5b7d7324 | 1822 | } |
bogdanm | 0:9b334a45a8ff | 1823 | } |
bogdanm | 0:9b334a45a8ff | 1824 | |
bogdanm | 0:9b334a45a8ff | 1825 | /* Generate Stop */ |
bogdanm | 0:9b334a45a8ff | 1826 | SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); |
bogdanm | 0:9b334a45a8ff | 1827 | |
bogdanm | 0:9b334a45a8ff | 1828 | hi2c->State = HAL_I2C_STATE_READY; |
mbed_official | 124:6a4a5b7d7324 | 1829 | hi2c->Mode = HAL_I2C_MODE_NONE; |
bogdanm | 0:9b334a45a8ff | 1830 | |
bogdanm | 0:9b334a45a8ff | 1831 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 1832 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 1833 | |
bogdanm | 0:9b334a45a8ff | 1834 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 1835 | } |
bogdanm | 0:9b334a45a8ff | 1836 | else |
bogdanm | 0:9b334a45a8ff | 1837 | { |
bogdanm | 0:9b334a45a8ff | 1838 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 1839 | } |
bogdanm | 0:9b334a45a8ff | 1840 | } |
bogdanm | 0:9b334a45a8ff | 1841 | |
bogdanm | 0:9b334a45a8ff | 1842 | /** |
bogdanm | 0:9b334a45a8ff | 1843 | * @brief Read an amount of data in blocking mode from a specific memory address |
mbed_official | 124:6a4a5b7d7324 | 1844 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 1845 | * the configuration information for the specified I2C. |
mbed_official | 124:6a4a5b7d7324 | 1846 | * @param DevAddress Target device address |
mbed_official | 124:6a4a5b7d7324 | 1847 | * @param MemAddress Internal memory address |
mbed_official | 124:6a4a5b7d7324 | 1848 | * @param MemAddSize Size of internal memory address |
mbed_official | 124:6a4a5b7d7324 | 1849 | * @param pData Pointer to data buffer |
mbed_official | 124:6a4a5b7d7324 | 1850 | * @param Size Amount of data to be sent |
mbed_official | 124:6a4a5b7d7324 | 1851 | * @param Timeout Timeout duration |
bogdanm | 0:9b334a45a8ff | 1852 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 1853 | */ |
bogdanm | 0:9b334a45a8ff | 1854 | HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout) |
bogdanm | 0:9b334a45a8ff | 1855 | { |
bogdanm | 0:9b334a45a8ff | 1856 | /* Check the parameters */ |
bogdanm | 0:9b334a45a8ff | 1857 | assert_param(IS_I2C_MEMADD_SIZE(MemAddSize)); |
bogdanm | 0:9b334a45a8ff | 1858 | |
bogdanm | 0:9b334a45a8ff | 1859 | if(hi2c->State == HAL_I2C_STATE_READY) |
bogdanm | 0:9b334a45a8ff | 1860 | { |
bogdanm | 0:9b334a45a8ff | 1861 | if((pData == NULL) || (Size == 0)) |
bogdanm | 0:9b334a45a8ff | 1862 | { |
bogdanm | 0:9b334a45a8ff | 1863 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 1864 | } |
bogdanm | 0:9b334a45a8ff | 1865 | |
mbed_official | 124:6a4a5b7d7324 | 1866 | /* Wait until BUSY flag is reset */ |
mbed_official | 124:6a4a5b7d7324 | 1867 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 1868 | { |
bogdanm | 0:9b334a45a8ff | 1869 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 1870 | } |
bogdanm | 0:9b334a45a8ff | 1871 | |
bogdanm | 0:9b334a45a8ff | 1872 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 1873 | __HAL_LOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 1874 | |
mbed_official | 124:6a4a5b7d7324 | 1875 | /* Disable Pos */ |
mbed_official | 124:6a4a5b7d7324 | 1876 | CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); |
mbed_official | 124:6a4a5b7d7324 | 1877 | |
mbed_official | 124:6a4a5b7d7324 | 1878 | hi2c->State = HAL_I2C_STATE_BUSY_RX; |
mbed_official | 124:6a4a5b7d7324 | 1879 | hi2c->Mode = HAL_I2C_MODE_MEM; |
bogdanm | 0:9b334a45a8ff | 1880 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
bogdanm | 0:9b334a45a8ff | 1881 | |
bogdanm | 0:9b334a45a8ff | 1882 | /* Send Slave Address and Memory Address */ |
bogdanm | 0:9b334a45a8ff | 1883 | if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 1884 | { |
bogdanm | 0:9b334a45a8ff | 1885 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
bogdanm | 0:9b334a45a8ff | 1886 | { |
bogdanm | 0:9b334a45a8ff | 1887 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 1888 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 1889 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 1890 | } |
bogdanm | 0:9b334a45a8ff | 1891 | else |
bogdanm | 0:9b334a45a8ff | 1892 | { |
bogdanm | 0:9b334a45a8ff | 1893 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 1894 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 1895 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 1896 | } |
bogdanm | 0:9b334a45a8ff | 1897 | } |
bogdanm | 0:9b334a45a8ff | 1898 | |
bogdanm | 0:9b334a45a8ff | 1899 | if(Size == 1) |
bogdanm | 0:9b334a45a8ff | 1900 | { |
bogdanm | 0:9b334a45a8ff | 1901 | /* Disable Acknowledge */ |
bogdanm | 0:9b334a45a8ff | 1902 | CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); |
bogdanm | 0:9b334a45a8ff | 1903 | |
mbed_official | 124:6a4a5b7d7324 | 1904 | /* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3 |
mbed_official | 124:6a4a5b7d7324 | 1905 | software sequence must complete before the current byte end of transfer */ |
mbed_official | 124:6a4a5b7d7324 | 1906 | __disable_irq(); |
mbed_official | 124:6a4a5b7d7324 | 1907 | |
bogdanm | 0:9b334a45a8ff | 1908 | /* Clear ADDR flag */ |
bogdanm | 0:9b334a45a8ff | 1909 | __HAL_I2C_CLEAR_ADDRFLAG(hi2c); |
bogdanm | 0:9b334a45a8ff | 1910 | |
bogdanm | 0:9b334a45a8ff | 1911 | /* Generate Stop */ |
bogdanm | 0:9b334a45a8ff | 1912 | SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); |
mbed_official | 124:6a4a5b7d7324 | 1913 | |
mbed_official | 124:6a4a5b7d7324 | 1914 | /* Re-enable IRQs */ |
mbed_official | 124:6a4a5b7d7324 | 1915 | __enable_irq(); |
bogdanm | 0:9b334a45a8ff | 1916 | } |
bogdanm | 0:9b334a45a8ff | 1917 | else if(Size == 2) |
bogdanm | 0:9b334a45a8ff | 1918 | { |
bogdanm | 0:9b334a45a8ff | 1919 | /* Enable Pos */ |
bogdanm | 0:9b334a45a8ff | 1920 | SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS); |
bogdanm | 0:9b334a45a8ff | 1921 | |
mbed_official | 124:6a4a5b7d7324 | 1922 | /* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3 |
mbed_official | 124:6a4a5b7d7324 | 1923 | software sequence must complete before the current byte end of transfer */ |
mbed_official | 124:6a4a5b7d7324 | 1924 | __disable_irq(); |
mbed_official | 124:6a4a5b7d7324 | 1925 | |
bogdanm | 0:9b334a45a8ff | 1926 | /* Clear ADDR flag */ |
bogdanm | 0:9b334a45a8ff | 1927 | __HAL_I2C_CLEAR_ADDRFLAG(hi2c); |
mbed_official | 124:6a4a5b7d7324 | 1928 | |
mbed_official | 124:6a4a5b7d7324 | 1929 | /* Disable Acknowledge */ |
mbed_official | 124:6a4a5b7d7324 | 1930 | CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); |
mbed_official | 124:6a4a5b7d7324 | 1931 | |
mbed_official | 124:6a4a5b7d7324 | 1932 | /* Re-enable IRQs */ |
mbed_official | 124:6a4a5b7d7324 | 1933 | __enable_irq(); |
bogdanm | 0:9b334a45a8ff | 1934 | } |
bogdanm | 0:9b334a45a8ff | 1935 | else |
bogdanm | 0:9b334a45a8ff | 1936 | { |
mbed_official | 124:6a4a5b7d7324 | 1937 | /* Enable Acknowledge */ |
mbed_official | 124:6a4a5b7d7324 | 1938 | SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); |
mbed_official | 124:6a4a5b7d7324 | 1939 | |
bogdanm | 0:9b334a45a8ff | 1940 | /* Clear ADDR flag */ |
bogdanm | 0:9b334a45a8ff | 1941 | __HAL_I2C_CLEAR_ADDRFLAG(hi2c); |
bogdanm | 0:9b334a45a8ff | 1942 | } |
bogdanm | 0:9b334a45a8ff | 1943 | |
bogdanm | 0:9b334a45a8ff | 1944 | while(Size > 0) |
bogdanm | 0:9b334a45a8ff | 1945 | { |
bogdanm | 0:9b334a45a8ff | 1946 | if(Size <= 3) |
bogdanm | 0:9b334a45a8ff | 1947 | { |
bogdanm | 0:9b334a45a8ff | 1948 | /* One byte */ |
bogdanm | 0:9b334a45a8ff | 1949 | if(Size== 1) |
bogdanm | 0:9b334a45a8ff | 1950 | { |
bogdanm | 0:9b334a45a8ff | 1951 | /* Wait until RXNE flag is set */ |
mbed_official | 124:6a4a5b7d7324 | 1952 | if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 1953 | { |
mbed_official | 124:6a4a5b7d7324 | 1954 | if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT) |
mbed_official | 124:6a4a5b7d7324 | 1955 | { |
mbed_official | 124:6a4a5b7d7324 | 1956 | return HAL_TIMEOUT; |
mbed_official | 124:6a4a5b7d7324 | 1957 | } |
mbed_official | 124:6a4a5b7d7324 | 1958 | else |
mbed_official | 124:6a4a5b7d7324 | 1959 | { |
mbed_official | 124:6a4a5b7d7324 | 1960 | return HAL_ERROR; |
mbed_official | 124:6a4a5b7d7324 | 1961 | } |
bogdanm | 0:9b334a45a8ff | 1962 | } |
bogdanm | 0:9b334a45a8ff | 1963 | |
bogdanm | 0:9b334a45a8ff | 1964 | /* Read data from DR */ |
bogdanm | 0:9b334a45a8ff | 1965 | (*pData++) = hi2c->Instance->DR; |
bogdanm | 0:9b334a45a8ff | 1966 | Size--; |
bogdanm | 0:9b334a45a8ff | 1967 | } |
bogdanm | 0:9b334a45a8ff | 1968 | /* Two bytes */ |
bogdanm | 0:9b334a45a8ff | 1969 | else if(Size == 2) |
bogdanm | 0:9b334a45a8ff | 1970 | { |
bogdanm | 0:9b334a45a8ff | 1971 | /* Wait until BTF flag is set */ |
bogdanm | 0:9b334a45a8ff | 1972 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 1973 | { |
bogdanm | 0:9b334a45a8ff | 1974 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 1975 | } |
bogdanm | 0:9b334a45a8ff | 1976 | |
mbed_official | 124:6a4a5b7d7324 | 1977 | /* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3 |
mbed_official | 124:6a4a5b7d7324 | 1978 | software sequence must complete before the current byte end of transfer */ |
mbed_official | 124:6a4a5b7d7324 | 1979 | __disable_irq(); |
mbed_official | 124:6a4a5b7d7324 | 1980 | |
bogdanm | 0:9b334a45a8ff | 1981 | /* Generate Stop */ |
bogdanm | 0:9b334a45a8ff | 1982 | SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); |
bogdanm | 0:9b334a45a8ff | 1983 | |
bogdanm | 0:9b334a45a8ff | 1984 | /* Read data from DR */ |
bogdanm | 0:9b334a45a8ff | 1985 | (*pData++) = hi2c->Instance->DR; |
bogdanm | 0:9b334a45a8ff | 1986 | Size--; |
bogdanm | 0:9b334a45a8ff | 1987 | |
mbed_official | 124:6a4a5b7d7324 | 1988 | /* Re-enable IRQs */ |
mbed_official | 124:6a4a5b7d7324 | 1989 | __enable_irq(); |
mbed_official | 124:6a4a5b7d7324 | 1990 | |
bogdanm | 0:9b334a45a8ff | 1991 | /* Read data from DR */ |
bogdanm | 0:9b334a45a8ff | 1992 | (*pData++) = hi2c->Instance->DR; |
bogdanm | 0:9b334a45a8ff | 1993 | Size--; |
bogdanm | 0:9b334a45a8ff | 1994 | } |
bogdanm | 0:9b334a45a8ff | 1995 | /* 3 Last bytes */ |
bogdanm | 0:9b334a45a8ff | 1996 | else |
bogdanm | 0:9b334a45a8ff | 1997 | { |
bogdanm | 0:9b334a45a8ff | 1998 | /* Wait until BTF flag is set */ |
bogdanm | 0:9b334a45a8ff | 1999 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 2000 | { |
bogdanm | 0:9b334a45a8ff | 2001 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 2002 | } |
bogdanm | 0:9b334a45a8ff | 2003 | |
bogdanm | 0:9b334a45a8ff | 2004 | /* Disable Acknowledge */ |
bogdanm | 0:9b334a45a8ff | 2005 | CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); |
bogdanm | 0:9b334a45a8ff | 2006 | |
mbed_official | 124:6a4a5b7d7324 | 2007 | /* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3 |
mbed_official | 124:6a4a5b7d7324 | 2008 | software sequence must complete before the current byte end of transfer */ |
mbed_official | 124:6a4a5b7d7324 | 2009 | __disable_irq(); |
mbed_official | 124:6a4a5b7d7324 | 2010 | |
bogdanm | 0:9b334a45a8ff | 2011 | /* Read data from DR */ |
bogdanm | 0:9b334a45a8ff | 2012 | (*pData++) = hi2c->Instance->DR; |
bogdanm | 0:9b334a45a8ff | 2013 | Size--; |
bogdanm | 0:9b334a45a8ff | 2014 | |
bogdanm | 0:9b334a45a8ff | 2015 | /* Wait until BTF flag is set */ |
bogdanm | 0:9b334a45a8ff | 2016 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 2017 | { |
bogdanm | 0:9b334a45a8ff | 2018 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 2019 | } |
bogdanm | 0:9b334a45a8ff | 2020 | |
bogdanm | 0:9b334a45a8ff | 2021 | /* Generate Stop */ |
bogdanm | 0:9b334a45a8ff | 2022 | SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); |
bogdanm | 0:9b334a45a8ff | 2023 | |
bogdanm | 0:9b334a45a8ff | 2024 | /* Read data from DR */ |
bogdanm | 0:9b334a45a8ff | 2025 | (*pData++) = hi2c->Instance->DR; |
bogdanm | 0:9b334a45a8ff | 2026 | Size--; |
bogdanm | 0:9b334a45a8ff | 2027 | |
mbed_official | 124:6a4a5b7d7324 | 2028 | /* Re-enable IRQs */ |
mbed_official | 124:6a4a5b7d7324 | 2029 | __enable_irq(); |
mbed_official | 124:6a4a5b7d7324 | 2030 | |
bogdanm | 0:9b334a45a8ff | 2031 | /* Read data from DR */ |
bogdanm | 0:9b334a45a8ff | 2032 | (*pData++) = hi2c->Instance->DR; |
bogdanm | 0:9b334a45a8ff | 2033 | Size--; |
bogdanm | 0:9b334a45a8ff | 2034 | } |
bogdanm | 0:9b334a45a8ff | 2035 | } |
bogdanm | 0:9b334a45a8ff | 2036 | else |
bogdanm | 0:9b334a45a8ff | 2037 | { |
bogdanm | 0:9b334a45a8ff | 2038 | /* Wait until RXNE flag is set */ |
mbed_official | 124:6a4a5b7d7324 | 2039 | if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 2040 | { |
mbed_official | 124:6a4a5b7d7324 | 2041 | if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT) |
mbed_official | 124:6a4a5b7d7324 | 2042 | { |
mbed_official | 124:6a4a5b7d7324 | 2043 | return HAL_TIMEOUT; |
mbed_official | 124:6a4a5b7d7324 | 2044 | } |
mbed_official | 124:6a4a5b7d7324 | 2045 | else |
mbed_official | 124:6a4a5b7d7324 | 2046 | { |
mbed_official | 124:6a4a5b7d7324 | 2047 | return HAL_ERROR; |
mbed_official | 124:6a4a5b7d7324 | 2048 | } |
bogdanm | 0:9b334a45a8ff | 2049 | } |
bogdanm | 0:9b334a45a8ff | 2050 | |
bogdanm | 0:9b334a45a8ff | 2051 | /* Read data from DR */ |
bogdanm | 0:9b334a45a8ff | 2052 | (*pData++) = hi2c->Instance->DR; |
bogdanm | 0:9b334a45a8ff | 2053 | Size--; |
bogdanm | 0:9b334a45a8ff | 2054 | |
bogdanm | 0:9b334a45a8ff | 2055 | if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) |
bogdanm | 0:9b334a45a8ff | 2056 | { |
bogdanm | 0:9b334a45a8ff | 2057 | /* Read data from DR */ |
bogdanm | 0:9b334a45a8ff | 2058 | (*pData++) = hi2c->Instance->DR; |
bogdanm | 0:9b334a45a8ff | 2059 | Size--; |
bogdanm | 0:9b334a45a8ff | 2060 | } |
bogdanm | 0:9b334a45a8ff | 2061 | } |
bogdanm | 0:9b334a45a8ff | 2062 | } |
bogdanm | 0:9b334a45a8ff | 2063 | |
bogdanm | 0:9b334a45a8ff | 2064 | hi2c->State = HAL_I2C_STATE_READY; |
mbed_official | 124:6a4a5b7d7324 | 2065 | hi2c->Mode = HAL_I2C_MODE_NONE; |
bogdanm | 0:9b334a45a8ff | 2066 | |
bogdanm | 0:9b334a45a8ff | 2067 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 2068 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 2069 | |
bogdanm | 0:9b334a45a8ff | 2070 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 2071 | } |
bogdanm | 0:9b334a45a8ff | 2072 | else |
bogdanm | 0:9b334a45a8ff | 2073 | { |
bogdanm | 0:9b334a45a8ff | 2074 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 2075 | } |
bogdanm | 0:9b334a45a8ff | 2076 | } |
bogdanm | 0:9b334a45a8ff | 2077 | |
bogdanm | 0:9b334a45a8ff | 2078 | /** |
mbed_official | 124:6a4a5b7d7324 | 2079 | * @brief Write an amount of data in non-blocking mode with Interrupt to a specific memory address |
mbed_official | 124:6a4a5b7d7324 | 2080 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 2081 | * the configuration information for the specified I2C. |
mbed_official | 124:6a4a5b7d7324 | 2082 | * @param DevAddress Target device address |
mbed_official | 124:6a4a5b7d7324 | 2083 | * @param MemAddress Internal memory address |
mbed_official | 124:6a4a5b7d7324 | 2084 | * @param MemAddSize Size of internal memory address |
mbed_official | 124:6a4a5b7d7324 | 2085 | * @param pData Pointer to data buffer |
mbed_official | 124:6a4a5b7d7324 | 2086 | * @param Size Amount of data to be sent |
bogdanm | 0:9b334a45a8ff | 2087 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 2088 | */ |
bogdanm | 0:9b334a45a8ff | 2089 | HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size) |
bogdanm | 0:9b334a45a8ff | 2090 | { |
bogdanm | 0:9b334a45a8ff | 2091 | /* Check the parameters */ |
bogdanm | 0:9b334a45a8ff | 2092 | assert_param(IS_I2C_MEMADD_SIZE(MemAddSize)); |
bogdanm | 0:9b334a45a8ff | 2093 | |
bogdanm | 0:9b334a45a8ff | 2094 | if(hi2c->State == HAL_I2C_STATE_READY) |
bogdanm | 0:9b334a45a8ff | 2095 | { |
bogdanm | 0:9b334a45a8ff | 2096 | if((pData == NULL) || (Size == 0)) |
bogdanm | 0:9b334a45a8ff | 2097 | { |
bogdanm | 0:9b334a45a8ff | 2098 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 2099 | } |
bogdanm | 0:9b334a45a8ff | 2100 | |
mbed_official | 124:6a4a5b7d7324 | 2101 | /* Wait until BUSY flag is reset */ |
mbed_official | 124:6a4a5b7d7324 | 2102 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 2103 | { |
bogdanm | 0:9b334a45a8ff | 2104 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 2105 | } |
bogdanm | 0:9b334a45a8ff | 2106 | |
bogdanm | 0:9b334a45a8ff | 2107 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 2108 | __HAL_LOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 2109 | |
mbed_official | 124:6a4a5b7d7324 | 2110 | /* Disable Pos */ |
mbed_official | 124:6a4a5b7d7324 | 2111 | CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); |
mbed_official | 124:6a4a5b7d7324 | 2112 | |
mbed_official | 124:6a4a5b7d7324 | 2113 | hi2c->State = HAL_I2C_STATE_BUSY_TX; |
mbed_official | 124:6a4a5b7d7324 | 2114 | hi2c->Mode = HAL_I2C_MODE_MEM; |
bogdanm | 0:9b334a45a8ff | 2115 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
bogdanm | 0:9b334a45a8ff | 2116 | |
bogdanm | 0:9b334a45a8ff | 2117 | hi2c->pBuffPtr = pData; |
bogdanm | 0:9b334a45a8ff | 2118 | hi2c->XferSize = Size; |
bogdanm | 0:9b334a45a8ff | 2119 | hi2c->XferCount = Size; |
bogdanm | 0:9b334a45a8ff | 2120 | |
bogdanm | 0:9b334a45a8ff | 2121 | /* Send Slave Address and Memory Address */ |
bogdanm | 0:9b334a45a8ff | 2122 | if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 2123 | { |
bogdanm | 0:9b334a45a8ff | 2124 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
bogdanm | 0:9b334a45a8ff | 2125 | { |
bogdanm | 0:9b334a45a8ff | 2126 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 2127 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 2128 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 2129 | } |
bogdanm | 0:9b334a45a8ff | 2130 | else |
bogdanm | 0:9b334a45a8ff | 2131 | { |
bogdanm | 0:9b334a45a8ff | 2132 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 2133 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 2134 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 2135 | } |
bogdanm | 0:9b334a45a8ff | 2136 | } |
bogdanm | 0:9b334a45a8ff | 2137 | |
bogdanm | 0:9b334a45a8ff | 2138 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 2139 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 2140 | |
bogdanm | 0:9b334a45a8ff | 2141 | /* Note : The I2C interrupts must be enabled after unlocking current process |
bogdanm | 0:9b334a45a8ff | 2142 | to avoid the risk of I2C interrupt handle execution before current |
bogdanm | 0:9b334a45a8ff | 2143 | process unlock */ |
bogdanm | 0:9b334a45a8ff | 2144 | |
bogdanm | 0:9b334a45a8ff | 2145 | /* Enable EVT, BUF and ERR interrupt */ |
bogdanm | 0:9b334a45a8ff | 2146 | __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR); |
bogdanm | 0:9b334a45a8ff | 2147 | |
bogdanm | 0:9b334a45a8ff | 2148 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 2149 | } |
bogdanm | 0:9b334a45a8ff | 2150 | else |
bogdanm | 0:9b334a45a8ff | 2151 | { |
bogdanm | 0:9b334a45a8ff | 2152 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 2153 | } |
bogdanm | 0:9b334a45a8ff | 2154 | } |
bogdanm | 0:9b334a45a8ff | 2155 | |
bogdanm | 0:9b334a45a8ff | 2156 | /** |
mbed_official | 124:6a4a5b7d7324 | 2157 | * @brief Read an amount of data in non-blocking mode with Interrupt from a specific memory address |
mbed_official | 124:6a4a5b7d7324 | 2158 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 2159 | * the configuration information for the specified I2C. |
mbed_official | 124:6a4a5b7d7324 | 2160 | * @param DevAddress Target device address |
mbed_official | 124:6a4a5b7d7324 | 2161 | * @param MemAddress Internal memory address |
mbed_official | 124:6a4a5b7d7324 | 2162 | * @param MemAddSize Size of internal memory address |
mbed_official | 124:6a4a5b7d7324 | 2163 | * @param pData Pointer to data buffer |
mbed_official | 124:6a4a5b7d7324 | 2164 | * @param Size Amount of data to be sent |
bogdanm | 0:9b334a45a8ff | 2165 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 2166 | */ |
bogdanm | 0:9b334a45a8ff | 2167 | HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size) |
bogdanm | 0:9b334a45a8ff | 2168 | { |
bogdanm | 0:9b334a45a8ff | 2169 | /* Check the parameters */ |
bogdanm | 0:9b334a45a8ff | 2170 | assert_param(IS_I2C_MEMADD_SIZE(MemAddSize)); |
bogdanm | 0:9b334a45a8ff | 2171 | |
bogdanm | 0:9b334a45a8ff | 2172 | if(hi2c->State == HAL_I2C_STATE_READY) |
bogdanm | 0:9b334a45a8ff | 2173 | { |
bogdanm | 0:9b334a45a8ff | 2174 | if((pData == NULL) || (Size == 0)) |
bogdanm | 0:9b334a45a8ff | 2175 | { |
bogdanm | 0:9b334a45a8ff | 2176 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 2177 | } |
bogdanm | 0:9b334a45a8ff | 2178 | |
mbed_official | 124:6a4a5b7d7324 | 2179 | /* Wait until BUSY flag is reset */ |
mbed_official | 124:6a4a5b7d7324 | 2180 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 2181 | { |
bogdanm | 0:9b334a45a8ff | 2182 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 2183 | } |
bogdanm | 0:9b334a45a8ff | 2184 | |
bogdanm | 0:9b334a45a8ff | 2185 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 2186 | __HAL_LOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 2187 | |
mbed_official | 124:6a4a5b7d7324 | 2188 | /* Disable Pos */ |
mbed_official | 124:6a4a5b7d7324 | 2189 | CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); |
mbed_official | 124:6a4a5b7d7324 | 2190 | |
mbed_official | 124:6a4a5b7d7324 | 2191 | hi2c->State = HAL_I2C_STATE_BUSY_RX; |
mbed_official | 124:6a4a5b7d7324 | 2192 | hi2c->Mode = HAL_I2C_MODE_MEM; |
bogdanm | 0:9b334a45a8ff | 2193 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
bogdanm | 0:9b334a45a8ff | 2194 | |
bogdanm | 0:9b334a45a8ff | 2195 | hi2c->pBuffPtr = pData; |
bogdanm | 0:9b334a45a8ff | 2196 | hi2c->XferSize = Size; |
bogdanm | 0:9b334a45a8ff | 2197 | hi2c->XferCount = Size; |
bogdanm | 0:9b334a45a8ff | 2198 | |
bogdanm | 0:9b334a45a8ff | 2199 | /* Send Slave Address and Memory Address */ |
bogdanm | 0:9b334a45a8ff | 2200 | if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 2201 | { |
bogdanm | 0:9b334a45a8ff | 2202 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
bogdanm | 0:9b334a45a8ff | 2203 | { |
bogdanm | 0:9b334a45a8ff | 2204 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 2205 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 2206 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 2207 | } |
bogdanm | 0:9b334a45a8ff | 2208 | else |
bogdanm | 0:9b334a45a8ff | 2209 | { |
bogdanm | 0:9b334a45a8ff | 2210 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 2211 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 2212 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 2213 | } |
bogdanm | 0:9b334a45a8ff | 2214 | } |
bogdanm | 0:9b334a45a8ff | 2215 | |
bogdanm | 0:9b334a45a8ff | 2216 | if(hi2c->XferCount == 1) |
bogdanm | 0:9b334a45a8ff | 2217 | { |
bogdanm | 0:9b334a45a8ff | 2218 | /* Disable Acknowledge */ |
bogdanm | 0:9b334a45a8ff | 2219 | CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); |
bogdanm | 0:9b334a45a8ff | 2220 | |
bogdanm | 0:9b334a45a8ff | 2221 | /* Clear ADDR flag */ |
bogdanm | 0:9b334a45a8ff | 2222 | __HAL_I2C_CLEAR_ADDRFLAG(hi2c); |
bogdanm | 0:9b334a45a8ff | 2223 | |
bogdanm | 0:9b334a45a8ff | 2224 | /* Generate Stop */ |
bogdanm | 0:9b334a45a8ff | 2225 | SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); |
bogdanm | 0:9b334a45a8ff | 2226 | } |
bogdanm | 0:9b334a45a8ff | 2227 | else if(hi2c->XferCount == 2) |
bogdanm | 0:9b334a45a8ff | 2228 | { |
bogdanm | 0:9b334a45a8ff | 2229 | /* Enable Pos */ |
bogdanm | 0:9b334a45a8ff | 2230 | SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS); |
bogdanm | 0:9b334a45a8ff | 2231 | |
bogdanm | 0:9b334a45a8ff | 2232 | /* Clear ADDR flag */ |
bogdanm | 0:9b334a45a8ff | 2233 | __HAL_I2C_CLEAR_ADDRFLAG(hi2c); |
mbed_official | 124:6a4a5b7d7324 | 2234 | |
mbed_official | 124:6a4a5b7d7324 | 2235 | /* Disable Acknowledge */ |
mbed_official | 124:6a4a5b7d7324 | 2236 | CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); |
bogdanm | 0:9b334a45a8ff | 2237 | } |
bogdanm | 0:9b334a45a8ff | 2238 | else |
bogdanm | 0:9b334a45a8ff | 2239 | { |
bogdanm | 0:9b334a45a8ff | 2240 | /* Enable Acknowledge */ |
bogdanm | 0:9b334a45a8ff | 2241 | SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); |
bogdanm | 0:9b334a45a8ff | 2242 | |
bogdanm | 0:9b334a45a8ff | 2243 | /* Clear ADDR flag */ |
bogdanm | 0:9b334a45a8ff | 2244 | __HAL_I2C_CLEAR_ADDRFLAG(hi2c); |
bogdanm | 0:9b334a45a8ff | 2245 | } |
bogdanm | 0:9b334a45a8ff | 2246 | |
bogdanm | 0:9b334a45a8ff | 2247 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 2248 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 2249 | |
bogdanm | 0:9b334a45a8ff | 2250 | /* Note : The I2C interrupts must be enabled after unlocking current process |
bogdanm | 0:9b334a45a8ff | 2251 | to avoid the risk of I2C interrupt handle execution before current |
bogdanm | 0:9b334a45a8ff | 2252 | process unlock */ |
bogdanm | 0:9b334a45a8ff | 2253 | |
bogdanm | 0:9b334a45a8ff | 2254 | /* Enable EVT, BUF and ERR interrupt */ |
bogdanm | 0:9b334a45a8ff | 2255 | __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR); |
bogdanm | 0:9b334a45a8ff | 2256 | |
bogdanm | 0:9b334a45a8ff | 2257 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 2258 | } |
bogdanm | 0:9b334a45a8ff | 2259 | else |
bogdanm | 0:9b334a45a8ff | 2260 | { |
bogdanm | 0:9b334a45a8ff | 2261 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 2262 | } |
bogdanm | 0:9b334a45a8ff | 2263 | } |
bogdanm | 0:9b334a45a8ff | 2264 | |
bogdanm | 0:9b334a45a8ff | 2265 | |
bogdanm | 0:9b334a45a8ff | 2266 | /** |
mbed_official | 124:6a4a5b7d7324 | 2267 | * @brief Write an amount of data in non-blocking mode with DMA to a specific memory address |
mbed_official | 124:6a4a5b7d7324 | 2268 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 2269 | * the configuration information for the specified I2C. |
mbed_official | 124:6a4a5b7d7324 | 2270 | * @param DevAddress Target device address |
mbed_official | 124:6a4a5b7d7324 | 2271 | * @param MemAddress Internal memory address |
mbed_official | 124:6a4a5b7d7324 | 2272 | * @param MemAddSize Size of internal memory address |
mbed_official | 124:6a4a5b7d7324 | 2273 | * @param pData Pointer to data buffer |
mbed_official | 124:6a4a5b7d7324 | 2274 | * @param Size Amount of data to be sent |
bogdanm | 0:9b334a45a8ff | 2275 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 2276 | */ |
bogdanm | 0:9b334a45a8ff | 2277 | HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size) |
bogdanm | 0:9b334a45a8ff | 2278 | { |
bogdanm | 0:9b334a45a8ff | 2279 | /* Check the parameters */ |
bogdanm | 0:9b334a45a8ff | 2280 | assert_param(IS_I2C_MEMADD_SIZE(MemAddSize)); |
bogdanm | 0:9b334a45a8ff | 2281 | |
bogdanm | 0:9b334a45a8ff | 2282 | if(hi2c->State == HAL_I2C_STATE_READY) |
bogdanm | 0:9b334a45a8ff | 2283 | { |
bogdanm | 0:9b334a45a8ff | 2284 | if((pData == NULL) || (Size == 0)) |
bogdanm | 0:9b334a45a8ff | 2285 | { |
bogdanm | 0:9b334a45a8ff | 2286 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 2287 | } |
bogdanm | 0:9b334a45a8ff | 2288 | |
mbed_official | 124:6a4a5b7d7324 | 2289 | /* Wait until BUSY flag is reset */ |
mbed_official | 124:6a4a5b7d7324 | 2290 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 2291 | { |
bogdanm | 0:9b334a45a8ff | 2292 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 2293 | } |
bogdanm | 0:9b334a45a8ff | 2294 | |
bogdanm | 0:9b334a45a8ff | 2295 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 2296 | __HAL_LOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 2297 | |
mbed_official | 124:6a4a5b7d7324 | 2298 | /* Disable Pos */ |
mbed_official | 124:6a4a5b7d7324 | 2299 | CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); |
mbed_official | 124:6a4a5b7d7324 | 2300 | |
mbed_official | 124:6a4a5b7d7324 | 2301 | hi2c->State = HAL_I2C_STATE_BUSY_TX; |
mbed_official | 124:6a4a5b7d7324 | 2302 | hi2c->Mode = HAL_I2C_MODE_MEM; |
bogdanm | 0:9b334a45a8ff | 2303 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
bogdanm | 0:9b334a45a8ff | 2304 | |
bogdanm | 0:9b334a45a8ff | 2305 | hi2c->pBuffPtr = pData; |
bogdanm | 0:9b334a45a8ff | 2306 | hi2c->XferSize = Size; |
bogdanm | 0:9b334a45a8ff | 2307 | hi2c->XferCount = Size; |
bogdanm | 0:9b334a45a8ff | 2308 | |
bogdanm | 0:9b334a45a8ff | 2309 | /* Set the I2C DMA transfert complete callback */ |
bogdanm | 0:9b334a45a8ff | 2310 | hi2c->hdmatx->XferCpltCallback = I2C_DMAMemTransmitCplt; |
bogdanm | 0:9b334a45a8ff | 2311 | |
bogdanm | 0:9b334a45a8ff | 2312 | /* Set the DMA error callback */ |
bogdanm | 0:9b334a45a8ff | 2313 | hi2c->hdmatx->XferErrorCallback = I2C_DMAError; |
bogdanm | 0:9b334a45a8ff | 2314 | |
bogdanm | 0:9b334a45a8ff | 2315 | /* Enable the DMA channel */ |
bogdanm | 0:9b334a45a8ff | 2316 | HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->DR, Size); |
bogdanm | 0:9b334a45a8ff | 2317 | |
bogdanm | 0:9b334a45a8ff | 2318 | /* Send Slave Address and Memory Address */ |
bogdanm | 0:9b334a45a8ff | 2319 | if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 2320 | { |
bogdanm | 0:9b334a45a8ff | 2321 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
bogdanm | 0:9b334a45a8ff | 2322 | { |
bogdanm | 0:9b334a45a8ff | 2323 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 2324 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 2325 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 2326 | } |
bogdanm | 0:9b334a45a8ff | 2327 | else |
bogdanm | 0:9b334a45a8ff | 2328 | { |
bogdanm | 0:9b334a45a8ff | 2329 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 2330 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 2331 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 2332 | } |
bogdanm | 0:9b334a45a8ff | 2333 | } |
bogdanm | 0:9b334a45a8ff | 2334 | |
bogdanm | 0:9b334a45a8ff | 2335 | /* Enable DMA Request */ |
bogdanm | 0:9b334a45a8ff | 2336 | SET_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN); |
bogdanm | 0:9b334a45a8ff | 2337 | |
bogdanm | 0:9b334a45a8ff | 2338 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 2339 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 2340 | |
bogdanm | 0:9b334a45a8ff | 2341 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 2342 | } |
bogdanm | 0:9b334a45a8ff | 2343 | else |
bogdanm | 0:9b334a45a8ff | 2344 | { |
bogdanm | 0:9b334a45a8ff | 2345 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 2346 | } |
bogdanm | 0:9b334a45a8ff | 2347 | } |
bogdanm | 0:9b334a45a8ff | 2348 | |
bogdanm | 0:9b334a45a8ff | 2349 | /** |
mbed_official | 124:6a4a5b7d7324 | 2350 | * @brief Reads an amount of data in non-blocking mode with DMA from a specific memory address. |
mbed_official | 124:6a4a5b7d7324 | 2351 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 2352 | * the configuration information for the specified I2C. |
mbed_official | 124:6a4a5b7d7324 | 2353 | * @param DevAddress Target device address |
mbed_official | 124:6a4a5b7d7324 | 2354 | * @param MemAddress Internal memory address |
mbed_official | 124:6a4a5b7d7324 | 2355 | * @param MemAddSize Size of internal memory address |
mbed_official | 124:6a4a5b7d7324 | 2356 | * @param pData Pointer to data buffer |
mbed_official | 124:6a4a5b7d7324 | 2357 | * @param Size Amount of data to be read |
bogdanm | 0:9b334a45a8ff | 2358 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 2359 | */ |
bogdanm | 0:9b334a45a8ff | 2360 | HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size) |
bogdanm | 0:9b334a45a8ff | 2361 | { |
bogdanm | 0:9b334a45a8ff | 2362 | /* Check the parameters */ |
bogdanm | 0:9b334a45a8ff | 2363 | assert_param(IS_I2C_MEMADD_SIZE(MemAddSize)); |
bogdanm | 0:9b334a45a8ff | 2364 | |
bogdanm | 0:9b334a45a8ff | 2365 | if(hi2c->State == HAL_I2C_STATE_READY) |
bogdanm | 0:9b334a45a8ff | 2366 | { |
bogdanm | 0:9b334a45a8ff | 2367 | if((pData == NULL) || (Size == 0)) |
bogdanm | 0:9b334a45a8ff | 2368 | { |
bogdanm | 0:9b334a45a8ff | 2369 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 2370 | } |
bogdanm | 0:9b334a45a8ff | 2371 | |
mbed_official | 124:6a4a5b7d7324 | 2372 | /* Wait until BUSY flag is reset */ |
mbed_official | 124:6a4a5b7d7324 | 2373 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 2374 | { |
bogdanm | 0:9b334a45a8ff | 2375 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 2376 | } |
bogdanm | 0:9b334a45a8ff | 2377 | |
bogdanm | 0:9b334a45a8ff | 2378 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 2379 | __HAL_LOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 2380 | |
mbed_official | 124:6a4a5b7d7324 | 2381 | /* Disable Pos */ |
mbed_official | 124:6a4a5b7d7324 | 2382 | CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); |
mbed_official | 124:6a4a5b7d7324 | 2383 | |
mbed_official | 124:6a4a5b7d7324 | 2384 | hi2c->State = HAL_I2C_STATE_BUSY_RX; |
mbed_official | 124:6a4a5b7d7324 | 2385 | hi2c->Mode = HAL_I2C_MODE_MEM; |
bogdanm | 0:9b334a45a8ff | 2386 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
bogdanm | 0:9b334a45a8ff | 2387 | |
bogdanm | 0:9b334a45a8ff | 2388 | hi2c->pBuffPtr = pData; |
bogdanm | 0:9b334a45a8ff | 2389 | hi2c->XferSize = Size; |
bogdanm | 0:9b334a45a8ff | 2390 | hi2c->XferCount = Size; |
bogdanm | 0:9b334a45a8ff | 2391 | |
bogdanm | 0:9b334a45a8ff | 2392 | /* Set the I2C DMA transfert complete callback */ |
bogdanm | 0:9b334a45a8ff | 2393 | hi2c->hdmarx->XferCpltCallback = I2C_DMAMemReceiveCplt; |
bogdanm | 0:9b334a45a8ff | 2394 | |
bogdanm | 0:9b334a45a8ff | 2395 | /* Set the DMA error callback */ |
bogdanm | 0:9b334a45a8ff | 2396 | hi2c->hdmarx->XferErrorCallback = I2C_DMAError; |
bogdanm | 0:9b334a45a8ff | 2397 | |
bogdanm | 0:9b334a45a8ff | 2398 | /* Enable the DMA channel */ |
bogdanm | 0:9b334a45a8ff | 2399 | HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)pData, Size); |
bogdanm | 0:9b334a45a8ff | 2400 | |
bogdanm | 0:9b334a45a8ff | 2401 | /* Send Slave Address and Memory Address */ |
bogdanm | 0:9b334a45a8ff | 2402 | if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 2403 | { |
bogdanm | 0:9b334a45a8ff | 2404 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
bogdanm | 0:9b334a45a8ff | 2405 | { |
bogdanm | 0:9b334a45a8ff | 2406 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 2407 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 2408 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 2409 | } |
bogdanm | 0:9b334a45a8ff | 2410 | else |
bogdanm | 0:9b334a45a8ff | 2411 | { |
bogdanm | 0:9b334a45a8ff | 2412 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 2413 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 2414 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 2415 | } |
bogdanm | 0:9b334a45a8ff | 2416 | } |
bogdanm | 0:9b334a45a8ff | 2417 | |
bogdanm | 0:9b334a45a8ff | 2418 | if(Size == 1) |
bogdanm | 0:9b334a45a8ff | 2419 | { |
bogdanm | 0:9b334a45a8ff | 2420 | /* Disable Acknowledge */ |
bogdanm | 0:9b334a45a8ff | 2421 | CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); |
bogdanm | 0:9b334a45a8ff | 2422 | } |
bogdanm | 0:9b334a45a8ff | 2423 | else |
bogdanm | 0:9b334a45a8ff | 2424 | { |
bogdanm | 0:9b334a45a8ff | 2425 | /* Enable Last DMA bit */ |
bogdanm | 0:9b334a45a8ff | 2426 | SET_BIT(hi2c->Instance->CR2, I2C_CR2_LAST); |
bogdanm | 0:9b334a45a8ff | 2427 | } |
bogdanm | 0:9b334a45a8ff | 2428 | |
bogdanm | 0:9b334a45a8ff | 2429 | /* Enable DMA Request */ |
bogdanm | 0:9b334a45a8ff | 2430 | SET_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN); |
bogdanm | 0:9b334a45a8ff | 2431 | |
bogdanm | 0:9b334a45a8ff | 2432 | /* Clear ADDR flag */ |
bogdanm | 0:9b334a45a8ff | 2433 | __HAL_I2C_CLEAR_ADDRFLAG(hi2c); |
bogdanm | 0:9b334a45a8ff | 2434 | |
bogdanm | 0:9b334a45a8ff | 2435 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 2436 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 2437 | |
bogdanm | 0:9b334a45a8ff | 2438 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 2439 | } |
bogdanm | 0:9b334a45a8ff | 2440 | else |
bogdanm | 0:9b334a45a8ff | 2441 | { |
bogdanm | 0:9b334a45a8ff | 2442 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 2443 | } |
bogdanm | 0:9b334a45a8ff | 2444 | } |
bogdanm | 0:9b334a45a8ff | 2445 | |
bogdanm | 0:9b334a45a8ff | 2446 | |
bogdanm | 0:9b334a45a8ff | 2447 | /** |
bogdanm | 0:9b334a45a8ff | 2448 | * @brief Checks if target device is ready for communication. |
bogdanm | 0:9b334a45a8ff | 2449 | * @note This function is used with Memory devices |
mbed_official | 124:6a4a5b7d7324 | 2450 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 2451 | * the configuration information for the specified I2C. |
mbed_official | 124:6a4a5b7d7324 | 2452 | * @param DevAddress Target device address |
mbed_official | 124:6a4a5b7d7324 | 2453 | * @param Trials Number of trials |
mbed_official | 124:6a4a5b7d7324 | 2454 | * @param Timeout Timeout duration |
bogdanm | 0:9b334a45a8ff | 2455 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 2456 | */ |
bogdanm | 0:9b334a45a8ff | 2457 | HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout) |
bogdanm | 0:9b334a45a8ff | 2458 | { |
bogdanm | 0:9b334a45a8ff | 2459 | uint32_t tickstart = 0, tmp1 = 0, tmp2 = 0, tmp3 = 0, I2C_Trials = 1; |
bogdanm | 0:9b334a45a8ff | 2460 | |
bogdanm | 0:9b334a45a8ff | 2461 | if(hi2c->State == HAL_I2C_STATE_READY) |
bogdanm | 0:9b334a45a8ff | 2462 | { |
mbed_official | 124:6a4a5b7d7324 | 2463 | /* Wait until BUSY flag is reset */ |
mbed_official | 124:6a4a5b7d7324 | 2464 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 2465 | { |
bogdanm | 0:9b334a45a8ff | 2466 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 2467 | } |
bogdanm | 0:9b334a45a8ff | 2468 | |
bogdanm | 0:9b334a45a8ff | 2469 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 2470 | __HAL_LOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 2471 | |
mbed_official | 124:6a4a5b7d7324 | 2472 | /* Disable Pos */ |
mbed_official | 124:6a4a5b7d7324 | 2473 | CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); |
mbed_official | 124:6a4a5b7d7324 | 2474 | |
bogdanm | 0:9b334a45a8ff | 2475 | hi2c->State = HAL_I2C_STATE_BUSY; |
bogdanm | 0:9b334a45a8ff | 2476 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
bogdanm | 0:9b334a45a8ff | 2477 | |
bogdanm | 0:9b334a45a8ff | 2478 | do |
bogdanm | 0:9b334a45a8ff | 2479 | { |
bogdanm | 0:9b334a45a8ff | 2480 | /* Generate Start */ |
bogdanm | 0:9b334a45a8ff | 2481 | SET_BIT(hi2c->Instance->CR1, I2C_CR1_START); |
bogdanm | 0:9b334a45a8ff | 2482 | |
bogdanm | 0:9b334a45a8ff | 2483 | /* Wait until SB flag is set */ |
bogdanm | 0:9b334a45a8ff | 2484 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 2485 | { |
bogdanm | 0:9b334a45a8ff | 2486 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 2487 | } |
bogdanm | 0:9b334a45a8ff | 2488 | |
bogdanm | 0:9b334a45a8ff | 2489 | /* Send slave address */ |
bogdanm | 0:9b334a45a8ff | 2490 | hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress); |
bogdanm | 0:9b334a45a8ff | 2491 | |
bogdanm | 0:9b334a45a8ff | 2492 | /* Wait until ADDR or AF flag are set */ |
bogdanm | 0:9b334a45a8ff | 2493 | /* Get tick */ |
bogdanm | 0:9b334a45a8ff | 2494 | tickstart = HAL_GetTick(); |
bogdanm | 0:9b334a45a8ff | 2495 | |
bogdanm | 0:9b334a45a8ff | 2496 | tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR); |
bogdanm | 0:9b334a45a8ff | 2497 | tmp2 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF); |
bogdanm | 0:9b334a45a8ff | 2498 | tmp3 = hi2c->State; |
bogdanm | 0:9b334a45a8ff | 2499 | while((tmp1 == RESET) && (tmp2 == RESET) && (tmp3 != HAL_I2C_STATE_TIMEOUT)) |
bogdanm | 0:9b334a45a8ff | 2500 | { |
bogdanm | 0:9b334a45a8ff | 2501 | if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout)) |
bogdanm | 0:9b334a45a8ff | 2502 | { |
bogdanm | 0:9b334a45a8ff | 2503 | hi2c->State = HAL_I2C_STATE_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 2504 | } |
bogdanm | 0:9b334a45a8ff | 2505 | tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR); |
bogdanm | 0:9b334a45a8ff | 2506 | tmp2 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF); |
bogdanm | 0:9b334a45a8ff | 2507 | tmp3 = hi2c->State; |
bogdanm | 0:9b334a45a8ff | 2508 | } |
bogdanm | 0:9b334a45a8ff | 2509 | |
bogdanm | 0:9b334a45a8ff | 2510 | hi2c->State = HAL_I2C_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 2511 | |
bogdanm | 0:9b334a45a8ff | 2512 | /* Check if the ADDR flag has been set */ |
bogdanm | 0:9b334a45a8ff | 2513 | if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR) == SET) |
bogdanm | 0:9b334a45a8ff | 2514 | { |
bogdanm | 0:9b334a45a8ff | 2515 | /* Generate Stop */ |
bogdanm | 0:9b334a45a8ff | 2516 | SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); |
bogdanm | 0:9b334a45a8ff | 2517 | |
bogdanm | 0:9b334a45a8ff | 2518 | /* Clear ADDR Flag */ |
bogdanm | 0:9b334a45a8ff | 2519 | __HAL_I2C_CLEAR_ADDRFLAG(hi2c); |
bogdanm | 0:9b334a45a8ff | 2520 | |
bogdanm | 0:9b334a45a8ff | 2521 | /* Wait until BUSY flag is reset */ |
mbed_official | 124:6a4a5b7d7324 | 2522 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 2523 | { |
bogdanm | 0:9b334a45a8ff | 2524 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 2525 | } |
bogdanm | 0:9b334a45a8ff | 2526 | |
bogdanm | 0:9b334a45a8ff | 2527 | hi2c->State = HAL_I2C_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 2528 | |
bogdanm | 0:9b334a45a8ff | 2529 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 2530 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 2531 | |
bogdanm | 0:9b334a45a8ff | 2532 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 2533 | } |
bogdanm | 0:9b334a45a8ff | 2534 | else |
bogdanm | 0:9b334a45a8ff | 2535 | { |
bogdanm | 0:9b334a45a8ff | 2536 | /* Generate Stop */ |
bogdanm | 0:9b334a45a8ff | 2537 | SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); |
bogdanm | 0:9b334a45a8ff | 2538 | |
bogdanm | 0:9b334a45a8ff | 2539 | /* Clear AF Flag */ |
bogdanm | 0:9b334a45a8ff | 2540 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); |
bogdanm | 0:9b334a45a8ff | 2541 | |
bogdanm | 0:9b334a45a8ff | 2542 | /* Wait until BUSY flag is reset */ |
mbed_official | 124:6a4a5b7d7324 | 2543 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 2544 | { |
bogdanm | 0:9b334a45a8ff | 2545 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 2546 | } |
bogdanm | 0:9b334a45a8ff | 2547 | } |
bogdanm | 0:9b334a45a8ff | 2548 | }while(I2C_Trials++ < Trials); |
bogdanm | 0:9b334a45a8ff | 2549 | |
bogdanm | 0:9b334a45a8ff | 2550 | hi2c->State = HAL_I2C_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 2551 | |
bogdanm | 0:9b334a45a8ff | 2552 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 2553 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 2554 | |
bogdanm | 0:9b334a45a8ff | 2555 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 2556 | } |
bogdanm | 0:9b334a45a8ff | 2557 | else |
bogdanm | 0:9b334a45a8ff | 2558 | { |
bogdanm | 0:9b334a45a8ff | 2559 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 2560 | } |
bogdanm | 0:9b334a45a8ff | 2561 | } |
bogdanm | 0:9b334a45a8ff | 2562 | /** |
bogdanm | 0:9b334a45a8ff | 2563 | * @} |
bogdanm | 0:9b334a45a8ff | 2564 | */ |
bogdanm | 0:9b334a45a8ff | 2565 | |
mbed_official | 124:6a4a5b7d7324 | 2566 | /** @defgroup I2C_Exported_Functions_Group4 IRQ Handler and Callbacks |
bogdanm | 0:9b334a45a8ff | 2567 | * @{ |
bogdanm | 0:9b334a45a8ff | 2568 | */ |
bogdanm | 0:9b334a45a8ff | 2569 | |
bogdanm | 0:9b334a45a8ff | 2570 | /** |
bogdanm | 0:9b334a45a8ff | 2571 | * @brief This function handles I2C event interrupt request. |
mbed_official | 124:6a4a5b7d7324 | 2572 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 2573 | * the configuration information for the specified I2C. |
bogdanm | 0:9b334a45a8ff | 2574 | * @retval None |
bogdanm | 0:9b334a45a8ff | 2575 | */ |
bogdanm | 0:9b334a45a8ff | 2576 | void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c) |
bogdanm | 0:9b334a45a8ff | 2577 | { |
bogdanm | 0:9b334a45a8ff | 2578 | uint32_t tmp1 = 0, tmp2 = 0, tmp3 = 0, tmp4 = 0; |
mbed_official | 124:6a4a5b7d7324 | 2579 | /* Master or Memory mode selected */ |
mbed_official | 124:6a4a5b7d7324 | 2580 | if((hi2c->Mode == HAL_I2C_MODE_MASTER) || \ |
mbed_official | 124:6a4a5b7d7324 | 2581 | (hi2c->Mode == HAL_I2C_MODE_MEM)) |
bogdanm | 0:9b334a45a8ff | 2582 | { |
bogdanm | 0:9b334a45a8ff | 2583 | /* I2C in mode Transmitter -----------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 2584 | if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TRA) == SET) |
bogdanm | 0:9b334a45a8ff | 2585 | { |
bogdanm | 0:9b334a45a8ff | 2586 | tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE); |
bogdanm | 0:9b334a45a8ff | 2587 | tmp2 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_BUF); |
bogdanm | 0:9b334a45a8ff | 2588 | tmp3 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF); |
bogdanm | 0:9b334a45a8ff | 2589 | tmp4 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_EVT); |
bogdanm | 0:9b334a45a8ff | 2590 | /* TXE set and BTF reset -----------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 2591 | if((tmp1 == SET) && (tmp2 == SET) && (tmp3 == RESET)) |
bogdanm | 0:9b334a45a8ff | 2592 | { |
bogdanm | 0:9b334a45a8ff | 2593 | I2C_MasterTransmit_TXE(hi2c); |
bogdanm | 0:9b334a45a8ff | 2594 | } |
bogdanm | 0:9b334a45a8ff | 2595 | /* BTF set -------------------------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 2596 | else if((tmp3 == SET) && (tmp4 == SET)) |
bogdanm | 0:9b334a45a8ff | 2597 | { |
bogdanm | 0:9b334a45a8ff | 2598 | I2C_MasterTransmit_BTF(hi2c); |
bogdanm | 0:9b334a45a8ff | 2599 | } |
bogdanm | 0:9b334a45a8ff | 2600 | } |
bogdanm | 0:9b334a45a8ff | 2601 | /* I2C in mode Receiver --------------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 2602 | else |
bogdanm | 0:9b334a45a8ff | 2603 | { |
bogdanm | 0:9b334a45a8ff | 2604 | tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE); |
bogdanm | 0:9b334a45a8ff | 2605 | tmp2 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_BUF); |
bogdanm | 0:9b334a45a8ff | 2606 | tmp3 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF); |
bogdanm | 0:9b334a45a8ff | 2607 | tmp4 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_EVT); |
bogdanm | 0:9b334a45a8ff | 2608 | /* RXNE set and BTF reset -----------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 2609 | if((tmp1 == SET) && (tmp2 == SET) && (tmp3 == RESET)) |
bogdanm | 0:9b334a45a8ff | 2610 | { |
bogdanm | 0:9b334a45a8ff | 2611 | I2C_MasterReceive_RXNE(hi2c); |
bogdanm | 0:9b334a45a8ff | 2612 | } |
bogdanm | 0:9b334a45a8ff | 2613 | /* BTF set -------------------------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 2614 | else if((tmp3 == SET) && (tmp4 == SET)) |
bogdanm | 0:9b334a45a8ff | 2615 | { |
bogdanm | 0:9b334a45a8ff | 2616 | I2C_MasterReceive_BTF(hi2c); |
bogdanm | 0:9b334a45a8ff | 2617 | } |
bogdanm | 0:9b334a45a8ff | 2618 | } |
bogdanm | 0:9b334a45a8ff | 2619 | } |
bogdanm | 0:9b334a45a8ff | 2620 | /* Slave mode selected */ |
bogdanm | 0:9b334a45a8ff | 2621 | else |
bogdanm | 0:9b334a45a8ff | 2622 | { |
bogdanm | 0:9b334a45a8ff | 2623 | tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR); |
bogdanm | 0:9b334a45a8ff | 2624 | tmp2 = __HAL_I2C_GET_IT_SOURCE(hi2c, (I2C_IT_EVT)); |
bogdanm | 0:9b334a45a8ff | 2625 | tmp3 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF); |
bogdanm | 0:9b334a45a8ff | 2626 | tmp4 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TRA); |
bogdanm | 0:9b334a45a8ff | 2627 | /* ADDR set --------------------------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 2628 | if((tmp1 == SET) && (tmp2 == SET)) |
bogdanm | 0:9b334a45a8ff | 2629 | { |
bogdanm | 0:9b334a45a8ff | 2630 | I2C_Slave_ADDR(hi2c); |
bogdanm | 0:9b334a45a8ff | 2631 | } |
bogdanm | 0:9b334a45a8ff | 2632 | /* STOPF set --------------------------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 2633 | else if((tmp3 == SET) && (tmp2 == SET)) |
bogdanm | 0:9b334a45a8ff | 2634 | { |
bogdanm | 0:9b334a45a8ff | 2635 | I2C_Slave_STOPF(hi2c); |
bogdanm | 0:9b334a45a8ff | 2636 | } |
bogdanm | 0:9b334a45a8ff | 2637 | /* I2C in mode Transmitter -----------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 2638 | else if(tmp4 == SET) |
bogdanm | 0:9b334a45a8ff | 2639 | { |
bogdanm | 0:9b334a45a8ff | 2640 | tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE); |
bogdanm | 0:9b334a45a8ff | 2641 | tmp2 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_BUF); |
bogdanm | 0:9b334a45a8ff | 2642 | tmp3 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF); |
bogdanm | 0:9b334a45a8ff | 2643 | tmp4 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_EVT); |
bogdanm | 0:9b334a45a8ff | 2644 | /* TXE set and BTF reset -----------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 2645 | if((tmp1 == SET) && (tmp2 == SET) && (tmp3 == RESET)) |
bogdanm | 0:9b334a45a8ff | 2646 | { |
bogdanm | 0:9b334a45a8ff | 2647 | I2C_SlaveTransmit_TXE(hi2c); |
bogdanm | 0:9b334a45a8ff | 2648 | } |
bogdanm | 0:9b334a45a8ff | 2649 | /* BTF set -------------------------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 2650 | else if((tmp3 == SET) && (tmp4 == SET)) |
bogdanm | 0:9b334a45a8ff | 2651 | { |
bogdanm | 0:9b334a45a8ff | 2652 | I2C_SlaveTransmit_BTF(hi2c); |
bogdanm | 0:9b334a45a8ff | 2653 | } |
bogdanm | 0:9b334a45a8ff | 2654 | } |
bogdanm | 0:9b334a45a8ff | 2655 | /* I2C in mode Receiver --------------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 2656 | else |
bogdanm | 0:9b334a45a8ff | 2657 | { |
bogdanm | 0:9b334a45a8ff | 2658 | tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE); |
bogdanm | 0:9b334a45a8ff | 2659 | tmp2 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_BUF); |
bogdanm | 0:9b334a45a8ff | 2660 | tmp3 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF); |
bogdanm | 0:9b334a45a8ff | 2661 | tmp4 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_EVT); |
bogdanm | 0:9b334a45a8ff | 2662 | /* RXNE set and BTF reset ----------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 2663 | if((tmp1 == SET) && (tmp2 == SET) && (tmp3 == RESET)) |
bogdanm | 0:9b334a45a8ff | 2664 | { |
bogdanm | 0:9b334a45a8ff | 2665 | I2C_SlaveReceive_RXNE(hi2c); |
bogdanm | 0:9b334a45a8ff | 2666 | } |
bogdanm | 0:9b334a45a8ff | 2667 | /* BTF set -------------------------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 2668 | else if((tmp3 == SET) && (tmp4 == SET)) |
bogdanm | 0:9b334a45a8ff | 2669 | { |
bogdanm | 0:9b334a45a8ff | 2670 | I2C_SlaveReceive_BTF(hi2c); |
bogdanm | 0:9b334a45a8ff | 2671 | } |
bogdanm | 0:9b334a45a8ff | 2672 | } |
bogdanm | 0:9b334a45a8ff | 2673 | } |
bogdanm | 0:9b334a45a8ff | 2674 | } |
bogdanm | 0:9b334a45a8ff | 2675 | |
bogdanm | 0:9b334a45a8ff | 2676 | /** |
bogdanm | 0:9b334a45a8ff | 2677 | * @brief This function handles I2C error interrupt request. |
bogdanm | 0:9b334a45a8ff | 2678 | * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 2679 | * the configuration information for I2C module |
bogdanm | 0:9b334a45a8ff | 2680 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 2681 | */ |
bogdanm | 0:9b334a45a8ff | 2682 | void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c) |
bogdanm | 0:9b334a45a8ff | 2683 | { |
bogdanm | 0:9b334a45a8ff | 2684 | uint32_t tmp1 = 0, tmp2 = 0, tmp3 = 0; |
bogdanm | 0:9b334a45a8ff | 2685 | |
bogdanm | 0:9b334a45a8ff | 2686 | tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BERR); |
bogdanm | 0:9b334a45a8ff | 2687 | tmp2 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_ERR); |
bogdanm | 0:9b334a45a8ff | 2688 | /* I2C Bus error interrupt occurred ----------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 2689 | if((tmp1 == SET) && (tmp2 == SET)) |
bogdanm | 0:9b334a45a8ff | 2690 | { |
bogdanm | 0:9b334a45a8ff | 2691 | hi2c->ErrorCode |= HAL_I2C_ERROR_BERR; |
bogdanm | 0:9b334a45a8ff | 2692 | |
bogdanm | 0:9b334a45a8ff | 2693 | /* Clear BERR flag */ |
bogdanm | 0:9b334a45a8ff | 2694 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_BERR); |
bogdanm | 0:9b334a45a8ff | 2695 | |
bogdanm | 0:9b334a45a8ff | 2696 | /* Workaround: Start cannot be generated after a misplaced Stop */ |
bogdanm | 0:9b334a45a8ff | 2697 | SET_BIT(hi2c->Instance->CR1, I2C_CR1_SWRST); |
bogdanm | 0:9b334a45a8ff | 2698 | } |
bogdanm | 0:9b334a45a8ff | 2699 | |
bogdanm | 0:9b334a45a8ff | 2700 | tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ARLO); |
bogdanm | 0:9b334a45a8ff | 2701 | tmp2 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_ERR); |
bogdanm | 0:9b334a45a8ff | 2702 | /* I2C Arbitration Loss error interrupt occurred ---------------------------*/ |
bogdanm | 0:9b334a45a8ff | 2703 | if((tmp1 == SET) && (tmp2 == SET)) |
bogdanm | 0:9b334a45a8ff | 2704 | { |
bogdanm | 0:9b334a45a8ff | 2705 | hi2c->ErrorCode |= HAL_I2C_ERROR_ARLO; |
bogdanm | 0:9b334a45a8ff | 2706 | |
bogdanm | 0:9b334a45a8ff | 2707 | /* Clear ARLO flag */ |
bogdanm | 0:9b334a45a8ff | 2708 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ARLO); |
bogdanm | 0:9b334a45a8ff | 2709 | } |
bogdanm | 0:9b334a45a8ff | 2710 | |
bogdanm | 0:9b334a45a8ff | 2711 | tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF); |
bogdanm | 0:9b334a45a8ff | 2712 | tmp2 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_ERR); |
bogdanm | 0:9b334a45a8ff | 2713 | /* I2C Acknowledge failure error interrupt occurred ------------------------*/ |
bogdanm | 0:9b334a45a8ff | 2714 | if((tmp1 == SET) && (tmp2 == SET)) |
bogdanm | 0:9b334a45a8ff | 2715 | { |
mbed_official | 124:6a4a5b7d7324 | 2716 | tmp1 = hi2c->Mode; |
bogdanm | 0:9b334a45a8ff | 2717 | tmp2 = hi2c->XferCount; |
bogdanm | 0:9b334a45a8ff | 2718 | tmp3 = hi2c->State; |
mbed_official | 124:6a4a5b7d7324 | 2719 | if((tmp1 == HAL_I2C_MODE_SLAVE) && (tmp2 == 0) && \ |
mbed_official | 124:6a4a5b7d7324 | 2720 | (tmp3 == HAL_I2C_STATE_BUSY_TX)) |
bogdanm | 0:9b334a45a8ff | 2721 | { |
bogdanm | 0:9b334a45a8ff | 2722 | I2C_Slave_AF(hi2c); |
bogdanm | 0:9b334a45a8ff | 2723 | } |
bogdanm | 0:9b334a45a8ff | 2724 | else |
bogdanm | 0:9b334a45a8ff | 2725 | { |
bogdanm | 0:9b334a45a8ff | 2726 | hi2c->ErrorCode |= HAL_I2C_ERROR_AF; |
mbed_official | 124:6a4a5b7d7324 | 2727 | |
mbed_official | 124:6a4a5b7d7324 | 2728 | /* Generate Stop */ |
mbed_official | 124:6a4a5b7d7324 | 2729 | SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP); |
mbed_official | 124:6a4a5b7d7324 | 2730 | |
bogdanm | 0:9b334a45a8ff | 2731 | /* Clear AF flag */ |
bogdanm | 0:9b334a45a8ff | 2732 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); |
bogdanm | 0:9b334a45a8ff | 2733 | } |
bogdanm | 0:9b334a45a8ff | 2734 | } |
bogdanm | 0:9b334a45a8ff | 2735 | |
bogdanm | 0:9b334a45a8ff | 2736 | tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_OVR); |
bogdanm | 0:9b334a45a8ff | 2737 | tmp2 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_ERR); |
bogdanm | 0:9b334a45a8ff | 2738 | /* I2C Over-Run/Under-Run interrupt occurred -------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 2739 | if((tmp1 == SET) && (tmp2 == SET)) |
bogdanm | 0:9b334a45a8ff | 2740 | { |
bogdanm | 0:9b334a45a8ff | 2741 | hi2c->ErrorCode |= HAL_I2C_ERROR_OVR; |
bogdanm | 0:9b334a45a8ff | 2742 | /* Clear OVR flag */ |
bogdanm | 0:9b334a45a8ff | 2743 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_OVR); |
bogdanm | 0:9b334a45a8ff | 2744 | } |
bogdanm | 0:9b334a45a8ff | 2745 | |
bogdanm | 0:9b334a45a8ff | 2746 | if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE) |
bogdanm | 0:9b334a45a8ff | 2747 | { |
bogdanm | 0:9b334a45a8ff | 2748 | hi2c->State = HAL_I2C_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 2749 | |
bogdanm | 0:9b334a45a8ff | 2750 | /* Disable Pos bit in I2C CR1 when error occured in Master/Mem Receive IT Process */ |
mbed_official | 124:6a4a5b7d7324 | 2751 | CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); |
bogdanm | 0:9b334a45a8ff | 2752 | |
bogdanm | 0:9b334a45a8ff | 2753 | HAL_I2C_ErrorCallback(hi2c); |
bogdanm | 0:9b334a45a8ff | 2754 | } |
bogdanm | 0:9b334a45a8ff | 2755 | } |
bogdanm | 0:9b334a45a8ff | 2756 | |
bogdanm | 0:9b334a45a8ff | 2757 | /** |
mbed_official | 124:6a4a5b7d7324 | 2758 | * @brief Master Tx Transfer completed callback. |
mbed_official | 124:6a4a5b7d7324 | 2759 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 2760 | * the configuration information for the specified I2C. |
bogdanm | 0:9b334a45a8ff | 2761 | * @retval None |
bogdanm | 0:9b334a45a8ff | 2762 | */ |
bogdanm | 0:9b334a45a8ff | 2763 | __weak void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c) |
bogdanm | 0:9b334a45a8ff | 2764 | { |
mbed_official | 124:6a4a5b7d7324 | 2765 | /* Prevent unused argument(s) compilation warning */ |
mbed_official | 124:6a4a5b7d7324 | 2766 | UNUSED(hi2c); |
mbed_official | 124:6a4a5b7d7324 | 2767 | /* NOTE : This function should not be modified, when the callback is needed, |
bogdanm | 0:9b334a45a8ff | 2768 | the HAL_I2C_TxCpltCallback could be implemented in the user file |
bogdanm | 0:9b334a45a8ff | 2769 | */ |
bogdanm | 0:9b334a45a8ff | 2770 | } |
bogdanm | 0:9b334a45a8ff | 2771 | |
bogdanm | 0:9b334a45a8ff | 2772 | /** |
mbed_official | 124:6a4a5b7d7324 | 2773 | * @brief Master Rx Transfer completed callback. |
mbed_official | 124:6a4a5b7d7324 | 2774 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 2775 | * the configuration information for the specified I2C. |
bogdanm | 0:9b334a45a8ff | 2776 | * @retval None |
bogdanm | 0:9b334a45a8ff | 2777 | */ |
bogdanm | 0:9b334a45a8ff | 2778 | __weak void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c) |
bogdanm | 0:9b334a45a8ff | 2779 | { |
mbed_official | 124:6a4a5b7d7324 | 2780 | /* Prevent unused argument(s) compilation warning */ |
mbed_official | 124:6a4a5b7d7324 | 2781 | UNUSED(hi2c); |
mbed_official | 124:6a4a5b7d7324 | 2782 | /* NOTE : This function should not be modified, when the callback is needed, |
bogdanm | 0:9b334a45a8ff | 2783 | the HAL_I2C_TxCpltCallback could be implemented in the user file |
bogdanm | 0:9b334a45a8ff | 2784 | */ |
bogdanm | 0:9b334a45a8ff | 2785 | } |
bogdanm | 0:9b334a45a8ff | 2786 | |
mbed_official | 124:6a4a5b7d7324 | 2787 | /** @brief Slave Tx Transfer completed callback. |
mbed_official | 124:6a4a5b7d7324 | 2788 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 2789 | * the configuration information for the specified I2C. |
bogdanm | 0:9b334a45a8ff | 2790 | * @retval None |
bogdanm | 0:9b334a45a8ff | 2791 | */ |
bogdanm | 0:9b334a45a8ff | 2792 | __weak void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c) |
bogdanm | 0:9b334a45a8ff | 2793 | { |
mbed_official | 124:6a4a5b7d7324 | 2794 | /* Prevent unused argument(s) compilation warning */ |
mbed_official | 124:6a4a5b7d7324 | 2795 | UNUSED(hi2c); |
mbed_official | 124:6a4a5b7d7324 | 2796 | /* NOTE : This function should not be modified, when the callback is needed, |
bogdanm | 0:9b334a45a8ff | 2797 | the HAL_I2C_TxCpltCallback could be implemented in the user file |
bogdanm | 0:9b334a45a8ff | 2798 | */ |
bogdanm | 0:9b334a45a8ff | 2799 | } |
bogdanm | 0:9b334a45a8ff | 2800 | |
bogdanm | 0:9b334a45a8ff | 2801 | /** |
mbed_official | 124:6a4a5b7d7324 | 2802 | * @brief Slave Rx Transfer completed callback. |
mbed_official | 124:6a4a5b7d7324 | 2803 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 2804 | * the configuration information for the specified I2C. |
bogdanm | 0:9b334a45a8ff | 2805 | * @retval None |
bogdanm | 0:9b334a45a8ff | 2806 | */ |
bogdanm | 0:9b334a45a8ff | 2807 | __weak void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c) |
bogdanm | 0:9b334a45a8ff | 2808 | { |
mbed_official | 124:6a4a5b7d7324 | 2809 | /* Prevent unused argument(s) compilation warning */ |
mbed_official | 124:6a4a5b7d7324 | 2810 | UNUSED(hi2c); |
mbed_official | 124:6a4a5b7d7324 | 2811 | /* NOTE : This function should not be modified, when the callback is needed, |
bogdanm | 0:9b334a45a8ff | 2812 | the HAL_I2C_TxCpltCallback could be implemented in the user file |
bogdanm | 0:9b334a45a8ff | 2813 | */ |
bogdanm | 0:9b334a45a8ff | 2814 | } |
bogdanm | 0:9b334a45a8ff | 2815 | |
bogdanm | 0:9b334a45a8ff | 2816 | /** |
mbed_official | 124:6a4a5b7d7324 | 2817 | * @brief Memory Tx Transfer completed callback. |
mbed_official | 124:6a4a5b7d7324 | 2818 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 2819 | * the configuration information for the specified I2C. |
bogdanm | 0:9b334a45a8ff | 2820 | * @retval None |
bogdanm | 0:9b334a45a8ff | 2821 | */ |
bogdanm | 0:9b334a45a8ff | 2822 | __weak void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c) |
bogdanm | 0:9b334a45a8ff | 2823 | { |
mbed_official | 124:6a4a5b7d7324 | 2824 | /* Prevent unused argument(s) compilation warning */ |
mbed_official | 124:6a4a5b7d7324 | 2825 | UNUSED(hi2c); |
mbed_official | 124:6a4a5b7d7324 | 2826 | /* NOTE : This function should not be modified, when the callback is needed, |
bogdanm | 0:9b334a45a8ff | 2827 | the HAL_I2C_TxCpltCallback could be implemented in the user file |
bogdanm | 0:9b334a45a8ff | 2828 | */ |
bogdanm | 0:9b334a45a8ff | 2829 | } |
bogdanm | 0:9b334a45a8ff | 2830 | |
bogdanm | 0:9b334a45a8ff | 2831 | /** |
mbed_official | 124:6a4a5b7d7324 | 2832 | * @brief Memory Rx Transfer completed callback. |
mbed_official | 124:6a4a5b7d7324 | 2833 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 2834 | * the configuration information for the specified I2C. |
bogdanm | 0:9b334a45a8ff | 2835 | * @retval None |
bogdanm | 0:9b334a45a8ff | 2836 | */ |
bogdanm | 0:9b334a45a8ff | 2837 | __weak void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c) |
bogdanm | 0:9b334a45a8ff | 2838 | { |
mbed_official | 124:6a4a5b7d7324 | 2839 | /* Prevent unused argument(s) compilation warning */ |
mbed_official | 124:6a4a5b7d7324 | 2840 | UNUSED(hi2c); |
mbed_official | 124:6a4a5b7d7324 | 2841 | /* NOTE : This function should not be modified, when the callback is needed, |
bogdanm | 0:9b334a45a8ff | 2842 | the HAL_I2C_TxCpltCallback could be implemented in the user file |
bogdanm | 0:9b334a45a8ff | 2843 | */ |
bogdanm | 0:9b334a45a8ff | 2844 | } |
bogdanm | 0:9b334a45a8ff | 2845 | |
bogdanm | 0:9b334a45a8ff | 2846 | /** |
mbed_official | 124:6a4a5b7d7324 | 2847 | * @brief I2C error callback. |
mbed_official | 124:6a4a5b7d7324 | 2848 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 2849 | * the configuration information for the specified I2C. |
bogdanm | 0:9b334a45a8ff | 2850 | * @retval None |
bogdanm | 0:9b334a45a8ff | 2851 | */ |
bogdanm | 0:9b334a45a8ff | 2852 | __weak void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c) |
bogdanm | 0:9b334a45a8ff | 2853 | { |
mbed_official | 124:6a4a5b7d7324 | 2854 | /* Prevent unused argument(s) compilation warning */ |
mbed_official | 124:6a4a5b7d7324 | 2855 | UNUSED(hi2c); |
mbed_official | 124:6a4a5b7d7324 | 2856 | /* NOTE : This function should not be modified, when the callback is needed, |
bogdanm | 0:9b334a45a8ff | 2857 | the HAL_I2C_ErrorCallback could be implemented in the user file |
bogdanm | 0:9b334a45a8ff | 2858 | */ |
bogdanm | 0:9b334a45a8ff | 2859 | } |
bogdanm | 0:9b334a45a8ff | 2860 | |
bogdanm | 0:9b334a45a8ff | 2861 | /** |
bogdanm | 0:9b334a45a8ff | 2862 | * @} |
bogdanm | 0:9b334a45a8ff | 2863 | */ |
bogdanm | 0:9b334a45a8ff | 2864 | |
bogdanm | 0:9b334a45a8ff | 2865 | |
bogdanm | 0:9b334a45a8ff | 2866 | /** @defgroup I2C_Exported_Functions_Group3 Peripheral State and Errors functions |
bogdanm | 0:9b334a45a8ff | 2867 | * @brief Peripheral State and Errors functions |
bogdanm | 0:9b334a45a8ff | 2868 | * |
bogdanm | 0:9b334a45a8ff | 2869 | @verbatim |
bogdanm | 0:9b334a45a8ff | 2870 | =============================================================================== |
bogdanm | 0:9b334a45a8ff | 2871 | ##### Peripheral State and Errors functions ##### |
bogdanm | 0:9b334a45a8ff | 2872 | =============================================================================== |
bogdanm | 0:9b334a45a8ff | 2873 | [..] |
bogdanm | 0:9b334a45a8ff | 2874 | This subsection permits to get in run-time the status of the peripheral |
bogdanm | 0:9b334a45a8ff | 2875 | and the data flow. |
bogdanm | 0:9b334a45a8ff | 2876 | |
bogdanm | 0:9b334a45a8ff | 2877 | @endverbatim |
bogdanm | 0:9b334a45a8ff | 2878 | * @{ |
bogdanm | 0:9b334a45a8ff | 2879 | */ |
bogdanm | 0:9b334a45a8ff | 2880 | |
bogdanm | 0:9b334a45a8ff | 2881 | /** |
mbed_official | 124:6a4a5b7d7324 | 2882 | * @brief Return the I2C handle state. |
mbed_official | 124:6a4a5b7d7324 | 2883 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 2884 | * the configuration information for the specified I2C. |
bogdanm | 0:9b334a45a8ff | 2885 | * @retval HAL state |
bogdanm | 0:9b334a45a8ff | 2886 | */ |
bogdanm | 0:9b334a45a8ff | 2887 | HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c) |
bogdanm | 0:9b334a45a8ff | 2888 | { |
mbed_official | 124:6a4a5b7d7324 | 2889 | /* Return I2C handle state */ |
bogdanm | 0:9b334a45a8ff | 2890 | return hi2c->State; |
bogdanm | 0:9b334a45a8ff | 2891 | } |
bogdanm | 0:9b334a45a8ff | 2892 | |
bogdanm | 0:9b334a45a8ff | 2893 | /** |
mbed_official | 124:6a4a5b7d7324 | 2894 | * @brief Return the I2C error code. |
mbed_official | 124:6a4a5b7d7324 | 2895 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 2896 | * the configuration information for the specified I2C. |
bogdanm | 0:9b334a45a8ff | 2897 | * @retval I2C Error Code |
bogdanm | 0:9b334a45a8ff | 2898 | */ |
bogdanm | 0:9b334a45a8ff | 2899 | uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c) |
bogdanm | 0:9b334a45a8ff | 2900 | { |
bogdanm | 0:9b334a45a8ff | 2901 | return hi2c->ErrorCode; |
bogdanm | 0:9b334a45a8ff | 2902 | } |
bogdanm | 0:9b334a45a8ff | 2903 | |
bogdanm | 0:9b334a45a8ff | 2904 | /** |
bogdanm | 0:9b334a45a8ff | 2905 | * @} |
bogdanm | 0:9b334a45a8ff | 2906 | */ |
bogdanm | 0:9b334a45a8ff | 2907 | |
bogdanm | 0:9b334a45a8ff | 2908 | /** |
bogdanm | 0:9b334a45a8ff | 2909 | * @} |
bogdanm | 0:9b334a45a8ff | 2910 | */ |
bogdanm | 0:9b334a45a8ff | 2911 | |
bogdanm | 0:9b334a45a8ff | 2912 | /** @addtogroup I2C_Private_Functions |
bogdanm | 0:9b334a45a8ff | 2913 | * @{ |
bogdanm | 0:9b334a45a8ff | 2914 | */ |
bogdanm | 0:9b334a45a8ff | 2915 | |
bogdanm | 0:9b334a45a8ff | 2916 | /** |
bogdanm | 0:9b334a45a8ff | 2917 | * @brief Handle TXE flag for Master Transmit Mode |
mbed_official | 124:6a4a5b7d7324 | 2918 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 2919 | * the configuration information for the specified I2C. |
bogdanm | 0:9b334a45a8ff | 2920 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 2921 | */ |
bogdanm | 0:9b334a45a8ff | 2922 | static HAL_StatusTypeDef I2C_MasterTransmit_TXE(I2C_HandleTypeDef *hi2c) |
bogdanm | 0:9b334a45a8ff | 2923 | { |
bogdanm | 0:9b334a45a8ff | 2924 | if(hi2c->XferCount == 0) |
bogdanm | 0:9b334a45a8ff | 2925 | { |
bogdanm | 0:9b334a45a8ff | 2926 | /* Disable BUF interrupt */ |
bogdanm | 0:9b334a45a8ff | 2927 | __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF); |
bogdanm | 0:9b334a45a8ff | 2928 | } |
mbed_official | 124:6a4a5b7d7324 | 2929 | else |
mbed_official | 124:6a4a5b7d7324 | 2930 | { |
mbed_official | 124:6a4a5b7d7324 | 2931 | /* Write data to DR */ |
mbed_official | 124:6a4a5b7d7324 | 2932 | hi2c->Instance->DR = (*hi2c->pBuffPtr++); |
mbed_official | 124:6a4a5b7d7324 | 2933 | hi2c->XferCount--; |
mbed_official | 124:6a4a5b7d7324 | 2934 | } |
mbed_official | 124:6a4a5b7d7324 | 2935 | |
bogdanm | 0:9b334a45a8ff | 2936 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 2937 | } |
bogdanm | 0:9b334a45a8ff | 2938 | |
bogdanm | 0:9b334a45a8ff | 2939 | /** |
bogdanm | 0:9b334a45a8ff | 2940 | * @brief Handle BTF flag for Master Transmit Mode |
mbed_official | 124:6a4a5b7d7324 | 2941 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 2942 | * the configuration information for the specified I2C. |
bogdanm | 0:9b334a45a8ff | 2943 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 2944 | */ |
bogdanm | 0:9b334a45a8ff | 2945 | static HAL_StatusTypeDef I2C_MasterTransmit_BTF(I2C_HandleTypeDef *hi2c) |
bogdanm | 0:9b334a45a8ff | 2946 | { |
bogdanm | 0:9b334a45a8ff | 2947 | if(hi2c->XferCount != 0) |
bogdanm | 0:9b334a45a8ff | 2948 | { |
bogdanm | 0:9b334a45a8ff | 2949 | /* Write data to DR */ |
bogdanm | 0:9b334a45a8ff | 2950 | hi2c->Instance->DR = (*hi2c->pBuffPtr++); |
bogdanm | 0:9b334a45a8ff | 2951 | hi2c->XferCount--; |
bogdanm | 0:9b334a45a8ff | 2952 | } |
bogdanm | 0:9b334a45a8ff | 2953 | else |
bogdanm | 0:9b334a45a8ff | 2954 | { |
bogdanm | 0:9b334a45a8ff | 2955 | /* Disable EVT, BUF and ERR interrupt */ |
bogdanm | 0:9b334a45a8ff | 2956 | __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR); |
bogdanm | 0:9b334a45a8ff | 2957 | |
bogdanm | 0:9b334a45a8ff | 2958 | /* Generate Stop */ |
bogdanm | 0:9b334a45a8ff | 2959 | SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); |
bogdanm | 0:9b334a45a8ff | 2960 | |
mbed_official | 124:6a4a5b7d7324 | 2961 | if(hi2c->Mode == HAL_I2C_MODE_MEM) |
bogdanm | 0:9b334a45a8ff | 2962 | { |
bogdanm | 0:9b334a45a8ff | 2963 | hi2c->State = HAL_I2C_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 2964 | |
bogdanm | 0:9b334a45a8ff | 2965 | HAL_I2C_MemTxCpltCallback(hi2c); |
bogdanm | 0:9b334a45a8ff | 2966 | } |
bogdanm | 0:9b334a45a8ff | 2967 | else |
bogdanm | 0:9b334a45a8ff | 2968 | { |
bogdanm | 0:9b334a45a8ff | 2969 | hi2c->State = HAL_I2C_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 2970 | |
bogdanm | 0:9b334a45a8ff | 2971 | HAL_I2C_MasterTxCpltCallback(hi2c); |
bogdanm | 0:9b334a45a8ff | 2972 | } |
bogdanm | 0:9b334a45a8ff | 2973 | } |
bogdanm | 0:9b334a45a8ff | 2974 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 2975 | } |
bogdanm | 0:9b334a45a8ff | 2976 | |
bogdanm | 0:9b334a45a8ff | 2977 | /** |
bogdanm | 0:9b334a45a8ff | 2978 | * @brief Handle RXNE flag for Master Receive Mode |
mbed_official | 124:6a4a5b7d7324 | 2979 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 2980 | * the configuration information for the specified I2C. |
bogdanm | 0:9b334a45a8ff | 2981 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 2982 | */ |
bogdanm | 0:9b334a45a8ff | 2983 | static HAL_StatusTypeDef I2C_MasterReceive_RXNE(I2C_HandleTypeDef *hi2c) |
bogdanm | 0:9b334a45a8ff | 2984 | { |
bogdanm | 0:9b334a45a8ff | 2985 | uint32_t tmp = 0; |
bogdanm | 0:9b334a45a8ff | 2986 | |
bogdanm | 0:9b334a45a8ff | 2987 | tmp = hi2c->XferCount; |
bogdanm | 0:9b334a45a8ff | 2988 | if(tmp > 3) |
bogdanm | 0:9b334a45a8ff | 2989 | { |
bogdanm | 0:9b334a45a8ff | 2990 | /* Read data from DR */ |
bogdanm | 0:9b334a45a8ff | 2991 | (*hi2c->pBuffPtr++) = hi2c->Instance->DR; |
bogdanm | 0:9b334a45a8ff | 2992 | hi2c->XferCount--; |
bogdanm | 0:9b334a45a8ff | 2993 | } |
bogdanm | 0:9b334a45a8ff | 2994 | else if((tmp == 2) || (tmp == 3)) |
bogdanm | 0:9b334a45a8ff | 2995 | { |
bogdanm | 0:9b334a45a8ff | 2996 | /* Disable BUF interrupt */ |
bogdanm | 0:9b334a45a8ff | 2997 | __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF); |
bogdanm | 0:9b334a45a8ff | 2998 | } |
bogdanm | 0:9b334a45a8ff | 2999 | else |
bogdanm | 0:9b334a45a8ff | 3000 | { |
bogdanm | 0:9b334a45a8ff | 3001 | /* Disable EVT, BUF and ERR interrupt */ |
bogdanm | 0:9b334a45a8ff | 3002 | __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR); |
bogdanm | 0:9b334a45a8ff | 3003 | |
bogdanm | 0:9b334a45a8ff | 3004 | /* Read data from DR */ |
bogdanm | 0:9b334a45a8ff | 3005 | (*hi2c->pBuffPtr++) = hi2c->Instance->DR; |
bogdanm | 0:9b334a45a8ff | 3006 | hi2c->XferCount--; |
bogdanm | 0:9b334a45a8ff | 3007 | |
mbed_official | 124:6a4a5b7d7324 | 3008 | if(hi2c->Mode == HAL_I2C_MODE_MEM) |
bogdanm | 0:9b334a45a8ff | 3009 | { |
bogdanm | 0:9b334a45a8ff | 3010 | hi2c->State = HAL_I2C_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 3011 | |
bogdanm | 0:9b334a45a8ff | 3012 | HAL_I2C_MemRxCpltCallback(hi2c); |
bogdanm | 0:9b334a45a8ff | 3013 | } |
bogdanm | 0:9b334a45a8ff | 3014 | else |
bogdanm | 0:9b334a45a8ff | 3015 | { |
bogdanm | 0:9b334a45a8ff | 3016 | hi2c->State = HAL_I2C_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 3017 | |
bogdanm | 0:9b334a45a8ff | 3018 | HAL_I2C_MasterRxCpltCallback(hi2c); |
bogdanm | 0:9b334a45a8ff | 3019 | } |
bogdanm | 0:9b334a45a8ff | 3020 | } |
bogdanm | 0:9b334a45a8ff | 3021 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 3022 | } |
bogdanm | 0:9b334a45a8ff | 3023 | |
bogdanm | 0:9b334a45a8ff | 3024 | /** |
bogdanm | 0:9b334a45a8ff | 3025 | * @brief Handle BTF flag for Master Receive Mode |
mbed_official | 124:6a4a5b7d7324 | 3026 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 3027 | * the configuration information for the specified I2C. |
bogdanm | 0:9b334a45a8ff | 3028 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 3029 | */ |
bogdanm | 0:9b334a45a8ff | 3030 | static HAL_StatusTypeDef I2C_MasterReceive_BTF(I2C_HandleTypeDef *hi2c) |
bogdanm | 0:9b334a45a8ff | 3031 | { |
bogdanm | 0:9b334a45a8ff | 3032 | if(hi2c->XferCount == 3) |
bogdanm | 0:9b334a45a8ff | 3033 | { |
bogdanm | 0:9b334a45a8ff | 3034 | /* Disable Acknowledge */ |
bogdanm | 0:9b334a45a8ff | 3035 | CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); |
bogdanm | 0:9b334a45a8ff | 3036 | |
bogdanm | 0:9b334a45a8ff | 3037 | /* Read data from DR */ |
bogdanm | 0:9b334a45a8ff | 3038 | (*hi2c->pBuffPtr++) = hi2c->Instance->DR; |
bogdanm | 0:9b334a45a8ff | 3039 | hi2c->XferCount--; |
bogdanm | 0:9b334a45a8ff | 3040 | } |
bogdanm | 0:9b334a45a8ff | 3041 | else if(hi2c->XferCount == 2) |
bogdanm | 0:9b334a45a8ff | 3042 | { |
bogdanm | 0:9b334a45a8ff | 3043 | /* Disable EVT and ERR interrupt */ |
bogdanm | 0:9b334a45a8ff | 3044 | /* Workaround - Wong data read into data register */ |
bogdanm | 0:9b334a45a8ff | 3045 | __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR); |
bogdanm | 0:9b334a45a8ff | 3046 | |
mbed_official | 124:6a4a5b7d7324 | 3047 | /* Generate Stop */ |
mbed_official | 124:6a4a5b7d7324 | 3048 | SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); |
mbed_official | 124:6a4a5b7d7324 | 3049 | |
bogdanm | 0:9b334a45a8ff | 3050 | /* Read data from DR */ |
bogdanm | 0:9b334a45a8ff | 3051 | (*hi2c->pBuffPtr++) = hi2c->Instance->DR; |
bogdanm | 0:9b334a45a8ff | 3052 | hi2c->XferCount--; |
bogdanm | 0:9b334a45a8ff | 3053 | |
bogdanm | 0:9b334a45a8ff | 3054 | /* Read data from DR */ |
bogdanm | 0:9b334a45a8ff | 3055 | (*hi2c->pBuffPtr++) = hi2c->Instance->DR; |
bogdanm | 0:9b334a45a8ff | 3056 | hi2c->XferCount--; |
bogdanm | 0:9b334a45a8ff | 3057 | |
mbed_official | 124:6a4a5b7d7324 | 3058 | if(hi2c->Mode == HAL_I2C_MODE_MEM) |
bogdanm | 0:9b334a45a8ff | 3059 | { |
bogdanm | 0:9b334a45a8ff | 3060 | hi2c->State = HAL_I2C_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 3061 | |
bogdanm | 0:9b334a45a8ff | 3062 | HAL_I2C_MemRxCpltCallback(hi2c); |
bogdanm | 0:9b334a45a8ff | 3063 | } |
bogdanm | 0:9b334a45a8ff | 3064 | else |
bogdanm | 0:9b334a45a8ff | 3065 | { |
bogdanm | 0:9b334a45a8ff | 3066 | hi2c->State = HAL_I2C_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 3067 | |
bogdanm | 0:9b334a45a8ff | 3068 | HAL_I2C_MasterRxCpltCallback(hi2c); |
bogdanm | 0:9b334a45a8ff | 3069 | } |
bogdanm | 0:9b334a45a8ff | 3070 | } |
bogdanm | 0:9b334a45a8ff | 3071 | else |
bogdanm | 0:9b334a45a8ff | 3072 | { |
bogdanm | 0:9b334a45a8ff | 3073 | /* Read data from DR */ |
bogdanm | 0:9b334a45a8ff | 3074 | (*hi2c->pBuffPtr++) = hi2c->Instance->DR; |
bogdanm | 0:9b334a45a8ff | 3075 | hi2c->XferCount--; |
bogdanm | 0:9b334a45a8ff | 3076 | } |
bogdanm | 0:9b334a45a8ff | 3077 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 3078 | } |
bogdanm | 0:9b334a45a8ff | 3079 | |
bogdanm | 0:9b334a45a8ff | 3080 | /** |
bogdanm | 0:9b334a45a8ff | 3081 | * @brief Handle TXE flag for Slave Transmit Mode |
mbed_official | 124:6a4a5b7d7324 | 3082 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 3083 | * the configuration information for the specified I2C. |
bogdanm | 0:9b334a45a8ff | 3084 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 3085 | */ |
bogdanm | 0:9b334a45a8ff | 3086 | static HAL_StatusTypeDef I2C_SlaveTransmit_TXE(I2C_HandleTypeDef *hi2c) |
bogdanm | 0:9b334a45a8ff | 3087 | { |
bogdanm | 0:9b334a45a8ff | 3088 | if(hi2c->XferCount != 0) |
bogdanm | 0:9b334a45a8ff | 3089 | { |
bogdanm | 0:9b334a45a8ff | 3090 | /* Write data to DR */ |
bogdanm | 0:9b334a45a8ff | 3091 | hi2c->Instance->DR = (*hi2c->pBuffPtr++); |
bogdanm | 0:9b334a45a8ff | 3092 | hi2c->XferCount--; |
bogdanm | 0:9b334a45a8ff | 3093 | } |
bogdanm | 0:9b334a45a8ff | 3094 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 3095 | } |
bogdanm | 0:9b334a45a8ff | 3096 | |
bogdanm | 0:9b334a45a8ff | 3097 | /** |
bogdanm | 0:9b334a45a8ff | 3098 | * @brief Handle BTF flag for Slave Transmit Mode |
mbed_official | 124:6a4a5b7d7324 | 3099 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 3100 | * the configuration information for the specified I2C. |
bogdanm | 0:9b334a45a8ff | 3101 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 3102 | */ |
bogdanm | 0:9b334a45a8ff | 3103 | static HAL_StatusTypeDef I2C_SlaveTransmit_BTF(I2C_HandleTypeDef *hi2c) |
bogdanm | 0:9b334a45a8ff | 3104 | { |
bogdanm | 0:9b334a45a8ff | 3105 | if(hi2c->XferCount != 0) |
bogdanm | 0:9b334a45a8ff | 3106 | { |
bogdanm | 0:9b334a45a8ff | 3107 | /* Write data to DR */ |
bogdanm | 0:9b334a45a8ff | 3108 | hi2c->Instance->DR = (*hi2c->pBuffPtr++); |
bogdanm | 0:9b334a45a8ff | 3109 | hi2c->XferCount--; |
bogdanm | 0:9b334a45a8ff | 3110 | } |
bogdanm | 0:9b334a45a8ff | 3111 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 3112 | } |
bogdanm | 0:9b334a45a8ff | 3113 | |
bogdanm | 0:9b334a45a8ff | 3114 | /** |
bogdanm | 0:9b334a45a8ff | 3115 | * @brief Handle RXNE flag for Slave Receive Mode |
mbed_official | 124:6a4a5b7d7324 | 3116 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 3117 | * the configuration information for the specified I2C. |
bogdanm | 0:9b334a45a8ff | 3118 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 3119 | */ |
bogdanm | 0:9b334a45a8ff | 3120 | static HAL_StatusTypeDef I2C_SlaveReceive_RXNE(I2C_HandleTypeDef *hi2c) |
bogdanm | 0:9b334a45a8ff | 3121 | { |
bogdanm | 0:9b334a45a8ff | 3122 | if(hi2c->XferCount != 0) |
bogdanm | 0:9b334a45a8ff | 3123 | { |
bogdanm | 0:9b334a45a8ff | 3124 | /* Read data from DR */ |
bogdanm | 0:9b334a45a8ff | 3125 | (*hi2c->pBuffPtr++) = hi2c->Instance->DR; |
bogdanm | 0:9b334a45a8ff | 3126 | hi2c->XferCount--; |
bogdanm | 0:9b334a45a8ff | 3127 | } |
bogdanm | 0:9b334a45a8ff | 3128 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 3129 | } |
bogdanm | 0:9b334a45a8ff | 3130 | |
bogdanm | 0:9b334a45a8ff | 3131 | /** |
bogdanm | 0:9b334a45a8ff | 3132 | * @brief Handle BTF flag for Slave Receive Mode |
mbed_official | 124:6a4a5b7d7324 | 3133 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 3134 | * the configuration information for the specified I2C. |
bogdanm | 0:9b334a45a8ff | 3135 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 3136 | */ |
bogdanm | 0:9b334a45a8ff | 3137 | static HAL_StatusTypeDef I2C_SlaveReceive_BTF(I2C_HandleTypeDef *hi2c) |
bogdanm | 0:9b334a45a8ff | 3138 | { |
bogdanm | 0:9b334a45a8ff | 3139 | if(hi2c->XferCount != 0) |
bogdanm | 0:9b334a45a8ff | 3140 | { |
bogdanm | 0:9b334a45a8ff | 3141 | /* Read data from DR */ |
bogdanm | 0:9b334a45a8ff | 3142 | (*hi2c->pBuffPtr++) = hi2c->Instance->DR; |
bogdanm | 0:9b334a45a8ff | 3143 | hi2c->XferCount--; |
bogdanm | 0:9b334a45a8ff | 3144 | } |
bogdanm | 0:9b334a45a8ff | 3145 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 3146 | } |
bogdanm | 0:9b334a45a8ff | 3147 | |
bogdanm | 0:9b334a45a8ff | 3148 | /** |
bogdanm | 0:9b334a45a8ff | 3149 | * @brief Handle ADD flag for Slave |
mbed_official | 124:6a4a5b7d7324 | 3150 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 3151 | * the configuration information for the specified I2C. |
bogdanm | 0:9b334a45a8ff | 3152 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 3153 | */ |
bogdanm | 0:9b334a45a8ff | 3154 | static HAL_StatusTypeDef I2C_Slave_ADDR(I2C_HandleTypeDef *hi2c) |
bogdanm | 0:9b334a45a8ff | 3155 | { |
bogdanm | 0:9b334a45a8ff | 3156 | /* Clear ADDR flag */ |
bogdanm | 0:9b334a45a8ff | 3157 | __HAL_I2C_CLEAR_ADDRFLAG(hi2c); |
bogdanm | 0:9b334a45a8ff | 3158 | |
bogdanm | 0:9b334a45a8ff | 3159 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 3160 | } |
bogdanm | 0:9b334a45a8ff | 3161 | |
bogdanm | 0:9b334a45a8ff | 3162 | /** |
bogdanm | 0:9b334a45a8ff | 3163 | * @brief Handle STOPF flag for Slave Mode |
mbed_official | 124:6a4a5b7d7324 | 3164 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 3165 | * the configuration information for the specified I2C. |
bogdanm | 0:9b334a45a8ff | 3166 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 3167 | */ |
bogdanm | 0:9b334a45a8ff | 3168 | static HAL_StatusTypeDef I2C_Slave_STOPF(I2C_HandleTypeDef *hi2c) |
bogdanm | 0:9b334a45a8ff | 3169 | { |
bogdanm | 0:9b334a45a8ff | 3170 | /* Disable EVT, BUF and ERR interrupt */ |
bogdanm | 0:9b334a45a8ff | 3171 | __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR); |
bogdanm | 0:9b334a45a8ff | 3172 | |
bogdanm | 0:9b334a45a8ff | 3173 | /* Clear STOPF flag */ |
bogdanm | 0:9b334a45a8ff | 3174 | __HAL_I2C_CLEAR_STOPFLAG(hi2c); |
bogdanm | 0:9b334a45a8ff | 3175 | |
bogdanm | 0:9b334a45a8ff | 3176 | /* Disable Acknowledge */ |
bogdanm | 0:9b334a45a8ff | 3177 | CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); |
bogdanm | 0:9b334a45a8ff | 3178 | |
bogdanm | 0:9b334a45a8ff | 3179 | hi2c->State = HAL_I2C_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 3180 | |
bogdanm | 0:9b334a45a8ff | 3181 | HAL_I2C_SlaveRxCpltCallback(hi2c); |
bogdanm | 0:9b334a45a8ff | 3182 | |
bogdanm | 0:9b334a45a8ff | 3183 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 3184 | } |
bogdanm | 0:9b334a45a8ff | 3185 | |
bogdanm | 0:9b334a45a8ff | 3186 | /** |
bogdanm | 0:9b334a45a8ff | 3187 | * @brief Handle Acknowledge Failed for Slave Mode |
mbed_official | 124:6a4a5b7d7324 | 3188 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 3189 | * the configuration information for the specified I2C. |
bogdanm | 0:9b334a45a8ff | 3190 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 3191 | */ |
bogdanm | 0:9b334a45a8ff | 3192 | static HAL_StatusTypeDef I2C_Slave_AF(I2C_HandleTypeDef *hi2c) |
bogdanm | 0:9b334a45a8ff | 3193 | { |
bogdanm | 0:9b334a45a8ff | 3194 | /* Disable EVT, BUF and ERR interrupt */ |
bogdanm | 0:9b334a45a8ff | 3195 | __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR); |
bogdanm | 0:9b334a45a8ff | 3196 | |
bogdanm | 0:9b334a45a8ff | 3197 | /* Clear AF flag */ |
bogdanm | 0:9b334a45a8ff | 3198 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); |
bogdanm | 0:9b334a45a8ff | 3199 | |
bogdanm | 0:9b334a45a8ff | 3200 | /* Disable Acknowledge */ |
bogdanm | 0:9b334a45a8ff | 3201 | CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); |
bogdanm | 0:9b334a45a8ff | 3202 | |
bogdanm | 0:9b334a45a8ff | 3203 | hi2c->State = HAL_I2C_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 3204 | |
bogdanm | 0:9b334a45a8ff | 3205 | HAL_I2C_SlaveTxCpltCallback(hi2c); |
bogdanm | 0:9b334a45a8ff | 3206 | |
bogdanm | 0:9b334a45a8ff | 3207 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 3208 | } |
bogdanm | 0:9b334a45a8ff | 3209 | |
bogdanm | 0:9b334a45a8ff | 3210 | /** |
bogdanm | 0:9b334a45a8ff | 3211 | * @brief Master sends target device address followed by internal memory address for write request. |
mbed_official | 124:6a4a5b7d7324 | 3212 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 3213 | * the configuration information for the specified I2C. |
mbed_official | 124:6a4a5b7d7324 | 3214 | * @param DevAddress Target device address |
mbed_official | 124:6a4a5b7d7324 | 3215 | * @param Timeout Timeout duration |
bogdanm | 0:9b334a45a8ff | 3216 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 3217 | */ |
bogdanm | 0:9b334a45a8ff | 3218 | static HAL_StatusTypeDef I2C_MasterRequestWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout) |
bogdanm | 0:9b334a45a8ff | 3219 | { |
bogdanm | 0:9b334a45a8ff | 3220 | /* Generate Start */ |
bogdanm | 0:9b334a45a8ff | 3221 | SET_BIT(hi2c->Instance->CR1, I2C_CR1_START); |
bogdanm | 0:9b334a45a8ff | 3222 | |
bogdanm | 0:9b334a45a8ff | 3223 | /* Wait until SB flag is set */ |
bogdanm | 0:9b334a45a8ff | 3224 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 3225 | { |
bogdanm | 0:9b334a45a8ff | 3226 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 3227 | } |
bogdanm | 0:9b334a45a8ff | 3228 | |
bogdanm | 0:9b334a45a8ff | 3229 | if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT) |
bogdanm | 0:9b334a45a8ff | 3230 | { |
bogdanm | 0:9b334a45a8ff | 3231 | /* Send slave address */ |
bogdanm | 0:9b334a45a8ff | 3232 | hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress); |
bogdanm | 0:9b334a45a8ff | 3233 | } |
bogdanm | 0:9b334a45a8ff | 3234 | else |
bogdanm | 0:9b334a45a8ff | 3235 | { |
bogdanm | 0:9b334a45a8ff | 3236 | /* Send header of slave address */ |
bogdanm | 0:9b334a45a8ff | 3237 | hi2c->Instance->DR = I2C_10BIT_HEADER_WRITE(DevAddress); |
bogdanm | 0:9b334a45a8ff | 3238 | |
bogdanm | 0:9b334a45a8ff | 3239 | /* Wait until ADD10 flag is set */ |
bogdanm | 0:9b334a45a8ff | 3240 | if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADD10, Timeout) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 3241 | { |
bogdanm | 0:9b334a45a8ff | 3242 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
bogdanm | 0:9b334a45a8ff | 3243 | { |
bogdanm | 0:9b334a45a8ff | 3244 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 3245 | } |
bogdanm | 0:9b334a45a8ff | 3246 | else |
bogdanm | 0:9b334a45a8ff | 3247 | { |
bogdanm | 0:9b334a45a8ff | 3248 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 3249 | } |
bogdanm | 0:9b334a45a8ff | 3250 | } |
bogdanm | 0:9b334a45a8ff | 3251 | |
bogdanm | 0:9b334a45a8ff | 3252 | /* Send slave address */ |
bogdanm | 0:9b334a45a8ff | 3253 | hi2c->Instance->DR = I2C_10BIT_ADDRESS(DevAddress); |
bogdanm | 0:9b334a45a8ff | 3254 | } |
bogdanm | 0:9b334a45a8ff | 3255 | |
bogdanm | 0:9b334a45a8ff | 3256 | /* Wait until ADDR flag is set */ |
bogdanm | 0:9b334a45a8ff | 3257 | if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 3258 | { |
bogdanm | 0:9b334a45a8ff | 3259 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
bogdanm | 0:9b334a45a8ff | 3260 | { |
bogdanm | 0:9b334a45a8ff | 3261 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 3262 | } |
bogdanm | 0:9b334a45a8ff | 3263 | else |
bogdanm | 0:9b334a45a8ff | 3264 | { |
bogdanm | 0:9b334a45a8ff | 3265 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 3266 | } |
bogdanm | 0:9b334a45a8ff | 3267 | } |
bogdanm | 0:9b334a45a8ff | 3268 | |
bogdanm | 0:9b334a45a8ff | 3269 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 3270 | } |
bogdanm | 0:9b334a45a8ff | 3271 | |
bogdanm | 0:9b334a45a8ff | 3272 | /** |
bogdanm | 0:9b334a45a8ff | 3273 | * @brief Master sends target device address followed by internal memory address for read request. |
mbed_official | 124:6a4a5b7d7324 | 3274 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 3275 | * the configuration information for the specified I2C. |
mbed_official | 124:6a4a5b7d7324 | 3276 | * @param DevAddress Target device address |
mbed_official | 124:6a4a5b7d7324 | 3277 | * @param Timeout Timeout duration |
bogdanm | 0:9b334a45a8ff | 3278 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 3279 | */ |
bogdanm | 0:9b334a45a8ff | 3280 | static HAL_StatusTypeDef I2C_MasterRequestRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout) |
bogdanm | 0:9b334a45a8ff | 3281 | { |
bogdanm | 0:9b334a45a8ff | 3282 | /* Enable Acknowledge */ |
bogdanm | 0:9b334a45a8ff | 3283 | SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); |
bogdanm | 0:9b334a45a8ff | 3284 | |
bogdanm | 0:9b334a45a8ff | 3285 | /* Generate Start */ |
bogdanm | 0:9b334a45a8ff | 3286 | SET_BIT(hi2c->Instance->CR1, I2C_CR1_START); |
bogdanm | 0:9b334a45a8ff | 3287 | |
bogdanm | 0:9b334a45a8ff | 3288 | /* Wait until SB flag is set */ |
bogdanm | 0:9b334a45a8ff | 3289 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 3290 | { |
bogdanm | 0:9b334a45a8ff | 3291 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 3292 | } |
bogdanm | 0:9b334a45a8ff | 3293 | |
bogdanm | 0:9b334a45a8ff | 3294 | if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT) |
bogdanm | 0:9b334a45a8ff | 3295 | { |
bogdanm | 0:9b334a45a8ff | 3296 | /* Send slave address */ |
bogdanm | 0:9b334a45a8ff | 3297 | hi2c->Instance->DR = I2C_7BIT_ADD_READ(DevAddress); |
bogdanm | 0:9b334a45a8ff | 3298 | } |
bogdanm | 0:9b334a45a8ff | 3299 | else |
bogdanm | 0:9b334a45a8ff | 3300 | { |
bogdanm | 0:9b334a45a8ff | 3301 | /* Send header of slave address */ |
bogdanm | 0:9b334a45a8ff | 3302 | hi2c->Instance->DR = I2C_10BIT_HEADER_WRITE(DevAddress); |
bogdanm | 0:9b334a45a8ff | 3303 | |
bogdanm | 0:9b334a45a8ff | 3304 | /* Wait until ADD10 flag is set */ |
bogdanm | 0:9b334a45a8ff | 3305 | if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADD10, Timeout) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 3306 | { |
bogdanm | 0:9b334a45a8ff | 3307 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
bogdanm | 0:9b334a45a8ff | 3308 | { |
bogdanm | 0:9b334a45a8ff | 3309 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 3310 | } |
bogdanm | 0:9b334a45a8ff | 3311 | else |
bogdanm | 0:9b334a45a8ff | 3312 | { |
bogdanm | 0:9b334a45a8ff | 3313 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 3314 | } |
bogdanm | 0:9b334a45a8ff | 3315 | } |
bogdanm | 0:9b334a45a8ff | 3316 | |
bogdanm | 0:9b334a45a8ff | 3317 | /* Send slave address */ |
bogdanm | 0:9b334a45a8ff | 3318 | hi2c->Instance->DR = I2C_10BIT_ADDRESS(DevAddress); |
bogdanm | 0:9b334a45a8ff | 3319 | |
bogdanm | 0:9b334a45a8ff | 3320 | /* Wait until ADDR flag is set */ |
bogdanm | 0:9b334a45a8ff | 3321 | if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 3322 | { |
bogdanm | 0:9b334a45a8ff | 3323 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
bogdanm | 0:9b334a45a8ff | 3324 | { |
bogdanm | 0:9b334a45a8ff | 3325 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 3326 | } |
bogdanm | 0:9b334a45a8ff | 3327 | else |
bogdanm | 0:9b334a45a8ff | 3328 | { |
bogdanm | 0:9b334a45a8ff | 3329 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 3330 | } |
bogdanm | 0:9b334a45a8ff | 3331 | } |
bogdanm | 0:9b334a45a8ff | 3332 | |
bogdanm | 0:9b334a45a8ff | 3333 | /* Clear ADDR flag */ |
bogdanm | 0:9b334a45a8ff | 3334 | __HAL_I2C_CLEAR_ADDRFLAG(hi2c); |
bogdanm | 0:9b334a45a8ff | 3335 | |
bogdanm | 0:9b334a45a8ff | 3336 | /* Generate Restart */ |
bogdanm | 0:9b334a45a8ff | 3337 | SET_BIT(hi2c->Instance->CR1, I2C_CR1_START); |
bogdanm | 0:9b334a45a8ff | 3338 | |
bogdanm | 0:9b334a45a8ff | 3339 | /* Wait until SB flag is set */ |
bogdanm | 0:9b334a45a8ff | 3340 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 3341 | { |
bogdanm | 0:9b334a45a8ff | 3342 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 3343 | } |
bogdanm | 0:9b334a45a8ff | 3344 | |
bogdanm | 0:9b334a45a8ff | 3345 | /* Send header of slave address */ |
bogdanm | 0:9b334a45a8ff | 3346 | hi2c->Instance->DR = I2C_10BIT_HEADER_READ(DevAddress); |
bogdanm | 0:9b334a45a8ff | 3347 | } |
bogdanm | 0:9b334a45a8ff | 3348 | |
bogdanm | 0:9b334a45a8ff | 3349 | /* Wait until ADDR flag is set */ |
bogdanm | 0:9b334a45a8ff | 3350 | if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 3351 | { |
bogdanm | 0:9b334a45a8ff | 3352 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
bogdanm | 0:9b334a45a8ff | 3353 | { |
bogdanm | 0:9b334a45a8ff | 3354 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 3355 | } |
bogdanm | 0:9b334a45a8ff | 3356 | else |
bogdanm | 0:9b334a45a8ff | 3357 | { |
bogdanm | 0:9b334a45a8ff | 3358 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 3359 | } |
bogdanm | 0:9b334a45a8ff | 3360 | } |
bogdanm | 0:9b334a45a8ff | 3361 | |
bogdanm | 0:9b334a45a8ff | 3362 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 3363 | } |
bogdanm | 0:9b334a45a8ff | 3364 | |
bogdanm | 0:9b334a45a8ff | 3365 | /** |
bogdanm | 0:9b334a45a8ff | 3366 | * @brief Master sends target device address followed by internal memory address for write request. |
mbed_official | 124:6a4a5b7d7324 | 3367 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 3368 | * the configuration information for the specified I2C. |
mbed_official | 124:6a4a5b7d7324 | 3369 | * @param DevAddress Target device address |
mbed_official | 124:6a4a5b7d7324 | 3370 | * @param MemAddress Internal memory address |
mbed_official | 124:6a4a5b7d7324 | 3371 | * @param MemAddSize Size of internal memory address |
mbed_official | 124:6a4a5b7d7324 | 3372 | * @param Timeout Timeout duration |
bogdanm | 0:9b334a45a8ff | 3373 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 3374 | */ |
bogdanm | 0:9b334a45a8ff | 3375 | static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout) |
bogdanm | 0:9b334a45a8ff | 3376 | { |
bogdanm | 0:9b334a45a8ff | 3377 | /* Generate Start */ |
bogdanm | 0:9b334a45a8ff | 3378 | SET_BIT(hi2c->Instance->CR1, I2C_CR1_START); |
bogdanm | 0:9b334a45a8ff | 3379 | |
bogdanm | 0:9b334a45a8ff | 3380 | /* Wait until SB flag is set */ |
bogdanm | 0:9b334a45a8ff | 3381 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 3382 | { |
bogdanm | 0:9b334a45a8ff | 3383 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 3384 | } |
bogdanm | 0:9b334a45a8ff | 3385 | |
bogdanm | 0:9b334a45a8ff | 3386 | /* Send slave address */ |
bogdanm | 0:9b334a45a8ff | 3387 | hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress); |
bogdanm | 0:9b334a45a8ff | 3388 | |
bogdanm | 0:9b334a45a8ff | 3389 | /* Wait until ADDR flag is set */ |
bogdanm | 0:9b334a45a8ff | 3390 | if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 3391 | { |
bogdanm | 0:9b334a45a8ff | 3392 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
bogdanm | 0:9b334a45a8ff | 3393 | { |
bogdanm | 0:9b334a45a8ff | 3394 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 3395 | } |
bogdanm | 0:9b334a45a8ff | 3396 | else |
bogdanm | 0:9b334a45a8ff | 3397 | { |
bogdanm | 0:9b334a45a8ff | 3398 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 3399 | } |
bogdanm | 0:9b334a45a8ff | 3400 | } |
bogdanm | 0:9b334a45a8ff | 3401 | |
bogdanm | 0:9b334a45a8ff | 3402 | /* Clear ADDR flag */ |
bogdanm | 0:9b334a45a8ff | 3403 | __HAL_I2C_CLEAR_ADDRFLAG(hi2c); |
bogdanm | 0:9b334a45a8ff | 3404 | |
bogdanm | 0:9b334a45a8ff | 3405 | /* Wait until TXE flag is set */ |
mbed_official | 124:6a4a5b7d7324 | 3406 | if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 3407 | { |
mbed_official | 124:6a4a5b7d7324 | 3408 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
mbed_official | 124:6a4a5b7d7324 | 3409 | { |
mbed_official | 124:6a4a5b7d7324 | 3410 | /* Generate Stop */ |
mbed_official | 124:6a4a5b7d7324 | 3411 | SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP); |
mbed_official | 124:6a4a5b7d7324 | 3412 | return HAL_ERROR; |
mbed_official | 124:6a4a5b7d7324 | 3413 | } |
mbed_official | 124:6a4a5b7d7324 | 3414 | else |
mbed_official | 124:6a4a5b7d7324 | 3415 | { |
mbed_official | 124:6a4a5b7d7324 | 3416 | return HAL_TIMEOUT; |
mbed_official | 124:6a4a5b7d7324 | 3417 | } |
bogdanm | 0:9b334a45a8ff | 3418 | } |
bogdanm | 0:9b334a45a8ff | 3419 | |
bogdanm | 0:9b334a45a8ff | 3420 | /* If Memory address size is 8Bit */ |
bogdanm | 0:9b334a45a8ff | 3421 | if(MemAddSize == I2C_MEMADD_SIZE_8BIT) |
bogdanm | 0:9b334a45a8ff | 3422 | { |
bogdanm | 0:9b334a45a8ff | 3423 | /* Send Memory Address */ |
bogdanm | 0:9b334a45a8ff | 3424 | hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress); |
bogdanm | 0:9b334a45a8ff | 3425 | } |
bogdanm | 0:9b334a45a8ff | 3426 | /* If Memory address size is 16Bit */ |
bogdanm | 0:9b334a45a8ff | 3427 | else |
bogdanm | 0:9b334a45a8ff | 3428 | { |
bogdanm | 0:9b334a45a8ff | 3429 | /* Send MSB of Memory Address */ |
bogdanm | 0:9b334a45a8ff | 3430 | hi2c->Instance->DR = I2C_MEM_ADD_MSB(MemAddress); |
bogdanm | 0:9b334a45a8ff | 3431 | |
bogdanm | 0:9b334a45a8ff | 3432 | /* Wait until TXE flag is set */ |
mbed_official | 124:6a4a5b7d7324 | 3433 | if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 3434 | { |
mbed_official | 124:6a4a5b7d7324 | 3435 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
mbed_official | 124:6a4a5b7d7324 | 3436 | { |
mbed_official | 124:6a4a5b7d7324 | 3437 | /* Generate Stop */ |
mbed_official | 124:6a4a5b7d7324 | 3438 | SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP); |
mbed_official | 124:6a4a5b7d7324 | 3439 | return HAL_ERROR; |
mbed_official | 124:6a4a5b7d7324 | 3440 | } |
mbed_official | 124:6a4a5b7d7324 | 3441 | else |
mbed_official | 124:6a4a5b7d7324 | 3442 | { |
mbed_official | 124:6a4a5b7d7324 | 3443 | return HAL_TIMEOUT; |
mbed_official | 124:6a4a5b7d7324 | 3444 | } |
bogdanm | 0:9b334a45a8ff | 3445 | } |
bogdanm | 0:9b334a45a8ff | 3446 | |
bogdanm | 0:9b334a45a8ff | 3447 | /* Send LSB of Memory Address */ |
bogdanm | 0:9b334a45a8ff | 3448 | hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress); |
bogdanm | 0:9b334a45a8ff | 3449 | } |
bogdanm | 0:9b334a45a8ff | 3450 | |
bogdanm | 0:9b334a45a8ff | 3451 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 3452 | } |
bogdanm | 0:9b334a45a8ff | 3453 | |
bogdanm | 0:9b334a45a8ff | 3454 | /** |
bogdanm | 0:9b334a45a8ff | 3455 | * @brief Master sends target device address followed by internal memory address for read request. |
mbed_official | 124:6a4a5b7d7324 | 3456 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 3457 | * the configuration information for the specified I2C. |
mbed_official | 124:6a4a5b7d7324 | 3458 | * @param DevAddress Target device address |
mbed_official | 124:6a4a5b7d7324 | 3459 | * @param MemAddress Internal memory address |
mbed_official | 124:6a4a5b7d7324 | 3460 | * @param MemAddSize Size of internal memory address |
mbed_official | 124:6a4a5b7d7324 | 3461 | * @param Timeout Timeout duration |
bogdanm | 0:9b334a45a8ff | 3462 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 3463 | */ |
bogdanm | 0:9b334a45a8ff | 3464 | static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout) |
bogdanm | 0:9b334a45a8ff | 3465 | { |
bogdanm | 0:9b334a45a8ff | 3466 | /* Enable Acknowledge */ |
bogdanm | 0:9b334a45a8ff | 3467 | SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); |
bogdanm | 0:9b334a45a8ff | 3468 | |
bogdanm | 0:9b334a45a8ff | 3469 | /* Generate Start */ |
bogdanm | 0:9b334a45a8ff | 3470 | SET_BIT(hi2c->Instance->CR1, I2C_CR1_START); |
bogdanm | 0:9b334a45a8ff | 3471 | |
bogdanm | 0:9b334a45a8ff | 3472 | /* Wait until SB flag is set */ |
bogdanm | 0:9b334a45a8ff | 3473 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 3474 | { |
bogdanm | 0:9b334a45a8ff | 3475 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 3476 | } |
bogdanm | 0:9b334a45a8ff | 3477 | |
bogdanm | 0:9b334a45a8ff | 3478 | /* Send slave address */ |
bogdanm | 0:9b334a45a8ff | 3479 | hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress); |
bogdanm | 0:9b334a45a8ff | 3480 | |
bogdanm | 0:9b334a45a8ff | 3481 | /* Wait until ADDR flag is set */ |
bogdanm | 0:9b334a45a8ff | 3482 | if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 3483 | { |
bogdanm | 0:9b334a45a8ff | 3484 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
bogdanm | 0:9b334a45a8ff | 3485 | { |
bogdanm | 0:9b334a45a8ff | 3486 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 3487 | } |
bogdanm | 0:9b334a45a8ff | 3488 | else |
bogdanm | 0:9b334a45a8ff | 3489 | { |
bogdanm | 0:9b334a45a8ff | 3490 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 3491 | } |
bogdanm | 0:9b334a45a8ff | 3492 | } |
bogdanm | 0:9b334a45a8ff | 3493 | |
bogdanm | 0:9b334a45a8ff | 3494 | /* Clear ADDR flag */ |
bogdanm | 0:9b334a45a8ff | 3495 | __HAL_I2C_CLEAR_ADDRFLAG(hi2c); |
bogdanm | 0:9b334a45a8ff | 3496 | |
bogdanm | 0:9b334a45a8ff | 3497 | /* Wait until TXE flag is set */ |
mbed_official | 124:6a4a5b7d7324 | 3498 | if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 3499 | { |
mbed_official | 124:6a4a5b7d7324 | 3500 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
mbed_official | 124:6a4a5b7d7324 | 3501 | { |
mbed_official | 124:6a4a5b7d7324 | 3502 | /* Generate Stop */ |
mbed_official | 124:6a4a5b7d7324 | 3503 | SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP); |
mbed_official | 124:6a4a5b7d7324 | 3504 | return HAL_ERROR; |
mbed_official | 124:6a4a5b7d7324 | 3505 | } |
mbed_official | 124:6a4a5b7d7324 | 3506 | else |
mbed_official | 124:6a4a5b7d7324 | 3507 | { |
mbed_official | 124:6a4a5b7d7324 | 3508 | return HAL_TIMEOUT; |
mbed_official | 124:6a4a5b7d7324 | 3509 | } |
bogdanm | 0:9b334a45a8ff | 3510 | } |
bogdanm | 0:9b334a45a8ff | 3511 | |
bogdanm | 0:9b334a45a8ff | 3512 | /* If Memory address size is 8Bit */ |
bogdanm | 0:9b334a45a8ff | 3513 | if(MemAddSize == I2C_MEMADD_SIZE_8BIT) |
bogdanm | 0:9b334a45a8ff | 3514 | { |
bogdanm | 0:9b334a45a8ff | 3515 | /* Send Memory Address */ |
bogdanm | 0:9b334a45a8ff | 3516 | hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress); |
bogdanm | 0:9b334a45a8ff | 3517 | } |
bogdanm | 0:9b334a45a8ff | 3518 | /* If Memory address size is 16Bit */ |
bogdanm | 0:9b334a45a8ff | 3519 | else |
bogdanm | 0:9b334a45a8ff | 3520 | { |
bogdanm | 0:9b334a45a8ff | 3521 | /* Send MSB of Memory Address */ |
bogdanm | 0:9b334a45a8ff | 3522 | hi2c->Instance->DR = I2C_MEM_ADD_MSB(MemAddress); |
bogdanm | 0:9b334a45a8ff | 3523 | |
bogdanm | 0:9b334a45a8ff | 3524 | /* Wait until TXE flag is set */ |
mbed_official | 124:6a4a5b7d7324 | 3525 | if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 3526 | { |
mbed_official | 124:6a4a5b7d7324 | 3527 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
mbed_official | 124:6a4a5b7d7324 | 3528 | { |
mbed_official | 124:6a4a5b7d7324 | 3529 | /* Generate Stop */ |
mbed_official | 124:6a4a5b7d7324 | 3530 | SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP); |
mbed_official | 124:6a4a5b7d7324 | 3531 | return HAL_ERROR; |
mbed_official | 124:6a4a5b7d7324 | 3532 | } |
mbed_official | 124:6a4a5b7d7324 | 3533 | else |
mbed_official | 124:6a4a5b7d7324 | 3534 | { |
mbed_official | 124:6a4a5b7d7324 | 3535 | return HAL_TIMEOUT; |
mbed_official | 124:6a4a5b7d7324 | 3536 | } |
bogdanm | 0:9b334a45a8ff | 3537 | } |
bogdanm | 0:9b334a45a8ff | 3538 | |
bogdanm | 0:9b334a45a8ff | 3539 | /* Send LSB of Memory Address */ |
bogdanm | 0:9b334a45a8ff | 3540 | hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress); |
bogdanm | 0:9b334a45a8ff | 3541 | } |
bogdanm | 0:9b334a45a8ff | 3542 | |
bogdanm | 0:9b334a45a8ff | 3543 | /* Wait until TXE flag is set */ |
mbed_official | 124:6a4a5b7d7324 | 3544 | if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 3545 | { |
mbed_official | 124:6a4a5b7d7324 | 3546 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
mbed_official | 124:6a4a5b7d7324 | 3547 | { |
mbed_official | 124:6a4a5b7d7324 | 3548 | /* Generate Stop */ |
mbed_official | 124:6a4a5b7d7324 | 3549 | SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP); |
mbed_official | 124:6a4a5b7d7324 | 3550 | return HAL_ERROR; |
mbed_official | 124:6a4a5b7d7324 | 3551 | } |
mbed_official | 124:6a4a5b7d7324 | 3552 | else |
mbed_official | 124:6a4a5b7d7324 | 3553 | { |
mbed_official | 124:6a4a5b7d7324 | 3554 | return HAL_TIMEOUT; |
mbed_official | 124:6a4a5b7d7324 | 3555 | } |
bogdanm | 0:9b334a45a8ff | 3556 | } |
bogdanm | 0:9b334a45a8ff | 3557 | |
bogdanm | 0:9b334a45a8ff | 3558 | /* Generate Restart */ |
bogdanm | 0:9b334a45a8ff | 3559 | SET_BIT(hi2c->Instance->CR1, I2C_CR1_START); |
bogdanm | 0:9b334a45a8ff | 3560 | |
bogdanm | 0:9b334a45a8ff | 3561 | /* Wait until SB flag is set */ |
bogdanm | 0:9b334a45a8ff | 3562 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 3563 | { |
bogdanm | 0:9b334a45a8ff | 3564 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 3565 | } |
bogdanm | 0:9b334a45a8ff | 3566 | |
bogdanm | 0:9b334a45a8ff | 3567 | /* Send slave address */ |
bogdanm | 0:9b334a45a8ff | 3568 | hi2c->Instance->DR = I2C_7BIT_ADD_READ(DevAddress); |
bogdanm | 0:9b334a45a8ff | 3569 | |
bogdanm | 0:9b334a45a8ff | 3570 | /* Wait until ADDR flag is set */ |
bogdanm | 0:9b334a45a8ff | 3571 | if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 3572 | { |
bogdanm | 0:9b334a45a8ff | 3573 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
bogdanm | 0:9b334a45a8ff | 3574 | { |
bogdanm | 0:9b334a45a8ff | 3575 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 3576 | } |
bogdanm | 0:9b334a45a8ff | 3577 | else |
bogdanm | 0:9b334a45a8ff | 3578 | { |
bogdanm | 0:9b334a45a8ff | 3579 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 3580 | } |
bogdanm | 0:9b334a45a8ff | 3581 | } |
bogdanm | 0:9b334a45a8ff | 3582 | |
bogdanm | 0:9b334a45a8ff | 3583 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 3584 | } |
bogdanm | 0:9b334a45a8ff | 3585 | |
bogdanm | 0:9b334a45a8ff | 3586 | /** |
bogdanm | 0:9b334a45a8ff | 3587 | * @brief DMA I2C master transmit process complete callback. |
bogdanm | 0:9b334a45a8ff | 3588 | * @param hdma: DMA handle |
bogdanm | 0:9b334a45a8ff | 3589 | * @retval None |
bogdanm | 0:9b334a45a8ff | 3590 | */ |
bogdanm | 0:9b334a45a8ff | 3591 | static void I2C_DMAMasterTransmitCplt(DMA_HandleTypeDef *hdma) |
bogdanm | 0:9b334a45a8ff | 3592 | { |
bogdanm | 0:9b334a45a8ff | 3593 | I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent; |
bogdanm | 0:9b334a45a8ff | 3594 | |
bogdanm | 0:9b334a45a8ff | 3595 | /* Wait until BTF flag is reset */ |
bogdanm | 0:9b334a45a8ff | 3596 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, I2C_TIMEOUT_FLAG) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 3597 | { |
bogdanm | 0:9b334a45a8ff | 3598 | hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 3599 | } |
bogdanm | 0:9b334a45a8ff | 3600 | |
bogdanm | 0:9b334a45a8ff | 3601 | /* Generate Stop */ |
bogdanm | 0:9b334a45a8ff | 3602 | SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); |
bogdanm | 0:9b334a45a8ff | 3603 | |
bogdanm | 0:9b334a45a8ff | 3604 | /* Disable DMA Request */ |
bogdanm | 0:9b334a45a8ff | 3605 | CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN); |
bogdanm | 0:9b334a45a8ff | 3606 | |
bogdanm | 0:9b334a45a8ff | 3607 | hi2c->XferCount = 0; |
bogdanm | 0:9b334a45a8ff | 3608 | |
bogdanm | 0:9b334a45a8ff | 3609 | hi2c->State = HAL_I2C_STATE_READY; |
mbed_official | 124:6a4a5b7d7324 | 3610 | hi2c->Mode = HAL_I2C_MODE_NONE; |
bogdanm | 0:9b334a45a8ff | 3611 | |
bogdanm | 0:9b334a45a8ff | 3612 | /* Check if Errors has been detected during transfer */ |
bogdanm | 0:9b334a45a8ff | 3613 | if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE) |
bogdanm | 0:9b334a45a8ff | 3614 | { |
bogdanm | 0:9b334a45a8ff | 3615 | HAL_I2C_ErrorCallback(hi2c); |
bogdanm | 0:9b334a45a8ff | 3616 | } |
bogdanm | 0:9b334a45a8ff | 3617 | else |
bogdanm | 0:9b334a45a8ff | 3618 | { |
bogdanm | 0:9b334a45a8ff | 3619 | HAL_I2C_MasterTxCpltCallback(hi2c); |
bogdanm | 0:9b334a45a8ff | 3620 | } |
bogdanm | 0:9b334a45a8ff | 3621 | } |
bogdanm | 0:9b334a45a8ff | 3622 | |
bogdanm | 0:9b334a45a8ff | 3623 | /** |
bogdanm | 0:9b334a45a8ff | 3624 | * @brief DMA I2C slave transmit process complete callback. |
bogdanm | 0:9b334a45a8ff | 3625 | * @param hdma: DMA handle |
bogdanm | 0:9b334a45a8ff | 3626 | * @retval None |
bogdanm | 0:9b334a45a8ff | 3627 | */ |
bogdanm | 0:9b334a45a8ff | 3628 | static void I2C_DMASlaveTransmitCplt(DMA_HandleTypeDef *hdma) |
bogdanm | 0:9b334a45a8ff | 3629 | { |
bogdanm | 0:9b334a45a8ff | 3630 | I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent; |
bogdanm | 0:9b334a45a8ff | 3631 | |
bogdanm | 0:9b334a45a8ff | 3632 | /* Wait until AF flag is reset */ |
bogdanm | 0:9b334a45a8ff | 3633 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_AF, RESET, I2C_TIMEOUT_FLAG) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 3634 | { |
bogdanm | 0:9b334a45a8ff | 3635 | hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 3636 | } |
bogdanm | 0:9b334a45a8ff | 3637 | |
bogdanm | 0:9b334a45a8ff | 3638 | /* Clear AF flag */ |
bogdanm | 0:9b334a45a8ff | 3639 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); |
bogdanm | 0:9b334a45a8ff | 3640 | |
bogdanm | 0:9b334a45a8ff | 3641 | /* Disable Address Acknowledge */ |
bogdanm | 0:9b334a45a8ff | 3642 | CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); |
bogdanm | 0:9b334a45a8ff | 3643 | |
bogdanm | 0:9b334a45a8ff | 3644 | /* Disable DMA Request */ |
bogdanm | 0:9b334a45a8ff | 3645 | CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN); |
bogdanm | 0:9b334a45a8ff | 3646 | |
bogdanm | 0:9b334a45a8ff | 3647 | hi2c->XferCount = 0; |
bogdanm | 0:9b334a45a8ff | 3648 | |
bogdanm | 0:9b334a45a8ff | 3649 | hi2c->State = HAL_I2C_STATE_READY; |
mbed_official | 124:6a4a5b7d7324 | 3650 | hi2c->Mode = HAL_I2C_MODE_NONE; |
bogdanm | 0:9b334a45a8ff | 3651 | |
bogdanm | 0:9b334a45a8ff | 3652 | /* Check if Errors has been detected during transfer */ |
bogdanm | 0:9b334a45a8ff | 3653 | if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE) |
bogdanm | 0:9b334a45a8ff | 3654 | { |
bogdanm | 0:9b334a45a8ff | 3655 | HAL_I2C_ErrorCallback(hi2c); |
bogdanm | 0:9b334a45a8ff | 3656 | } |
bogdanm | 0:9b334a45a8ff | 3657 | else |
bogdanm | 0:9b334a45a8ff | 3658 | { |
bogdanm | 0:9b334a45a8ff | 3659 | HAL_I2C_SlaveTxCpltCallback(hi2c); |
bogdanm | 0:9b334a45a8ff | 3660 | } |
bogdanm | 0:9b334a45a8ff | 3661 | } |
bogdanm | 0:9b334a45a8ff | 3662 | |
bogdanm | 0:9b334a45a8ff | 3663 | /** |
bogdanm | 0:9b334a45a8ff | 3664 | * @brief DMA I2C master receive process complete callback |
bogdanm | 0:9b334a45a8ff | 3665 | * @param hdma: DMA handle |
bogdanm | 0:9b334a45a8ff | 3666 | * @retval None |
bogdanm | 0:9b334a45a8ff | 3667 | */ |
bogdanm | 0:9b334a45a8ff | 3668 | static void I2C_DMAMasterReceiveCplt(DMA_HandleTypeDef *hdma) |
bogdanm | 0:9b334a45a8ff | 3669 | { |
bogdanm | 0:9b334a45a8ff | 3670 | I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent; |
bogdanm | 0:9b334a45a8ff | 3671 | |
mbed_official | 124:6a4a5b7d7324 | 3672 | /* Disable Acknowledge */ |
mbed_official | 124:6a4a5b7d7324 | 3673 | CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); |
mbed_official | 124:6a4a5b7d7324 | 3674 | |
bogdanm | 0:9b334a45a8ff | 3675 | /* Generate Stop */ |
bogdanm | 0:9b334a45a8ff | 3676 | SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); |
bogdanm | 0:9b334a45a8ff | 3677 | |
bogdanm | 0:9b334a45a8ff | 3678 | /* Disable Last DMA */ |
bogdanm | 0:9b334a45a8ff | 3679 | CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_LAST); |
bogdanm | 0:9b334a45a8ff | 3680 | |
bogdanm | 0:9b334a45a8ff | 3681 | /* Disable DMA Request */ |
bogdanm | 0:9b334a45a8ff | 3682 | CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN); |
bogdanm | 0:9b334a45a8ff | 3683 | |
bogdanm | 0:9b334a45a8ff | 3684 | hi2c->XferCount = 0; |
bogdanm | 0:9b334a45a8ff | 3685 | |
bogdanm | 0:9b334a45a8ff | 3686 | hi2c->State = HAL_I2C_STATE_READY; |
mbed_official | 124:6a4a5b7d7324 | 3687 | hi2c->Mode = HAL_I2C_MODE_NONE; |
bogdanm | 0:9b334a45a8ff | 3688 | |
bogdanm | 0:9b334a45a8ff | 3689 | /* Check if Errors has been detected during transfer */ |
bogdanm | 0:9b334a45a8ff | 3690 | if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE) |
bogdanm | 0:9b334a45a8ff | 3691 | { |
bogdanm | 0:9b334a45a8ff | 3692 | HAL_I2C_ErrorCallback(hi2c); |
bogdanm | 0:9b334a45a8ff | 3693 | } |
bogdanm | 0:9b334a45a8ff | 3694 | else |
bogdanm | 0:9b334a45a8ff | 3695 | { |
bogdanm | 0:9b334a45a8ff | 3696 | HAL_I2C_MasterRxCpltCallback(hi2c); |
bogdanm | 0:9b334a45a8ff | 3697 | } |
bogdanm | 0:9b334a45a8ff | 3698 | } |
bogdanm | 0:9b334a45a8ff | 3699 | |
bogdanm | 0:9b334a45a8ff | 3700 | /** |
bogdanm | 0:9b334a45a8ff | 3701 | * @brief DMA I2C slave receive process complete callback. |
bogdanm | 0:9b334a45a8ff | 3702 | * @param hdma: DMA handle |
bogdanm | 0:9b334a45a8ff | 3703 | * @retval None |
bogdanm | 0:9b334a45a8ff | 3704 | */ |
bogdanm | 0:9b334a45a8ff | 3705 | static void I2C_DMASlaveReceiveCplt(DMA_HandleTypeDef *hdma) |
bogdanm | 0:9b334a45a8ff | 3706 | { |
bogdanm | 0:9b334a45a8ff | 3707 | I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent; |
bogdanm | 0:9b334a45a8ff | 3708 | |
bogdanm | 0:9b334a45a8ff | 3709 | /* Wait until STOPF flag is reset */ |
mbed_official | 124:6a4a5b7d7324 | 3710 | if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_FLAG) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 3711 | { |
mbed_official | 124:6a4a5b7d7324 | 3712 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
mbed_official | 124:6a4a5b7d7324 | 3713 | { |
mbed_official | 124:6a4a5b7d7324 | 3714 | hi2c->ErrorCode |= HAL_I2C_ERROR_AF; |
mbed_official | 124:6a4a5b7d7324 | 3715 | } |
mbed_official | 124:6a4a5b7d7324 | 3716 | else |
mbed_official | 124:6a4a5b7d7324 | 3717 | { |
mbed_official | 124:6a4a5b7d7324 | 3718 | hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; |
mbed_official | 124:6a4a5b7d7324 | 3719 | } |
bogdanm | 0:9b334a45a8ff | 3720 | } |
bogdanm | 0:9b334a45a8ff | 3721 | |
bogdanm | 0:9b334a45a8ff | 3722 | /* Clear STOPF flag */ |
bogdanm | 0:9b334a45a8ff | 3723 | __HAL_I2C_CLEAR_STOPFLAG(hi2c); |
bogdanm | 0:9b334a45a8ff | 3724 | |
bogdanm | 0:9b334a45a8ff | 3725 | /* Disable Address Acknowledge */ |
bogdanm | 0:9b334a45a8ff | 3726 | CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); |
bogdanm | 0:9b334a45a8ff | 3727 | |
bogdanm | 0:9b334a45a8ff | 3728 | /* Disable DMA Request */ |
bogdanm | 0:9b334a45a8ff | 3729 | CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN); |
bogdanm | 0:9b334a45a8ff | 3730 | |
bogdanm | 0:9b334a45a8ff | 3731 | hi2c->XferCount = 0; |
bogdanm | 0:9b334a45a8ff | 3732 | |
bogdanm | 0:9b334a45a8ff | 3733 | hi2c->State = HAL_I2C_STATE_READY; |
mbed_official | 124:6a4a5b7d7324 | 3734 | hi2c->Mode = HAL_I2C_MODE_NONE; |
bogdanm | 0:9b334a45a8ff | 3735 | |
bogdanm | 0:9b334a45a8ff | 3736 | /* Check if Errors has been detected during transfer */ |
bogdanm | 0:9b334a45a8ff | 3737 | if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE) |
bogdanm | 0:9b334a45a8ff | 3738 | { |
bogdanm | 0:9b334a45a8ff | 3739 | HAL_I2C_ErrorCallback(hi2c); |
bogdanm | 0:9b334a45a8ff | 3740 | } |
bogdanm | 0:9b334a45a8ff | 3741 | else |
bogdanm | 0:9b334a45a8ff | 3742 | { |
bogdanm | 0:9b334a45a8ff | 3743 | HAL_I2C_SlaveRxCpltCallback(hi2c); |
bogdanm | 0:9b334a45a8ff | 3744 | } |
bogdanm | 0:9b334a45a8ff | 3745 | } |
bogdanm | 0:9b334a45a8ff | 3746 | |
bogdanm | 0:9b334a45a8ff | 3747 | /** |
bogdanm | 0:9b334a45a8ff | 3748 | * @brief DMA I2C Memory Write process complete callback |
bogdanm | 0:9b334a45a8ff | 3749 | * @param hdma: DMA handle |
bogdanm | 0:9b334a45a8ff | 3750 | * @retval None |
bogdanm | 0:9b334a45a8ff | 3751 | */ |
bogdanm | 0:9b334a45a8ff | 3752 | static void I2C_DMAMemTransmitCplt(DMA_HandleTypeDef *hdma) |
bogdanm | 0:9b334a45a8ff | 3753 | { |
bogdanm | 0:9b334a45a8ff | 3754 | I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent; |
bogdanm | 0:9b334a45a8ff | 3755 | |
bogdanm | 0:9b334a45a8ff | 3756 | /* Wait until BTF flag is reset */ |
bogdanm | 0:9b334a45a8ff | 3757 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, I2C_TIMEOUT_FLAG) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 3758 | { |
bogdanm | 0:9b334a45a8ff | 3759 | hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 3760 | } |
bogdanm | 0:9b334a45a8ff | 3761 | |
bogdanm | 0:9b334a45a8ff | 3762 | /* Generate Stop */ |
bogdanm | 0:9b334a45a8ff | 3763 | SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); |
bogdanm | 0:9b334a45a8ff | 3764 | |
bogdanm | 0:9b334a45a8ff | 3765 | /* Disable DMA Request */ |
bogdanm | 0:9b334a45a8ff | 3766 | CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN); |
bogdanm | 0:9b334a45a8ff | 3767 | |
bogdanm | 0:9b334a45a8ff | 3768 | hi2c->XferCount = 0; |
bogdanm | 0:9b334a45a8ff | 3769 | |
bogdanm | 0:9b334a45a8ff | 3770 | hi2c->State = HAL_I2C_STATE_READY; |
mbed_official | 124:6a4a5b7d7324 | 3771 | hi2c->Mode = HAL_I2C_MODE_NONE; |
bogdanm | 0:9b334a45a8ff | 3772 | |
bogdanm | 0:9b334a45a8ff | 3773 | /* Check if Errors has been detected during transfer */ |
bogdanm | 0:9b334a45a8ff | 3774 | if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE) |
bogdanm | 0:9b334a45a8ff | 3775 | { |
bogdanm | 0:9b334a45a8ff | 3776 | HAL_I2C_ErrorCallback(hi2c); |
bogdanm | 0:9b334a45a8ff | 3777 | } |
bogdanm | 0:9b334a45a8ff | 3778 | else |
bogdanm | 0:9b334a45a8ff | 3779 | { |
bogdanm | 0:9b334a45a8ff | 3780 | HAL_I2C_MemTxCpltCallback(hi2c); |
bogdanm | 0:9b334a45a8ff | 3781 | } |
bogdanm | 0:9b334a45a8ff | 3782 | } |
bogdanm | 0:9b334a45a8ff | 3783 | |
bogdanm | 0:9b334a45a8ff | 3784 | /** |
bogdanm | 0:9b334a45a8ff | 3785 | * @brief DMA I2C Memory Read process complete callback |
bogdanm | 0:9b334a45a8ff | 3786 | * @param hdma: DMA handle |
bogdanm | 0:9b334a45a8ff | 3787 | * @retval None |
bogdanm | 0:9b334a45a8ff | 3788 | */ |
bogdanm | 0:9b334a45a8ff | 3789 | static void I2C_DMAMemReceiveCplt(DMA_HandleTypeDef *hdma) |
bogdanm | 0:9b334a45a8ff | 3790 | { |
bogdanm | 0:9b334a45a8ff | 3791 | I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent; |
bogdanm | 0:9b334a45a8ff | 3792 | |
mbed_official | 124:6a4a5b7d7324 | 3793 | /* Disable Acknowledge */ |
mbed_official | 124:6a4a5b7d7324 | 3794 | CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); |
mbed_official | 124:6a4a5b7d7324 | 3795 | |
bogdanm | 0:9b334a45a8ff | 3796 | /* Generate Stop */ |
bogdanm | 0:9b334a45a8ff | 3797 | SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); |
bogdanm | 0:9b334a45a8ff | 3798 | |
bogdanm | 0:9b334a45a8ff | 3799 | /* Disable Last DMA */ |
bogdanm | 0:9b334a45a8ff | 3800 | CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_LAST); |
bogdanm | 0:9b334a45a8ff | 3801 | |
bogdanm | 0:9b334a45a8ff | 3802 | /* Disable DMA Request */ |
bogdanm | 0:9b334a45a8ff | 3803 | CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN); |
bogdanm | 0:9b334a45a8ff | 3804 | |
bogdanm | 0:9b334a45a8ff | 3805 | hi2c->XferCount = 0; |
bogdanm | 0:9b334a45a8ff | 3806 | |
bogdanm | 0:9b334a45a8ff | 3807 | hi2c->State = HAL_I2C_STATE_READY; |
mbed_official | 124:6a4a5b7d7324 | 3808 | hi2c->Mode = HAL_I2C_MODE_NONE; |
bogdanm | 0:9b334a45a8ff | 3809 | |
bogdanm | 0:9b334a45a8ff | 3810 | /* Check if Errors has been detected during transfer */ |
bogdanm | 0:9b334a45a8ff | 3811 | if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE) |
bogdanm | 0:9b334a45a8ff | 3812 | { |
bogdanm | 0:9b334a45a8ff | 3813 | HAL_I2C_ErrorCallback(hi2c); |
bogdanm | 0:9b334a45a8ff | 3814 | } |
bogdanm | 0:9b334a45a8ff | 3815 | else |
bogdanm | 0:9b334a45a8ff | 3816 | { |
bogdanm | 0:9b334a45a8ff | 3817 | HAL_I2C_MemRxCpltCallback(hi2c); |
bogdanm | 0:9b334a45a8ff | 3818 | } |
bogdanm | 0:9b334a45a8ff | 3819 | } |
bogdanm | 0:9b334a45a8ff | 3820 | |
bogdanm | 0:9b334a45a8ff | 3821 | /** |
bogdanm | 0:9b334a45a8ff | 3822 | * @brief I2C Configuration Speed function |
mbed_official | 124:6a4a5b7d7324 | 3823 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 3824 | * the configuration information for the specified I2C. |
bogdanm | 0:9b334a45a8ff | 3825 | * @param I2CClkSrcFreq: PCLK frequency from RCC. |
bogdanm | 0:9b334a45a8ff | 3826 | * @retval CCR Speed: Speed to set in I2C CCR Register |
bogdanm | 0:9b334a45a8ff | 3827 | */ |
bogdanm | 0:9b334a45a8ff | 3828 | static uint32_t I2C_Configure_Speed(I2C_HandleTypeDef *hi2c, uint32_t I2CClkSrcFreq) |
bogdanm | 0:9b334a45a8ff | 3829 | { |
bogdanm | 0:9b334a45a8ff | 3830 | uint32_t tmp1 = 0; |
bogdanm | 0:9b334a45a8ff | 3831 | |
bogdanm | 0:9b334a45a8ff | 3832 | /* Clock Standard Mode */ |
bogdanm | 0:9b334a45a8ff | 3833 | if(hi2c->Init.ClockSpeed <= I2C_STANDARD_MODE_MAX_CLK) |
bogdanm | 0:9b334a45a8ff | 3834 | { |
bogdanm | 0:9b334a45a8ff | 3835 | /* Calculate Value to be set in CCR register */ |
bogdanm | 0:9b334a45a8ff | 3836 | tmp1 = (I2CClkSrcFreq/(hi2c->Init.ClockSpeed << 1)); |
bogdanm | 0:9b334a45a8ff | 3837 | |
bogdanm | 0:9b334a45a8ff | 3838 | /* The minimum allowed value set in CCR register is 0x04 for Standard Mode */ |
bogdanm | 0:9b334a45a8ff | 3839 | if( (tmp1 & I2C_CCR_CCR) < 4 ) |
bogdanm | 0:9b334a45a8ff | 3840 | { |
bogdanm | 0:9b334a45a8ff | 3841 | return 4; |
bogdanm | 0:9b334a45a8ff | 3842 | } |
bogdanm | 0:9b334a45a8ff | 3843 | else |
bogdanm | 0:9b334a45a8ff | 3844 | { |
bogdanm | 0:9b334a45a8ff | 3845 | return tmp1; |
bogdanm | 0:9b334a45a8ff | 3846 | } |
bogdanm | 0:9b334a45a8ff | 3847 | } |
bogdanm | 0:9b334a45a8ff | 3848 | else |
bogdanm | 0:9b334a45a8ff | 3849 | { |
bogdanm | 0:9b334a45a8ff | 3850 | /* Clock Fast Mode */ |
bogdanm | 0:9b334a45a8ff | 3851 | tmp1 = I2C_CCR_FS; |
bogdanm | 0:9b334a45a8ff | 3852 | |
bogdanm | 0:9b334a45a8ff | 3853 | /* Duty Cylce tLow/tHigh = 2 */ |
bogdanm | 0:9b334a45a8ff | 3854 | if(hi2c->Init.DutyCycle == I2C_DUTYCYCLE_2) |
bogdanm | 0:9b334a45a8ff | 3855 | { |
bogdanm | 0:9b334a45a8ff | 3856 | tmp1 |= (I2CClkSrcFreq/(hi2c->Init.ClockSpeed * 3)) | I2C_DUTYCYCLE_2; |
bogdanm | 0:9b334a45a8ff | 3857 | } |
bogdanm | 0:9b334a45a8ff | 3858 | else /* Duty Cylce tLow/tHigh = 16/9 */ |
bogdanm | 0:9b334a45a8ff | 3859 | { |
bogdanm | 0:9b334a45a8ff | 3860 | tmp1 |= (I2CClkSrcFreq/(hi2c->Init.ClockSpeed * 25)) | I2C_DUTYCYCLE_16_9; |
bogdanm | 0:9b334a45a8ff | 3861 | } |
bogdanm | 0:9b334a45a8ff | 3862 | |
bogdanm | 0:9b334a45a8ff | 3863 | /* The minimum allowed value set in CCR register is 0x01 for Fast Mode */ |
bogdanm | 0:9b334a45a8ff | 3864 | if( (tmp1 & I2C_CCR_CCR) < 1 ) |
bogdanm | 0:9b334a45a8ff | 3865 | { |
bogdanm | 0:9b334a45a8ff | 3866 | return 1; |
bogdanm | 0:9b334a45a8ff | 3867 | } |
bogdanm | 0:9b334a45a8ff | 3868 | else |
bogdanm | 0:9b334a45a8ff | 3869 | { |
bogdanm | 0:9b334a45a8ff | 3870 | return tmp1; |
bogdanm | 0:9b334a45a8ff | 3871 | } |
bogdanm | 0:9b334a45a8ff | 3872 | } |
bogdanm | 0:9b334a45a8ff | 3873 | } |
bogdanm | 0:9b334a45a8ff | 3874 | |
bogdanm | 0:9b334a45a8ff | 3875 | /** |
bogdanm | 0:9b334a45a8ff | 3876 | * @brief DMA I2C communication error callback. |
bogdanm | 0:9b334a45a8ff | 3877 | * @param hdma: DMA handle |
bogdanm | 0:9b334a45a8ff | 3878 | * @retval None |
bogdanm | 0:9b334a45a8ff | 3879 | */ |
bogdanm | 0:9b334a45a8ff | 3880 | static void I2C_DMAError(DMA_HandleTypeDef *hdma) |
bogdanm | 0:9b334a45a8ff | 3881 | { |
bogdanm | 0:9b334a45a8ff | 3882 | I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent; |
bogdanm | 0:9b334a45a8ff | 3883 | |
bogdanm | 0:9b334a45a8ff | 3884 | /* Disable Acknowledge */ |
bogdanm | 0:9b334a45a8ff | 3885 | CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); |
bogdanm | 0:9b334a45a8ff | 3886 | |
bogdanm | 0:9b334a45a8ff | 3887 | hi2c->XferCount = 0; |
bogdanm | 0:9b334a45a8ff | 3888 | |
bogdanm | 0:9b334a45a8ff | 3889 | hi2c->State = HAL_I2C_STATE_READY; |
mbed_official | 124:6a4a5b7d7324 | 3890 | hi2c->Mode = HAL_I2C_MODE_NONE; |
bogdanm | 0:9b334a45a8ff | 3891 | |
bogdanm | 0:9b334a45a8ff | 3892 | hi2c->ErrorCode |= HAL_I2C_ERROR_DMA; |
bogdanm | 0:9b334a45a8ff | 3893 | |
bogdanm | 0:9b334a45a8ff | 3894 | HAL_I2C_ErrorCallback(hi2c); |
bogdanm | 0:9b334a45a8ff | 3895 | } |
bogdanm | 0:9b334a45a8ff | 3896 | |
bogdanm | 0:9b334a45a8ff | 3897 | /** |
bogdanm | 0:9b334a45a8ff | 3898 | * @brief This function handles I2C Communication Timeout. |
mbed_official | 124:6a4a5b7d7324 | 3899 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 3900 | * the configuration information for the specified I2C. |
bogdanm | 0:9b334a45a8ff | 3901 | * @param Flag: specifies the I2C flag to check. |
bogdanm | 0:9b334a45a8ff | 3902 | * @param Status: The new Flag status (SET or RESET). |
mbed_official | 124:6a4a5b7d7324 | 3903 | * @param Timeout Timeout duration |
bogdanm | 0:9b334a45a8ff | 3904 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 3905 | */ |
bogdanm | 0:9b334a45a8ff | 3906 | static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout) |
bogdanm | 0:9b334a45a8ff | 3907 | { |
bogdanm | 0:9b334a45a8ff | 3908 | uint32_t tickstart = 0; |
bogdanm | 0:9b334a45a8ff | 3909 | |
bogdanm | 0:9b334a45a8ff | 3910 | /* Get tick */ |
bogdanm | 0:9b334a45a8ff | 3911 | tickstart = HAL_GetTick(); |
bogdanm | 0:9b334a45a8ff | 3912 | |
bogdanm | 0:9b334a45a8ff | 3913 | /* Wait until flag is set */ |
bogdanm | 0:9b334a45a8ff | 3914 | if(Status == RESET) |
bogdanm | 0:9b334a45a8ff | 3915 | { |
bogdanm | 0:9b334a45a8ff | 3916 | while(__HAL_I2C_GET_FLAG(hi2c, Flag) == RESET) |
bogdanm | 0:9b334a45a8ff | 3917 | { |
bogdanm | 0:9b334a45a8ff | 3918 | /* Check for the Timeout */ |
bogdanm | 0:9b334a45a8ff | 3919 | if(Timeout != HAL_MAX_DELAY) |
bogdanm | 0:9b334a45a8ff | 3920 | { |
bogdanm | 0:9b334a45a8ff | 3921 | if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout)) |
bogdanm | 0:9b334a45a8ff | 3922 | { |
bogdanm | 0:9b334a45a8ff | 3923 | hi2c->State= HAL_I2C_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 3924 | |
bogdanm | 0:9b334a45a8ff | 3925 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 3926 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 3927 | |
bogdanm | 0:9b334a45a8ff | 3928 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 3929 | } |
bogdanm | 0:9b334a45a8ff | 3930 | } |
bogdanm | 0:9b334a45a8ff | 3931 | } |
bogdanm | 0:9b334a45a8ff | 3932 | } |
bogdanm | 0:9b334a45a8ff | 3933 | else |
bogdanm | 0:9b334a45a8ff | 3934 | { |
bogdanm | 0:9b334a45a8ff | 3935 | while(__HAL_I2C_GET_FLAG(hi2c, Flag) != RESET) |
bogdanm | 0:9b334a45a8ff | 3936 | { |
bogdanm | 0:9b334a45a8ff | 3937 | /* Check for the Timeout */ |
bogdanm | 0:9b334a45a8ff | 3938 | if(Timeout != HAL_MAX_DELAY) |
bogdanm | 0:9b334a45a8ff | 3939 | { |
bogdanm | 0:9b334a45a8ff | 3940 | if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout)) |
bogdanm | 0:9b334a45a8ff | 3941 | { |
bogdanm | 0:9b334a45a8ff | 3942 | hi2c->State= HAL_I2C_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 3943 | |
bogdanm | 0:9b334a45a8ff | 3944 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 3945 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 3946 | |
bogdanm | 0:9b334a45a8ff | 3947 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 3948 | } |
bogdanm | 0:9b334a45a8ff | 3949 | } |
bogdanm | 0:9b334a45a8ff | 3950 | } |
bogdanm | 0:9b334a45a8ff | 3951 | } |
bogdanm | 0:9b334a45a8ff | 3952 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 3953 | } |
bogdanm | 0:9b334a45a8ff | 3954 | |
bogdanm | 0:9b334a45a8ff | 3955 | /** |
bogdanm | 0:9b334a45a8ff | 3956 | * @brief This function handles I2C Communication Timeout for Master addressing phase. |
mbed_official | 124:6a4a5b7d7324 | 3957 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 3958 | * the configuration information for the specified I2C. |
bogdanm | 0:9b334a45a8ff | 3959 | * @param Flag: specifies the I2C flag to check. |
mbed_official | 124:6a4a5b7d7324 | 3960 | * @param Timeout Timeout duration |
bogdanm | 0:9b334a45a8ff | 3961 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 3962 | */ |
bogdanm | 0:9b334a45a8ff | 3963 | static HAL_StatusTypeDef I2C_WaitOnMasterAddressFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, uint32_t Timeout) |
bogdanm | 0:9b334a45a8ff | 3964 | { |
bogdanm | 0:9b334a45a8ff | 3965 | uint32_t tickstart = 0; |
bogdanm | 0:9b334a45a8ff | 3966 | |
bogdanm | 0:9b334a45a8ff | 3967 | /* Get tick */ |
bogdanm | 0:9b334a45a8ff | 3968 | tickstart = HAL_GetTick(); |
bogdanm | 0:9b334a45a8ff | 3969 | |
bogdanm | 0:9b334a45a8ff | 3970 | while(__HAL_I2C_GET_FLAG(hi2c, Flag) == RESET) |
bogdanm | 0:9b334a45a8ff | 3971 | { |
bogdanm | 0:9b334a45a8ff | 3972 | if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET) |
bogdanm | 0:9b334a45a8ff | 3973 | { |
bogdanm | 0:9b334a45a8ff | 3974 | /* Generate Stop */ |
bogdanm | 0:9b334a45a8ff | 3975 | SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); |
bogdanm | 0:9b334a45a8ff | 3976 | |
bogdanm | 0:9b334a45a8ff | 3977 | /* Clear AF Flag */ |
bogdanm | 0:9b334a45a8ff | 3978 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); |
bogdanm | 0:9b334a45a8ff | 3979 | |
bogdanm | 0:9b334a45a8ff | 3980 | hi2c->ErrorCode = HAL_I2C_ERROR_AF; |
bogdanm | 0:9b334a45a8ff | 3981 | hi2c->State= HAL_I2C_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 3982 | |
bogdanm | 0:9b334a45a8ff | 3983 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 3984 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 3985 | |
bogdanm | 0:9b334a45a8ff | 3986 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 3987 | } |
bogdanm | 0:9b334a45a8ff | 3988 | |
bogdanm | 0:9b334a45a8ff | 3989 | /* Check for the Timeout */ |
bogdanm | 0:9b334a45a8ff | 3990 | if(Timeout != HAL_MAX_DELAY) |
bogdanm | 0:9b334a45a8ff | 3991 | { |
bogdanm | 0:9b334a45a8ff | 3992 | if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout)) |
bogdanm | 0:9b334a45a8ff | 3993 | { |
bogdanm | 0:9b334a45a8ff | 3994 | hi2c->State= HAL_I2C_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 3995 | |
bogdanm | 0:9b334a45a8ff | 3996 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 3997 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 3998 | |
bogdanm | 0:9b334a45a8ff | 3999 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 4000 | } |
bogdanm | 0:9b334a45a8ff | 4001 | } |
bogdanm | 0:9b334a45a8ff | 4002 | } |
bogdanm | 0:9b334a45a8ff | 4003 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 4004 | } |
bogdanm | 0:9b334a45a8ff | 4005 | |
bogdanm | 0:9b334a45a8ff | 4006 | /** |
mbed_official | 124:6a4a5b7d7324 | 4007 | * @brief This function handles I2C Communication Timeout for specific usage of TXE flag. |
mbed_official | 124:6a4a5b7d7324 | 4008 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 124:6a4a5b7d7324 | 4009 | * the configuration information for the specified I2C. |
mbed_official | 124:6a4a5b7d7324 | 4010 | * @param Timeout Timeout duration |
mbed_official | 124:6a4a5b7d7324 | 4011 | * @retval HAL status |
mbed_official | 124:6a4a5b7d7324 | 4012 | */ |
mbed_official | 124:6a4a5b7d7324 | 4013 | static HAL_StatusTypeDef I2C_WaitOnTXEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout) |
mbed_official | 124:6a4a5b7d7324 | 4014 | { |
mbed_official | 124:6a4a5b7d7324 | 4015 | uint32_t tickstart = HAL_GetTick(); |
mbed_official | 124:6a4a5b7d7324 | 4016 | |
mbed_official | 124:6a4a5b7d7324 | 4017 | while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == RESET) |
mbed_official | 124:6a4a5b7d7324 | 4018 | { |
mbed_official | 124:6a4a5b7d7324 | 4019 | /* Check if a NACK is detected */ |
mbed_official | 124:6a4a5b7d7324 | 4020 | if(I2C_IsAcknowledgeFailed(hi2c) != HAL_OK) |
mbed_official | 124:6a4a5b7d7324 | 4021 | { |
mbed_official | 124:6a4a5b7d7324 | 4022 | return HAL_ERROR; |
mbed_official | 124:6a4a5b7d7324 | 4023 | } |
mbed_official | 124:6a4a5b7d7324 | 4024 | |
mbed_official | 124:6a4a5b7d7324 | 4025 | /* Check for the Timeout */ |
mbed_official | 124:6a4a5b7d7324 | 4026 | if(Timeout != HAL_MAX_DELAY) |
mbed_official | 124:6a4a5b7d7324 | 4027 | { |
mbed_official | 124:6a4a5b7d7324 | 4028 | if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout)) |
mbed_official | 124:6a4a5b7d7324 | 4029 | { |
mbed_official | 124:6a4a5b7d7324 | 4030 | hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; |
mbed_official | 124:6a4a5b7d7324 | 4031 | hi2c->State= HAL_I2C_STATE_READY; |
mbed_official | 124:6a4a5b7d7324 | 4032 | |
mbed_official | 124:6a4a5b7d7324 | 4033 | /* Process Unlocked */ |
mbed_official | 124:6a4a5b7d7324 | 4034 | __HAL_UNLOCK(hi2c); |
mbed_official | 124:6a4a5b7d7324 | 4035 | |
mbed_official | 124:6a4a5b7d7324 | 4036 | return HAL_TIMEOUT; |
mbed_official | 124:6a4a5b7d7324 | 4037 | } |
mbed_official | 124:6a4a5b7d7324 | 4038 | } |
mbed_official | 124:6a4a5b7d7324 | 4039 | } |
mbed_official | 124:6a4a5b7d7324 | 4040 | return HAL_OK; |
mbed_official | 124:6a4a5b7d7324 | 4041 | } |
mbed_official | 124:6a4a5b7d7324 | 4042 | |
mbed_official | 124:6a4a5b7d7324 | 4043 | /** |
mbed_official | 124:6a4a5b7d7324 | 4044 | * @brief This function handles I2C Communication Timeout for specific usage of BTF flag. |
mbed_official | 124:6a4a5b7d7324 | 4045 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 124:6a4a5b7d7324 | 4046 | * the configuration information for the specified I2C. |
mbed_official | 124:6a4a5b7d7324 | 4047 | * @param Timeout Timeout duration |
mbed_official | 124:6a4a5b7d7324 | 4048 | * @retval HAL status |
mbed_official | 124:6a4a5b7d7324 | 4049 | */ |
mbed_official | 124:6a4a5b7d7324 | 4050 | static HAL_StatusTypeDef I2C_WaitOnBTFFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout) |
mbed_official | 124:6a4a5b7d7324 | 4051 | { |
mbed_official | 124:6a4a5b7d7324 | 4052 | uint32_t tickstart = HAL_GetTick(); |
mbed_official | 124:6a4a5b7d7324 | 4053 | |
mbed_official | 124:6a4a5b7d7324 | 4054 | while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == RESET) |
mbed_official | 124:6a4a5b7d7324 | 4055 | { |
mbed_official | 124:6a4a5b7d7324 | 4056 | /* Check if a NACK is detected */ |
mbed_official | 124:6a4a5b7d7324 | 4057 | if(I2C_IsAcknowledgeFailed(hi2c) != HAL_OK) |
mbed_official | 124:6a4a5b7d7324 | 4058 | { |
mbed_official | 124:6a4a5b7d7324 | 4059 | return HAL_ERROR; |
mbed_official | 124:6a4a5b7d7324 | 4060 | } |
mbed_official | 124:6a4a5b7d7324 | 4061 | |
mbed_official | 124:6a4a5b7d7324 | 4062 | /* Check for the Timeout */ |
mbed_official | 124:6a4a5b7d7324 | 4063 | if(Timeout != HAL_MAX_DELAY) |
mbed_official | 124:6a4a5b7d7324 | 4064 | { |
mbed_official | 124:6a4a5b7d7324 | 4065 | if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout)) |
mbed_official | 124:6a4a5b7d7324 | 4066 | { |
mbed_official | 124:6a4a5b7d7324 | 4067 | hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; |
mbed_official | 124:6a4a5b7d7324 | 4068 | hi2c->State= HAL_I2C_STATE_READY; |
mbed_official | 124:6a4a5b7d7324 | 4069 | |
mbed_official | 124:6a4a5b7d7324 | 4070 | /* Process Unlocked */ |
mbed_official | 124:6a4a5b7d7324 | 4071 | __HAL_UNLOCK(hi2c); |
mbed_official | 124:6a4a5b7d7324 | 4072 | |
mbed_official | 124:6a4a5b7d7324 | 4073 | return HAL_TIMEOUT; |
mbed_official | 124:6a4a5b7d7324 | 4074 | } |
mbed_official | 124:6a4a5b7d7324 | 4075 | } |
mbed_official | 124:6a4a5b7d7324 | 4076 | } |
mbed_official | 124:6a4a5b7d7324 | 4077 | return HAL_OK; |
mbed_official | 124:6a4a5b7d7324 | 4078 | } |
mbed_official | 124:6a4a5b7d7324 | 4079 | |
mbed_official | 124:6a4a5b7d7324 | 4080 | /** |
mbed_official | 124:6a4a5b7d7324 | 4081 | * @brief This function handles I2C Communication Timeout for specific usage of STOP flag. |
mbed_official | 124:6a4a5b7d7324 | 4082 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 124:6a4a5b7d7324 | 4083 | * the configuration information for the specified I2C. |
mbed_official | 124:6a4a5b7d7324 | 4084 | * @param Timeout Timeout duration |
mbed_official | 124:6a4a5b7d7324 | 4085 | * @retval HAL status |
mbed_official | 124:6a4a5b7d7324 | 4086 | */ |
mbed_official | 124:6a4a5b7d7324 | 4087 | static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout) |
mbed_official | 124:6a4a5b7d7324 | 4088 | { |
mbed_official | 124:6a4a5b7d7324 | 4089 | uint32_t tickstart = 0x00; |
mbed_official | 124:6a4a5b7d7324 | 4090 | tickstart = HAL_GetTick(); |
mbed_official | 124:6a4a5b7d7324 | 4091 | |
mbed_official | 124:6a4a5b7d7324 | 4092 | while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET) |
mbed_official | 124:6a4a5b7d7324 | 4093 | { |
mbed_official | 124:6a4a5b7d7324 | 4094 | /* Check if a NACK is detected */ |
mbed_official | 124:6a4a5b7d7324 | 4095 | if(I2C_IsAcknowledgeFailed(hi2c) != HAL_OK) |
mbed_official | 124:6a4a5b7d7324 | 4096 | { |
mbed_official | 124:6a4a5b7d7324 | 4097 | return HAL_ERROR; |
mbed_official | 124:6a4a5b7d7324 | 4098 | } |
mbed_official | 124:6a4a5b7d7324 | 4099 | |
mbed_official | 124:6a4a5b7d7324 | 4100 | /* Check for the Timeout */ |
mbed_official | 124:6a4a5b7d7324 | 4101 | if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout)) |
mbed_official | 124:6a4a5b7d7324 | 4102 | { |
mbed_official | 124:6a4a5b7d7324 | 4103 | hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; |
mbed_official | 124:6a4a5b7d7324 | 4104 | hi2c->State= HAL_I2C_STATE_READY; |
mbed_official | 124:6a4a5b7d7324 | 4105 | |
mbed_official | 124:6a4a5b7d7324 | 4106 | /* Process Unlocked */ |
mbed_official | 124:6a4a5b7d7324 | 4107 | __HAL_UNLOCK(hi2c); |
mbed_official | 124:6a4a5b7d7324 | 4108 | |
mbed_official | 124:6a4a5b7d7324 | 4109 | return HAL_TIMEOUT; |
mbed_official | 124:6a4a5b7d7324 | 4110 | } |
mbed_official | 124:6a4a5b7d7324 | 4111 | } |
mbed_official | 124:6a4a5b7d7324 | 4112 | return HAL_OK; |
mbed_official | 124:6a4a5b7d7324 | 4113 | } |
mbed_official | 124:6a4a5b7d7324 | 4114 | |
mbed_official | 124:6a4a5b7d7324 | 4115 | /** |
mbed_official | 124:6a4a5b7d7324 | 4116 | * @brief This function handles I2C Communication Timeout for specific usage of RXNE flag. |
mbed_official | 124:6a4a5b7d7324 | 4117 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 124:6a4a5b7d7324 | 4118 | * the configuration information for the specified I2C. |
mbed_official | 124:6a4a5b7d7324 | 4119 | * @param Timeout Timeout duration |
mbed_official | 124:6a4a5b7d7324 | 4120 | * @retval HAL status |
mbed_official | 124:6a4a5b7d7324 | 4121 | */ |
mbed_official | 124:6a4a5b7d7324 | 4122 | static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout) |
mbed_official | 124:6a4a5b7d7324 | 4123 | { |
mbed_official | 124:6a4a5b7d7324 | 4124 | uint32_t tickstart = 0x00; |
mbed_official | 124:6a4a5b7d7324 | 4125 | tickstart = HAL_GetTick(); |
mbed_official | 124:6a4a5b7d7324 | 4126 | |
mbed_official | 124:6a4a5b7d7324 | 4127 | while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET) |
mbed_official | 124:6a4a5b7d7324 | 4128 | { |
mbed_official | 124:6a4a5b7d7324 | 4129 | /* Check if a STOPF is detected */ |
mbed_official | 124:6a4a5b7d7324 | 4130 | if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET) |
mbed_official | 124:6a4a5b7d7324 | 4131 | { |
mbed_official | 124:6a4a5b7d7324 | 4132 | /* Clear STOP Flag */ |
mbed_official | 124:6a4a5b7d7324 | 4133 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); |
mbed_official | 124:6a4a5b7d7324 | 4134 | |
mbed_official | 124:6a4a5b7d7324 | 4135 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
mbed_official | 124:6a4a5b7d7324 | 4136 | hi2c->State= HAL_I2C_STATE_READY; |
mbed_official | 124:6a4a5b7d7324 | 4137 | |
mbed_official | 124:6a4a5b7d7324 | 4138 | /* Process Unlocked */ |
mbed_official | 124:6a4a5b7d7324 | 4139 | __HAL_UNLOCK(hi2c); |
mbed_official | 124:6a4a5b7d7324 | 4140 | |
mbed_official | 124:6a4a5b7d7324 | 4141 | return HAL_ERROR; |
mbed_official | 124:6a4a5b7d7324 | 4142 | } |
mbed_official | 124:6a4a5b7d7324 | 4143 | |
mbed_official | 124:6a4a5b7d7324 | 4144 | /* Check for the Timeout */ |
mbed_official | 124:6a4a5b7d7324 | 4145 | if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout)) |
mbed_official | 124:6a4a5b7d7324 | 4146 | { |
mbed_official | 124:6a4a5b7d7324 | 4147 | hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; |
mbed_official | 124:6a4a5b7d7324 | 4148 | hi2c->State= HAL_I2C_STATE_READY; |
mbed_official | 124:6a4a5b7d7324 | 4149 | |
mbed_official | 124:6a4a5b7d7324 | 4150 | /* Process Unlocked */ |
mbed_official | 124:6a4a5b7d7324 | 4151 | __HAL_UNLOCK(hi2c); |
mbed_official | 124:6a4a5b7d7324 | 4152 | |
mbed_official | 124:6a4a5b7d7324 | 4153 | return HAL_TIMEOUT; |
mbed_official | 124:6a4a5b7d7324 | 4154 | } |
mbed_official | 124:6a4a5b7d7324 | 4155 | } |
mbed_official | 124:6a4a5b7d7324 | 4156 | return HAL_OK; |
mbed_official | 124:6a4a5b7d7324 | 4157 | } |
mbed_official | 124:6a4a5b7d7324 | 4158 | |
mbed_official | 124:6a4a5b7d7324 | 4159 | /** |
mbed_official | 124:6a4a5b7d7324 | 4160 | * @brief This function handles Acknowledge failed detection during an I2C Communication. |
mbed_official | 124:6a4a5b7d7324 | 4161 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
mbed_official | 124:6a4a5b7d7324 | 4162 | * the configuration information for the specified I2C. |
mbed_official | 124:6a4a5b7d7324 | 4163 | * @retval HAL status |
mbed_official | 124:6a4a5b7d7324 | 4164 | */ |
mbed_official | 124:6a4a5b7d7324 | 4165 | static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c) |
mbed_official | 124:6a4a5b7d7324 | 4166 | { |
mbed_official | 124:6a4a5b7d7324 | 4167 | if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET) |
mbed_official | 124:6a4a5b7d7324 | 4168 | { |
mbed_official | 124:6a4a5b7d7324 | 4169 | /* Clear NACKF Flag */ |
mbed_official | 124:6a4a5b7d7324 | 4170 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); |
mbed_official | 124:6a4a5b7d7324 | 4171 | |
mbed_official | 124:6a4a5b7d7324 | 4172 | hi2c->ErrorCode = HAL_I2C_ERROR_AF; |
mbed_official | 124:6a4a5b7d7324 | 4173 | hi2c->State= HAL_I2C_STATE_READY; |
mbed_official | 124:6a4a5b7d7324 | 4174 | |
mbed_official | 124:6a4a5b7d7324 | 4175 | /* Process Unlocked */ |
mbed_official | 124:6a4a5b7d7324 | 4176 | __HAL_UNLOCK(hi2c); |
mbed_official | 124:6a4a5b7d7324 | 4177 | |
mbed_official | 124:6a4a5b7d7324 | 4178 | return HAL_ERROR; |
mbed_official | 124:6a4a5b7d7324 | 4179 | } |
mbed_official | 124:6a4a5b7d7324 | 4180 | return HAL_OK; |
mbed_official | 124:6a4a5b7d7324 | 4181 | } |
mbed_official | 124:6a4a5b7d7324 | 4182 | /** |
bogdanm | 0:9b334a45a8ff | 4183 | * @} |
bogdanm | 0:9b334a45a8ff | 4184 | */ |
bogdanm | 0:9b334a45a8ff | 4185 | |
bogdanm | 0:9b334a45a8ff | 4186 | #endif /* HAL_I2C_MODULE_ENABLED */ |
bogdanm | 0:9b334a45a8ff | 4187 | |
bogdanm | 0:9b334a45a8ff | 4188 | /** |
bogdanm | 0:9b334a45a8ff | 4189 | * @} |
bogdanm | 0:9b334a45a8ff | 4190 | */ |
bogdanm | 0:9b334a45a8ff | 4191 | |
bogdanm | 0:9b334a45a8ff | 4192 | /** |
bogdanm | 0:9b334a45a8ff | 4193 | * @} |
bogdanm | 0:9b334a45a8ff | 4194 | */ |
bogdanm | 0:9b334a45a8ff | 4195 | |
bogdanm | 0:9b334a45a8ff | 4196 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |