fix LPC812 PWM
Fork of mbed-dev by
targets/cmsis/TARGET_STM/TARGET_STM32F1/stm32f1xx_hal.h@129:2e517c56bcfb, 2016-05-16 (annotated)
- Committer:
- nameless129
- Date:
- Mon May 16 16:50:30 2016 +0000
- Revision:
- 129:2e517c56bcfb
- Parent:
- 124:6a4a5b7d7324
PWM Fix:Duty 0%??H???????????????
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
bogdanm | 0:9b334a45a8ff | 1 | /** |
bogdanm | 0:9b334a45a8ff | 2 | ****************************************************************************** |
bogdanm | 0:9b334a45a8ff | 3 | * @file stm32f1xx_hal.h |
bogdanm | 0:9b334a45a8ff | 4 | * @author MCD Application Team |
mbed_official | 124:6a4a5b7d7324 | 5 | * @version V1.0.4 |
mbed_official | 124:6a4a5b7d7324 | 6 | * @date 29-April-2016 |
bogdanm | 0:9b334a45a8ff | 7 | * @brief This file contains all the functions prototypes for the HAL |
bogdanm | 0:9b334a45a8ff | 8 | * module driver. |
bogdanm | 0:9b334a45a8ff | 9 | ****************************************************************************** |
bogdanm | 0:9b334a45a8ff | 10 | * @attention |
bogdanm | 0:9b334a45a8ff | 11 | * |
mbed_official | 124:6a4a5b7d7324 | 12 | * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
bogdanm | 0:9b334a45a8ff | 13 | * |
bogdanm | 0:9b334a45a8ff | 14 | * Redistribution and use in source and binary forms, with or without modification, |
bogdanm | 0:9b334a45a8ff | 15 | * are permitted provided that the following conditions are met: |
bogdanm | 0:9b334a45a8ff | 16 | * 1. Redistributions of source code must retain the above copyright notice, |
bogdanm | 0:9b334a45a8ff | 17 | * this list of conditions and the following disclaimer. |
bogdanm | 0:9b334a45a8ff | 18 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
bogdanm | 0:9b334a45a8ff | 19 | * this list of conditions and the following disclaimer in the documentation |
bogdanm | 0:9b334a45a8ff | 20 | * and/or other materials provided with the distribution. |
bogdanm | 0:9b334a45a8ff | 21 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
bogdanm | 0:9b334a45a8ff | 22 | * may be used to endorse or promote products derived from this software |
bogdanm | 0:9b334a45a8ff | 23 | * without specific prior written permission. |
bogdanm | 0:9b334a45a8ff | 24 | * |
bogdanm | 0:9b334a45a8ff | 25 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
bogdanm | 0:9b334a45a8ff | 26 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
bogdanm | 0:9b334a45a8ff | 27 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
bogdanm | 0:9b334a45a8ff | 28 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
bogdanm | 0:9b334a45a8ff | 29 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
bogdanm | 0:9b334a45a8ff | 30 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
bogdanm | 0:9b334a45a8ff | 31 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
bogdanm | 0:9b334a45a8ff | 32 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
bogdanm | 0:9b334a45a8ff | 33 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
bogdanm | 0:9b334a45a8ff | 34 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
bogdanm | 0:9b334a45a8ff | 35 | * |
bogdanm | 0:9b334a45a8ff | 36 | ****************************************************************************** |
bogdanm | 0:9b334a45a8ff | 37 | */ |
bogdanm | 0:9b334a45a8ff | 38 | |
bogdanm | 0:9b334a45a8ff | 39 | /* Define to prevent recursive inclusion -------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 40 | #ifndef __STM32F1xx_HAL_H |
bogdanm | 0:9b334a45a8ff | 41 | #define __STM32F1xx_HAL_H |
bogdanm | 0:9b334a45a8ff | 42 | |
bogdanm | 0:9b334a45a8ff | 43 | #ifdef __cplusplus |
bogdanm | 0:9b334a45a8ff | 44 | extern "C" { |
bogdanm | 0:9b334a45a8ff | 45 | #endif |
bogdanm | 0:9b334a45a8ff | 46 | |
bogdanm | 0:9b334a45a8ff | 47 | /* Includes ------------------------------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 48 | #include "stm32f1xx_hal_conf.h" |
bogdanm | 0:9b334a45a8ff | 49 | |
bogdanm | 0:9b334a45a8ff | 50 | /** @addtogroup STM32F1xx_HAL_Driver |
bogdanm | 0:9b334a45a8ff | 51 | * @{ |
bogdanm | 0:9b334a45a8ff | 52 | */ |
bogdanm | 0:9b334a45a8ff | 53 | |
bogdanm | 0:9b334a45a8ff | 54 | /** @addtogroup HAL |
bogdanm | 0:9b334a45a8ff | 55 | * @{ |
bogdanm | 0:9b334a45a8ff | 56 | */ |
bogdanm | 0:9b334a45a8ff | 57 | |
bogdanm | 0:9b334a45a8ff | 58 | /* Exported types ------------------------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 59 | /* Exported constants --------------------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 60 | |
bogdanm | 0:9b334a45a8ff | 61 | /* Exported macro ------------------------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 62 | |
bogdanm | 0:9b334a45a8ff | 63 | /** @defgroup HAL_Exported_Macros HAL Exported Macros |
bogdanm | 0:9b334a45a8ff | 64 | * @{ |
bogdanm | 0:9b334a45a8ff | 65 | */ |
bogdanm | 0:9b334a45a8ff | 66 | |
bogdanm | 0:9b334a45a8ff | 67 | /** @defgroup DBGMCU_Freeze_Unfreeze Freeze Unfreeze Peripherals in Debug mode |
bogdanm | 0:9b334a45a8ff | 68 | * @brief Freeze/Unfreeze Peripherals in Debug mode |
bogdanm | 0:9b334a45a8ff | 69 | * Note: On devices STM32F10xx8 and STM32F10xxB, |
bogdanm | 0:9b334a45a8ff | 70 | * STM32F101xC/D/E and STM32F103xC/D/E, |
bogdanm | 0:9b334a45a8ff | 71 | * STM32F101xF/G and STM32F103xF/G |
bogdanm | 0:9b334a45a8ff | 72 | * STM32F10xx4 and STM32F10xx6 |
bogdanm | 0:9b334a45a8ff | 73 | * Debug registers DBGMCU_IDCODE and DBGMCU_CR are accessible only in |
bogdanm | 0:9b334a45a8ff | 74 | * debug mode (not accessible by the user software in normal mode). |
bogdanm | 0:9b334a45a8ff | 75 | * Refer to errata sheet of these devices for more details. |
bogdanm | 0:9b334a45a8ff | 76 | * @{ |
bogdanm | 0:9b334a45a8ff | 77 | */ |
bogdanm | 0:9b334a45a8ff | 78 | |
bogdanm | 0:9b334a45a8ff | 79 | /* Peripherals on APB1 */ |
bogdanm | 0:9b334a45a8ff | 80 | /** |
bogdanm | 0:9b334a45a8ff | 81 | * @brief TIM2 Peripherals Debug mode |
bogdanm | 0:9b334a45a8ff | 82 | */ |
bogdanm | 0:9b334a45a8ff | 83 | #define __HAL_DBGMCU_FREEZE_TIM2() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM2_STOP) |
bogdanm | 0:9b334a45a8ff | 84 | #define __HAL_DBGMCU_UNFREEZE_TIM2() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM2_STOP) |
bogdanm | 0:9b334a45a8ff | 85 | |
bogdanm | 0:9b334a45a8ff | 86 | /** |
bogdanm | 0:9b334a45a8ff | 87 | * @brief TIM3 Peripherals Debug mode |
bogdanm | 0:9b334a45a8ff | 88 | */ |
bogdanm | 0:9b334a45a8ff | 89 | #define __HAL_DBGMCU_FREEZE_TIM3() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM3_STOP) |
bogdanm | 0:9b334a45a8ff | 90 | #define __HAL_DBGMCU_UNFREEZE_TIM3() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM3_STOP) |
bogdanm | 0:9b334a45a8ff | 91 | |
bogdanm | 0:9b334a45a8ff | 92 | #if defined (DBGMCU_CR_DBG_TIM4_STOP) |
bogdanm | 0:9b334a45a8ff | 93 | /** |
bogdanm | 0:9b334a45a8ff | 94 | * @brief TIM4 Peripherals Debug mode |
bogdanm | 0:9b334a45a8ff | 95 | */ |
bogdanm | 0:9b334a45a8ff | 96 | #define __HAL_DBGMCU_FREEZE_TIM4() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM4_STOP) |
bogdanm | 0:9b334a45a8ff | 97 | #define __HAL_DBGMCU_UNFREEZE_TIM4() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM4_STOP) |
bogdanm | 0:9b334a45a8ff | 98 | #endif |
bogdanm | 0:9b334a45a8ff | 99 | |
bogdanm | 0:9b334a45a8ff | 100 | #if defined (DBGMCU_CR_DBG_TIM5_STOP) |
bogdanm | 0:9b334a45a8ff | 101 | /** |
bogdanm | 0:9b334a45a8ff | 102 | * @brief TIM5 Peripherals Debug mode |
bogdanm | 0:9b334a45a8ff | 103 | */ |
bogdanm | 0:9b334a45a8ff | 104 | #define __HAL_DBGMCU_FREEZE_TIM5() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM5_STOP) |
bogdanm | 0:9b334a45a8ff | 105 | #define __HAL_DBGMCU_UNFREEZE_TIM5() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM5_STOP) |
bogdanm | 0:9b334a45a8ff | 106 | #endif |
bogdanm | 0:9b334a45a8ff | 107 | |
bogdanm | 0:9b334a45a8ff | 108 | #if defined (DBGMCU_CR_DBG_TIM6_STOP) |
bogdanm | 0:9b334a45a8ff | 109 | /** |
bogdanm | 0:9b334a45a8ff | 110 | * @brief TIM6 Peripherals Debug mode |
bogdanm | 0:9b334a45a8ff | 111 | */ |
bogdanm | 0:9b334a45a8ff | 112 | #define __HAL_DBGMCU_FREEZE_TIM6() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM6_STOP) |
bogdanm | 0:9b334a45a8ff | 113 | #define __HAL_DBGMCU_UNFREEZE_TIM6() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM6_STOP) |
bogdanm | 0:9b334a45a8ff | 114 | #endif |
bogdanm | 0:9b334a45a8ff | 115 | |
bogdanm | 0:9b334a45a8ff | 116 | #if defined (DBGMCU_CR_DBG_TIM7_STOP) |
bogdanm | 0:9b334a45a8ff | 117 | /** |
bogdanm | 0:9b334a45a8ff | 118 | * @brief TIM7 Peripherals Debug mode |
bogdanm | 0:9b334a45a8ff | 119 | */ |
bogdanm | 0:9b334a45a8ff | 120 | #define __HAL_DBGMCU_FREEZE_TIM7() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM7_STOP) |
bogdanm | 0:9b334a45a8ff | 121 | #define __HAL_DBGMCU_UNFREEZE_TIM7() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM7_STOP) |
bogdanm | 0:9b334a45a8ff | 122 | #endif |
bogdanm | 0:9b334a45a8ff | 123 | |
bogdanm | 0:9b334a45a8ff | 124 | #if defined (DBGMCU_CR_DBG_TIM12_STOP) |
bogdanm | 0:9b334a45a8ff | 125 | /** |
bogdanm | 0:9b334a45a8ff | 126 | * @brief TIM12 Peripherals Debug mode |
bogdanm | 0:9b334a45a8ff | 127 | */ |
bogdanm | 0:9b334a45a8ff | 128 | #define __HAL_DBGMCU_FREEZE_TIM12() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM12_STOP) |
bogdanm | 0:9b334a45a8ff | 129 | #define __HAL_DBGMCU_UNFREEZE_TIM12() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM12_STOP) |
bogdanm | 0:9b334a45a8ff | 130 | #endif |
bogdanm | 0:9b334a45a8ff | 131 | |
bogdanm | 0:9b334a45a8ff | 132 | #if defined (DBGMCU_CR_DBG_TIM13_STOP) |
bogdanm | 0:9b334a45a8ff | 133 | /** |
bogdanm | 0:9b334a45a8ff | 134 | * @brief TIM13 Peripherals Debug mode |
bogdanm | 0:9b334a45a8ff | 135 | */ |
bogdanm | 0:9b334a45a8ff | 136 | #define __HAL_DBGMCU_FREEZE_TIM13() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM13_STOP) |
bogdanm | 0:9b334a45a8ff | 137 | #define __HAL_DBGMCU_UNFREEZE_TIM13() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM13_STOP) |
bogdanm | 0:9b334a45a8ff | 138 | #endif |
bogdanm | 0:9b334a45a8ff | 139 | |
bogdanm | 0:9b334a45a8ff | 140 | #if defined (DBGMCU_CR_DBG_TIM14_STOP) |
bogdanm | 0:9b334a45a8ff | 141 | /** |
bogdanm | 0:9b334a45a8ff | 142 | * @brief TIM14 Peripherals Debug mode |
bogdanm | 0:9b334a45a8ff | 143 | */ |
bogdanm | 0:9b334a45a8ff | 144 | #define __HAL_DBGMCU_FREEZE_TIM14() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM14_STOP) |
bogdanm | 0:9b334a45a8ff | 145 | #define __HAL_DBGMCU_UNFREEZE_TIM14() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM14_STOP) |
bogdanm | 0:9b334a45a8ff | 146 | #endif |
bogdanm | 0:9b334a45a8ff | 147 | |
bogdanm | 0:9b334a45a8ff | 148 | /** |
bogdanm | 0:9b334a45a8ff | 149 | * @brief WWDG Peripherals Debug mode |
bogdanm | 0:9b334a45a8ff | 150 | */ |
bogdanm | 0:9b334a45a8ff | 151 | #define __HAL_DBGMCU_FREEZE_WWDG() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_WWDG_STOP) |
bogdanm | 0:9b334a45a8ff | 152 | #define __HAL_DBGMCU_UNFREEZE_WWDG() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_WWDG_STOP) |
bogdanm | 0:9b334a45a8ff | 153 | |
bogdanm | 0:9b334a45a8ff | 154 | /** |
bogdanm | 0:9b334a45a8ff | 155 | * @brief IWDG Peripherals Debug mode |
bogdanm | 0:9b334a45a8ff | 156 | */ |
bogdanm | 0:9b334a45a8ff | 157 | #define __HAL_DBGMCU_FREEZE_IWDG() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_IWDG_STOP) |
bogdanm | 0:9b334a45a8ff | 158 | #define __HAL_DBGMCU_UNFREEZE_IWDG() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_IWDG_STOP) |
bogdanm | 0:9b334a45a8ff | 159 | |
bogdanm | 0:9b334a45a8ff | 160 | /** |
bogdanm | 0:9b334a45a8ff | 161 | * @brief I2C1 Peripherals Debug mode |
bogdanm | 0:9b334a45a8ff | 162 | */ |
bogdanm | 0:9b334a45a8ff | 163 | #define __HAL_DBGMCU_FREEZE_I2C1_TIMEOUT() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_I2C1_SMBUS_TIMEOUT) |
bogdanm | 0:9b334a45a8ff | 164 | #define __HAL_DBGMCU_UNFREEZE_I2C1_TIMEOUT() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_I2C1_SMBUS_TIMEOUT) |
bogdanm | 0:9b334a45a8ff | 165 | |
bogdanm | 0:9b334a45a8ff | 166 | #if defined (DBGMCU_CR_DBG_I2C2_SMBUS_TIMEOUT) |
bogdanm | 0:9b334a45a8ff | 167 | /** |
bogdanm | 0:9b334a45a8ff | 168 | * @brief I2C2 Peripherals Debug mode |
bogdanm | 0:9b334a45a8ff | 169 | */ |
bogdanm | 0:9b334a45a8ff | 170 | #define __HAL_DBGMCU_FREEZE_I2C2_TIMEOUT() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_I2C2_SMBUS_TIMEOUT) |
bogdanm | 0:9b334a45a8ff | 171 | #define __HAL_DBGMCU_UNFREEZE_I2C2_TIMEOUT() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_I2C2_SMBUS_TIMEOUT) |
bogdanm | 0:9b334a45a8ff | 172 | #endif |
bogdanm | 0:9b334a45a8ff | 173 | |
bogdanm | 0:9b334a45a8ff | 174 | #if defined (DBGMCU_CR_DBG_CAN1_STOP) |
bogdanm | 0:9b334a45a8ff | 175 | /** |
bogdanm | 0:9b334a45a8ff | 176 | * @brief CAN1 Peripherals Debug mode |
bogdanm | 0:9b334a45a8ff | 177 | */ |
bogdanm | 0:9b334a45a8ff | 178 | #define __HAL_DBGMCU_FREEZE_CAN1() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_CAN1_STOP) |
bogdanm | 0:9b334a45a8ff | 179 | #define __HAL_DBGMCU_UNFREEZE_CAN1() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_CAN1_STOP) |
bogdanm | 0:9b334a45a8ff | 180 | #endif |
bogdanm | 0:9b334a45a8ff | 181 | |
bogdanm | 0:9b334a45a8ff | 182 | #if defined (DBGMCU_CR_DBG_CAN2_STOP) |
bogdanm | 0:9b334a45a8ff | 183 | /** |
bogdanm | 0:9b334a45a8ff | 184 | * @brief CAN2 Peripherals Debug mode |
bogdanm | 0:9b334a45a8ff | 185 | */ |
bogdanm | 0:9b334a45a8ff | 186 | #define __HAL_DBGMCU_FREEZE_CAN2() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_CAN2_STOP) |
bogdanm | 0:9b334a45a8ff | 187 | #define __HAL_DBGMCU_UNFREEZE_CAN2() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_CAN2_STOP) |
bogdanm | 0:9b334a45a8ff | 188 | #endif |
bogdanm | 0:9b334a45a8ff | 189 | |
bogdanm | 0:9b334a45a8ff | 190 | /* Peripherals on APB2 */ |
bogdanm | 0:9b334a45a8ff | 191 | #if defined (DBGMCU_CR_DBG_TIM1_STOP) |
bogdanm | 0:9b334a45a8ff | 192 | /** |
bogdanm | 0:9b334a45a8ff | 193 | * @brief TIM1 Peripherals Debug mode |
bogdanm | 0:9b334a45a8ff | 194 | */ |
bogdanm | 0:9b334a45a8ff | 195 | #define __HAL_DBGMCU_FREEZE_TIM1() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM1_STOP) |
bogdanm | 0:9b334a45a8ff | 196 | #define __HAL_DBGMCU_UNFREEZE_TIM1() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM1_STOP) |
bogdanm | 0:9b334a45a8ff | 197 | #endif |
bogdanm | 0:9b334a45a8ff | 198 | |
bogdanm | 0:9b334a45a8ff | 199 | #if defined (DBGMCU_CR_DBG_TIM8_STOP) |
bogdanm | 0:9b334a45a8ff | 200 | /** |
bogdanm | 0:9b334a45a8ff | 201 | * @brief TIM8 Peripherals Debug mode |
bogdanm | 0:9b334a45a8ff | 202 | */ |
bogdanm | 0:9b334a45a8ff | 203 | #define __HAL_DBGMCU_FREEZE_TIM8() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM8_STOP) |
bogdanm | 0:9b334a45a8ff | 204 | #define __HAL_DBGMCU_UNFREEZE_TIM8() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM8_STOP) |
bogdanm | 0:9b334a45a8ff | 205 | #endif |
bogdanm | 0:9b334a45a8ff | 206 | |
bogdanm | 0:9b334a45a8ff | 207 | #if defined (DBGMCU_CR_DBG_TIM9_STOP) |
bogdanm | 0:9b334a45a8ff | 208 | /** |
bogdanm | 0:9b334a45a8ff | 209 | * @brief TIM9 Peripherals Debug mode |
bogdanm | 0:9b334a45a8ff | 210 | */ |
bogdanm | 0:9b334a45a8ff | 211 | #define __HAL_DBGMCU_FREEZE_TIM9() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM9_STOP) |
bogdanm | 0:9b334a45a8ff | 212 | #define __HAL_DBGMCU_UNFREEZE_TIM9() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM9_STOP) |
bogdanm | 0:9b334a45a8ff | 213 | #endif |
bogdanm | 0:9b334a45a8ff | 214 | |
bogdanm | 0:9b334a45a8ff | 215 | #if defined (DBGMCU_CR_DBG_TIM10_STOP) |
bogdanm | 0:9b334a45a8ff | 216 | /** |
bogdanm | 0:9b334a45a8ff | 217 | * @brief TIM10 Peripherals Debug mode |
bogdanm | 0:9b334a45a8ff | 218 | */ |
bogdanm | 0:9b334a45a8ff | 219 | #define __HAL_DBGMCU_FREEZE_TIM10() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM10_STOP) |
bogdanm | 0:9b334a45a8ff | 220 | #define __HAL_DBGMCU_UNFREEZE_TIM10() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM10_STOP) |
bogdanm | 0:9b334a45a8ff | 221 | #endif |
bogdanm | 0:9b334a45a8ff | 222 | |
bogdanm | 0:9b334a45a8ff | 223 | #if defined (DBGMCU_CR_DBG_TIM11_STOP) |
bogdanm | 0:9b334a45a8ff | 224 | /** |
bogdanm | 0:9b334a45a8ff | 225 | * @brief TIM11 Peripherals Debug mode |
bogdanm | 0:9b334a45a8ff | 226 | */ |
bogdanm | 0:9b334a45a8ff | 227 | #define __HAL_DBGMCU_FREEZE_TIM11() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM11_STOP) |
bogdanm | 0:9b334a45a8ff | 228 | #define __HAL_DBGMCU_UNFREEZE_TIM11() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM11_STOP) |
bogdanm | 0:9b334a45a8ff | 229 | #endif |
bogdanm | 0:9b334a45a8ff | 230 | |
bogdanm | 0:9b334a45a8ff | 231 | |
bogdanm | 0:9b334a45a8ff | 232 | #if defined (DBGMCU_CR_DBG_TIM15_STOP) |
bogdanm | 0:9b334a45a8ff | 233 | /** |
bogdanm | 0:9b334a45a8ff | 234 | * @brief TIM15 Peripherals Debug mode |
bogdanm | 0:9b334a45a8ff | 235 | */ |
bogdanm | 0:9b334a45a8ff | 236 | #define __HAL_DBGMCU_FREEZE_TIM15() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM15_STOP) |
bogdanm | 0:9b334a45a8ff | 237 | #define __HAL_DBGMCU_UNFREEZE_TIM15() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM15_STOP) |
bogdanm | 0:9b334a45a8ff | 238 | #endif |
bogdanm | 0:9b334a45a8ff | 239 | |
bogdanm | 0:9b334a45a8ff | 240 | #if defined (DBGMCU_CR_DBG_TIM16_STOP) |
bogdanm | 0:9b334a45a8ff | 241 | /** |
bogdanm | 0:9b334a45a8ff | 242 | * @brief TIM16 Peripherals Debug mode |
bogdanm | 0:9b334a45a8ff | 243 | */ |
bogdanm | 0:9b334a45a8ff | 244 | #define __HAL_DBGMCU_FREEZE_TIM16() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM16_STOP) |
bogdanm | 0:9b334a45a8ff | 245 | #define __HAL_DBGMCU_UNFREEZE_TIM16() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM16_STOP) |
bogdanm | 0:9b334a45a8ff | 246 | #endif |
bogdanm | 0:9b334a45a8ff | 247 | |
bogdanm | 0:9b334a45a8ff | 248 | #if defined (DBGMCU_CR_DBG_TIM17_STOP) |
bogdanm | 0:9b334a45a8ff | 249 | /** |
bogdanm | 0:9b334a45a8ff | 250 | * @brief TIM17 Peripherals Debug mode |
bogdanm | 0:9b334a45a8ff | 251 | */ |
bogdanm | 0:9b334a45a8ff | 252 | #define __HAL_DBGMCU_FREEZE_TIM17() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM17_STOP) |
bogdanm | 0:9b334a45a8ff | 253 | #define __HAL_DBGMCU_UNFREEZE_TIM17() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM17_STOP) |
bogdanm | 0:9b334a45a8ff | 254 | #endif |
bogdanm | 0:9b334a45a8ff | 255 | |
bogdanm | 0:9b334a45a8ff | 256 | /** |
bogdanm | 0:9b334a45a8ff | 257 | * @} |
bogdanm | 0:9b334a45a8ff | 258 | */ |
bogdanm | 0:9b334a45a8ff | 259 | |
bogdanm | 0:9b334a45a8ff | 260 | /** |
bogdanm | 0:9b334a45a8ff | 261 | * @} |
bogdanm | 0:9b334a45a8ff | 262 | */ |
bogdanm | 0:9b334a45a8ff | 263 | |
bogdanm | 0:9b334a45a8ff | 264 | /* Exported functions --------------------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 265 | |
bogdanm | 0:9b334a45a8ff | 266 | /** @addtogroup HAL_Exported_Functions |
bogdanm | 0:9b334a45a8ff | 267 | * @{ |
bogdanm | 0:9b334a45a8ff | 268 | */ |
bogdanm | 0:9b334a45a8ff | 269 | |
bogdanm | 0:9b334a45a8ff | 270 | /** @addtogroup HAL_Exported_Functions_Group1 |
bogdanm | 0:9b334a45a8ff | 271 | * @{ |
bogdanm | 0:9b334a45a8ff | 272 | */ |
bogdanm | 0:9b334a45a8ff | 273 | |
bogdanm | 0:9b334a45a8ff | 274 | /* Initialization and de-initialization functions ******************************/ |
bogdanm | 0:9b334a45a8ff | 275 | HAL_StatusTypeDef HAL_Init(void); |
bogdanm | 0:9b334a45a8ff | 276 | HAL_StatusTypeDef HAL_DeInit(void); |
bogdanm | 0:9b334a45a8ff | 277 | void HAL_MspInit(void); |
bogdanm | 0:9b334a45a8ff | 278 | void HAL_MspDeInit(void); |
bogdanm | 0:9b334a45a8ff | 279 | HAL_StatusTypeDef HAL_InitTick (uint32_t TickPriority); |
bogdanm | 0:9b334a45a8ff | 280 | |
bogdanm | 0:9b334a45a8ff | 281 | /** |
bogdanm | 0:9b334a45a8ff | 282 | * @} |
bogdanm | 0:9b334a45a8ff | 283 | */ |
bogdanm | 0:9b334a45a8ff | 284 | |
bogdanm | 0:9b334a45a8ff | 285 | /** @addtogroup HAL_Exported_Functions_Group2 |
bogdanm | 0:9b334a45a8ff | 286 | * @{ |
bogdanm | 0:9b334a45a8ff | 287 | */ |
bogdanm | 0:9b334a45a8ff | 288 | |
bogdanm | 0:9b334a45a8ff | 289 | /* Peripheral Control functions ************************************************/ |
bogdanm | 0:9b334a45a8ff | 290 | void HAL_IncTick(void); |
bogdanm | 0:9b334a45a8ff | 291 | void HAL_Delay(__IO uint32_t Delay); |
bogdanm | 0:9b334a45a8ff | 292 | uint32_t HAL_GetTick(void); |
bogdanm | 0:9b334a45a8ff | 293 | void HAL_SuspendTick(void); |
bogdanm | 0:9b334a45a8ff | 294 | void HAL_ResumeTick(void); |
bogdanm | 0:9b334a45a8ff | 295 | uint32_t HAL_GetHalVersion(void); |
bogdanm | 0:9b334a45a8ff | 296 | uint32_t HAL_GetREVID(void); |
bogdanm | 0:9b334a45a8ff | 297 | uint32_t HAL_GetDEVID(void); |
bogdanm | 0:9b334a45a8ff | 298 | void HAL_DBGMCU_EnableDBGSleepMode(void); |
bogdanm | 0:9b334a45a8ff | 299 | void HAL_DBGMCU_DisableDBGSleepMode(void); |
bogdanm | 0:9b334a45a8ff | 300 | void HAL_DBGMCU_EnableDBGStopMode(void); |
bogdanm | 0:9b334a45a8ff | 301 | void HAL_DBGMCU_DisableDBGStopMode(void); |
bogdanm | 0:9b334a45a8ff | 302 | void HAL_DBGMCU_EnableDBGStandbyMode(void); |
bogdanm | 0:9b334a45a8ff | 303 | void HAL_DBGMCU_DisableDBGStandbyMode(void); |
bogdanm | 0:9b334a45a8ff | 304 | |
bogdanm | 0:9b334a45a8ff | 305 | /** |
bogdanm | 0:9b334a45a8ff | 306 | * @} |
bogdanm | 0:9b334a45a8ff | 307 | */ |
bogdanm | 0:9b334a45a8ff | 308 | |
bogdanm | 0:9b334a45a8ff | 309 | /** |
bogdanm | 0:9b334a45a8ff | 310 | * @} |
bogdanm | 0:9b334a45a8ff | 311 | */ |
bogdanm | 0:9b334a45a8ff | 312 | |
bogdanm | 0:9b334a45a8ff | 313 | |
bogdanm | 0:9b334a45a8ff | 314 | /** |
bogdanm | 0:9b334a45a8ff | 315 | * @} |
bogdanm | 0:9b334a45a8ff | 316 | */ |
bogdanm | 0:9b334a45a8ff | 317 | |
bogdanm | 0:9b334a45a8ff | 318 | /** |
bogdanm | 0:9b334a45a8ff | 319 | * @} |
bogdanm | 0:9b334a45a8ff | 320 | */ |
bogdanm | 0:9b334a45a8ff | 321 | |
bogdanm | 0:9b334a45a8ff | 322 | #ifdef __cplusplus |
bogdanm | 0:9b334a45a8ff | 323 | } |
bogdanm | 0:9b334a45a8ff | 324 | #endif |
bogdanm | 0:9b334a45a8ff | 325 | |
bogdanm | 0:9b334a45a8ff | 326 | #endif /* __STM32F1xx_HAL_H */ |
bogdanm | 0:9b334a45a8ff | 327 | |
bogdanm | 0:9b334a45a8ff | 328 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |