fix LPC812 PWM
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targets/cmsis/TARGET_STM/TARGET_STM32F7/TARGET_NUCLEO_F746ZG/TOOLCHAIN_IAR/stm32f746zg.icf
- Committer:
- nameless129
- Date:
- 2016-05-16
- Revision:
- 129:2e517c56bcfb
- Parent:
- 74:9322579e4309
File content as of revision 129:2e517c56bcfb:
/* [ROM = 1024kb = 0x100000] */ define symbol __intvec_start__ = 0x08000000; define symbol __region_ROM_start__ = 0x08000000; define symbol __region_ROM_end__ = 0x080FFFFF; /* [RAM = 320kb = 0x50000] Vector table dynamic copy: 114 vectors = 456 bytes (0x1C8) to be reserved in RAM */ define symbol __NVIC_start__ = 0x20000000; define symbol __NVIC_end__ = 0x200001C7; /* Aligned on 8 bytes */ define symbol __region_RAM_start__ = 0x200001C8; define symbol __region_RAM_end__ = 0x2004FFFF; define symbol __region_ITCMRAM_start__ = 0x00000000; define symbol __region_ITCMRAM_end__ = 0x00003FFF; /* Memory regions */ define memory mem with size = 4G; define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM_end__]; define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__]; define region ITCMRAM_region = mem:[from __region_ITCMRAM_start__ to __region_ITCMRAM_end__]; /* Stack and Heap */ /*Heap 1/4 of ram and stack 1/8*/ define symbol __size_cstack__ = 0x4000; define symbol __size_heap__ = 0x8000; define block CSTACK with alignment = 8, size = __size_cstack__ { }; define block HEAP with alignment = 8, size = __size_heap__ { }; define block STACKHEAP with fixed order { block HEAP, block CSTACK }; initialize by copy with packing = zeros { readwrite }; do not initialize { section .noinit }; place at address mem:__intvec_start__ { readonly section .intvec }; place in ROM_region { readonly }; place in RAM_region { readwrite, block STACKHEAP };