mbed-dev - fix LPC812 PWM

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fix LPC812 PWM

Dependents: IR_LED_Send

Fork of mbed-dev by mbed official

targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_lcd.h@113:b3775bf36a83, 2016-04-19 (annotated)

Committer:: mbed_official
Date:: Tue Apr 19 11:15:15 2016 +0100
Revision:: 113:b3775bf36a83
Parent:: 0:9b334a45a8ff

Synchronized with git revision 896981126b34b6d9441e3eea77881c67a1ae3dbd

Full URL: https://github.com/mbedmicro/mbed/commit/896981126b34b6d9441e3eea77881c67a1ae3dbd/

Exporter tool addition for e2 studio

Who changed what in which revision?

User	Revision	Line number	New contents of line
bogdanm	0:9b334a45a8ff	1	/**
bogdanm	0:9b334a45a8ff	2	******************************************************************************
bogdanm	0:9b334a45a8ff	3	* @file stm32l0xx_hal_lcd.h
bogdanm	0:9b334a45a8ff	4	* @author MCD Application Team
mbed_official	113:b3775bf36a83	5	* @version V1.5.0
mbed_official	113:b3775bf36a83	6	* @date 8-January-2016
bogdanm	0:9b334a45a8ff	7	* @brief Header file of LCD Controller HAL module.
bogdanm	0:9b334a45a8ff	8	******************************************************************************
bogdanm	0:9b334a45a8ff	9	* @attention
bogdanm	0:9b334a45a8ff	10	*
mbed_official	113:b3775bf36a83	11	* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
bogdanm	0:9b334a45a8ff	12	*
bogdanm	0:9b334a45a8ff	13	* Redistribution and use in source and binary forms, with or without modification,
bogdanm	0:9b334a45a8ff	14	* are permitted provided that the following conditions are met:
bogdanm	0:9b334a45a8ff	15	* 1. Redistributions of source code must retain the above copyright notice,
bogdanm	0:9b334a45a8ff	16	* this list of conditions and the following disclaimer.
bogdanm	0:9b334a45a8ff	17	* 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm	0:9b334a45a8ff	18	* this list of conditions and the following disclaimer in the documentation
bogdanm	0:9b334a45a8ff	19	* and/or other materials provided with the distribution.
bogdanm	0:9b334a45a8ff	20	* 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm	0:9b334a45a8ff	21	* may be used to endorse or promote products derived from this software
bogdanm	0:9b334a45a8ff	22	* without specific prior written permission.
bogdanm	0:9b334a45a8ff	23	*
bogdanm	0:9b334a45a8ff	24	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm	0:9b334a45a8ff	25	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm	0:9b334a45a8ff	26	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm	0:9b334a45a8ff	27	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm	0:9b334a45a8ff	28	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm	0:9b334a45a8ff	29	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm	0:9b334a45a8ff	30	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm	0:9b334a45a8ff	31	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm	0:9b334a45a8ff	32	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm	0:9b334a45a8ff	33	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm	0:9b334a45a8ff	34	*
bogdanm	0:9b334a45a8ff	35	******************************************************************************
bogdanm	0:9b334a45a8ff	36	*/
bogdanm	0:9b334a45a8ff	37
bogdanm	0:9b334a45a8ff	38	#if defined (STM32L053xx) \|\| defined (STM32L063xx) \|\| defined (STM32L073xx) \|\| defined (STM32L083xx)
bogdanm	0:9b334a45a8ff	39
bogdanm	0:9b334a45a8ff	40	/* Define to prevent recursive inclusion -------------------------------------*/
bogdanm	0:9b334a45a8ff	41	#ifndef __STM32L0xx_HAL_LCD_H
bogdanm	0:9b334a45a8ff	42	#define __STM32L0xx_HAL_LCD_H
bogdanm	0:9b334a45a8ff	43
bogdanm	0:9b334a45a8ff	44	#ifdef __cplusplus
bogdanm	0:9b334a45a8ff	45	extern "C" {
bogdanm	0:9b334a45a8ff	46	#endif
bogdanm	0:9b334a45a8ff	47
bogdanm	0:9b334a45a8ff	48
bogdanm	0:9b334a45a8ff	49	/* Includes ------------------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	50	#include "stm32l0xx_hal_def.h"
bogdanm	0:9b334a45a8ff	51
bogdanm	0:9b334a45a8ff	52	/** @addtogroup STM32L0xx_HAL_Driver
bogdanm	0:9b334a45a8ff	53	* @{
bogdanm	0:9b334a45a8ff	54	*/
bogdanm	0:9b334a45a8ff	55
mbed_official	113:b3775bf36a83	56	/** @defgroup LCD LCD
bogdanm	0:9b334a45a8ff	57	* @{
bogdanm	0:9b334a45a8ff	58	*/
bogdanm	0:9b334a45a8ff	59
bogdanm	0:9b334a45a8ff	60	/* Exported types ------------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	61	/** @defgroup LCD_Exported_Types LCD Exported Types
bogdanm	0:9b334a45a8ff	62	* @{
bogdanm	0:9b334a45a8ff	63	*/
bogdanm	0:9b334a45a8ff	64
bogdanm	0:9b334a45a8ff	65	/**
bogdanm	0:9b334a45a8ff	66	* @brief LCD Init structure definition
bogdanm	0:9b334a45a8ff	67	*/
bogdanm	0:9b334a45a8ff	68
bogdanm	0:9b334a45a8ff	69	typedef struct
bogdanm	0:9b334a45a8ff	70	{
bogdanm	0:9b334a45a8ff	71	uint32_t Prescaler; /*!< Configures the LCD Prescaler.
bogdanm	0:9b334a45a8ff	72	This parameter can be one value of @ref LCD_Prescaler */
bogdanm	0:9b334a45a8ff	73	uint32_t Divider; /*!< Configures the LCD Divider.
bogdanm	0:9b334a45a8ff	74	This parameter can be one value of @ref LCD_Divider */
bogdanm	0:9b334a45a8ff	75	uint32_t Duty; /*!< Configures the LCD Duty.
bogdanm	0:9b334a45a8ff	76	This parameter can be one value of @ref LCD_Duty */
bogdanm	0:9b334a45a8ff	77	uint32_t Bias; /*!< Configures the LCD Bias.
bogdanm	0:9b334a45a8ff	78	This parameter can be one value of @ref LCD_Bias */
bogdanm	0:9b334a45a8ff	79	uint32_t VoltageSource; /*!< Selects the LCD Voltage source.
bogdanm	0:9b334a45a8ff	80	This parameter can be one value of @ref LCD_Voltage_Source */
bogdanm	0:9b334a45a8ff	81	uint32_t Contrast; /*!< Configures the LCD Contrast.
bogdanm	0:9b334a45a8ff	82	This parameter can be one value of @ref LCD_Contrast */
bogdanm	0:9b334a45a8ff	83	uint32_t DeadTime; /*!< Configures the LCD Dead Time.
bogdanm	0:9b334a45a8ff	84	This parameter can be one value of @ref LCD_DeadTime */
bogdanm	0:9b334a45a8ff	85	uint32_t PulseOnDuration; /*!< Configures the LCD Pulse On Duration.
bogdanm	0:9b334a45a8ff	86	This parameter can be one value of @ref LCD_PulseOnDuration */
bogdanm	0:9b334a45a8ff	87	uint32_t HighDrive; /*!< Configures the LCD High Drive.
bogdanm	0:9b334a45a8ff	88	This parameter can be one value of @ref LCD_HighDrive */
bogdanm	0:9b334a45a8ff	89	uint32_t BlinkMode; /*!< Configures the LCD Blink Mode.
bogdanm	0:9b334a45a8ff	90	This parameter can be one value of @ref LCD_BlinkMode */
bogdanm	0:9b334a45a8ff	91	uint32_t BlinkFrequency; /*!< Configures the LCD Blink frequency.
bogdanm	0:9b334a45a8ff	92	This parameter can be one value of @ref LCD_BlinkFrequency */
mbed_official	113:b3775bf36a83	93	uint32_t MuxSegment; /*!< Enable or disable mux segment.
mbed_official	113:b3775bf36a83	94	This parameter can be one value of @ref LCD_MuxSegment */
bogdanm	0:9b334a45a8ff	95	}LCD_InitTypeDef;
bogdanm	0:9b334a45a8ff	96
bogdanm	0:9b334a45a8ff	97	/**
bogdanm	0:9b334a45a8ff	98	* @brief HAL LCD State structures definition
bogdanm	0:9b334a45a8ff	99	*/
bogdanm	0:9b334a45a8ff	100	typedef enum
bogdanm	0:9b334a45a8ff	101	{
bogdanm	0:9b334a45a8ff	102	HAL_LCD_STATE_RESET = 0x00, /!< Peripheral is not yet Initialized /
bogdanm	0:9b334a45a8ff	103	HAL_LCD_STATE_READY = 0x01, /!< Peripheral Initialized and ready for use /
bogdanm	0:9b334a45a8ff	104	HAL_LCD_STATE_BUSY = 0x02, /!< an internal process is ongoing /
bogdanm	0:9b334a45a8ff	105	HAL_LCD_STATE_TIMEOUT = 0x03, /!< Timeout state /
bogdanm	0:9b334a45a8ff	106	HAL_LCD_STATE_ERROR = 0x04 /!< Error /
bogdanm	0:9b334a45a8ff	107	}HAL_LCD_StateTypeDef;
bogdanm	0:9b334a45a8ff	108
bogdanm	0:9b334a45a8ff	109	/**
bogdanm	0:9b334a45a8ff	110	* @brief UART handle Structure definition
bogdanm	0:9b334a45a8ff	111	*/
bogdanm	0:9b334a45a8ff	112	typedef struct
bogdanm	0:9b334a45a8ff	113	{
bogdanm	0:9b334a45a8ff	114	LCD_TypeDef Instance; / LCD registers base address */
bogdanm	0:9b334a45a8ff	115
bogdanm	0:9b334a45a8ff	116	LCD_InitTypeDef Init; /* LCD communication parameters */
bogdanm	0:9b334a45a8ff	117
bogdanm	0:9b334a45a8ff	118	HAL_LockTypeDef Lock; /* Locking object */
bogdanm	0:9b334a45a8ff	119
bogdanm	0:9b334a45a8ff	120	__IO HAL_LCD_StateTypeDef State; /* LCD communication state */
bogdanm	0:9b334a45a8ff	121
bogdanm	0:9b334a45a8ff	122	__IO uint32_t ErrorCode; /* LCD Error code */
bogdanm	0:9b334a45a8ff	123
bogdanm	0:9b334a45a8ff	124	}LCD_HandleTypeDef;
bogdanm	0:9b334a45a8ff	125
bogdanm	0:9b334a45a8ff	126	/**
bogdanm	0:9b334a45a8ff	127	* @}
bogdanm	0:9b334a45a8ff	128	*/
bogdanm	0:9b334a45a8ff	129
bogdanm	0:9b334a45a8ff	130	/* Exported constants --------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	131
bogdanm	0:9b334a45a8ff	132	/** @defgroup LCD_Exported_Constants LCD Exported Constants
bogdanm	0:9b334a45a8ff	133	* @{
bogdanm	0:9b334a45a8ff	134	*/
bogdanm	0:9b334a45a8ff	135
bogdanm	0:9b334a45a8ff	136	/** @defgroup LCD_ErrorCode LCD Error Code
bogdanm	0:9b334a45a8ff	137	* @{
bogdanm	0:9b334a45a8ff	138	*/
bogdanm	0:9b334a45a8ff	139	#define HAL_LCD_ERROR_NONE ((uint32_t)0x00) /!< No error /
bogdanm	0:9b334a45a8ff	140	#define HAL_LCD_ERROR_FCRSF ((uint32_t)0x01) /!< Synchro flag timeout error /
bogdanm	0:9b334a45a8ff	141	#define HAL_LCD_ERROR_UDR ((uint32_t)0x02) /!< Update display request flag timeout error /
bogdanm	0:9b334a45a8ff	142	#define HAL_LCD_ERROR_UDD ((uint32_t)0x04) /!< Update display done flag timeout error /
bogdanm	0:9b334a45a8ff	143	#define HAL_LCD_ERROR_ENS ((uint32_t)0x08) /!< LCD enabled status flag timeout error /
bogdanm	0:9b334a45a8ff	144	#define HAL_LCD_ERROR_RDY ((uint32_t)0x10) /!< LCD Booster ready timeout error /
bogdanm	0:9b334a45a8ff	145	/**
bogdanm	0:9b334a45a8ff	146	* @}
bogdanm	0:9b334a45a8ff	147	*/
bogdanm	0:9b334a45a8ff	148
bogdanm	0:9b334a45a8ff	149	/** @defgroup LCD_Prescaler LCD Prescaler
bogdanm	0:9b334a45a8ff	150	* @{
bogdanm	0:9b334a45a8ff	151	*/
bogdanm	0:9b334a45a8ff	152
bogdanm	0:9b334a45a8ff	153	#define LCD_PRESCALER_1 ((uint32_t)0x00000000) /!< CLKPS = LCDCLK /
bogdanm	0:9b334a45a8ff	154	#define LCD_PRESCALER_2 ((uint32_t)0x00400000) /!< CLKPS = LCDCLK/2 /
bogdanm	0:9b334a45a8ff	155	#define LCD_PRESCALER_4 ((uint32_t)0x00800000) /!< CLKPS = LCDCLK/4 /
bogdanm	0:9b334a45a8ff	156	#define LCD_PRESCALER_8 ((uint32_t)0x00C00000) /!< CLKPS = LCDCLK/8 /
bogdanm	0:9b334a45a8ff	157	#define LCD_PRESCALER_16 ((uint32_t)0x01000000) /!< CLKPS = LCDCLK/16 /
bogdanm	0:9b334a45a8ff	158	#define LCD_PRESCALER_32 ((uint32_t)0x01400000) /!< CLKPS = LCDCLK/32 /
bogdanm	0:9b334a45a8ff	159	#define LCD_PRESCALER_64 ((uint32_t)0x01800000) /!< CLKPS = LCDCLK/64 /
bogdanm	0:9b334a45a8ff	160	#define LCD_PRESCALER_128 ((uint32_t)0x01C00000) /!< CLKPS = LCDCLK/128 /
bogdanm	0:9b334a45a8ff	161	#define LCD_PRESCALER_256 ((uint32_t)0x02000000) /!< CLKPS = LCDCLK/256 /
bogdanm	0:9b334a45a8ff	162	#define LCD_PRESCALER_512 ((uint32_t)0x02400000) /!< CLKPS = LCDCLK/512 /
bogdanm	0:9b334a45a8ff	163	#define LCD_PRESCALER_1024 ((uint32_t)0x02800000) /!< CLKPS = LCDCLK/1024 /
bogdanm	0:9b334a45a8ff	164	#define LCD_PRESCALER_2048 ((uint32_t)0x02C00000) /!< CLKPS = LCDCLK/2048 /
bogdanm	0:9b334a45a8ff	165	#define LCD_PRESCALER_4096 ((uint32_t)0x03000000) /!< CLKPS = LCDCLK/4096 /
bogdanm	0:9b334a45a8ff	166	#define LCD_PRESCALER_8192 ((uint32_t)0x03400000) /!< CLKPS = LCDCLK/8192 /
bogdanm	0:9b334a45a8ff	167	#define LCD_PRESCALER_16384 ((uint32_t)0x03800000) /!< CLKPS = LCDCLK/16384 /
bogdanm	0:9b334a45a8ff	168	#define LCD_PRESCALER_32768 ((uint32_t)LCD_FCR_PS) /!< CLKPS = LCDCLK/32768 /
bogdanm	0:9b334a45a8ff	169
bogdanm	0:9b334a45a8ff	170	#define IS_LCD_PRESCALER(__PRESCALER__) (((__PRESCALER__) == LCD_PRESCALER_1) \|\| \
bogdanm	0:9b334a45a8ff	171	((__PRESCALER__) == LCD_PRESCALER_2) \|\| \
bogdanm	0:9b334a45a8ff	172	((__PRESCALER__) == LCD_PRESCALER_4) \|\| \
bogdanm	0:9b334a45a8ff	173	((__PRESCALER__) == LCD_PRESCALER_8) \|\| \
bogdanm	0:9b334a45a8ff	174	((__PRESCALER__) == LCD_PRESCALER_16) \|\| \
bogdanm	0:9b334a45a8ff	175	((__PRESCALER__) == LCD_PRESCALER_32) \|\| \
bogdanm	0:9b334a45a8ff	176	((__PRESCALER__) == LCD_PRESCALER_64) \|\| \
bogdanm	0:9b334a45a8ff	177	((__PRESCALER__) == LCD_PRESCALER_128) \|\| \
bogdanm	0:9b334a45a8ff	178	((__PRESCALER__) == LCD_PRESCALER_256) \|\| \
bogdanm	0:9b334a45a8ff	179	((__PRESCALER__) == LCD_PRESCALER_512) \|\| \
bogdanm	0:9b334a45a8ff	180	((__PRESCALER__) == LCD_PRESCALER_1024) \|\| \
bogdanm	0:9b334a45a8ff	181	((__PRESCALER__) == LCD_PRESCALER_2048) \|\| \
bogdanm	0:9b334a45a8ff	182	((__PRESCALER__) == LCD_PRESCALER_4096) \|\| \
bogdanm	0:9b334a45a8ff	183	((__PRESCALER__) == LCD_PRESCALER_8192) \|\| \
bogdanm	0:9b334a45a8ff	184	((__PRESCALER__) == LCD_PRESCALER_16384) \|\| \
bogdanm	0:9b334a45a8ff	185	((__PRESCALER__) == LCD_PRESCALER_32768))
bogdanm	0:9b334a45a8ff	186
bogdanm	0:9b334a45a8ff	187	/**
bogdanm	0:9b334a45a8ff	188	* @}
bogdanm	0:9b334a45a8ff	189	*/
bogdanm	0:9b334a45a8ff	190
bogdanm	0:9b334a45a8ff	191	/** @defgroup LCD_Divider LCD Divider
bogdanm	0:9b334a45a8ff	192	* @{
bogdanm	0:9b334a45a8ff	193	*/
bogdanm	0:9b334a45a8ff	194
bogdanm	0:9b334a45a8ff	195	#define LCD_DIVIDER_16 ((uint32_t)0x00000000) /!< LCD frequency = CLKPS/16 /
bogdanm	0:9b334a45a8ff	196	#define LCD_DIVIDER_17 ((uint32_t)0x00040000) /!< LCD frequency = CLKPS/17 /
bogdanm	0:9b334a45a8ff	197	#define LCD_DIVIDER_18 ((uint32_t)0x00080000) /!< LCD frequency = CLKPS/18 /
bogdanm	0:9b334a45a8ff	198	#define LCD_DIVIDER_19 ((uint32_t)0x000C0000) /!< LCD frequency = CLKPS/19 /
bogdanm	0:9b334a45a8ff	199	#define LCD_DIVIDER_20 ((uint32_t)0x00100000) /!< LCD frequency = CLKPS/20 /
bogdanm	0:9b334a45a8ff	200	#define LCD_DIVIDER_21 ((uint32_t)0x00140000) /!< LCD frequency = CLKPS/21 /
bogdanm	0:9b334a45a8ff	201	#define LCD_DIVIDER_22 ((uint32_t)0x00180000) /!< LCD frequency = CLKPS/22 /
bogdanm	0:9b334a45a8ff	202	#define LCD_DIVIDER_23 ((uint32_t)0x001C0000) /!< LCD frequency = CLKPS/23 /
bogdanm	0:9b334a45a8ff	203	#define LCD_DIVIDER_24 ((uint32_t)0x00200000) /!< LCD frequency = CLKPS/24 /
bogdanm	0:9b334a45a8ff	204	#define LCD_DIVIDER_25 ((uint32_t)0x00240000) /!< LCD frequency = CLKPS/25 /
bogdanm	0:9b334a45a8ff	205	#define LCD_DIVIDER_26 ((uint32_t)0x00280000) /!< LCD frequency = CLKPS/26 /
bogdanm	0:9b334a45a8ff	206	#define LCD_DIVIDER_27 ((uint32_t)0x002C0000) /!< LCD frequency = CLKPS/27 /
bogdanm	0:9b334a45a8ff	207	#define LCD_DIVIDER_28 ((uint32_t)0x00300000) /!< LCD frequency = CLKPS/28 /
bogdanm	0:9b334a45a8ff	208	#define LCD_DIVIDER_29 ((uint32_t)0x00340000) /!< LCD frequency = CLKPS/29 /
bogdanm	0:9b334a45a8ff	209	#define LCD_DIVIDER_30 ((uint32_t)0x00380000) /!< LCD frequency = CLKPS/30 /
bogdanm	0:9b334a45a8ff	210	#define LCD_DIVIDER_31 ((uint32_t)LCD_FCR_DIV) /!< LCD frequency = CLKPS/31 /
bogdanm	0:9b334a45a8ff	211
bogdanm	0:9b334a45a8ff	212	#define IS_LCD_DIVIDER(__DIVIDER__) (((__DIVIDER__) == LCD_DIVIDER_16) \|\| \
bogdanm	0:9b334a45a8ff	213	((__DIVIDER__) == LCD_DIVIDER_17) \|\| \
bogdanm	0:9b334a45a8ff	214	((__DIVIDER__) == LCD_DIVIDER_18) \|\| \
bogdanm	0:9b334a45a8ff	215	((__DIVIDER__) == LCD_DIVIDER_19) \|\| \
bogdanm	0:9b334a45a8ff	216	((__DIVIDER__) == LCD_DIVIDER_20) \|\| \
bogdanm	0:9b334a45a8ff	217	((__DIVIDER__) == LCD_DIVIDER_21) \|\| \
bogdanm	0:9b334a45a8ff	218	((__DIVIDER__) == LCD_DIVIDER_22) \|\| \
bogdanm	0:9b334a45a8ff	219	((__DIVIDER__) == LCD_DIVIDER_23) \|\| \
bogdanm	0:9b334a45a8ff	220	((__DIVIDER__) == LCD_DIVIDER_24) \|\| \
bogdanm	0:9b334a45a8ff	221	((__DIVIDER__) == LCD_DIVIDER_25) \|\| \
bogdanm	0:9b334a45a8ff	222	((__DIVIDER__) == LCD_DIVIDER_26) \|\| \
bogdanm	0:9b334a45a8ff	223	((__DIVIDER__) == LCD_DIVIDER_27) \|\| \
bogdanm	0:9b334a45a8ff	224	((__DIVIDER__) == LCD_DIVIDER_28) \|\| \
bogdanm	0:9b334a45a8ff	225	((__DIVIDER__) == LCD_DIVIDER_29) \|\| \
bogdanm	0:9b334a45a8ff	226	((__DIVIDER__) == LCD_DIVIDER_30) \|\| \
bogdanm	0:9b334a45a8ff	227	((__DIVIDER__) == LCD_DIVIDER_31))
bogdanm	0:9b334a45a8ff	228
bogdanm	0:9b334a45a8ff	229	/**
bogdanm	0:9b334a45a8ff	230	* @}
bogdanm	0:9b334a45a8ff	231	*/
bogdanm	0:9b334a45a8ff	232
bogdanm	0:9b334a45a8ff	233
bogdanm	0:9b334a45a8ff	234	/** @defgroup LCD_Duty LCD Duty
bogdanm	0:9b334a45a8ff	235	* @{
bogdanm	0:9b334a45a8ff	236	*/
bogdanm	0:9b334a45a8ff	237
bogdanm	0:9b334a45a8ff	238	#define LCD_DUTY_STATIC ((uint32_t)0x00000000) /!< Static duty /
bogdanm	0:9b334a45a8ff	239	#define LCD_DUTY_1_2 (LCD_CR_DUTY_0) /!< 1/2 duty /
bogdanm	0:9b334a45a8ff	240	#define LCD_DUTY_1_3 (LCD_CR_DUTY_1) /!< 1/3 duty /
bogdanm	0:9b334a45a8ff	241	#define LCD_DUTY_1_4 ((LCD_CR_DUTY_1 \| LCD_CR_DUTY_0)) /!< 1/4 duty /
bogdanm	0:9b334a45a8ff	242	#define LCD_DUTY_1_8 (LCD_CR_DUTY_2) /!< 1/8 duty /
bogdanm	0:9b334a45a8ff	243
bogdanm	0:9b334a45a8ff	244	#define IS_LCD_DUTY(__DUTY__) (((__DUTY__) == LCD_DUTY_STATIC) \|\| \
bogdanm	0:9b334a45a8ff	245	((__DUTY__) == LCD_DUTY_1_2) \|\| \
bogdanm	0:9b334a45a8ff	246	((__DUTY__) == LCD_DUTY_1_3) \|\| \
bogdanm	0:9b334a45a8ff	247	((__DUTY__) == LCD_DUTY_1_4) \|\| \
bogdanm	0:9b334a45a8ff	248	((__DUTY__) == LCD_DUTY_1_8))
bogdanm	0:9b334a45a8ff	249
bogdanm	0:9b334a45a8ff	250	/**
bogdanm	0:9b334a45a8ff	251	* @}
bogdanm	0:9b334a45a8ff	252	*/
bogdanm	0:9b334a45a8ff	253
bogdanm	0:9b334a45a8ff	254
bogdanm	0:9b334a45a8ff	255	/** @defgroup LCD_Bias LCD Bias
bogdanm	0:9b334a45a8ff	256	* @{
bogdanm	0:9b334a45a8ff	257	*/
bogdanm	0:9b334a45a8ff	258
bogdanm	0:9b334a45a8ff	259	#define LCD_BIAS_1_4 ((uint32_t)0x00000000) /!< 1/4 Bias /
bogdanm	0:9b334a45a8ff	260	#define LCD_BIAS_1_2 LCD_CR_BIAS_0 /!< 1/2 Bias /
bogdanm	0:9b334a45a8ff	261	#define LCD_BIAS_1_3 LCD_CR_BIAS_1 /!< 1/3 Bias /
bogdanm	0:9b334a45a8ff	262
bogdanm	0:9b334a45a8ff	263	#define IS_LCD_BIAS(__BIAS__) (((__BIAS__) == LCD_BIAS_1_4) \|\| \
bogdanm	0:9b334a45a8ff	264	((__BIAS__) == LCD_BIAS_1_2) \|\| \
bogdanm	0:9b334a45a8ff	265	((__BIAS__) == LCD_BIAS_1_3))
bogdanm	0:9b334a45a8ff	266	/**
bogdanm	0:9b334a45a8ff	267	* @}
bogdanm	0:9b334a45a8ff	268	*/
bogdanm	0:9b334a45a8ff	269
bogdanm	0:9b334a45a8ff	270	/** @defgroup LCD_Voltage_Source LCD Voltage Source
bogdanm	0:9b334a45a8ff	271	* @{
bogdanm	0:9b334a45a8ff	272	*/
bogdanm	0:9b334a45a8ff	273
bogdanm	0:9b334a45a8ff	274	#define LCD_VOLTAGESOURCE_INTERNAL ((uint32_t)0x00000000) /!< Internal voltage source for the LCD /
bogdanm	0:9b334a45a8ff	275	#define LCD_VOLTAGESOURCE_EXTERNAL LCD_CR_VSEL /!< External voltage source for the LCD /
bogdanm	0:9b334a45a8ff	276
bogdanm	0:9b334a45a8ff	277	#define IS_LCD_VOLTAGE_SOURCE(SOURCE) (((SOURCE) == LCD_VOLTAGESOURCE_INTERNAL) \|\| \
bogdanm	0:9b334a45a8ff	278	((SOURCE) == LCD_VOLTAGESOURCE_EXTERNAL))
bogdanm	0:9b334a45a8ff	279
bogdanm	0:9b334a45a8ff	280	/**
bogdanm	0:9b334a45a8ff	281	* @}
bogdanm	0:9b334a45a8ff	282	*/
bogdanm	0:9b334a45a8ff	283
bogdanm	0:9b334a45a8ff	284	/** @defgroup LCD_Interrupts LCD Interrupts
bogdanm	0:9b334a45a8ff	285	* @{
bogdanm	0:9b334a45a8ff	286	*/
bogdanm	0:9b334a45a8ff	287	#define LCD_IT_SOF LCD_FCR_SOFIE
bogdanm	0:9b334a45a8ff	288	#define LCD_IT_UDD LCD_FCR_UDDIE
bogdanm	0:9b334a45a8ff	289
bogdanm	0:9b334a45a8ff	290	/**
bogdanm	0:9b334a45a8ff	291	* @}
bogdanm	0:9b334a45a8ff	292	*/
bogdanm	0:9b334a45a8ff	293
bogdanm	0:9b334a45a8ff	294	/** @defgroup LCD_PulseOnDuration LCD Pulse On Duration
bogdanm	0:9b334a45a8ff	295	* @{
bogdanm	0:9b334a45a8ff	296	*/
bogdanm	0:9b334a45a8ff	297
bogdanm	0:9b334a45a8ff	298	#define LCD_PULSEONDURATION_0 ((uint32_t)0x00000000) /!< Pulse ON duration = 0 pulse /
bogdanm	0:9b334a45a8ff	299	#define LCD_PULSEONDURATION_1 (LCD_FCR_PON_0) /!< Pulse ON duration = 1/CK_PS /
bogdanm	0:9b334a45a8ff	300	#define LCD_PULSEONDURATION_2 (LCD_FCR_PON_1) /!< Pulse ON duration = 2/CK_PS /
bogdanm	0:9b334a45a8ff	301	#define LCD_PULSEONDURATION_3 (LCD_FCR_PON_1 \| LCD_FCR_PON_0) /!< Pulse ON duration = 3/CK_PS /
bogdanm	0:9b334a45a8ff	302	#define LCD_PULSEONDURATION_4 (LCD_FCR_PON_2) /!< Pulse ON duration = 4/CK_PS /
bogdanm	0:9b334a45a8ff	303	#define LCD_PULSEONDURATION_5 (LCD_FCR_PON_2 \| LCD_FCR_PON_0) /!< Pulse ON duration = 5/CK_PS /
bogdanm	0:9b334a45a8ff	304	#define LCD_PULSEONDURATION_6 (LCD_FCR_PON_2 \| LCD_FCR_PON_1) /!< Pulse ON duration = 6/CK_PS /
bogdanm	0:9b334a45a8ff	305	#define LCD_PULSEONDURATION_7 (LCD_FCR_PON) /!< Pulse ON duration = 7/CK_PS /
bogdanm	0:9b334a45a8ff	306
bogdanm	0:9b334a45a8ff	307	#define IS_LCD_PULSE_ON_DURATION(__DURATION__) (((__DURATION__) == LCD_PULSEONDURATION_0) \|\| \
bogdanm	0:9b334a45a8ff	308	((__DURATION__) == LCD_PULSEONDURATION_1) \|\| \
bogdanm	0:9b334a45a8ff	309	((__DURATION__) == LCD_PULSEONDURATION_2) \|\| \
bogdanm	0:9b334a45a8ff	310	((__DURATION__) == LCD_PULSEONDURATION_3) \|\| \
bogdanm	0:9b334a45a8ff	311	((__DURATION__) == LCD_PULSEONDURATION_4) \|\| \
bogdanm	0:9b334a45a8ff	312	((__DURATION__) == LCD_PULSEONDURATION_5) \|\| \
bogdanm	0:9b334a45a8ff	313	((__DURATION__) == LCD_PULSEONDURATION_6) \|\| \
bogdanm	0:9b334a45a8ff	314	((__DURATION__) == LCD_PULSEONDURATION_7))
bogdanm	0:9b334a45a8ff	315	/**
bogdanm	0:9b334a45a8ff	316	* @}
bogdanm	0:9b334a45a8ff	317	*/
bogdanm	0:9b334a45a8ff	318
bogdanm	0:9b334a45a8ff	319	/** @defgroup LCD_HighDrive LCD HighDrive
bogdanm	0:9b334a45a8ff	320	* @{
bogdanm	0:9b334a45a8ff	321	*/
bogdanm	0:9b334a45a8ff	322
bogdanm	0:9b334a45a8ff	323	#define LCD_HIGHDRIVE_0 ((uint32_t)0x00000000) /!< Low resistance Drive /
bogdanm	0:9b334a45a8ff	324	#define LCD_HIGHDRIVE_1 (LCD_FCR_HD) /!< High resistance Drive /
bogdanm	0:9b334a45a8ff	325
bogdanm	0:9b334a45a8ff	326	#define IS_LCD_HIGHDRIVE(__HIGHDRIVE__) (((__HIGHDRIVE__) == LCD_HIGHDRIVE_0) \|\| \
bogdanm	0:9b334a45a8ff	327	((__HIGHDRIVE__) == LCD_HIGHDRIVE_1))
bogdanm	0:9b334a45a8ff	328	/**
bogdanm	0:9b334a45a8ff	329	* @}
bogdanm	0:9b334a45a8ff	330	*/
bogdanm	0:9b334a45a8ff	331
bogdanm	0:9b334a45a8ff	332	/** @defgroup LCD_DeadTime LCD Dead Time
bogdanm	0:9b334a45a8ff	333	* @{
bogdanm	0:9b334a45a8ff	334	*/
bogdanm	0:9b334a45a8ff	335
bogdanm	0:9b334a45a8ff	336	#define LCD_DEADTIME_0 ((uint32_t)0x00000000) /!< No dead Time /
bogdanm	0:9b334a45a8ff	337	#define LCD_DEADTIME_1 (LCD_FCR_DEAD_0) /!< One Phase between different couple of Frame /
bogdanm	0:9b334a45a8ff	338	#define LCD_DEADTIME_2 (LCD_FCR_DEAD_1) /!< Two Phase between different couple of Frame /
bogdanm	0:9b334a45a8ff	339	#define LCD_DEADTIME_3 (LCD_FCR_DEAD_1 \| LCD_FCR_DEAD_0) /!< Three Phase between different couple of Frame /
bogdanm	0:9b334a45a8ff	340	#define LCD_DEADTIME_4 (LCD_FCR_DEAD_2) /!< Four Phase between different couple of Frame /
bogdanm	0:9b334a45a8ff	341	#define LCD_DEADTIME_5 (LCD_FCR_DEAD_2 \| LCD_FCR_DEAD_0) /!< Five Phase between different couple of Frame /
bogdanm	0:9b334a45a8ff	342	#define LCD_DEADTIME_6 (LCD_FCR_DEAD_2 \| LCD_FCR_DEAD_1) /!< Six Phase between different couple of Frame /
bogdanm	0:9b334a45a8ff	343	#define LCD_DEADTIME_7 (LCD_FCR_DEAD) /!< Seven Phase between different couple of Frame /
bogdanm	0:9b334a45a8ff	344
bogdanm	0:9b334a45a8ff	345	#define IS_LCD_DEAD_TIME(__TIME__) (((__TIME__) == LCD_DEADTIME_0) \|\| \
bogdanm	0:9b334a45a8ff	346	((__TIME__) == LCD_DEADTIME_1) \|\| \
bogdanm	0:9b334a45a8ff	347	((__TIME__) == LCD_DEADTIME_2) \|\| \
bogdanm	0:9b334a45a8ff	348	((__TIME__) == LCD_DEADTIME_3) \|\| \
bogdanm	0:9b334a45a8ff	349	((__TIME__) == LCD_DEADTIME_4) \|\| \
bogdanm	0:9b334a45a8ff	350	((__TIME__) == LCD_DEADTIME_5) \|\| \
bogdanm	0:9b334a45a8ff	351	((__TIME__) == LCD_DEADTIME_6) \|\| \
bogdanm	0:9b334a45a8ff	352	((__TIME__) == LCD_DEADTIME_7))
bogdanm	0:9b334a45a8ff	353	/**
bogdanm	0:9b334a45a8ff	354	* @}
bogdanm	0:9b334a45a8ff	355	*/
bogdanm	0:9b334a45a8ff	356
bogdanm	0:9b334a45a8ff	357	/** @defgroup LCD_BlinkMode LCD Blink Mode
bogdanm	0:9b334a45a8ff	358	* @{
bogdanm	0:9b334a45a8ff	359	*/
bogdanm	0:9b334a45a8ff	360
bogdanm	0:9b334a45a8ff	361	#define LCD_BLINKMODE_OFF ((uint32_t)0x00000000) /!< Blink disabled /
bogdanm	0:9b334a45a8ff	362	#define LCD_BLINKMODE_SEG0_COM0 (LCD_FCR_BLINK_0) /!< Blink enabled on SEG[0], COM[0] (1 pixel) /
bogdanm	0:9b334a45a8ff	363	#define LCD_BLINKMODE_SEG0_ALLCOM (LCD_FCR_BLINK_1) /*!< Blink enabled on SEG[0], all COM (up to
bogdanm	0:9b334a45a8ff	364	8 pixels according to the programmed duty) */
bogdanm	0:9b334a45a8ff	365	#define LCD_BLINKMODE_ALLSEG_ALLCOM (LCD_FCR_BLINK) /!< Blink enabled on all SEG and all COM (all pixels) /
bogdanm	0:9b334a45a8ff	366
bogdanm	0:9b334a45a8ff	367	#define IS_LCD_BLINK_MODE(__MODE__) (((__MODE__) == LCD_BLINKMODE_OFF) \|\| \
bogdanm	0:9b334a45a8ff	368	((__MODE__) == LCD_BLINKMODE_SEG0_COM0) \|\| \
bogdanm	0:9b334a45a8ff	369	((__MODE__) == LCD_BLINKMODE_SEG0_ALLCOM) \|\| \
bogdanm	0:9b334a45a8ff	370	((__MODE__) == LCD_BLINKMODE_ALLSEG_ALLCOM))
bogdanm	0:9b334a45a8ff	371	/**
bogdanm	0:9b334a45a8ff	372	* @}
bogdanm	0:9b334a45a8ff	373	*/
bogdanm	0:9b334a45a8ff	374
bogdanm	0:9b334a45a8ff	375	/** @defgroup LCD_BlinkFrequency LCD Blink Frequency
bogdanm	0:9b334a45a8ff	376	* @{
bogdanm	0:9b334a45a8ff	377	*/
bogdanm	0:9b334a45a8ff	378
bogdanm	0:9b334a45a8ff	379	#define LCD_BLINKFREQUENCY_DIV8 ((uint32_t)0x00000000) /!< The Blink frequency = fLCD/8 /
bogdanm	0:9b334a45a8ff	380	#define LCD_BLINKFREQUENCY_DIV16 (LCD_FCR_BLINKF_0) /!< The Blink frequency = fLCD/16 /
bogdanm	0:9b334a45a8ff	381	#define LCD_BLINKFREQUENCY_DIV32 (LCD_FCR_BLINKF_1) /!< The Blink frequency = fLCD/32 /
bogdanm	0:9b334a45a8ff	382	#define LCD_BLINKFREQUENCY_DIV64 (LCD_FCR_BLINKF_1 \| LCD_FCR_BLINKF_0) /!< The Blink frequency = fLCD/64 /
bogdanm	0:9b334a45a8ff	383	#define LCD_BLINKFREQUENCY_DIV128 (LCD_FCR_BLINKF_2) /!< The Blink frequency = fLCD/128 /
bogdanm	0:9b334a45a8ff	384	#define LCD_BLINKFREQUENCY_DIV256 (LCD_FCR_BLINKF_2 \|LCD_FCR_BLINKF_0) /!< The Blink frequency = fLCD/256 /
bogdanm	0:9b334a45a8ff	385	#define LCD_BLINKFREQUENCY_DIV512 (LCD_FCR_BLINKF_2 \|LCD_FCR_BLINKF_1) /!< The Blink frequency = fLCD/512 /
bogdanm	0:9b334a45a8ff	386	#define LCD_BLINKFREQUENCY_DIV1024 (LCD_FCR_BLINKF) /!< The Blink frequency = fLCD/1024 /
bogdanm	0:9b334a45a8ff	387
bogdanm	0:9b334a45a8ff	388	#define IS_LCD_BLINK_FREQUENCY(__FREQUENCY__) (((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV8) \|\| \
bogdanm	0:9b334a45a8ff	389	((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV16) \|\| \
bogdanm	0:9b334a45a8ff	390	((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV32) \|\| \
bogdanm	0:9b334a45a8ff	391	((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV64) \|\| \
bogdanm	0:9b334a45a8ff	392	((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV128) \|\| \
bogdanm	0:9b334a45a8ff	393	((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV256) \|\| \
bogdanm	0:9b334a45a8ff	394	((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV512) \|\| \
bogdanm	0:9b334a45a8ff	395	((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV1024))
bogdanm	0:9b334a45a8ff	396	/**
bogdanm	0:9b334a45a8ff	397	* @}
bogdanm	0:9b334a45a8ff	398	*/
bogdanm	0:9b334a45a8ff	399
bogdanm	0:9b334a45a8ff	400	/** @defgroup LCD_Contrast LCD Contrast
bogdanm	0:9b334a45a8ff	401	* @{
bogdanm	0:9b334a45a8ff	402	*/
bogdanm	0:9b334a45a8ff	403
bogdanm	0:9b334a45a8ff	404	#define LCD_CONTRASTLEVEL_0 ((uint32_t)0x00000000) /!< Maximum Voltage = 2.60V /
bogdanm	0:9b334a45a8ff	405	#define LCD_CONTRASTLEVEL_1 (LCD_FCR_CC_0) /!< Maximum Voltage = 2.73V /
bogdanm	0:9b334a45a8ff	406	#define LCD_CONTRASTLEVEL_2 (LCD_FCR_CC_1) /!< Maximum Voltage = 2.86V /
bogdanm	0:9b334a45a8ff	407	#define LCD_CONTRASTLEVEL_3 (LCD_FCR_CC_1 \| LCD_FCR_CC_0) /!< Maximum Voltage = 2.99V /
bogdanm	0:9b334a45a8ff	408	#define LCD_CONTRASTLEVEL_4 (LCD_FCR_CC_2) /!< Maximum Voltage = 3.12V /
bogdanm	0:9b334a45a8ff	409	#define LCD_CONTRASTLEVEL_5 (LCD_FCR_CC_2 \| LCD_FCR_CC_0) /!< Maximum Voltage = 3.25V /
bogdanm	0:9b334a45a8ff	410	#define LCD_CONTRASTLEVEL_6 (LCD_FCR_CC_2 \| LCD_FCR_CC_1) /!< Maximum Voltage = 3.38V /
bogdanm	0:9b334a45a8ff	411	#define LCD_CONTRASTLEVEL_7 (LCD_FCR_CC) /!< Maximum Voltage = 3.51V /
bogdanm	0:9b334a45a8ff	412
bogdanm	0:9b334a45a8ff	413	#define IS_LCD_CONTRAST(__CONTRAST__) (((__CONTRAST__) == LCD_CONTRASTLEVEL_0) \|\| \
bogdanm	0:9b334a45a8ff	414	((__CONTRAST__) == LCD_CONTRASTLEVEL_1) \|\| \
bogdanm	0:9b334a45a8ff	415	((__CONTRAST__) == LCD_CONTRASTLEVEL_2) \|\| \
bogdanm	0:9b334a45a8ff	416	((__CONTRAST__) == LCD_CONTRASTLEVEL_3) \|\| \
bogdanm	0:9b334a45a8ff	417	((__CONTRAST__) == LCD_CONTRASTLEVEL_4) \|\| \
bogdanm	0:9b334a45a8ff	418	((__CONTRAST__) == LCD_CONTRASTLEVEL_5) \|\| \
bogdanm	0:9b334a45a8ff	419	((__CONTRAST__) == LCD_CONTRASTLEVEL_6) \|\| \
bogdanm	0:9b334a45a8ff	420	((__CONTRAST__) == LCD_CONTRASTLEVEL_7))
bogdanm	0:9b334a45a8ff	421	/**
bogdanm	0:9b334a45a8ff	422	* @}
bogdanm	0:9b334a45a8ff	423	*/
bogdanm	0:9b334a45a8ff	424
mbed_official	113:b3775bf36a83	425	/** @defgroup LCD_MuxSegment LCD Mux Segment
mbed_official	113:b3775bf36a83	426	* @{
mbed_official	113:b3775bf36a83	427	*/
mbed_official	113:b3775bf36a83	428
mbed_official	113:b3775bf36a83	429	#define LCD_MUXSEGMENT_DISABLE ((uint32_t)0x00000000) /!< SEG pin multiplexing disabled /
mbed_official	113:b3775bf36a83	430	#define LCD_MUXSEGMENT_ENABLE (LCD_CR_MUX_SEG) /!< SEG[31:28] are multiplexed with SEG[43:40] /
mbed_official	113:b3775bf36a83	431
mbed_official	113:b3775bf36a83	432	#define IS_LCD_MUXSEGMENT(__VALUE__) (((__VALUE__) == LCD_MUXSEGMENT_ENABLE) \|\| \
mbed_official	113:b3775bf36a83	433	((__VALUE__) == LCD_MUXSEGMENT_DISABLE))
mbed_official	113:b3775bf36a83	434	/**
mbed_official	113:b3775bf36a83	435	* @}
mbed_official	113:b3775bf36a83	436	*/
mbed_official	113:b3775bf36a83	437
bogdanm	0:9b334a45a8ff	438	/** @defgroup LCD_Flag LCD Flag
bogdanm	0:9b334a45a8ff	439	* @{
bogdanm	0:9b334a45a8ff	440	*/
bogdanm	0:9b334a45a8ff	441
bogdanm	0:9b334a45a8ff	442	#define LCD_FLAG_ENS LCD_SR_ENS
bogdanm	0:9b334a45a8ff	443	#define LCD_FLAG_SOF LCD_SR_SOF
bogdanm	0:9b334a45a8ff	444	#define LCD_FLAG_UDR LCD_SR_UDR
bogdanm	0:9b334a45a8ff	445	#define LCD_FLAG_UDD LCD_SR_UDD
bogdanm	0:9b334a45a8ff	446	#define LCD_FLAG_RDY LCD_SR_RDY
bogdanm	0:9b334a45a8ff	447	#define LCD_FLAG_FCRSF LCD_SR_FCRSR
bogdanm	0:9b334a45a8ff	448
bogdanm	0:9b334a45a8ff	449	/**
bogdanm	0:9b334a45a8ff	450	* @}
bogdanm	0:9b334a45a8ff	451	*/
bogdanm	0:9b334a45a8ff	452
bogdanm	0:9b334a45a8ff	453	/** @defgroup LCD_RAMRegister LCD RAMRegister
bogdanm	0:9b334a45a8ff	454	* @{
bogdanm	0:9b334a45a8ff	455	*/
bogdanm	0:9b334a45a8ff	456
bogdanm	0:9b334a45a8ff	457	#define LCD_RAM_REGISTER0 ((uint32_t)0x00000000) /!< LCD RAM Register 0 /
bogdanm	0:9b334a45a8ff	458	#define LCD_RAM_REGISTER1 ((uint32_t)0x00000001) /!< LCD RAM Register 1 /
bogdanm	0:9b334a45a8ff	459	#define LCD_RAM_REGISTER2 ((uint32_t)0x00000002) /!< LCD RAM Register 2 /
bogdanm	0:9b334a45a8ff	460	#define LCD_RAM_REGISTER3 ((uint32_t)0x00000003) /!< LCD RAM Register 3 /
bogdanm	0:9b334a45a8ff	461	#define LCD_RAM_REGISTER4 ((uint32_t)0x00000004) /!< LCD RAM Register 4 /
bogdanm	0:9b334a45a8ff	462	#define LCD_RAM_REGISTER5 ((uint32_t)0x00000005) /!< LCD RAM Register 5 /
bogdanm	0:9b334a45a8ff	463	#define LCD_RAM_REGISTER6 ((uint32_t)0x00000006) /!< LCD RAM Register 6 /
bogdanm	0:9b334a45a8ff	464	#define LCD_RAM_REGISTER7 ((uint32_t)0x00000007) /!< LCD RAM Register 7 /
bogdanm	0:9b334a45a8ff	465	#define LCD_RAM_REGISTER8 ((uint32_t)0x00000008) /!< LCD RAM Register 8 /
bogdanm	0:9b334a45a8ff	466	#define LCD_RAM_REGISTER9 ((uint32_t)0x00000009) /!< LCD RAM Register 9 /
bogdanm	0:9b334a45a8ff	467	#define LCD_RAM_REGISTER10 ((uint32_t)0x0000000A) /!< LCD RAM Register 10 /
bogdanm	0:9b334a45a8ff	468	#define LCD_RAM_REGISTER11 ((uint32_t)0x0000000B) /!< LCD RAM Register 11 /
bogdanm	0:9b334a45a8ff	469	#define LCD_RAM_REGISTER12 ((uint32_t)0x0000000C) /!< LCD RAM Register 12 /
bogdanm	0:9b334a45a8ff	470	#define LCD_RAM_REGISTER13 ((uint32_t)0x0000000D) /!< LCD RAM Register 13 /
bogdanm	0:9b334a45a8ff	471	#define LCD_RAM_REGISTER14 ((uint32_t)0x0000000E) /!< LCD RAM Register 14 /
bogdanm	0:9b334a45a8ff	472	#define LCD_RAM_REGISTER15 ((uint32_t)0x0000000F) /!< LCD RAM Register 15 /
bogdanm	0:9b334a45a8ff	473
bogdanm	0:9b334a45a8ff	474	#define IS_LCD_RAM_REGISTER(__REGISTER__) (((__REGISTER__) == LCD_RAM_REGISTER0) \|\| \
bogdanm	0:9b334a45a8ff	475	((__REGISTER__) == LCD_RAM_REGISTER1) \|\| \
bogdanm	0:9b334a45a8ff	476	((__REGISTER__) == LCD_RAM_REGISTER2) \|\| \
bogdanm	0:9b334a45a8ff	477	((__REGISTER__) == LCD_RAM_REGISTER3) \|\| \
bogdanm	0:9b334a45a8ff	478	((__REGISTER__) == LCD_RAM_REGISTER4) \|\| \
bogdanm	0:9b334a45a8ff	479	((__REGISTER__) == LCD_RAM_REGISTER5) \|\| \
bogdanm	0:9b334a45a8ff	480	((__REGISTER__) == LCD_RAM_REGISTER6) \|\| \
bogdanm	0:9b334a45a8ff	481	((__REGISTER__) == LCD_RAM_REGISTER7) \|\| \
bogdanm	0:9b334a45a8ff	482	((__REGISTER__) == LCD_RAM_REGISTER8) \|\| \
bogdanm	0:9b334a45a8ff	483	((__REGISTER__) == LCD_RAM_REGISTER9) \|\| \
bogdanm	0:9b334a45a8ff	484	((__REGISTER__) == LCD_RAM_REGISTER10) \|\| \
bogdanm	0:9b334a45a8ff	485	((__REGISTER__) == LCD_RAM_REGISTER11) \|\| \
bogdanm	0:9b334a45a8ff	486	((__REGISTER__) == LCD_RAM_REGISTER12) \|\| \
bogdanm	0:9b334a45a8ff	487	((__REGISTER__) == LCD_RAM_REGISTER13) \|\| \
bogdanm	0:9b334a45a8ff	488	((__REGISTER__) == LCD_RAM_REGISTER14) \|\| \
bogdanm	0:9b334a45a8ff	489	((__REGISTER__) == LCD_RAM_REGISTER15))
bogdanm	0:9b334a45a8ff	490
bogdanm	0:9b334a45a8ff	491	/**
bogdanm	0:9b334a45a8ff	492	* @}
bogdanm	0:9b334a45a8ff	493	*/
bogdanm	0:9b334a45a8ff	494
bogdanm	0:9b334a45a8ff	495	/**
bogdanm	0:9b334a45a8ff	496	* @}
bogdanm	0:9b334a45a8ff	497	*/
bogdanm	0:9b334a45a8ff	498
bogdanm	0:9b334a45a8ff	499	/* Exported macro ------------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	500
bogdanm	0:9b334a45a8ff	501	/** @defgroup LCD_Exported_Macros LCD Exported Macros
bogdanm	0:9b334a45a8ff	502	* @{
bogdanm	0:9b334a45a8ff	503	*/
bogdanm	0:9b334a45a8ff	504
bogdanm	0:9b334a45a8ff	505	/** @brief Reset LCD handle state
bogdanm	0:9b334a45a8ff	506	* @param __HANDLE__: specifies the LCD Handle.
bogdanm	0:9b334a45a8ff	507	* @retval None
bogdanm	0:9b334a45a8ff	508	*/
bogdanm	0:9b334a45a8ff	509	#define __HAL_LCD_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_LCD_STATE_RESET)
bogdanm	0:9b334a45a8ff	510
bogdanm	0:9b334a45a8ff	511	/** @brief macros to enables or disables the LCD
bogdanm	0:9b334a45a8ff	512	* @param __HANDLE__: specifies the LCD Handle.
bogdanm	0:9b334a45a8ff	513	* @retval None
bogdanm	0:9b334a45a8ff	514	*/
bogdanm	0:9b334a45a8ff	515	#define __HAL_LCD_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR, LCD_CR_LCDEN))
bogdanm	0:9b334a45a8ff	516	#define __HAL_LCD_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->CR, LCD_CR_LCDEN))
bogdanm	0:9b334a45a8ff	517
bogdanm	0:9b334a45a8ff	518	/** @brief Macros to enable or disable the low resistance divider. Displays with high
bogdanm	0:9b334a45a8ff	519	* internal resistance may need a longer drive time to achieve
bogdanm	0:9b334a45a8ff	520	* satisfactory contrast. This function is useful in this case if some
bogdanm	0:9b334a45a8ff	521	* additional power consumption can be tolerated.
bogdanm	0:9b334a45a8ff	522	* @param __HANDLE__: specifies the LCD Handle.
bogdanm	0:9b334a45a8ff	523	* @note When this mode is enabled, the PulseOn Duration (PON) have to be
bogdanm	0:9b334a45a8ff	524	* programmed to 1/CK_PS (LCD_PULSEONDURATION_1).
bogdanm	0:9b334a45a8ff	525	* @retval None
bogdanm	0:9b334a45a8ff	526	*/
bogdanm	0:9b334a45a8ff	527	#define __HAL_LCD_HIGHDRIVER_ENABLE(__HANDLE__) \
bogdanm	0:9b334a45a8ff	528	do{ \
bogdanm	0:9b334a45a8ff	529	SET_BIT((__HANDLE__)->Instance->FCR, LCD_FCR_HD); \
bogdanm	0:9b334a45a8ff	530	LCD_WaitForSynchro(__HANDLE__); \
bogdanm	0:9b334a45a8ff	531	}while(0)
bogdanm	0:9b334a45a8ff	532
bogdanm	0:9b334a45a8ff	533	#define __HAL_LCD_HIGHDRIVER_DISABLE(__HANDLE__) \
bogdanm	0:9b334a45a8ff	534	do{ \
bogdanm	0:9b334a45a8ff	535	CLEAR_BIT((__HANDLE__)->Instance->FCR, LCD_FCR_HD); \
bogdanm	0:9b334a45a8ff	536	LCD_WaitForSynchro(__HANDLE__); \
bogdanm	0:9b334a45a8ff	537	}while(0)
bogdanm	0:9b334a45a8ff	538
bogdanm	0:9b334a45a8ff	539	/**
bogdanm	0:9b334a45a8ff	540	* @brief Macro to configure the LCD pulses on duration.
bogdanm	0:9b334a45a8ff	541	* @param __HANDLE__: specifies the LCD Handle.
bogdanm	0:9b334a45a8ff	542	* @param __DURATION__: specifies the LCD pulse on duration in terms of
bogdanm	0:9b334a45a8ff	543	* CK_PS (prescaled LCD clock period) pulses.
bogdanm	0:9b334a45a8ff	544	* This parameter can be one of the following values:
bogdanm	0:9b334a45a8ff	545	* @arg LCD_PULSEONDURATION_0: 0 pulse
bogdanm	0:9b334a45a8ff	546	* @arg LCD_PULSEONDURATION_1: Pulse ON duration = 1/CK_PS
bogdanm	0:9b334a45a8ff	547	* @arg LCD_PULSEONDURATION_2: Pulse ON duration = 2/CK_PS
bogdanm	0:9b334a45a8ff	548	* @arg LCD_PULSEONDURATION_3: Pulse ON duration = 3/CK_PS
bogdanm	0:9b334a45a8ff	549	* @arg LCD_PULSEONDURATION_4: Pulse ON duration = 4/CK_PS
bogdanm	0:9b334a45a8ff	550	* @arg LCD_PULSEONDURATION_5: Pulse ON duration = 5/CK_PS
bogdanm	0:9b334a45a8ff	551	* @arg LCD_PULSEONDURATION_6: Pulse ON duration = 6/CK_PS
bogdanm	0:9b334a45a8ff	552	* @arg LCD_PULSEONDURATION_7: Pulse ON duration = 7/CK_PS
bogdanm	0:9b334a45a8ff	553	* @retval None
bogdanm	0:9b334a45a8ff	554	*/
bogdanm	0:9b334a45a8ff	555	#define __HAL_LCD_PULSEONDURATION_CONFIG(__HANDLE__, __DURATION__) \
bogdanm	0:9b334a45a8ff	556	do{ \
bogdanm	0:9b334a45a8ff	557	MODIFY_REG((__HANDLE__)->Instance->FCR, LCD_FCR_PON, (__DURATION__)); \
bogdanm	0:9b334a45a8ff	558	LCD_WaitForSynchro(__HANDLE__); \
bogdanm	0:9b334a45a8ff	559	}while(0)
bogdanm	0:9b334a45a8ff	560
bogdanm	0:9b334a45a8ff	561	/**
bogdanm	0:9b334a45a8ff	562	* @brief Macro to configure the LCD dead time.
bogdanm	0:9b334a45a8ff	563	* @param __HANDLE__: specifies the LCD Handle.
bogdanm	0:9b334a45a8ff	564	* @param __DEADTIME__: specifies the LCD dead time.
bogdanm	0:9b334a45a8ff	565	* This parameter can be one of the following values:
bogdanm	0:9b334a45a8ff	566	* @arg LCD_DEADTIME_0: No dead Time
bogdanm	0:9b334a45a8ff	567	* @arg LCD_DEADTIME_1: One Phase between different couple of Frame
bogdanm	0:9b334a45a8ff	568	* @arg LCD_DEADTIME_2: Two Phase between different couple of Frame
bogdanm	0:9b334a45a8ff	569	* @arg LCD_DEADTIME_3: Three Phase between different couple of Frame
bogdanm	0:9b334a45a8ff	570	* @arg LCD_DEADTIME_4: Four Phase between different couple of Frame
bogdanm	0:9b334a45a8ff	571	* @arg LCD_DEADTIME_5: Five Phase between different couple of Frame
bogdanm	0:9b334a45a8ff	572	* @arg LCD_DEADTIME_6: Six Phase between different couple of Frame
bogdanm	0:9b334a45a8ff	573	* @arg LCD_DEADTIME_7: Seven Phase between different couple of Frame
bogdanm	0:9b334a45a8ff	574	* @retval None
bogdanm	0:9b334a45a8ff	575	*/
bogdanm	0:9b334a45a8ff	576	#define __HAL_LCD_DEADTIME_CONFIG(__HANDLE__, __DEADTIME__) \
bogdanm	0:9b334a45a8ff	577	do{ \
bogdanm	0:9b334a45a8ff	578	MODIFY_REG((__HANDLE__)->Instance->FCR, LCD_FCR_DEAD, (__DEADTIME__)); \
bogdanm	0:9b334a45a8ff	579	LCD_WaitForSynchro(__HANDLE__); \
bogdanm	0:9b334a45a8ff	580	}while(0)
bogdanm	0:9b334a45a8ff	581
bogdanm	0:9b334a45a8ff	582	/**
bogdanm	0:9b334a45a8ff	583	* @brief Macro to configure the LCD Contrast.
bogdanm	0:9b334a45a8ff	584	* @param __HANDLE__: specifies the LCD Handle.
bogdanm	0:9b334a45a8ff	585	* @param __CONTRAST__: specifies the LCD Contrast.
bogdanm	0:9b334a45a8ff	586	* This parameter can be one of the following values:
bogdanm	0:9b334a45a8ff	587	* @arg LCD_CONTRASTLEVEL_0: Maximum Voltage = 2.60V
bogdanm	0:9b334a45a8ff	588	* @arg LCD_CONTRASTLEVEL_1: Maximum Voltage = 2.73V
bogdanm	0:9b334a45a8ff	589	* @arg LCD_CONTRASTLEVEL_2: Maximum Voltage = 2.86V
bogdanm	0:9b334a45a8ff	590	* @arg LCD_CONTRASTLEVEL_3: Maximum Voltage = 2.99V
bogdanm	0:9b334a45a8ff	591	* @arg LCD_CONTRASTLEVEL_4: Maximum Voltage = 3.12V
bogdanm	0:9b334a45a8ff	592	* @arg LCD_CONTRASTLEVEL_5: Maximum Voltage = 3.25V
bogdanm	0:9b334a45a8ff	593	* @arg LCD_CONTRASTLEVEL_6: Maximum Voltage = 3.38V
bogdanm	0:9b334a45a8ff	594	* @arg LCD_CONTRASTLEVEL_7: Maximum Voltage = 3.51V
bogdanm	0:9b334a45a8ff	595	* @retval None
bogdanm	0:9b334a45a8ff	596	*/
bogdanm	0:9b334a45a8ff	597	#define __HAL_LCD_CONTRAST_CONFIG(__HANDLE__, __CONTRAST__) \
bogdanm	0:9b334a45a8ff	598	do{ \
bogdanm	0:9b334a45a8ff	599	MODIFY_REG((__HANDLE__)->Instance->FCR, LCD_FCR_CC, (__CONTRAST__)); \
bogdanm	0:9b334a45a8ff	600	LCD_WaitForSynchro(__HANDLE__); \
bogdanm	0:9b334a45a8ff	601	} while(0)
bogdanm	0:9b334a45a8ff	602
bogdanm	0:9b334a45a8ff	603	/**
bogdanm	0:9b334a45a8ff	604	* @brief Macro to configure the LCD Blink mode and Blink frequency.
bogdanm	0:9b334a45a8ff	605	* @param __HANDLE__: specifies the LCD Handle.
bogdanm	0:9b334a45a8ff	606	* @param __BLINKMODE__: specifies the LCD blink mode.
bogdanm	0:9b334a45a8ff	607	* This parameter can be one of the following values:
bogdanm	0:9b334a45a8ff	608	* @arg LCD_BLINKMODE_OFF: Blink disabled
bogdanm	0:9b334a45a8ff	609	* @arg LCD_BLINKMODE_SEG0_COM0: Blink enabled on SEG[0], COM[0] (1 pixel)
bogdanm	0:9b334a45a8ff	610	* @arg LCD_BLINKMODE_SEG0_ALLCOM: Blink enabled on SEG[0], all COM (up to 8
bogdanm	0:9b334a45a8ff	611	* pixels according to the programmed duty)
bogdanm	0:9b334a45a8ff	612	* @arg LCD_BLINKMODE_ALLSEG_ALLCOM: Blink enabled on all SEG and all COM
bogdanm	0:9b334a45a8ff	613	* (all pixels)
bogdanm	0:9b334a45a8ff	614	* @param __BLINKFREQUENCY__: specifies the LCD blink frequency.
bogdanm	0:9b334a45a8ff	615	* @arg LCD_BLINKFREQUENCY_DIV8: The Blink frequency = fLcd/8
bogdanm	0:9b334a45a8ff	616	* @arg LCD_BLINKFREQUENCY_DIV16: The Blink frequency = fLcd/16
bogdanm	0:9b334a45a8ff	617	* @arg LCD_BLINKFREQUENCY_DIV32: The Blink frequency = fLcd/32
bogdanm	0:9b334a45a8ff	618	* @arg LCD_BLINKFREQUENCY_DIV64: The Blink frequency = fLcd/64
bogdanm	0:9b334a45a8ff	619	* @arg LCD_BLINKFREQUENCY_DIV128: The Blink frequency = fLcd/128
bogdanm	0:9b334a45a8ff	620	* @arg LCD_BLINKFREQUENCY_DIV256: The Blink frequency = fLcd/256
bogdanm	0:9b334a45a8ff	621	* @arg LCD_BLINKFREQUENCY_DIV512: The Blink frequency = fLcd/512
bogdanm	0:9b334a45a8ff	622	* @arg LCD_BLINKFREQUENCY_DIV1024: The Blink frequency = fLcd/1024
bogdanm	0:9b334a45a8ff	623	* @retval None
bogdanm	0:9b334a45a8ff	624	*/
bogdanm	0:9b334a45a8ff	625	#define __HAL_LCD_BLINK_CONFIG(__HANDLE__, __BLINKMODE__, __BLINKFREQUENCY__) \
bogdanm	0:9b334a45a8ff	626	do{ \
bogdanm	0:9b334a45a8ff	627	MODIFY_REG((__HANDLE__)->Instance->FCR, (LCD_FCR_BLINKF \| LCD_FCR_BLINK), ((__BLINKMODE__) \| (__BLINKFREQUENCY__))); \
bogdanm	0:9b334a45a8ff	628	LCD_WaitForSynchro(__HANDLE__); \
bogdanm	0:9b334a45a8ff	629	}while(0)
bogdanm	0:9b334a45a8ff	630
bogdanm	0:9b334a45a8ff	631	/** @brief Enables or disables the specified LCD interrupt.
bogdanm	0:9b334a45a8ff	632	* @param __HANDLE__: specifies the LCD Handle.
bogdanm	0:9b334a45a8ff	633	* @param __INTERRUPT__: specifies the LCD interrupt source to be enabled or disabled.
bogdanm	0:9b334a45a8ff	634	* This parameter can be one of the following values:
bogdanm	0:9b334a45a8ff	635	* @arg LCD_IT_SOF: Start of Frame Interrupt
bogdanm	0:9b334a45a8ff	636	* @arg LCD_IT_UDD: Update Display Done Interrupt
bogdanm	0:9b334a45a8ff	637	* @retval None
bogdanm	0:9b334a45a8ff	638	*/
bogdanm	0:9b334a45a8ff	639	#define __HAL_LCD_ENABLE_IT(__HANDLE__, __INTERRUPT__) \
bogdanm	0:9b334a45a8ff	640	do{ \
bogdanm	0:9b334a45a8ff	641	SET_BIT((__HANDLE__)->Instance->FCR, (__INTERRUPT__)); \
bogdanm	0:9b334a45a8ff	642	LCD_WaitForSynchro(__HANDLE__); \
bogdanm	0:9b334a45a8ff	643	}while(0)
bogdanm	0:9b334a45a8ff	644	#define __HAL_LCD_DISABLE_IT(__HANDLE__, __INTERRUPT__) \
bogdanm	0:9b334a45a8ff	645	do{ \
bogdanm	0:9b334a45a8ff	646	CLEAR_BIT((__HANDLE__)->Instance->FCR, (__INTERRUPT__)); \
bogdanm	0:9b334a45a8ff	647	LCD_WaitForSynchro(__HANDLE__); \
bogdanm	0:9b334a45a8ff	648	}while(0)
bogdanm	0:9b334a45a8ff	649
bogdanm	0:9b334a45a8ff	650	/** @brief Checks whether the specified LCD interrupt is enabled or not.
bogdanm	0:9b334a45a8ff	651	* @param __HANDLE__: specifies the LCD Handle.
bogdanm	0:9b334a45a8ff	652	* @param __IT__: specifies the LCD interrupt source to check.
bogdanm	0:9b334a45a8ff	653	* This parameter can be one of the following values:
bogdanm	0:9b334a45a8ff	654	* @arg LCD_IT_SOF: Start of Frame Interrupt
bogdanm	0:9b334a45a8ff	655	* @arg LCD_IT_UDD: Update Display Done Interrupt.
bogdanm	0:9b334a45a8ff	656	* @note If the device is in STOP mode (PCLK not provided) UDD will not
bogdanm	0:9b334a45a8ff	657	* generate an interrupt even if UDDIE = 1.
bogdanm	0:9b334a45a8ff	658	* If the display is not enabled the UDD interrupt will never occur.
bogdanm	0:9b334a45a8ff	659	* @retval The state of __IT__ (TRUE or FALSE).
bogdanm	0:9b334a45a8ff	660	*/
bogdanm	0:9b334a45a8ff	661	#define __HAL_LCD_GET_IT_SOURCE(__HANDLE__, __IT__) (((__HANDLE__)->Instance->FCR) & (__IT__))
bogdanm	0:9b334a45a8ff	662
bogdanm	0:9b334a45a8ff	663	/** @brief Checks whether the specified LCD flag is set or not.
bogdanm	0:9b334a45a8ff	664	* @param __HANDLE__: specifies the LCD Handle.
bogdanm	0:9b334a45a8ff	665	* @param __FLAG__: specifies the flag to check.
bogdanm	0:9b334a45a8ff	666	* This parameter can be one of the following values:
bogdanm	0:9b334a45a8ff	667	* @arg LCD_FLAG_ENS: LCD Enabled flag. It indicates the LCD controller status.
bogdanm	0:9b334a45a8ff	668	* @note The ENS bit is set immediately when the LCDEN bit in the LCD_CR
bogdanm	0:9b334a45a8ff	669	* goes from 0 to 1. On deactivation it reflects the real status of
bogdanm	0:9b334a45a8ff	670	* LCD so it becomes 0 at the end of the last displayed frame.
bogdanm	0:9b334a45a8ff	671	* @arg LCD_FLAG_SOF: Start of Frame flag. This flag is set by hardware at
bogdanm	0:9b334a45a8ff	672	* the beginning of a new frame, at the same time as the display data is
bogdanm	0:9b334a45a8ff	673	* updated.
bogdanm	0:9b334a45a8ff	674	* @arg LCD_FLAG_UDR: Update Display Request flag.
bogdanm	0:9b334a45a8ff	675	* @arg LCD_FLAG_UDD: Update Display Done flag.
bogdanm	0:9b334a45a8ff	676	* @arg LCD_FLAG_RDY: Step_up converter Ready flag. It indicates the status
bogdanm	0:9b334a45a8ff	677	* of the step-up converter.
bogdanm	0:9b334a45a8ff	678	* @arg LCD_FLAG_FCRSF: LCD Frame Control Register Synchronization Flag.
bogdanm	0:9b334a45a8ff	679	* This flag is set by hardware each time the LCD_FCR register is updated
bogdanm	0:9b334a45a8ff	680	* in the LCDCLK domain.
bogdanm	0:9b334a45a8ff	681	* @retval The new state of __FLAG__ (TRUE or FALSE).
bogdanm	0:9b334a45a8ff	682	*/
bogdanm	0:9b334a45a8ff	683	#define __HAL_LCD_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__))
bogdanm	0:9b334a45a8ff	684
bogdanm	0:9b334a45a8ff	685	/** @brief Clears the specified LCD pending flag.
bogdanm	0:9b334a45a8ff	686	* @param __HANDLE__: specifies the LCD Handle.
bogdanm	0:9b334a45a8ff	687	* @param __FLAG__: specifies the flag to clear.
bogdanm	0:9b334a45a8ff	688	* This parameter can be any combination of the following values:
bogdanm	0:9b334a45a8ff	689	* @arg LCD_FLAG_SOF: Start of Frame Interrupt
bogdanm	0:9b334a45a8ff	690	* @arg LCD_FLAG_UDD: Update Display Done Interrupt
bogdanm	0:9b334a45a8ff	691	* @retval None
bogdanm	0:9b334a45a8ff	692	*/
bogdanm	0:9b334a45a8ff	693	#define __HAL_LCD_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->CLR = (__FLAG__))
bogdanm	0:9b334a45a8ff	694
bogdanm	0:9b334a45a8ff	695	/**
bogdanm	0:9b334a45a8ff	696	* @}
bogdanm	0:9b334a45a8ff	697	*/
bogdanm	0:9b334a45a8ff	698
bogdanm	0:9b334a45a8ff	699	/* Exported functions ------------------------------------------------------- */
bogdanm	0:9b334a45a8ff	700
mbed_official	113:b3775bf36a83	701	/** @defgroup LCD_Exported_Functions LCD Exported Functions
bogdanm	0:9b334a45a8ff	702	* @{
bogdanm	0:9b334a45a8ff	703	*/
bogdanm	0:9b334a45a8ff	704
mbed_official	113:b3775bf36a83	705	/** @defgroup LCD_Exported_Functions_Group1 Initialization and de-initialization methods
bogdanm	0:9b334a45a8ff	706	* @{
bogdanm	0:9b334a45a8ff	707	*/
bogdanm	0:9b334a45a8ff	708
bogdanm	0:9b334a45a8ff	709	/* Initialization/de-initialization methods **********************************/
bogdanm	0:9b334a45a8ff	710	HAL_StatusTypeDef HAL_LCD_DeInit(LCD_HandleTypeDef *hlcd);
bogdanm	0:9b334a45a8ff	711	HAL_StatusTypeDef HAL_LCD_Init(LCD_HandleTypeDef *hlcd);
bogdanm	0:9b334a45a8ff	712	void HAL_LCD_MspInit(LCD_HandleTypeDef *hlcd);
bogdanm	0:9b334a45a8ff	713	void HAL_LCD_MspDeInit(LCD_HandleTypeDef *hlcd);
bogdanm	0:9b334a45a8ff	714
bogdanm	0:9b334a45a8ff	715	/**
bogdanm	0:9b334a45a8ff	716	* @}
bogdanm	0:9b334a45a8ff	717	*/
bogdanm	0:9b334a45a8ff	718
mbed_official	113:b3775bf36a83	719	/** @defgroup LCD_Exported_Functions_Group2 IO operation methods
bogdanm	0:9b334a45a8ff	720	* @{
bogdanm	0:9b334a45a8ff	721	*/
bogdanm	0:9b334a45a8ff	722
bogdanm	0:9b334a45a8ff	723	/* IO operation methods *******************************************************/
bogdanm	0:9b334a45a8ff	724	HAL_StatusTypeDef HAL_LCD_Write(LCD_HandleTypeDef *hlcd, uint32_t RAMRegisterIndex, uint32_t RAMRegisterMask, uint32_t Data);
bogdanm	0:9b334a45a8ff	725	HAL_StatusTypeDef HAL_LCD_Clear(LCD_HandleTypeDef *hlcd);
bogdanm	0:9b334a45a8ff	726	HAL_StatusTypeDef HAL_LCD_UpdateDisplayRequest(LCD_HandleTypeDef *hlcd);
bogdanm	0:9b334a45a8ff	727
bogdanm	0:9b334a45a8ff	728	/**
bogdanm	0:9b334a45a8ff	729	* @}
bogdanm	0:9b334a45a8ff	730	*/
bogdanm	0:9b334a45a8ff	731
mbed_official	113:b3775bf36a83	732	/** @defgroup LCD_Exported_Functions_Group3 Peripheral State methods
bogdanm	0:9b334a45a8ff	733	* @{
bogdanm	0:9b334a45a8ff	734	*/
bogdanm	0:9b334a45a8ff	735
bogdanm	0:9b334a45a8ff	736	/* Peripheral State methods **************************************************/
bogdanm	0:9b334a45a8ff	737	HAL_LCD_StateTypeDef HAL_LCD_GetState(LCD_HandleTypeDef *hlcd);
bogdanm	0:9b334a45a8ff	738	uint32_t HAL_LCD_GetError(LCD_HandleTypeDef *hlcd);
bogdanm	0:9b334a45a8ff	739
bogdanm	0:9b334a45a8ff	740	/**
bogdanm	0:9b334a45a8ff	741	* @}
bogdanm	0:9b334a45a8ff	742	*/
bogdanm	0:9b334a45a8ff	743
bogdanm	0:9b334a45a8ff	744	/**
bogdanm	0:9b334a45a8ff	745	* @}
bogdanm	0:9b334a45a8ff	746	*/
bogdanm	0:9b334a45a8ff	747
mbed_official	113:b3775bf36a83	748	/** @addtogroup LCD_Private
bogdanm	0:9b334a45a8ff	749	* @{
bogdanm	0:9b334a45a8ff	750	*/
bogdanm	0:9b334a45a8ff	751
bogdanm	0:9b334a45a8ff	752	/* Private functions ---------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	753	HAL_StatusTypeDef LCD_WaitForSynchro(LCD_HandleTypeDef *hlcd);
bogdanm	0:9b334a45a8ff	754
bogdanm	0:9b334a45a8ff	755	/**
bogdanm	0:9b334a45a8ff	756	* @}
bogdanm	0:9b334a45a8ff	757	*/
bogdanm	0:9b334a45a8ff	758
mbed_official	113:b3775bf36a83	759	/* Define the private group ***********************************/
mbed_official	113:b3775bf36a83	760	/**************************************************************/
mbed_official	113:b3775bf36a83	761	/** @defgroup LCD_Private LCD Private
mbed_official	113:b3775bf36a83	762	* @{
mbed_official	113:b3775bf36a83	763	*/
mbed_official	113:b3775bf36a83	764	/**
mbed_official	113:b3775bf36a83	765	* @}
mbed_official	113:b3775bf36a83	766	*/
mbed_official	113:b3775bf36a83	767	/**************************************************************/
mbed_official	113:b3775bf36a83	768
bogdanm	0:9b334a45a8ff	769	/**
bogdanm	0:9b334a45a8ff	770	* @}
bogdanm	0:9b334a45a8ff	771	*/
bogdanm	0:9b334a45a8ff	772
bogdanm	0:9b334a45a8ff	773	/**
bogdanm	0:9b334a45a8ff	774	* @}
bogdanm	0:9b334a45a8ff	775	*/
bogdanm	0:9b334a45a8ff	776
bogdanm	0:9b334a45a8ff	777	#ifdef __cplusplus
bogdanm	0:9b334a45a8ff	778	}
bogdanm	0:9b334a45a8ff	779	#endif
bogdanm	0:9b334a45a8ff	780
bogdanm	0:9b334a45a8ff	781	#endif /* __STM32L0xx_HAL_LCD_H */
bogdanm	0:9b334a45a8ff	782
bogdanm	0:9b334a45a8ff	783
bogdanm	0:9b334a45a8ff	784	#endif /* STM32L053xx \|\| STM32L063xx \|\| STM32L073xx \|\| STM32L083xx */
bogdanm	0:9b334a45a8ff	785
mbed_official	113:b3775bf36a83	786	/***************** (C) COPYRIGHT 2016 STMicroelectronics *END OF FILE**/
bogdanm	0:9b334a45a8ff	787

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Type:	Library
Created:	16 May 2016
Imports:	1
Forks:	0
Commits:	130
Dependents:	1
Dependencies:	0
Followers:	1

targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_lcd.h@113:b3775bf36a83, 2016-04-19 (annotated)

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