fix LPC812 PWM
Fork of mbed-dev by
targets/cmsis/TARGET_STM/TARGET_STM32F7/stm32f7xx_ll_sdmmc.c@83:a036322b8637, 2016-03-07 (annotated)
- Committer:
- mbed_official
- Date:
- Mon Mar 07 10:00:14 2016 +0000
- Revision:
- 83:a036322b8637
- Parent:
- 0:9b334a45a8ff
Synchronized with git revision ee20d03969aa5c570152f88e8f3d8a4739eed40b
Full URL: https://github.com/mbedmicro/mbed/commit/ee20d03969aa5c570152f88e8f3d8a4739eed40b/
[STM32F7] Update STM32F7Cube_FW version
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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bogdanm | 0:9b334a45a8ff | 1 | /** |
bogdanm | 0:9b334a45a8ff | 2 | ****************************************************************************** |
bogdanm | 0:9b334a45a8ff | 3 | * @file stm32f7xx_ll_sdmmc.c |
bogdanm | 0:9b334a45a8ff | 4 | * @author MCD Application Team |
mbed_official | 83:a036322b8637 | 5 | * @version V1.0.4 |
mbed_official | 83:a036322b8637 | 6 | * @date 09-December-2015 |
bogdanm | 0:9b334a45a8ff | 7 | * @brief SDMMC Low Layer HAL module driver. |
bogdanm | 0:9b334a45a8ff | 8 | * |
bogdanm | 0:9b334a45a8ff | 9 | * This file provides firmware functions to manage the following |
bogdanm | 0:9b334a45a8ff | 10 | * functionalities of the SDMMC peripheral: |
bogdanm | 0:9b334a45a8ff | 11 | * + Initialization/de-initialization functions |
bogdanm | 0:9b334a45a8ff | 12 | * + I/O operation functions |
bogdanm | 0:9b334a45a8ff | 13 | * + Peripheral Control functions |
bogdanm | 0:9b334a45a8ff | 14 | * + Peripheral State functions |
bogdanm | 0:9b334a45a8ff | 15 | * |
bogdanm | 0:9b334a45a8ff | 16 | @verbatim |
bogdanm | 0:9b334a45a8ff | 17 | ============================================================================== |
bogdanm | 0:9b334a45a8ff | 18 | ##### SDMMC peripheral features ##### |
bogdanm | 0:9b334a45a8ff | 19 | ============================================================================== |
bogdanm | 0:9b334a45a8ff | 20 | [..] The SD/SDMMC MMC card host interface (SDMMC) provides an interface between the APB2 |
bogdanm | 0:9b334a45a8ff | 21 | peripheral bus and MultiMedia cards (MMCs), SD memory cards, SDMMC cards and CE-ATA |
bogdanm | 0:9b334a45a8ff | 22 | devices. |
bogdanm | 0:9b334a45a8ff | 23 | |
bogdanm | 0:9b334a45a8ff | 24 | [..] The SDMMC features include the following: |
bogdanm | 0:9b334a45a8ff | 25 | (+) Full compliance with MultiMedia Card System Specification Version 4.2. Card support |
bogdanm | 0:9b334a45a8ff | 26 | for three different databus modes: 1-bit (default), 4-bit and 8-bit |
bogdanm | 0:9b334a45a8ff | 27 | (+) Full compatibility with previous versions of MultiMedia Cards (forward compatibility) |
bogdanm | 0:9b334a45a8ff | 28 | (+) Full compliance with SD Memory Card Specifications Version 2.0 |
bogdanm | 0:9b334a45a8ff | 29 | (+) Full compliance with SD I/O Card Specification Version 2.0: card support for two |
bogdanm | 0:9b334a45a8ff | 30 | different data bus modes: 1-bit (default) and 4-bit |
bogdanm | 0:9b334a45a8ff | 31 | (+) Full support of the CE-ATA features (full compliance with CE-ATA digital protocol |
bogdanm | 0:9b334a45a8ff | 32 | Rev1.1) |
bogdanm | 0:9b334a45a8ff | 33 | (+) Data transfer up to 48 MHz for the 8 bit mode |
bogdanm | 0:9b334a45a8ff | 34 | (+) Data and command output enable signals to control external bidirectional drivers. |
bogdanm | 0:9b334a45a8ff | 35 | |
bogdanm | 0:9b334a45a8ff | 36 | |
bogdanm | 0:9b334a45a8ff | 37 | ##### How to use this driver ##### |
bogdanm | 0:9b334a45a8ff | 38 | ============================================================================== |
bogdanm | 0:9b334a45a8ff | 39 | [..] |
bogdanm | 0:9b334a45a8ff | 40 | This driver is a considered as a driver of service for external devices drivers |
bogdanm | 0:9b334a45a8ff | 41 | that interfaces with the SDMMC peripheral. |
bogdanm | 0:9b334a45a8ff | 42 | According to the device used (SD card/ MMC card / SDMMC card ...), a set of APIs |
bogdanm | 0:9b334a45a8ff | 43 | is used in the device's driver to perform SDMMC operations and functionalities. |
bogdanm | 0:9b334a45a8ff | 44 | |
bogdanm | 0:9b334a45a8ff | 45 | This driver is almost transparent for the final user, it is only used to implement other |
bogdanm | 0:9b334a45a8ff | 46 | functionalities of the external device. |
bogdanm | 0:9b334a45a8ff | 47 | |
bogdanm | 0:9b334a45a8ff | 48 | [..] |
bogdanm | 0:9b334a45a8ff | 49 | (+) The SDMMC clock (SDMMCCLK = 48 MHz) is coming from a specific output of PLL |
bogdanm | 0:9b334a45a8ff | 50 | (PLL48CLK). Before start working with SDMMC peripheral make sure that the |
bogdanm | 0:9b334a45a8ff | 51 | PLL is well configured. |
bogdanm | 0:9b334a45a8ff | 52 | The SDMMC peripheral uses two clock signals: |
bogdanm | 0:9b334a45a8ff | 53 | (++) SDMMC adapter clock (SDMMCCLK = 48 MHz) |
bogdanm | 0:9b334a45a8ff | 54 | (++) APB2 bus clock (PCLK2) |
bogdanm | 0:9b334a45a8ff | 55 | |
bogdanm | 0:9b334a45a8ff | 56 | -@@- PCLK2 and SDMMC_CK clock frequencies must respect the following condition: |
bogdanm | 0:9b334a45a8ff | 57 | Frequency(PCLK2) >= (3 / 8 x Frequency(SDMMC_CK)) |
bogdanm | 0:9b334a45a8ff | 58 | |
bogdanm | 0:9b334a45a8ff | 59 | (+) Enable/Disable peripheral clock using RCC peripheral macros related to SDMMC |
bogdanm | 0:9b334a45a8ff | 60 | peripheral. |
bogdanm | 0:9b334a45a8ff | 61 | |
bogdanm | 0:9b334a45a8ff | 62 | (+) Enable the Power ON State using the SDMMC_PowerState_ON(SDMMCx) |
bogdanm | 0:9b334a45a8ff | 63 | function and disable it using the function SDMMC_PowerState_OFF(SDMMCx). |
bogdanm | 0:9b334a45a8ff | 64 | |
bogdanm | 0:9b334a45a8ff | 65 | (+) Enable/Disable the clock using the __SDMMC_ENABLE()/__SDMMC_DISABLE() macros. |
bogdanm | 0:9b334a45a8ff | 66 | |
bogdanm | 0:9b334a45a8ff | 67 | (+) Enable/Disable the peripheral interrupts using the macros __SDMMC_ENABLE_IT(hSDMMC, IT) |
bogdanm | 0:9b334a45a8ff | 68 | and __SDMMC_DISABLE_IT(hSDMMC, IT) if you need to use interrupt mode. |
bogdanm | 0:9b334a45a8ff | 69 | |
bogdanm | 0:9b334a45a8ff | 70 | (+) When using the DMA mode |
bogdanm | 0:9b334a45a8ff | 71 | (++) Configure the DMA in the MSP layer of the external device |
bogdanm | 0:9b334a45a8ff | 72 | (++) Active the needed channel Request |
bogdanm | 0:9b334a45a8ff | 73 | (++) Enable the DMA using __SDMMC_DMA_ENABLE() macro or Disable it using the macro |
bogdanm | 0:9b334a45a8ff | 74 | __SDMMC_DMA_DISABLE(). |
bogdanm | 0:9b334a45a8ff | 75 | |
bogdanm | 0:9b334a45a8ff | 76 | (+) To control the CPSM (Command Path State Machine) and send |
bogdanm | 0:9b334a45a8ff | 77 | commands to the card use the SDMMC_SendCommand(SDMMCx), |
bogdanm | 0:9b334a45a8ff | 78 | SDMMC_GetCommandResponse() and SDMMC_GetResponse() functions. First, user has |
bogdanm | 0:9b334a45a8ff | 79 | to fill the command structure (pointer to SDMMC_CmdInitTypeDef) according |
bogdanm | 0:9b334a45a8ff | 80 | to the selected command to be sent. |
bogdanm | 0:9b334a45a8ff | 81 | The parameters that should be filled are: |
bogdanm | 0:9b334a45a8ff | 82 | (++) Command Argument |
bogdanm | 0:9b334a45a8ff | 83 | (++) Command Index |
bogdanm | 0:9b334a45a8ff | 84 | (++) Command Response type |
bogdanm | 0:9b334a45a8ff | 85 | (++) Command Wait |
bogdanm | 0:9b334a45a8ff | 86 | (++) CPSM Status (Enable or Disable). |
bogdanm | 0:9b334a45a8ff | 87 | |
bogdanm | 0:9b334a45a8ff | 88 | -@@- To check if the command is well received, read the SDMMC_CMDRESP |
bogdanm | 0:9b334a45a8ff | 89 | register using the SDMMC_GetCommandResponse(). |
bogdanm | 0:9b334a45a8ff | 90 | The SDMMC responses registers (SDMMC_RESP1 to SDMMC_RESP2), use the |
bogdanm | 0:9b334a45a8ff | 91 | SDMMC_GetResponse() function. |
bogdanm | 0:9b334a45a8ff | 92 | |
bogdanm | 0:9b334a45a8ff | 93 | (+) To control the DPSM (Data Path State Machine) and send/receive |
bogdanm | 0:9b334a45a8ff | 94 | data to/from the card use the SDMMC_DataConfig(), SDMMC_GetDataCounter(), |
bogdanm | 0:9b334a45a8ff | 95 | SDMMC_ReadFIFO(), DIO_WriteFIFO() and SDMMC_GetFIFOCount() functions. |
bogdanm | 0:9b334a45a8ff | 96 | |
bogdanm | 0:9b334a45a8ff | 97 | *** Read Operations *** |
bogdanm | 0:9b334a45a8ff | 98 | ======================= |
bogdanm | 0:9b334a45a8ff | 99 | [..] |
bogdanm | 0:9b334a45a8ff | 100 | (#) First, user has to fill the data structure (pointer to |
bogdanm | 0:9b334a45a8ff | 101 | SDMMC_DataInitTypeDef) according to the selected data type to be received. |
bogdanm | 0:9b334a45a8ff | 102 | The parameters that should be filled are: |
bogdanm | 0:9b334a45a8ff | 103 | (++) Data TimeOut |
bogdanm | 0:9b334a45a8ff | 104 | (++) Data Length |
bogdanm | 0:9b334a45a8ff | 105 | (++) Data Block size |
bogdanm | 0:9b334a45a8ff | 106 | (++) Data Transfer direction: should be from card (To SDMMC) |
bogdanm | 0:9b334a45a8ff | 107 | (++) Data Transfer mode |
bogdanm | 0:9b334a45a8ff | 108 | (++) DPSM Status (Enable or Disable) |
bogdanm | 0:9b334a45a8ff | 109 | |
bogdanm | 0:9b334a45a8ff | 110 | (#) Configure the SDMMC resources to receive the data from the card |
bogdanm | 0:9b334a45a8ff | 111 | according to selected transfer mode (Refer to Step 8, 9 and 10). |
bogdanm | 0:9b334a45a8ff | 112 | |
bogdanm | 0:9b334a45a8ff | 113 | (#) Send the selected Read command (refer to step 11). |
bogdanm | 0:9b334a45a8ff | 114 | |
bogdanm | 0:9b334a45a8ff | 115 | (#) Use the SDMMC flags/interrupts to check the transfer status. |
bogdanm | 0:9b334a45a8ff | 116 | |
bogdanm | 0:9b334a45a8ff | 117 | *** Write Operations *** |
bogdanm | 0:9b334a45a8ff | 118 | ======================== |
bogdanm | 0:9b334a45a8ff | 119 | [..] |
bogdanm | 0:9b334a45a8ff | 120 | (#) First, user has to fill the data structure (pointer to |
bogdanm | 0:9b334a45a8ff | 121 | SDMMC_DataInitTypeDef) according to the selected data type to be received. |
bogdanm | 0:9b334a45a8ff | 122 | The parameters that should be filled are: |
bogdanm | 0:9b334a45a8ff | 123 | (++) Data TimeOut |
bogdanm | 0:9b334a45a8ff | 124 | (++) Data Length |
bogdanm | 0:9b334a45a8ff | 125 | (++) Data Block size |
bogdanm | 0:9b334a45a8ff | 126 | (++) Data Transfer direction: should be to card (To CARD) |
bogdanm | 0:9b334a45a8ff | 127 | (++) Data Transfer mode |
bogdanm | 0:9b334a45a8ff | 128 | (++) DPSM Status (Enable or Disable) |
bogdanm | 0:9b334a45a8ff | 129 | |
bogdanm | 0:9b334a45a8ff | 130 | (#) Configure the SDMMC resources to send the data to the card according to |
bogdanm | 0:9b334a45a8ff | 131 | selected transfer mode. |
bogdanm | 0:9b334a45a8ff | 132 | |
bogdanm | 0:9b334a45a8ff | 133 | (#) Send the selected Write command. |
bogdanm | 0:9b334a45a8ff | 134 | |
bogdanm | 0:9b334a45a8ff | 135 | (#) Use the SDMMC flags/interrupts to check the transfer status. |
bogdanm | 0:9b334a45a8ff | 136 | |
bogdanm | 0:9b334a45a8ff | 137 | @endverbatim |
bogdanm | 0:9b334a45a8ff | 138 | ****************************************************************************** |
bogdanm | 0:9b334a45a8ff | 139 | * @attention |
bogdanm | 0:9b334a45a8ff | 140 | * |
bogdanm | 0:9b334a45a8ff | 141 | * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> |
bogdanm | 0:9b334a45a8ff | 142 | * |
bogdanm | 0:9b334a45a8ff | 143 | * Redistribution and use in source and binary forms, with or without modification, |
bogdanm | 0:9b334a45a8ff | 144 | * are permitted provided that the following conditions are met: |
bogdanm | 0:9b334a45a8ff | 145 | * 1. Redistributions of source code must retain the above copyright notice, |
bogdanm | 0:9b334a45a8ff | 146 | * this list of conditions and the following disclaimer. |
bogdanm | 0:9b334a45a8ff | 147 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
bogdanm | 0:9b334a45a8ff | 148 | * this list of conditions and the following disclaimer in the documentation |
bogdanm | 0:9b334a45a8ff | 149 | * and/or other materials provided with the distribution. |
bogdanm | 0:9b334a45a8ff | 150 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
bogdanm | 0:9b334a45a8ff | 151 | * may be used to endorse or promote products derived from this software |
bogdanm | 0:9b334a45a8ff | 152 | * without specific prior written permission. |
bogdanm | 0:9b334a45a8ff | 153 | * |
bogdanm | 0:9b334a45a8ff | 154 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
bogdanm | 0:9b334a45a8ff | 155 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
bogdanm | 0:9b334a45a8ff | 156 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
bogdanm | 0:9b334a45a8ff | 157 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
bogdanm | 0:9b334a45a8ff | 158 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
bogdanm | 0:9b334a45a8ff | 159 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
bogdanm | 0:9b334a45a8ff | 160 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
bogdanm | 0:9b334a45a8ff | 161 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
bogdanm | 0:9b334a45a8ff | 162 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
bogdanm | 0:9b334a45a8ff | 163 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
bogdanm | 0:9b334a45a8ff | 164 | * |
bogdanm | 0:9b334a45a8ff | 165 | ****************************************************************************** |
bogdanm | 0:9b334a45a8ff | 166 | */ |
bogdanm | 0:9b334a45a8ff | 167 | |
bogdanm | 0:9b334a45a8ff | 168 | /* Includes ------------------------------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 169 | #include "stm32f7xx_hal.h" |
bogdanm | 0:9b334a45a8ff | 170 | |
bogdanm | 0:9b334a45a8ff | 171 | /** @addtogroup STM32F7xx_HAL_Driver |
bogdanm | 0:9b334a45a8ff | 172 | * @{ |
bogdanm | 0:9b334a45a8ff | 173 | */ |
bogdanm | 0:9b334a45a8ff | 174 | |
bogdanm | 0:9b334a45a8ff | 175 | /** @defgroup SDMMC_LL SDMMC Low Layer |
bogdanm | 0:9b334a45a8ff | 176 | * @brief Low layer module for SD |
bogdanm | 0:9b334a45a8ff | 177 | * @{ |
bogdanm | 0:9b334a45a8ff | 178 | */ |
bogdanm | 0:9b334a45a8ff | 179 | |
bogdanm | 0:9b334a45a8ff | 180 | #if defined (HAL_SD_MODULE_ENABLED) || defined(HAL_MMC_MODULE_ENABLED) |
bogdanm | 0:9b334a45a8ff | 181 | |
bogdanm | 0:9b334a45a8ff | 182 | /* Private typedef -----------------------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 183 | /* Private define ------------------------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 184 | /* Private macro -------------------------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 185 | /* Private variables ---------------------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 186 | /* Private function prototypes -----------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 187 | /* Exported functions --------------------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 188 | |
bogdanm | 0:9b334a45a8ff | 189 | /** @defgroup SDMMC_LL_Exported_Functions SDMMC Low Layer Exported Functions |
bogdanm | 0:9b334a45a8ff | 190 | * @{ |
bogdanm | 0:9b334a45a8ff | 191 | */ |
bogdanm | 0:9b334a45a8ff | 192 | |
bogdanm | 0:9b334a45a8ff | 193 | /** @defgroup HAL_SDMMC_LL_Group1 Initialization de-initialization functions |
bogdanm | 0:9b334a45a8ff | 194 | * @brief Initialization and Configuration functions |
bogdanm | 0:9b334a45a8ff | 195 | * |
bogdanm | 0:9b334a45a8ff | 196 | @verbatim |
bogdanm | 0:9b334a45a8ff | 197 | =============================================================================== |
bogdanm | 0:9b334a45a8ff | 198 | ##### Initialization/de-initialization functions ##### |
bogdanm | 0:9b334a45a8ff | 199 | =============================================================================== |
bogdanm | 0:9b334a45a8ff | 200 | [..] This section provides functions allowing to: |
bogdanm | 0:9b334a45a8ff | 201 | |
bogdanm | 0:9b334a45a8ff | 202 | @endverbatim |
bogdanm | 0:9b334a45a8ff | 203 | * @{ |
bogdanm | 0:9b334a45a8ff | 204 | */ |
bogdanm | 0:9b334a45a8ff | 205 | |
bogdanm | 0:9b334a45a8ff | 206 | /** |
bogdanm | 0:9b334a45a8ff | 207 | * @brief Initializes the SDMMC according to the specified |
bogdanm | 0:9b334a45a8ff | 208 | * parameters in the SDMMC_InitTypeDef and create the associated handle. |
bogdanm | 0:9b334a45a8ff | 209 | * @param SDMMCx: Pointer to SDMMC register base |
bogdanm | 0:9b334a45a8ff | 210 | * @param Init: SDMMC initialization structure |
bogdanm | 0:9b334a45a8ff | 211 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 212 | */ |
bogdanm | 0:9b334a45a8ff | 213 | HAL_StatusTypeDef SDMMC_Init(SDMMC_TypeDef *SDMMCx, SDMMC_InitTypeDef Init) |
bogdanm | 0:9b334a45a8ff | 214 | { |
bogdanm | 0:9b334a45a8ff | 215 | uint32_t tmpreg = 0; |
bogdanm | 0:9b334a45a8ff | 216 | |
bogdanm | 0:9b334a45a8ff | 217 | /* Check the parameters */ |
bogdanm | 0:9b334a45a8ff | 218 | assert_param(IS_SDMMC_ALL_INSTANCE(SDMMCx)); |
bogdanm | 0:9b334a45a8ff | 219 | assert_param(IS_SDMMC_CLOCK_EDGE(Init.ClockEdge)); |
bogdanm | 0:9b334a45a8ff | 220 | assert_param(IS_SDMMC_CLOCK_BYPASS(Init.ClockBypass)); |
bogdanm | 0:9b334a45a8ff | 221 | assert_param(IS_SDMMC_CLOCK_POWER_SAVE(Init.ClockPowerSave)); |
bogdanm | 0:9b334a45a8ff | 222 | assert_param(IS_SDMMC_BUS_WIDE(Init.BusWide)); |
bogdanm | 0:9b334a45a8ff | 223 | assert_param(IS_SDMMC_HARDWARE_FLOW_CONTROL(Init.HardwareFlowControl)); |
bogdanm | 0:9b334a45a8ff | 224 | assert_param(IS_SDMMC_CLKDIV(Init.ClockDiv)); |
bogdanm | 0:9b334a45a8ff | 225 | |
bogdanm | 0:9b334a45a8ff | 226 | /* Set SDMMC configuration parameters */ |
bogdanm | 0:9b334a45a8ff | 227 | tmpreg |= (Init.ClockEdge |\ |
bogdanm | 0:9b334a45a8ff | 228 | Init.ClockBypass |\ |
bogdanm | 0:9b334a45a8ff | 229 | Init.ClockPowerSave |\ |
bogdanm | 0:9b334a45a8ff | 230 | Init.BusWide |\ |
bogdanm | 0:9b334a45a8ff | 231 | Init.HardwareFlowControl |\ |
bogdanm | 0:9b334a45a8ff | 232 | Init.ClockDiv |
bogdanm | 0:9b334a45a8ff | 233 | ); |
bogdanm | 0:9b334a45a8ff | 234 | |
bogdanm | 0:9b334a45a8ff | 235 | /* Write to SDMMC CLKCR */ |
bogdanm | 0:9b334a45a8ff | 236 | MODIFY_REG(SDMMCx->CLKCR, CLKCR_CLEAR_MASK, tmpreg); |
bogdanm | 0:9b334a45a8ff | 237 | |
bogdanm | 0:9b334a45a8ff | 238 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 239 | } |
bogdanm | 0:9b334a45a8ff | 240 | |
bogdanm | 0:9b334a45a8ff | 241 | |
bogdanm | 0:9b334a45a8ff | 242 | |
bogdanm | 0:9b334a45a8ff | 243 | /** |
bogdanm | 0:9b334a45a8ff | 244 | * @} |
bogdanm | 0:9b334a45a8ff | 245 | */ |
bogdanm | 0:9b334a45a8ff | 246 | |
bogdanm | 0:9b334a45a8ff | 247 | /** @defgroup HAL_SDMMC_LL_Group2 IO operation functions |
bogdanm | 0:9b334a45a8ff | 248 | * @brief Data transfers functions |
bogdanm | 0:9b334a45a8ff | 249 | * |
bogdanm | 0:9b334a45a8ff | 250 | @verbatim |
bogdanm | 0:9b334a45a8ff | 251 | =============================================================================== |
bogdanm | 0:9b334a45a8ff | 252 | ##### I/O operation functions ##### |
bogdanm | 0:9b334a45a8ff | 253 | =============================================================================== |
bogdanm | 0:9b334a45a8ff | 254 | [..] |
bogdanm | 0:9b334a45a8ff | 255 | This subsection provides a set of functions allowing to manage the SDMMC data |
bogdanm | 0:9b334a45a8ff | 256 | transfers. |
bogdanm | 0:9b334a45a8ff | 257 | |
bogdanm | 0:9b334a45a8ff | 258 | @endverbatim |
bogdanm | 0:9b334a45a8ff | 259 | * @{ |
bogdanm | 0:9b334a45a8ff | 260 | */ |
bogdanm | 0:9b334a45a8ff | 261 | |
bogdanm | 0:9b334a45a8ff | 262 | /** |
bogdanm | 0:9b334a45a8ff | 263 | * @brief Read data (word) from Rx FIFO in blocking mode (polling) |
bogdanm | 0:9b334a45a8ff | 264 | * @param SDMMCx: Pointer to SDMMC register base |
bogdanm | 0:9b334a45a8ff | 265 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 266 | */ |
bogdanm | 0:9b334a45a8ff | 267 | uint32_t SDMMC_ReadFIFO(SDMMC_TypeDef *SDMMCx) |
bogdanm | 0:9b334a45a8ff | 268 | { |
bogdanm | 0:9b334a45a8ff | 269 | /* Read data from Rx FIFO */ |
bogdanm | 0:9b334a45a8ff | 270 | return (SDMMCx->FIFO); |
bogdanm | 0:9b334a45a8ff | 271 | } |
bogdanm | 0:9b334a45a8ff | 272 | |
bogdanm | 0:9b334a45a8ff | 273 | /** |
bogdanm | 0:9b334a45a8ff | 274 | * @brief Write data (word) to Tx FIFO in blocking mode (polling) |
bogdanm | 0:9b334a45a8ff | 275 | * @param SDMMCx: Pointer to SDMMC register base |
bogdanm | 0:9b334a45a8ff | 276 | * @param pWriteData: pointer to data to write |
bogdanm | 0:9b334a45a8ff | 277 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 278 | */ |
bogdanm | 0:9b334a45a8ff | 279 | HAL_StatusTypeDef SDMMC_WriteFIFO(SDMMC_TypeDef *SDMMCx, uint32_t *pWriteData) |
bogdanm | 0:9b334a45a8ff | 280 | { |
bogdanm | 0:9b334a45a8ff | 281 | /* Write data to FIFO */ |
bogdanm | 0:9b334a45a8ff | 282 | SDMMCx->FIFO = *pWriteData; |
bogdanm | 0:9b334a45a8ff | 283 | |
bogdanm | 0:9b334a45a8ff | 284 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 285 | } |
bogdanm | 0:9b334a45a8ff | 286 | |
bogdanm | 0:9b334a45a8ff | 287 | /** |
bogdanm | 0:9b334a45a8ff | 288 | * @} |
bogdanm | 0:9b334a45a8ff | 289 | */ |
bogdanm | 0:9b334a45a8ff | 290 | |
bogdanm | 0:9b334a45a8ff | 291 | /** @defgroup HAL_SDMMC_LL_Group3 Peripheral Control functions |
bogdanm | 0:9b334a45a8ff | 292 | * @brief management functions |
bogdanm | 0:9b334a45a8ff | 293 | * |
bogdanm | 0:9b334a45a8ff | 294 | @verbatim |
bogdanm | 0:9b334a45a8ff | 295 | =============================================================================== |
bogdanm | 0:9b334a45a8ff | 296 | ##### Peripheral Control functions ##### |
bogdanm | 0:9b334a45a8ff | 297 | =============================================================================== |
bogdanm | 0:9b334a45a8ff | 298 | [..] |
bogdanm | 0:9b334a45a8ff | 299 | This subsection provides a set of functions allowing to control the SDMMC data |
bogdanm | 0:9b334a45a8ff | 300 | transfers. |
bogdanm | 0:9b334a45a8ff | 301 | |
bogdanm | 0:9b334a45a8ff | 302 | @endverbatim |
bogdanm | 0:9b334a45a8ff | 303 | * @{ |
bogdanm | 0:9b334a45a8ff | 304 | */ |
bogdanm | 0:9b334a45a8ff | 305 | |
bogdanm | 0:9b334a45a8ff | 306 | /** |
bogdanm | 0:9b334a45a8ff | 307 | * @brief Set SDMMC Power state to ON. |
bogdanm | 0:9b334a45a8ff | 308 | * @param SDMMCx: Pointer to SDMMC register base |
bogdanm | 0:9b334a45a8ff | 309 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 310 | */ |
bogdanm | 0:9b334a45a8ff | 311 | HAL_StatusTypeDef SDMMC_PowerState_ON(SDMMC_TypeDef *SDMMCx) |
bogdanm | 0:9b334a45a8ff | 312 | { |
bogdanm | 0:9b334a45a8ff | 313 | /* Set power state to ON */ |
bogdanm | 0:9b334a45a8ff | 314 | SDMMCx->POWER = SDMMC_POWER_PWRCTRL; |
bogdanm | 0:9b334a45a8ff | 315 | |
bogdanm | 0:9b334a45a8ff | 316 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 317 | } |
bogdanm | 0:9b334a45a8ff | 318 | |
bogdanm | 0:9b334a45a8ff | 319 | /** |
bogdanm | 0:9b334a45a8ff | 320 | * @brief Set SDMMC Power state to OFF. |
bogdanm | 0:9b334a45a8ff | 321 | * @param SDMMCx: Pointer to SDMMC register base |
bogdanm | 0:9b334a45a8ff | 322 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 323 | */ |
bogdanm | 0:9b334a45a8ff | 324 | HAL_StatusTypeDef SDMMC_PowerState_OFF(SDMMC_TypeDef *SDMMCx) |
bogdanm | 0:9b334a45a8ff | 325 | { |
bogdanm | 0:9b334a45a8ff | 326 | /* Set power state to OFF */ |
bogdanm | 0:9b334a45a8ff | 327 | SDMMCx->POWER = (uint32_t)0x00000000; |
bogdanm | 0:9b334a45a8ff | 328 | |
bogdanm | 0:9b334a45a8ff | 329 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 330 | } |
bogdanm | 0:9b334a45a8ff | 331 | |
bogdanm | 0:9b334a45a8ff | 332 | /** |
bogdanm | 0:9b334a45a8ff | 333 | * @brief Get SDMMC Power state. |
bogdanm | 0:9b334a45a8ff | 334 | * @param SDMMCx: Pointer to SDMMC register base |
bogdanm | 0:9b334a45a8ff | 335 | * @retval Power status of the controller. The returned value can be one of the |
bogdanm | 0:9b334a45a8ff | 336 | * following values: |
bogdanm | 0:9b334a45a8ff | 337 | * - 0x00: Power OFF |
bogdanm | 0:9b334a45a8ff | 338 | * - 0x02: Power UP |
bogdanm | 0:9b334a45a8ff | 339 | * - 0x03: Power ON |
bogdanm | 0:9b334a45a8ff | 340 | */ |
bogdanm | 0:9b334a45a8ff | 341 | uint32_t SDMMC_GetPowerState(SDMMC_TypeDef *SDMMCx) |
bogdanm | 0:9b334a45a8ff | 342 | { |
bogdanm | 0:9b334a45a8ff | 343 | return (SDMMCx->POWER & SDMMC_POWER_PWRCTRL); |
bogdanm | 0:9b334a45a8ff | 344 | } |
bogdanm | 0:9b334a45a8ff | 345 | |
bogdanm | 0:9b334a45a8ff | 346 | /** |
bogdanm | 0:9b334a45a8ff | 347 | * @brief Configure the SDMMC command path according to the specified parameters in |
bogdanm | 0:9b334a45a8ff | 348 | * SDMMC_CmdInitTypeDef structure and send the command |
bogdanm | 0:9b334a45a8ff | 349 | * @param SDMMCx: Pointer to SDMMC register base |
bogdanm | 0:9b334a45a8ff | 350 | * @param Command: pointer to a SDMMC_CmdInitTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 351 | * the configuration information for the SDMMC command |
bogdanm | 0:9b334a45a8ff | 352 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 353 | */ |
bogdanm | 0:9b334a45a8ff | 354 | HAL_StatusTypeDef SDMMC_SendCommand(SDMMC_TypeDef *SDMMCx, SDMMC_CmdInitTypeDef *Command) |
bogdanm | 0:9b334a45a8ff | 355 | { |
bogdanm | 0:9b334a45a8ff | 356 | uint32_t tmpreg = 0; |
bogdanm | 0:9b334a45a8ff | 357 | |
bogdanm | 0:9b334a45a8ff | 358 | /* Check the parameters */ |
bogdanm | 0:9b334a45a8ff | 359 | assert_param(IS_SDMMC_CMD_INDEX(Command->CmdIndex)); |
bogdanm | 0:9b334a45a8ff | 360 | assert_param(IS_SDMMC_RESPONSE(Command->Response)); |
bogdanm | 0:9b334a45a8ff | 361 | assert_param(IS_SDMMC_WAIT(Command->WaitForInterrupt)); |
bogdanm | 0:9b334a45a8ff | 362 | assert_param(IS_SDMMC_CPSM(Command->CPSM)); |
bogdanm | 0:9b334a45a8ff | 363 | |
bogdanm | 0:9b334a45a8ff | 364 | /* Set the SDMMC Argument value */ |
bogdanm | 0:9b334a45a8ff | 365 | SDMMCx->ARG = Command->Argument; |
bogdanm | 0:9b334a45a8ff | 366 | |
bogdanm | 0:9b334a45a8ff | 367 | /* Set SDMMC command parameters */ |
bogdanm | 0:9b334a45a8ff | 368 | tmpreg |= (uint32_t)(Command->CmdIndex |\ |
bogdanm | 0:9b334a45a8ff | 369 | Command->Response |\ |
bogdanm | 0:9b334a45a8ff | 370 | Command->WaitForInterrupt |\ |
bogdanm | 0:9b334a45a8ff | 371 | Command->CPSM); |
bogdanm | 0:9b334a45a8ff | 372 | |
bogdanm | 0:9b334a45a8ff | 373 | /* Write to SDMMC CMD register */ |
bogdanm | 0:9b334a45a8ff | 374 | MODIFY_REG(SDMMCx->CMD, CMD_CLEAR_MASK, tmpreg); |
bogdanm | 0:9b334a45a8ff | 375 | |
bogdanm | 0:9b334a45a8ff | 376 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 377 | } |
bogdanm | 0:9b334a45a8ff | 378 | |
bogdanm | 0:9b334a45a8ff | 379 | /** |
bogdanm | 0:9b334a45a8ff | 380 | * @brief Return the command index of last command for which response received |
bogdanm | 0:9b334a45a8ff | 381 | * @param SDMMCx: Pointer to SDMMC register base |
bogdanm | 0:9b334a45a8ff | 382 | * @retval Command index of the last command response received |
bogdanm | 0:9b334a45a8ff | 383 | */ |
bogdanm | 0:9b334a45a8ff | 384 | uint8_t SDMMC_GetCommandResponse(SDMMC_TypeDef *SDMMCx) |
bogdanm | 0:9b334a45a8ff | 385 | { |
bogdanm | 0:9b334a45a8ff | 386 | return (uint8_t)(SDMMCx->RESPCMD); |
bogdanm | 0:9b334a45a8ff | 387 | } |
bogdanm | 0:9b334a45a8ff | 388 | |
bogdanm | 0:9b334a45a8ff | 389 | |
bogdanm | 0:9b334a45a8ff | 390 | /** |
bogdanm | 0:9b334a45a8ff | 391 | * @brief Return the response received from the card for the last command |
bogdanm | 0:9b334a45a8ff | 392 | * @param SDMMCx: Pointer to SDMMC register base |
bogdanm | 0:9b334a45a8ff | 393 | * @param Response: Specifies the SDMMC response register. |
bogdanm | 0:9b334a45a8ff | 394 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 395 | * @arg SDMMC_RESP1: Response Register 1 |
bogdanm | 0:9b334a45a8ff | 396 | * @arg SDMMC_RESP2: Response Register 2 |
bogdanm | 0:9b334a45a8ff | 397 | * @arg SDMMC_RESP3: Response Register 3 |
bogdanm | 0:9b334a45a8ff | 398 | * @arg SDMMC_RESP4: Response Register 4 |
bogdanm | 0:9b334a45a8ff | 399 | * @retval The Corresponding response register value |
bogdanm | 0:9b334a45a8ff | 400 | */ |
bogdanm | 0:9b334a45a8ff | 401 | uint32_t SDMMC_GetResponse(SDMMC_TypeDef *SDMMCx, uint32_t Response) |
bogdanm | 0:9b334a45a8ff | 402 | { |
bogdanm | 0:9b334a45a8ff | 403 | __IO uint32_t tmp = 0; |
bogdanm | 0:9b334a45a8ff | 404 | |
bogdanm | 0:9b334a45a8ff | 405 | /* Check the parameters */ |
bogdanm | 0:9b334a45a8ff | 406 | assert_param(IS_SDMMC_RESP(Response)); |
bogdanm | 0:9b334a45a8ff | 407 | |
bogdanm | 0:9b334a45a8ff | 408 | /* Get the response */ |
bogdanm | 0:9b334a45a8ff | 409 | tmp = (uint32_t)&(SDMMCx->RESP1) + Response; |
bogdanm | 0:9b334a45a8ff | 410 | |
bogdanm | 0:9b334a45a8ff | 411 | return (*(__IO uint32_t *) tmp); |
bogdanm | 0:9b334a45a8ff | 412 | } |
bogdanm | 0:9b334a45a8ff | 413 | |
bogdanm | 0:9b334a45a8ff | 414 | /** |
bogdanm | 0:9b334a45a8ff | 415 | * @brief Configure the SDMMC data path according to the specified |
bogdanm | 0:9b334a45a8ff | 416 | * parameters in the SDMMC_DataInitTypeDef. |
bogdanm | 0:9b334a45a8ff | 417 | * @param SDMMCx: Pointer to SDMMC register base |
bogdanm | 0:9b334a45a8ff | 418 | * @param Data : pointer to a SDMMC_DataInitTypeDef structure |
bogdanm | 0:9b334a45a8ff | 419 | * that contains the configuration information for the SDMMC data. |
bogdanm | 0:9b334a45a8ff | 420 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 421 | */ |
bogdanm | 0:9b334a45a8ff | 422 | HAL_StatusTypeDef SDMMC_DataConfig(SDMMC_TypeDef *SDMMCx, SDMMC_DataInitTypeDef* Data) |
bogdanm | 0:9b334a45a8ff | 423 | { |
bogdanm | 0:9b334a45a8ff | 424 | uint32_t tmpreg = 0; |
bogdanm | 0:9b334a45a8ff | 425 | |
bogdanm | 0:9b334a45a8ff | 426 | /* Check the parameters */ |
bogdanm | 0:9b334a45a8ff | 427 | assert_param(IS_SDMMC_DATA_LENGTH(Data->DataLength)); |
bogdanm | 0:9b334a45a8ff | 428 | assert_param(IS_SDMMC_BLOCK_SIZE(Data->DataBlockSize)); |
bogdanm | 0:9b334a45a8ff | 429 | assert_param(IS_SDMMC_TRANSFER_DIR(Data->TransferDir)); |
bogdanm | 0:9b334a45a8ff | 430 | assert_param(IS_SDMMC_TRANSFER_MODE(Data->TransferMode)); |
bogdanm | 0:9b334a45a8ff | 431 | assert_param(IS_SDMMC_DPSM(Data->DPSM)); |
bogdanm | 0:9b334a45a8ff | 432 | |
bogdanm | 0:9b334a45a8ff | 433 | /* Set the SDMMC Data TimeOut value */ |
bogdanm | 0:9b334a45a8ff | 434 | SDMMCx->DTIMER = Data->DataTimeOut; |
bogdanm | 0:9b334a45a8ff | 435 | |
bogdanm | 0:9b334a45a8ff | 436 | /* Set the SDMMC DataLength value */ |
bogdanm | 0:9b334a45a8ff | 437 | SDMMCx->DLEN = Data->DataLength; |
bogdanm | 0:9b334a45a8ff | 438 | |
bogdanm | 0:9b334a45a8ff | 439 | /* Set the SDMMC data configuration parameters */ |
bogdanm | 0:9b334a45a8ff | 440 | tmpreg |= (uint32_t)(Data->DataBlockSize |\ |
bogdanm | 0:9b334a45a8ff | 441 | Data->TransferDir |\ |
bogdanm | 0:9b334a45a8ff | 442 | Data->TransferMode |\ |
bogdanm | 0:9b334a45a8ff | 443 | Data->DPSM); |
bogdanm | 0:9b334a45a8ff | 444 | |
bogdanm | 0:9b334a45a8ff | 445 | /* Write to SDMMC DCTRL */ |
bogdanm | 0:9b334a45a8ff | 446 | MODIFY_REG(SDMMCx->DCTRL, DCTRL_CLEAR_MASK, tmpreg); |
bogdanm | 0:9b334a45a8ff | 447 | |
bogdanm | 0:9b334a45a8ff | 448 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 449 | |
bogdanm | 0:9b334a45a8ff | 450 | } |
bogdanm | 0:9b334a45a8ff | 451 | |
bogdanm | 0:9b334a45a8ff | 452 | /** |
bogdanm | 0:9b334a45a8ff | 453 | * @brief Returns number of remaining data bytes to be transferred. |
bogdanm | 0:9b334a45a8ff | 454 | * @param SDMMCx: Pointer to SDMMC register base |
bogdanm | 0:9b334a45a8ff | 455 | * @retval Number of remaining data bytes to be transferred |
bogdanm | 0:9b334a45a8ff | 456 | */ |
bogdanm | 0:9b334a45a8ff | 457 | uint32_t SDMMC_GetDataCounter(SDMMC_TypeDef *SDMMCx) |
bogdanm | 0:9b334a45a8ff | 458 | { |
bogdanm | 0:9b334a45a8ff | 459 | return (SDMMCx->DCOUNT); |
bogdanm | 0:9b334a45a8ff | 460 | } |
bogdanm | 0:9b334a45a8ff | 461 | |
bogdanm | 0:9b334a45a8ff | 462 | /** |
bogdanm | 0:9b334a45a8ff | 463 | * @brief Get the FIFO data |
bogdanm | 0:9b334a45a8ff | 464 | * @param SDMMCx: Pointer to SDMMC register base |
bogdanm | 0:9b334a45a8ff | 465 | * @retval Data received |
bogdanm | 0:9b334a45a8ff | 466 | */ |
bogdanm | 0:9b334a45a8ff | 467 | uint32_t SDMMC_GetFIFOCount(SDMMC_TypeDef *SDMMCx) |
bogdanm | 0:9b334a45a8ff | 468 | { |
bogdanm | 0:9b334a45a8ff | 469 | return (SDMMCx->FIFO); |
bogdanm | 0:9b334a45a8ff | 470 | } |
bogdanm | 0:9b334a45a8ff | 471 | |
bogdanm | 0:9b334a45a8ff | 472 | |
bogdanm | 0:9b334a45a8ff | 473 | /** |
bogdanm | 0:9b334a45a8ff | 474 | * @brief Sets one of the two options of inserting read wait interval. |
bogdanm | 0:9b334a45a8ff | 475 | * @param SDMMCx: Pointer to SDMMC register base |
bogdanm | 0:9b334a45a8ff | 476 | * @param SDMMC_ReadWaitMode: SDMMC Read Wait operation mode. |
bogdanm | 0:9b334a45a8ff | 477 | * This parameter can be: |
bogdanm | 0:9b334a45a8ff | 478 | * @arg SDMMC_READ_WAIT_MODE_CLK: Read Wait control by stopping SDMMCCLK |
bogdanm | 0:9b334a45a8ff | 479 | * @arg SDMMC_READ_WAIT_MODE_DATA2: Read Wait control using SDMMC_DATA2 |
bogdanm | 0:9b334a45a8ff | 480 | * @retval None |
bogdanm | 0:9b334a45a8ff | 481 | */ |
bogdanm | 0:9b334a45a8ff | 482 | HAL_StatusTypeDef SDMMC_SetSDMMCReadWaitMode(SDMMC_TypeDef *SDMMCx, uint32_t SDMMC_ReadWaitMode) |
bogdanm | 0:9b334a45a8ff | 483 | { |
bogdanm | 0:9b334a45a8ff | 484 | /* Check the parameters */ |
bogdanm | 0:9b334a45a8ff | 485 | assert_param(IS_SDMMC_READWAIT_MODE(SDMMC_ReadWaitMode)); |
bogdanm | 0:9b334a45a8ff | 486 | |
bogdanm | 0:9b334a45a8ff | 487 | /* Set SDMMC read wait mode */ |
mbed_official | 83:a036322b8637 | 488 | MODIFY_REG(SDMMCx->DCTRL, SDMMC_DCTRL_RWMOD, SDMMC_ReadWaitMode); |
bogdanm | 0:9b334a45a8ff | 489 | |
bogdanm | 0:9b334a45a8ff | 490 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 491 | } |
bogdanm | 0:9b334a45a8ff | 492 | |
bogdanm | 0:9b334a45a8ff | 493 | /** |
bogdanm | 0:9b334a45a8ff | 494 | * @} |
bogdanm | 0:9b334a45a8ff | 495 | */ |
bogdanm | 0:9b334a45a8ff | 496 | |
bogdanm | 0:9b334a45a8ff | 497 | /** |
bogdanm | 0:9b334a45a8ff | 498 | * @} |
bogdanm | 0:9b334a45a8ff | 499 | */ |
bogdanm | 0:9b334a45a8ff | 500 | |
bogdanm | 0:9b334a45a8ff | 501 | #endif /* (HAL_SD_MODULE_ENABLED) || (HAL_MMC_MODULE_ENABLED) */ |
bogdanm | 0:9b334a45a8ff | 502 | /** |
bogdanm | 0:9b334a45a8ff | 503 | * @} |
bogdanm | 0:9b334a45a8ff | 504 | */ |
bogdanm | 0:9b334a45a8ff | 505 | |
bogdanm | 0:9b334a45a8ff | 506 | /** |
bogdanm | 0:9b334a45a8ff | 507 | * @} |
bogdanm | 0:9b334a45a8ff | 508 | */ |
bogdanm | 0:9b334a45a8ff | 509 | |
bogdanm | 0:9b334a45a8ff | 510 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |