mbed-dev - fix LPC812 PWM

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fix LPC812 PWM

targets/cmsis/TARGET_STM/TARGET_STM32F7/stm32f7xx_hal_uart.h@83:a036322b8637, 2016-03-07 (annotated)

Committer:: mbed_official
Date:: Mon Mar 07 10:00:14 2016 +0000
Revision:: 83:a036322b8637
Parent:: 0:9b334a45a8ff

Synchronized with git revision ee20d03969aa5c570152f88e8f3d8a4739eed40b



Full URL: https://github.com/mbedmicro/mbed/commit/ee20d03969aa5c570152f88e8f3d8a4739eed40b/



[STM32F7] Update STM32F7Cube_FW version

Who changed what in which revision?

User	Revision	Line number	New contents of line
bogdanm	0:9b334a45a8ff	1	/**
bogdanm	0:9b334a45a8ff	2	******************************************************************************
bogdanm	0:9b334a45a8ff	3	* @file stm32f7xx_hal_uart.h
bogdanm	0:9b334a45a8ff	4	* @author MCD Application Team
mbed_official	83:a036322b8637	5	* @version V1.0.4
mbed_official	83:a036322b8637	6	* @date 09-December-2015
bogdanm	0:9b334a45a8ff	7	* @brief Header file of UART HAL module.
bogdanm	0:9b334a45a8ff	8	******************************************************************************
bogdanm	0:9b334a45a8ff	9	* @attention
bogdanm	0:9b334a45a8ff	10	*
bogdanm	0:9b334a45a8ff	11	* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
bogdanm	0:9b334a45a8ff	12	*
bogdanm	0:9b334a45a8ff	13	* Redistribution and use in source and binary forms, with or without modification,
bogdanm	0:9b334a45a8ff	14	* are permitted provided that the following conditions are met:
bogdanm	0:9b334a45a8ff	15	* 1. Redistributions of source code must retain the above copyright notice,
bogdanm	0:9b334a45a8ff	16	* this list of conditions and the following disclaimer.
bogdanm	0:9b334a45a8ff	17	* 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm	0:9b334a45a8ff	18	* this list of conditions and the following disclaimer in the documentation
bogdanm	0:9b334a45a8ff	19	* and/or other materials provided with the distribution.
bogdanm	0:9b334a45a8ff	20	* 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm	0:9b334a45a8ff	21	* may be used to endorse or promote products derived from this software
bogdanm	0:9b334a45a8ff	22	* without specific prior written permission.
bogdanm	0:9b334a45a8ff	23	*
bogdanm	0:9b334a45a8ff	24	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm	0:9b334a45a8ff	25	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm	0:9b334a45a8ff	26	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm	0:9b334a45a8ff	27	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm	0:9b334a45a8ff	28	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm	0:9b334a45a8ff	29	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm	0:9b334a45a8ff	30	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm	0:9b334a45a8ff	31	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm	0:9b334a45a8ff	32	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm	0:9b334a45a8ff	33	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm	0:9b334a45a8ff	34	*
bogdanm	0:9b334a45a8ff	35	******************************************************************************
bogdanm	0:9b334a45a8ff	36	*/
bogdanm	0:9b334a45a8ff	37
bogdanm	0:9b334a45a8ff	38	/* Define to prevent recursive inclusion -------------------------------------*/
bogdanm	0:9b334a45a8ff	39	#ifndef __STM32F7xx_HAL_UART_H
bogdanm	0:9b334a45a8ff	40	#define __STM32F7xx_HAL_UART_H
bogdanm	0:9b334a45a8ff	41
bogdanm	0:9b334a45a8ff	42	#ifdef __cplusplus
bogdanm	0:9b334a45a8ff	43	extern "C" {
bogdanm	0:9b334a45a8ff	44	#endif
bogdanm	0:9b334a45a8ff	45
bogdanm	0:9b334a45a8ff	46	/* Includes ------------------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	47	#include "stm32f7xx_hal_def.h"
bogdanm	0:9b334a45a8ff	48
bogdanm	0:9b334a45a8ff	49	/** @addtogroup STM32F7xx_HAL_Driver
bogdanm	0:9b334a45a8ff	50	* @{
bogdanm	0:9b334a45a8ff	51	*/
bogdanm	0:9b334a45a8ff	52
bogdanm	0:9b334a45a8ff	53	/** @addtogroup UART
bogdanm	0:9b334a45a8ff	54	* @{
bogdanm	0:9b334a45a8ff	55	*/
bogdanm	0:9b334a45a8ff	56
bogdanm	0:9b334a45a8ff	57	/* Exported types ------------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	58	/** @defgroup UART_Exported_Types UART Exported Types
bogdanm	0:9b334a45a8ff	59	* @{
bogdanm	0:9b334a45a8ff	60	*/
bogdanm	0:9b334a45a8ff	61
bogdanm	0:9b334a45a8ff	62	/**
bogdanm	0:9b334a45a8ff	63	* @brief UART Init Structure definition
bogdanm	0:9b334a45a8ff	64	*/
bogdanm	0:9b334a45a8ff	65	typedef struct
bogdanm	0:9b334a45a8ff	66	{
bogdanm	0:9b334a45a8ff	67	uint32_t BaudRate; /*!< This member configures the UART communication baud rate.
bogdanm	0:9b334a45a8ff	68	The baud rate register is computed using the following formula:
bogdanm	0:9b334a45a8ff	69	- If oversampling is 16 or in LIN mode,
bogdanm	0:9b334a45a8ff	70	Baud Rate Register = ((PCLKx) / ((huart->Init.BaudRate)))
bogdanm	0:9b334a45a8ff	71	- If oversampling is 8,
bogdanm	0:9b334a45a8ff	72	Baud Rate Register[15:4] = ((2 * PCLKx) / ((huart->Init.BaudRate)))[15:4]
bogdanm	0:9b334a45a8ff	73	Baud Rate Register[3] = 0
bogdanm	0:9b334a45a8ff	74	Baud Rate Register[2:0] = (((2 * PCLKx) / ((huart->Init.BaudRate)))[3:0]) >> 1 */
bogdanm	0:9b334a45a8ff	75
bogdanm	0:9b334a45a8ff	76	uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame.
bogdanm	0:9b334a45a8ff	77	This parameter can be a value of @ref UARTEx_Word_Length */
bogdanm	0:9b334a45a8ff	78
bogdanm	0:9b334a45a8ff	79	uint32_t StopBits; /*!< Specifies the number of stop bits transmitted.
bogdanm	0:9b334a45a8ff	80	This parameter can be a value of @ref UART_Stop_Bits */
bogdanm	0:9b334a45a8ff	81
bogdanm	0:9b334a45a8ff	82	uint32_t Parity; /*!< Specifies the parity mode.
bogdanm	0:9b334a45a8ff	83	This parameter can be a value of @ref UART_Parity
bogdanm	0:9b334a45a8ff	84	@note When parity is enabled, the computed parity is inserted
bogdanm	0:9b334a45a8ff	85	at the MSB position of the transmitted data (9th bit when
bogdanm	0:9b334a45a8ff	86	the word length is set to 9 data bits; 8th bit when the
bogdanm	0:9b334a45a8ff	87	word length is set to 8 data bits). */
bogdanm	0:9b334a45a8ff	88
bogdanm	0:9b334a45a8ff	89	uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled.
bogdanm	0:9b334a45a8ff	90	This parameter can be a value of @ref UART_Mode */
bogdanm	0:9b334a45a8ff	91
bogdanm	0:9b334a45a8ff	92	uint32_t HwFlowCtl; /*!< Specifies whether the hardware flow control mode is enabled
bogdanm	0:9b334a45a8ff	93	or disabled.
bogdanm	0:9b334a45a8ff	94	This parameter can be a value of @ref UART_Hardware_Flow_Control */
bogdanm	0:9b334a45a8ff	95
bogdanm	0:9b334a45a8ff	96	uint32_t OverSampling; /*!< Specifies whether the Over sampling 8 is enabled or disabled, to achieve higher speed (up to fPCLK/8).
bogdanm	0:9b334a45a8ff	97	This parameter can be a value of @ref UART_Over_Sampling */
bogdanm	0:9b334a45a8ff	98
bogdanm	0:9b334a45a8ff	99	uint32_t OneBitSampling; /*!< Specifies whether a single sample or three samples' majority vote is selected.
bogdanm	0:9b334a45a8ff	100	Selecting the single sample method increases the receiver tolerance to clock
bogdanm	0:9b334a45a8ff	101	deviations. This parameter can be a value of @ref UART_OneBit_Sampling */
bogdanm	0:9b334a45a8ff	102	}UART_InitTypeDef;
bogdanm	0:9b334a45a8ff	103
bogdanm	0:9b334a45a8ff	104	/**
mbed_official	83:a036322b8637	105	* @brief UART Advanced Features initialization structure definition
bogdanm	0:9b334a45a8ff	106	*/
bogdanm	0:9b334a45a8ff	107	typedef struct
bogdanm	0:9b334a45a8ff	108	{
bogdanm	0:9b334a45a8ff	109	uint32_t AdvFeatureInit; /*!< Specifies which advanced UART features is initialized. Several
bogdanm	0:9b334a45a8ff	110	Advanced Features may be initialized at the same time .
bogdanm	0:9b334a45a8ff	111	This parameter can be a value of @ref UART_Advanced_Features_Initialization_Type */
bogdanm	0:9b334a45a8ff	112
bogdanm	0:9b334a45a8ff	113	uint32_t TxPinLevelInvert; /*!< Specifies whether the TX pin active level is inverted.
bogdanm	0:9b334a45a8ff	114	This parameter can be a value of @ref UART_Tx_Inv */
bogdanm	0:9b334a45a8ff	115
bogdanm	0:9b334a45a8ff	116	uint32_t RxPinLevelInvert; /*!< Specifies whether the RX pin active level is inverted.
bogdanm	0:9b334a45a8ff	117	This parameter can be a value of @ref UART_Rx_Inv */
bogdanm	0:9b334a45a8ff	118
bogdanm	0:9b334a45a8ff	119	uint32_t DataInvert; /*!< Specifies whether data are inverted (positive/direct logic
bogdanm	0:9b334a45a8ff	120	vs negative/inverted logic).
bogdanm	0:9b334a45a8ff	121	This parameter can be a value of @ref UART_Data_Inv */
bogdanm	0:9b334a45a8ff	122
bogdanm	0:9b334a45a8ff	123	uint32_t Swap; /*!< Specifies whether TX and RX pins are swapped.
bogdanm	0:9b334a45a8ff	124	This parameter can be a value of @ref UART_Rx_Tx_Swap */
bogdanm	0:9b334a45a8ff	125
bogdanm	0:9b334a45a8ff	126	uint32_t OverrunDisable; /*!< Specifies whether the reception overrun detection is disabled.
bogdanm	0:9b334a45a8ff	127	This parameter can be a value of @ref UART_Overrun_Disable */
bogdanm	0:9b334a45a8ff	128
bogdanm	0:9b334a45a8ff	129	uint32_t DMADisableonRxError; /*!< Specifies whether the DMA is disabled in case of reception error.
bogdanm	0:9b334a45a8ff	130	This parameter can be a value of @ref UART_DMA_Disable_on_Rx_Error */
bogdanm	0:9b334a45a8ff	131
bogdanm	0:9b334a45a8ff	132	uint32_t AutoBaudRateEnable; /*!< Specifies whether auto Baud rate detection is enabled.
bogdanm	0:9b334a45a8ff	133	This parameter can be a value of @ref UART_AutoBaudRate_Enable */
bogdanm	0:9b334a45a8ff	134
bogdanm	0:9b334a45a8ff	135	uint32_t AutoBaudRateMode; /*!< If auto Baud rate detection is enabled, specifies how the rate
bogdanm	0:9b334a45a8ff	136	detection is carried out.
bogdanm	0:9b334a45a8ff	137	This parameter can be a value of @ref UART_AutoBaud_Rate_Mode */
bogdanm	0:9b334a45a8ff	138
bogdanm	0:9b334a45a8ff	139	uint32_t MSBFirst; /*!< Specifies whether MSB is sent first on UART line.
bogdanm	0:9b334a45a8ff	140	This parameter can be a value of @ref UART_MSB_First */
bogdanm	0:9b334a45a8ff	141	} UART_AdvFeatureInitTypeDef;
bogdanm	0:9b334a45a8ff	142
bogdanm	0:9b334a45a8ff	143
bogdanm	0:9b334a45a8ff	144
bogdanm	0:9b334a45a8ff	145	/**
bogdanm	0:9b334a45a8ff	146	* @brief HAL UART State structures definition
bogdanm	0:9b334a45a8ff	147	*/
bogdanm	0:9b334a45a8ff	148	typedef enum
bogdanm	0:9b334a45a8ff	149	{
bogdanm	0:9b334a45a8ff	150	HAL_UART_STATE_RESET = 0x00, /!< Peripheral is not initialized /
bogdanm	0:9b334a45a8ff	151	HAL_UART_STATE_READY = 0x01, /!< Peripheral Initialized and ready for use /
bogdanm	0:9b334a45a8ff	152	HAL_UART_STATE_BUSY = 0x02, /!< an internal process is ongoing /
bogdanm	0:9b334a45a8ff	153	HAL_UART_STATE_BUSY_TX = 0x12, /!< Data Transmission process is ongoing /
bogdanm	0:9b334a45a8ff	154	HAL_UART_STATE_BUSY_RX = 0x22, /!< Data Reception process is ongoing /
bogdanm	0:9b334a45a8ff	155	HAL_UART_STATE_BUSY_TX_RX = 0x32, /!< Data Transmission and Reception process is ongoing /
bogdanm	0:9b334a45a8ff	156	HAL_UART_STATE_TIMEOUT = 0x03, /!< Timeout state /
bogdanm	0:9b334a45a8ff	157	HAL_UART_STATE_ERROR = 0x04 /!< Error /
bogdanm	0:9b334a45a8ff	158	}HAL_UART_StateTypeDef;
bogdanm	0:9b334a45a8ff	159
bogdanm	0:9b334a45a8ff	160	/**
bogdanm	0:9b334a45a8ff	161	* @brief UART clock sources definition
bogdanm	0:9b334a45a8ff	162	*/
bogdanm	0:9b334a45a8ff	163	typedef enum
bogdanm	0:9b334a45a8ff	164	{
bogdanm	0:9b334a45a8ff	165	UART_CLOCKSOURCE_PCLK1 = 0x00, /!< PCLK1 clock source /
bogdanm	0:9b334a45a8ff	166	UART_CLOCKSOURCE_PCLK2 = 0x01, /!< PCLK2 clock source /
bogdanm	0:9b334a45a8ff	167	UART_CLOCKSOURCE_HSI = 0x02, /!< HSI clock source /
bogdanm	0:9b334a45a8ff	168	UART_CLOCKSOURCE_SYSCLK = 0x04, /!< SYSCLK clock source /
bogdanm	0:9b334a45a8ff	169	UART_CLOCKSOURCE_LSE = 0x08, /!< LSE clock source /
bogdanm	0:9b334a45a8ff	170	UART_CLOCKSOURCE_UNDEFINED = 0x10 /!< Undefined clock source /
bogdanm	0:9b334a45a8ff	171	}UART_ClockSourceTypeDef;
bogdanm	0:9b334a45a8ff	172
bogdanm	0:9b334a45a8ff	173	/**
bogdanm	0:9b334a45a8ff	174	* @brief UART handle Structure definition
bogdanm	0:9b334a45a8ff	175	*/
bogdanm	0:9b334a45a8ff	176	typedef struct
bogdanm	0:9b334a45a8ff	177	{
bogdanm	0:9b334a45a8ff	178	USART_TypeDef Instance; /!< UART registers base address */
bogdanm	0:9b334a45a8ff	179
bogdanm	0:9b334a45a8ff	180	UART_InitTypeDef Init; /!< UART communication parameters /
bogdanm	0:9b334a45a8ff	181
bogdanm	0:9b334a45a8ff	182	UART_AdvFeatureInitTypeDef AdvancedInit; /!< UART Advanced Features initialization parameters /
bogdanm	0:9b334a45a8ff	183
bogdanm	0:9b334a45a8ff	184	uint8_t pTxBuffPtr; /!< Pointer to UART Tx transfer Buffer */
bogdanm	0:9b334a45a8ff	185
bogdanm	0:9b334a45a8ff	186	uint16_t TxXferSize; /!< UART Tx Transfer size /
bogdanm	0:9b334a45a8ff	187
bogdanm	0:9b334a45a8ff	188	uint16_t TxXferCount; /!< UART Tx Transfer Counter /
bogdanm	0:9b334a45a8ff	189
bogdanm	0:9b334a45a8ff	190	uint8_t pRxBuffPtr; /!< Pointer to UART Rx transfer Buffer */
bogdanm	0:9b334a45a8ff	191
bogdanm	0:9b334a45a8ff	192	uint16_t RxXferSize; /!< UART Rx Transfer size /
bogdanm	0:9b334a45a8ff	193
bogdanm	0:9b334a45a8ff	194	uint16_t RxXferCount; /!< UART Rx Transfer Counter /
bogdanm	0:9b334a45a8ff	195
bogdanm	0:9b334a45a8ff	196	uint16_t Mask; /!< UART Rx RDR register mask /
bogdanm	0:9b334a45a8ff	197
bogdanm	0:9b334a45a8ff	198	DMA_HandleTypeDef hdmatx; /!< UART Tx DMA Handle parameters */
bogdanm	0:9b334a45a8ff	199
bogdanm	0:9b334a45a8ff	200	DMA_HandleTypeDef hdmarx; /!< UART Rx DMA Handle parameters */
bogdanm	0:9b334a45a8ff	201
bogdanm	0:9b334a45a8ff	202	HAL_LockTypeDef Lock; /!< Locking object /
bogdanm	0:9b334a45a8ff	203
bogdanm	0:9b334a45a8ff	204	__IO HAL_UART_StateTypeDef State; /!< UART communication state /
bogdanm	0:9b334a45a8ff	205
bogdanm	0:9b334a45a8ff	206	__IO uint32_t ErrorCode; /!< UART Error code /
bogdanm	0:9b334a45a8ff	207
bogdanm	0:9b334a45a8ff	208	}UART_HandleTypeDef;
bogdanm	0:9b334a45a8ff	209
bogdanm	0:9b334a45a8ff	210	/**
bogdanm	0:9b334a45a8ff	211	* @}
bogdanm	0:9b334a45a8ff	212	*/
bogdanm	0:9b334a45a8ff	213
bogdanm	0:9b334a45a8ff	214	/* Exported constants --------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	215	/** @defgroup UART_Exported_Constants UART Exported Constants
bogdanm	0:9b334a45a8ff	216	* @{
bogdanm	0:9b334a45a8ff	217	*/
bogdanm	0:9b334a45a8ff	218	/** @defgroup UART_Error_Definition UART Error Definition
bogdanm	0:9b334a45a8ff	219	* @{
bogdanm	0:9b334a45a8ff	220	*/
bogdanm	0:9b334a45a8ff	221	#define HAL_UART_ERROR_NONE ((uint32_t)0x00000000) /!< No error /
bogdanm	0:9b334a45a8ff	222	#define HAL_UART_ERROR_PE ((uint32_t)0x00000001) /!< Parity error /
bogdanm	0:9b334a45a8ff	223	#define HAL_UART_ERROR_NE ((uint32_t)0x00000002) /!< Noise error /
bogdanm	0:9b334a45a8ff	224	#define HAL_UART_ERROR_FE ((uint32_t)0x00000004) /!< frame error /
bogdanm	0:9b334a45a8ff	225	#define HAL_UART_ERROR_ORE ((uint32_t)0x00000008) /!< Overrun error /
bogdanm	0:9b334a45a8ff	226	#define HAL_UART_ERROR_DMA ((uint32_t)0x00000010) /!< DMA transfer error /
bogdanm	0:9b334a45a8ff	227	/**
bogdanm	0:9b334a45a8ff	228	* @}
bogdanm	0:9b334a45a8ff	229	*/
bogdanm	0:9b334a45a8ff	230	/** @defgroup UART_Stop_Bits UART Number of Stop Bits
bogdanm	0:9b334a45a8ff	231	* @{
bogdanm	0:9b334a45a8ff	232	*/
bogdanm	0:9b334a45a8ff	233	#define UART_STOPBITS_1 ((uint32_t)0x0000)
bogdanm	0:9b334a45a8ff	234	#define UART_STOPBITS_2 ((uint32_t)USART_CR2_STOP_1)
bogdanm	0:9b334a45a8ff	235	/**
bogdanm	0:9b334a45a8ff	236	* @}
bogdanm	0:9b334a45a8ff	237	*/
bogdanm	0:9b334a45a8ff	238
bogdanm	0:9b334a45a8ff	239	/** @defgroup UART_Parity UART Parity
bogdanm	0:9b334a45a8ff	240	* @{
bogdanm	0:9b334a45a8ff	241	*/
bogdanm	0:9b334a45a8ff	242	#define UART_PARITY_NONE ((uint32_t)0x00000000)
bogdanm	0:9b334a45a8ff	243	#define UART_PARITY_EVEN ((uint32_t)USART_CR1_PCE)
bogdanm	0:9b334a45a8ff	244	#define UART_PARITY_ODD ((uint32_t)(USART_CR1_PCE \| USART_CR1_PS))
bogdanm	0:9b334a45a8ff	245	/**
bogdanm	0:9b334a45a8ff	246	* @}
bogdanm	0:9b334a45a8ff	247	*/
bogdanm	0:9b334a45a8ff	248
bogdanm	0:9b334a45a8ff	249	/** @defgroup UART_Hardware_Flow_Control UART Hardware Flow Control
bogdanm	0:9b334a45a8ff	250	* @{
bogdanm	0:9b334a45a8ff	251	*/
bogdanm	0:9b334a45a8ff	252	#define UART_HWCONTROL_NONE ((uint32_t)0x00000000)
bogdanm	0:9b334a45a8ff	253	#define UART_HWCONTROL_RTS ((uint32_t)USART_CR3_RTSE)
bogdanm	0:9b334a45a8ff	254	#define UART_HWCONTROL_CTS ((uint32_t)USART_CR3_CTSE)
bogdanm	0:9b334a45a8ff	255	#define UART_HWCONTROL_RTS_CTS ((uint32_t)(USART_CR3_RTSE \| USART_CR3_CTSE))
bogdanm	0:9b334a45a8ff	256	/**
bogdanm	0:9b334a45a8ff	257	* @}
bogdanm	0:9b334a45a8ff	258	*/
bogdanm	0:9b334a45a8ff	259
bogdanm	0:9b334a45a8ff	260	/** @defgroup UART_Mode UART Transfer Mode
bogdanm	0:9b334a45a8ff	261	* @{
bogdanm	0:9b334a45a8ff	262	*/
bogdanm	0:9b334a45a8ff	263	#define UART_MODE_RX ((uint32_t)USART_CR1_RE)
bogdanm	0:9b334a45a8ff	264	#define UART_MODE_TX ((uint32_t)USART_CR1_TE)
bogdanm	0:9b334a45a8ff	265	#define UART_MODE_TX_RX ((uint32_t)(USART_CR1_TE \|USART_CR1_RE))
bogdanm	0:9b334a45a8ff	266	/**
bogdanm	0:9b334a45a8ff	267	* @}
bogdanm	0:9b334a45a8ff	268	*/
bogdanm	0:9b334a45a8ff	269
bogdanm	0:9b334a45a8ff	270	/** @defgroup UART_State UART State
bogdanm	0:9b334a45a8ff	271	* @{
bogdanm	0:9b334a45a8ff	272	*/
bogdanm	0:9b334a45a8ff	273	#define UART_STATE_DISABLE ((uint32_t)0x00000000)
bogdanm	0:9b334a45a8ff	274	#define UART_STATE_ENABLE ((uint32_t)USART_CR1_UE)
bogdanm	0:9b334a45a8ff	275	/**
bogdanm	0:9b334a45a8ff	276	* @}
bogdanm	0:9b334a45a8ff	277	*/
bogdanm	0:9b334a45a8ff	278
bogdanm	0:9b334a45a8ff	279	/** @defgroup UART_Over_Sampling UART Over Sampling
bogdanm	0:9b334a45a8ff	280	* @{
bogdanm	0:9b334a45a8ff	281	*/
bogdanm	0:9b334a45a8ff	282	#define UART_OVERSAMPLING_16 ((uint32_t)0x00000000)
bogdanm	0:9b334a45a8ff	283	#define UART_OVERSAMPLING_8 ((uint32_t)USART_CR1_OVER8)
bogdanm	0:9b334a45a8ff	284	/**
bogdanm	0:9b334a45a8ff	285	* @}
bogdanm	0:9b334a45a8ff	286	*/
bogdanm	0:9b334a45a8ff	287
bogdanm	0:9b334a45a8ff	288	/** @defgroup UART_OneBit_Sampling UART One Bit Sampling Method
bogdanm	0:9b334a45a8ff	289	* @{
bogdanm	0:9b334a45a8ff	290	*/
bogdanm	0:9b334a45a8ff	291	#define UART_ONE_BIT_SAMPLE_DISABLE ((uint32_t)0x00000000)
bogdanm	0:9b334a45a8ff	292	#define UART_ONE_BIT_SAMPLE_ENABLE ((uint32_t)USART_CR3_ONEBIT)
bogdanm	0:9b334a45a8ff	293	/**
bogdanm	0:9b334a45a8ff	294	* @}
bogdanm	0:9b334a45a8ff	295	*/
bogdanm	0:9b334a45a8ff	296
bogdanm	0:9b334a45a8ff	297	/** @defgroup UART_AutoBaud_Rate_Mode UART Advanced Feature AutoBaud Rate Mode
bogdanm	0:9b334a45a8ff	298	* @{
bogdanm	0:9b334a45a8ff	299	*/
bogdanm	0:9b334a45a8ff	300	#define UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT ((uint32_t)0x0000)
bogdanm	0:9b334a45a8ff	301	#define UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE ((uint32_t)USART_CR2_ABRMODE_0)
bogdanm	0:9b334a45a8ff	302	#define UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME ((uint32_t)USART_CR2_ABRMODE_1)
bogdanm	0:9b334a45a8ff	303	#define UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME ((uint32_t)USART_CR2_ABRMODE)
bogdanm	0:9b334a45a8ff	304	/**
bogdanm	0:9b334a45a8ff	305	* @}
bogdanm	0:9b334a45a8ff	306	*/
bogdanm	0:9b334a45a8ff	307
bogdanm	0:9b334a45a8ff	308	/** @defgroup UART_Receiver_TimeOut UART Receiver TimeOut
bogdanm	0:9b334a45a8ff	309	* @{
bogdanm	0:9b334a45a8ff	310	*/
bogdanm	0:9b334a45a8ff	311	#define UART_RECEIVER_TIMEOUT_DISABLE ((uint32_t)0x00000000)
bogdanm	0:9b334a45a8ff	312	#define UART_RECEIVER_TIMEOUT_ENABLE ((uint32_t)USART_CR2_RTOEN)
bogdanm	0:9b334a45a8ff	313	/**
bogdanm	0:9b334a45a8ff	314	* @}
bogdanm	0:9b334a45a8ff	315	*/
bogdanm	0:9b334a45a8ff	316
bogdanm	0:9b334a45a8ff	317	/** @defgroup UART_LIN UART Local Interconnection Network mode
bogdanm	0:9b334a45a8ff	318	* @{
bogdanm	0:9b334a45a8ff	319	*/
bogdanm	0:9b334a45a8ff	320	#define UART_LIN_DISABLE ((uint32_t)0x00000000)
bogdanm	0:9b334a45a8ff	321	#define UART_LIN_ENABLE ((uint32_t)USART_CR2_LINEN)
bogdanm	0:9b334a45a8ff	322	/**
bogdanm	0:9b334a45a8ff	323	* @}
bogdanm	0:9b334a45a8ff	324	*/
bogdanm	0:9b334a45a8ff	325
bogdanm	0:9b334a45a8ff	326	/** @defgroup UART_LIN_Break_Detection UART LIN Break Detection
bogdanm	0:9b334a45a8ff	327	* @{
bogdanm	0:9b334a45a8ff	328	*/
bogdanm	0:9b334a45a8ff	329	#define UART_LINBREAKDETECTLENGTH_10B ((uint32_t)0x00000000)
bogdanm	0:9b334a45a8ff	330	#define UART_LINBREAKDETECTLENGTH_11B ((uint32_t)USART_CR2_LBDL)
bogdanm	0:9b334a45a8ff	331	/**
bogdanm	0:9b334a45a8ff	332	* @}
bogdanm	0:9b334a45a8ff	333	*/
bogdanm	0:9b334a45a8ff	334
bogdanm	0:9b334a45a8ff	335	/** @defgroup UART_DMA_Tx UART DMA Tx
bogdanm	0:9b334a45a8ff	336	* @{
bogdanm	0:9b334a45a8ff	337	*/
bogdanm	0:9b334a45a8ff	338	#define UART_DMA_TX_DISABLE ((uint32_t)0x00000000)
bogdanm	0:9b334a45a8ff	339	#define UART_DMA_TX_ENABLE ((uint32_t)USART_CR3_DMAT)
bogdanm	0:9b334a45a8ff	340	/**
bogdanm	0:9b334a45a8ff	341	* @}
bogdanm	0:9b334a45a8ff	342	*/
bogdanm	0:9b334a45a8ff	343
bogdanm	0:9b334a45a8ff	344	/** @defgroup UART_DMA_Rx UART DMA Rx
bogdanm	0:9b334a45a8ff	345	* @{
bogdanm	0:9b334a45a8ff	346	*/
bogdanm	0:9b334a45a8ff	347	#define UART_DMA_RX_DISABLE ((uint32_t)0x0000)
bogdanm	0:9b334a45a8ff	348	#define UART_DMA_RX_ENABLE ((uint32_t)USART_CR3_DMAR)
bogdanm	0:9b334a45a8ff	349	/**
bogdanm	0:9b334a45a8ff	350	* @}
bogdanm	0:9b334a45a8ff	351	*/
bogdanm	0:9b334a45a8ff	352
bogdanm	0:9b334a45a8ff	353	/** @defgroup UART_Half_Duplex_Selection UART Half Duplex Selection
bogdanm	0:9b334a45a8ff	354	* @{
bogdanm	0:9b334a45a8ff	355	*/
bogdanm	0:9b334a45a8ff	356	#define UART_HALF_DUPLEX_DISABLE ((uint32_t)0x0000)
bogdanm	0:9b334a45a8ff	357	#define UART_HALF_DUPLEX_ENABLE ((uint32_t)USART_CR3_HDSEL)
bogdanm	0:9b334a45a8ff	358	/**
bogdanm	0:9b334a45a8ff	359	* @}
bogdanm	0:9b334a45a8ff	360	*/
bogdanm	0:9b334a45a8ff	361
bogdanm	0:9b334a45a8ff	362	/** @defgroup UART_WakeUp_Methods UART WakeUp Methods
bogdanm	0:9b334a45a8ff	363	* @{
bogdanm	0:9b334a45a8ff	364	*/
bogdanm	0:9b334a45a8ff	365	#define UART_WAKEUPMETHOD_IDLELINE ((uint32_t)0x00000000)
bogdanm	0:9b334a45a8ff	366	#define UART_WAKEUPMETHOD_ADDRESSMARK ((uint32_t)USART_CR1_WAKE)
bogdanm	0:9b334a45a8ff	367	/**
bogdanm	0:9b334a45a8ff	368	* @}
bogdanm	0:9b334a45a8ff	369	*/
bogdanm	0:9b334a45a8ff	370
bogdanm	0:9b334a45a8ff	371	/** @defgroup UART_Request_Parameters UART Request Parameters
bogdanm	0:9b334a45a8ff	372	* @{
bogdanm	0:9b334a45a8ff	373	*/
bogdanm	0:9b334a45a8ff	374	#define UART_AUTOBAUD_REQUEST ((uint32_t)USART_RQR_ABRRQ) /!< Auto-Baud Rate Request /
bogdanm	0:9b334a45a8ff	375	#define UART_SENDBREAK_REQUEST ((uint32_t)USART_RQR_SBKRQ) /!< Send Break Request /
bogdanm	0:9b334a45a8ff	376	#define UART_MUTE_MODE_REQUEST ((uint32_t)USART_RQR_MMRQ) /!< Mute Mode Request /
bogdanm	0:9b334a45a8ff	377	#define UART_RXDATA_FLUSH_REQUEST ((uint32_t)USART_RQR_RXFRQ) /!< Receive Data flush Request /
bogdanm	0:9b334a45a8ff	378	#define UART_TXDATA_FLUSH_REQUEST ((uint32_t)USART_RQR_TXFRQ) /!< Transmit data flush Request /
bogdanm	0:9b334a45a8ff	379	/**
bogdanm	0:9b334a45a8ff	380	* @}
bogdanm	0:9b334a45a8ff	381	*/
bogdanm	0:9b334a45a8ff	382
bogdanm	0:9b334a45a8ff	383	/** @defgroup UART_Advanced_Features_Initialization_Type UART Advanced Feature Initialization Type
bogdanm	0:9b334a45a8ff	384	* @{
bogdanm	0:9b334a45a8ff	385	*/
bogdanm	0:9b334a45a8ff	386	#define UART_ADVFEATURE_NO_INIT ((uint32_t)0x00000000)
bogdanm	0:9b334a45a8ff	387	#define UART_ADVFEATURE_TXINVERT_INIT ((uint32_t)0x00000001)
bogdanm	0:9b334a45a8ff	388	#define UART_ADVFEATURE_RXINVERT_INIT ((uint32_t)0x00000002)
bogdanm	0:9b334a45a8ff	389	#define UART_ADVFEATURE_DATAINVERT_INIT ((uint32_t)0x00000004)
bogdanm	0:9b334a45a8ff	390	#define UART_ADVFEATURE_SWAP_INIT ((uint32_t)0x00000008)
bogdanm	0:9b334a45a8ff	391	#define UART_ADVFEATURE_RXOVERRUNDISABLE_INIT ((uint32_t)0x00000010)
bogdanm	0:9b334a45a8ff	392	#define UART_ADVFEATURE_DMADISABLEONERROR_INIT ((uint32_t)0x00000020)
bogdanm	0:9b334a45a8ff	393	#define UART_ADVFEATURE_AUTOBAUDRATE_INIT ((uint32_t)0x00000040)
bogdanm	0:9b334a45a8ff	394	#define UART_ADVFEATURE_MSBFIRST_INIT ((uint32_t)0x00000080)
bogdanm	0:9b334a45a8ff	395	/**
bogdanm	0:9b334a45a8ff	396	* @}
bogdanm	0:9b334a45a8ff	397	*/
bogdanm	0:9b334a45a8ff	398
bogdanm	0:9b334a45a8ff	399	/** @defgroup UART_Tx_Inv UART Advanced Feature TX Pin Active Level Inversion
bogdanm	0:9b334a45a8ff	400	* @{
bogdanm	0:9b334a45a8ff	401	*/
bogdanm	0:9b334a45a8ff	402	#define UART_ADVFEATURE_TXINV_DISABLE ((uint32_t)0x00000000)
bogdanm	0:9b334a45a8ff	403	#define UART_ADVFEATURE_TXINV_ENABLE ((uint32_t)USART_CR2_TXINV)
bogdanm	0:9b334a45a8ff	404	/**
bogdanm	0:9b334a45a8ff	405	* @}
bogdanm	0:9b334a45a8ff	406	*/
bogdanm	0:9b334a45a8ff	407
bogdanm	0:9b334a45a8ff	408	/** @defgroup UART_Rx_Inv UART Advanced Feature RX Pin Active Level Inversion
bogdanm	0:9b334a45a8ff	409	* @{
bogdanm	0:9b334a45a8ff	410	*/
bogdanm	0:9b334a45a8ff	411	#define UART_ADVFEATURE_RXINV_DISABLE ((uint32_t)0x00000000)
bogdanm	0:9b334a45a8ff	412	#define UART_ADVFEATURE_RXINV_ENABLE ((uint32_t)USART_CR2_RXINV)
bogdanm	0:9b334a45a8ff	413	/**
bogdanm	0:9b334a45a8ff	414	* @}
bogdanm	0:9b334a45a8ff	415	*/
bogdanm	0:9b334a45a8ff	416
bogdanm	0:9b334a45a8ff	417	/** @defgroup UART_Data_Inv UART Advanced Feature Binary Data Inversion
bogdanm	0:9b334a45a8ff	418	* @{
bogdanm	0:9b334a45a8ff	419	*/
bogdanm	0:9b334a45a8ff	420	#define UART_ADVFEATURE_DATAINV_DISABLE ((uint32_t)0x00000000)
bogdanm	0:9b334a45a8ff	421	#define UART_ADVFEATURE_DATAINV_ENABLE ((uint32_t)USART_CR2_DATAINV)
bogdanm	0:9b334a45a8ff	422	/**
bogdanm	0:9b334a45a8ff	423	* @}
bogdanm	0:9b334a45a8ff	424	*/
bogdanm	0:9b334a45a8ff	425
bogdanm	0:9b334a45a8ff	426	/** @defgroup UART_Rx_Tx_Swap UART Advanced Feature RX TX Pins Swap
bogdanm	0:9b334a45a8ff	427	* @{
bogdanm	0:9b334a45a8ff	428	*/
bogdanm	0:9b334a45a8ff	429	#define UART_ADVFEATURE_SWAP_DISABLE ((uint32_t)0x00000000)
bogdanm	0:9b334a45a8ff	430	#define UART_ADVFEATURE_SWAP_ENABLE ((uint32_t)USART_CR2_SWAP)
bogdanm	0:9b334a45a8ff	431	/**
bogdanm	0:9b334a45a8ff	432	* @}
bogdanm	0:9b334a45a8ff	433	*/
bogdanm	0:9b334a45a8ff	434
bogdanm	0:9b334a45a8ff	435	/** @defgroup UART_Overrun_Disable UART Advanced Feature Overrun Disable
bogdanm	0:9b334a45a8ff	436	* @{
bogdanm	0:9b334a45a8ff	437	*/
bogdanm	0:9b334a45a8ff	438	#define UART_ADVFEATURE_OVERRUN_ENABLE ((uint32_t)0x00000000)
bogdanm	0:9b334a45a8ff	439	#define UART_ADVFEATURE_OVERRUN_DISABLE ((uint32_t)USART_CR3_OVRDIS)
bogdanm	0:9b334a45a8ff	440	/**
bogdanm	0:9b334a45a8ff	441	* @}
bogdanm	0:9b334a45a8ff	442	*/
bogdanm	0:9b334a45a8ff	443
bogdanm	0:9b334a45a8ff	444	/** @defgroup UART_AutoBaudRate_Enable UART Advanced Feature Auto BaudRate Enable
bogdanm	0:9b334a45a8ff	445	* @{
bogdanm	0:9b334a45a8ff	446	*/
bogdanm	0:9b334a45a8ff	447	#define UART_ADVFEATURE_AUTOBAUDRATE_DISABLE ((uint32_t)0x00000000)
bogdanm	0:9b334a45a8ff	448	#define UART_ADVFEATURE_AUTOBAUDRATE_ENABLE ((uint32_t)USART_CR2_ABREN)
bogdanm	0:9b334a45a8ff	449	/**
bogdanm	0:9b334a45a8ff	450	* @}
bogdanm	0:9b334a45a8ff	451	*/
bogdanm	0:9b334a45a8ff	452
bogdanm	0:9b334a45a8ff	453	/** @defgroup UART_DMA_Disable_on_Rx_Error UART Advanced Feature DMA Disable On Rx Error
bogdanm	0:9b334a45a8ff	454	* @{
bogdanm	0:9b334a45a8ff	455	*/
bogdanm	0:9b334a45a8ff	456	#define UART_ADVFEATURE_DMA_ENABLEONRXERROR ((uint32_t)0x00000000)
bogdanm	0:9b334a45a8ff	457	#define UART_ADVFEATURE_DMA_DISABLEONRXERROR ((uint32_t)USART_CR3_DDRE)
bogdanm	0:9b334a45a8ff	458	/**
bogdanm	0:9b334a45a8ff	459	* @}
bogdanm	0:9b334a45a8ff	460	*/
bogdanm	0:9b334a45a8ff	461
bogdanm	0:9b334a45a8ff	462	/** @defgroup UART_MSB_First UART Advanced Feature MSB First
bogdanm	0:9b334a45a8ff	463	* @{
bogdanm	0:9b334a45a8ff	464	*/
bogdanm	0:9b334a45a8ff	465	#define UART_ADVFEATURE_MSBFIRST_DISABLE ((uint32_t)0x00000000)
bogdanm	0:9b334a45a8ff	466	#define UART_ADVFEATURE_MSBFIRST_ENABLE ((uint32_t)USART_CR2_MSBFIRST)
bogdanm	0:9b334a45a8ff	467	/**
bogdanm	0:9b334a45a8ff	468	* @}
bogdanm	0:9b334a45a8ff	469	*/
bogdanm	0:9b334a45a8ff	470
bogdanm	0:9b334a45a8ff	471	/** @defgroup UART_Mute_Mode UART Advanced Feature Mute Mode Enable
bogdanm	0:9b334a45a8ff	472	* @{
bogdanm	0:9b334a45a8ff	473	*/
bogdanm	0:9b334a45a8ff	474	#define UART_ADVFEATURE_MUTEMODE_DISABLE ((uint32_t)0x00000000)
bogdanm	0:9b334a45a8ff	475	#define UART_ADVFEATURE_MUTEMODE_ENABLE ((uint32_t)USART_CR1_MME)
bogdanm	0:9b334a45a8ff	476	/**
bogdanm	0:9b334a45a8ff	477	* @}
bogdanm	0:9b334a45a8ff	478	*/
bogdanm	0:9b334a45a8ff	479
bogdanm	0:9b334a45a8ff	480	/** @defgroup UART_CR2_ADDRESS_LSB_POS UART Address-matching LSB Position In CR2 Register
bogdanm	0:9b334a45a8ff	481	* @{
bogdanm	0:9b334a45a8ff	482	*/
bogdanm	0:9b334a45a8ff	483	#define UART_CR2_ADDRESS_LSB_POS ((uint32_t) 24)
bogdanm	0:9b334a45a8ff	484	/**
bogdanm	0:9b334a45a8ff	485	* @}
bogdanm	0:9b334a45a8ff	486	*/
bogdanm	0:9b334a45a8ff	487
bogdanm	0:9b334a45a8ff	488	/** @defgroup UART_DriverEnable_Polarity UART DriverEnable Polarity
bogdanm	0:9b334a45a8ff	489	* @{
bogdanm	0:9b334a45a8ff	490	*/
bogdanm	0:9b334a45a8ff	491	#define UART_DE_POLARITY_HIGH ((uint32_t)0x00000000)
bogdanm	0:9b334a45a8ff	492	#define UART_DE_POLARITY_LOW ((uint32_t)USART_CR3_DEP)
bogdanm	0:9b334a45a8ff	493	/**
bogdanm	0:9b334a45a8ff	494	* @}
bogdanm	0:9b334a45a8ff	495	*/
bogdanm	0:9b334a45a8ff	496
bogdanm	0:9b334a45a8ff	497	/** @defgroup UART_CR1_DEAT_ADDRESS_LSB_POS UART Driver Enable Assertion Time LSB Position In CR1 Register
bogdanm	0:9b334a45a8ff	498	* @{
bogdanm	0:9b334a45a8ff	499	*/
bogdanm	0:9b334a45a8ff	500	#define UART_CR1_DEAT_ADDRESS_LSB_POS ((uint32_t) 21)
bogdanm	0:9b334a45a8ff	501	/**
bogdanm	0:9b334a45a8ff	502	* @}
bogdanm	0:9b334a45a8ff	503	*/
bogdanm	0:9b334a45a8ff	504
bogdanm	0:9b334a45a8ff	505	/** @defgroup UART_CR1_DEDT_ADDRESS_LSB_POS UART Driver Enable DeAssertion Time LSB Position In CR1 Register
bogdanm	0:9b334a45a8ff	506	* @{
bogdanm	0:9b334a45a8ff	507	*/
bogdanm	0:9b334a45a8ff	508	#define UART_CR1_DEDT_ADDRESS_LSB_POS ((uint32_t) 16)
bogdanm	0:9b334a45a8ff	509	/**
bogdanm	0:9b334a45a8ff	510	* @}
bogdanm	0:9b334a45a8ff	511	*/
bogdanm	0:9b334a45a8ff	512
bogdanm	0:9b334a45a8ff	513	/** @defgroup UART_Interruption_Mask UART Interruptions Flag Mask
bogdanm	0:9b334a45a8ff	514	* @{
bogdanm	0:9b334a45a8ff	515	*/
bogdanm	0:9b334a45a8ff	516	#define UART_IT_MASK ((uint32_t)0x001F)
bogdanm	0:9b334a45a8ff	517	/**
bogdanm	0:9b334a45a8ff	518	* @}
bogdanm	0:9b334a45a8ff	519	*/
bogdanm	0:9b334a45a8ff	520
bogdanm	0:9b334a45a8ff	521	/** @defgroup UART_TimeOut_Value UART polling-based communications time-out value
bogdanm	0:9b334a45a8ff	522	* @{
bogdanm	0:9b334a45a8ff	523	*/
bogdanm	0:9b334a45a8ff	524	#define HAL_UART_TIMEOUT_VALUE 0x1FFFFFF
bogdanm	0:9b334a45a8ff	525	/**
bogdanm	0:9b334a45a8ff	526	* @}
bogdanm	0:9b334a45a8ff	527	*/
bogdanm	0:9b334a45a8ff	528
bogdanm	0:9b334a45a8ff	529	/** @defgroup UART_Flags UART Status Flags
bogdanm	0:9b334a45a8ff	530	* Elements values convention: 0xXXXX
bogdanm	0:9b334a45a8ff	531	* - 0xXXXX : Flag mask in the ISR register
bogdanm	0:9b334a45a8ff	532	* @{
bogdanm	0:9b334a45a8ff	533	*/
bogdanm	0:9b334a45a8ff	534	#define UART_FLAG_TEACK ((uint32_t)0x00200000)
bogdanm	0:9b334a45a8ff	535	#define UART_FLAG_SBKF ((uint32_t)0x00040000)
bogdanm	0:9b334a45a8ff	536	#define UART_FLAG_CMF ((uint32_t)0x00020000)
bogdanm	0:9b334a45a8ff	537	#define UART_FLAG_BUSY ((uint32_t)0x00010000)
bogdanm	0:9b334a45a8ff	538	#define UART_FLAG_ABRF ((uint32_t)0x00008000)
bogdanm	0:9b334a45a8ff	539	#define UART_FLAG_ABRE ((uint32_t)0x00004000)
bogdanm	0:9b334a45a8ff	540	#define UART_FLAG_EOBF ((uint32_t)0x00001000)
bogdanm	0:9b334a45a8ff	541	#define UART_FLAG_RTOF ((uint32_t)0x00000800)
bogdanm	0:9b334a45a8ff	542	#define UART_FLAG_CTS ((uint32_t)0x00000400)
bogdanm	0:9b334a45a8ff	543	#define UART_FLAG_CTSIF ((uint32_t)0x00000200)
bogdanm	0:9b334a45a8ff	544	#define UART_FLAG_LBDF ((uint32_t)0x00000100)
bogdanm	0:9b334a45a8ff	545	#define UART_FLAG_TXE ((uint32_t)0x00000080)
bogdanm	0:9b334a45a8ff	546	#define UART_FLAG_TC ((uint32_t)0x00000040)
bogdanm	0:9b334a45a8ff	547	#define UART_FLAG_RXNE ((uint32_t)0x00000020)
bogdanm	0:9b334a45a8ff	548	#define UART_FLAG_IDLE ((uint32_t)0x00000010)
bogdanm	0:9b334a45a8ff	549	#define UART_FLAG_ORE ((uint32_t)0x00000008)
bogdanm	0:9b334a45a8ff	550	#define UART_FLAG_NE ((uint32_t)0x00000004)
bogdanm	0:9b334a45a8ff	551	#define UART_FLAG_FE ((uint32_t)0x00000002)
bogdanm	0:9b334a45a8ff	552	#define UART_FLAG_PE ((uint32_t)0x00000001)
bogdanm	0:9b334a45a8ff	553	/**
bogdanm	0:9b334a45a8ff	554	* @}
bogdanm	0:9b334a45a8ff	555	*/
bogdanm	0:9b334a45a8ff	556
bogdanm	0:9b334a45a8ff	557	/** @defgroup UART_Interrupt_definition UART Interrupts Definition
bogdanm	0:9b334a45a8ff	558	* Elements values convention: 0000ZZZZ0XXYYYYYb
bogdanm	0:9b334a45a8ff	559	* - YYYYY : Interrupt source position in the XX register (5bits)
bogdanm	0:9b334a45a8ff	560	* - XX : Interrupt source register (2bits)
bogdanm	0:9b334a45a8ff	561	* - 01: CR1 register
bogdanm	0:9b334a45a8ff	562	* - 10: CR2 register
bogdanm	0:9b334a45a8ff	563	* - 11: CR3 register
bogdanm	0:9b334a45a8ff	564	* - ZZZZ : Flag position in the ISR register(4bits)
bogdanm	0:9b334a45a8ff	565	* @{
bogdanm	0:9b334a45a8ff	566	*/
bogdanm	0:9b334a45a8ff	567	#define UART_IT_PE ((uint32_t)0x0028)
bogdanm	0:9b334a45a8ff	568	#define UART_IT_TXE ((uint32_t)0x0727)
bogdanm	0:9b334a45a8ff	569	#define UART_IT_TC ((uint32_t)0x0626)
bogdanm	0:9b334a45a8ff	570	#define UART_IT_RXNE ((uint32_t)0x0525)
bogdanm	0:9b334a45a8ff	571	#define UART_IT_IDLE ((uint32_t)0x0424)
bogdanm	0:9b334a45a8ff	572	#define UART_IT_LBD ((uint32_t)0x0846)
bogdanm	0:9b334a45a8ff	573	#define UART_IT_CTS ((uint32_t)0x096A)
bogdanm	0:9b334a45a8ff	574	#define UART_IT_CM ((uint32_t)0x112E)
bogdanm	0:9b334a45a8ff	575
bogdanm	0:9b334a45a8ff	576	/** Elements values convention: 000000000XXYYYYYb
bogdanm	0:9b334a45a8ff	577	* - YYYYY : Interrupt source position in the XX register (5bits)
bogdanm	0:9b334a45a8ff	578	* - XX : Interrupt source register (2bits)
bogdanm	0:9b334a45a8ff	579	* - 01: CR1 register
bogdanm	0:9b334a45a8ff	580	* - 10: CR2 register
bogdanm	0:9b334a45a8ff	581	* - 11: CR3 register
bogdanm	0:9b334a45a8ff	582	*/
bogdanm	0:9b334a45a8ff	583	#define UART_IT_ERR ((uint32_t)0x0060)
bogdanm	0:9b334a45a8ff	584
bogdanm	0:9b334a45a8ff	585	/** Elements values convention: 0000ZZZZ00000000b
bogdanm	0:9b334a45a8ff	586	* - ZZZZ : Flag position in the ISR register(4bits)
bogdanm	0:9b334a45a8ff	587	*/
bogdanm	0:9b334a45a8ff	588	#define UART_IT_ORE ((uint32_t)0x0300)
bogdanm	0:9b334a45a8ff	589	#define UART_IT_NE ((uint32_t)0x0200)
bogdanm	0:9b334a45a8ff	590	#define UART_IT_FE ((uint32_t)0x0100)
bogdanm	0:9b334a45a8ff	591	/**
bogdanm	0:9b334a45a8ff	592	* @}
bogdanm	0:9b334a45a8ff	593	*/
bogdanm	0:9b334a45a8ff	594
bogdanm	0:9b334a45a8ff	595	/** @defgroup UART_IT_CLEAR_Flags UART Interruption Clear Flags
bogdanm	0:9b334a45a8ff	596	* @{
bogdanm	0:9b334a45a8ff	597	*/
bogdanm	0:9b334a45a8ff	598	#define UART_CLEAR_PEF USART_ICR_PECF /!< Parity Error Clear Flag /
bogdanm	0:9b334a45a8ff	599	#define UART_CLEAR_FEF USART_ICR_FECF /!< Framing Error Clear Flag /
bogdanm	0:9b334a45a8ff	600	#define UART_CLEAR_NEF USART_ICR_NCF /!< Noise detected Clear Flag /
bogdanm	0:9b334a45a8ff	601	#define UART_CLEAR_OREF USART_ICR_ORECF /!< OverRun Error Clear Flag /
bogdanm	0:9b334a45a8ff	602	#define UART_CLEAR_IDLEF USART_ICR_IDLECF /!< IDLE line detected Clear Flag /
bogdanm	0:9b334a45a8ff	603	#define UART_CLEAR_TCF USART_ICR_TCCF /!< Transmission Complete Clear Flag /
bogdanm	0:9b334a45a8ff	604	#define UART_CLEAR_LBDF USART_ICR_LBDCF /!< LIN Break Detection Clear Flag /
bogdanm	0:9b334a45a8ff	605	#define UART_CLEAR_CTSF USART_ICR_CTSCF /!< CTS Interrupt Clear Flag /
bogdanm	0:9b334a45a8ff	606	#define UART_CLEAR_RTOF USART_ICR_RTOCF /!< Receiver Time Out Clear Flag /
bogdanm	0:9b334a45a8ff	607	#define UART_CLEAR_EOBF USART_ICR_EOBCF /!< End Of Block Clear Flag /
bogdanm	0:9b334a45a8ff	608	#define UART_CLEAR_CMF USART_ICR_CMCF /!< Character Match Clear Flag /
bogdanm	0:9b334a45a8ff	609	/**
bogdanm	0:9b334a45a8ff	610	* @}
bogdanm	0:9b334a45a8ff	611	*/
bogdanm	0:9b334a45a8ff	612
bogdanm	0:9b334a45a8ff	613
bogdanm	0:9b334a45a8ff	614	/**
bogdanm	0:9b334a45a8ff	615	* @}
bogdanm	0:9b334a45a8ff	616	*/
bogdanm	0:9b334a45a8ff	617
bogdanm	0:9b334a45a8ff	618	/* Exported macros -----------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	619	/** @defgroup UART_Exported_Macros UART Exported Macros
bogdanm	0:9b334a45a8ff	620	* @{
bogdanm	0:9b334a45a8ff	621	*/
bogdanm	0:9b334a45a8ff	622
bogdanm	0:9b334a45a8ff	623	/** @brief Reset UART handle state
bogdanm	0:9b334a45a8ff	624	* @param __HANDLE__: UART handle.
bogdanm	0:9b334a45a8ff	625	* @retval None
bogdanm	0:9b334a45a8ff	626	*/
bogdanm	0:9b334a45a8ff	627	#define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_UART_STATE_RESET)
bogdanm	0:9b334a45a8ff	628
bogdanm	0:9b334a45a8ff	629	/** @brief Flush the UART Data registers
bogdanm	0:9b334a45a8ff	630	* @param __HANDLE__: specifies the UART Handle.
bogdanm	0:9b334a45a8ff	631	*/
bogdanm	0:9b334a45a8ff	632	#define __HAL_UART_FLUSH_DRREGISTER(__HANDLE__) \
bogdanm	0:9b334a45a8ff	633	do{ \
bogdanm	0:9b334a45a8ff	634	SET_BIT((__HANDLE__)->Instance->RQR, UART_RXDATA_FLUSH_REQUEST); \
bogdanm	0:9b334a45a8ff	635	SET_BIT((__HANDLE__)->Instance->RQR, UART_TXDATA_FLUSH_REQUEST); \
bogdanm	0:9b334a45a8ff	636	} while(0)
bogdanm	0:9b334a45a8ff	637
bogdanm	0:9b334a45a8ff	638	/** @brief Clears the specified UART ISR flag, in setting the proper ICR register flag.
bogdanm	0:9b334a45a8ff	639	* @param __HANDLE__: specifies the UART Handle.
bogdanm	0:9b334a45a8ff	640	* @param __FLAG__: specifies the interrupt clear register flag that needs to be set
bogdanm	0:9b334a45a8ff	641	* to clear the corresponding interrupt
bogdanm	0:9b334a45a8ff	642	* This parameter can be one of the following values:
bogdanm	0:9b334a45a8ff	643	* @arg UART_CLEAR_PEF: Parity Error Clear Flag
bogdanm	0:9b334a45a8ff	644	* @arg UART_CLEAR_FEF: Framing Error Clear Flag
bogdanm	0:9b334a45a8ff	645	* @arg UART_CLEAR_NEF: Noise detected Clear Flag
bogdanm	0:9b334a45a8ff	646	* @arg UART_CLEAR_OREF: OverRun Error Clear Flag
bogdanm	0:9b334a45a8ff	647	* @arg UART_CLEAR_IDLEF: IDLE line detected Clear Flag
bogdanm	0:9b334a45a8ff	648	* @arg UART_CLEAR_TCF: Transmission Complete Clear Flag
bogdanm	0:9b334a45a8ff	649	* @arg UART_CLEAR_LBDF: LIN Break Detection Clear Flag
bogdanm	0:9b334a45a8ff	650	* @arg UART_CLEAR_CTSF: CTS Interrupt Clear Flag
bogdanm	0:9b334a45a8ff	651	* @arg UART_CLEAR_RTOF: Receiver Time Out Clear Flag
bogdanm	0:9b334a45a8ff	652	* @arg UART_CLEAR_EOBF: End Of Block Clear Flag
bogdanm	0:9b334a45a8ff	653	* @arg UART_CLEAR_CMF: Character Match Clear Flag
bogdanm	0:9b334a45a8ff	654	* @retval None
bogdanm	0:9b334a45a8ff	655	*/
mbed_official	83:a036322b8637	656	#define __HAL_UART_CLEAR_IT(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (uint32_t)(__FLAG__))
bogdanm	0:9b334a45a8ff	657
bogdanm	0:9b334a45a8ff	658	/** @brief Clear the UART PE pending flag.
bogdanm	0:9b334a45a8ff	659	* @param __HANDLE__: specifies the UART Handle.
bogdanm	0:9b334a45a8ff	660	* @retval None
bogdanm	0:9b334a45a8ff	661	*/
bogdanm	0:9b334a45a8ff	662	#define __HAL_UART_CLEAR_PEFLAG(__HANDLE__) __HAL_UART_CLEAR_IT((__HANDLE__),UART_CLEAR_PEF)
bogdanm	0:9b334a45a8ff	663
bogdanm	0:9b334a45a8ff	664	/** @brief Clear the UART FE pending flag.
bogdanm	0:9b334a45a8ff	665	* @param __HANDLE__: specifies the UART Handle.
bogdanm	0:9b334a45a8ff	666	* @retval None
bogdanm	0:9b334a45a8ff	667	*/
bogdanm	0:9b334a45a8ff	668	#define __HAL_UART_CLEAR_FEFLAG(__HANDLE__) __HAL_UART_CLEAR_IT((__HANDLE__),UART_CLEAR_FEF)
bogdanm	0:9b334a45a8ff	669
bogdanm	0:9b334a45a8ff	670	/** @brief Clear the UART NE pending flag.
bogdanm	0:9b334a45a8ff	671	* @param __HANDLE__: specifies the UART Handle.
bogdanm	0:9b334a45a8ff	672	* @retval None
bogdanm	0:9b334a45a8ff	673	*/
bogdanm	0:9b334a45a8ff	674	#define __HAL_UART_CLEAR_NEFLAG(__HANDLE__) __HAL_UART_CLEAR_IT((__HANDLE__),UART_CLEAR_NEF)
bogdanm	0:9b334a45a8ff	675
bogdanm	0:9b334a45a8ff	676	/** @brief Clear the UART ORE pending flag.
bogdanm	0:9b334a45a8ff	677	* @param __HANDLE__: specifies the UART Handle.
bogdanm	0:9b334a45a8ff	678	* @retval None
bogdanm	0:9b334a45a8ff	679	*/
bogdanm	0:9b334a45a8ff	680	#define __HAL_UART_CLEAR_OREFLAG(__HANDLE__) __HAL_UART_CLEAR_IT((__HANDLE__),UART_CLEAR_OREF)
bogdanm	0:9b334a45a8ff	681
bogdanm	0:9b334a45a8ff	682	/** @brief Clear the UART IDLE pending flag.
bogdanm	0:9b334a45a8ff	683	* @param __HANDLE__: specifies the UART Handle.
bogdanm	0:9b334a45a8ff	684	* @retval None
bogdanm	0:9b334a45a8ff	685	*/
bogdanm	0:9b334a45a8ff	686	#define __HAL_UART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_UART_CLEAR_IT((__HANDLE__),UART_CLEAR_IDLEF)
bogdanm	0:9b334a45a8ff	687
bogdanm	0:9b334a45a8ff	688	/** @brief Checks whether the specified UART flag is set or not.
bogdanm	0:9b334a45a8ff	689	* @param __HANDLE__: specifies the UART Handle.
bogdanm	0:9b334a45a8ff	690	* @param __FLAG__: specifies the flag to check.
bogdanm	0:9b334a45a8ff	691	* This parameter can be one of the following values:
bogdanm	0:9b334a45a8ff	692	* @arg UART_FLAG_REACK: Receive enable acknowledge flag
bogdanm	0:9b334a45a8ff	693	* @arg UART_FLAG_TEACK: Transmit enable acknowledge flag
bogdanm	0:9b334a45a8ff	694	* @arg UART_FLAG_WUF: Wake up from stop mode flag
bogdanm	0:9b334a45a8ff	695	* @arg UART_FLAG_RWU: Receiver wake up flag (is the UART in mute mode)
bogdanm	0:9b334a45a8ff	696	* @arg UART_FLAG_SBKF: Send Break flag
bogdanm	0:9b334a45a8ff	697	* @arg UART_FLAG_CMF: Character match flag
bogdanm	0:9b334a45a8ff	698	* @arg UART_FLAG_BUSY: Busy flag
bogdanm	0:9b334a45a8ff	699	* @arg UART_FLAG_ABRF: Auto Baud rate detection flag
bogdanm	0:9b334a45a8ff	700	* @arg UART_FLAG_ABRE: Auto Baud rate detection error flag
bogdanm	0:9b334a45a8ff	701	* @arg UART_FLAG_EOBF: End of block flag
bogdanm	0:9b334a45a8ff	702	* @arg UART_FLAG_RTOF: Receiver timeout flag
bogdanm	0:9b334a45a8ff	703	* @arg UART_FLAG_CTS: CTS Change flag (not available for UART4 and UART5)
bogdanm	0:9b334a45a8ff	704	* @arg UART_FLAG_LBD: LIN Break detection flag
bogdanm	0:9b334a45a8ff	705	* @arg UART_FLAG_TXE: Transmit data register empty flag
bogdanm	0:9b334a45a8ff	706	* @arg UART_FLAG_TC: Transmission Complete flag
bogdanm	0:9b334a45a8ff	707	* @arg UART_FLAG_RXNE: Receive data register not empty flag
bogdanm	0:9b334a45a8ff	708	* @arg UART_FLAG_IDLE: Idle Line detection flag
bogdanm	0:9b334a45a8ff	709	* @arg UART_FLAG_ORE: OverRun Error flag
bogdanm	0:9b334a45a8ff	710	* @arg UART_FLAG_NE: Noise Error flag
bogdanm	0:9b334a45a8ff	711	* @arg UART_FLAG_FE: Framing Error flag
bogdanm	0:9b334a45a8ff	712	* @arg UART_FLAG_PE: Parity Error flag
bogdanm	0:9b334a45a8ff	713	* @retval The new state of __FLAG__ (TRUE or FALSE).
bogdanm	0:9b334a45a8ff	714	*/
bogdanm	0:9b334a45a8ff	715	#define __HAL_UART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR & (__FLAG__)) == (__FLAG__))
bogdanm	0:9b334a45a8ff	716
bogdanm	0:9b334a45a8ff	717	/** @brief Enables the specified UART interrupt.
bogdanm	0:9b334a45a8ff	718	* @param __HANDLE__: specifies the UART Handle.
bogdanm	0:9b334a45a8ff	719	* @param __INTERRUPT__: specifies the UART interrupt source to enable.
bogdanm	0:9b334a45a8ff	720	* This parameter can be one of the following values:
bogdanm	0:9b334a45a8ff	721	* @arg UART_IT_WUF: Wakeup from stop mode interrupt
bogdanm	0:9b334a45a8ff	722	* @arg UART_IT_CM: Character match interrupt
bogdanm	0:9b334a45a8ff	723	* @arg UART_IT_CTS: CTS change interrupt
bogdanm	0:9b334a45a8ff	724	* @arg UART_IT_LBD: LIN Break detection interrupt
bogdanm	0:9b334a45a8ff	725	* @arg UART_IT_TXE: Transmit Data Register empty interrupt
bogdanm	0:9b334a45a8ff	726	* @arg UART_IT_TC: Transmission complete interrupt
bogdanm	0:9b334a45a8ff	727	* @arg UART_IT_RXNE: Receive Data register not empty interrupt
bogdanm	0:9b334a45a8ff	728	* @arg UART_IT_IDLE: Idle line detection interrupt
bogdanm	0:9b334a45a8ff	729	* @arg UART_IT_PE: Parity Error interrupt
bogdanm	0:9b334a45a8ff	730	* @arg UART_IT_ERR: Error interrupt(Frame error, noise error, overrun error)
bogdanm	0:9b334a45a8ff	731	* @retval None
bogdanm	0:9b334a45a8ff	732	*/
bogdanm	0:9b334a45a8ff	733	#define __HAL_UART_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5U) == 1)? ((__HANDLE__)->Instance->CR1 \|= (1U << ((__INTERRUPT__) & UART_IT_MASK))): \
bogdanm	0:9b334a45a8ff	734	((((uint8_t)(__INTERRUPT__)) >> 5U) == 2)? ((__HANDLE__)->Instance->CR2 \|= (1U << ((__INTERRUPT__) & UART_IT_MASK))): \
bogdanm	0:9b334a45a8ff	735	((__HANDLE__)->Instance->CR3 \|= (1U << ((__INTERRUPT__) & UART_IT_MASK))))
bogdanm	0:9b334a45a8ff	736
bogdanm	0:9b334a45a8ff	737
bogdanm	0:9b334a45a8ff	738	/** @brief Disables the specified UART interrupt.
bogdanm	0:9b334a45a8ff	739	* @param __HANDLE__: specifies the UART Handle.
bogdanm	0:9b334a45a8ff	740	* @param __INTERRUPT__: specifies the UART interrupt source to disable.
bogdanm	0:9b334a45a8ff	741	* This parameter can be one of the following values:
bogdanm	0:9b334a45a8ff	742	* @arg UART_IT_CM: Character match interrupt
bogdanm	0:9b334a45a8ff	743	* @arg UART_IT_CTS: CTS change interrupt
bogdanm	0:9b334a45a8ff	744	* @arg UART_IT_LBD: LIN Break detection interrupt
bogdanm	0:9b334a45a8ff	745	* @arg UART_IT_TXE: Transmit Data Register empty interrupt
bogdanm	0:9b334a45a8ff	746	* @arg UART_IT_TC: Transmission complete interrupt
bogdanm	0:9b334a45a8ff	747	* @arg UART_IT_RXNE: Receive Data register not empty interrupt
bogdanm	0:9b334a45a8ff	748	* @arg UART_IT_IDLE: Idle line detection interrupt
bogdanm	0:9b334a45a8ff	749	* @arg UART_IT_PE: Parity Error interrupt
bogdanm	0:9b334a45a8ff	750	* @arg UART_IT_ERR: Error interrupt(Frame error, noise error, overrun error)
bogdanm	0:9b334a45a8ff	751	* @retval None
bogdanm	0:9b334a45a8ff	752	*/
bogdanm	0:9b334a45a8ff	753	#define __HAL_UART_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5U) == 1)? ((__HANDLE__)->Instance->CR1 &= ~ (1U << ((__INTERRUPT__) & UART_IT_MASK))): \
bogdanm	0:9b334a45a8ff	754	((((uint8_t)(__INTERRUPT__)) >> 5U) == 2)? ((__HANDLE__)->Instance->CR2 &= ~ (1U << ((__INTERRUPT__) & UART_IT_MASK))): \
bogdanm	0:9b334a45a8ff	755	((__HANDLE__)->Instance->CR3 &= ~ (1U << ((__INTERRUPT__) & UART_IT_MASK))))
bogdanm	0:9b334a45a8ff	756
bogdanm	0:9b334a45a8ff	757	/** @brief Checks whether the specified UART interrupt has occurred or not.
bogdanm	0:9b334a45a8ff	758	* @param __HANDLE__: specifies the UART Handle.
bogdanm	0:9b334a45a8ff	759	* @param __IT__: specifies the UART interrupt to check.
bogdanm	0:9b334a45a8ff	760	* This parameter can be one of the following values:
bogdanm	0:9b334a45a8ff	761	* @arg UART_IT_CM: Character match interrupt
bogdanm	0:9b334a45a8ff	762	* @arg UART_IT_CTS: CTS change interrupt (not available for UART4 and UART5)
bogdanm	0:9b334a45a8ff	763	* @arg UART_IT_LBD: LIN Break detection interrupt
bogdanm	0:9b334a45a8ff	764	* @arg UART_IT_TXE: Transmit Data Register empty interrupt
bogdanm	0:9b334a45a8ff	765	* @arg UART_IT_TC: Transmission complete interrupt
bogdanm	0:9b334a45a8ff	766	* @arg UART_IT_RXNE: Receive Data register not empty interrupt
bogdanm	0:9b334a45a8ff	767	* @arg UART_IT_IDLE: Idle line detection interrupt
bogdanm	0:9b334a45a8ff	768	* @arg UART_IT_ORE: OverRun Error interrupt
bogdanm	0:9b334a45a8ff	769	* @arg UART_IT_NE: Noise Error interrupt
bogdanm	0:9b334a45a8ff	770	* @arg UART_IT_FE: Framing Error interrupt
bogdanm	0:9b334a45a8ff	771	* @arg UART_IT_PE: Parity Error interrupt
bogdanm	0:9b334a45a8ff	772	* @retval The new state of __IT__ (TRUE or FALSE).
bogdanm	0:9b334a45a8ff	773	*/
bogdanm	0:9b334a45a8ff	774	#define __HAL_UART_GET_IT(__HANDLE__, __IT__) ((__HANDLE__)->Instance->ISR & ((uint32_t)1 << ((__IT__)>> 0x08)))
bogdanm	0:9b334a45a8ff	775
bogdanm	0:9b334a45a8ff	776	/** @brief Checks whether the specified UART interrupt source is enabled.
bogdanm	0:9b334a45a8ff	777	* @param __HANDLE__: specifies the UART Handle.
bogdanm	0:9b334a45a8ff	778	* @param __IT__: specifies the UART interrupt source to check.
bogdanm	0:9b334a45a8ff	779	* This parameter can be one of the following values:
bogdanm	0:9b334a45a8ff	780	* @arg UART_IT_CTS: CTS change interrupt (not available for UART4 and UART5)
bogdanm	0:9b334a45a8ff	781	* @arg UART_IT_LBD: LIN Break detection interrupt
bogdanm	0:9b334a45a8ff	782	* @arg UART_IT_TXE: Transmit Data Register empty interrupt
bogdanm	0:9b334a45a8ff	783	* @arg UART_IT_TC: Transmission complete interrupt
bogdanm	0:9b334a45a8ff	784	* @arg UART_IT_RXNE: Receive Data register not empty interrupt
bogdanm	0:9b334a45a8ff	785	* @arg UART_IT_IDLE: Idle line detection interrupt
bogdanm	0:9b334a45a8ff	786	* @arg UART_IT_ORE: OverRun Error interrupt
bogdanm	0:9b334a45a8ff	787	* @arg UART_IT_NE: Noise Error interrupt
bogdanm	0:9b334a45a8ff	788	* @arg UART_IT_FE: Framing Error interrupt
bogdanm	0:9b334a45a8ff	789	* @arg UART_IT_PE: Parity Error interrupt
bogdanm	0:9b334a45a8ff	790	* @retval The new state of __IT__ (TRUE or FALSE).
bogdanm	0:9b334a45a8ff	791	*/
bogdanm	0:9b334a45a8ff	792	#define __HAL_UART_GET_IT_SOURCE(__HANDLE__, __IT__) ((((((uint8_t)(__IT__)) >> 5U) == 1)? (__HANDLE__)->Instance->CR1:(((((uint8_t)(__IT__)) >> 5U) == 2)? \
bogdanm	0:9b334a45a8ff	793	(__HANDLE__)->Instance->CR2 : (__HANDLE__)->Instance->CR3)) & ((uint32_t)1 << (((uint16_t)(__IT__)) & UART_IT_MASK)))
bogdanm	0:9b334a45a8ff	794
bogdanm	0:9b334a45a8ff	795	/** @brief Set a specific UART request flag.
bogdanm	0:9b334a45a8ff	796	* @param __HANDLE__: specifies the UART Handle.
bogdanm	0:9b334a45a8ff	797	* @param __REQ__: specifies the request flag to set
bogdanm	0:9b334a45a8ff	798	* This parameter can be one of the following values:
bogdanm	0:9b334a45a8ff	799	* @arg UART_AUTOBAUD_REQUEST: Auto-Baud Rate Request
bogdanm	0:9b334a45a8ff	800	* @arg UART_SENDBREAK_REQUEST: Send Break Request
bogdanm	0:9b334a45a8ff	801	* @arg UART_MUTE_MODE_REQUEST: Mute Mode Request
bogdanm	0:9b334a45a8ff	802	* @arg UART_RXDATA_FLUSH_REQUEST: Receive Data flush Request
bogdanm	0:9b334a45a8ff	803	* @arg UART_TXDATA_FLUSH_REQUEST: Transmit data flush Request
bogdanm	0:9b334a45a8ff	804	* @retval None
bogdanm	0:9b334a45a8ff	805	*/
bogdanm	0:9b334a45a8ff	806	#define __HAL_UART_SEND_REQ(__HANDLE__, __REQ__) ((__HANDLE__)->Instance->RQR \|= (uint32_t)(__REQ__))
bogdanm	0:9b334a45a8ff	807
bogdanm	0:9b334a45a8ff	808	/** @brief Enables the UART one bit sample method
bogdanm	0:9b334a45a8ff	809	* @param __HANDLE__: specifies the UART Handle.
bogdanm	0:9b334a45a8ff	810	* @retval None
bogdanm	0:9b334a45a8ff	811	*/
bogdanm	0:9b334a45a8ff	812	#define __HAL_UART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3\|= USART_CR3_ONEBIT)
bogdanm	0:9b334a45a8ff	813
bogdanm	0:9b334a45a8ff	814	/** @brief Disables the UART one bit sample method
bogdanm	0:9b334a45a8ff	815	* @param __HANDLE__: specifies the UART Handle.
bogdanm	0:9b334a45a8ff	816	* @retval None
bogdanm	0:9b334a45a8ff	817	*/
bogdanm	0:9b334a45a8ff	818	#define __HAL_UART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= (uint32_t)~((uint32_t)USART_CR3_ONEBIT))
bogdanm	0:9b334a45a8ff	819
bogdanm	0:9b334a45a8ff	820	/** @brief Enable UART
bogdanm	0:9b334a45a8ff	821	* @param __HANDLE__: specifies the UART Handle.
bogdanm	0:9b334a45a8ff	822	* @retval None
bogdanm	0:9b334a45a8ff	823	*/
bogdanm	0:9b334a45a8ff	824	#define __HAL_UART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 \|= USART_CR1_UE)
bogdanm	0:9b334a45a8ff	825
bogdanm	0:9b334a45a8ff	826	/** @brief Disable UART
bogdanm	0:9b334a45a8ff	827	* @param __HANDLE__: specifies the UART Handle.
bogdanm	0:9b334a45a8ff	828	* @retval None
bogdanm	0:9b334a45a8ff	829	*/
bogdanm	0:9b334a45a8ff	830	#define __HAL_UART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE)
bogdanm	0:9b334a45a8ff	831
bogdanm	0:9b334a45a8ff	832	/** @brief Enable CTS flow control
bogdanm	0:9b334a45a8ff	833	* This macro allows to enable CTS hardware flow control for a given UART instance,
bogdanm	0:9b334a45a8ff	834	* without need to call HAL_UART_Init() function.
bogdanm	0:9b334a45a8ff	835	* As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
bogdanm	0:9b334a45a8ff	836	* @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need
bogdanm	0:9b334a45a8ff	837	* for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
bogdanm	0:9b334a45a8ff	838	* - UART instance should have already been initialised (through call of HAL_UART_Init() )
bogdanm	0:9b334a45a8ff	839	* - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__))
bogdanm	0:9b334a45a8ff	840	* and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)).
bogdanm	0:9b334a45a8ff	841	* @param __HANDLE__: specifies the UART Handle.
bogdanm	0:9b334a45a8ff	842	* The Handle Instance can be USART1, USART2 or LPUART.
bogdanm	0:9b334a45a8ff	843	* @retval None
bogdanm	0:9b334a45a8ff	844	*/
bogdanm	0:9b334a45a8ff	845	#define __HAL_UART_HWCONTROL_CTS_ENABLE(__HANDLE__) \
bogdanm	0:9b334a45a8ff	846	do{ \
bogdanm	0:9b334a45a8ff	847	SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \
bogdanm	0:9b334a45a8ff	848	(__HANDLE__)->Init.HwFlowCtl \|= USART_CR3_CTSE; \
bogdanm	0:9b334a45a8ff	849	} while(0)
bogdanm	0:9b334a45a8ff	850
bogdanm	0:9b334a45a8ff	851	/** @brief Disable CTS flow control
bogdanm	0:9b334a45a8ff	852	* This macro allows to disable CTS hardware flow control for a given UART instance,
bogdanm	0:9b334a45a8ff	853	* without need to call HAL_UART_Init() function.
bogdanm	0:9b334a45a8ff	854	* As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
bogdanm	0:9b334a45a8ff	855	* @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need
bogdanm	0:9b334a45a8ff	856	* for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
bogdanm	0:9b334a45a8ff	857	* - UART instance should have already been initialised (through call of HAL_UART_Init() )
bogdanm	0:9b334a45a8ff	858	* - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__))
bogdanm	0:9b334a45a8ff	859	* and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)).
bogdanm	0:9b334a45a8ff	860	* @param __HANDLE__: specifies the UART Handle.
bogdanm	0:9b334a45a8ff	861	* The Handle Instance can be USART1, USART2 or LPUART.
bogdanm	0:9b334a45a8ff	862	* @retval None
bogdanm	0:9b334a45a8ff	863	*/
bogdanm	0:9b334a45a8ff	864	#define __HAL_UART_HWCONTROL_CTS_DISABLE(__HANDLE__) \
bogdanm	0:9b334a45a8ff	865	do{ \
bogdanm	0:9b334a45a8ff	866	CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \
bogdanm	0:9b334a45a8ff	867	(__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_CTSE); \
bogdanm	0:9b334a45a8ff	868	} while(0)
bogdanm	0:9b334a45a8ff	869
bogdanm	0:9b334a45a8ff	870	/** @brief Enable RTS flow control
bogdanm	0:9b334a45a8ff	871	* This macro allows to enable RTS hardware flow control for a given UART instance,
bogdanm	0:9b334a45a8ff	872	* without need to call HAL_UART_Init() function.
bogdanm	0:9b334a45a8ff	873	* As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
bogdanm	0:9b334a45a8ff	874	* @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need
bogdanm	0:9b334a45a8ff	875	* for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
bogdanm	0:9b334a45a8ff	876	* - UART instance should have already been initialised (through call of HAL_UART_Init() )
bogdanm	0:9b334a45a8ff	877	* - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__))
bogdanm	0:9b334a45a8ff	878	* and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)).
bogdanm	0:9b334a45a8ff	879	* @param __HANDLE__: specifies the UART Handle.
bogdanm	0:9b334a45a8ff	880	* The Handle Instance can be USART1, USART2 or LPUART.
bogdanm	0:9b334a45a8ff	881	* @retval None
bogdanm	0:9b334a45a8ff	882	*/
bogdanm	0:9b334a45a8ff	883	#define __HAL_UART_HWCONTROL_RTS_ENABLE(__HANDLE__) \
bogdanm	0:9b334a45a8ff	884	do{ \
bogdanm	0:9b334a45a8ff	885	SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE); \
bogdanm	0:9b334a45a8ff	886	(__HANDLE__)->Init.HwFlowCtl \|= USART_CR3_RTSE; \
bogdanm	0:9b334a45a8ff	887	} while(0)
bogdanm	0:9b334a45a8ff	888
bogdanm	0:9b334a45a8ff	889	/** @brief Disable RTS flow control
bogdanm	0:9b334a45a8ff	890	* This macro allows to disable RTS hardware flow control for a given UART instance,
bogdanm	0:9b334a45a8ff	891	* without need to call HAL_UART_Init() function.
bogdanm	0:9b334a45a8ff	892	* As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
bogdanm	0:9b334a45a8ff	893	* @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need
bogdanm	0:9b334a45a8ff	894	* for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
bogdanm	0:9b334a45a8ff	895	* - UART instance should have already been initialised (through call of HAL_UART_Init() )
bogdanm	0:9b334a45a8ff	896	* - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__))
bogdanm	0:9b334a45a8ff	897	* and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)).
bogdanm	0:9b334a45a8ff	898	* @param __HANDLE__: specifies the UART Handle.
bogdanm	0:9b334a45a8ff	899	* The Handle Instance can be USART1, USART2 or LPUART.
bogdanm	0:9b334a45a8ff	900	* @retval None
bogdanm	0:9b334a45a8ff	901	*/
bogdanm	0:9b334a45a8ff	902	#define __HAL_UART_HWCONTROL_RTS_DISABLE(__HANDLE__) \
bogdanm	0:9b334a45a8ff	903	do{ \
bogdanm	0:9b334a45a8ff	904	CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE);\
bogdanm	0:9b334a45a8ff	905	(__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_RTSE); \
bogdanm	0:9b334a45a8ff	906	} while(0)
bogdanm	0:9b334a45a8ff	907
bogdanm	0:9b334a45a8ff	908	/**
bogdanm	0:9b334a45a8ff	909	* @}
bogdanm	0:9b334a45a8ff	910	*/
bogdanm	0:9b334a45a8ff	911
bogdanm	0:9b334a45a8ff	912	/* Private macros --------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	913	/** @defgroup UART_Private_Macros UART Private Macros
bogdanm	0:9b334a45a8ff	914	* @{
bogdanm	0:9b334a45a8ff	915	*/
bogdanm	0:9b334a45a8ff	916	/** @brief BRR division operation to set BRR register with LPUART
bogdanm	0:9b334a45a8ff	917	* @param _PCLK_: LPUART clock
bogdanm	0:9b334a45a8ff	918	* @param _BAUD_: Baud rate set by the user
bogdanm	0:9b334a45a8ff	919	* @retval Division result
bogdanm	0:9b334a45a8ff	920	*/
bogdanm	0:9b334a45a8ff	921	#define UART_DIV_LPUART(_PCLK_, _BAUD_) (((_PCLK_)*256)/((_BAUD_)))
bogdanm	0:9b334a45a8ff	922
bogdanm	0:9b334a45a8ff	923	/** @brief BRR division operation to set BRR register in 8-bit oversampling mode
bogdanm	0:9b334a45a8ff	924	* @param _PCLK_: UART clock
bogdanm	0:9b334a45a8ff	925	* @param _BAUD_: Baud rate set by the user
bogdanm	0:9b334a45a8ff	926	* @retval Division result
bogdanm	0:9b334a45a8ff	927	*/
bogdanm	0:9b334a45a8ff	928	#define UART_DIV_SAMPLING8(_PCLK_, _BAUD_) (((_PCLK_)*2)/((_BAUD_)))
bogdanm	0:9b334a45a8ff	929
bogdanm	0:9b334a45a8ff	930	/** @brief BRR division operation to set BRR register in 16-bit oversampling mode
bogdanm	0:9b334a45a8ff	931	* @param _PCLK_: UART clock
bogdanm	0:9b334a45a8ff	932	* @param _BAUD_: Baud rate set by the user
bogdanm	0:9b334a45a8ff	933	* @retval Division result
bogdanm	0:9b334a45a8ff	934	*/
bogdanm	0:9b334a45a8ff	935	#define UART_DIV_SAMPLING16(_PCLK_, _BAUD_) (((_PCLK_))/((_BAUD_)))
bogdanm	0:9b334a45a8ff	936
bogdanm	0:9b334a45a8ff	937	/** @brief Check UART Baud rate
bogdanm	0:9b334a45a8ff	938	* @param BAUDRATE: Baudrate specified by the user
bogdanm	0:9b334a45a8ff	939	* The maximum Baud Rate is derived from the maximum clock on F7 (i.e. 216 MHz)
bogdanm	0:9b334a45a8ff	940	* divided by the smallest oversampling used on the USART (i.e. 8)
bogdanm	0:9b334a45a8ff	941	* @retval Test result (TRUE or FALSE).
bogdanm	0:9b334a45a8ff	942	*/
bogdanm	0:9b334a45a8ff	943	#define IS_UART_BAUDRATE(BAUDRATE) ((BAUDRATE) < 9000001)
bogdanm	0:9b334a45a8ff	944
bogdanm	0:9b334a45a8ff	945	/** @brief Check UART assertion time
bogdanm	0:9b334a45a8ff	946	* @param TIME: 5-bit value assertion time
bogdanm	0:9b334a45a8ff	947	* @retval Test result (TRUE or FALSE).
bogdanm	0:9b334a45a8ff	948	*/
bogdanm	0:9b334a45a8ff	949	#define IS_UART_ASSERTIONTIME(TIME) ((TIME) <= 0x1F)
bogdanm	0:9b334a45a8ff	950
bogdanm	0:9b334a45a8ff	951	/** @brief Check UART deassertion time
bogdanm	0:9b334a45a8ff	952	* @param TIME: 5-bit value deassertion time
bogdanm	0:9b334a45a8ff	953	* @retval Test result (TRUE or FALSE).
bogdanm	0:9b334a45a8ff	954	*/
bogdanm	0:9b334a45a8ff	955	#define IS_UART_DEASSERTIONTIME(TIME) ((TIME) <= 0x1F)
bogdanm	0:9b334a45a8ff	956
bogdanm	0:9b334a45a8ff	957	#define IS_UART_STOPBITS(STOPBITS) (((STOPBITS) == UART_STOPBITS_1) \|\| \
bogdanm	0:9b334a45a8ff	958	((STOPBITS) == UART_STOPBITS_2))
bogdanm	0:9b334a45a8ff	959
bogdanm	0:9b334a45a8ff	960	#define IS_UART_PARITY(PARITY) (((PARITY) == UART_PARITY_NONE) \|\| \
bogdanm	0:9b334a45a8ff	961	((PARITY) == UART_PARITY_EVEN) \|\| \
bogdanm	0:9b334a45a8ff	962	((PARITY) == UART_PARITY_ODD))
bogdanm	0:9b334a45a8ff	963
bogdanm	0:9b334a45a8ff	964	#define IS_UART_HARDWARE_FLOW_CONTROL(CONTROL)\
bogdanm	0:9b334a45a8ff	965	(((CONTROL) == UART_HWCONTROL_NONE) \|\| \
bogdanm	0:9b334a45a8ff	966	((CONTROL) == UART_HWCONTROL_RTS) \|\| \
bogdanm	0:9b334a45a8ff	967	((CONTROL) == UART_HWCONTROL_CTS) \|\| \
bogdanm	0:9b334a45a8ff	968	((CONTROL) == UART_HWCONTROL_RTS_CTS))
bogdanm	0:9b334a45a8ff	969
bogdanm	0:9b334a45a8ff	970	#define IS_UART_MODE(MODE) ((((MODE) & (~((uint32_t)(UART_MODE_TX_RX)))) == (uint32_t)0x00) && ((MODE) != (uint32_t)0x00))
bogdanm	0:9b334a45a8ff	971
bogdanm	0:9b334a45a8ff	972	#define IS_UART_STATE(STATE) (((STATE) == UART_STATE_DISABLE) \|\| \
bogdanm	0:9b334a45a8ff	973	((STATE) == UART_STATE_ENABLE))
bogdanm	0:9b334a45a8ff	974
bogdanm	0:9b334a45a8ff	975	#define IS_UART_OVERSAMPLING(SAMPLING) (((SAMPLING) == UART_OVERSAMPLING_16) \|\| \
bogdanm	0:9b334a45a8ff	976	((SAMPLING) == UART_OVERSAMPLING_8))
bogdanm	0:9b334a45a8ff	977
bogdanm	0:9b334a45a8ff	978	#define IS_UART_ONE_BIT_SAMPLE(ONEBIT) (((ONEBIT) == UART_ONE_BIT_SAMPLE_DISABLE) \|\| \
bogdanm	0:9b334a45a8ff	979	((ONEBIT) == UART_ONE_BIT_SAMPLE_ENABLE))
bogdanm	0:9b334a45a8ff	980
bogdanm	0:9b334a45a8ff	981	#define IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(MODE) (((MODE) == UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT) \|\| \
bogdanm	0:9b334a45a8ff	982	((MODE) == UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE) \|\| \
bogdanm	0:9b334a45a8ff	983	((MODE) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME) \|\| \
bogdanm	0:9b334a45a8ff	984	((MODE) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME))
bogdanm	0:9b334a45a8ff	985
bogdanm	0:9b334a45a8ff	986	#define IS_UART_RECEIVER_TIMEOUT(TIMEOUT) (((TIMEOUT) == UART_RECEIVER_TIMEOUT_DISABLE) \|\| \
bogdanm	0:9b334a45a8ff	987	((TIMEOUT) == UART_RECEIVER_TIMEOUT_ENABLE))
bogdanm	0:9b334a45a8ff	988
bogdanm	0:9b334a45a8ff	989	#define IS_UART_LIN(LIN) (((LIN) == UART_LIN_DISABLE) \|\| \
bogdanm	0:9b334a45a8ff	990	((LIN) == UART_LIN_ENABLE))
bogdanm	0:9b334a45a8ff	991
bogdanm	0:9b334a45a8ff	992	#define IS_UART_WAKEUPMETHOD(WAKEUP) (((WAKEUP) == UART_WAKEUPMETHOD_IDLELINE) \|\| \
bogdanm	0:9b334a45a8ff	993	((WAKEUP) == UART_WAKEUPMETHOD_ADDRESSMARK))
bogdanm	0:9b334a45a8ff	994
bogdanm	0:9b334a45a8ff	995	#define IS_UART_LIN_BREAK_DETECT_LENGTH(LENGTH) (((LENGTH) == UART_LINBREAKDETECTLENGTH_10B) \|\| \
bogdanm	0:9b334a45a8ff	996	((LENGTH) == UART_LINBREAKDETECTLENGTH_11B))
bogdanm	0:9b334a45a8ff	997
bogdanm	0:9b334a45a8ff	998	#define IS_UART_DMA_TX(DMATX) (((DMATX) == UART_DMA_TX_DISABLE) \|\| \
bogdanm	0:9b334a45a8ff	999	((DMATX) == UART_DMA_TX_ENABLE))
bogdanm	0:9b334a45a8ff	1000
bogdanm	0:9b334a45a8ff	1001	#define IS_UART_DMA_RX(DMARX) (((DMARX) == UART_DMA_RX_DISABLE) \|\| \
bogdanm	0:9b334a45a8ff	1002	((DMARX) == UART_DMA_RX_ENABLE))
bogdanm	0:9b334a45a8ff	1003
bogdanm	0:9b334a45a8ff	1004	#define IS_UART_HALF_DUPLEX(HDSEL) (((HDSEL) == UART_HALF_DUPLEX_DISABLE) \|\| \
bogdanm	0:9b334a45a8ff	1005	((HDSEL) == UART_HALF_DUPLEX_ENABLE))
bogdanm	0:9b334a45a8ff	1006
bogdanm	0:9b334a45a8ff	1007	#define IS_UART_REQUEST_PARAMETER(PARAM) (((PARAM) == UART_AUTOBAUD_REQUEST) \|\| \
bogdanm	0:9b334a45a8ff	1008	((PARAM) == UART_SENDBREAK_REQUEST) \|\| \
bogdanm	0:9b334a45a8ff	1009	((PARAM) == UART_MUTE_MODE_REQUEST) \|\| \
bogdanm	0:9b334a45a8ff	1010	((PARAM) == UART_RXDATA_FLUSH_REQUEST) \|\| \
bogdanm	0:9b334a45a8ff	1011	((PARAM) == UART_TXDATA_FLUSH_REQUEST))
bogdanm	0:9b334a45a8ff	1012
bogdanm	0:9b334a45a8ff	1013	#define IS_UART_ADVFEATURE_INIT(INIT) ((INIT) <= (UART_ADVFEATURE_NO_INIT \| \
bogdanm	0:9b334a45a8ff	1014	UART_ADVFEATURE_TXINVERT_INIT \| \
bogdanm	0:9b334a45a8ff	1015	UART_ADVFEATURE_RXINVERT_INIT \| \
bogdanm	0:9b334a45a8ff	1016	UART_ADVFEATURE_DATAINVERT_INIT \| \
bogdanm	0:9b334a45a8ff	1017	UART_ADVFEATURE_SWAP_INIT \| \
bogdanm	0:9b334a45a8ff	1018	UART_ADVFEATURE_RXOVERRUNDISABLE_INIT \| \
bogdanm	0:9b334a45a8ff	1019	UART_ADVFEATURE_DMADISABLEONERROR_INIT \| \
bogdanm	0:9b334a45a8ff	1020	UART_ADVFEATURE_AUTOBAUDRATE_INIT \| \
bogdanm	0:9b334a45a8ff	1021	UART_ADVFEATURE_MSBFIRST_INIT))
bogdanm	0:9b334a45a8ff	1022
bogdanm	0:9b334a45a8ff	1023	#define IS_UART_ADVFEATURE_TXINV(TXINV) (((TXINV) == UART_ADVFEATURE_TXINV_DISABLE) \|\| \
bogdanm	0:9b334a45a8ff	1024	((TXINV) == UART_ADVFEATURE_TXINV_ENABLE))
bogdanm	0:9b334a45a8ff	1025
bogdanm	0:9b334a45a8ff	1026	#define IS_UART_ADVFEATURE_RXINV(RXINV) (((RXINV) == UART_ADVFEATURE_RXINV_DISABLE) \|\| \
bogdanm	0:9b334a45a8ff	1027	((RXINV) == UART_ADVFEATURE_RXINV_ENABLE))
bogdanm	0:9b334a45a8ff	1028
bogdanm	0:9b334a45a8ff	1029	#define IS_UART_ADVFEATURE_DATAINV(DATAINV) (((DATAINV) == UART_ADVFEATURE_DATAINV_DISABLE) \|\| \
bogdanm	0:9b334a45a8ff	1030	((DATAINV) == UART_ADVFEATURE_DATAINV_ENABLE))
bogdanm	0:9b334a45a8ff	1031
bogdanm	0:9b334a45a8ff	1032	#define IS_UART_ADVFEATURE_SWAP(SWAP) (((SWAP) == UART_ADVFEATURE_SWAP_DISABLE) \|\| \
bogdanm	0:9b334a45a8ff	1033	((SWAP) == UART_ADVFEATURE_SWAP_ENABLE))
bogdanm	0:9b334a45a8ff	1034
bogdanm	0:9b334a45a8ff	1035	#define IS_UART_OVERRUN(OVERRUN) (((OVERRUN) == UART_ADVFEATURE_OVERRUN_ENABLE) \|\| \
bogdanm	0:9b334a45a8ff	1036	((OVERRUN) == UART_ADVFEATURE_OVERRUN_DISABLE))
bogdanm	0:9b334a45a8ff	1037
bogdanm	0:9b334a45a8ff	1038	#define IS_UART_ADVFEATURE_AUTOBAUDRATE(AUTOBAUDRATE) (((AUTOBAUDRATE) == UART_ADVFEATURE_AUTOBAUDRATE_DISABLE) \|\| \
bogdanm	0:9b334a45a8ff	1039	((AUTOBAUDRATE) == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE))
bogdanm	0:9b334a45a8ff	1040
bogdanm	0:9b334a45a8ff	1041	#define IS_UART_ADVFEATURE_DMAONRXERROR(DMA) (((DMA) == UART_ADVFEATURE_DMA_ENABLEONRXERROR) \|\| \
bogdanm	0:9b334a45a8ff	1042	((DMA) == UART_ADVFEATURE_DMA_DISABLEONRXERROR))
bogdanm	0:9b334a45a8ff	1043
bogdanm	0:9b334a45a8ff	1044	#define IS_UART_ADVFEATURE_MSBFIRST(MSBFIRST) (((MSBFIRST) == UART_ADVFEATURE_MSBFIRST_DISABLE) \|\| \
bogdanm	0:9b334a45a8ff	1045	((MSBFIRST) == UART_ADVFEATURE_MSBFIRST_ENABLE))
bogdanm	0:9b334a45a8ff	1046
bogdanm	0:9b334a45a8ff	1047	#define IS_UART_MUTE_MODE(MUTE) (((MUTE) == UART_ADVFEATURE_MUTEMODE_DISABLE) \|\| \
bogdanm	0:9b334a45a8ff	1048	((MUTE) == UART_ADVFEATURE_MUTEMODE_ENABLE))
bogdanm	0:9b334a45a8ff	1049
bogdanm	0:9b334a45a8ff	1050	#define IS_UART_DE_POLARITY(POLARITY) (((POLARITY) == UART_DE_POLARITY_HIGH) \|\| \
bogdanm	0:9b334a45a8ff	1051	((POLARITY) == UART_DE_POLARITY_LOW))
bogdanm	0:9b334a45a8ff	1052
bogdanm	0:9b334a45a8ff	1053	/**
bogdanm	0:9b334a45a8ff	1054	* @}
bogdanm	0:9b334a45a8ff	1055	*/
bogdanm	0:9b334a45a8ff	1056	/* Include UART HAL Extension module */
bogdanm	0:9b334a45a8ff	1057	#include "stm32f7xx_hal_uart_ex.h"
bogdanm	0:9b334a45a8ff	1058	/* Exported functions --------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	1059	/** @addtogroup UART_Exported_Functions UART Exported Functions
bogdanm	0:9b334a45a8ff	1060	* @{
bogdanm	0:9b334a45a8ff	1061	*/
bogdanm	0:9b334a45a8ff	1062
bogdanm	0:9b334a45a8ff	1063	/** @addtogroup UART_Exported_Functions_Group1 Initialization and de-initialization functions
bogdanm	0:9b334a45a8ff	1064	* @{
bogdanm	0:9b334a45a8ff	1065	*/
bogdanm	0:9b334a45a8ff	1066
bogdanm	0:9b334a45a8ff	1067	/* Initialization and de-initialization functions ****************************/
bogdanm	0:9b334a45a8ff	1068	HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart);
bogdanm	0:9b334a45a8ff	1069	HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart);
bogdanm	0:9b334a45a8ff	1070	HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength);
bogdanm	0:9b334a45a8ff	1071	HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod);
bogdanm	0:9b334a45a8ff	1072	HAL_StatusTypeDef HAL_UART_DeInit (UART_HandleTypeDef *huart);
bogdanm	0:9b334a45a8ff	1073	void HAL_UART_MspInit(UART_HandleTypeDef *huart);
bogdanm	0:9b334a45a8ff	1074	void HAL_UART_MspDeInit(UART_HandleTypeDef *huart);
bogdanm	0:9b334a45a8ff	1075
bogdanm	0:9b334a45a8ff	1076	/**
bogdanm	0:9b334a45a8ff	1077	* @}
bogdanm	0:9b334a45a8ff	1078	*/
bogdanm	0:9b334a45a8ff	1079
bogdanm	0:9b334a45a8ff	1080	/** @addtogroup UART_Exported_Functions_Group2 IO operation functions
bogdanm	0:9b334a45a8ff	1081	* @{
bogdanm	0:9b334a45a8ff	1082	*/
bogdanm	0:9b334a45a8ff	1083
bogdanm	0:9b334a45a8ff	1084	/* IO operation functions *****************************************************/
bogdanm	0:9b334a45a8ff	1085	HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef huart, uint8_t pData, uint16_t Size, uint32_t Timeout);
bogdanm	0:9b334a45a8ff	1086	HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef huart, uint8_t pData, uint16_t Size, uint32_t Timeout);
bogdanm	0:9b334a45a8ff	1087	HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef huart, uint8_t pData, uint16_t Size);
bogdanm	0:9b334a45a8ff	1088	HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef huart, uint8_t pData, uint16_t Size);
bogdanm	0:9b334a45a8ff	1089	HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef huart, uint8_t pData, uint16_t Size);
bogdanm	0:9b334a45a8ff	1090	HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef huart, uint8_t pData, uint16_t Size);
bogdanm	0:9b334a45a8ff	1091	HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart);
bogdanm	0:9b334a45a8ff	1092	HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart);
bogdanm	0:9b334a45a8ff	1093	HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart);
bogdanm	0:9b334a45a8ff	1094	void HAL_UART_IRQHandler(UART_HandleTypeDef *huart);
bogdanm	0:9b334a45a8ff	1095	void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart);
bogdanm	0:9b334a45a8ff	1096	void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart);
bogdanm	0:9b334a45a8ff	1097	void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart);
bogdanm	0:9b334a45a8ff	1098	void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart);
bogdanm	0:9b334a45a8ff	1099	void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart);
bogdanm	0:9b334a45a8ff	1100
bogdanm	0:9b334a45a8ff	1101	/**
bogdanm	0:9b334a45a8ff	1102	* @}
bogdanm	0:9b334a45a8ff	1103	*/
bogdanm	0:9b334a45a8ff	1104
bogdanm	0:9b334a45a8ff	1105	/** @addtogroup UART_Exported_Functions_Group3 Peripheral Control functions
bogdanm	0:9b334a45a8ff	1106	* @{
bogdanm	0:9b334a45a8ff	1107	*/
bogdanm	0:9b334a45a8ff	1108
bogdanm	0:9b334a45a8ff	1109	/* Peripheral Control functions ************************************************/
bogdanm	0:9b334a45a8ff	1110	HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart);
bogdanm	0:9b334a45a8ff	1111	HAL_StatusTypeDef HAL_MultiProcessor_EnableMuteMode(UART_HandleTypeDef *huart);
bogdanm	0:9b334a45a8ff	1112	HAL_StatusTypeDef HAL_MultiProcessor_DisableMuteMode(UART_HandleTypeDef *huart);
bogdanm	0:9b334a45a8ff	1113	void HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart);
bogdanm	0:9b334a45a8ff	1114	HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart);
bogdanm	0:9b334a45a8ff	1115	HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart);
bogdanm	0:9b334a45a8ff	1116
bogdanm	0:9b334a45a8ff	1117	/**
bogdanm	0:9b334a45a8ff	1118	* @}
bogdanm	0:9b334a45a8ff	1119	*/
bogdanm	0:9b334a45a8ff	1120
bogdanm	0:9b334a45a8ff	1121	/** @addtogroup UART_Exported_Functions_Group4 Peripheral State and Error functions
bogdanm	0:9b334a45a8ff	1122	* @{
bogdanm	0:9b334a45a8ff	1123	*/
bogdanm	0:9b334a45a8ff	1124
bogdanm	0:9b334a45a8ff	1125	/* Peripheral State and Errors functions **************************************************/
bogdanm	0:9b334a45a8ff	1126	HAL_UART_StateTypeDef HAL_UART_GetState(UART_HandleTypeDef *huart);
bogdanm	0:9b334a45a8ff	1127	uint32_t HAL_UART_GetError(UART_HandleTypeDef *huart);
bogdanm	0:9b334a45a8ff	1128
bogdanm	0:9b334a45a8ff	1129	/**
bogdanm	0:9b334a45a8ff	1130	* @}
bogdanm	0:9b334a45a8ff	1131	*/
bogdanm	0:9b334a45a8ff	1132
bogdanm	0:9b334a45a8ff	1133	/**
bogdanm	0:9b334a45a8ff	1134	* @}
bogdanm	0:9b334a45a8ff	1135	*/
bogdanm	0:9b334a45a8ff	1136
bogdanm	0:9b334a45a8ff	1137	/* Private functions -----------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	1138	/** @addtogroup UART_Private_Functions UART Private Functions
bogdanm	0:9b334a45a8ff	1139	* @{
bogdanm	0:9b334a45a8ff	1140	*/
bogdanm	0:9b334a45a8ff	1141
bogdanm	0:9b334a45a8ff	1142	HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart);
bogdanm	0:9b334a45a8ff	1143	HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart);
bogdanm	0:9b334a45a8ff	1144	HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Timeout);
bogdanm	0:9b334a45a8ff	1145	void UART_AdvFeatureConfig(UART_HandleTypeDef *huart);
bogdanm	0:9b334a45a8ff	1146
bogdanm	0:9b334a45a8ff	1147	/**
bogdanm	0:9b334a45a8ff	1148	* @}
bogdanm	0:9b334a45a8ff	1149	*/
bogdanm	0:9b334a45a8ff	1150
bogdanm	0:9b334a45a8ff	1151	/**
bogdanm	0:9b334a45a8ff	1152	* @}
bogdanm	0:9b334a45a8ff	1153	*/
bogdanm	0:9b334a45a8ff	1154
bogdanm	0:9b334a45a8ff	1155	/**
bogdanm	0:9b334a45a8ff	1156	* @}
bogdanm	0:9b334a45a8ff	1157	*/
bogdanm	0:9b334a45a8ff	1158
bogdanm	0:9b334a45a8ff	1159	#ifdef __cplusplus
bogdanm	0:9b334a45a8ff	1160	}
bogdanm	0:9b334a45a8ff	1161	#endif
bogdanm	0:9b334a45a8ff	1162
bogdanm	0:9b334a45a8ff	1163	#endif /* __STM32F7xx_HAL_UART_H */
bogdanm	0:9b334a45a8ff	1164
bogdanm	0:9b334a45a8ff	1165	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/

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Type:	Library
Created:	16 May 2016
Imports:	1
Forks:	0
Commits:	130
Dependents:	1
Dependencies:	0
Followers:	1

targets/cmsis/TARGET_STM/TARGET_STM32F7/stm32f7xx_hal_uart.h@83:a036322b8637, 2016-03-07 (annotated)

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