en 129
fix LPC812 PWM
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mbed-dev
by 
mbed official
targets/cmsis/TARGET_STM/TARGET_STM32F7/stm32f7xx_hal_tim_ex.h@83:a036322b8637, 2016-03-07 (annotated)
- Committer:
- mbed_official
- Date:
- Mon Mar 07 10:00:14 2016 +0000
- Revision:
- 83:a036322b8637
- Parent:
- 0:9b334a45a8ff
Synchronized with git revision ee20d03969aa5c570152f88e8f3d8a4739eed40b
Full URL: https://github.com/mbedmicro/mbed/commit/ee20d03969aa5c570152f88e8f3d8a4739eed40b/
[STM32F7] Update STM32F7Cube_FW version
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| bogdanm | 0:9b334a45a8ff | 1 | /** |
| bogdanm | 0:9b334a45a8ff | 2 | ****************************************************************************** |
| bogdanm | 0:9b334a45a8ff | 3 | * @file stm32f7xx_hal_tim_ex.h |
| bogdanm | 0:9b334a45a8ff | 4 | * @author MCD Application Team |
| mbed_official | 83:a036322b8637 | 5 | * @version V1.0.4 |
| mbed_official | 83:a036322b8637 | 6 | * @date 09-December-2015 |
| bogdanm | 0:9b334a45a8ff | 7 | * @brief Header file of TIM HAL Extension module. |
| bogdanm | 0:9b334a45a8ff | 8 | ****************************************************************************** |
| bogdanm | 0:9b334a45a8ff | 9 | * @attention |
| bogdanm | 0:9b334a45a8ff | 10 | * |
| bogdanm | 0:9b334a45a8ff | 11 | * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> |
| bogdanm | 0:9b334a45a8ff | 12 | * |
| bogdanm | 0:9b334a45a8ff | 13 | * Redistribution and use in source and binary forms, with or without modification, |
| bogdanm | 0:9b334a45a8ff | 14 | * are permitted provided that the following conditions are met: |
| bogdanm | 0:9b334a45a8ff | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
| bogdanm | 0:9b334a45a8ff | 16 | * this list of conditions and the following disclaimer. |
| bogdanm | 0:9b334a45a8ff | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| bogdanm | 0:9b334a45a8ff | 18 | * this list of conditions and the following disclaimer in the documentation |
| bogdanm | 0:9b334a45a8ff | 19 | * and/or other materials provided with the distribution. |
| bogdanm | 0:9b334a45a8ff | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| bogdanm | 0:9b334a45a8ff | 21 | * may be used to endorse or promote products derived from this software |
| bogdanm | 0:9b334a45a8ff | 22 | * without specific prior written permission. |
| bogdanm | 0:9b334a45a8ff | 23 | * |
| bogdanm | 0:9b334a45a8ff | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| bogdanm | 0:9b334a45a8ff | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| bogdanm | 0:9b334a45a8ff | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| bogdanm | 0:9b334a45a8ff | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| bogdanm | 0:9b334a45a8ff | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| bogdanm | 0:9b334a45a8ff | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| bogdanm | 0:9b334a45a8ff | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| bogdanm | 0:9b334a45a8ff | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| bogdanm | 0:9b334a45a8ff | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| bogdanm | 0:9b334a45a8ff | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| bogdanm | 0:9b334a45a8ff | 34 | * |
| bogdanm | 0:9b334a45a8ff | 35 | ****************************************************************************** |
| bogdanm | 0:9b334a45a8ff | 36 | */ |
| bogdanm | 0:9b334a45a8ff | 37 | |
| bogdanm | 0:9b334a45a8ff | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 39 | #ifndef __STM32F7xx_HAL_TIM_EX_H |
| bogdanm | 0:9b334a45a8ff | 40 | #define __STM32F7xx_HAL_TIM_EX_H |
| bogdanm | 0:9b334a45a8ff | 41 | |
| bogdanm | 0:9b334a45a8ff | 42 | #ifdef __cplusplus |
| bogdanm | 0:9b334a45a8ff | 43 | extern "C" { |
| bogdanm | 0:9b334a45a8ff | 44 | #endif |
| bogdanm | 0:9b334a45a8ff | 45 | |
| bogdanm | 0:9b334a45a8ff | 46 | /* Includes ------------------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 47 | #include "stm32f7xx_hal_def.h" |
| bogdanm | 0:9b334a45a8ff | 48 | |
| bogdanm | 0:9b334a45a8ff | 49 | /** @addtogroup STM32F7xx_HAL_Driver |
| bogdanm | 0:9b334a45a8ff | 50 | * @{ |
| bogdanm | 0:9b334a45a8ff | 51 | */ |
| bogdanm | 0:9b334a45a8ff | 52 | |
| bogdanm | 0:9b334a45a8ff | 53 | /** @addtogroup TIMEx |
| bogdanm | 0:9b334a45a8ff | 54 | * @{ |
| bogdanm | 0:9b334a45a8ff | 55 | */ |
| bogdanm | 0:9b334a45a8ff | 56 | |
| bogdanm | 0:9b334a45a8ff | 57 | /* Exported types ------------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 58 | /** @defgroup TIMEx_Exported_Types TIM Exported Types |
| bogdanm | 0:9b334a45a8ff | 59 | * @{ |
| bogdanm | 0:9b334a45a8ff | 60 | */ |
| bogdanm | 0:9b334a45a8ff | 61 | |
| bogdanm | 0:9b334a45a8ff | 62 | /** |
| bogdanm | 0:9b334a45a8ff | 63 | * @brief TIM Hall sensor Configuration Structure definition |
| bogdanm | 0:9b334a45a8ff | 64 | */ |
| bogdanm | 0:9b334a45a8ff | 65 | |
| bogdanm | 0:9b334a45a8ff | 66 | typedef struct |
| bogdanm | 0:9b334a45a8ff | 67 | { |
| bogdanm | 0:9b334a45a8ff | 68 | |
| bogdanm | 0:9b334a45a8ff | 69 | uint32_t IC1Polarity; /*!< Specifies the active edge of the input signal. |
| bogdanm | 0:9b334a45a8ff | 70 | This parameter can be a value of @ref TIM_Input_Capture_Polarity */ |
| bogdanm | 0:9b334a45a8ff | 71 | |
| bogdanm | 0:9b334a45a8ff | 72 | uint32_t IC1Prescaler; /*!< Specifies the Input Capture Prescaler. |
| bogdanm | 0:9b334a45a8ff | 73 | This parameter can be a value of @ref TIM_Input_Capture_Prescaler */ |
| bogdanm | 0:9b334a45a8ff | 74 | |
| bogdanm | 0:9b334a45a8ff | 75 | uint32_t IC1Filter; /*!< Specifies the input capture filter. |
| bogdanm | 0:9b334a45a8ff | 76 | This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */ |
| bogdanm | 0:9b334a45a8ff | 77 | uint32_t Commutation_Delay; /*!< Specifies the pulse value to be loaded into the Capture Compare Register. |
| bogdanm | 0:9b334a45a8ff | 78 | This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */ |
| bogdanm | 0:9b334a45a8ff | 79 | } TIM_HallSensor_InitTypeDef; |
| bogdanm | 0:9b334a45a8ff | 80 | |
| bogdanm | 0:9b334a45a8ff | 81 | /** |
| bogdanm | 0:9b334a45a8ff | 82 | * @brief TIM Master configuration Structure definition |
| bogdanm | 0:9b334a45a8ff | 83 | */ |
| bogdanm | 0:9b334a45a8ff | 84 | typedef struct { |
| bogdanm | 0:9b334a45a8ff | 85 | uint32_t MasterOutputTrigger; /*!< Trigger output (TRGO) selection. |
| bogdanm | 0:9b334a45a8ff | 86 | This parameter can be a value of @ref TIM_Master_Mode_Selection */ |
| bogdanm | 0:9b334a45a8ff | 87 | uint32_t MasterOutputTrigger2; /*!< Trigger output2 (TRGO2) selection |
| bogdanm | 0:9b334a45a8ff | 88 | This parameter can be a value of @ref TIMEx_Master_Mode_Selection_2 */ |
| bogdanm | 0:9b334a45a8ff | 89 | uint32_t MasterSlaveMode; /*!< Master/slave mode selection. |
| bogdanm | 0:9b334a45a8ff | 90 | This parameter can be a value of @ref TIM_Master_Slave_Mode */ |
| bogdanm | 0:9b334a45a8ff | 91 | }TIM_MasterConfigTypeDef; |
| bogdanm | 0:9b334a45a8ff | 92 | |
| bogdanm | 0:9b334a45a8ff | 93 | /** |
| bogdanm | 0:9b334a45a8ff | 94 | * @brief TIM Break input(s) and Dead time configuration Structure definition |
| bogdanm | 0:9b334a45a8ff | 95 | * @note 2 break inputs can be configured (BKIN and BKIN2) with configurable |
| bogdanm | 0:9b334a45a8ff | 96 | * filter and polarity. |
| bogdanm | 0:9b334a45a8ff | 97 | */ |
| bogdanm | 0:9b334a45a8ff | 98 | typedef struct |
| bogdanm | 0:9b334a45a8ff | 99 | { |
| bogdanm | 0:9b334a45a8ff | 100 | uint32_t OffStateRunMode; /*!< TIM off state in run mode. |
| bogdanm | 0:9b334a45a8ff | 101 | This parameter can be a value of @ref TIM_OSSR_Off_State_Selection_for_Run_mode_state */ |
| bogdanm | 0:9b334a45a8ff | 102 | uint32_t OffStateIDLEMode; /*!< TIM off state in IDLE mode. |
| bogdanm | 0:9b334a45a8ff | 103 | This parameter can be a value of @ref TIM_OSSI_Off_State_Selection_for_Idle_mode_state */ |
| bogdanm | 0:9b334a45a8ff | 104 | uint32_t LockLevel; /*!< TIM Lock level. |
| bogdanm | 0:9b334a45a8ff | 105 | This parameter can be a value of @ref TIM_Lock_level */ |
| bogdanm | 0:9b334a45a8ff | 106 | uint32_t DeadTime; /*!< TIM dead Time. |
| bogdanm | 0:9b334a45a8ff | 107 | This parameter can be a number between Min_Data = 0x00 and Max_Data = 0xFF */ |
| bogdanm | 0:9b334a45a8ff | 108 | uint32_t BreakState; /*!< TIM Break State. |
| bogdanm | 0:9b334a45a8ff | 109 | This parameter can be a value of @ref TIM_Break_Input_enable_disable */ |
| bogdanm | 0:9b334a45a8ff | 110 | uint32_t BreakPolarity; /*!< TIM Break input polarity. |
| bogdanm | 0:9b334a45a8ff | 111 | This parameter can be a value of @ref TIM_Break_Polarity */ |
| bogdanm | 0:9b334a45a8ff | 112 | uint32_t BreakFilter; /*!< Specifies the break input filter. |
| bogdanm | 0:9b334a45a8ff | 113 | This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */ |
| bogdanm | 0:9b334a45a8ff | 114 | uint32_t Break2State; /*!< TIM Break2 State |
| bogdanm | 0:9b334a45a8ff | 115 | This parameter can be a value of @ref TIMEx_Break2_Input_enable_disable */ |
| bogdanm | 0:9b334a45a8ff | 116 | uint32_t Break2Polarity; /*!< TIM Break2 input polarity |
| bogdanm | 0:9b334a45a8ff | 117 | This parameter can be a value of @ref TIMEx_Break2_Polarity */ |
| bogdanm | 0:9b334a45a8ff | 118 | uint32_t Break2Filter; /*!< TIM break2 input filter. |
| bogdanm | 0:9b334a45a8ff | 119 | This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */ |
| bogdanm | 0:9b334a45a8ff | 120 | uint32_t AutomaticOutput; /*!< TIM Automatic Output Enable state |
| bogdanm | 0:9b334a45a8ff | 121 | This parameter can be a value of @ref TIM_AOE_Bit_Set_Reset */ |
| bogdanm | 0:9b334a45a8ff | 122 | } TIM_BreakDeadTimeConfigTypeDef; |
| bogdanm | 0:9b334a45a8ff | 123 | |
| bogdanm | 0:9b334a45a8ff | 124 | /** |
| bogdanm | 0:9b334a45a8ff | 125 | * @} |
| mbed_official | 83:a036322b8637 | 126 | */ |
| bogdanm | 0:9b334a45a8ff | 127 | /* Exported constants --------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 128 | /** @defgroup TIMEx_Exported_Constants TIMEx Exported Constants |
| bogdanm | 0:9b334a45a8ff | 129 | * @{ |
| bogdanm | 0:9b334a45a8ff | 130 | */ |
| bogdanm | 0:9b334a45a8ff | 131 | |
| bogdanm | 0:9b334a45a8ff | 132 | /** @defgroup TIMEx_Channel TIMEx Channel |
| bogdanm | 0:9b334a45a8ff | 133 | * @{ |
| bogdanm | 0:9b334a45a8ff | 134 | */ |
| bogdanm | 0:9b334a45a8ff | 135 | |
| bogdanm | 0:9b334a45a8ff | 136 | #define TIM_CHANNEL_1 ((uint32_t)0x0000) |
| bogdanm | 0:9b334a45a8ff | 137 | #define TIM_CHANNEL_2 ((uint32_t)0x0004) |
| bogdanm | 0:9b334a45a8ff | 138 | #define TIM_CHANNEL_3 ((uint32_t)0x0008) |
| bogdanm | 0:9b334a45a8ff | 139 | #define TIM_CHANNEL_4 ((uint32_t)0x000C) |
| bogdanm | 0:9b334a45a8ff | 140 | #define TIM_CHANNEL_5 ((uint32_t)0x0010) |
| bogdanm | 0:9b334a45a8ff | 141 | #define TIM_CHANNEL_6 ((uint32_t)0x0014) |
| bogdanm | 0:9b334a45a8ff | 142 | #define TIM_CHANNEL_ALL ((uint32_t)0x003C) |
| bogdanm | 0:9b334a45a8ff | 143 | |
| bogdanm | 0:9b334a45a8ff | 144 | /** |
| bogdanm | 0:9b334a45a8ff | 145 | * @} |
| bogdanm | 0:9b334a45a8ff | 146 | */ |
| bogdanm | 0:9b334a45a8ff | 147 | |
| bogdanm | 0:9b334a45a8ff | 148 | /** @defgroup TIMEx_Output_Compare_and_PWM_modes TIMEx Output Compare and PWM Modes |
| bogdanm | 0:9b334a45a8ff | 149 | * @{ |
| bogdanm | 0:9b334a45a8ff | 150 | */ |
| bogdanm | 0:9b334a45a8ff | 151 | #define TIM_OCMODE_TIMING ((uint32_t)0x0000) |
| bogdanm | 0:9b334a45a8ff | 152 | #define TIM_OCMODE_ACTIVE ((uint32_t)TIM_CCMR1_OC1M_0) |
| bogdanm | 0:9b334a45a8ff | 153 | #define TIM_OCMODE_INACTIVE ((uint32_t)TIM_CCMR1_OC1M_1) |
| bogdanm | 0:9b334a45a8ff | 154 | #define TIM_OCMODE_TOGGLE ((uint32_t)TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_0) |
| bogdanm | 0:9b334a45a8ff | 155 | #define TIM_OCMODE_PWM1 ((uint32_t)TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1) |
| bogdanm | 0:9b334a45a8ff | 156 | #define TIM_OCMODE_PWM2 ((uint32_t)TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_0) |
| bogdanm | 0:9b334a45a8ff | 157 | #define TIM_OCMODE_FORCED_ACTIVE ((uint32_t)TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_0) |
| bogdanm | 0:9b334a45a8ff | 158 | #define TIM_OCMODE_FORCED_INACTIVE ((uint32_t)TIM_CCMR1_OC1M_2) |
| bogdanm | 0:9b334a45a8ff | 159 | |
| bogdanm | 0:9b334a45a8ff | 160 | #define TIM_OCMODE_RETRIGERRABLE_OPM1 ((uint32_t)TIM_CCMR1_OC1M_3) |
| bogdanm | 0:9b334a45a8ff | 161 | #define TIM_OCMODE_RETRIGERRABLE_OPM2 ((uint32_t)TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_0) |
| bogdanm | 0:9b334a45a8ff | 162 | #define TIM_OCMODE_COMBINED_PWM1 ((uint32_t)TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_2) |
| bogdanm | 0:9b334a45a8ff | 163 | #define TIM_OCMODE_COMBINED_PWM2 ((uint32_t)TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_0 | TIM_CCMR1_OC1M_2) |
| bogdanm | 0:9b334a45a8ff | 164 | #define TIM_OCMODE_ASSYMETRIC_PWM1 ((uint32_t)TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2) |
| bogdanm | 0:9b334a45a8ff | 165 | #define TIM_OCMODE_ASSYMETRIC_PWM2 ((uint32_t)TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M) |
| bogdanm | 0:9b334a45a8ff | 166 | /** |
| bogdanm | 0:9b334a45a8ff | 167 | * @} |
| bogdanm | 0:9b334a45a8ff | 168 | */ |
| bogdanm | 0:9b334a45a8ff | 169 | |
| bogdanm | 0:9b334a45a8ff | 170 | /** @defgroup TIMEx_Remap TIMEx Remap |
| bogdanm | 0:9b334a45a8ff | 171 | * @{ |
| bogdanm | 0:9b334a45a8ff | 172 | */ |
| bogdanm | 0:9b334a45a8ff | 173 | #define TIM_TIM2_TIM8_TRGO (0x00000000) |
| bogdanm | 0:9b334a45a8ff | 174 | #define TIM_TIM2_ETH_PTP (0x00000400) |
| bogdanm | 0:9b334a45a8ff | 175 | #define TIM_TIM2_USBFS_SOF (0x00000800) |
| bogdanm | 0:9b334a45a8ff | 176 | #define TIM_TIM2_USBHS_SOF (0x00000C00) |
| bogdanm | 0:9b334a45a8ff | 177 | #define TIM_TIM5_GPIO (0x00000000) |
| bogdanm | 0:9b334a45a8ff | 178 | #define TIM_TIM5_LSI (0x00000040) |
| bogdanm | 0:9b334a45a8ff | 179 | #define TIM_TIM5_LSE (0x00000080) |
| bogdanm | 0:9b334a45a8ff | 180 | #define TIM_TIM5_RTC (0x000000C0) |
| bogdanm | 0:9b334a45a8ff | 181 | #define TIM_TIM11_GPIO (0x00000000) |
| bogdanm | 0:9b334a45a8ff | 182 | #define TIM_TIM11_SPDIFRX (0x00000001) |
| bogdanm | 0:9b334a45a8ff | 183 | #define TIM_TIM11_HSE (0x00000002) |
| bogdanm | 0:9b334a45a8ff | 184 | #define TIM_TIM11_MCO1 (0x00000003) |
| bogdanm | 0:9b334a45a8ff | 185 | /** |
| bogdanm | 0:9b334a45a8ff | 186 | * @} |
| bogdanm | 0:9b334a45a8ff | 187 | */ |
| bogdanm | 0:9b334a45a8ff | 188 | |
| bogdanm | 0:9b334a45a8ff | 189 | /** @defgroup TIMEx_ClearInput_Source TIMEx Clear Input Source |
| bogdanm | 0:9b334a45a8ff | 190 | * @{ |
| bogdanm | 0:9b334a45a8ff | 191 | */ |
| bogdanm | 0:9b334a45a8ff | 192 | #define TIM_CLEARINPUTSOURCE_ETR ((uint32_t)0x0001) |
| bogdanm | 0:9b334a45a8ff | 193 | #define TIM_CLEARINPUTSOURCE_OCREFCLR ((uint32_t)0x0002) |
| bogdanm | 0:9b334a45a8ff | 194 | #define TIM_CLEARINPUTSOURCE_NONE ((uint32_t)0x0000) |
| bogdanm | 0:9b334a45a8ff | 195 | /** |
| bogdanm | 0:9b334a45a8ff | 196 | * @} |
| bogdanm | 0:9b334a45a8ff | 197 | */ |
| bogdanm | 0:9b334a45a8ff | 198 | |
| bogdanm | 0:9b334a45a8ff | 199 | /** @defgroup TIMEx_Break2_Input_enable_disable TIMEx Break input 2 Enable |
| bogdanm | 0:9b334a45a8ff | 200 | * @{ |
| bogdanm | 0:9b334a45a8ff | 201 | */ |
| bogdanm | 0:9b334a45a8ff | 202 | #define TIM_BREAK2_DISABLE ((uint32_t)0x00000000) |
| bogdanm | 0:9b334a45a8ff | 203 | #define TIM_BREAK2_ENABLE ((uint32_t)TIM_BDTR_BK2E) |
| bogdanm | 0:9b334a45a8ff | 204 | /** |
| bogdanm | 0:9b334a45a8ff | 205 | * @} |
| bogdanm | 0:9b334a45a8ff | 206 | */ |
| bogdanm | 0:9b334a45a8ff | 207 | |
| bogdanm | 0:9b334a45a8ff | 208 | /** @defgroup TIMEx_Break2_Polarity TIMEx Break2 Polarity |
| bogdanm | 0:9b334a45a8ff | 209 | * @{ |
| bogdanm | 0:9b334a45a8ff | 210 | */ |
| bogdanm | 0:9b334a45a8ff | 211 | #define TIM_BREAK2POLARITY_LOW ((uint32_t)0x00000000) |
| bogdanm | 0:9b334a45a8ff | 212 | #define TIM_BREAK2POLARITY_HIGH (TIM_BDTR_BK2P) |
| bogdanm | 0:9b334a45a8ff | 213 | /** |
| bogdanm | 0:9b334a45a8ff | 214 | * @} |
| bogdanm | 0:9b334a45a8ff | 215 | */ |
| bogdanm | 0:9b334a45a8ff | 216 | |
| bogdanm | 0:9b334a45a8ff | 217 | /** @defgroup TIMEx_Group_Channel5 TIMEx Group Channel 5 and Channel 1, 2 or 3 |
| bogdanm | 0:9b334a45a8ff | 218 | * @{ |
| bogdanm | 0:9b334a45a8ff | 219 | */ |
| bogdanm | 0:9b334a45a8ff | 220 | #define TIM_GROUPCH5_NONE (uint32_t)0x00000000 /* !< No effect of OC5REF on OC1REFC, OC2REFC and OC3REFC */ |
| bogdanm | 0:9b334a45a8ff | 221 | #define TIM_GROUPCH5_OC1REFC (TIM_CCR5_GC5C1) /* !< OC1REFC is the logical AND of OC1REFC and OC5REF */ |
| bogdanm | 0:9b334a45a8ff | 222 | #define TIM_GROUPCH5_OC2REFC (TIM_CCR5_GC5C2) /* !< OC2REFC is the logical AND of OC2REFC and OC5REF */ |
| bogdanm | 0:9b334a45a8ff | 223 | #define TIM_GROUPCH5_OC3REFC (TIM_CCR5_GC5C3) /* !< OC3REFC is the logical AND of OC3REFC and OC5REF */ |
| bogdanm | 0:9b334a45a8ff | 224 | /** |
| bogdanm | 0:9b334a45a8ff | 225 | * @} |
| bogdanm | 0:9b334a45a8ff | 226 | */ |
| bogdanm | 0:9b334a45a8ff | 227 | |
| bogdanm | 0:9b334a45a8ff | 228 | /** @defgroup TIMEx_Master_Mode_Selection_2 TIMEx Master Mode Selection 2 (TRGO2) |
| bogdanm | 0:9b334a45a8ff | 229 | * @{ |
| bogdanm | 0:9b334a45a8ff | 230 | */ |
| bogdanm | 0:9b334a45a8ff | 231 | #define TIM_TRGO2_RESET ((uint32_t)0x00000000) |
| bogdanm | 0:9b334a45a8ff | 232 | #define TIM_TRGO2_ENABLE ((uint32_t)(TIM_CR2_MMS2_0)) |
| bogdanm | 0:9b334a45a8ff | 233 | #define TIM_TRGO2_UPDATE ((uint32_t)(TIM_CR2_MMS2_1)) |
| bogdanm | 0:9b334a45a8ff | 234 | #define TIM_TRGO2_OC1 ((uint32_t)(TIM_CR2_MMS2_1 | TIM_CR2_MMS2_0)) |
| bogdanm | 0:9b334a45a8ff | 235 | #define TIM_TRGO2_OC1REF ((uint32_t)(TIM_CR2_MMS2_2)) |
| bogdanm | 0:9b334a45a8ff | 236 | #define TIM_TRGO2_OC2REF ((uint32_t)(TIM_CR2_MMS2_2 | TIM_CR2_MMS2_0)) |
| bogdanm | 0:9b334a45a8ff | 237 | #define TIM_TRGO2_OC3REF ((uint32_t)(TIM_CR2_MMS2_2 | TIM_CR2_MMS2_1)) |
| bogdanm | 0:9b334a45a8ff | 238 | #define TIM_TRGO2_OC4REF ((uint32_t)(TIM_CR2_MMS2_2 | TIM_CR2_MMS2_1 | TIM_CR2_MMS2_0)) |
| bogdanm | 0:9b334a45a8ff | 239 | #define TIM_TRGO2_OC5REF ((uint32_t)(TIM_CR2_MMS2_3)) |
| bogdanm | 0:9b334a45a8ff | 240 | #define TIM_TRGO2_OC6REF ((uint32_t)(TIM_CR2_MMS2_3 | TIM_CR2_MMS2_0)) |
| bogdanm | 0:9b334a45a8ff | 241 | #define TIM_TRGO2_OC4REF_RISINGFALLING ((uint32_t)(TIM_CR2_MMS2_3 | TIM_CR2_MMS2_1)) |
| bogdanm | 0:9b334a45a8ff | 242 | #define TIM_TRGO2_OC6REF_RISINGFALLING ((uint32_t)(TIM_CR2_MMS2_3 | TIM_CR2_MMS2_1 | TIM_CR2_MMS2_0)) |
| bogdanm | 0:9b334a45a8ff | 243 | #define TIM_TRGO2_OC4REF_RISING_OC6REF_RISING ((uint32_t)(TIM_CR2_MMS2_3 | TIM_CR2_MMS2_2)) |
| bogdanm | 0:9b334a45a8ff | 244 | #define TIM_TRGO2_OC4REF_RISING_OC6REF_FALLING ((uint32_t)(TIM_CR2_MMS2_3 | TIM_CR2_MMS2_2 | TIM_CR2_MMS2_0)) |
| bogdanm | 0:9b334a45a8ff | 245 | #define TIM_TRGO2_OC5REF_RISING_OC6REF_RISING ((uint32_t)(TIM_CR2_MMS2_3 | TIM_CR2_MMS2_2 |TIM_CR2_MMS2_1)) |
| bogdanm | 0:9b334a45a8ff | 246 | #define TIM_TRGO2_OC5REF_RISING_OC6REF_FALLING ((uint32_t)(TIM_CR2_MMS2_3 | TIM_CR2_MMS2_2 | TIM_CR2_MMS2_1 | TIM_CR2_MMS2_0)) |
| bogdanm | 0:9b334a45a8ff | 247 | /** |
| bogdanm | 0:9b334a45a8ff | 248 | * @} |
| bogdanm | 0:9b334a45a8ff | 249 | */ |
| bogdanm | 0:9b334a45a8ff | 250 | |
| bogdanm | 0:9b334a45a8ff | 251 | /** @defgroup TIMEx_Slave_Mode TIMEx Slave mode |
| bogdanm | 0:9b334a45a8ff | 252 | * @{ |
| bogdanm | 0:9b334a45a8ff | 253 | */ |
| bogdanm | 0:9b334a45a8ff | 254 | #define TIM_SLAVEMODE_DISABLE ((uint32_t)0x0000) |
| bogdanm | 0:9b334a45a8ff | 255 | #define TIM_SLAVEMODE_RESET ((uint32_t)(TIM_SMCR_SMS_2)) |
| bogdanm | 0:9b334a45a8ff | 256 | #define TIM_SLAVEMODE_GATED ((uint32_t)(TIM_SMCR_SMS_2 | TIM_SMCR_SMS_0)) |
| bogdanm | 0:9b334a45a8ff | 257 | #define TIM_SLAVEMODE_TRIGGER ((uint32_t)(TIM_SMCR_SMS_2 | TIM_SMCR_SMS_1)) |
| bogdanm | 0:9b334a45a8ff | 258 | #define TIM_SLAVEMODE_EXTERNAL1 ((uint32_t)(TIM_SMCR_SMS_2 | TIM_SMCR_SMS_1 | TIM_SMCR_SMS_0)) |
| bogdanm | 0:9b334a45a8ff | 259 | #define TIM_SLAVEMODE_COMBINED_RESETTRIGGER ((uint32_t)(TIM_SMCR_SMS_3)) |
| bogdanm | 0:9b334a45a8ff | 260 | /** |
| bogdanm | 0:9b334a45a8ff | 261 | * @} |
| bogdanm | 0:9b334a45a8ff | 262 | */ |
| mbed_official | 83:a036322b8637 | 263 | |
| bogdanm | 0:9b334a45a8ff | 264 | /** |
| bogdanm | 0:9b334a45a8ff | 265 | * @} |
| bogdanm | 0:9b334a45a8ff | 266 | */ |
| bogdanm | 0:9b334a45a8ff | 267 | |
| bogdanm | 0:9b334a45a8ff | 268 | /* Exported macro ------------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 269 | /** @defgroup TIMEx_Exported_Macros TIMEx Exported Macros |
| bogdanm | 0:9b334a45a8ff | 270 | * @{ |
| bogdanm | 0:9b334a45a8ff | 271 | */ |
| bogdanm | 0:9b334a45a8ff | 272 | |
| bogdanm | 0:9b334a45a8ff | 273 | /** |
| bogdanm | 0:9b334a45a8ff | 274 | * @brief Sets the TIM Capture Compare Register value on runtime without |
| bogdanm | 0:9b334a45a8ff | 275 | * calling another time ConfigChannel function. |
| bogdanm | 0:9b334a45a8ff | 276 | * @param __HANDLE__: TIM handle. |
| bogdanm | 0:9b334a45a8ff | 277 | * @param __CHANNEL__ : TIM Channels to be configured. |
| bogdanm | 0:9b334a45a8ff | 278 | * This parameter can be one of the following values: |
| bogdanm | 0:9b334a45a8ff | 279 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
| bogdanm | 0:9b334a45a8ff | 280 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
| bogdanm | 0:9b334a45a8ff | 281 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
| bogdanm | 0:9b334a45a8ff | 282 | * @arg TIM_CHANNEL_4: TIM Channel 4 selected |
| bogdanm | 0:9b334a45a8ff | 283 | * @arg TIM_CHANNEL_5: TIM Channel 5 selected |
| bogdanm | 0:9b334a45a8ff | 284 | * @arg TIM_CHANNEL_6: TIM Channel 6 selected |
| bogdanm | 0:9b334a45a8ff | 285 | * @param __COMPARE__: specifies the Capture Compare register new value. |
| bogdanm | 0:9b334a45a8ff | 286 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 287 | */ |
| bogdanm | 0:9b334a45a8ff | 288 | #define __HAL_TIM_SET_COMPARE(__HANDLE__, __CHANNEL__, __COMPARE__) \ |
| bogdanm | 0:9b334a45a8ff | 289 | (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCR1 = (__COMPARE__)) :\ |
| bogdanm | 0:9b334a45a8ff | 290 | ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCR2 = (__COMPARE__)) :\ |
| bogdanm | 0:9b334a45a8ff | 291 | ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCR3 = (__COMPARE__)) :\ |
| bogdanm | 0:9b334a45a8ff | 292 | ((__CHANNEL__) == TIM_CHANNEL_4) ? ((__HANDLE__)->Instance->CCR4 = (__COMPARE__)) :\ |
| bogdanm | 0:9b334a45a8ff | 293 | ((__CHANNEL__) == TIM_CHANNEL_5) ? ((__HANDLE__)->Instance->CCR5 = (__COMPARE__)) :\ |
| mbed_official | 83:a036322b8637 | 294 | ((__HANDLE__)->Instance->CCR6 = (__COMPARE__))) |
| bogdanm | 0:9b334a45a8ff | 295 | |
| bogdanm | 0:9b334a45a8ff | 296 | /** |
| bogdanm | 0:9b334a45a8ff | 297 | * @brief Gets the TIM Capture Compare Register value on runtime |
| bogdanm | 0:9b334a45a8ff | 298 | * @param __HANDLE__: TIM handle. |
| bogdanm | 0:9b334a45a8ff | 299 | * @param __CHANNEL__ : TIM Channel associated with the capture compare register |
| bogdanm | 0:9b334a45a8ff | 300 | * This parameter can be one of the following values: |
| bogdanm | 0:9b334a45a8ff | 301 | * @arg TIM_CHANNEL_1: get capture/compare 1 register value |
| bogdanm | 0:9b334a45a8ff | 302 | * @arg TIM_CHANNEL_2: get capture/compare 2 register value |
| bogdanm | 0:9b334a45a8ff | 303 | * @arg TIM_CHANNEL_3: get capture/compare 3 register value |
| bogdanm | 0:9b334a45a8ff | 304 | * @arg TIM_CHANNEL_4: get capture/compare 4 register value |
| bogdanm | 0:9b334a45a8ff | 305 | * @arg TIM_CHANNEL_5: get capture/compare 5 register value |
| bogdanm | 0:9b334a45a8ff | 306 | * @arg TIM_CHANNEL_6: get capture/compare 6 register value |
| bogdanm | 0:9b334a45a8ff | 307 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 308 | */ |
| bogdanm | 0:9b334a45a8ff | 309 | #define __HAL_TIM_GET_COMPARE(__HANDLE__, __CHANNEL__) \ |
| bogdanm | 0:9b334a45a8ff | 310 | (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCR1) :\ |
| bogdanm | 0:9b334a45a8ff | 311 | ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCR2) :\ |
| bogdanm | 0:9b334a45a8ff | 312 | ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCR3) :\ |
| bogdanm | 0:9b334a45a8ff | 313 | ((__CHANNEL__) == TIM_CHANNEL_4) ? ((__HANDLE__)->Instance->CCR4) :\ |
| bogdanm | 0:9b334a45a8ff | 314 | ((__CHANNEL__) == TIM_CHANNEL_5) ? ((__HANDLE__)->Instance->CCR5) :\ |
| bogdanm | 0:9b334a45a8ff | 315 | ((__HANDLE__)->Instance->CCR6)) |
| bogdanm | 0:9b334a45a8ff | 316 | |
| bogdanm | 0:9b334a45a8ff | 317 | /** |
| bogdanm | 0:9b334a45a8ff | 318 | * @} |
| bogdanm | 0:9b334a45a8ff | 319 | */ |
| bogdanm | 0:9b334a45a8ff | 320 | |
| bogdanm | 0:9b334a45a8ff | 321 | /* Exported functions --------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 322 | /** @addtogroup TIMEx_Exported_Functions |
| bogdanm | 0:9b334a45a8ff | 323 | * @{ |
| bogdanm | 0:9b334a45a8ff | 324 | */ |
| bogdanm | 0:9b334a45a8ff | 325 | |
| bogdanm | 0:9b334a45a8ff | 326 | /** @addtogroup TIMEx_Exported_Functions_Group1 |
| bogdanm | 0:9b334a45a8ff | 327 | * @{ |
| bogdanm | 0:9b334a45a8ff | 328 | */ |
| bogdanm | 0:9b334a45a8ff | 329 | /* Timer Hall Sensor functions **********************************************/ |
| bogdanm | 0:9b334a45a8ff | 330 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef* htim, TIM_HallSensor_InitTypeDef* sConfig); |
| bogdanm | 0:9b334a45a8ff | 331 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef* htim); |
| bogdanm | 0:9b334a45a8ff | 332 | |
| bogdanm | 0:9b334a45a8ff | 333 | void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef* htim); |
| bogdanm | 0:9b334a45a8ff | 334 | void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef* htim); |
| bogdanm | 0:9b334a45a8ff | 335 | |
| bogdanm | 0:9b334a45a8ff | 336 | /* Blocking mode: Polling */ |
| bogdanm | 0:9b334a45a8ff | 337 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef* htim); |
| bogdanm | 0:9b334a45a8ff | 338 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef* htim); |
| bogdanm | 0:9b334a45a8ff | 339 | /* Non-Blocking mode: Interrupt */ |
| bogdanm | 0:9b334a45a8ff | 340 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef* htim); |
| bogdanm | 0:9b334a45a8ff | 341 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef* htim); |
| bogdanm | 0:9b334a45a8ff | 342 | /* Non-Blocking mode: DMA */ |
| bogdanm | 0:9b334a45a8ff | 343 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef* htim, uint32_t *pData, uint16_t Length); |
| bogdanm | 0:9b334a45a8ff | 344 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef* htim); |
| bogdanm | 0:9b334a45a8ff | 345 | /** |
| bogdanm | 0:9b334a45a8ff | 346 | * @} |
| bogdanm | 0:9b334a45a8ff | 347 | */ |
| bogdanm | 0:9b334a45a8ff | 348 | |
| bogdanm | 0:9b334a45a8ff | 349 | /** @addtogroup TIMEx_Exported_Functions_Group2 |
| bogdanm | 0:9b334a45a8ff | 350 | * @{ |
| bogdanm | 0:9b334a45a8ff | 351 | */ |
| bogdanm | 0:9b334a45a8ff | 352 | /* Timer Complementary Output Compare functions *****************************/ |
| bogdanm | 0:9b334a45a8ff | 353 | /* Blocking mode: Polling */ |
| bogdanm | 0:9b334a45a8ff | 354 | HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef* htim, uint32_t Channel); |
| bogdanm | 0:9b334a45a8ff | 355 | HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef* htim, uint32_t Channel); |
| bogdanm | 0:9b334a45a8ff | 356 | |
| bogdanm | 0:9b334a45a8ff | 357 | /* Non-Blocking mode: Interrupt */ |
| bogdanm | 0:9b334a45a8ff | 358 | HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef* htim, uint32_t Channel); |
| bogdanm | 0:9b334a45a8ff | 359 | HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef* htim, uint32_t Channel); |
| bogdanm | 0:9b334a45a8ff | 360 | |
| bogdanm | 0:9b334a45a8ff | 361 | /* Non-Blocking mode: DMA */ |
| bogdanm | 0:9b334a45a8ff | 362 | HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef* htim, uint32_t Channel, uint32_t *pData, uint16_t Length); |
| bogdanm | 0:9b334a45a8ff | 363 | HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef* htim, uint32_t Channel); |
| bogdanm | 0:9b334a45a8ff | 364 | /** |
| bogdanm | 0:9b334a45a8ff | 365 | * @} |
| bogdanm | 0:9b334a45a8ff | 366 | */ |
| bogdanm | 0:9b334a45a8ff | 367 | |
| bogdanm | 0:9b334a45a8ff | 368 | /** @addtogroup TIMEx_Exported_Functions_Group3 |
| bogdanm | 0:9b334a45a8ff | 369 | * @{ |
| bogdanm | 0:9b334a45a8ff | 370 | */ |
| bogdanm | 0:9b334a45a8ff | 371 | /* Timer Complementary PWM functions ****************************************/ |
| bogdanm | 0:9b334a45a8ff | 372 | /* Blocking mode: Polling */ |
| bogdanm | 0:9b334a45a8ff | 373 | HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef* htim, uint32_t Channel); |
| bogdanm | 0:9b334a45a8ff | 374 | HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef* htim, uint32_t Channel); |
| bogdanm | 0:9b334a45a8ff | 375 | |
| bogdanm | 0:9b334a45a8ff | 376 | /* Non-Blocking mode: Interrupt */ |
| bogdanm | 0:9b334a45a8ff | 377 | HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef* htim, uint32_t Channel); |
| bogdanm | 0:9b334a45a8ff | 378 | HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef* htim, uint32_t Channel); |
| bogdanm | 0:9b334a45a8ff | 379 | /* Non-Blocking mode: DMA */ |
| bogdanm | 0:9b334a45a8ff | 380 | HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef* htim, uint32_t Channel, uint32_t *pData, uint16_t Length); |
| bogdanm | 0:9b334a45a8ff | 381 | HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef* htim, uint32_t Channel); |
| bogdanm | 0:9b334a45a8ff | 382 | /** |
| bogdanm | 0:9b334a45a8ff | 383 | * @} |
| bogdanm | 0:9b334a45a8ff | 384 | */ |
| bogdanm | 0:9b334a45a8ff | 385 | |
| bogdanm | 0:9b334a45a8ff | 386 | /** @addtogroup TIMEx_Exported_Functions_Group4 |
| bogdanm | 0:9b334a45a8ff | 387 | * @{ |
| bogdanm | 0:9b334a45a8ff | 388 | */ |
| bogdanm | 0:9b334a45a8ff | 389 | /* Timer Complementary One Pulse functions **********************************/ |
| bogdanm | 0:9b334a45a8ff | 390 | /* Blocking mode: Polling */ |
| bogdanm | 0:9b334a45a8ff | 391 | HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef* htim, uint32_t OutputChannel); |
| bogdanm | 0:9b334a45a8ff | 392 | HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef* htim, uint32_t OutputChannel); |
| bogdanm | 0:9b334a45a8ff | 393 | |
| bogdanm | 0:9b334a45a8ff | 394 | /* Non-Blocking mode: Interrupt */ |
| bogdanm | 0:9b334a45a8ff | 395 | HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef* htim, uint32_t OutputChannel); |
| bogdanm | 0:9b334a45a8ff | 396 | HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef* htim, uint32_t OutputChannel); |
| bogdanm | 0:9b334a45a8ff | 397 | /** |
| bogdanm | 0:9b334a45a8ff | 398 | * @} |
| bogdanm | 0:9b334a45a8ff | 399 | */ |
| bogdanm | 0:9b334a45a8ff | 400 | |
| bogdanm | 0:9b334a45a8ff | 401 | /** @addtogroup TIMEx_Exported_Functions_Group5 |
| bogdanm | 0:9b334a45a8ff | 402 | * @{ |
| bogdanm | 0:9b334a45a8ff | 403 | */ |
| bogdanm | 0:9b334a45a8ff | 404 | /* Extension Control functions ************************************************/ |
| bogdanm | 0:9b334a45a8ff | 405 | HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent(TIM_HandleTypeDef* htim, uint32_t InputTrigger, uint32_t CommutationSource); |
| bogdanm | 0:9b334a45a8ff | 406 | HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_IT(TIM_HandleTypeDef* htim, uint32_t InputTrigger, uint32_t CommutationSource); |
| bogdanm | 0:9b334a45a8ff | 407 | HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_DMA(TIM_HandleTypeDef* htim, uint32_t InputTrigger, uint32_t CommutationSource); |
| bogdanm | 0:9b334a45a8ff | 408 | HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef* htim, TIM_MasterConfigTypeDef * sMasterConfig); |
| bogdanm | 0:9b334a45a8ff | 409 | HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef* htim, TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig); |
| bogdanm | 0:9b334a45a8ff | 410 | HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef* htim, uint32_t Remap); |
| bogdanm | 0:9b334a45a8ff | 411 | HAL_StatusTypeDef HAL_TIMEx_GroupChannel5(TIM_HandleTypeDef *htim, uint32_t OCRef); |
| bogdanm | 0:9b334a45a8ff | 412 | /** |
| bogdanm | 0:9b334a45a8ff | 413 | * @} |
| bogdanm | 0:9b334a45a8ff | 414 | */ |
| bogdanm | 0:9b334a45a8ff | 415 | |
| bogdanm | 0:9b334a45a8ff | 416 | /** @addtogroup TIMEx_Exported_Functions_Group6 |
| bogdanm | 0:9b334a45a8ff | 417 | * @{ |
| bogdanm | 0:9b334a45a8ff | 418 | */ |
| bogdanm | 0:9b334a45a8ff | 419 | /* Extension Callback *********************************************************/ |
| bogdanm | 0:9b334a45a8ff | 420 | void HAL_TIMEx_CommutationCallback(TIM_HandleTypeDef* htim); |
| bogdanm | 0:9b334a45a8ff | 421 | void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef* htim); |
| bogdanm | 0:9b334a45a8ff | 422 | void HAL_TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma); |
| bogdanm | 0:9b334a45a8ff | 423 | /** |
| bogdanm | 0:9b334a45a8ff | 424 | * @} |
| bogdanm | 0:9b334a45a8ff | 425 | */ |
| bogdanm | 0:9b334a45a8ff | 426 | |
| bogdanm | 0:9b334a45a8ff | 427 | /** @addtogroup TIMEx_Exported_Functions_Group7 |
| bogdanm | 0:9b334a45a8ff | 428 | * @{ |
| bogdanm | 0:9b334a45a8ff | 429 | */ |
| bogdanm | 0:9b334a45a8ff | 430 | /* Extension Peripheral State functions **************************************/ |
| bogdanm | 0:9b334a45a8ff | 431 | HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(TIM_HandleTypeDef* htim); |
| bogdanm | 0:9b334a45a8ff | 432 | /** |
| bogdanm | 0:9b334a45a8ff | 433 | * @} |
| bogdanm | 0:9b334a45a8ff | 434 | */ |
| bogdanm | 0:9b334a45a8ff | 435 | |
| bogdanm | 0:9b334a45a8ff | 436 | /** |
| bogdanm | 0:9b334a45a8ff | 437 | * @} |
| bogdanm | 0:9b334a45a8ff | 438 | */ |
| bogdanm | 0:9b334a45a8ff | 439 | |
| bogdanm | 0:9b334a45a8ff | 440 | /* Private types -------------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 441 | /* Private variables ---------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 442 | /* Private constants ---------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 443 | /* Private macros ------------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 444 | /** @defgroup TIMEx_Private_Macros TIMEx Private Macros |
| bogdanm | 0:9b334a45a8ff | 445 | * @{ |
| bogdanm | 0:9b334a45a8ff | 446 | */ |
| bogdanm | 0:9b334a45a8ff | 447 | #define IS_TIM_CHANNELS(CHANNEL) (((CHANNEL) == TIM_CHANNEL_1) || \ |
| bogdanm | 0:9b334a45a8ff | 448 | ((CHANNEL) == TIM_CHANNEL_2) || \ |
| bogdanm | 0:9b334a45a8ff | 449 | ((CHANNEL) == TIM_CHANNEL_3) || \ |
| bogdanm | 0:9b334a45a8ff | 450 | ((CHANNEL) == TIM_CHANNEL_4) || \ |
| bogdanm | 0:9b334a45a8ff | 451 | ((CHANNEL) == TIM_CHANNEL_5) || \ |
| bogdanm | 0:9b334a45a8ff | 452 | ((CHANNEL) == TIM_CHANNEL_6) || \ |
| bogdanm | 0:9b334a45a8ff | 453 | ((CHANNEL) == TIM_CHANNEL_ALL)) |
| bogdanm | 0:9b334a45a8ff | 454 | |
| bogdanm | 0:9b334a45a8ff | 455 | #define IS_TIM_PWMI_CHANNELS(CHANNEL) (((CHANNEL) == TIM_CHANNEL_1) || \ |
| bogdanm | 0:9b334a45a8ff | 456 | ((CHANNEL) == TIM_CHANNEL_2)) |
| bogdanm | 0:9b334a45a8ff | 457 | |
| bogdanm | 0:9b334a45a8ff | 458 | #define IS_TIM_OPM_CHANNELS(CHANNEL) (((CHANNEL) == TIM_CHANNEL_1) || \ |
| bogdanm | 0:9b334a45a8ff | 459 | ((CHANNEL) == TIM_CHANNEL_2)) |
| bogdanm | 0:9b334a45a8ff | 460 | |
| bogdanm | 0:9b334a45a8ff | 461 | #define IS_TIM_COMPLEMENTARY_CHANNELS(CHANNEL) (((CHANNEL) == TIM_CHANNEL_1) || \ |
| bogdanm | 0:9b334a45a8ff | 462 | ((CHANNEL) == TIM_CHANNEL_2) || \ |
| bogdanm | 0:9b334a45a8ff | 463 | ((CHANNEL) == TIM_CHANNEL_3)) |
| bogdanm | 0:9b334a45a8ff | 464 | #define IS_TIM_PWM_MODE(MODE) (((MODE) == TIM_OCMODE_PWM1) || \ |
| bogdanm | 0:9b334a45a8ff | 465 | ((MODE) == TIM_OCMODE_PWM2) || \ |
| bogdanm | 0:9b334a45a8ff | 466 | ((MODE) == TIM_OCMODE_COMBINED_PWM1) || \ |
| bogdanm | 0:9b334a45a8ff | 467 | ((MODE) == TIM_OCMODE_COMBINED_PWM2) || \ |
| bogdanm | 0:9b334a45a8ff | 468 | ((MODE) == TIM_OCMODE_ASSYMETRIC_PWM1) || \ |
| bogdanm | 0:9b334a45a8ff | 469 | ((MODE) == TIM_OCMODE_ASSYMETRIC_PWM2)) |
| bogdanm | 0:9b334a45a8ff | 470 | |
| bogdanm | 0:9b334a45a8ff | 471 | #define IS_TIM_OC_MODE(MODE) (((MODE) == TIM_OCMODE_TIMING) || \ |
| bogdanm | 0:9b334a45a8ff | 472 | ((MODE) == TIM_OCMODE_ACTIVE) || \ |
| bogdanm | 0:9b334a45a8ff | 473 | ((MODE) == TIM_OCMODE_INACTIVE) || \ |
| bogdanm | 0:9b334a45a8ff | 474 | ((MODE) == TIM_OCMODE_TOGGLE) || \ |
| bogdanm | 0:9b334a45a8ff | 475 | ((MODE) == TIM_OCMODE_FORCED_ACTIVE) || \ |
| bogdanm | 0:9b334a45a8ff | 476 | ((MODE) == TIM_OCMODE_FORCED_INACTIVE) || \ |
| bogdanm | 0:9b334a45a8ff | 477 | ((MODE) == TIM_OCMODE_RETRIGERRABLE_OPM1) || \ |
| bogdanm | 0:9b334a45a8ff | 478 | ((MODE) == TIM_OCMODE_RETRIGERRABLE_OPM2)) |
| bogdanm | 0:9b334a45a8ff | 479 | #define IS_TIM_REMAP(__TIM_REMAP__) (((__TIM_REMAP__) == TIM_TIM2_TIM8_TRGO)||\ |
| bogdanm | 0:9b334a45a8ff | 480 | ((__TIM_REMAP__) == TIM_TIM2_ETH_PTP)||\ |
| bogdanm | 0:9b334a45a8ff | 481 | ((__TIM_REMAP__) == TIM_TIM2_USBFS_SOF)||\ |
| bogdanm | 0:9b334a45a8ff | 482 | ((__TIM_REMAP__) == TIM_TIM2_USBHS_SOF)||\ |
| bogdanm | 0:9b334a45a8ff | 483 | ((__TIM_REMAP__) == TIM_TIM5_GPIO)||\ |
| bogdanm | 0:9b334a45a8ff | 484 | ((__TIM_REMAP__) == TIM_TIM5_LSI)||\ |
| bogdanm | 0:9b334a45a8ff | 485 | ((__TIM_REMAP__) == TIM_TIM5_LSE)||\ |
| bogdanm | 0:9b334a45a8ff | 486 | ((__TIM_REMAP__) == TIM_TIM5_RTC)||\ |
| bogdanm | 0:9b334a45a8ff | 487 | ((__TIM_REMAP__) == TIM_TIM11_GPIO)||\ |
| bogdanm | 0:9b334a45a8ff | 488 | ((__TIM_REMAP__) == TIM_TIM11_SPDIFRX)||\ |
| bogdanm | 0:9b334a45a8ff | 489 | ((__TIM_REMAP__) == TIM_TIM11_HSE)||\ |
| bogdanm | 0:9b334a45a8ff | 490 | ((__TIM_REMAP__) == TIM_TIM11_MCO1)) |
| bogdanm | 0:9b334a45a8ff | 491 | #define IS_TIM_DEADTIME(__DEADTIME__) ((__DEADTIME__) <= 0xFF) |
| bogdanm | 0:9b334a45a8ff | 492 | #define IS_TIM_BREAK_FILTER(__FILTER__) ((__FILTER__) <= 0xF) |
| bogdanm | 0:9b334a45a8ff | 493 | #define IS_TIM_CLEARINPUT_SOURCE(MODE) (((MODE) == TIM_CLEARINPUTSOURCE_ETR) || \ |
| bogdanm | 0:9b334a45a8ff | 494 | ((MODE) == TIM_CLEARINPUTSOURCE_OCREFCLR) || \ |
| bogdanm | 0:9b334a45a8ff | 495 | ((MODE) == TIM_CLEARINPUTSOURCE_NONE)) |
| bogdanm | 0:9b334a45a8ff | 496 | #define IS_TIM_BREAK2_STATE(STATE) (((STATE) == TIM_BREAK2_ENABLE) || \ |
| bogdanm | 0:9b334a45a8ff | 497 | ((STATE) == TIM_BREAK2_DISABLE)) |
| bogdanm | 0:9b334a45a8ff | 498 | #define IS_TIM_BREAK2_POLARITY(__POLARITY__) (((__POLARITY__) == TIM_BREAK2POLARITY_LOW) || \ |
| bogdanm | 0:9b334a45a8ff | 499 | ((__POLARITY__) == TIM_BREAK2POLARITY_HIGH)) |
| bogdanm | 0:9b334a45a8ff | 500 | #define IS_TIM_GROUPCH5(OCREF) ((((OCREF) & 0x1FFFFFFF) == 0x00000000)) |
| bogdanm | 0:9b334a45a8ff | 501 | #define IS_TIM_TRGO2_SOURCE(SOURCE) (((SOURCE) == TIM_TRGO2_RESET) || \ |
| bogdanm | 0:9b334a45a8ff | 502 | ((SOURCE) == TIM_TRGO2_ENABLE) || \ |
| bogdanm | 0:9b334a45a8ff | 503 | ((SOURCE) == TIM_TRGO2_UPDATE) || \ |
| bogdanm | 0:9b334a45a8ff | 504 | ((SOURCE) == TIM_TRGO2_OC1) || \ |
| bogdanm | 0:9b334a45a8ff | 505 | ((SOURCE) == TIM_TRGO2_OC1REF) || \ |
| bogdanm | 0:9b334a45a8ff | 506 | ((SOURCE) == TIM_TRGO2_OC2REF) || \ |
| bogdanm | 0:9b334a45a8ff | 507 | ((SOURCE) == TIM_TRGO2_OC3REF) || \ |
| bogdanm | 0:9b334a45a8ff | 508 | ((SOURCE) == TIM_TRGO2_OC3REF) || \ |
| bogdanm | 0:9b334a45a8ff | 509 | ((SOURCE) == TIM_TRGO2_OC4REF) || \ |
| bogdanm | 0:9b334a45a8ff | 510 | ((SOURCE) == TIM_TRGO2_OC5REF) || \ |
| bogdanm | 0:9b334a45a8ff | 511 | ((SOURCE) == TIM_TRGO2_OC6REF) || \ |
| bogdanm | 0:9b334a45a8ff | 512 | ((SOURCE) == TIM_TRGO2_OC4REF_RISINGFALLING) || \ |
| bogdanm | 0:9b334a45a8ff | 513 | ((SOURCE) == TIM_TRGO2_OC6REF_RISINGFALLING) || \ |
| bogdanm | 0:9b334a45a8ff | 514 | ((SOURCE) == TIM_TRGO2_OC4REF_RISING_OC6REF_RISING) || \ |
| bogdanm | 0:9b334a45a8ff | 515 | ((SOURCE) == TIM_TRGO2_OC4REF_RISING_OC6REF_FALLING) || \ |
| bogdanm | 0:9b334a45a8ff | 516 | ((SOURCE) == TIM_TRGO2_OC5REF_RISING_OC6REF_RISING) || \ |
| bogdanm | 0:9b334a45a8ff | 517 | ((SOURCE) == TIM_TRGO2_OC5REF_RISING_OC6REF_FALLING)) |
| bogdanm | 0:9b334a45a8ff | 518 | #define IS_TIM_SLAVE_MODE(MODE) (((MODE) == TIM_SLAVEMODE_DISABLE) || \ |
| bogdanm | 0:9b334a45a8ff | 519 | ((MODE) == TIM_SLAVEMODE_RESET) || \ |
| bogdanm | 0:9b334a45a8ff | 520 | ((MODE) == TIM_SLAVEMODE_GATED) || \ |
| bogdanm | 0:9b334a45a8ff | 521 | ((MODE) == TIM_SLAVEMODE_TRIGGER) || \ |
| bogdanm | 0:9b334a45a8ff | 522 | ((MODE) == TIM_SLAVEMODE_EXTERNAL1) || \ |
| bogdanm | 0:9b334a45a8ff | 523 | ((MODE) == TIM_SLAVEMODE_COMBINED_RESETTRIGGER)) |
| bogdanm | 0:9b334a45a8ff | 524 | |
| bogdanm | 0:9b334a45a8ff | 525 | /** |
| bogdanm | 0:9b334a45a8ff | 526 | * @} |
| bogdanm | 0:9b334a45a8ff | 527 | */ |
| bogdanm | 0:9b334a45a8ff | 528 | |
| bogdanm | 0:9b334a45a8ff | 529 | /* Private functions ---------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 530 | /** @defgroup TIMEx_Private_Functions TIMEx Private Functions |
| bogdanm | 0:9b334a45a8ff | 531 | * @{ |
| bogdanm | 0:9b334a45a8ff | 532 | */ |
| bogdanm | 0:9b334a45a8ff | 533 | |
| bogdanm | 0:9b334a45a8ff | 534 | /** |
| bogdanm | 0:9b334a45a8ff | 535 | * @} |
| bogdanm | 0:9b334a45a8ff | 536 | */ |
| bogdanm | 0:9b334a45a8ff | 537 | |
| bogdanm | 0:9b334a45a8ff | 538 | /** |
| bogdanm | 0:9b334a45a8ff | 539 | * @} |
| bogdanm | 0:9b334a45a8ff | 540 | */ |
| bogdanm | 0:9b334a45a8ff | 541 | |
| bogdanm | 0:9b334a45a8ff | 542 | /** |
| bogdanm | 0:9b334a45a8ff | 543 | * @} |
| bogdanm | 0:9b334a45a8ff | 544 | */ |
| bogdanm | 0:9b334a45a8ff | 545 | |
| bogdanm | 0:9b334a45a8ff | 546 | #ifdef __cplusplus |
| bogdanm | 0:9b334a45a8ff | 547 | } |
| bogdanm | 0:9b334a45a8ff | 548 | #endif |
| bogdanm | 0:9b334a45a8ff | 549 | |
| bogdanm | 0:9b334a45a8ff | 550 | #endif /* __STM32F7xx_HAL_TIM_EX_H */ |
| bogdanm | 0:9b334a45a8ff | 551 | |
| bogdanm | 0:9b334a45a8ff | 552 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |