en 129 / mbed-dev

fix LPC812 PWM

Dependents:   IR_LED_Send

Fork of mbed-dev by mbed official

targets/hal/TARGET_NXP/TARGET_LPC81X/pwmout_api.c@0:9b334a45a8ff, 2015-10-01 (annotated)

Committer:
bogdanm
Date:
Thu Oct 01 15:25:22 2015 +0300
Revision:
0:9b334a45a8ff
Child:
108:e46d5651bd87
Initial commit on mbed-dev



Replaces mbed-src (now inactive)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /* mbed Microcontroller Library
bogdanm 0:9b334a45a8ff 2 * Copyright (c) 2006-2013 ARM Limited
bogdanm 0:9b334a45a8ff 3 *
bogdanm 0:9b334a45a8ff 4 * Licensed under the Apache License, Version 2.0 (the "License");
bogdanm 0:9b334a45a8ff 5 * you may not use this file except in compliance with the License.
bogdanm 0:9b334a45a8ff 6 * You may obtain a copy of the License at
bogdanm 0:9b334a45a8ff 7 *
bogdanm 0:9b334a45a8ff 8 * http://www.apache.org/licenses/LICENSE-2.0
bogdanm 0:9b334a45a8ff 9 *
bogdanm 0:9b334a45a8ff 10 * Unless required by applicable law or agreed to in writing, software
bogdanm 0:9b334a45a8ff 11 * distributed under the License is distributed on an "AS IS" BASIS,
bogdanm 0:9b334a45a8ff 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
bogdanm 0:9b334a45a8ff 13 * See the License for the specific language governing permissions and
bogdanm 0:9b334a45a8ff 14 * limitations under the License.
bogdanm 0:9b334a45a8ff 15 */
bogdanm 0:9b334a45a8ff 16 #include "mbed_assert.h"
bogdanm 0:9b334a45a8ff 17 #include "pwmout_api.h"
bogdanm 0:9b334a45a8ff 18 #include "cmsis.h"
bogdanm 0:9b334a45a8ff 19 #include "pinmap.h"
bogdanm 0:9b334a45a8ff 20 #include "mbed_error.h"
bogdanm 0:9b334a45a8ff 21
bogdanm 0:9b334a45a8ff 22 // Ported from LPC824 and adapted.
bogdanm 0:9b334a45a8ff 23
bogdanm 0:9b334a45a8ff 24 #if DEVICE_PWMOUT
bogdanm 0:9b334a45a8ff 25
bogdanm 0:9b334a45a8ff 26 #define PWM_IRQn SCT_IRQn
bogdanm 0:9b334a45a8ff 27
bogdanm 0:9b334a45a8ff 28 // Bit flags for used SCT Outputs
bogdanm 0:9b334a45a8ff 29 static unsigned char sct_used = 0;
bogdanm 0:9b334a45a8ff 30 static int sct_inited = 0;
bogdanm 0:9b334a45a8ff 31
bogdanm 0:9b334a45a8ff 32 // Find available output channel
bogdanm 0:9b334a45a8ff 33 // Max number of PWM outputs is 4 on LPC812
bogdanm 0:9b334a45a8ff 34 static int get_available_sct() {
bogdanm 0:9b334a45a8ff 35 int i;
bogdanm 0:9b334a45a8ff 36
bogdanm 0:9b334a45a8ff 37 // Find available output channel 0..3
bogdanm 0:9b334a45a8ff 38 // Also need one Match register per channel
bogdanm 0:9b334a45a8ff 39 for (i = 0; i < CONFIG_SCT_nOU; i++) {
bogdanm 0:9b334a45a8ff 40 // for (i = 0; i < 4; i++) {
bogdanm 0:9b334a45a8ff 41 if ((sct_used & (1 << i)) == 0)
bogdanm 0:9b334a45a8ff 42 return i;
bogdanm 0:9b334a45a8ff 43 }
bogdanm 0:9b334a45a8ff 44 return -1;
bogdanm 0:9b334a45a8ff 45 }
bogdanm 0:9b334a45a8ff 46
bogdanm 0:9b334a45a8ff 47 // Any Port pin may be used for PWM.
bogdanm 0:9b334a45a8ff 48 // Max number of PWM outputs is 4
bogdanm 0:9b334a45a8ff 49 void pwmout_init(pwmout_t* obj, PinName pin) {
bogdanm 0:9b334a45a8ff 50 MBED_ASSERT(pin != (uint32_t)NC);
bogdanm 0:9b334a45a8ff 51
bogdanm 0:9b334a45a8ff 52 int sct_n = get_available_sct();
bogdanm 0:9b334a45a8ff 53 if (sct_n == -1) {
bogdanm 0:9b334a45a8ff 54 error("No available SCT Output");
bogdanm 0:9b334a45a8ff 55 }
bogdanm 0:9b334a45a8ff 56
bogdanm 0:9b334a45a8ff 57 sct_used |= (1 << sct_n);
bogdanm 0:9b334a45a8ff 58
bogdanm 0:9b334a45a8ff 59 obj->pwm = (LPC_SCT_TypeDef*)LPC_SCT;
bogdanm 0:9b334a45a8ff 60 obj->pwm_ch = sct_n;
bogdanm 0:9b334a45a8ff 61
bogdanm 0:9b334a45a8ff 62 LPC_SCT_TypeDef* pwm = obj->pwm;
bogdanm 0:9b334a45a8ff 63
bogdanm 0:9b334a45a8ff 64 // Init SCT on first use
bogdanm 0:9b334a45a8ff 65 if (! sct_inited) {
bogdanm 0:9b334a45a8ff 66 sct_inited = 1;
bogdanm 0:9b334a45a8ff 67
bogdanm 0:9b334a45a8ff 68 // Enable the SCT clock
bogdanm 0:9b334a45a8ff 69 LPC_SYSCON->SYSAHBCLKCTRL |= (1 << 8);
bogdanm 0:9b334a45a8ff 70
bogdanm 0:9b334a45a8ff 71 // Clear peripheral reset the SCT:
bogdanm 0:9b334a45a8ff 72 LPC_SYSCON->PRESETCTRL |= (1 << 8);
bogdanm 0:9b334a45a8ff 73
bogdanm 0:9b334a45a8ff 74 // Two 16-bit counters, autolimit (ie reset on Match_0)
bogdanm 0:9b334a45a8ff 75 //pwm->CONFIG &= ~(0x1);
bogdanm 0:9b334a45a8ff 76 //pwm->CONFIG |= (1 << 17);
bogdanm 0:9b334a45a8ff 77 pwm->CONFIG |= ((0x3 << 17) | 0x01);
bogdanm 0:9b334a45a8ff 78
bogdanm 0:9b334a45a8ff 79 // halt and clear the counter
bogdanm 0:9b334a45a8ff 80 pwm->CTRL_U |= (1 << 2) | (1 << 3);
bogdanm 0:9b334a45a8ff 81
bogdanm 0:9b334a45a8ff 82 // System Clock (30 Mhz) -> Prescaler -> us_ticker (1 MHz)
bogdanm 0:9b334a45a8ff 83 pwm->CTRL_U &= ~(0x7F << 5);
bogdanm 0:9b334a45a8ff 84 pwm->CTRL_U |= (((SystemCoreClock/1000000 - 1) & 0x7F) << 5);
bogdanm 0:9b334a45a8ff 85
bogdanm 0:9b334a45a8ff 86 pwm->EVENT[0].CTRL = (1 << 12) | 0; // Event_0 on Match_0
bogdanm 0:9b334a45a8ff 87 pwm->EVENT[0].STATE = 0xFFFFFFFF; // All states
bogdanm 0:9b334a45a8ff 88
bogdanm 0:9b334a45a8ff 89 // unhalt the counter:
bogdanm 0:9b334a45a8ff 90 // - clearing bit 2 of the CTRL register
bogdanm 0:9b334a45a8ff 91 pwm->CTRL_U &= ~(1 << 2);
bogdanm 0:9b334a45a8ff 92
bogdanm 0:9b334a45a8ff 93 // Not using IRQs
bogdanm 0:9b334a45a8ff 94 //NVIC_SetVector(PWM_IRQn, (uint32_t)pwm_irq_handler);
bogdanm 0:9b334a45a8ff 95 //NVIC_EnableIRQ(PWM_IRQn);
bogdanm 0:9b334a45a8ff 96 }
bogdanm 0:9b334a45a8ff 97
bogdanm 0:9b334a45a8ff 98 // LPC81x has only one SCT and 4 Outputs
bogdanm 0:9b334a45a8ff 99 // LPC82x has only one SCT and 6 Outputs
bogdanm 0:9b334a45a8ff 100 // LPC1549 has 4 SCTs and 16 Outputs
bogdanm 0:9b334a45a8ff 101 switch(sct_n) {
bogdanm 0:9b334a45a8ff 102 case 0:
bogdanm 0:9b334a45a8ff 103 // SCTx_OUT0
bogdanm 0:9b334a45a8ff 104 LPC_SWM->PINASSIGN[6] &= ~0xFF000000;
bogdanm 0:9b334a45a8ff 105 LPC_SWM->PINASSIGN[6] |= (pin << 24);
bogdanm 0:9b334a45a8ff 106 break;
bogdanm 0:9b334a45a8ff 107 case 1:
bogdanm 0:9b334a45a8ff 108 // SCTx_OUT1
bogdanm 0:9b334a45a8ff 109 LPC_SWM->PINASSIGN[7] &= ~0x000000FF;
bogdanm 0:9b334a45a8ff 110 LPC_SWM->PINASSIGN[7] |= (pin);
bogdanm 0:9b334a45a8ff 111 break;
bogdanm 0:9b334a45a8ff 112 case 2:
bogdanm 0:9b334a45a8ff 113 // SCTx_OUT2
bogdanm 0:9b334a45a8ff 114 LPC_SWM->PINASSIGN[7] &= ~0x0000FF00;
bogdanm 0:9b334a45a8ff 115 LPC_SWM->PINASSIGN[7] |= (pin << 8);
bogdanm 0:9b334a45a8ff 116 break;
bogdanm 0:9b334a45a8ff 117 case 3:
bogdanm 0:9b334a45a8ff 118 // SCTx_OUT3
bogdanm 0:9b334a45a8ff 119 LPC_SWM->PINASSIGN[7] &= ~0x00FF0000;
bogdanm 0:9b334a45a8ff 120 LPC_SWM->PINASSIGN[7] |= (pin << 16);
bogdanm 0:9b334a45a8ff 121 break;
bogdanm 0:9b334a45a8ff 122 default:
bogdanm 0:9b334a45a8ff 123 break;
bogdanm 0:9b334a45a8ff 124 }
bogdanm 0:9b334a45a8ff 125
bogdanm 0:9b334a45a8ff 126 pwm->EVENT[sct_n + 1].CTRL = (1 << 12) | (sct_n + 1); // Event_n on Match_n
bogdanm 0:9b334a45a8ff 127 pwm->EVENT[sct_n + 1].STATE = 0xFFFFFFFF; // All states
bogdanm 0:9b334a45a8ff 128
bogdanm 0:9b334a45a8ff 129 pwm->OUT[sct_n].SET = (1 << 0); // All PWM channels are SET on Event_0
bogdanm 0:9b334a45a8ff 130 pwm->OUT[sct_n].CLR = (1 << (sct_n + 1)); // PWM ch is CLRed on Event_(ch+1)
bogdanm 0:9b334a45a8ff 131
bogdanm 0:9b334a45a8ff 132 // default to 20ms: standard for servos, and fine for e.g. brightness control
bogdanm 0:9b334a45a8ff 133 pwmout_period_ms(obj, 20); // 20ms period
bogdanm 0:9b334a45a8ff 134 pwmout_write (obj, 0.0); // 0ms pulsewidth, dutycycle 0
bogdanm 0:9b334a45a8ff 135 }
bogdanm 0:9b334a45a8ff 136
bogdanm 0:9b334a45a8ff 137 void pwmout_free(pwmout_t* obj) {
bogdanm 0:9b334a45a8ff 138 // PWM channel is now free
bogdanm 0:9b334a45a8ff 139 sct_used &= ~(1 << obj->pwm_ch);
bogdanm 0:9b334a45a8ff 140
bogdanm 0:9b334a45a8ff 141 // Disable the SCT clock when all channels free
bogdanm 0:9b334a45a8ff 142 if (sct_used == 0) {
bogdanm 0:9b334a45a8ff 143 LPC_SYSCON->SYSAHBCLKCTRL &= ~(1 << 8);
bogdanm 0:9b334a45a8ff 144 sct_inited = 0;
bogdanm 0:9b334a45a8ff 145 };
bogdanm 0:9b334a45a8ff 146 }
bogdanm 0:9b334a45a8ff 147
bogdanm 0:9b334a45a8ff 148 // Set new dutycycle (0.0 .. 1.0)
bogdanm 0:9b334a45a8ff 149 void pwmout_write(pwmout_t* obj, float value) {
bogdanm 0:9b334a45a8ff 150 //value is new dutycycle
bogdanm 0:9b334a45a8ff 151 if (value < 0.0f) {
bogdanm 0:9b334a45a8ff 152 value = 0.0;
bogdanm 0:9b334a45a8ff 153 } else if (value > 1.0f) {
bogdanm 0:9b334a45a8ff 154 value = 1.0;
bogdanm 0:9b334a45a8ff 155 }
bogdanm 0:9b334a45a8ff 156
bogdanm 0:9b334a45a8ff 157 // Match_0 is PWM period. Compute new endtime of pulse for current channel
bogdanm 0:9b334a45a8ff 158 uint32_t t_off = (uint32_t)((float)(obj->pwm->MATCHREL[0].U) * value);
bogdanm 0:9b334a45a8ff 159 obj->pwm->MATCHREL[(obj->pwm_ch) + 1].U = t_off; // New endtime
bogdanm 0:9b334a45a8ff 160 }
bogdanm 0:9b334a45a8ff 161
bogdanm 0:9b334a45a8ff 162 // Get dutycycle (0.0 .. 1.0)
bogdanm 0:9b334a45a8ff 163 float pwmout_read(pwmout_t* obj) {
bogdanm 0:9b334a45a8ff 164 uint32_t t_period = obj->pwm->MATCHREL[0].U;
bogdanm 0:9b334a45a8ff 165
bogdanm 0:9b334a45a8ff 166 //Sanity check
bogdanm 0:9b334a45a8ff 167 if (t_period == 0) {
bogdanm 0:9b334a45a8ff 168 return 0.0;
bogdanm 0:9b334a45a8ff 169 };
bogdanm 0:9b334a45a8ff 170
bogdanm 0:9b334a45a8ff 171 uint32_t t_off = obj->pwm->MATCHREL[(obj->pwm_ch) + 1].U;
bogdanm 0:9b334a45a8ff 172 float v = (float)t_off/(float)t_period;
bogdanm 0:9b334a45a8ff 173 //Sanity check
bogdanm 0:9b334a45a8ff 174 return (v > 1.0f) ? (1.0f) : (v);
bogdanm 0:9b334a45a8ff 175 }
bogdanm 0:9b334a45a8ff 176
bogdanm 0:9b334a45a8ff 177 // Set the PWM period, keeping the duty cycle the same (for this channel only!).
bogdanm 0:9b334a45a8ff 178 void pwmout_period(pwmout_t* obj, float seconds){
bogdanm 0:9b334a45a8ff 179 pwmout_period_us(obj, seconds * 1000000.0f);
bogdanm 0:9b334a45a8ff 180 }
bogdanm 0:9b334a45a8ff 181
bogdanm 0:9b334a45a8ff 182 // Set the PWM period, keeping the duty cycle the same (for this channel only!).
bogdanm 0:9b334a45a8ff 183 void pwmout_period_ms(pwmout_t* obj, int ms) {
bogdanm 0:9b334a45a8ff 184 pwmout_period_us(obj, ms * 1000);
bogdanm 0:9b334a45a8ff 185 }
bogdanm 0:9b334a45a8ff 186
bogdanm 0:9b334a45a8ff 187 // Set the PWM period, keeping the duty cycle the same (for this channel only!).
bogdanm 0:9b334a45a8ff 188 void pwmout_period_us(pwmout_t* obj, int us) {
bogdanm 0:9b334a45a8ff 189
bogdanm 0:9b334a45a8ff 190 uint32_t t_period = obj->pwm->MATCHREL[0].U; // Current PWM period
bogdanm 0:9b334a45a8ff 191 obj->pwm->MATCHREL[0].U = (uint32_t)us; // New PWM period
bogdanm 0:9b334a45a8ff 192
bogdanm 0:9b334a45a8ff 193 //Keep the dutycycle for the new PWM period
bogdanm 0:9b334a45a8ff 194 //Should really do this for all active channels!!
bogdanm 0:9b334a45a8ff 195 //This problem exists in all mbed libs.
bogdanm 0:9b334a45a8ff 196
bogdanm 0:9b334a45a8ff 197 //Sanity check
bogdanm 0:9b334a45a8ff 198 if (t_period == 0) {
bogdanm 0:9b334a45a8ff 199 return;
bogdanm 0:9b334a45a8ff 200 // obj->pwm->MATCHREL[(obj->pwm_ch) + 1].L = 0; // New endtime for this channel
bogdanm 0:9b334a45a8ff 201 }
bogdanm 0:9b334a45a8ff 202 else {
bogdanm 0:9b334a45a8ff 203 uint32_t t_off = obj->pwm->MATCHREL[(obj->pwm_ch) + 1].U;
bogdanm 0:9b334a45a8ff 204 float v = (float)t_off/(float)t_period;
bogdanm 0:9b334a45a8ff 205 obj->pwm->MATCHREL[(obj->pwm_ch) + 1].U = (uint32_t)((float)us * (float)v); // New endtime for this channel
bogdanm 0:9b334a45a8ff 206 }
bogdanm 0:9b334a45a8ff 207 }
bogdanm 0:9b334a45a8ff 208
bogdanm 0:9b334a45a8ff 209
bogdanm 0:9b334a45a8ff 210 //Set pulsewidth
bogdanm 0:9b334a45a8ff 211 void pwmout_pulsewidth(pwmout_t* obj, float seconds) {
bogdanm 0:9b334a45a8ff 212 pwmout_pulsewidth_us(obj, seconds * 1000000.0f);
bogdanm 0:9b334a45a8ff 213 }
bogdanm 0:9b334a45a8ff 214
bogdanm 0:9b334a45a8ff 215 //Set pulsewidth
bogdanm 0:9b334a45a8ff 216 void pwmout_pulsewidth_ms(pwmout_t* obj, int ms){
bogdanm 0:9b334a45a8ff 217 pwmout_pulsewidth_us(obj, ms * 1000);
bogdanm 0:9b334a45a8ff 218 }
bogdanm 0:9b334a45a8ff 219
bogdanm 0:9b334a45a8ff 220 //Set pulsewidth
bogdanm 0:9b334a45a8ff 221 void pwmout_pulsewidth_us(pwmout_t* obj, int us) {
bogdanm 0:9b334a45a8ff 222
bogdanm 0:9b334a45a8ff 223 //Should add Sanity check to make sure pulsewidth < period!
bogdanm 0:9b334a45a8ff 224 obj->pwm->MATCHREL[(obj->pwm_ch) + 1].U = (uint32_t)us; // New endtime for this channel
bogdanm 0:9b334a45a8ff 225 }
bogdanm 0:9b334a45a8ff 226
bogdanm 0:9b334a45a8ff 227 #endif