en 129 / mbed-dev

fix LPC812 PWM

Dependents:   IR_LED_Send

Fork of mbed-dev by mbed official

targets/cmsis/TARGET_STM/TARGET_STM32L4/stm32l4xx_hal_tim_ex.h@0:9b334a45a8ff, 2015-10-01 (annotated)

Committer:
bogdanm
Date:
Thu Oct 01 15:25:22 2015 +0300
Revision:
0:9b334a45a8ff
Initial commit on mbed-dev



Replaces mbed-src (now inactive)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /**
bogdanm 0:9b334a45a8ff 2 ******************************************************************************
bogdanm 0:9b334a45a8ff 3 * @file stm32l4xx_hal_tim_ex.h
bogdanm 0:9b334a45a8ff 4 * @author MCD Application Team
bogdanm 0:9b334a45a8ff 5 * @version V1.0.0
bogdanm 0:9b334a45a8ff 6 * @date 26-June-2015
bogdanm 0:9b334a45a8ff 7 * @brief Header file of TIM HAL Extended module.
bogdanm 0:9b334a45a8ff 8 ******************************************************************************
bogdanm 0:9b334a45a8ff 9 * @attention
bogdanm 0:9b334a45a8ff 10 *
bogdanm 0:9b334a45a8ff 11 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
bogdanm 0:9b334a45a8ff 12 *
bogdanm 0:9b334a45a8ff 13 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 0:9b334a45a8ff 14 * are permitted provided that the following conditions are met:
bogdanm 0:9b334a45a8ff 15 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 0:9b334a45a8ff 16 * this list of conditions and the following disclaimer.
bogdanm 0:9b334a45a8ff 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 0:9b334a45a8ff 18 * this list of conditions and the following disclaimer in the documentation
bogdanm 0:9b334a45a8ff 19 * and/or other materials provided with the distribution.
bogdanm 0:9b334a45a8ff 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 0:9b334a45a8ff 21 * may be used to endorse or promote products derived from this software
bogdanm 0:9b334a45a8ff 22 * without specific prior written permission.
bogdanm 0:9b334a45a8ff 23 *
bogdanm 0:9b334a45a8ff 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 0:9b334a45a8ff 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 0:9b334a45a8ff 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 0:9b334a45a8ff 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 0:9b334a45a8ff 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 0:9b334a45a8ff 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 0:9b334a45a8ff 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 0:9b334a45a8ff 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 0:9b334a45a8ff 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 0:9b334a45a8ff 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 0:9b334a45a8ff 34 *
bogdanm 0:9b334a45a8ff 35 ******************************************************************************
bogdanm 0:9b334a45a8ff 36 */
bogdanm 0:9b334a45a8ff 37
bogdanm 0:9b334a45a8ff 38 /* Define to prevent recursive inclusion -------------------------------------*/
bogdanm 0:9b334a45a8ff 39 #ifndef __STM32L4xx_HAL_TIM_EX_H
bogdanm 0:9b334a45a8ff 40 #define __STM32L4xx_HAL_TIM_EX_H
bogdanm 0:9b334a45a8ff 41
bogdanm 0:9b334a45a8ff 42 #ifdef __cplusplus
bogdanm 0:9b334a45a8ff 43 extern "C" {
bogdanm 0:9b334a45a8ff 44 #endif
bogdanm 0:9b334a45a8ff 45
bogdanm 0:9b334a45a8ff 46 /* Includes ------------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 47 #include "stm32l4xx_hal_def.h"
bogdanm 0:9b334a45a8ff 48
bogdanm 0:9b334a45a8ff 49 /** @addtogroup STM32L4xx_HAL_Driver
bogdanm 0:9b334a45a8ff 50 * @{
bogdanm 0:9b334a45a8ff 51 */
bogdanm 0:9b334a45a8ff 52
bogdanm 0:9b334a45a8ff 53 /** @addtogroup TIMEx
bogdanm 0:9b334a45a8ff 54 * @{
bogdanm 0:9b334a45a8ff 55 */
bogdanm 0:9b334a45a8ff 56
bogdanm 0:9b334a45a8ff 57 /* Exported types ------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 58 /** @defgroup TIMEx_Exported_Types TIM Extended Exported Types
bogdanm 0:9b334a45a8ff 59 * @{
bogdanm 0:9b334a45a8ff 60 */
bogdanm 0:9b334a45a8ff 61
bogdanm 0:9b334a45a8ff 62 /**
bogdanm 0:9b334a45a8ff 63 * @brief TIM Hall sensor Configuration Structure definition
bogdanm 0:9b334a45a8ff 64 */
bogdanm 0:9b334a45a8ff 65
bogdanm 0:9b334a45a8ff 66 typedef struct
bogdanm 0:9b334a45a8ff 67 {
bogdanm 0:9b334a45a8ff 68
bogdanm 0:9b334a45a8ff 69 uint32_t IC1Polarity; /*!< Specifies the active edge of the input signal.
bogdanm 0:9b334a45a8ff 70 This parameter can be a value of @ref TIM_Input_Capture_Polarity */
bogdanm 0:9b334a45a8ff 71
bogdanm 0:9b334a45a8ff 72 uint32_t IC1Prescaler; /*!< Specifies the Input Capture Prescaler.
bogdanm 0:9b334a45a8ff 73 This parameter can be a value of @ref TIM_Input_Capture_Prescaler */
bogdanm 0:9b334a45a8ff 74
bogdanm 0:9b334a45a8ff 75 uint32_t IC1Filter; /*!< Specifies the input capture filter.
bogdanm 0:9b334a45a8ff 76 This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
bogdanm 0:9b334a45a8ff 77
bogdanm 0:9b334a45a8ff 78 uint32_t Commutation_Delay; /*!< Specifies the pulse value to be loaded into the Capture Compare Register.
bogdanm 0:9b334a45a8ff 79 This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
bogdanm 0:9b334a45a8ff 80 } TIM_HallSensor_InitTypeDef;
bogdanm 0:9b334a45a8ff 81
bogdanm 0:9b334a45a8ff 82 /**
bogdanm 0:9b334a45a8ff 83 * @brief TIM Break/Break2 input configuration
bogdanm 0:9b334a45a8ff 84 */
bogdanm 0:9b334a45a8ff 85 typedef struct {
bogdanm 0:9b334a45a8ff 86 uint32_t Source; /*!< Specifies the source of the timer break input.
bogdanm 0:9b334a45a8ff 87 This parameter can be a value of @ref TIMEx_Break_Input_Source */
bogdanm 0:9b334a45a8ff 88 uint32_t Enable; /*!< Specifies whether or not the break input source is enabled.
bogdanm 0:9b334a45a8ff 89 This parameter can be a value of @ref TIMEx_Break_Input_Source_Enable */
bogdanm 0:9b334a45a8ff 90 uint32_t Polarity; /*!< Specifies the break input source polarity.
bogdanm 0:9b334a45a8ff 91 This parameter can be a value of @ref TIMEx_Break_Input_Source_Polarity
bogdanm 0:9b334a45a8ff 92 Not relevant when analog watchdog output of the DFSDM used as break input source */
bogdanm 0:9b334a45a8ff 93 } TIMEx_BreakInputConfigTypeDef;
bogdanm 0:9b334a45a8ff 94
bogdanm 0:9b334a45a8ff 95 /**
bogdanm 0:9b334a45a8ff 96 * @}
bogdanm 0:9b334a45a8ff 97 */
bogdanm 0:9b334a45a8ff 98 /* End of exported types -----------------------------------------------------*/
bogdanm 0:9b334a45a8ff 99
bogdanm 0:9b334a45a8ff 100 /* Exported constants --------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 101 /** @defgroup TIMEx_Exported_Constants TIM Extended Exported Constants
bogdanm 0:9b334a45a8ff 102 * @{
bogdanm 0:9b334a45a8ff 103 */
bogdanm 0:9b334a45a8ff 104
bogdanm 0:9b334a45a8ff 105 /** @defgroup TIMEx_Remap TIM Extended Remapping
bogdanm 0:9b334a45a8ff 106 * @{
bogdanm 0:9b334a45a8ff 107 */
bogdanm 0:9b334a45a8ff 108 #define TIM_TIM1_ETR_ADC1_NONE ((uint32_t)(0x00000000)) /* !< TIM1_ETR is not connected to any AWD (analog watchdog)*/
bogdanm 0:9b334a45a8ff 109 #define TIM_TIM1_ETR_ADC1_AWD1 (TIM1_OR1_ETR_ADC1_RMP_0) /* !< TIM1_ETR is connected to ADC1 AWD1 */
bogdanm 0:9b334a45a8ff 110 #define TIM_TIM1_ETR_ADC1_AWD2 (TIM1_OR1_ETR_ADC1_RMP_1) /* !< TIM1_ETR is connected to ADC1 AWD2 */
bogdanm 0:9b334a45a8ff 111 #define TIM_TIM1_ETR_ADC1_AWD3 (TIM1_OR1_ETR_ADC1_RMP_1 | TIM1_OR1_ETR_ADC1_RMP_0) /* !< TIM1_ETR is connected to ADC1 AWD3 */
bogdanm 0:9b334a45a8ff 112 #define TIM_TIM1_ETR_ADC3_NONE ((uint32_t)(0x00000000)) /* !< TIM1_ETR is not connected to any AWD (analog watchdog)*/
bogdanm 0:9b334a45a8ff 113 #define TIM_TIM1_ETR_ADC3_AWD1 (TIM1_OR1_ETR_ADC3_RMP_0) /* !< TIM1_ETR is connected to ADC3 AWD1 */
bogdanm 0:9b334a45a8ff 114 #define TIM_TIM1_ETR_ADC3_AWD2 (TIM1_OR1_ETR_ADC3_RMP_1) /* !< TIM1_ETR is connected to ADC3 AWD2 */
bogdanm 0:9b334a45a8ff 115 #define TIM_TIM1_ETR_ADC3_AWD3 (TIM1_OR1_ETR_ADC3_RMP_1 | TIM1_OR1_ETR_ADC3_RMP_0) /* !< TIM1_ETR is connected to ADC3 AWD3 */
bogdanm 0:9b334a45a8ff 116 #define TIM_TIM1_TI1_GPIO ((uint32_t)(0x00000000)) /* !< TIM1 TI1 is connected to GPIO */
bogdanm 0:9b334a45a8ff 117 #define TIM_TIM1_TI1_COMP1 (TIM1_OR1_TI1_RMP) /* !< TIM1 TI1 is connected to COMP1 */
bogdanm 0:9b334a45a8ff 118 #define TIM_TIM1_ETR_COMP1 (TIM1_OR2_ETRSEL_0) /* !< TIM1_ETR is connected to COMP1 output */
bogdanm 0:9b334a45a8ff 119 #define TIM_TIM1_ETR_COMP2 (TIM1_OR2_ETRSEL_1) /* !< TIM1_ETR is connected to COMP2 output */
bogdanm 0:9b334a45a8ff 120 #define TIM_TIM2_ITR1_TIM8_TRGO ((uint32_t)(0x00000000)) /* !< TIM2_ITR1 is connected to TIM8_TRGO */
bogdanm 0:9b334a45a8ff 121 #define TIM_TIM2_ITR1_OTG_FS_SOF (TIM2_OR1_ITR1_RMP) /* !< TIM2_ITR1 is connected to OTG_FS SOF */
bogdanm 0:9b334a45a8ff 122 #define TIM_TIM2_ETR_GPIO ((uint32_t)(0x00000000)) /* !< TIM2_ETR is connected to GPIO */
bogdanm 0:9b334a45a8ff 123 #define TIM_TIM2_ETR_LSE (TIM2_OR1_ETR1_RMP) /* !< TIM2_ETR is connected to LSE */
bogdanm 0:9b334a45a8ff 124 #define TIM_TIM2_ETR_COMP1 (TIM2_OR2_ETRSEL_0) /* !< TIM2_ETR is connected to COMP1 output */
bogdanm 0:9b334a45a8ff 125 #define TIM_TIM2_ETR_COMP2 (TIM2_OR2_ETRSEL_1) /* !< TIM2_ETR is connected to COMP2 output */
bogdanm 0:9b334a45a8ff 126 #define TIM_TIM2_TI4_GPIO ((uint32_t)(0x00000000)) /* !< TIM2 TI4 is connected to GPIO */
bogdanm 0:9b334a45a8ff 127 #define TIM_TIM2_TI4_COMP1 (TIM2_OR1_TI4_RMP_0) /* !< TIM2 TI4 is connected to COMP1 output */
bogdanm 0:9b334a45a8ff 128 #define TIM_TIM2_TI4_COMP2 (TIM2_OR1_TI4_RMP_1) /* !< TIM2 TI4 is connected to COMP2 output */
bogdanm 0:9b334a45a8ff 129 #define TIM_TIM2_TI4_COMP1_COMP2 (TIM2_OR1_TI4_RMP_1| TIM2_OR1_TI4_RMP_0) /* !< TIM2 TI4 is connected to logical OR between COMP1 and COMP2 output2 */
bogdanm 0:9b334a45a8ff 130 #define TIM_TIM3_TI1_GPIO ((uint32_t)(0x00000000)) /* !< TIM3 TI1 is connected to GPIO */
bogdanm 0:9b334a45a8ff 131 #define TIM_TIM3_TI1_COMP1 (TIM3_OR1_TI1_RMP_0) /* !< TIM3 TI1 is connected to COMP1 output */
bogdanm 0:9b334a45a8ff 132 #define TIM_TIM3_TI1_COMP2 (TIM3_OR1_TI1_RMP_1) /* !< TIM3 TI1 is connected to COMP2 output */
bogdanm 0:9b334a45a8ff 133 #define TIM_TIM3_TI1_COMP1_COMP2 (TIM3_OR1_TI1_RMP_1 | TIM3_OR1_TI1_RMP_0) /* !< TIM3 TI1 is connected to logical OR between COMP1 and COMP2 output2 */
bogdanm 0:9b334a45a8ff 134 #define TIM_TIM3_ETR_GPIO ((uint32_t)(0x00000000)) /* !< TIM3_ETR is connected to GPIO */
bogdanm 0:9b334a45a8ff 135 #define TIM_TIM3_ETR_COMP1 (TIM3_OR2_ETRSEL_0) /* !< TIM3_ETR is connected to COMP1 output */
bogdanm 0:9b334a45a8ff 136 #define TIM_TIM8_ETR_ADC2_NONE ((uint32_t)(0x00000000)) /* !< TIM8_ETR is not connected to any AWD (analog watchdog)*/
bogdanm 0:9b334a45a8ff 137 #define TIM_TIM8_ETR_ADC2_AWD1 (TIM8_OR1_ETR_ADC2_RMP_0) /* !< TIM8_ETR is connected to ADC2 AWD1 */
bogdanm 0:9b334a45a8ff 138 #define TIM_TIM8_ETR_ADC2_AWD2 (TIM8_OR1_ETR_ADC2_RMP_1) /* !< TIM8_ETR is connected to ADC2 AWD2 */
bogdanm 0:9b334a45a8ff 139 #define TIM_TIM8_ETR_ADC2_AWD3 (TIM8_OR1_ETR_ADC2_RMP_1 | TIM8_OR1_ETR_ADC2_RMP_0) /* !< TIM8_ETR is connected to ADC2 AWD3 */
bogdanm 0:9b334a45a8ff 140 #define TIM_TIM8_ETR_ADC3_NONE ((uint32_t)(0x00000000)) /* !< TIM8_ETR is not connected to any AWD (analog watchdog)*/
bogdanm 0:9b334a45a8ff 141 #define TIM_TIM8_ETR_ADC3_AWD1 (TIM8_OR1_ETR_ADC3_RMP_0) /* !< TIM8_ETR is connected to ADC3 AWD1 */
bogdanm 0:9b334a45a8ff 142 #define TIM_TIM8_ETR_ADC3_AWD2 (TIM8_OR1_ETR_ADC3_RMP_1) /* !< TIM8_ETR is connected to ADC3 AWD2 */
bogdanm 0:9b334a45a8ff 143 #define TIM_TIM8_ETR_ADC3_AWD3 (TIM8_OR1_ETR_ADC3_RMP_1 | TIM8_OR1_ETR_ADC3_RMP_0) /* !< TIM8_ETR is connected to ADC3 AWD3 */
bogdanm 0:9b334a45a8ff 144 #define TIM_TIM8_TI1_GPIO ((uint32_t)(0x00000000)) /* !< TIM8 TI1 is connected to GPIO */
bogdanm 0:9b334a45a8ff 145 #define TIM_TIM8_TI1_COMP2 (TIM8_OR1_TI1_RMP) /* !< TIM8 TI1 is connected to COMP1 */
bogdanm 0:9b334a45a8ff 146 #define TIM_TIM8_ETR_COMP1 (TIM8_OR2_ETRSEL_0) /* !< TIM8_ETR is connected to COMP1 output */
bogdanm 0:9b334a45a8ff 147 #define TIM_TIM8_ETR_COMP2 (TIM8_OR2_ETRSEL_1) /* !< TIM8_ETR is connected to COMP2 output */
bogdanm 0:9b334a45a8ff 148 #define TIM_TIM15_TI1_GPIO ((uint32_t)(0x00000000)) /* !< TIM15 TI1 is connected to GPIO */
bogdanm 0:9b334a45a8ff 149 #define TIM_TIM15_TI1_LSE (TIM15_OR1_TI1_RMP) /* !< TIM15 TI1 is connected to LSE */
bogdanm 0:9b334a45a8ff 150 #define TIM_TIM15_ENCODERMODE_NONE ((uint32_t)(0x00000000)) /* !< No redirection */
bogdanm 0:9b334a45a8ff 151 #define TIM_TIM15_ENCODERMODE_TIM2 (TIM15_OR1_ENCODER_MODE_0) /* !< TIM2 IC1 and TIM2 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectively */
bogdanm 0:9b334a45a8ff 152 #define TIM_TIM15_ENCODERMODE_TIM3 (TIM15_OR1_ENCODER_MODE_1) /* !< TIM3 IC1 and TIM3 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectively */
bogdanm 0:9b334a45a8ff 153 #define TIM_TIM15_ENCODERMODE_TIM4 (TIM15_OR1_ENCODER_MODE_1 | TIM15_OR1_ENCODER_MODE_0) /* !< TIM4 IC1 and TIM4 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectively */
bogdanm 0:9b334a45a8ff 154 #define TIM_TIM16_TI1_GPIO ((uint32_t)(0x00000000)) /* !< TIM16 TI1 is connected to GPIO */
bogdanm 0:9b334a45a8ff 155 #define TIM_TIM16_TI1_LSI (TIM16_OR1_TI1_RMP_0) /* !< TIM16 TI1 is connected to LSI */
bogdanm 0:9b334a45a8ff 156 #define TIM_TIM16_TI1_LSE (TIM16_OR1_TI1_RMP_1) /* !< TIM16 TI1 is connected to LSE */
bogdanm 0:9b334a45a8ff 157 #define TIM_TIM16_TI1_RTC (TIM16_OR1_TI1_RMP_1 | TIM16_OR1_TI1_RMP_0) /* !< TIM16 TI1 is connected to RTC wakeup interrupt */
bogdanm 0:9b334a45a8ff 158 #define TIM_TIM17_TI1_GPIO ((uint32_t)(0x00000000)) /* !< TIM17 TI1 is connected to GPIO */
bogdanm 0:9b334a45a8ff 159 #define TIM_TIM17_TI1_MSI (TIM17_OR1_TI1_RMP_0) /* !< TIM17 TI1 is connected to MSI */
bogdanm 0:9b334a45a8ff 160 #define TIM_TIM17_TI1_HSE_32 (TIM17_OR1_TI1_RMP_1) /* !< TIM17 TI1 is connected to HSE div 32 */
bogdanm 0:9b334a45a8ff 161 #define TIM_TIM17_TI1_MCO (TIM17_OR1_TI1_RMP_1 | TIM17_OR1_TI1_RMP_0) /* !< TIM17 TI1 is connected to MCO */
bogdanm 0:9b334a45a8ff 162 /**
bogdanm 0:9b334a45a8ff 163 * @}
bogdanm 0:9b334a45a8ff 164 */
bogdanm 0:9b334a45a8ff 165
bogdanm 0:9b334a45a8ff 166 /** @defgroup TIMEx_Break_Input TIM Extended Break input
bogdanm 0:9b334a45a8ff 167 * @{
bogdanm 0:9b334a45a8ff 168 */
bogdanm 0:9b334a45a8ff 169 #define TIM_BREAKINPUT_BRK ((uint32_t)(0x00000001)) /* !< Timer break input */
bogdanm 0:9b334a45a8ff 170 #define TIM_BREAKINPUT_BRK2 ((uint32_t)(0x00000002)) /* !< Timer break2 input */
bogdanm 0:9b334a45a8ff 171 /**
bogdanm 0:9b334a45a8ff 172 * @}
bogdanm 0:9b334a45a8ff 173 */
bogdanm 0:9b334a45a8ff 174
bogdanm 0:9b334a45a8ff 175 /** @defgroup TIMEx_Break_Input_Source TIM Extended Break input source
bogdanm 0:9b334a45a8ff 176 * @{
bogdanm 0:9b334a45a8ff 177 */
bogdanm 0:9b334a45a8ff 178 #define TIM_BREAKINPUTSOURCE_BKIN ((uint32_t)(0x00000001)) /* !< An external source (GPIO) is connected to the BKIN pin */
bogdanm 0:9b334a45a8ff 179 #define TIM_BREAKINPUTSOURCE_COMP1 ((uint32_t)(0x00000002)) /* !< The COMP1 output is connected to the break input */
bogdanm 0:9b334a45a8ff 180 #define TIM_BREAKINPUTSOURCE_COMP2 ((uint32_t)(0x00000004)) /* !< The COMP2 output is connected to the break input */
bogdanm 0:9b334a45a8ff 181 #define TIM_BREAKINPUTSOURCE_DFSDM ((uint32_t)(0x00000008)) /* !< The analog watchdog output of the DFSDM peripheral is connected to the break input */
bogdanm 0:9b334a45a8ff 182 /**
bogdanm 0:9b334a45a8ff 183 * @}
bogdanm 0:9b334a45a8ff 184 */
bogdanm 0:9b334a45a8ff 185
bogdanm 0:9b334a45a8ff 186 /** @defgroup TIMEx_Break_Input_Source_Enable TIM Extended Break input source enabling
bogdanm 0:9b334a45a8ff 187 * @{
bogdanm 0:9b334a45a8ff 188 */
bogdanm 0:9b334a45a8ff 189 #define TIM_BREAKINPUTSOURCE_DISABLE ((uint32_t)(0x00000000)) /* !< Break input source is disabled */
bogdanm 0:9b334a45a8ff 190 #define TIM_BREAKINPUTSOURCE_ENABLE ((uint32_t)(0x00000001)) /* !< Break input source is enabled */
bogdanm 0:9b334a45a8ff 191 /**
bogdanm 0:9b334a45a8ff 192 * @}
bogdanm 0:9b334a45a8ff 193 */
bogdanm 0:9b334a45a8ff 194
bogdanm 0:9b334a45a8ff 195 /** @defgroup TIMEx_Break_Input_Source_Polarity TIM Extended Break input polarity
bogdanm 0:9b334a45a8ff 196 * @{
bogdanm 0:9b334a45a8ff 197 */
bogdanm 0:9b334a45a8ff 198 #define TIM_BREAKINPUTSOURCE_POLARITY_LOW ((uint32_t)(0x00000001)) /* !< Break input source is active low */
bogdanm 0:9b334a45a8ff 199 #define TIM_BREAKINPUTSOURCE_POLARITY_HIGH ((uint32_t)(0x00000000)) /* !< Break input source is active_high */
bogdanm 0:9b334a45a8ff 200 /**
bogdanm 0:9b334a45a8ff 201 * @}
bogdanm 0:9b334a45a8ff 202 */
bogdanm 0:9b334a45a8ff 203
bogdanm 0:9b334a45a8ff 204 /**
bogdanm 0:9b334a45a8ff 205 * @}
bogdanm 0:9b334a45a8ff 206 */
bogdanm 0:9b334a45a8ff 207 /* End of exported constants -------------------------------------------------*/
bogdanm 0:9b334a45a8ff 208
bogdanm 0:9b334a45a8ff 209 /* Exported macro ------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 210 /** @defgroup TIMEx_Exported_Macros TIM Extended Exported Macros
bogdanm 0:9b334a45a8ff 211 * @{
bogdanm 0:9b334a45a8ff 212 */
bogdanm 0:9b334a45a8ff 213
bogdanm 0:9b334a45a8ff 214 /**
bogdanm 0:9b334a45a8ff 215 * @}
bogdanm 0:9b334a45a8ff 216 */
bogdanm 0:9b334a45a8ff 217 /* End of exported macro -----------------------------------------------------*/
bogdanm 0:9b334a45a8ff 218
bogdanm 0:9b334a45a8ff 219 /* Private macro -------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 220 /** @defgroup TIMEx_Private_Macros TIM Extended Private Macros
bogdanm 0:9b334a45a8ff 221 * @{
bogdanm 0:9b334a45a8ff 222 */
bogdanm 0:9b334a45a8ff 223 #define IS_TIM_REMAP(__REMAP__) (((__REMAP__) <= (uint32_t)0x0001C01F))
bogdanm 0:9b334a45a8ff 224
bogdanm 0:9b334a45a8ff 225 #define IS_TIM_BREAKINPUT(__BREAKINPUT__) (((__BREAKINPUT__) == TIM_BREAKINPUT_BRK) || \
bogdanm 0:9b334a45a8ff 226 ((__BREAKINPUT__) == TIM_BREAKINPUT_BRK2))
bogdanm 0:9b334a45a8ff 227
bogdanm 0:9b334a45a8ff 228 #define IS_TIM_BREAKINPUTSOURCE(__SOURCE__) (((__SOURCE__) == TIM_BREAKINPUTSOURCE_BKIN) || \
bogdanm 0:9b334a45a8ff 229 ((__SOURCE__) == TIM_BREAKINPUTSOURCE_COMP1) || \
bogdanm 0:9b334a45a8ff 230 ((__SOURCE__) == TIM_BREAKINPUTSOURCE_COMP2) || \
bogdanm 0:9b334a45a8ff 231 ((__SOURCE__) == TIM_BREAKINPUTSOURCE_DFSDM))
bogdanm 0:9b334a45a8ff 232
bogdanm 0:9b334a45a8ff 233 #define IS_TIM_BREAKINPUTSOURCE_STATE(__STATE__) (((__STATE__) == TIM_BREAKINPUTSOURCE_DISABLE) || \
bogdanm 0:9b334a45a8ff 234 ((__STATE__) == TIM_BREAKINPUTSOURCE_ENABLE))
bogdanm 0:9b334a45a8ff 235
bogdanm 0:9b334a45a8ff 236 #define IS_TIM_BREAKINPUTSOURCE_POLARITY(__POLARITY__) (((__POLARITY__) == TIM_BREAKINPUTSOURCE_POLARITY_LOW) || \
bogdanm 0:9b334a45a8ff 237 ((__POLARITY__) == TIM_BREAKINPUTSOURCE_POLARITY_HIGH))
bogdanm 0:9b334a45a8ff 238 /**
bogdanm 0:9b334a45a8ff 239 * @}
bogdanm 0:9b334a45a8ff 240 */
bogdanm 0:9b334a45a8ff 241 /* End of private macro ------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 242
bogdanm 0:9b334a45a8ff 243 /* Exported functions --------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 244 /** @addtogroup TIMEx_Exported_Functions TIM Extended Exported Functions
bogdanm 0:9b334a45a8ff 245 * @{
bogdanm 0:9b334a45a8ff 246 */
bogdanm 0:9b334a45a8ff 247
bogdanm 0:9b334a45a8ff 248 /** @addtogroup TIMEx_Exported_Functions_Group1 Extended Timer Hall Sensor functions
bogdanm 0:9b334a45a8ff 249 * @brief Timer Hall Sensor functions
bogdanm 0:9b334a45a8ff 250 * @{
bogdanm 0:9b334a45a8ff 251 */
bogdanm 0:9b334a45a8ff 252 /* Timer Hall Sensor functions **********************************************/
bogdanm 0:9b334a45a8ff 253 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *htim, TIM_HallSensor_InitTypeDef* sConfig);
bogdanm 0:9b334a45a8ff 254 HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef *htim);
bogdanm 0:9b334a45a8ff 255
bogdanm 0:9b334a45a8ff 256 void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef *htim);
bogdanm 0:9b334a45a8ff 257 void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef *htim);
bogdanm 0:9b334a45a8ff 258
bogdanm 0:9b334a45a8ff 259 /* Blocking mode: Polling */
bogdanm 0:9b334a45a8ff 260 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef *htim);
bogdanm 0:9b334a45a8ff 261 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef *htim);
bogdanm 0:9b334a45a8ff 262 /* Non-Blocking mode: Interrupt */
bogdanm 0:9b334a45a8ff 263 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef *htim);
bogdanm 0:9b334a45a8ff 264 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef *htim);
bogdanm 0:9b334a45a8ff 265 /* Non-Blocking mode: DMA */
bogdanm 0:9b334a45a8ff 266 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length);
bogdanm 0:9b334a45a8ff 267 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef *htim);
bogdanm 0:9b334a45a8ff 268 /**
bogdanm 0:9b334a45a8ff 269 * @}
bogdanm 0:9b334a45a8ff 270 */
bogdanm 0:9b334a45a8ff 271
bogdanm 0:9b334a45a8ff 272 /** @addtogroup TIMEx_Exported_Functions_Group2 Extended Timer Complementary Output Compare functions
bogdanm 0:9b334a45a8ff 273 * @brief Timer Complementary Output Compare functions
bogdanm 0:9b334a45a8ff 274 * @{
bogdanm 0:9b334a45a8ff 275 */
bogdanm 0:9b334a45a8ff 276 /* Timer Complementary Output Compare functions *****************************/
bogdanm 0:9b334a45a8ff 277 /* Blocking mode: Polling */
bogdanm 0:9b334a45a8ff 278 HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef *htim, uint32_t Channel);
bogdanm 0:9b334a45a8ff 279 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel);
bogdanm 0:9b334a45a8ff 280
bogdanm 0:9b334a45a8ff 281 /* Non-Blocking mode: Interrupt */
bogdanm 0:9b334a45a8ff 282 HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
bogdanm 0:9b334a45a8ff 283 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
bogdanm 0:9b334a45a8ff 284
bogdanm 0:9b334a45a8ff 285 /* Non-Blocking mode: DMA */
bogdanm 0:9b334a45a8ff 286 HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length);
bogdanm 0:9b334a45a8ff 287 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);
bogdanm 0:9b334a45a8ff 288 /**
bogdanm 0:9b334a45a8ff 289 * @}
bogdanm 0:9b334a45a8ff 290 */
bogdanm 0:9b334a45a8ff 291
bogdanm 0:9b334a45a8ff 292 /** @addtogroup TIMEx_Exported_Functions_Group3 Extended Timer Complementary PWM functions
bogdanm 0:9b334a45a8ff 293 * @brief Timer Complementary PWM functions
bogdanm 0:9b334a45a8ff 294 * @{
bogdanm 0:9b334a45a8ff 295 */
bogdanm 0:9b334a45a8ff 296 /* Timer Complementary PWM functions ****************************************/
bogdanm 0:9b334a45a8ff 297 /* Blocking mode: Polling */
bogdanm 0:9b334a45a8ff 298 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef *htim, uint32_t Channel);
bogdanm 0:9b334a45a8ff 299 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel);
bogdanm 0:9b334a45a8ff 300
bogdanm 0:9b334a45a8ff 301 /* Non-Blocking mode: Interrupt */
bogdanm 0:9b334a45a8ff 302 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
bogdanm 0:9b334a45a8ff 303 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
bogdanm 0:9b334a45a8ff 304 /* Non-Blocking mode: DMA */
bogdanm 0:9b334a45a8ff 305 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length);
bogdanm 0:9b334a45a8ff 306 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);
bogdanm 0:9b334a45a8ff 307 /**
bogdanm 0:9b334a45a8ff 308 * @}
bogdanm 0:9b334a45a8ff 309 */
bogdanm 0:9b334a45a8ff 310
bogdanm 0:9b334a45a8ff 311 /** @addtogroup TIMEx_Exported_Functions_Group4 Extended Timer Complementary One Pulse functions
bogdanm 0:9b334a45a8ff 312 * @brief Timer Complementary One Pulse functions
bogdanm 0:9b334a45a8ff 313 * @{
bogdanm 0:9b334a45a8ff 314 */
bogdanm 0:9b334a45a8ff 315 /* Timer Complementary One Pulse functions **********************************/
bogdanm 0:9b334a45a8ff 316 /* Blocking mode: Polling */
bogdanm 0:9b334a45a8ff 317 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
bogdanm 0:9b334a45a8ff 318 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
bogdanm 0:9b334a45a8ff 319
bogdanm 0:9b334a45a8ff 320 /* Non-Blocking mode: Interrupt */
bogdanm 0:9b334a45a8ff 321 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
bogdanm 0:9b334a45a8ff 322 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
bogdanm 0:9b334a45a8ff 323 /**
bogdanm 0:9b334a45a8ff 324 * @}
bogdanm 0:9b334a45a8ff 325 */
bogdanm 0:9b334a45a8ff 326
bogdanm 0:9b334a45a8ff 327 /** @addtogroup TIMEx_Exported_Functions_Group5 Extended Peripheral Control functions
bogdanm 0:9b334a45a8ff 328 * @brief Peripheral Control functions
bogdanm 0:9b334a45a8ff 329 * @{
bogdanm 0:9b334a45a8ff 330 */
bogdanm 0:9b334a45a8ff 331 /* Extended Control functions ************************************************/
bogdanm 0:9b334a45a8ff 332 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource);
bogdanm 0:9b334a45a8ff 333 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_IT(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource);
bogdanm 0:9b334a45a8ff 334 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_DMA(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource);
bogdanm 0:9b334a45a8ff 335 HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, TIM_MasterConfigTypeDef * sMasterConfig);
bogdanm 0:9b334a45a8ff 336 HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim, TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig);
bogdanm 0:9b334a45a8ff 337 HAL_StatusTypeDef HAL_TIMEx_ConfigBreakInput(TIM_HandleTypeDef *htim, uint32_t BreakInput, TIMEx_BreakInputConfigTypeDef *sBreakInputConfig);
bogdanm 0:9b334a45a8ff 338 HAL_StatusTypeDef HAL_TIMEx_GroupChannel5(TIM_HandleTypeDef *htim, uint32_t Channels);
bogdanm 0:9b334a45a8ff 339 HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap);
bogdanm 0:9b334a45a8ff 340
bogdanm 0:9b334a45a8ff 341 /**
bogdanm 0:9b334a45a8ff 342 * @}
bogdanm 0:9b334a45a8ff 343 */
bogdanm 0:9b334a45a8ff 344
bogdanm 0:9b334a45a8ff 345 /** @addtogroup TIMEx_Exported_Functions_Group6 Extended Callbacks functions
bogdanm 0:9b334a45a8ff 346 * @brief Extended Callbacks functions
bogdanm 0:9b334a45a8ff 347 * @{
bogdanm 0:9b334a45a8ff 348 */
bogdanm 0:9b334a45a8ff 349 /* Extended Callback **********************************************************/
bogdanm 0:9b334a45a8ff 350 void HAL_TIMEx_CommutationCallback(TIM_HandleTypeDef *htim);
bogdanm 0:9b334a45a8ff 351 void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim);
bogdanm 0:9b334a45a8ff 352 /**
bogdanm 0:9b334a45a8ff 353 * @}
bogdanm 0:9b334a45a8ff 354 */
bogdanm 0:9b334a45a8ff 355
bogdanm 0:9b334a45a8ff 356 /** @addtogroup TIMEx_Exported_Functions_Group7 Extended Peripheral State functions
bogdanm 0:9b334a45a8ff 357 * @brief Extended Peripheral State functions
bogdanm 0:9b334a45a8ff 358 * @{
bogdanm 0:9b334a45a8ff 359 */
bogdanm 0:9b334a45a8ff 360 /* Extended Peripheral State functions ***************************************/
bogdanm 0:9b334a45a8ff 361 HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(TIM_HandleTypeDef *htim);
bogdanm 0:9b334a45a8ff 362 /**
bogdanm 0:9b334a45a8ff 363 * @}
bogdanm 0:9b334a45a8ff 364 */
bogdanm 0:9b334a45a8ff 365
bogdanm 0:9b334a45a8ff 366 /**
bogdanm 0:9b334a45a8ff 367 * @}
bogdanm 0:9b334a45a8ff 368 */
bogdanm 0:9b334a45a8ff 369 /* End of exported functions -------------------------------------------------*/
bogdanm 0:9b334a45a8ff 370
bogdanm 0:9b334a45a8ff 371 /* Private functions----------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 372 /** @defgroup TIMEx_Private_Functions TIMEx Private Functions
bogdanm 0:9b334a45a8ff 373 * @{
bogdanm 0:9b334a45a8ff 374 */
bogdanm 0:9b334a45a8ff 375 void TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma);
bogdanm 0:9b334a45a8ff 376 /**
bogdanm 0:9b334a45a8ff 377 * @}
bogdanm 0:9b334a45a8ff 378 */
bogdanm 0:9b334a45a8ff 379 /* End of private functions --------------------------------------------------*/
bogdanm 0:9b334a45a8ff 380
bogdanm 0:9b334a45a8ff 381 /**
bogdanm 0:9b334a45a8ff 382 * @}
bogdanm 0:9b334a45a8ff 383 */
bogdanm 0:9b334a45a8ff 384
bogdanm 0:9b334a45a8ff 385 /**
bogdanm 0:9b334a45a8ff 386 * @}
bogdanm 0:9b334a45a8ff 387 */
bogdanm 0:9b334a45a8ff 388
bogdanm 0:9b334a45a8ff 389 #ifdef __cplusplus
bogdanm 0:9b334a45a8ff 390 }
bogdanm 0:9b334a45a8ff 391 #endif
bogdanm 0:9b334a45a8ff 392
bogdanm 0:9b334a45a8ff 393
bogdanm 0:9b334a45a8ff 394 #endif /* __STM32L4xx_HAL_TIM_EX_H */
bogdanm 0:9b334a45a8ff 395
bogdanm 0:9b334a45a8ff 396 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/