en 129 / mbed-dev

fix LPC812 PWM

Dependents:   IR_LED_Send

Fork of mbed-dev by mbed official

targets/cmsis/TARGET_STM/TARGET_STM32L4/stm32l4xx_hal_flash_ex.c@0:9b334a45a8ff, 2015-10-01 (annotated)

Committer:
bogdanm
Date:
Thu Oct 01 15:25:22 2015 +0300
Revision:
0:9b334a45a8ff
Initial commit on mbed-dev



Replaces mbed-src (now inactive)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /**
bogdanm 0:9b334a45a8ff 2 ******************************************************************************
bogdanm 0:9b334a45a8ff 3 * @file stm32l4xx_hal_flash_ex.c
bogdanm 0:9b334a45a8ff 4 * @author MCD Application Team
bogdanm 0:9b334a45a8ff 5 * @version V1.0.0
bogdanm 0:9b334a45a8ff 6 * @date 26-June-2015
bogdanm 0:9b334a45a8ff 7 * @brief Extended FLASH HAL module driver.
bogdanm 0:9b334a45a8ff 8 * This file provides firmware functions to manage the following
bogdanm 0:9b334a45a8ff 9 * functionalities of the FLASH extended peripheral:
bogdanm 0:9b334a45a8ff 10 * + Extended programming operations functions
bogdanm 0:9b334a45a8ff 11 *
bogdanm 0:9b334a45a8ff 12 @verbatim
bogdanm 0:9b334a45a8ff 13 ==============================================================================
bogdanm 0:9b334a45a8ff 14 ##### Flash Extended features #####
bogdanm 0:9b334a45a8ff 15 ==============================================================================
bogdanm 0:9b334a45a8ff 16
bogdanm 0:9b334a45a8ff 17 [..] Comparing to other previous devices, the FLASH interface for STM32L4xx
bogdanm 0:9b334a45a8ff 18 devices contains the following additional features
bogdanm 0:9b334a45a8ff 19
bogdanm 0:9b334a45a8ff 20 (+) Capacity up to 2 Mbyte with dual bank architecture supporting read-while-write
bogdanm 0:9b334a45a8ff 21 capability (RWW)
bogdanm 0:9b334a45a8ff 22 (+) Dual bank memory organization
bogdanm 0:9b334a45a8ff 23 (+) PCROP protection for all banks
bogdanm 0:9b334a45a8ff 24
bogdanm 0:9b334a45a8ff 25 ##### How to use this driver #####
bogdanm 0:9b334a45a8ff 26 ==============================================================================
bogdanm 0:9b334a45a8ff 27 [..] This driver provides functions to configure and program the FLASH memory
bogdanm 0:9b334a45a8ff 28 of all STM32L4xx devices. It includes
bogdanm 0:9b334a45a8ff 29 (#) Flash Memory Erase functions:
bogdanm 0:9b334a45a8ff 30 (++) Lock and Unlock the FLASH interface using HAL_FLASH_Unlock() and
bogdanm 0:9b334a45a8ff 31 HAL_FLASH_Lock() functions
bogdanm 0:9b334a45a8ff 32 (++) Erase function: Erase page, erase all sectors
bogdanm 0:9b334a45a8ff 33 (++) There are two modes of erase :
bogdanm 0:9b334a45a8ff 34 (+++) Polling Mode using HAL_FLASHEx_Erase()
bogdanm 0:9b334a45a8ff 35 (+++) Interrupt Mode using HAL_FLASHEx_Erase_IT()
bogdanm 0:9b334a45a8ff 36
bogdanm 0:9b334a45a8ff 37 (#) Option Bytes Programming function: Use HAL_FLASHEx_OBProgram() to :
bogdanm 0:9b334a45a8ff 38 (++) Set/Reset the write protection
bogdanm 0:9b334a45a8ff 39 (++) Set the Read protection Level
bogdanm 0:9b334a45a8ff 40 (++) Program the user Option Bytes
bogdanm 0:9b334a45a8ff 41 (++) Configure the PCROP protection
bogdanm 0:9b334a45a8ff 42
bogdanm 0:9b334a45a8ff 43 (#) Get Option Bytes Configuration function: Use HAL_FLASHEx_OBGetConfig() to :
bogdanm 0:9b334a45a8ff 44 (++) Get the value of a write protection area
bogdanm 0:9b334a45a8ff 45 (++) Know if the read protection is activated
bogdanm 0:9b334a45a8ff 46 (++) Get the value of the user Option Bytes
bogdanm 0:9b334a45a8ff 47 (++) Get the value of a PCROP area
bogdanm 0:9b334a45a8ff 48
bogdanm 0:9b334a45a8ff 49 @endverbatim
bogdanm 0:9b334a45a8ff 50 ******************************************************************************
bogdanm 0:9b334a45a8ff 51 * @attention
bogdanm 0:9b334a45a8ff 52 *
bogdanm 0:9b334a45a8ff 53 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
bogdanm 0:9b334a45a8ff 54 *
bogdanm 0:9b334a45a8ff 55 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 0:9b334a45a8ff 56 * are permitted provided that the following conditions are met:
bogdanm 0:9b334a45a8ff 57 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 0:9b334a45a8ff 58 * this list of conditions and the following disclaimer.
bogdanm 0:9b334a45a8ff 59 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 0:9b334a45a8ff 60 * this list of conditions and the following disclaimer in the documentation
bogdanm 0:9b334a45a8ff 61 * and/or other materials provided with the distribution.
bogdanm 0:9b334a45a8ff 62 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 0:9b334a45a8ff 63 * may be used to endorse or promote products derived from this software
bogdanm 0:9b334a45a8ff 64 * without specific prior written permission.
bogdanm 0:9b334a45a8ff 65 *
bogdanm 0:9b334a45a8ff 66 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 0:9b334a45a8ff 67 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 0:9b334a45a8ff 68 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 0:9b334a45a8ff 69 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 0:9b334a45a8ff 70 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 0:9b334a45a8ff 71 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 0:9b334a45a8ff 72 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 0:9b334a45a8ff 73 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 0:9b334a45a8ff 74 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 0:9b334a45a8ff 75 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 0:9b334a45a8ff 76 *
bogdanm 0:9b334a45a8ff 77 ******************************************************************************
bogdanm 0:9b334a45a8ff 78 */
bogdanm 0:9b334a45a8ff 79
bogdanm 0:9b334a45a8ff 80 /* Includes ------------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 81 #include "stm32l4xx_hal.h"
bogdanm 0:9b334a45a8ff 82
bogdanm 0:9b334a45a8ff 83 /** @addtogroup STM32L4xx_HAL_Driver
bogdanm 0:9b334a45a8ff 84 * @{
bogdanm 0:9b334a45a8ff 85 */
bogdanm 0:9b334a45a8ff 86
bogdanm 0:9b334a45a8ff 87 /** @defgroup FLASHEx FLASHEx
bogdanm 0:9b334a45a8ff 88 * @brief FALSH Extended HAL module driver
bogdanm 0:9b334a45a8ff 89 * @{
bogdanm 0:9b334a45a8ff 90 */
bogdanm 0:9b334a45a8ff 91
bogdanm 0:9b334a45a8ff 92 #ifdef HAL_FLASH_MODULE_ENABLED
bogdanm 0:9b334a45a8ff 93
bogdanm 0:9b334a45a8ff 94 /* Private typedef -----------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 95 /* Private define ------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 96 /* Private macro -------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 97 /* Private variables ---------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 98 /** @defgroup FLASHEx_Private_Variables FLASHEx Private Variables
bogdanm 0:9b334a45a8ff 99 * @{
bogdanm 0:9b334a45a8ff 100 */
bogdanm 0:9b334a45a8ff 101 extern FLASH_ProcessTypeDef pFlash;
bogdanm 0:9b334a45a8ff 102 /**
bogdanm 0:9b334a45a8ff 103 * @}
bogdanm 0:9b334a45a8ff 104 */
bogdanm 0:9b334a45a8ff 105
bogdanm 0:9b334a45a8ff 106 /* Private function prototypes -----------------------------------------------*/
bogdanm 0:9b334a45a8ff 107 /** @defgroup FLASHEx_Private_Functions FLASHEx Private Functions
bogdanm 0:9b334a45a8ff 108 * @{
bogdanm 0:9b334a45a8ff 109 */
bogdanm 0:9b334a45a8ff 110 extern HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout);
bogdanm 0:9b334a45a8ff 111 void FLASH_PageErase(uint32_t Page, uint32_t Banks);
bogdanm 0:9b334a45a8ff 112 static void FLASH_MassErase(uint32_t Banks);
bogdanm 0:9b334a45a8ff 113 void FLASH_FlushCaches(void);
bogdanm 0:9b334a45a8ff 114 static HAL_StatusTypeDef FLASH_OB_WRPConfig(uint32_t WRPArea, uint32_t WRPStartOffset, uint32_t WRDPEndOffset);
bogdanm 0:9b334a45a8ff 115 static HAL_StatusTypeDef FLASH_OB_RDPConfig(uint32_t RDPLevel);
bogdanm 0:9b334a45a8ff 116 static HAL_StatusTypeDef FLASH_OB_UserConfig(uint32_t UserType, uint32_t UserConfig);
bogdanm 0:9b334a45a8ff 117 static HAL_StatusTypeDef FLASH_OB_PCROPConfig(uint32_t PCROPConfig, uint32_t PCROPStartAddr, uint32_t PCROPEndAddr);
bogdanm 0:9b334a45a8ff 118 static void FLASH_OB_GetWRP(uint32_t WRPArea, uint32_t * WRPStartOffset, uint32_t * WRDPEndOffset);
bogdanm 0:9b334a45a8ff 119 static uint32_t FLASH_OB_GetRDP(void);
bogdanm 0:9b334a45a8ff 120 static uint32_t FLASH_OB_GetUser(void);
bogdanm 0:9b334a45a8ff 121 static void FLASH_OB_GetPCROP(uint32_t * PCROPConfig, uint32_t * PCROPStartAddr, uint32_t * PCROPEndAddr);
bogdanm 0:9b334a45a8ff 122 /**
bogdanm 0:9b334a45a8ff 123 * @}
bogdanm 0:9b334a45a8ff 124 */
bogdanm 0:9b334a45a8ff 125
bogdanm 0:9b334a45a8ff 126 /* Exported functions -------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 127 /** @defgroup FLASHEx_Exported_Functions FLASH Extended Exported Functions
bogdanm 0:9b334a45a8ff 128 * @{
bogdanm 0:9b334a45a8ff 129 */
bogdanm 0:9b334a45a8ff 130
bogdanm 0:9b334a45a8ff 131 /** @defgroup FLASHEx_Exported_Functions_Group1 Extended IO operation functions
bogdanm 0:9b334a45a8ff 132 * @brief Extended IO operation functions
bogdanm 0:9b334a45a8ff 133 *
bogdanm 0:9b334a45a8ff 134 @verbatim
bogdanm 0:9b334a45a8ff 135 ===============================================================================
bogdanm 0:9b334a45a8ff 136 ##### Extended programming operation functions #####
bogdanm 0:9b334a45a8ff 137 ===============================================================================
bogdanm 0:9b334a45a8ff 138 [..]
bogdanm 0:9b334a45a8ff 139 This subsection provides a set of functions allowing to manage the Extended FLASH
bogdanm 0:9b334a45a8ff 140 programming operations Operations.
bogdanm 0:9b334a45a8ff 141
bogdanm 0:9b334a45a8ff 142 @endverbatim
bogdanm 0:9b334a45a8ff 143 * @{
bogdanm 0:9b334a45a8ff 144 */
bogdanm 0:9b334a45a8ff 145 /**
bogdanm 0:9b334a45a8ff 146 * @brief Perform a mass erase or erase the specified FLASH memory pages.
bogdanm 0:9b334a45a8ff 147 * @param[in] pEraseInit: pointer to an FLASH_EraseInitTypeDef structure that
bogdanm 0:9b334a45a8ff 148 * contains the configuration information for the erasing.
bogdanm 0:9b334a45a8ff 149 *
bogdanm 0:9b334a45a8ff 150 * @param[out] PageError : pointer to variable that contains the configuration
bogdanm 0:9b334a45a8ff 151 * information on faulty page in case of error (0xFFFFFFFF means that all
bogdanm 0:9b334a45a8ff 152 * the pages have been correctly erased)
bogdanm 0:9b334a45a8ff 153 *
bogdanm 0:9b334a45a8ff 154 * @retval HAL Status
bogdanm 0:9b334a45a8ff 155 */
bogdanm 0:9b334a45a8ff 156 HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *PageError)
bogdanm 0:9b334a45a8ff 157 {
bogdanm 0:9b334a45a8ff 158 HAL_StatusTypeDef status = HAL_ERROR;
bogdanm 0:9b334a45a8ff 159 uint32_t page_index = 0;
bogdanm 0:9b334a45a8ff 160
bogdanm 0:9b334a45a8ff 161 /* Process Locked */
bogdanm 0:9b334a45a8ff 162 __HAL_LOCK(&pFlash);
bogdanm 0:9b334a45a8ff 163
bogdanm 0:9b334a45a8ff 164 /* Check the parameters */
bogdanm 0:9b334a45a8ff 165 assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase));
bogdanm 0:9b334a45a8ff 166
bogdanm 0:9b334a45a8ff 167 /* Wait for last operation to be completed */
bogdanm 0:9b334a45a8ff 168 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
bogdanm 0:9b334a45a8ff 169
bogdanm 0:9b334a45a8ff 170 if (status == HAL_OK)
bogdanm 0:9b334a45a8ff 171 {
bogdanm 0:9b334a45a8ff 172 pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
bogdanm 0:9b334a45a8ff 173
bogdanm 0:9b334a45a8ff 174 if (pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE)
bogdanm 0:9b334a45a8ff 175 {
bogdanm 0:9b334a45a8ff 176 /* Mass erase to be done */
bogdanm 0:9b334a45a8ff 177 FLASH_MassErase(pEraseInit->Banks);
bogdanm 0:9b334a45a8ff 178
bogdanm 0:9b334a45a8ff 179 /* Wait for last operation to be completed */
bogdanm 0:9b334a45a8ff 180 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
bogdanm 0:9b334a45a8ff 181
bogdanm 0:9b334a45a8ff 182 /* If the erase operation is completed, disable the MER1 and MER2 Bits */
bogdanm 0:9b334a45a8ff 183 CLEAR_BIT(FLASH->CR, (FLASH_CR_MER1 | FLASH_CR_MER2));
bogdanm 0:9b334a45a8ff 184 }
bogdanm 0:9b334a45a8ff 185 else
bogdanm 0:9b334a45a8ff 186 {
bogdanm 0:9b334a45a8ff 187 /*Initialization of PageError variable*/
bogdanm 0:9b334a45a8ff 188 *PageError = 0xFFFFFFFF;
bogdanm 0:9b334a45a8ff 189
bogdanm 0:9b334a45a8ff 190 for(page_index = pEraseInit->Page; page_index < (pEraseInit->Page + pEraseInit->NbPages); page_index++)
bogdanm 0:9b334a45a8ff 191 {
bogdanm 0:9b334a45a8ff 192 FLASH_PageErase(page_index, pEraseInit->Banks);
bogdanm 0:9b334a45a8ff 193
bogdanm 0:9b334a45a8ff 194 /* Wait for last operation to be completed */
bogdanm 0:9b334a45a8ff 195 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
bogdanm 0:9b334a45a8ff 196
bogdanm 0:9b334a45a8ff 197 /* If the erase operation is completed, disable the PER Bit */
bogdanm 0:9b334a45a8ff 198 CLEAR_BIT(FLASH->CR, (FLASH_CR_PER | FLASH_CR_PNB));
bogdanm 0:9b334a45a8ff 199
bogdanm 0:9b334a45a8ff 200 if (status != HAL_OK)
bogdanm 0:9b334a45a8ff 201 {
bogdanm 0:9b334a45a8ff 202 /* In case of error, stop erase procedure and return the faulty address */
bogdanm 0:9b334a45a8ff 203 *PageError = page_index;
bogdanm 0:9b334a45a8ff 204 break;
bogdanm 0:9b334a45a8ff 205 }
bogdanm 0:9b334a45a8ff 206 }
bogdanm 0:9b334a45a8ff 207 }
bogdanm 0:9b334a45a8ff 208
bogdanm 0:9b334a45a8ff 209 /* Flush the caches to be sure of the data consistency */
bogdanm 0:9b334a45a8ff 210 FLASH_FlushCaches();
bogdanm 0:9b334a45a8ff 211 }
bogdanm 0:9b334a45a8ff 212
bogdanm 0:9b334a45a8ff 213 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 214 __HAL_UNLOCK(&pFlash);
bogdanm 0:9b334a45a8ff 215
bogdanm 0:9b334a45a8ff 216 return status;
bogdanm 0:9b334a45a8ff 217 }
bogdanm 0:9b334a45a8ff 218
bogdanm 0:9b334a45a8ff 219 /**
bogdanm 0:9b334a45a8ff 220 * @brief Perform a mass erase or erase the specified FLASH memory pages with interrupt enabled.
bogdanm 0:9b334a45a8ff 221 * @param pEraseInit: pointer to an FLASH_EraseInitTypeDef structure that
bogdanm 0:9b334a45a8ff 222 * contains the configuration information for the erasing.
bogdanm 0:9b334a45a8ff 223 *
bogdanm 0:9b334a45a8ff 224 * @retval HAL Status
bogdanm 0:9b334a45a8ff 225 */
bogdanm 0:9b334a45a8ff 226 HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit)
bogdanm 0:9b334a45a8ff 227 {
bogdanm 0:9b334a45a8ff 228 HAL_StatusTypeDef status = HAL_OK;
bogdanm 0:9b334a45a8ff 229
bogdanm 0:9b334a45a8ff 230 /* Process Locked */
bogdanm 0:9b334a45a8ff 231 __HAL_LOCK(&pFlash);
bogdanm 0:9b334a45a8ff 232
bogdanm 0:9b334a45a8ff 233 /* Check the parameters */
bogdanm 0:9b334a45a8ff 234 assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase));
bogdanm 0:9b334a45a8ff 235
bogdanm 0:9b334a45a8ff 236 pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
bogdanm 0:9b334a45a8ff 237
bogdanm 0:9b334a45a8ff 238 /* Enable End of Operation and Error interrupts */
bogdanm 0:9b334a45a8ff 239 __HAL_FLASH_ENABLE_IT(FLASH_IT_EOP | FLASH_IT_OPERR);
bogdanm 0:9b334a45a8ff 240
bogdanm 0:9b334a45a8ff 241 pFlash.Bank = pEraseInit->Banks;
bogdanm 0:9b334a45a8ff 242
bogdanm 0:9b334a45a8ff 243 if (pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE)
bogdanm 0:9b334a45a8ff 244 {
bogdanm 0:9b334a45a8ff 245 /* Mass erase to be done */
bogdanm 0:9b334a45a8ff 246 pFlash.ProcedureOnGoing = FLASH_PROC_MASS_ERASE;
bogdanm 0:9b334a45a8ff 247 FLASH_MassErase(pEraseInit->Banks);
bogdanm 0:9b334a45a8ff 248 }
bogdanm 0:9b334a45a8ff 249 else
bogdanm 0:9b334a45a8ff 250 {
bogdanm 0:9b334a45a8ff 251 /* Erase by page to be done */
bogdanm 0:9b334a45a8ff 252 pFlash.ProcedureOnGoing = FLASH_PROC_PAGE_ERASE;
bogdanm 0:9b334a45a8ff 253 pFlash.NbPagesToErase = pEraseInit->NbPages;
bogdanm 0:9b334a45a8ff 254 pFlash.Page = pEraseInit->Page;
bogdanm 0:9b334a45a8ff 255
bogdanm 0:9b334a45a8ff 256 /*Erase 1st page and wait for IT */
bogdanm 0:9b334a45a8ff 257 FLASH_PageErase(pEraseInit->Page, pEraseInit->Banks);
bogdanm 0:9b334a45a8ff 258 }
bogdanm 0:9b334a45a8ff 259
bogdanm 0:9b334a45a8ff 260 return status;
bogdanm 0:9b334a45a8ff 261 }
bogdanm 0:9b334a45a8ff 262
bogdanm 0:9b334a45a8ff 263 /**
bogdanm 0:9b334a45a8ff 264 * @brief Program Option bytes.
bogdanm 0:9b334a45a8ff 265 * @param pOBInit: pointer to an FLASH_OBInitStruct structure that
bogdanm 0:9b334a45a8ff 266 * contains the configuration information for the programming.
bogdanm 0:9b334a45a8ff 267 *
bogdanm 0:9b334a45a8ff 268 * @retval HAL Status
bogdanm 0:9b334a45a8ff 269 */
bogdanm 0:9b334a45a8ff 270 HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit)
bogdanm 0:9b334a45a8ff 271 {
bogdanm 0:9b334a45a8ff 272 HAL_StatusTypeDef status = HAL_ERROR;
bogdanm 0:9b334a45a8ff 273
bogdanm 0:9b334a45a8ff 274 /* Process Locked */
bogdanm 0:9b334a45a8ff 275 __HAL_LOCK(&pFlash);
bogdanm 0:9b334a45a8ff 276
bogdanm 0:9b334a45a8ff 277 /* Check the parameters */
bogdanm 0:9b334a45a8ff 278 assert_param(IS_OPTIONBYTE(pOBInit->OptionType));
bogdanm 0:9b334a45a8ff 279
bogdanm 0:9b334a45a8ff 280 pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
bogdanm 0:9b334a45a8ff 281
bogdanm 0:9b334a45a8ff 282 /* Write protection configuration */
bogdanm 0:9b334a45a8ff 283 if((pOBInit->OptionType & OPTIONBYTE_WRP) != RESET)
bogdanm 0:9b334a45a8ff 284 {
bogdanm 0:9b334a45a8ff 285 /* Configure of Write protection on the selected area */
bogdanm 0:9b334a45a8ff 286 status = FLASH_OB_WRPConfig(pOBInit->WRPArea, pOBInit->WRPStartOffset, pOBInit->WRPEndOffset);
bogdanm 0:9b334a45a8ff 287 }
bogdanm 0:9b334a45a8ff 288
bogdanm 0:9b334a45a8ff 289 /* Read protection configuration */
bogdanm 0:9b334a45a8ff 290 if((pOBInit->OptionType & OPTIONBYTE_RDP) != RESET)
bogdanm 0:9b334a45a8ff 291 {
bogdanm 0:9b334a45a8ff 292 /* Configure the Read protection level */
bogdanm 0:9b334a45a8ff 293 status = FLASH_OB_RDPConfig(pOBInit->RDPLevel);
bogdanm 0:9b334a45a8ff 294 }
bogdanm 0:9b334a45a8ff 295
bogdanm 0:9b334a45a8ff 296 /* User Configuration */
bogdanm 0:9b334a45a8ff 297 if((pOBInit->OptionType & OPTIONBYTE_USER) != RESET)
bogdanm 0:9b334a45a8ff 298 {
bogdanm 0:9b334a45a8ff 299 /* Configure the user option bytes */
bogdanm 0:9b334a45a8ff 300 status = FLASH_OB_UserConfig(pOBInit->USERType, pOBInit->USERConfig);
bogdanm 0:9b334a45a8ff 301 }
bogdanm 0:9b334a45a8ff 302
bogdanm 0:9b334a45a8ff 303 /* PCROP Configuration */
bogdanm 0:9b334a45a8ff 304 if((pOBInit->OptionType & OPTIONBYTE_PCROP) != RESET)
bogdanm 0:9b334a45a8ff 305 {
bogdanm 0:9b334a45a8ff 306 /* Configure the Proprietary code readout protection */
bogdanm 0:9b334a45a8ff 307 status = FLASH_OB_PCROPConfig(pOBInit->PCROPConfig, pOBInit->PCROPStartAddr, pOBInit->PCROPEndAddr);
bogdanm 0:9b334a45a8ff 308 }
bogdanm 0:9b334a45a8ff 309
bogdanm 0:9b334a45a8ff 310 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 311 __HAL_UNLOCK(&pFlash);
bogdanm 0:9b334a45a8ff 312
bogdanm 0:9b334a45a8ff 313 return status;
bogdanm 0:9b334a45a8ff 314 }
bogdanm 0:9b334a45a8ff 315
bogdanm 0:9b334a45a8ff 316 /**
bogdanm 0:9b334a45a8ff 317 * @brief Get the Option bytes configuration.
bogdanm 0:9b334a45a8ff 318 * @param pOBInit: pointer to an FLASH_OBInitStruct structure that contains the
bogdanm 0:9b334a45a8ff 319 * configuration information. The fields pOBInit->WRPArea and
bogdanm 0:9b334a45a8ff 320 * pOBInit->PCROPConfig should indicate which area is requested
bogdanm 0:9b334a45a8ff 321 * for the WRP and PCROP
bogdanm 0:9b334a45a8ff 322 *
bogdanm 0:9b334a45a8ff 323 * @retval None
bogdanm 0:9b334a45a8ff 324 */
bogdanm 0:9b334a45a8ff 325 void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit)
bogdanm 0:9b334a45a8ff 326 {
bogdanm 0:9b334a45a8ff 327 pOBInit->OptionType = (OPTIONBYTE_WRP | OPTIONBYTE_RDP | OPTIONBYTE_USER | OPTIONBYTE_PCROP);
bogdanm 0:9b334a45a8ff 328
bogdanm 0:9b334a45a8ff 329 /* Get write protection on the selected area */
bogdanm 0:9b334a45a8ff 330 FLASH_OB_GetWRP(pOBInit->WRPArea, &(pOBInit->WRPStartOffset), &(pOBInit->WRPEndOffset));
bogdanm 0:9b334a45a8ff 331
bogdanm 0:9b334a45a8ff 332 /* Get Read protection level */
bogdanm 0:9b334a45a8ff 333 pOBInit->RDPLevel = FLASH_OB_GetRDP();
bogdanm 0:9b334a45a8ff 334
bogdanm 0:9b334a45a8ff 335 /* Get the user option bytes */
bogdanm 0:9b334a45a8ff 336 pOBInit->USERConfig = FLASH_OB_GetUser();
bogdanm 0:9b334a45a8ff 337
bogdanm 0:9b334a45a8ff 338 /* Get the Proprietary code readout protection */
bogdanm 0:9b334a45a8ff 339 FLASH_OB_GetPCROP(&(pOBInit->PCROPConfig), &(pOBInit->PCROPStartAddr), &(pOBInit->PCROPEndAddr));
bogdanm 0:9b334a45a8ff 340
bogdanm 0:9b334a45a8ff 341 }
bogdanm 0:9b334a45a8ff 342
bogdanm 0:9b334a45a8ff 343 /**
bogdanm 0:9b334a45a8ff 344 * @}
bogdanm 0:9b334a45a8ff 345 */
bogdanm 0:9b334a45a8ff 346
bogdanm 0:9b334a45a8ff 347 /**
bogdanm 0:9b334a45a8ff 348 * @}
bogdanm 0:9b334a45a8ff 349 */
bogdanm 0:9b334a45a8ff 350
bogdanm 0:9b334a45a8ff 351 /* Private functions ---------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 352
bogdanm 0:9b334a45a8ff 353 /** @addtogroup FLASHEx_Private_Functions
bogdanm 0:9b334a45a8ff 354 * @{
bogdanm 0:9b334a45a8ff 355 */
bogdanm 0:9b334a45a8ff 356 /**
bogdanm 0:9b334a45a8ff 357 * @brief Mass erase of FLASH memory.
bogdanm 0:9b334a45a8ff 358 * @param Banks: Banks to be erased
bogdanm 0:9b334a45a8ff 359 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 360 * @arg FLASH_BANK_1: Bank1 to be erased
bogdanm 0:9b334a45a8ff 361 * @arg FLASH_BANK_2: Bank2 to be erased
bogdanm 0:9b334a45a8ff 362 * @arg FLASH_BANK_BOTH: Bank1 and Bank2 to be erased
bogdanm 0:9b334a45a8ff 363 * @retval None
bogdanm 0:9b334a45a8ff 364 */
bogdanm 0:9b334a45a8ff 365 static void FLASH_MassErase(uint32_t Banks)
bogdanm 0:9b334a45a8ff 366 {
bogdanm 0:9b334a45a8ff 367 /* Check the parameters */
bogdanm 0:9b334a45a8ff 368 assert_param(IS_FLASH_BANK(Banks));
bogdanm 0:9b334a45a8ff 369
bogdanm 0:9b334a45a8ff 370 /* Set the Mass Erase Bit for the bank 1 if requested */
bogdanm 0:9b334a45a8ff 371 if((Banks & FLASH_BANK_1) != RESET)
bogdanm 0:9b334a45a8ff 372 {
bogdanm 0:9b334a45a8ff 373 SET_BIT(FLASH->CR, FLASH_CR_MER1);
bogdanm 0:9b334a45a8ff 374 }
bogdanm 0:9b334a45a8ff 375
bogdanm 0:9b334a45a8ff 376 /* Set the Mass Erase Bit for the bank 2 if requested */
bogdanm 0:9b334a45a8ff 377 if((Banks & FLASH_BANK_2) != RESET)
bogdanm 0:9b334a45a8ff 378 {
bogdanm 0:9b334a45a8ff 379 SET_BIT(FLASH->CR, FLASH_CR_MER2);
bogdanm 0:9b334a45a8ff 380 }
bogdanm 0:9b334a45a8ff 381
bogdanm 0:9b334a45a8ff 382 /* Proceed to erase all sectors */
bogdanm 0:9b334a45a8ff 383 SET_BIT(FLASH->CR, FLASH_CR_STRT);
bogdanm 0:9b334a45a8ff 384 }
bogdanm 0:9b334a45a8ff 385
bogdanm 0:9b334a45a8ff 386 /**
bogdanm 0:9b334a45a8ff 387 * @brief Erase the specified FLASH memory page.
bogdanm 0:9b334a45a8ff 388 * @param Page: FLASH page to erase
bogdanm 0:9b334a45a8ff 389 * This parameter must be a value between 0 and (max number of pages in the bank - 1)
bogdanm 0:9b334a45a8ff 390 * @param Banks: Bank(s) where the page will be erased
bogdanm 0:9b334a45a8ff 391 * This parameter can be one or a combination of the following values:
bogdanm 0:9b334a45a8ff 392 * @arg FLASH_BANK_1: Page in bank 1 to be erased
bogdanm 0:9b334a45a8ff 393 * @arg FLASH_BANK_2: Page in bank 2 to be erased
bogdanm 0:9b334a45a8ff 394 * @retval None
bogdanm 0:9b334a45a8ff 395 */
bogdanm 0:9b334a45a8ff 396 void FLASH_PageErase(uint32_t Page, uint32_t Banks)
bogdanm 0:9b334a45a8ff 397 {
bogdanm 0:9b334a45a8ff 398 /* Check the parameters */
bogdanm 0:9b334a45a8ff 399 assert_param(IS_FLASH_PAGE(Page));
bogdanm 0:9b334a45a8ff 400 assert_param(IS_FLASH_BANK_EXCLUSIVE(Banks));
bogdanm 0:9b334a45a8ff 401
bogdanm 0:9b334a45a8ff 402 if((Banks & FLASH_BANK_1) != RESET)
bogdanm 0:9b334a45a8ff 403 {
bogdanm 0:9b334a45a8ff 404 CLEAR_BIT(FLASH->CR, FLASH_CR_BKER);
bogdanm 0:9b334a45a8ff 405 }
bogdanm 0:9b334a45a8ff 406 else
bogdanm 0:9b334a45a8ff 407 {
bogdanm 0:9b334a45a8ff 408 SET_BIT(FLASH->CR, FLASH_CR_BKER);
bogdanm 0:9b334a45a8ff 409 }
bogdanm 0:9b334a45a8ff 410
bogdanm 0:9b334a45a8ff 411 /* Proceed to erase the page */
bogdanm 0:9b334a45a8ff 412 MODIFY_REG(FLASH->CR, FLASH_CR_PNB, (Page << 3));
bogdanm 0:9b334a45a8ff 413 SET_BIT(FLASH->CR, FLASH_CR_PER);
bogdanm 0:9b334a45a8ff 414 SET_BIT(FLASH->CR, FLASH_CR_STRT);
bogdanm 0:9b334a45a8ff 415 }
bogdanm 0:9b334a45a8ff 416
bogdanm 0:9b334a45a8ff 417 /**
bogdanm 0:9b334a45a8ff 418 * @brief Flush the instruction and data caches.
bogdanm 0:9b334a45a8ff 419 * @retval None
bogdanm 0:9b334a45a8ff 420 */
bogdanm 0:9b334a45a8ff 421 void FLASH_FlushCaches(void)
bogdanm 0:9b334a45a8ff 422 {
bogdanm 0:9b334a45a8ff 423 /* Flush instruction cache */
bogdanm 0:9b334a45a8ff 424 if(READ_BIT(FLASH->ACR, FLASH_ACR_ICEN) != RESET)
bogdanm 0:9b334a45a8ff 425 {
bogdanm 0:9b334a45a8ff 426 /* Disable instruction cache */
bogdanm 0:9b334a45a8ff 427 __HAL_FLASH_INSTRUCTION_CACHE_DISABLE();
bogdanm 0:9b334a45a8ff 428 /* Reset instruction cache */
bogdanm 0:9b334a45a8ff 429 __HAL_FLASH_INSTRUCTION_CACHE_RESET();
bogdanm 0:9b334a45a8ff 430 /* Enable instruction cache */
bogdanm 0:9b334a45a8ff 431 __HAL_FLASH_INSTRUCTION_CACHE_ENABLE();
bogdanm 0:9b334a45a8ff 432 }
bogdanm 0:9b334a45a8ff 433
bogdanm 0:9b334a45a8ff 434 /* Flush data cache */
bogdanm 0:9b334a45a8ff 435 if(READ_BIT(FLASH->ACR, FLASH_ACR_DCEN) != RESET)
bogdanm 0:9b334a45a8ff 436 {
bogdanm 0:9b334a45a8ff 437 /* Disable data cache */
bogdanm 0:9b334a45a8ff 438 __HAL_FLASH_DATA_CACHE_DISABLE();
bogdanm 0:9b334a45a8ff 439 /* Reset data cache */
bogdanm 0:9b334a45a8ff 440 __HAL_FLASH_DATA_CACHE_RESET();
bogdanm 0:9b334a45a8ff 441 /* Enable data cache */
bogdanm 0:9b334a45a8ff 442 __HAL_FLASH_DATA_CACHE_ENABLE();
bogdanm 0:9b334a45a8ff 443 }
bogdanm 0:9b334a45a8ff 444 }
bogdanm 0:9b334a45a8ff 445
bogdanm 0:9b334a45a8ff 446 /**
bogdanm 0:9b334a45a8ff 447 * @brief Configure the write protection of the desired pages.
bogdanm 0:9b334a45a8ff 448 *
bogdanm 0:9b334a45a8ff 449 * @note When the memory read protection level is selected (RDP level = 1),
bogdanm 0:9b334a45a8ff 450 * it is not possible to program or erase Flash memory if the CPU debug
bogdanm 0:9b334a45a8ff 451 * features are connected (JTAG or single wire) or boot code is being
bogdanm 0:9b334a45a8ff 452 * executed from RAM or System flash, even if WRP is not activated.
bogdanm 0:9b334a45a8ff 453 * @note To configure the WRP options, the option lock bit OPTLOCK must be
bogdanm 0:9b334a45a8ff 454 * cleared with the call of the HAL_FLASH_OB_Unlock() function.
bogdanm 0:9b334a45a8ff 455 * @note To validate the WRP options, the option bytes must be reloaded
bogdanm 0:9b334a45a8ff 456 * through the call of the HAL_FLASH_OB_Launch() function.
bogdanm 0:9b334a45a8ff 457 *
bogdanm 0:9b334a45a8ff 458 * @param WRPArea: specifies the area to be configured.
bogdanm 0:9b334a45a8ff 459 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 460 * @arg OB_WRPAREA_BANK1_AREAA: Flash Bank 1 Area A
bogdanm 0:9b334a45a8ff 461 * @arg OB_WRPAREA_BANK1_AREAB: Flash Bank 1 Area B
bogdanm 0:9b334a45a8ff 462 * @arg OB_WRPAREA_BANK2_AREAA: Flash Bank 2 Area A
bogdanm 0:9b334a45a8ff 463 * @arg OB_WRPAREA_BANK2_AREAB: Flash Bank 2 Area B
bogdanm 0:9b334a45a8ff 464 *
bogdanm 0:9b334a45a8ff 465 * @param WRPStartOffset: specifies the start page of the write protected area
bogdanm 0:9b334a45a8ff 466 * This parameter can be page number between 0 and (max number of pages in the bank - 1)
bogdanm 0:9b334a45a8ff 467 *
bogdanm 0:9b334a45a8ff 468 * @param WRDPEndOffset: specifies the end page of the write protected area
bogdanm 0:9b334a45a8ff 469 * This parameter can be page number between WRPStartOffset and (max number of pages in the bank - 1)
bogdanm 0:9b334a45a8ff 470 *
bogdanm 0:9b334a45a8ff 471 * @retval HAL Status
bogdanm 0:9b334a45a8ff 472 */
bogdanm 0:9b334a45a8ff 473 static HAL_StatusTypeDef FLASH_OB_WRPConfig(uint32_t WRPArea, uint32_t WRPStartOffset, uint32_t WRDPEndOffset)
bogdanm 0:9b334a45a8ff 474 {
bogdanm 0:9b334a45a8ff 475 HAL_StatusTypeDef status = HAL_OK;
bogdanm 0:9b334a45a8ff 476
bogdanm 0:9b334a45a8ff 477 /* Check the parameters */
bogdanm 0:9b334a45a8ff 478 assert_param(IS_OB_WRPAREA(WRPArea));
bogdanm 0:9b334a45a8ff 479 assert_param(IS_FLASH_PAGE(WRPStartOffset));
bogdanm 0:9b334a45a8ff 480 assert_param(IS_FLASH_PAGE(WRDPEndOffset));
bogdanm 0:9b334a45a8ff 481
bogdanm 0:9b334a45a8ff 482 /* Wait for last operation to be completed */
bogdanm 0:9b334a45a8ff 483 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
bogdanm 0:9b334a45a8ff 484
bogdanm 0:9b334a45a8ff 485 if(status == HAL_OK)
bogdanm 0:9b334a45a8ff 486 {
bogdanm 0:9b334a45a8ff 487 /* Configure the write protected area */
bogdanm 0:9b334a45a8ff 488 if(WRPArea == OB_WRPAREA_BANK1_AREAA)
bogdanm 0:9b334a45a8ff 489 {
bogdanm 0:9b334a45a8ff 490 MODIFY_REG(FLASH->WRP1AR, (FLASH_WRP1AR_WRP1A_STRT | FLASH_WRP1AR_WRP1A_END),
bogdanm 0:9b334a45a8ff 491 (WRPStartOffset | (WRDPEndOffset << 16)));
bogdanm 0:9b334a45a8ff 492 }
bogdanm 0:9b334a45a8ff 493 else if(WRPArea == OB_WRPAREA_BANK1_AREAB)
bogdanm 0:9b334a45a8ff 494 {
bogdanm 0:9b334a45a8ff 495 MODIFY_REG(FLASH->WRP1BR, (FLASH_WRP1BR_WRP1B_STRT | FLASH_WRP1BR_WRP1B_END),
bogdanm 0:9b334a45a8ff 496 (WRPStartOffset | (WRDPEndOffset << 16)));
bogdanm 0:9b334a45a8ff 497 }
bogdanm 0:9b334a45a8ff 498 else if(WRPArea == OB_WRPAREA_BANK2_AREAA)
bogdanm 0:9b334a45a8ff 499 {
bogdanm 0:9b334a45a8ff 500 MODIFY_REG(FLASH->WRP2AR, (FLASH_WRP2AR_WRP2A_STRT | FLASH_WRP2AR_WRP2A_END),
bogdanm 0:9b334a45a8ff 501 (WRPStartOffset | (WRDPEndOffset << 16)));
bogdanm 0:9b334a45a8ff 502 }
bogdanm 0:9b334a45a8ff 503 else if(WRPArea == OB_WRPAREA_BANK2_AREAB)
bogdanm 0:9b334a45a8ff 504 {
bogdanm 0:9b334a45a8ff 505 MODIFY_REG(FLASH->WRP2BR, (FLASH_WRP2BR_WRP2B_STRT | FLASH_WRP2BR_WRP2B_END),
bogdanm 0:9b334a45a8ff 506 (WRPStartOffset | (WRDPEndOffset << 16)));
bogdanm 0:9b334a45a8ff 507 }
bogdanm 0:9b334a45a8ff 508
bogdanm 0:9b334a45a8ff 509 /* Set OPTSTRT Bit */
bogdanm 0:9b334a45a8ff 510 SET_BIT(FLASH->CR, FLASH_CR_OPTSTRT);
bogdanm 0:9b334a45a8ff 511
bogdanm 0:9b334a45a8ff 512 /* Wait for last operation to be completed */
bogdanm 0:9b334a45a8ff 513 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
bogdanm 0:9b334a45a8ff 514
bogdanm 0:9b334a45a8ff 515 /* If the option byte program operation is completed, disable the OPTSTRT Bit */
bogdanm 0:9b334a45a8ff 516 CLEAR_BIT(FLASH->CR, FLASH_CR_OPTSTRT);
bogdanm 0:9b334a45a8ff 517 }
bogdanm 0:9b334a45a8ff 518
bogdanm 0:9b334a45a8ff 519 return status;
bogdanm 0:9b334a45a8ff 520 }
bogdanm 0:9b334a45a8ff 521
bogdanm 0:9b334a45a8ff 522 /**
bogdanm 0:9b334a45a8ff 523 * @brief Set the read protection level.
bogdanm 0:9b334a45a8ff 524 *
bogdanm 0:9b334a45a8ff 525 * @note To configure the RDP level, the option lock bit OPTLOCK must be
bogdanm 0:9b334a45a8ff 526 * cleared with the call of the HAL_FLASH_OB_Unlock() function.
bogdanm 0:9b334a45a8ff 527 * @note To validate the RDP level, the option bytes must be reloaded
bogdanm 0:9b334a45a8ff 528 * through the call of the HAL_FLASH_OB_Launch() function.
bogdanm 0:9b334a45a8ff 529 * @note !!! Warning : When enabling OB_RDP level 2 it's no more possible
bogdanm 0:9b334a45a8ff 530 * to go back to level 1 or 0 !!!
bogdanm 0:9b334a45a8ff 531 *
bogdanm 0:9b334a45a8ff 532 * @param RDPLevel: specifies the read protection level.
bogdanm 0:9b334a45a8ff 533 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 534 * @arg OB_RDP_LEVEL_0: No protection
bogdanm 0:9b334a45a8ff 535 * @arg OB_RDP_LEVEL_1: Read protection of the memory
bogdanm 0:9b334a45a8ff 536 * @arg OB_RDP_LEVEL_2: Full chip protection
bogdanm 0:9b334a45a8ff 537 *
bogdanm 0:9b334a45a8ff 538 * @retval HAL status
bogdanm 0:9b334a45a8ff 539 */
bogdanm 0:9b334a45a8ff 540 static HAL_StatusTypeDef FLASH_OB_RDPConfig(uint32_t RDPLevel)
bogdanm 0:9b334a45a8ff 541 {
bogdanm 0:9b334a45a8ff 542 HAL_StatusTypeDef status = HAL_OK;
bogdanm 0:9b334a45a8ff 543
bogdanm 0:9b334a45a8ff 544 /* Check the parameters */
bogdanm 0:9b334a45a8ff 545 assert_param(IS_OB_RDP_LEVEL(RDPLevel));
bogdanm 0:9b334a45a8ff 546
bogdanm 0:9b334a45a8ff 547 /* Wait for last operation to be completed */
bogdanm 0:9b334a45a8ff 548 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
bogdanm 0:9b334a45a8ff 549
bogdanm 0:9b334a45a8ff 550 if(status == HAL_OK)
bogdanm 0:9b334a45a8ff 551 {
bogdanm 0:9b334a45a8ff 552 /* Configure the RDP level in the option bytes register */
bogdanm 0:9b334a45a8ff 553 MODIFY_REG(FLASH->OPTR, FLASH_OPTR_RDP, RDPLevel);
bogdanm 0:9b334a45a8ff 554
bogdanm 0:9b334a45a8ff 555 /* Set OPTSTRT Bit */
bogdanm 0:9b334a45a8ff 556 SET_BIT(FLASH->CR, FLASH_CR_OPTSTRT);
bogdanm 0:9b334a45a8ff 557
bogdanm 0:9b334a45a8ff 558 /* Wait for last operation to be completed */
bogdanm 0:9b334a45a8ff 559 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
bogdanm 0:9b334a45a8ff 560
bogdanm 0:9b334a45a8ff 561 /* If the option byte program operation is completed, disable the OPTSTRT Bit */
bogdanm 0:9b334a45a8ff 562 CLEAR_BIT(FLASH->CR, FLASH_CR_OPTSTRT);
bogdanm 0:9b334a45a8ff 563 }
bogdanm 0:9b334a45a8ff 564
bogdanm 0:9b334a45a8ff 565 return status;
bogdanm 0:9b334a45a8ff 566 }
bogdanm 0:9b334a45a8ff 567
bogdanm 0:9b334a45a8ff 568 /**
bogdanm 0:9b334a45a8ff 569 * @brief Program the FLASH User Option Byte.
bogdanm 0:9b334a45a8ff 570 *
bogdanm 0:9b334a45a8ff 571 * @note To configure the user option bytes, the option lock bit OPTLOCK must
bogdanm 0:9b334a45a8ff 572 * be cleared with the call of the HAL_FLASH_OB_Unlock() function.
bogdanm 0:9b334a45a8ff 573 * @note To validate the user option bytes, the option bytes must be reloaded
bogdanm 0:9b334a45a8ff 574 * through the call of the HAL_FLASH_OB_Launch() function.
bogdanm 0:9b334a45a8ff 575 *
bogdanm 0:9b334a45a8ff 576 * @param UserType: The FLASH User Option Bytes to be modified
bogdanm 0:9b334a45a8ff 577 * @param UserConfig: The FLASH User Option Bytes values:
bogdanm 0:9b334a45a8ff 578 * BOR_LEV(Bit8-10), nRST_STOP(Bit12), nRST_STDBY(Bit13), IWDG_SW(Bit16),
bogdanm 0:9b334a45a8ff 579 * IWDG_STOP(Bit17), IWDG_STDBY(Bit18), WWDG_SW(Bit19), BFB2(Bit20),
bogdanm 0:9b334a45a8ff 580 * DUALBANK(Bit21), nBOOT1(Bit23), SRAM2_PE(Bit24) and SRAM2_RST(Bit25).
bogdanm 0:9b334a45a8ff 581 *
bogdanm 0:9b334a45a8ff 582 * @retval HAL status
bogdanm 0:9b334a45a8ff 583 */
bogdanm 0:9b334a45a8ff 584 static HAL_StatusTypeDef FLASH_OB_UserConfig(uint32_t UserType, uint32_t UserConfig)
bogdanm 0:9b334a45a8ff 585 {
bogdanm 0:9b334a45a8ff 586 uint32_t optr_reg_val = 0;
bogdanm 0:9b334a45a8ff 587 uint32_t optr_reg_mask = 0;
bogdanm 0:9b334a45a8ff 588 HAL_StatusTypeDef status = HAL_OK;
bogdanm 0:9b334a45a8ff 589
bogdanm 0:9b334a45a8ff 590 /* Check the parameters */
bogdanm 0:9b334a45a8ff 591 assert_param(IS_OB_USER_TYPE(UserType));
bogdanm 0:9b334a45a8ff 592
bogdanm 0:9b334a45a8ff 593 /* Wait for last operation to be completed */
bogdanm 0:9b334a45a8ff 594 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
bogdanm 0:9b334a45a8ff 595
bogdanm 0:9b334a45a8ff 596 if(status == HAL_OK)
bogdanm 0:9b334a45a8ff 597 {
bogdanm 0:9b334a45a8ff 598 if((UserType & OB_USER_BOR_LEV) != RESET)
bogdanm 0:9b334a45a8ff 599 {
bogdanm 0:9b334a45a8ff 600 /* BOR level option byte should be modified */
bogdanm 0:9b334a45a8ff 601 assert_param(IS_OB_USER_BOR_LEVEL(UserConfig & FLASH_OPTR_BOR_LEV));
bogdanm 0:9b334a45a8ff 602
bogdanm 0:9b334a45a8ff 603 /* Set value and mask for BOR level option byte */
bogdanm 0:9b334a45a8ff 604 optr_reg_val |= (UserConfig & FLASH_OPTR_BOR_LEV);
bogdanm 0:9b334a45a8ff 605 optr_reg_mask |= FLASH_OPTR_BOR_LEV;
bogdanm 0:9b334a45a8ff 606 }
bogdanm 0:9b334a45a8ff 607
bogdanm 0:9b334a45a8ff 608 if((UserType & OB_USER_nRST_STOP) != RESET)
bogdanm 0:9b334a45a8ff 609 {
bogdanm 0:9b334a45a8ff 610 /* nRST_STOP option byte should be modified */
bogdanm 0:9b334a45a8ff 611 assert_param(IS_OB_USER_STOP(UserConfig & FLASH_OPTR_nRST_STOP));
bogdanm 0:9b334a45a8ff 612
bogdanm 0:9b334a45a8ff 613 /* Set value and mask for nRST_STOP option byte */
bogdanm 0:9b334a45a8ff 614 optr_reg_val |= (UserConfig & FLASH_OPTR_nRST_STOP);
bogdanm 0:9b334a45a8ff 615 optr_reg_mask |= FLASH_OPTR_nRST_STOP;
bogdanm 0:9b334a45a8ff 616 }
bogdanm 0:9b334a45a8ff 617
bogdanm 0:9b334a45a8ff 618 if((UserType & OB_USER_nRST_STDBY) != RESET)
bogdanm 0:9b334a45a8ff 619 {
bogdanm 0:9b334a45a8ff 620 /* nRST_STDBY option byte should be modified */
bogdanm 0:9b334a45a8ff 621 assert_param(IS_OB_USER_STANDBY(UserConfig & FLASH_OPTR_nRST_STDBY));
bogdanm 0:9b334a45a8ff 622
bogdanm 0:9b334a45a8ff 623 /* Set value and mask for nRST_STDBY option byte */
bogdanm 0:9b334a45a8ff 624 optr_reg_val |= (UserConfig & FLASH_OPTR_nRST_STDBY);
bogdanm 0:9b334a45a8ff 625 optr_reg_mask |= FLASH_OPTR_nRST_STDBY;
bogdanm 0:9b334a45a8ff 626 }
bogdanm 0:9b334a45a8ff 627
bogdanm 0:9b334a45a8ff 628 if((UserType & OB_USER_IWDG_SW) != RESET)
bogdanm 0:9b334a45a8ff 629 {
bogdanm 0:9b334a45a8ff 630 /* IWDG_SW option byte should be modified */
bogdanm 0:9b334a45a8ff 631 assert_param(IS_OB_USER_IWDG(UserConfig & FLASH_OPTR_IWDG_SW));
bogdanm 0:9b334a45a8ff 632
bogdanm 0:9b334a45a8ff 633 /* Set value and mask for IWDG_SW option byte */
bogdanm 0:9b334a45a8ff 634 optr_reg_val |= (UserConfig & FLASH_OPTR_IWDG_SW);
bogdanm 0:9b334a45a8ff 635 optr_reg_mask |= FLASH_OPTR_IWDG_SW;
bogdanm 0:9b334a45a8ff 636 }
bogdanm 0:9b334a45a8ff 637
bogdanm 0:9b334a45a8ff 638 if((UserType & OB_USER_IWDG_STOP) != RESET)
bogdanm 0:9b334a45a8ff 639 {
bogdanm 0:9b334a45a8ff 640 /* IWDG_STOP option byte should be modified */
bogdanm 0:9b334a45a8ff 641 assert_param(IS_OB_USER_IWDG_STOP(UserConfig & FLASH_OPTR_IWDG_STOP));
bogdanm 0:9b334a45a8ff 642
bogdanm 0:9b334a45a8ff 643 /* Set value and mask for IWDG_STOP option byte */
bogdanm 0:9b334a45a8ff 644 optr_reg_val |= (UserConfig & FLASH_OPTR_IWDG_STOP);
bogdanm 0:9b334a45a8ff 645 optr_reg_mask |= FLASH_OPTR_IWDG_STOP;
bogdanm 0:9b334a45a8ff 646 }
bogdanm 0:9b334a45a8ff 647
bogdanm 0:9b334a45a8ff 648 if((UserType & OB_USER_IWDG_STDBY) != RESET)
bogdanm 0:9b334a45a8ff 649 {
bogdanm 0:9b334a45a8ff 650 /* IWDG_STDBY option byte should be modified */
bogdanm 0:9b334a45a8ff 651 assert_param(IS_OB_USER_IWDG_STDBY(UserConfig & FLASH_OPTR_IWDG_STDBY));
bogdanm 0:9b334a45a8ff 652
bogdanm 0:9b334a45a8ff 653 /* Set value and mask for IWDG_STDBY option byte */
bogdanm 0:9b334a45a8ff 654 optr_reg_val |= (UserConfig & FLASH_OPTR_IWDG_STDBY);
bogdanm 0:9b334a45a8ff 655 optr_reg_mask |= FLASH_OPTR_IWDG_STDBY;
bogdanm 0:9b334a45a8ff 656 }
bogdanm 0:9b334a45a8ff 657
bogdanm 0:9b334a45a8ff 658 if((UserType & OB_USER_WWDG_SW) != RESET)
bogdanm 0:9b334a45a8ff 659 {
bogdanm 0:9b334a45a8ff 660 /* WWDG_SW option byte should be modified */
bogdanm 0:9b334a45a8ff 661 assert_param(IS_OB_USER_WWDG(UserConfig & FLASH_OPTR_WWDG_SW));
bogdanm 0:9b334a45a8ff 662
bogdanm 0:9b334a45a8ff 663 /* Set value and mask for WWDG_SW option byte */
bogdanm 0:9b334a45a8ff 664 optr_reg_val |= (UserConfig & FLASH_OPTR_WWDG_SW);
bogdanm 0:9b334a45a8ff 665 optr_reg_mask |= FLASH_OPTR_WWDG_SW;
bogdanm 0:9b334a45a8ff 666 }
bogdanm 0:9b334a45a8ff 667
bogdanm 0:9b334a45a8ff 668 if((UserType & OB_USER_BFB2) != RESET)
bogdanm 0:9b334a45a8ff 669 {
bogdanm 0:9b334a45a8ff 670 /* BFB2 option byte should be modified */
bogdanm 0:9b334a45a8ff 671 assert_param(IS_OB_USER_BFB2(UserConfig & FLASH_OPTR_BFB2));
bogdanm 0:9b334a45a8ff 672
bogdanm 0:9b334a45a8ff 673 /* Set value and mask for BFB2 option byte */
bogdanm 0:9b334a45a8ff 674 optr_reg_val |= (UserConfig & FLASH_OPTR_BFB2);
bogdanm 0:9b334a45a8ff 675 optr_reg_mask |= FLASH_OPTR_BFB2;
bogdanm 0:9b334a45a8ff 676 }
bogdanm 0:9b334a45a8ff 677
bogdanm 0:9b334a45a8ff 678 if((UserType & OB_USER_DUALBANK) != RESET)
bogdanm 0:9b334a45a8ff 679 {
bogdanm 0:9b334a45a8ff 680 /* DUALBANK option byte should be modified */
bogdanm 0:9b334a45a8ff 681 assert_param(IS_OB_USER_DUALBANK(UserConfig & FLASH_OPTR_DUALBANK));
bogdanm 0:9b334a45a8ff 682
bogdanm 0:9b334a45a8ff 683 /* Set value and mask for DUALBANK option byte */
bogdanm 0:9b334a45a8ff 684 optr_reg_val |= (UserConfig & FLASH_OPTR_DUALBANK);
bogdanm 0:9b334a45a8ff 685 optr_reg_mask |= FLASH_OPTR_DUALBANK;
bogdanm 0:9b334a45a8ff 686 }
bogdanm 0:9b334a45a8ff 687
bogdanm 0:9b334a45a8ff 688 if((UserType & OB_USER_nBOOT1) != RESET)
bogdanm 0:9b334a45a8ff 689 {
bogdanm 0:9b334a45a8ff 690 /* nBOOT1 option byte should be modified */
bogdanm 0:9b334a45a8ff 691 assert_param(IS_OB_USER_BOOT1(UserConfig & FLASH_OPTR_nBOOT1));
bogdanm 0:9b334a45a8ff 692
bogdanm 0:9b334a45a8ff 693 /* Set value and mask for nBOOT1 option byte */
bogdanm 0:9b334a45a8ff 694 optr_reg_val |= (UserConfig & FLASH_OPTR_nBOOT1);
bogdanm 0:9b334a45a8ff 695 optr_reg_mask |= FLASH_OPTR_nBOOT1;
bogdanm 0:9b334a45a8ff 696 }
bogdanm 0:9b334a45a8ff 697
bogdanm 0:9b334a45a8ff 698 if((UserType & OB_USER_SRAM2_PE) != RESET)
bogdanm 0:9b334a45a8ff 699 {
bogdanm 0:9b334a45a8ff 700 /* SRAM2_PE option byte should be modified */
bogdanm 0:9b334a45a8ff 701 assert_param(IS_OB_USER_SRAM2_PARITY(UserConfig & FLASH_OPTR_SRAM2_PE));
bogdanm 0:9b334a45a8ff 702
bogdanm 0:9b334a45a8ff 703 /* Set value and mask for SRAM2_PE option byte */
bogdanm 0:9b334a45a8ff 704 optr_reg_val |= (UserConfig & FLASH_OPTR_SRAM2_PE);
bogdanm 0:9b334a45a8ff 705 optr_reg_mask |= FLASH_OPTR_SRAM2_PE;
bogdanm 0:9b334a45a8ff 706 }
bogdanm 0:9b334a45a8ff 707
bogdanm 0:9b334a45a8ff 708 if((UserType & OB_USER_SRAM2_RST) != RESET)
bogdanm 0:9b334a45a8ff 709 {
bogdanm 0:9b334a45a8ff 710 /* SRAM2_RST option byte should be modified */
bogdanm 0:9b334a45a8ff 711 assert_param(IS_OB_USER_SRAM2_RST(UserConfig & FLASH_OPTR_SRAM2_RST));
bogdanm 0:9b334a45a8ff 712
bogdanm 0:9b334a45a8ff 713 /* Set value and mask for SRAM2_RST option byte */
bogdanm 0:9b334a45a8ff 714 optr_reg_val |= (UserConfig & FLASH_OPTR_SRAM2_RST);
bogdanm 0:9b334a45a8ff 715 optr_reg_mask |= FLASH_OPTR_SRAM2_RST;
bogdanm 0:9b334a45a8ff 716 }
bogdanm 0:9b334a45a8ff 717
bogdanm 0:9b334a45a8ff 718 /* Configure the option bytes register */
bogdanm 0:9b334a45a8ff 719 MODIFY_REG(FLASH->OPTR, optr_reg_mask, optr_reg_val);
bogdanm 0:9b334a45a8ff 720
bogdanm 0:9b334a45a8ff 721 /* Set OPTSTRT Bit */
bogdanm 0:9b334a45a8ff 722 SET_BIT(FLASH->CR, FLASH_CR_OPTSTRT);
bogdanm 0:9b334a45a8ff 723
bogdanm 0:9b334a45a8ff 724 /* Wait for last operation to be completed */
bogdanm 0:9b334a45a8ff 725 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
bogdanm 0:9b334a45a8ff 726
bogdanm 0:9b334a45a8ff 727 /* If the option byte program operation is completed, disable the OPTSTRT Bit */
bogdanm 0:9b334a45a8ff 728 CLEAR_BIT(FLASH->CR, FLASH_CR_OPTSTRT);
bogdanm 0:9b334a45a8ff 729 }
bogdanm 0:9b334a45a8ff 730
bogdanm 0:9b334a45a8ff 731 return status;
bogdanm 0:9b334a45a8ff 732 }
bogdanm 0:9b334a45a8ff 733
bogdanm 0:9b334a45a8ff 734 /**
bogdanm 0:9b334a45a8ff 735 * @brief Configure the Proprietary code readout protection of the desired addresses.
bogdanm 0:9b334a45a8ff 736 *
bogdanm 0:9b334a45a8ff 737 * @note To configure the PCROP options, the option lock bit OPTLOCK must be
bogdanm 0:9b334a45a8ff 738 * cleared with the call of the HAL_FLASH_OB_Unlock() function.
bogdanm 0:9b334a45a8ff 739 * @note To validate the PCROP options, the option bytes must be reloaded
bogdanm 0:9b334a45a8ff 740 * through the call of the HAL_FLASH_OB_Launch() function.
bogdanm 0:9b334a45a8ff 741 *
bogdanm 0:9b334a45a8ff 742 * @param PCROPConfig: specifies the configuration (Bank to be configured and PCROP_RDP option).
bogdanm 0:9b334a45a8ff 743 * This parameter must be a combination of FLASH_BANK_1 or FLASH_BANK_2
bogdanm 0:9b334a45a8ff 744 * with OB_PCROP_RDP_NOT_ERASE or OB_PCROP_RDP_ERASE
bogdanm 0:9b334a45a8ff 745 *
bogdanm 0:9b334a45a8ff 746 * @param PCROPStartAddr: specifies the start address of the Proprietary code readout protection
bogdanm 0:9b334a45a8ff 747 * This parameter can be an address between begin and end of the bank
bogdanm 0:9b334a45a8ff 748 *
bogdanm 0:9b334a45a8ff 749 * @param PCROPEndAddr: specifies the end address of the Proprietary code readout protection
bogdanm 0:9b334a45a8ff 750 * This parameter can be an address between PCROPStartAddr and end of the bank
bogdanm 0:9b334a45a8ff 751 *
bogdanm 0:9b334a45a8ff 752 * @retval HAL Status
bogdanm 0:9b334a45a8ff 753 */
bogdanm 0:9b334a45a8ff 754 static HAL_StatusTypeDef FLASH_OB_PCROPConfig(uint32_t PCROPConfig, uint32_t PCROPStartAddr, uint32_t PCROPEndAddr)
bogdanm 0:9b334a45a8ff 755 {
bogdanm 0:9b334a45a8ff 756 HAL_StatusTypeDef status = HAL_OK;
bogdanm 0:9b334a45a8ff 757 uint32_t reg_value = 0;
bogdanm 0:9b334a45a8ff 758 uint32_t bank1_addr, bank2_addr;
bogdanm 0:9b334a45a8ff 759
bogdanm 0:9b334a45a8ff 760 /* Check the parameters */
bogdanm 0:9b334a45a8ff 761 assert_param(IS_FLASH_BANK_EXCLUSIVE(PCROPConfig & FLASH_BANK_BOTH));
bogdanm 0:9b334a45a8ff 762 assert_param(IS_OB_PCROP_RDP(PCROPConfig & FLASH_PCROP1ER_PCROP_RDP));
bogdanm 0:9b334a45a8ff 763 assert_param(IS_FLASH_MAIN_MEM_ADDRESS(PCROPStartAddr));
bogdanm 0:9b334a45a8ff 764 assert_param(IS_FLASH_MAIN_MEM_ADDRESS(PCROPEndAddr));
bogdanm 0:9b334a45a8ff 765
bogdanm 0:9b334a45a8ff 766 /* Wait for last operation to be completed */
bogdanm 0:9b334a45a8ff 767 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
bogdanm 0:9b334a45a8ff 768
bogdanm 0:9b334a45a8ff 769 if(status == HAL_OK)
bogdanm 0:9b334a45a8ff 770 {
bogdanm 0:9b334a45a8ff 771 /* Get the information about the bank swapping */
bogdanm 0:9b334a45a8ff 772 if (READ_BIT(SYSCFG->MEMRMP, SYSCFG_MEMRMP_FB_MODE) == 0)
bogdanm 0:9b334a45a8ff 773 {
bogdanm 0:9b334a45a8ff 774 bank1_addr = FLASH_BASE;
bogdanm 0:9b334a45a8ff 775 bank2_addr = FLASH_BASE + FLASH_BANK_SIZE;
bogdanm 0:9b334a45a8ff 776 }
bogdanm 0:9b334a45a8ff 777 else
bogdanm 0:9b334a45a8ff 778 {
bogdanm 0:9b334a45a8ff 779 bank1_addr = FLASH_BASE + FLASH_BANK_SIZE;
bogdanm 0:9b334a45a8ff 780 bank2_addr = FLASH_BASE;
bogdanm 0:9b334a45a8ff 781 }
bogdanm 0:9b334a45a8ff 782
bogdanm 0:9b334a45a8ff 783 /* Configure the Proprietary code readout protection */
bogdanm 0:9b334a45a8ff 784 if((PCROPConfig & FLASH_BANK_BOTH) == FLASH_BANK_1)
bogdanm 0:9b334a45a8ff 785 {
bogdanm 0:9b334a45a8ff 786 reg_value = ((PCROPStartAddr - bank1_addr) >> 3);
bogdanm 0:9b334a45a8ff 787 MODIFY_REG(FLASH->PCROP1SR, FLASH_PCROP1SR_PCROP1_STRT, reg_value);
bogdanm 0:9b334a45a8ff 788
bogdanm 0:9b334a45a8ff 789 reg_value = ((PCROPEndAddr - bank1_addr) >> 3);
bogdanm 0:9b334a45a8ff 790 MODIFY_REG(FLASH->PCROP1ER, FLASH_PCROP1ER_PCROP1_END, reg_value);
bogdanm 0:9b334a45a8ff 791 }
bogdanm 0:9b334a45a8ff 792 else if((PCROPConfig & FLASH_BANK_BOTH) == FLASH_BANK_2)
bogdanm 0:9b334a45a8ff 793 {
bogdanm 0:9b334a45a8ff 794 reg_value = ((PCROPStartAddr - bank2_addr) >> 3);
bogdanm 0:9b334a45a8ff 795 MODIFY_REG(FLASH->PCROP2SR, FLASH_PCROP2SR_PCROP2_STRT, reg_value);
bogdanm 0:9b334a45a8ff 796
bogdanm 0:9b334a45a8ff 797 reg_value = ((PCROPEndAddr - bank2_addr) >> 3);
bogdanm 0:9b334a45a8ff 798 MODIFY_REG(FLASH->PCROP2ER, FLASH_PCROP2ER_PCROP2_END, reg_value);
bogdanm 0:9b334a45a8ff 799 }
bogdanm 0:9b334a45a8ff 800
bogdanm 0:9b334a45a8ff 801 MODIFY_REG(FLASH->PCROP1ER, FLASH_PCROP1ER_PCROP_RDP, (PCROPConfig & FLASH_PCROP1ER_PCROP_RDP));
bogdanm 0:9b334a45a8ff 802
bogdanm 0:9b334a45a8ff 803 /* Set OPTSTRT Bit */
bogdanm 0:9b334a45a8ff 804 SET_BIT(FLASH->CR, FLASH_CR_OPTSTRT);
bogdanm 0:9b334a45a8ff 805
bogdanm 0:9b334a45a8ff 806 /* Wait for last operation to be completed */
bogdanm 0:9b334a45a8ff 807 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
bogdanm 0:9b334a45a8ff 808
bogdanm 0:9b334a45a8ff 809 /* If the option byte program operation is completed, disable the OPTSTRT Bit */
bogdanm 0:9b334a45a8ff 810 CLEAR_BIT(FLASH->CR, FLASH_CR_OPTSTRT);
bogdanm 0:9b334a45a8ff 811 }
bogdanm 0:9b334a45a8ff 812
bogdanm 0:9b334a45a8ff 813 return status;
bogdanm 0:9b334a45a8ff 814 }
bogdanm 0:9b334a45a8ff 815
bogdanm 0:9b334a45a8ff 816 /**
bogdanm 0:9b334a45a8ff 817 * @brief Return the FLASH Write Protection Option Bytes value.
bogdanm 0:9b334a45a8ff 818 *
bogdanm 0:9b334a45a8ff 819 * @param[in] WRPArea: specifies the area to be returned.
bogdanm 0:9b334a45a8ff 820 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 821 * @arg OB_WRPAREA_BANK1_AREAA: Flash Bank 1 Area A
bogdanm 0:9b334a45a8ff 822 * @arg OB_WRPAREA_BANK1_AREAB: Flash Bank 1 Area B
bogdanm 0:9b334a45a8ff 823 * @arg OB_WRPAREA_BANK2_AREAA: Flash Bank 2 Area A
bogdanm 0:9b334a45a8ff 824 * @arg OB_WRPAREA_BANK2_AREAB: Flash Bank 2 Area B
bogdanm 0:9b334a45a8ff 825 *
bogdanm 0:9b334a45a8ff 826 * @param[out] WRPStartOffset: specifies the address where to copied the start page
bogdanm 0:9b334a45a8ff 827 * of the write protected area
bogdanm 0:9b334a45a8ff 828 *
bogdanm 0:9b334a45a8ff 829 * @param[out] WRDPEndOffset: specifies the address where to copied the end page of
bogdanm 0:9b334a45a8ff 830 * the write protected area
bogdanm 0:9b334a45a8ff 831 *
bogdanm 0:9b334a45a8ff 832 * @retval None
bogdanm 0:9b334a45a8ff 833 */
bogdanm 0:9b334a45a8ff 834 static void FLASH_OB_GetWRP(uint32_t WRPArea, uint32_t * WRPStartOffset, uint32_t * WRDPEndOffset)
bogdanm 0:9b334a45a8ff 835 {
bogdanm 0:9b334a45a8ff 836 /* Check the parameters */
bogdanm 0:9b334a45a8ff 837 assert_param(IS_OB_WRPAREA(WRPArea));
bogdanm 0:9b334a45a8ff 838
bogdanm 0:9b334a45a8ff 839 /* Get the configuration of the write protected area */
bogdanm 0:9b334a45a8ff 840 if(WRPArea == OB_WRPAREA_BANK1_AREAA)
bogdanm 0:9b334a45a8ff 841 {
bogdanm 0:9b334a45a8ff 842 *WRPStartOffset = READ_BIT(FLASH->WRP1AR, FLASH_WRP1AR_WRP1A_STRT);
bogdanm 0:9b334a45a8ff 843 *WRDPEndOffset = (READ_BIT(FLASH->WRP1AR, FLASH_WRP1AR_WRP1A_END) >> 16);
bogdanm 0:9b334a45a8ff 844 }
bogdanm 0:9b334a45a8ff 845 else if(WRPArea == OB_WRPAREA_BANK1_AREAB)
bogdanm 0:9b334a45a8ff 846 {
bogdanm 0:9b334a45a8ff 847 *WRPStartOffset = READ_BIT(FLASH->WRP1BR, FLASH_WRP1BR_WRP1B_STRT);
bogdanm 0:9b334a45a8ff 848 *WRDPEndOffset = (READ_BIT(FLASH->WRP1BR, FLASH_WRP1BR_WRP1B_END) >> 16);
bogdanm 0:9b334a45a8ff 849 }
bogdanm 0:9b334a45a8ff 850 else if(WRPArea == OB_WRPAREA_BANK2_AREAA)
bogdanm 0:9b334a45a8ff 851 {
bogdanm 0:9b334a45a8ff 852 *WRPStartOffset = READ_BIT(FLASH->WRP2AR, FLASH_WRP2AR_WRP2A_STRT);
bogdanm 0:9b334a45a8ff 853 *WRDPEndOffset = (READ_BIT(FLASH->WRP2AR, FLASH_WRP2AR_WRP2A_END) >> 16);
bogdanm 0:9b334a45a8ff 854 }
bogdanm 0:9b334a45a8ff 855 else if(WRPArea == OB_WRPAREA_BANK2_AREAB)
bogdanm 0:9b334a45a8ff 856 {
bogdanm 0:9b334a45a8ff 857 *WRPStartOffset = READ_BIT(FLASH->WRP2BR, FLASH_WRP2BR_WRP2B_STRT);
bogdanm 0:9b334a45a8ff 858 *WRDPEndOffset = (READ_BIT(FLASH->WRP2BR, FLASH_WRP2BR_WRP2B_END) >> 16);
bogdanm 0:9b334a45a8ff 859 }
bogdanm 0:9b334a45a8ff 860 }
bogdanm 0:9b334a45a8ff 861
bogdanm 0:9b334a45a8ff 862 /**
bogdanm 0:9b334a45a8ff 863 * @brief Return the FLASH Read Protection level.
bogdanm 0:9b334a45a8ff 864 * @retval FLASH ReadOut Protection Status:
bogdanm 0:9b334a45a8ff 865 * This return value can be one of the following values:
bogdanm 0:9b334a45a8ff 866 * @arg OB_RDP_LEVEL_0: No protection
bogdanm 0:9b334a45a8ff 867 * @arg OB_RDP_LEVEL_1: Read protection of the memory
bogdanm 0:9b334a45a8ff 868 * @arg OB_RDP_LEVEL_2: Full chip protection
bogdanm 0:9b334a45a8ff 869 */
bogdanm 0:9b334a45a8ff 870 static uint32_t FLASH_OB_GetRDP(void)
bogdanm 0:9b334a45a8ff 871 {
bogdanm 0:9b334a45a8ff 872 if ((READ_BIT(FLASH->OPTR, FLASH_OPTR_RDP) != OB_RDP_LEVEL_0) &&
bogdanm 0:9b334a45a8ff 873 (READ_BIT(FLASH->OPTR, FLASH_OPTR_RDP) != OB_RDP_LEVEL_2))
bogdanm 0:9b334a45a8ff 874 {
bogdanm 0:9b334a45a8ff 875 return (OB_RDP_LEVEL_1);
bogdanm 0:9b334a45a8ff 876 }
bogdanm 0:9b334a45a8ff 877 else
bogdanm 0:9b334a45a8ff 878 {
bogdanm 0:9b334a45a8ff 879 return (READ_BIT(FLASH->OPTR, FLASH_OPTR_RDP));
bogdanm 0:9b334a45a8ff 880 }
bogdanm 0:9b334a45a8ff 881 }
bogdanm 0:9b334a45a8ff 882
bogdanm 0:9b334a45a8ff 883 /**
bogdanm 0:9b334a45a8ff 884 * @brief Return the FLASH User Option Byte value.
bogdanm 0:9b334a45a8ff 885 * @retval The FLASH User Option Bytes values:
bogdanm 0:9b334a45a8ff 886 * BOR_LEV(Bit8-10), nRST_STOP(Bit12), nRST_STDBY(Bit13), IWDG_SW(Bit16),
bogdanm 0:9b334a45a8ff 887 * IWDG_STOP(Bit17), IWDG_STDBY(Bit18), WWDG_SW(Bit19), BFB2(Bit20),
bogdanm 0:9b334a45a8ff 888 * DUALBANK(Bit21), nBOOT1(Bit23), SRAM2_PE(Bit24) and SRAM2_RST(Bit25).
bogdanm 0:9b334a45a8ff 889 */
bogdanm 0:9b334a45a8ff 890 static uint32_t FLASH_OB_GetUser(void)
bogdanm 0:9b334a45a8ff 891 {
bogdanm 0:9b334a45a8ff 892 uint32_t user_config = READ_REG(FLASH->OPTR);
bogdanm 0:9b334a45a8ff 893 CLEAR_BIT(user_config, FLASH_OPTR_RDP);
bogdanm 0:9b334a45a8ff 894
bogdanm 0:9b334a45a8ff 895 return user_config;
bogdanm 0:9b334a45a8ff 896 }
bogdanm 0:9b334a45a8ff 897
bogdanm 0:9b334a45a8ff 898 /**
bogdanm 0:9b334a45a8ff 899 * @brief Return the FLASH Write Protection Option Bytes value.
bogdanm 0:9b334a45a8ff 900 *
bogdanm 0:9b334a45a8ff 901 * @param PCROPConfig [inout]: specifies the configuration (Bank to be configured and PCROP_RDP option).
bogdanm 0:9b334a45a8ff 902 * This parameter must be a combination of FLASH_BANK_1 or FLASH_BANK_2
bogdanm 0:9b334a45a8ff 903 * with OB_PCROP_RDP_NOT_ERASE or OB_PCROP_RDP_ERASE
bogdanm 0:9b334a45a8ff 904 *
bogdanm 0:9b334a45a8ff 905 * @param PCROPStartAddr [out]: specifies the address where to copied the start address
bogdanm 0:9b334a45a8ff 906 * of the Proprietary code readout protection
bogdanm 0:9b334a45a8ff 907 *
bogdanm 0:9b334a45a8ff 908 * @param PCROPEndAddr [out]: specifies the address where to copied the end address of
bogdanm 0:9b334a45a8ff 909 * the Proprietary code readout protection
bogdanm 0:9b334a45a8ff 910 *
bogdanm 0:9b334a45a8ff 911 * @retval None
bogdanm 0:9b334a45a8ff 912 */
bogdanm 0:9b334a45a8ff 913 static void FLASH_OB_GetPCROP(uint32_t * PCROPConfig, uint32_t * PCROPStartAddr, uint32_t * PCROPEndAddr)
bogdanm 0:9b334a45a8ff 914 {
bogdanm 0:9b334a45a8ff 915 uint32_t reg_value = 0;
bogdanm 0:9b334a45a8ff 916 uint32_t bank1_addr, bank2_addr;
bogdanm 0:9b334a45a8ff 917
bogdanm 0:9b334a45a8ff 918 /* Check the parameters */
bogdanm 0:9b334a45a8ff 919 assert_param(IS_FLASH_BANK_EXCLUSIVE((*PCROPConfig) & FLASH_BANK_BOTH));
bogdanm 0:9b334a45a8ff 920
bogdanm 0:9b334a45a8ff 921 /* Get the information about the bank swapping */
bogdanm 0:9b334a45a8ff 922 if (READ_BIT(SYSCFG->MEMRMP, SYSCFG_MEMRMP_FB_MODE) == 0)
bogdanm 0:9b334a45a8ff 923 {
bogdanm 0:9b334a45a8ff 924 bank1_addr = FLASH_BASE;
bogdanm 0:9b334a45a8ff 925 bank2_addr = FLASH_BASE + FLASH_BANK_SIZE;
bogdanm 0:9b334a45a8ff 926 }
bogdanm 0:9b334a45a8ff 927 else
bogdanm 0:9b334a45a8ff 928 {
bogdanm 0:9b334a45a8ff 929 bank1_addr = FLASH_BASE + FLASH_BANK_SIZE;
bogdanm 0:9b334a45a8ff 930 bank2_addr = FLASH_BASE;
bogdanm 0:9b334a45a8ff 931 }
bogdanm 0:9b334a45a8ff 932
bogdanm 0:9b334a45a8ff 933 if(((*PCROPConfig) & FLASH_BANK_BOTH) == FLASH_BANK_1)
bogdanm 0:9b334a45a8ff 934 {
bogdanm 0:9b334a45a8ff 935 reg_value = (READ_REG(FLASH->PCROP1SR) & FLASH_PCROP1SR_PCROP1_STRT);
bogdanm 0:9b334a45a8ff 936 *PCROPStartAddr = (reg_value << 3) + bank1_addr;
bogdanm 0:9b334a45a8ff 937
bogdanm 0:9b334a45a8ff 938 reg_value = (READ_REG(FLASH->PCROP1ER) & FLASH_PCROP1ER_PCROP1_END);
bogdanm 0:9b334a45a8ff 939 *PCROPEndAddr = (reg_value << 3) + bank1_addr;
bogdanm 0:9b334a45a8ff 940 }
bogdanm 0:9b334a45a8ff 941 else if(((*PCROPConfig) & FLASH_BANK_BOTH) == FLASH_BANK_2)
bogdanm 0:9b334a45a8ff 942 {
bogdanm 0:9b334a45a8ff 943 reg_value = (READ_REG(FLASH->PCROP2SR) & FLASH_PCROP2SR_PCROP2_STRT);
bogdanm 0:9b334a45a8ff 944 *PCROPStartAddr = (reg_value << 3) + bank2_addr;
bogdanm 0:9b334a45a8ff 945
bogdanm 0:9b334a45a8ff 946 reg_value = (READ_REG(FLASH->PCROP2ER) & FLASH_PCROP2ER_PCROP2_END);
bogdanm 0:9b334a45a8ff 947 *PCROPEndAddr = (reg_value << 3) + bank2_addr;
bogdanm 0:9b334a45a8ff 948 }
bogdanm 0:9b334a45a8ff 949
bogdanm 0:9b334a45a8ff 950 *PCROPConfig |= (READ_REG(FLASH->PCROP1ER) & FLASH_PCROP1ER_PCROP_RDP);
bogdanm 0:9b334a45a8ff 951 }
bogdanm 0:9b334a45a8ff 952 /**
bogdanm 0:9b334a45a8ff 953 * @}
bogdanm 0:9b334a45a8ff 954 */
bogdanm 0:9b334a45a8ff 955
bogdanm 0:9b334a45a8ff 956 /**
bogdanm 0:9b334a45a8ff 957 * @}
bogdanm 0:9b334a45a8ff 958 */
bogdanm 0:9b334a45a8ff 959
bogdanm 0:9b334a45a8ff 960 #endif /* HAL_FLASH_MODULE_ENABLED */
bogdanm 0:9b334a45a8ff 961
bogdanm 0:9b334a45a8ff 962 /**
bogdanm 0:9b334a45a8ff 963 * @}
bogdanm 0:9b334a45a8ff 964 */
bogdanm 0:9b334a45a8ff 965
bogdanm 0:9b334a45a8ff 966 /**
bogdanm 0:9b334a45a8ff 967 * @}
bogdanm 0:9b334a45a8ff 968 */
bogdanm 0:9b334a45a8ff 969
bogdanm 0:9b334a45a8ff 970 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/