en 129
fix LPC812 PWM
Fork of
mbed-dev
by 
mbed official
targets/cmsis/TARGET_STM/TARGET_STM32L1/stm32l1xx_hal_lcd.h@0:9b334a45a8ff, 2015-10-01 (annotated)
- Committer:
- bogdanm
- Date:
- Thu Oct 01 15:25:22 2015 +0300
- Revision:
- 0:9b334a45a8ff
Initial commit on mbed-dev
Replaces mbed-src (now inactive)
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| bogdanm | 0:9b334a45a8ff | 1 | /** |
| bogdanm | 0:9b334a45a8ff | 2 | ****************************************************************************** |
| bogdanm | 0:9b334a45a8ff | 3 | * @file stm32l1xx_hal_lcd.h |
| bogdanm | 0:9b334a45a8ff | 4 | * @author MCD Application Team |
| bogdanm | 0:9b334a45a8ff | 5 | * @version V1.0.0 |
| bogdanm | 0:9b334a45a8ff | 6 | * @date 5-September-2014 |
| bogdanm | 0:9b334a45a8ff | 7 | * @brief Header file of LCD Controller HAL module. |
| bogdanm | 0:9b334a45a8ff | 8 | ****************************************************************************** |
| bogdanm | 0:9b334a45a8ff | 9 | * @attention |
| bogdanm | 0:9b334a45a8ff | 10 | * |
| bogdanm | 0:9b334a45a8ff | 11 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
| bogdanm | 0:9b334a45a8ff | 12 | * |
| bogdanm | 0:9b334a45a8ff | 13 | * Redistribution and use in source and binary forms, with or without modification, |
| bogdanm | 0:9b334a45a8ff | 14 | * are permitted provided that the following conditions are met: |
| bogdanm | 0:9b334a45a8ff | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
| bogdanm | 0:9b334a45a8ff | 16 | * this list of conditions and the following disclaimer. |
| bogdanm | 0:9b334a45a8ff | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| bogdanm | 0:9b334a45a8ff | 18 | * this list of conditions and the following disclaimer in the documentation |
| bogdanm | 0:9b334a45a8ff | 19 | * and/or other materials provided with the distribution. |
| bogdanm | 0:9b334a45a8ff | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| bogdanm | 0:9b334a45a8ff | 21 | * may be used to endorse or promote products derived from this software |
| bogdanm | 0:9b334a45a8ff | 22 | * without specific prior written permission. |
| bogdanm | 0:9b334a45a8ff | 23 | * |
| bogdanm | 0:9b334a45a8ff | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| bogdanm | 0:9b334a45a8ff | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| bogdanm | 0:9b334a45a8ff | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| bogdanm | 0:9b334a45a8ff | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| bogdanm | 0:9b334a45a8ff | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| bogdanm | 0:9b334a45a8ff | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| bogdanm | 0:9b334a45a8ff | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| bogdanm | 0:9b334a45a8ff | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| bogdanm | 0:9b334a45a8ff | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| bogdanm | 0:9b334a45a8ff | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| bogdanm | 0:9b334a45a8ff | 34 | * |
| bogdanm | 0:9b334a45a8ff | 35 | ****************************************************************************** |
| bogdanm | 0:9b334a45a8ff | 36 | */ |
| bogdanm | 0:9b334a45a8ff | 37 | |
| bogdanm | 0:9b334a45a8ff | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 39 | #ifndef __STM32L1xx_HAL_LCD_H |
| bogdanm | 0:9b334a45a8ff | 40 | #define __STM32L1xx_HAL_LCD_H |
| bogdanm | 0:9b334a45a8ff | 41 | |
| bogdanm | 0:9b334a45a8ff | 42 | #ifdef __cplusplus |
| bogdanm | 0:9b334a45a8ff | 43 | extern "C" { |
| bogdanm | 0:9b334a45a8ff | 44 | #endif |
| bogdanm | 0:9b334a45a8ff | 45 | |
| bogdanm | 0:9b334a45a8ff | 46 | /** @addtogroup STM32L1xx_HAL_Driver |
| bogdanm | 0:9b334a45a8ff | 47 | * @{ |
| bogdanm | 0:9b334a45a8ff | 48 | */ |
| bogdanm | 0:9b334a45a8ff | 49 | |
| bogdanm | 0:9b334a45a8ff | 50 | #if defined (STM32L100xB) || defined (STM32L100xBA) || defined (STM32L100xC) ||\ |
| bogdanm | 0:9b334a45a8ff | 51 | defined (STM32L152xB) || defined (STM32L152xBA) || defined (STM32L152xC) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L152xE) ||\ |
| bogdanm | 0:9b334a45a8ff | 52 | defined (STM32L162xC) || defined (STM32L162xCA) || defined (STM32L162xD) || defined (STM32L162xE) |
| bogdanm | 0:9b334a45a8ff | 53 | |
| bogdanm | 0:9b334a45a8ff | 54 | /* Includes ------------------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 55 | #include "stm32l1xx_hal_def.h" |
| bogdanm | 0:9b334a45a8ff | 56 | |
| bogdanm | 0:9b334a45a8ff | 57 | /** @addtogroup LCD |
| bogdanm | 0:9b334a45a8ff | 58 | * @{ |
| bogdanm | 0:9b334a45a8ff | 59 | */ |
| bogdanm | 0:9b334a45a8ff | 60 | |
| bogdanm | 0:9b334a45a8ff | 61 | /* Exported types ------------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 62 | |
| bogdanm | 0:9b334a45a8ff | 63 | /** @defgroup LCD_Exported_Types LCD Exported Types |
| bogdanm | 0:9b334a45a8ff | 64 | * @{ |
| bogdanm | 0:9b334a45a8ff | 65 | */ |
| bogdanm | 0:9b334a45a8ff | 66 | |
| bogdanm | 0:9b334a45a8ff | 67 | /** |
| bogdanm | 0:9b334a45a8ff | 68 | * @brief LCD Init structure definition |
| bogdanm | 0:9b334a45a8ff | 69 | */ |
| bogdanm | 0:9b334a45a8ff | 70 | |
| bogdanm | 0:9b334a45a8ff | 71 | typedef struct |
| bogdanm | 0:9b334a45a8ff | 72 | { |
| bogdanm | 0:9b334a45a8ff | 73 | uint32_t Prescaler; /*!< Configures the LCD Prescaler. |
| bogdanm | 0:9b334a45a8ff | 74 | This parameter can be one value of @ref LCD_Prescaler */ |
| bogdanm | 0:9b334a45a8ff | 75 | uint32_t Divider; /*!< Configures the LCD Divider. |
| bogdanm | 0:9b334a45a8ff | 76 | This parameter can be one value of @ref LCD_Divider */ |
| bogdanm | 0:9b334a45a8ff | 77 | uint32_t Duty; /*!< Configures the LCD Duty. |
| bogdanm | 0:9b334a45a8ff | 78 | This parameter can be one value of @ref LCD_Duty */ |
| bogdanm | 0:9b334a45a8ff | 79 | uint32_t Bias; /*!< Configures the LCD Bias. |
| bogdanm | 0:9b334a45a8ff | 80 | This parameter can be one value of @ref LCD_Bias */ |
| bogdanm | 0:9b334a45a8ff | 81 | uint32_t VoltageSource; /*!< Selects the LCD Voltage source. |
| bogdanm | 0:9b334a45a8ff | 82 | This parameter can be one value of @ref LCD_Voltage_Source */ |
| bogdanm | 0:9b334a45a8ff | 83 | uint32_t Contrast; /*!< Configures the LCD Contrast. |
| bogdanm | 0:9b334a45a8ff | 84 | This parameter can be one value of @ref LCD_Contrast */ |
| bogdanm | 0:9b334a45a8ff | 85 | uint32_t DeadTime; /*!< Configures the LCD Dead Time. |
| bogdanm | 0:9b334a45a8ff | 86 | This parameter can be one value of @ref LCD_DeadTime */ |
| bogdanm | 0:9b334a45a8ff | 87 | uint32_t PulseOnDuration; /*!< Configures the LCD Pulse On Duration. |
| bogdanm | 0:9b334a45a8ff | 88 | This parameter can be one value of @ref LCD_PulseOnDuration */ |
| bogdanm | 0:9b334a45a8ff | 89 | uint32_t BlinkMode; /*!< Configures the LCD Blink Mode. |
| bogdanm | 0:9b334a45a8ff | 90 | This parameter can be one value of @ref LCD_BlinkMode */ |
| bogdanm | 0:9b334a45a8ff | 91 | uint32_t BlinkFrequency; /*!< Configures the LCD Blink frequency. |
| bogdanm | 0:9b334a45a8ff | 92 | This parameter can be one value of @ref LCD_BlinkFrequency */ |
| bogdanm | 0:9b334a45a8ff | 93 | uint32_t MuxSegment; /*!< Enable or disable mux segment. |
| bogdanm | 0:9b334a45a8ff | 94 | This parameter can be set to ENABLE or DISABLE. */ |
| bogdanm | 0:9b334a45a8ff | 95 | }LCD_InitTypeDef; |
| bogdanm | 0:9b334a45a8ff | 96 | |
| bogdanm | 0:9b334a45a8ff | 97 | /** |
| bogdanm | 0:9b334a45a8ff | 98 | * @brief HAL LCD State structures definition |
| bogdanm | 0:9b334a45a8ff | 99 | */ |
| bogdanm | 0:9b334a45a8ff | 100 | typedef enum |
| bogdanm | 0:9b334a45a8ff | 101 | { |
| bogdanm | 0:9b334a45a8ff | 102 | HAL_LCD_STATE_RESET = 0x00, /*!< Peripheral is not yet Initialized */ |
| bogdanm | 0:9b334a45a8ff | 103 | HAL_LCD_STATE_READY = 0x01, /*!< Peripheral Initialized and ready for use */ |
| bogdanm | 0:9b334a45a8ff | 104 | HAL_LCD_STATE_BUSY = 0x02, /*!< an internal process is ongoing */ |
| bogdanm | 0:9b334a45a8ff | 105 | HAL_LCD_STATE_TIMEOUT = 0x03, /*!< Timeout state */ |
| bogdanm | 0:9b334a45a8ff | 106 | HAL_LCD_STATE_ERROR = 0x04 /*!< Error */ |
| bogdanm | 0:9b334a45a8ff | 107 | }HAL_LCD_StateTypeDef; |
| bogdanm | 0:9b334a45a8ff | 108 | |
| bogdanm | 0:9b334a45a8ff | 109 | /** |
| bogdanm | 0:9b334a45a8ff | 110 | * @brief HAL LCD Error Code structure definition |
| bogdanm | 0:9b334a45a8ff | 111 | */ |
| bogdanm | 0:9b334a45a8ff | 112 | typedef enum |
| bogdanm | 0:9b334a45a8ff | 113 | { |
| bogdanm | 0:9b334a45a8ff | 114 | HAL_LCD_ERROR_NONE = 0x00, /*!< No error */ |
| bogdanm | 0:9b334a45a8ff | 115 | HAL_LCD_ERROR_FCRSF = 0x01, /*!< Synchro flag timeout error */ |
| bogdanm | 0:9b334a45a8ff | 116 | HAL_LCD_ERROR_UDR = 0x02, /*!< Update display request flag timeout error */ |
| bogdanm | 0:9b334a45a8ff | 117 | HAL_LCD_ERROR_UDD = 0x04, /*!< Update display done flag timeout error */ |
| bogdanm | 0:9b334a45a8ff | 118 | HAL_LCD_ERROR_ENS = 0x08, /*!< LCD enabled status flag timeout error */ |
| bogdanm | 0:9b334a45a8ff | 119 | HAL_LCD_ERROR_RDY = 0x10 /*!< LCD Booster ready timeout error */ |
| bogdanm | 0:9b334a45a8ff | 120 | }HAL_LCD_ErrorTypeDef; |
| bogdanm | 0:9b334a45a8ff | 121 | |
| bogdanm | 0:9b334a45a8ff | 122 | /** |
| bogdanm | 0:9b334a45a8ff | 123 | * @brief UART handle Structure definition |
| bogdanm | 0:9b334a45a8ff | 124 | */ |
| bogdanm | 0:9b334a45a8ff | 125 | typedef struct |
| bogdanm | 0:9b334a45a8ff | 126 | { |
| bogdanm | 0:9b334a45a8ff | 127 | LCD_TypeDef *Instance; /* LCD registers base address */ |
| bogdanm | 0:9b334a45a8ff | 128 | |
| bogdanm | 0:9b334a45a8ff | 129 | LCD_InitTypeDef Init; /* LCD communication parameters */ |
| bogdanm | 0:9b334a45a8ff | 130 | |
| bogdanm | 0:9b334a45a8ff | 131 | HAL_LockTypeDef Lock; /* Locking object */ |
| bogdanm | 0:9b334a45a8ff | 132 | |
| bogdanm | 0:9b334a45a8ff | 133 | __IO HAL_LCD_StateTypeDef State; /* LCD communication state */ |
| bogdanm | 0:9b334a45a8ff | 134 | |
| bogdanm | 0:9b334a45a8ff | 135 | __IO HAL_LCD_ErrorTypeDef ErrorCode; /* LCD Error code */ |
| bogdanm | 0:9b334a45a8ff | 136 | |
| bogdanm | 0:9b334a45a8ff | 137 | }LCD_HandleTypeDef; |
| bogdanm | 0:9b334a45a8ff | 138 | |
| bogdanm | 0:9b334a45a8ff | 139 | /** |
| bogdanm | 0:9b334a45a8ff | 140 | * @} |
| bogdanm | 0:9b334a45a8ff | 141 | */ |
| bogdanm | 0:9b334a45a8ff | 142 | |
| bogdanm | 0:9b334a45a8ff | 143 | /* Exported constants --------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 144 | |
| bogdanm | 0:9b334a45a8ff | 145 | /** @defgroup LCD_Exported_Constants LCD Exported Constants |
| bogdanm | 0:9b334a45a8ff | 146 | * @{ |
| bogdanm | 0:9b334a45a8ff | 147 | */ |
| bogdanm | 0:9b334a45a8ff | 148 | |
| bogdanm | 0:9b334a45a8ff | 149 | /** @defgroup LCD_Prescaler LCD Prescaler |
| bogdanm | 0:9b334a45a8ff | 150 | * @{ |
| bogdanm | 0:9b334a45a8ff | 151 | */ |
| bogdanm | 0:9b334a45a8ff | 152 | |
| bogdanm | 0:9b334a45a8ff | 153 | #define LCD_PRESCALER_1 ((uint32_t)0x00000000) /*!< CLKPS = LCDCLK */ |
| bogdanm | 0:9b334a45a8ff | 154 | #define LCD_PRESCALER_2 ((uint32_t)0x00400000) /*!< CLKPS = LCDCLK/2 */ |
| bogdanm | 0:9b334a45a8ff | 155 | #define LCD_PRESCALER_4 ((uint32_t)0x00800000) /*!< CLKPS = LCDCLK/4 */ |
| bogdanm | 0:9b334a45a8ff | 156 | #define LCD_PRESCALER_8 ((uint32_t)0x00C00000) /*!< CLKPS = LCDCLK/8 */ |
| bogdanm | 0:9b334a45a8ff | 157 | #define LCD_PRESCALER_16 ((uint32_t)0x01000000) /*!< CLKPS = LCDCLK/16 */ |
| bogdanm | 0:9b334a45a8ff | 158 | #define LCD_PRESCALER_32 ((uint32_t)0x01400000) /*!< CLKPS = LCDCLK/32 */ |
| bogdanm | 0:9b334a45a8ff | 159 | #define LCD_PRESCALER_64 ((uint32_t)0x01800000) /*!< CLKPS = LCDCLK/64 */ |
| bogdanm | 0:9b334a45a8ff | 160 | #define LCD_PRESCALER_128 ((uint32_t)0x01C00000) /*!< CLKPS = LCDCLK/128 */ |
| bogdanm | 0:9b334a45a8ff | 161 | #define LCD_PRESCALER_256 ((uint32_t)0x02000000) /*!< CLKPS = LCDCLK/256 */ |
| bogdanm | 0:9b334a45a8ff | 162 | #define LCD_PRESCALER_512 ((uint32_t)0x02400000) /*!< CLKPS = LCDCLK/512 */ |
| bogdanm | 0:9b334a45a8ff | 163 | #define LCD_PRESCALER_1024 ((uint32_t)0x02800000) /*!< CLKPS = LCDCLK/1024 */ |
| bogdanm | 0:9b334a45a8ff | 164 | #define LCD_PRESCALER_2048 ((uint32_t)0x02C00000) /*!< CLKPS = LCDCLK/2048 */ |
| bogdanm | 0:9b334a45a8ff | 165 | #define LCD_PRESCALER_4096 ((uint32_t)0x03000000) /*!< CLKPS = LCDCLK/4096 */ |
| bogdanm | 0:9b334a45a8ff | 166 | #define LCD_PRESCALER_8192 ((uint32_t)0x03400000) /*!< CLKPS = LCDCLK/8192 */ |
| bogdanm | 0:9b334a45a8ff | 167 | #define LCD_PRESCALER_16384 ((uint32_t)0x03800000) /*!< CLKPS = LCDCLK/16384 */ |
| bogdanm | 0:9b334a45a8ff | 168 | #define LCD_PRESCALER_32768 ((uint32_t)LCD_FCR_PS) /*!< CLKPS = LCDCLK/32768 */ |
| bogdanm | 0:9b334a45a8ff | 169 | |
| bogdanm | 0:9b334a45a8ff | 170 | #define IS_LCD_PRESCALER(__PRESCALER__) (((__PRESCALER__) == LCD_PRESCALER_1) || \ |
| bogdanm | 0:9b334a45a8ff | 171 | ((__PRESCALER__) == LCD_PRESCALER_2) || \ |
| bogdanm | 0:9b334a45a8ff | 172 | ((__PRESCALER__) == LCD_PRESCALER_4) || \ |
| bogdanm | 0:9b334a45a8ff | 173 | ((__PRESCALER__) == LCD_PRESCALER_8) || \ |
| bogdanm | 0:9b334a45a8ff | 174 | ((__PRESCALER__) == LCD_PRESCALER_16) || \ |
| bogdanm | 0:9b334a45a8ff | 175 | ((__PRESCALER__) == LCD_PRESCALER_32) || \ |
| bogdanm | 0:9b334a45a8ff | 176 | ((__PRESCALER__) == LCD_PRESCALER_64) || \ |
| bogdanm | 0:9b334a45a8ff | 177 | ((__PRESCALER__) == LCD_PRESCALER_128) || \ |
| bogdanm | 0:9b334a45a8ff | 178 | ((__PRESCALER__) == LCD_PRESCALER_256) || \ |
| bogdanm | 0:9b334a45a8ff | 179 | ((__PRESCALER__) == LCD_PRESCALER_512) || \ |
| bogdanm | 0:9b334a45a8ff | 180 | ((__PRESCALER__) == LCD_PRESCALER_1024) || \ |
| bogdanm | 0:9b334a45a8ff | 181 | ((__PRESCALER__) == LCD_PRESCALER_2048) || \ |
| bogdanm | 0:9b334a45a8ff | 182 | ((__PRESCALER__) == LCD_PRESCALER_4096) || \ |
| bogdanm | 0:9b334a45a8ff | 183 | ((__PRESCALER__) == LCD_PRESCALER_8192) || \ |
| bogdanm | 0:9b334a45a8ff | 184 | ((__PRESCALER__) == LCD_PRESCALER_16384) || \ |
| bogdanm | 0:9b334a45a8ff | 185 | ((__PRESCALER__) == LCD_PRESCALER_32768)) |
| bogdanm | 0:9b334a45a8ff | 186 | |
| bogdanm | 0:9b334a45a8ff | 187 | /** |
| bogdanm | 0:9b334a45a8ff | 188 | * @} |
| bogdanm | 0:9b334a45a8ff | 189 | */ |
| bogdanm | 0:9b334a45a8ff | 190 | |
| bogdanm | 0:9b334a45a8ff | 191 | /** @defgroup LCD_Divider LCD Divider |
| bogdanm | 0:9b334a45a8ff | 192 | * @{ |
| bogdanm | 0:9b334a45a8ff | 193 | */ |
| bogdanm | 0:9b334a45a8ff | 194 | |
| bogdanm | 0:9b334a45a8ff | 195 | #define LCD_DIVIDER_16 ((uint32_t)0x00000000) /*!< LCD frequency = CLKPS/16 */ |
| bogdanm | 0:9b334a45a8ff | 196 | #define LCD_DIVIDER_17 ((uint32_t)0x00040000) /*!< LCD frequency = CLKPS/17 */ |
| bogdanm | 0:9b334a45a8ff | 197 | #define LCD_DIVIDER_18 ((uint32_t)0x00080000) /*!< LCD frequency = CLKPS/18 */ |
| bogdanm | 0:9b334a45a8ff | 198 | #define LCD_DIVIDER_19 ((uint32_t)0x000C0000) /*!< LCD frequency = CLKPS/19 */ |
| bogdanm | 0:9b334a45a8ff | 199 | #define LCD_DIVIDER_20 ((uint32_t)0x00100000) /*!< LCD frequency = CLKPS/20 */ |
| bogdanm | 0:9b334a45a8ff | 200 | #define LCD_DIVIDER_21 ((uint32_t)0x00140000) /*!< LCD frequency = CLKPS/21 */ |
| bogdanm | 0:9b334a45a8ff | 201 | #define LCD_DIVIDER_22 ((uint32_t)0x00180000) /*!< LCD frequency = CLKPS/22 */ |
| bogdanm | 0:9b334a45a8ff | 202 | #define LCD_DIVIDER_23 ((uint32_t)0x001C0000) /*!< LCD frequency = CLKPS/23 */ |
| bogdanm | 0:9b334a45a8ff | 203 | #define LCD_DIVIDER_24 ((uint32_t)0x00200000) /*!< LCD frequency = CLKPS/24 */ |
| bogdanm | 0:9b334a45a8ff | 204 | #define LCD_DIVIDER_25 ((uint32_t)0x00240000) /*!< LCD frequency = CLKPS/25 */ |
| bogdanm | 0:9b334a45a8ff | 205 | #define LCD_DIVIDER_26 ((uint32_t)0x00280000) /*!< LCD frequency = CLKPS/26 */ |
| bogdanm | 0:9b334a45a8ff | 206 | #define LCD_DIVIDER_27 ((uint32_t)0x002C0000) /*!< LCD frequency = CLKPS/27 */ |
| bogdanm | 0:9b334a45a8ff | 207 | #define LCD_DIVIDER_28 ((uint32_t)0x00300000) /*!< LCD frequency = CLKPS/28 */ |
| bogdanm | 0:9b334a45a8ff | 208 | #define LCD_DIVIDER_29 ((uint32_t)0x00340000) /*!< LCD frequency = CLKPS/29 */ |
| bogdanm | 0:9b334a45a8ff | 209 | #define LCD_DIVIDER_30 ((uint32_t)0x00380000) /*!< LCD frequency = CLKPS/30 */ |
| bogdanm | 0:9b334a45a8ff | 210 | #define LCD_DIVIDER_31 ((uint32_t)LCD_FCR_DIV) /*!< LCD frequency = CLKPS/31 */ |
| bogdanm | 0:9b334a45a8ff | 211 | |
| bogdanm | 0:9b334a45a8ff | 212 | #define IS_LCD_DIVIDER(__DIVIDER__) (((__DIVIDER__) == LCD_DIVIDER_16) || \ |
| bogdanm | 0:9b334a45a8ff | 213 | ((__DIVIDER__) == LCD_DIVIDER_17) || \ |
| bogdanm | 0:9b334a45a8ff | 214 | ((__DIVIDER__) == LCD_DIVIDER_18) || \ |
| bogdanm | 0:9b334a45a8ff | 215 | ((__DIVIDER__) == LCD_DIVIDER_19) || \ |
| bogdanm | 0:9b334a45a8ff | 216 | ((__DIVIDER__) == LCD_DIVIDER_20) || \ |
| bogdanm | 0:9b334a45a8ff | 217 | ((__DIVIDER__) == LCD_DIVIDER_21) || \ |
| bogdanm | 0:9b334a45a8ff | 218 | ((__DIVIDER__) == LCD_DIVIDER_22) || \ |
| bogdanm | 0:9b334a45a8ff | 219 | ((__DIVIDER__) == LCD_DIVIDER_23) || \ |
| bogdanm | 0:9b334a45a8ff | 220 | ((__DIVIDER__) == LCD_DIVIDER_24) || \ |
| bogdanm | 0:9b334a45a8ff | 221 | ((__DIVIDER__) == LCD_DIVIDER_25) || \ |
| bogdanm | 0:9b334a45a8ff | 222 | ((__DIVIDER__) == LCD_DIVIDER_26) || \ |
| bogdanm | 0:9b334a45a8ff | 223 | ((__DIVIDER__) == LCD_DIVIDER_27) || \ |
| bogdanm | 0:9b334a45a8ff | 224 | ((__DIVIDER__) == LCD_DIVIDER_28) || \ |
| bogdanm | 0:9b334a45a8ff | 225 | ((__DIVIDER__) == LCD_DIVIDER_29) || \ |
| bogdanm | 0:9b334a45a8ff | 226 | ((__DIVIDER__) == LCD_DIVIDER_30) || \ |
| bogdanm | 0:9b334a45a8ff | 227 | ((__DIVIDER__) == LCD_DIVIDER_31)) |
| bogdanm | 0:9b334a45a8ff | 228 | |
| bogdanm | 0:9b334a45a8ff | 229 | /** |
| bogdanm | 0:9b334a45a8ff | 230 | * @} |
| bogdanm | 0:9b334a45a8ff | 231 | */ |
| bogdanm | 0:9b334a45a8ff | 232 | |
| bogdanm | 0:9b334a45a8ff | 233 | |
| bogdanm | 0:9b334a45a8ff | 234 | /** @defgroup LCD_Duty LCD Duty |
| bogdanm | 0:9b334a45a8ff | 235 | * @{ |
| bogdanm | 0:9b334a45a8ff | 236 | */ |
| bogdanm | 0:9b334a45a8ff | 237 | |
| bogdanm | 0:9b334a45a8ff | 238 | #define LCD_DUTY_STATIC ((uint32_t)0x00000000) /*!< Static duty */ |
| bogdanm | 0:9b334a45a8ff | 239 | #define LCD_DUTY_1_2 (LCD_CR_DUTY_0) /*!< 1/2 duty */ |
| bogdanm | 0:9b334a45a8ff | 240 | #define LCD_DUTY_1_3 (LCD_CR_DUTY_1) /*!< 1/3 duty */ |
| bogdanm | 0:9b334a45a8ff | 241 | #define LCD_DUTY_1_4 ((LCD_CR_DUTY_1 | LCD_CR_DUTY_0)) /*!< 1/4 duty */ |
| bogdanm | 0:9b334a45a8ff | 242 | #define LCD_DUTY_1_8 (LCD_CR_DUTY_2) /*!< 1/8 duty */ |
| bogdanm | 0:9b334a45a8ff | 243 | |
| bogdanm | 0:9b334a45a8ff | 244 | #define IS_LCD_DUTY(__DUTY__) (((__DUTY__) == LCD_DUTY_STATIC) || \ |
| bogdanm | 0:9b334a45a8ff | 245 | ((__DUTY__) == LCD_DUTY_1_2) || \ |
| bogdanm | 0:9b334a45a8ff | 246 | ((__DUTY__) == LCD_DUTY_1_3) || \ |
| bogdanm | 0:9b334a45a8ff | 247 | ((__DUTY__) == LCD_DUTY_1_4) || \ |
| bogdanm | 0:9b334a45a8ff | 248 | ((__DUTY__) == LCD_DUTY_1_8)) |
| bogdanm | 0:9b334a45a8ff | 249 | |
| bogdanm | 0:9b334a45a8ff | 250 | /** |
| bogdanm | 0:9b334a45a8ff | 251 | * @} |
| bogdanm | 0:9b334a45a8ff | 252 | */ |
| bogdanm | 0:9b334a45a8ff | 253 | |
| bogdanm | 0:9b334a45a8ff | 254 | |
| bogdanm | 0:9b334a45a8ff | 255 | /** @defgroup LCD_Bias LCD Bias |
| bogdanm | 0:9b334a45a8ff | 256 | * @{ |
| bogdanm | 0:9b334a45a8ff | 257 | */ |
| bogdanm | 0:9b334a45a8ff | 258 | |
| bogdanm | 0:9b334a45a8ff | 259 | #define LCD_BIAS_1_4 ((uint32_t)0x00000000) /*!< 1/4 Bias */ |
| bogdanm | 0:9b334a45a8ff | 260 | #define LCD_BIAS_1_2 LCD_CR_BIAS_0 /*!< 1/2 Bias */ |
| bogdanm | 0:9b334a45a8ff | 261 | #define LCD_BIAS_1_3 LCD_CR_BIAS_1 /*!< 1/3 Bias */ |
| bogdanm | 0:9b334a45a8ff | 262 | |
| bogdanm | 0:9b334a45a8ff | 263 | #define IS_LCD_BIAS(__BIAS__) (((__BIAS__) == LCD_BIAS_1_4) || \ |
| bogdanm | 0:9b334a45a8ff | 264 | ((__BIAS__) == LCD_BIAS_1_2) || \ |
| bogdanm | 0:9b334a45a8ff | 265 | ((__BIAS__) == LCD_BIAS_1_3)) |
| bogdanm | 0:9b334a45a8ff | 266 | /** |
| bogdanm | 0:9b334a45a8ff | 267 | * @} |
| bogdanm | 0:9b334a45a8ff | 268 | */ |
| bogdanm | 0:9b334a45a8ff | 269 | |
| bogdanm | 0:9b334a45a8ff | 270 | /** @defgroup LCD_Voltage_Source LCD Voltage Source |
| bogdanm | 0:9b334a45a8ff | 271 | * @{ |
| bogdanm | 0:9b334a45a8ff | 272 | */ |
| bogdanm | 0:9b334a45a8ff | 273 | |
| bogdanm | 0:9b334a45a8ff | 274 | #define LCD_VOLTAGESOURCE_INTERNAL ((uint32_t)0x00000000) /*!< Internal voltage source for the LCD */ |
| bogdanm | 0:9b334a45a8ff | 275 | #define LCD_VOLTAGESOURCE_EXTERNAL LCD_CR_VSEL /*!< External voltage source for the LCD */ |
| bogdanm | 0:9b334a45a8ff | 276 | |
| bogdanm | 0:9b334a45a8ff | 277 | #define IS_LCD_VOLTAGE_SOURCE(SOURCE) (((SOURCE) == LCD_VOLTAGESOURCE_INTERNAL) || \ |
| bogdanm | 0:9b334a45a8ff | 278 | ((SOURCE) == LCD_VOLTAGESOURCE_EXTERNAL)) |
| bogdanm | 0:9b334a45a8ff | 279 | |
| bogdanm | 0:9b334a45a8ff | 280 | /** |
| bogdanm | 0:9b334a45a8ff | 281 | * @} |
| bogdanm | 0:9b334a45a8ff | 282 | */ |
| bogdanm | 0:9b334a45a8ff | 283 | |
| bogdanm | 0:9b334a45a8ff | 284 | /** @defgroup LCD_Interrupts LCD Interrupts |
| bogdanm | 0:9b334a45a8ff | 285 | * @{ |
| bogdanm | 0:9b334a45a8ff | 286 | */ |
| bogdanm | 0:9b334a45a8ff | 287 | #define LCD_IT_SOF LCD_FCR_SOFIE |
| bogdanm | 0:9b334a45a8ff | 288 | #define LCD_IT_UDD LCD_FCR_UDDIE |
| bogdanm | 0:9b334a45a8ff | 289 | |
| bogdanm | 0:9b334a45a8ff | 290 | /** |
| bogdanm | 0:9b334a45a8ff | 291 | * @} |
| bogdanm | 0:9b334a45a8ff | 292 | */ |
| bogdanm | 0:9b334a45a8ff | 293 | |
| bogdanm | 0:9b334a45a8ff | 294 | /** @defgroup LCD_PulseOnDuration LCD Pulse On Duration |
| bogdanm | 0:9b334a45a8ff | 295 | * @{ |
| bogdanm | 0:9b334a45a8ff | 296 | */ |
| bogdanm | 0:9b334a45a8ff | 297 | |
| bogdanm | 0:9b334a45a8ff | 298 | #define LCD_PULSEONDURATION_0 ((uint32_t)0x00000000) /*!< Pulse ON duration = 0 pulse */ |
| bogdanm | 0:9b334a45a8ff | 299 | #define LCD_PULSEONDURATION_1 (LCD_FCR_PON_0) /*!< Pulse ON duration = 1/CK_PS */ |
| bogdanm | 0:9b334a45a8ff | 300 | #define LCD_PULSEONDURATION_2 (LCD_FCR_PON_1) /*!< Pulse ON duration = 2/CK_PS */ |
| bogdanm | 0:9b334a45a8ff | 301 | #define LCD_PULSEONDURATION_3 (LCD_FCR_PON_1 | LCD_FCR_PON_0) /*!< Pulse ON duration = 3/CK_PS */ |
| bogdanm | 0:9b334a45a8ff | 302 | #define LCD_PULSEONDURATION_4 (LCD_FCR_PON_2) /*!< Pulse ON duration = 4/CK_PS */ |
| bogdanm | 0:9b334a45a8ff | 303 | #define LCD_PULSEONDURATION_5 (LCD_FCR_PON_2 | LCD_FCR_PON_0) /*!< Pulse ON duration = 5/CK_PS */ |
| bogdanm | 0:9b334a45a8ff | 304 | #define LCD_PULSEONDURATION_6 (LCD_FCR_PON_2 | LCD_FCR_PON_1) /*!< Pulse ON duration = 6/CK_PS */ |
| bogdanm | 0:9b334a45a8ff | 305 | #define LCD_PULSEONDURATION_7 (LCD_FCR_PON) /*!< Pulse ON duration = 7/CK_PS */ |
| bogdanm | 0:9b334a45a8ff | 306 | |
| bogdanm | 0:9b334a45a8ff | 307 | #define IS_LCD_PULSE_ON_DURATION(__DURATION__) (((__DURATION__) == LCD_PULSEONDURATION_0) || \ |
| bogdanm | 0:9b334a45a8ff | 308 | ((__DURATION__) == LCD_PULSEONDURATION_1) || \ |
| bogdanm | 0:9b334a45a8ff | 309 | ((__DURATION__) == LCD_PULSEONDURATION_2) || \ |
| bogdanm | 0:9b334a45a8ff | 310 | ((__DURATION__) == LCD_PULSEONDURATION_3) || \ |
| bogdanm | 0:9b334a45a8ff | 311 | ((__DURATION__) == LCD_PULSEONDURATION_4) || \ |
| bogdanm | 0:9b334a45a8ff | 312 | ((__DURATION__) == LCD_PULSEONDURATION_5) || \ |
| bogdanm | 0:9b334a45a8ff | 313 | ((__DURATION__) == LCD_PULSEONDURATION_6) || \ |
| bogdanm | 0:9b334a45a8ff | 314 | ((__DURATION__) == LCD_PULSEONDURATION_7)) |
| bogdanm | 0:9b334a45a8ff | 315 | /** |
| bogdanm | 0:9b334a45a8ff | 316 | * @} |
| bogdanm | 0:9b334a45a8ff | 317 | */ |
| bogdanm | 0:9b334a45a8ff | 318 | |
| bogdanm | 0:9b334a45a8ff | 319 | |
| bogdanm | 0:9b334a45a8ff | 320 | /** @defgroup LCD_DeadTime LCD Dead Time |
| bogdanm | 0:9b334a45a8ff | 321 | * @{ |
| bogdanm | 0:9b334a45a8ff | 322 | */ |
| bogdanm | 0:9b334a45a8ff | 323 | |
| bogdanm | 0:9b334a45a8ff | 324 | #define LCD_DEADTIME_0 ((uint32_t)0x00000000) /*!< No dead Time */ |
| bogdanm | 0:9b334a45a8ff | 325 | #define LCD_DEADTIME_1 (LCD_FCR_DEAD_0) /*!< One Phase between different couple of Frame */ |
| bogdanm | 0:9b334a45a8ff | 326 | #define LCD_DEADTIME_2 (LCD_FCR_DEAD_1) /*!< Two Phase between different couple of Frame */ |
| bogdanm | 0:9b334a45a8ff | 327 | #define LCD_DEADTIME_3 (LCD_FCR_DEAD_1 | LCD_FCR_DEAD_0) /*!< Three Phase between different couple of Frame */ |
| bogdanm | 0:9b334a45a8ff | 328 | #define LCD_DEADTIME_4 (LCD_FCR_DEAD_2) /*!< Four Phase between different couple of Frame */ |
| bogdanm | 0:9b334a45a8ff | 329 | #define LCD_DEADTIME_5 (LCD_FCR_DEAD_2 | LCD_FCR_DEAD_0) /*!< Five Phase between different couple of Frame */ |
| bogdanm | 0:9b334a45a8ff | 330 | #define LCD_DEADTIME_6 (LCD_FCR_DEAD_2 | LCD_FCR_DEAD_1) /*!< Six Phase between different couple of Frame */ |
| bogdanm | 0:9b334a45a8ff | 331 | #define LCD_DEADTIME_7 (LCD_FCR_DEAD) /*!< Seven Phase between different couple of Frame */ |
| bogdanm | 0:9b334a45a8ff | 332 | |
| bogdanm | 0:9b334a45a8ff | 333 | #define IS_LCD_DEAD_TIME(__TIME__) (((__TIME__) == LCD_DEADTIME_0) || \ |
| bogdanm | 0:9b334a45a8ff | 334 | ((__TIME__) == LCD_DEADTIME_1) || \ |
| bogdanm | 0:9b334a45a8ff | 335 | ((__TIME__) == LCD_DEADTIME_2) || \ |
| bogdanm | 0:9b334a45a8ff | 336 | ((__TIME__) == LCD_DEADTIME_3) || \ |
| bogdanm | 0:9b334a45a8ff | 337 | ((__TIME__) == LCD_DEADTIME_4) || \ |
| bogdanm | 0:9b334a45a8ff | 338 | ((__TIME__) == LCD_DEADTIME_5) || \ |
| bogdanm | 0:9b334a45a8ff | 339 | ((__TIME__) == LCD_DEADTIME_6) || \ |
| bogdanm | 0:9b334a45a8ff | 340 | ((__TIME__) == LCD_DEADTIME_7)) |
| bogdanm | 0:9b334a45a8ff | 341 | /** |
| bogdanm | 0:9b334a45a8ff | 342 | * @} |
| bogdanm | 0:9b334a45a8ff | 343 | */ |
| bogdanm | 0:9b334a45a8ff | 344 | |
| bogdanm | 0:9b334a45a8ff | 345 | /** @defgroup LCD_BlinkMode LCD Blink Mode |
| bogdanm | 0:9b334a45a8ff | 346 | * @{ |
| bogdanm | 0:9b334a45a8ff | 347 | */ |
| bogdanm | 0:9b334a45a8ff | 348 | |
| bogdanm | 0:9b334a45a8ff | 349 | #define LCD_BLINKMODE_OFF ((uint32_t)0x00000000) /*!< Blink disabled */ |
| bogdanm | 0:9b334a45a8ff | 350 | #define LCD_BLINKMODE_SEG0_COM0 (LCD_FCR_BLINK_0) /*!< Blink enabled on SEG[0], COM[0] (1 pixel) */ |
| bogdanm | 0:9b334a45a8ff | 351 | #define LCD_BLINKMODE_SEG0_ALLCOM (LCD_FCR_BLINK_1) /*!< Blink enabled on SEG[0], all COM (up to |
| bogdanm | 0:9b334a45a8ff | 352 | 8 pixels according to the programmed duty) */ |
| bogdanm | 0:9b334a45a8ff | 353 | #define LCD_BLINKMODE_ALLSEG_ALLCOM (LCD_FCR_BLINK) /*!< Blink enabled on all SEG and all COM (all pixels) */ |
| bogdanm | 0:9b334a45a8ff | 354 | |
| bogdanm | 0:9b334a45a8ff | 355 | #define IS_LCD_BLINK_MODE(__MODE__) (((__MODE__) == LCD_BLINKMODE_OFF) || \ |
| bogdanm | 0:9b334a45a8ff | 356 | ((__MODE__) == LCD_BLINKMODE_SEG0_COM0) || \ |
| bogdanm | 0:9b334a45a8ff | 357 | ((__MODE__) == LCD_BLINKMODE_SEG0_ALLCOM) || \ |
| bogdanm | 0:9b334a45a8ff | 358 | ((__MODE__) == LCD_BLINKMODE_ALLSEG_ALLCOM)) |
| bogdanm | 0:9b334a45a8ff | 359 | /** |
| bogdanm | 0:9b334a45a8ff | 360 | * @} |
| bogdanm | 0:9b334a45a8ff | 361 | */ |
| bogdanm | 0:9b334a45a8ff | 362 | |
| bogdanm | 0:9b334a45a8ff | 363 | /** @defgroup LCD_BlinkFrequency LCD Blink Frequency |
| bogdanm | 0:9b334a45a8ff | 364 | * @{ |
| bogdanm | 0:9b334a45a8ff | 365 | */ |
| bogdanm | 0:9b334a45a8ff | 366 | |
| bogdanm | 0:9b334a45a8ff | 367 | #define LCD_BLINKFREQUENCY_DIV8 ((uint32_t)0x00000000) /*!< The Blink frequency = fLCD/8 */ |
| bogdanm | 0:9b334a45a8ff | 368 | #define LCD_BLINKFREQUENCY_DIV16 (LCD_FCR_BLINKF_0) /*!< The Blink frequency = fLCD/16 */ |
| bogdanm | 0:9b334a45a8ff | 369 | #define LCD_BLINKFREQUENCY_DIV32 (LCD_FCR_BLINKF_1) /*!< The Blink frequency = fLCD/32 */ |
| bogdanm | 0:9b334a45a8ff | 370 | #define LCD_BLINKFREQUENCY_DIV64 (LCD_FCR_BLINKF_1 | LCD_FCR_BLINKF_0) /*!< The Blink frequency = fLCD/64 */ |
| bogdanm | 0:9b334a45a8ff | 371 | #define LCD_BLINKFREQUENCY_DIV128 (LCD_FCR_BLINKF_2) /*!< The Blink frequency = fLCD/128 */ |
| bogdanm | 0:9b334a45a8ff | 372 | #define LCD_BLINKFREQUENCY_DIV256 (LCD_FCR_BLINKF_2 |LCD_FCR_BLINKF_0) /*!< The Blink frequency = fLCD/256 */ |
| bogdanm | 0:9b334a45a8ff | 373 | #define LCD_BLINKFREQUENCY_DIV512 (LCD_FCR_BLINKF_2 |LCD_FCR_BLINKF_1) /*!< The Blink frequency = fLCD/512 */ |
| bogdanm | 0:9b334a45a8ff | 374 | #define LCD_BLINKFREQUENCY_DIV1024 (LCD_FCR_BLINKF) /*!< The Blink frequency = fLCD/1024 */ |
| bogdanm | 0:9b334a45a8ff | 375 | |
| bogdanm | 0:9b334a45a8ff | 376 | #define IS_LCD_BLINK_FREQUENCY(__FREQUENCY__) (((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV8) || \ |
| bogdanm | 0:9b334a45a8ff | 377 | ((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV16) || \ |
| bogdanm | 0:9b334a45a8ff | 378 | ((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV32) || \ |
| bogdanm | 0:9b334a45a8ff | 379 | ((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV64) || \ |
| bogdanm | 0:9b334a45a8ff | 380 | ((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV128) || \ |
| bogdanm | 0:9b334a45a8ff | 381 | ((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV256) || \ |
| bogdanm | 0:9b334a45a8ff | 382 | ((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV512) || \ |
| bogdanm | 0:9b334a45a8ff | 383 | ((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV1024)) |
| bogdanm | 0:9b334a45a8ff | 384 | /** |
| bogdanm | 0:9b334a45a8ff | 385 | * @} |
| bogdanm | 0:9b334a45a8ff | 386 | */ |
| bogdanm | 0:9b334a45a8ff | 387 | |
| bogdanm | 0:9b334a45a8ff | 388 | /** @defgroup LCD_Contrast LCD Contrast |
| bogdanm | 0:9b334a45a8ff | 389 | * @{ |
| bogdanm | 0:9b334a45a8ff | 390 | */ |
| bogdanm | 0:9b334a45a8ff | 391 | |
| bogdanm | 0:9b334a45a8ff | 392 | #define LCD_CONTRASTLEVEL_0 ((uint32_t)0x00000000) /*!< Maximum Voltage = 2.60V */ |
| bogdanm | 0:9b334a45a8ff | 393 | #define LCD_CONTRASTLEVEL_1 (LCD_FCR_CC_0) /*!< Maximum Voltage = 2.73V */ |
| bogdanm | 0:9b334a45a8ff | 394 | #define LCD_CONTRASTLEVEL_2 (LCD_FCR_CC_1) /*!< Maximum Voltage = 2.86V */ |
| bogdanm | 0:9b334a45a8ff | 395 | #define LCD_CONTRASTLEVEL_3 (LCD_FCR_CC_1 | LCD_FCR_CC_0) /*!< Maximum Voltage = 2.99V */ |
| bogdanm | 0:9b334a45a8ff | 396 | #define LCD_CONTRASTLEVEL_4 (LCD_FCR_CC_2) /*!< Maximum Voltage = 3.12V */ |
| bogdanm | 0:9b334a45a8ff | 397 | #define LCD_CONTRASTLEVEL_5 (LCD_FCR_CC_2 | LCD_FCR_CC_0) /*!< Maximum Voltage = 3.25V */ |
| bogdanm | 0:9b334a45a8ff | 398 | #define LCD_CONTRASTLEVEL_6 (LCD_FCR_CC_2 | LCD_FCR_CC_1) /*!< Maximum Voltage = 3.38V */ |
| bogdanm | 0:9b334a45a8ff | 399 | #define LCD_CONTRASTLEVEL_7 (LCD_FCR_CC) /*!< Maximum Voltage = 3.51V */ |
| bogdanm | 0:9b334a45a8ff | 400 | |
| bogdanm | 0:9b334a45a8ff | 401 | #define IS_LCD_CONTRAST(__CONTRAST__) (((__CONTRAST__) == LCD_CONTRASTLEVEL_0) || \ |
| bogdanm | 0:9b334a45a8ff | 402 | ((__CONTRAST__) == LCD_CONTRASTLEVEL_1) || \ |
| bogdanm | 0:9b334a45a8ff | 403 | ((__CONTRAST__) == LCD_CONTRASTLEVEL_2) || \ |
| bogdanm | 0:9b334a45a8ff | 404 | ((__CONTRAST__) == LCD_CONTRASTLEVEL_3) || \ |
| bogdanm | 0:9b334a45a8ff | 405 | ((__CONTRAST__) == LCD_CONTRASTLEVEL_4) || \ |
| bogdanm | 0:9b334a45a8ff | 406 | ((__CONTRAST__) == LCD_CONTRASTLEVEL_5) || \ |
| bogdanm | 0:9b334a45a8ff | 407 | ((__CONTRAST__) == LCD_CONTRASTLEVEL_6) || \ |
| bogdanm | 0:9b334a45a8ff | 408 | ((__CONTRAST__) == LCD_CONTRASTLEVEL_7)) |
| bogdanm | 0:9b334a45a8ff | 409 | /** |
| bogdanm | 0:9b334a45a8ff | 410 | * @} |
| bogdanm | 0:9b334a45a8ff | 411 | */ |
| bogdanm | 0:9b334a45a8ff | 412 | |
| bogdanm | 0:9b334a45a8ff | 413 | /** @defgroup LCD_MuxSegment LCD Mux Segment |
| bogdanm | 0:9b334a45a8ff | 414 | * @{ |
| bogdanm | 0:9b334a45a8ff | 415 | */ |
| bogdanm | 0:9b334a45a8ff | 416 | |
| bogdanm | 0:9b334a45a8ff | 417 | #define LCD_MUXSEGMENT_DISABLE ((uint32_t)0x00000000) /*!< SEG pin multiplexing disabled */ |
| bogdanm | 0:9b334a45a8ff | 418 | #define LCD_MUXSEGMENT_ENABLE (LCD_CR_MUX_SEG) /*!< SEG[31:28] are multiplexed with SEG[43:40] */ |
| bogdanm | 0:9b334a45a8ff | 419 | |
| bogdanm | 0:9b334a45a8ff | 420 | #define IS_LCD_MUXSEGMENT(__VALUE__) (((__VALUE__) == LCD_MUXSEGMENT_ENABLE) || \ |
| bogdanm | 0:9b334a45a8ff | 421 | ((__VALUE__) == LCD_MUXSEGMENT_DISABLE)) |
| bogdanm | 0:9b334a45a8ff | 422 | /** |
| bogdanm | 0:9b334a45a8ff | 423 | * @} |
| bogdanm | 0:9b334a45a8ff | 424 | */ |
| bogdanm | 0:9b334a45a8ff | 425 | |
| bogdanm | 0:9b334a45a8ff | 426 | /** @defgroup LCD_Flag LCD Flag |
| bogdanm | 0:9b334a45a8ff | 427 | * @{ |
| bogdanm | 0:9b334a45a8ff | 428 | */ |
| bogdanm | 0:9b334a45a8ff | 429 | |
| bogdanm | 0:9b334a45a8ff | 430 | #define LCD_FLAG_ENS LCD_SR_ENS |
| bogdanm | 0:9b334a45a8ff | 431 | #define LCD_FLAG_SOF LCD_SR_SOF |
| bogdanm | 0:9b334a45a8ff | 432 | #define LCD_FLAG_UDR LCD_SR_UDR |
| bogdanm | 0:9b334a45a8ff | 433 | #define LCD_FLAG_UDD LCD_SR_UDD |
| bogdanm | 0:9b334a45a8ff | 434 | #define LCD_FLAG_RDY LCD_SR_RDY |
| bogdanm | 0:9b334a45a8ff | 435 | #define LCD_FLAG_FCRSF LCD_SR_FCRSR |
| bogdanm | 0:9b334a45a8ff | 436 | |
| bogdanm | 0:9b334a45a8ff | 437 | /** |
| bogdanm | 0:9b334a45a8ff | 438 | * @} |
| bogdanm | 0:9b334a45a8ff | 439 | */ |
| bogdanm | 0:9b334a45a8ff | 440 | |
| bogdanm | 0:9b334a45a8ff | 441 | /** @defgroup LCD_RAMRegister LCD RAMRegister |
| bogdanm | 0:9b334a45a8ff | 442 | * @{ |
| bogdanm | 0:9b334a45a8ff | 443 | */ |
| bogdanm | 0:9b334a45a8ff | 444 | |
| bogdanm | 0:9b334a45a8ff | 445 | #define LCD_RAM_REGISTER0 ((uint32_t)0x00000000) /*!< LCD RAM Register 0 */ |
| bogdanm | 0:9b334a45a8ff | 446 | #define LCD_RAM_REGISTER1 ((uint32_t)0x00000001) /*!< LCD RAM Register 1 */ |
| bogdanm | 0:9b334a45a8ff | 447 | #define LCD_RAM_REGISTER2 ((uint32_t)0x00000002) /*!< LCD RAM Register 2 */ |
| bogdanm | 0:9b334a45a8ff | 448 | #define LCD_RAM_REGISTER3 ((uint32_t)0x00000003) /*!< LCD RAM Register 3 */ |
| bogdanm | 0:9b334a45a8ff | 449 | #define LCD_RAM_REGISTER4 ((uint32_t)0x00000004) /*!< LCD RAM Register 4 */ |
| bogdanm | 0:9b334a45a8ff | 450 | #define LCD_RAM_REGISTER5 ((uint32_t)0x00000005) /*!< LCD RAM Register 5 */ |
| bogdanm | 0:9b334a45a8ff | 451 | #define LCD_RAM_REGISTER6 ((uint32_t)0x00000006) /*!< LCD RAM Register 6 */ |
| bogdanm | 0:9b334a45a8ff | 452 | #define LCD_RAM_REGISTER7 ((uint32_t)0x00000007) /*!< LCD RAM Register 7 */ |
| bogdanm | 0:9b334a45a8ff | 453 | #define LCD_RAM_REGISTER8 ((uint32_t)0x00000008) /*!< LCD RAM Register 8 */ |
| bogdanm | 0:9b334a45a8ff | 454 | #define LCD_RAM_REGISTER9 ((uint32_t)0x00000009) /*!< LCD RAM Register 9 */ |
| bogdanm | 0:9b334a45a8ff | 455 | #define LCD_RAM_REGISTER10 ((uint32_t)0x0000000A) /*!< LCD RAM Register 10 */ |
| bogdanm | 0:9b334a45a8ff | 456 | #define LCD_RAM_REGISTER11 ((uint32_t)0x0000000B) /*!< LCD RAM Register 11 */ |
| bogdanm | 0:9b334a45a8ff | 457 | #define LCD_RAM_REGISTER12 ((uint32_t)0x0000000C) /*!< LCD RAM Register 12 */ |
| bogdanm | 0:9b334a45a8ff | 458 | #define LCD_RAM_REGISTER13 ((uint32_t)0x0000000D) /*!< LCD RAM Register 13 */ |
| bogdanm | 0:9b334a45a8ff | 459 | #define LCD_RAM_REGISTER14 ((uint32_t)0x0000000E) /*!< LCD RAM Register 14 */ |
| bogdanm | 0:9b334a45a8ff | 460 | #define LCD_RAM_REGISTER15 ((uint32_t)0x0000000F) /*!< LCD RAM Register 15 */ |
| bogdanm | 0:9b334a45a8ff | 461 | |
| bogdanm | 0:9b334a45a8ff | 462 | #define IS_LCD_RAM_REGISTER(__REGISTER__) (((__REGISTER__) == LCD_RAM_REGISTER0) || \ |
| bogdanm | 0:9b334a45a8ff | 463 | ((__REGISTER__) == LCD_RAM_REGISTER1) || \ |
| bogdanm | 0:9b334a45a8ff | 464 | ((__REGISTER__) == LCD_RAM_REGISTER2) || \ |
| bogdanm | 0:9b334a45a8ff | 465 | ((__REGISTER__) == LCD_RAM_REGISTER3) || \ |
| bogdanm | 0:9b334a45a8ff | 466 | ((__REGISTER__) == LCD_RAM_REGISTER4) || \ |
| bogdanm | 0:9b334a45a8ff | 467 | ((__REGISTER__) == LCD_RAM_REGISTER5) || \ |
| bogdanm | 0:9b334a45a8ff | 468 | ((__REGISTER__) == LCD_RAM_REGISTER6) || \ |
| bogdanm | 0:9b334a45a8ff | 469 | ((__REGISTER__) == LCD_RAM_REGISTER7) || \ |
| bogdanm | 0:9b334a45a8ff | 470 | ((__REGISTER__) == LCD_RAM_REGISTER8) || \ |
| bogdanm | 0:9b334a45a8ff | 471 | ((__REGISTER__) == LCD_RAM_REGISTER9) || \ |
| bogdanm | 0:9b334a45a8ff | 472 | ((__REGISTER__) == LCD_RAM_REGISTER10) || \ |
| bogdanm | 0:9b334a45a8ff | 473 | ((__REGISTER__) == LCD_RAM_REGISTER11) || \ |
| bogdanm | 0:9b334a45a8ff | 474 | ((__REGISTER__) == LCD_RAM_REGISTER12) || \ |
| bogdanm | 0:9b334a45a8ff | 475 | ((__REGISTER__) == LCD_RAM_REGISTER13) || \ |
| bogdanm | 0:9b334a45a8ff | 476 | ((__REGISTER__) == LCD_RAM_REGISTER14) || \ |
| bogdanm | 0:9b334a45a8ff | 477 | ((__REGISTER__) == LCD_RAM_REGISTER15)) |
| bogdanm | 0:9b334a45a8ff | 478 | |
| bogdanm | 0:9b334a45a8ff | 479 | /** |
| bogdanm | 0:9b334a45a8ff | 480 | * @} |
| bogdanm | 0:9b334a45a8ff | 481 | */ |
| bogdanm | 0:9b334a45a8ff | 482 | |
| bogdanm | 0:9b334a45a8ff | 483 | /** |
| bogdanm | 0:9b334a45a8ff | 484 | * @} |
| bogdanm | 0:9b334a45a8ff | 485 | */ |
| bogdanm | 0:9b334a45a8ff | 486 | |
| bogdanm | 0:9b334a45a8ff | 487 | /* Exported macro ------------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 488 | |
| bogdanm | 0:9b334a45a8ff | 489 | /** @defgroup LCD_Exported_Macros LCD Exported Macros |
| bogdanm | 0:9b334a45a8ff | 490 | * @{ |
| bogdanm | 0:9b334a45a8ff | 491 | */ |
| bogdanm | 0:9b334a45a8ff | 492 | |
| bogdanm | 0:9b334a45a8ff | 493 | /** @brief Reset LCD handle state |
| bogdanm | 0:9b334a45a8ff | 494 | * @param __HANDLE__: specifies the LCD Handle. |
| bogdanm | 0:9b334a45a8ff | 495 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 496 | */ |
| bogdanm | 0:9b334a45a8ff | 497 | #define __HAL_LCD_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_LCD_STATE_RESET) |
| bogdanm | 0:9b334a45a8ff | 498 | |
| bogdanm | 0:9b334a45a8ff | 499 | /** @brief macros to enables or disables the LCD |
| bogdanm | 0:9b334a45a8ff | 500 | * @param __HANDLE__: specifies the LCD Handle. |
| bogdanm | 0:9b334a45a8ff | 501 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 502 | */ |
| bogdanm | 0:9b334a45a8ff | 503 | #define __HAL_LCD_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR, LCD_CR_LCDEN)) |
| bogdanm | 0:9b334a45a8ff | 504 | #define __HAL_LCD_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->CR, LCD_CR_LCDEN)) |
| bogdanm | 0:9b334a45a8ff | 505 | |
| bogdanm | 0:9b334a45a8ff | 506 | /** @brief Macros to enable or disable the low resistance divider. Displays with high |
| bogdanm | 0:9b334a45a8ff | 507 | * internal resistance may need a longer drive time to achieve |
| bogdanm | 0:9b334a45a8ff | 508 | * satisfactory contrast. This function is useful in this case if some |
| bogdanm | 0:9b334a45a8ff | 509 | * additional power consumption can be tolerated. |
| bogdanm | 0:9b334a45a8ff | 510 | * @param __HANDLE__: specifies the LCD Handle. |
| bogdanm | 0:9b334a45a8ff | 511 | * @note When this mode is enabled, the PulseOn Duration (PON) have to be |
| bogdanm | 0:9b334a45a8ff | 512 | * programmed to 1/CK_PS (LCD_PULSEONDURATION_1). |
| bogdanm | 0:9b334a45a8ff | 513 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 514 | */ |
| bogdanm | 0:9b334a45a8ff | 515 | #define __HAL_LCD_HIGHDRIVER_ENABLE(__HANDLE__) \ |
| bogdanm | 0:9b334a45a8ff | 516 | do{ \ |
| bogdanm | 0:9b334a45a8ff | 517 | SET_BIT((__HANDLE__)->Instance->FCR, LCD_FCR_HD); \ |
| bogdanm | 0:9b334a45a8ff | 518 | LCD_WaitForSynchro(__HANDLE__); \ |
| bogdanm | 0:9b334a45a8ff | 519 | }while(0) |
| bogdanm | 0:9b334a45a8ff | 520 | |
| bogdanm | 0:9b334a45a8ff | 521 | #define __HAL_LCD_HIGHDRIVER_DISABLE(__HANDLE__) \ |
| bogdanm | 0:9b334a45a8ff | 522 | do{ \ |
| bogdanm | 0:9b334a45a8ff | 523 | CLEAR_BIT((__HANDLE__)->Instance->FCR, LCD_FCR_HD); \ |
| bogdanm | 0:9b334a45a8ff | 524 | LCD_WaitForSynchro(__HANDLE__); \ |
| bogdanm | 0:9b334a45a8ff | 525 | }while(0) |
| bogdanm | 0:9b334a45a8ff | 526 | |
| bogdanm | 0:9b334a45a8ff | 527 | /** |
| bogdanm | 0:9b334a45a8ff | 528 | * @brief Macro to configure the LCD pulses on duration. |
| bogdanm | 0:9b334a45a8ff | 529 | * @param __HANDLE__: specifies the LCD Handle. |
| bogdanm | 0:9b334a45a8ff | 530 | * @param __DURATION__: specifies the LCD pulse on duration in terms of |
| bogdanm | 0:9b334a45a8ff | 531 | * CK_PS (prescaled LCD clock period) pulses. |
| bogdanm | 0:9b334a45a8ff | 532 | * This parameter can be one of the following values: |
| bogdanm | 0:9b334a45a8ff | 533 | * @arg LCD_PULSEONDURATION_0: 0 pulse |
| bogdanm | 0:9b334a45a8ff | 534 | * @arg LCD_PULSEONDURATION_1: Pulse ON duration = 1/CK_PS |
| bogdanm | 0:9b334a45a8ff | 535 | * @arg LCD_PULSEONDURATION_2: Pulse ON duration = 2/CK_PS |
| bogdanm | 0:9b334a45a8ff | 536 | * @arg LCD_PULSEONDURATION_3: Pulse ON duration = 3/CK_PS |
| bogdanm | 0:9b334a45a8ff | 537 | * @arg LCD_PULSEONDURATION_4: Pulse ON duration = 4/CK_PS |
| bogdanm | 0:9b334a45a8ff | 538 | * @arg LCD_PULSEONDURATION_5: Pulse ON duration = 5/CK_PS |
| bogdanm | 0:9b334a45a8ff | 539 | * @arg LCD_PULSEONDURATION_6: Pulse ON duration = 6/CK_PS |
| bogdanm | 0:9b334a45a8ff | 540 | * @arg LCD_PULSEONDURATION_7: Pulse ON duration = 7/CK_PS |
| bogdanm | 0:9b334a45a8ff | 541 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 542 | */ |
| bogdanm | 0:9b334a45a8ff | 543 | #define __HAL_LCD_PULSEONDURATION_CONFIG(__HANDLE__, __DURATION__) \ |
| bogdanm | 0:9b334a45a8ff | 544 | do{ \ |
| bogdanm | 0:9b334a45a8ff | 545 | MODIFY_REG((__HANDLE__)->Instance->FCR, LCD_FCR_PON, (__DURATION__)); \ |
| bogdanm | 0:9b334a45a8ff | 546 | LCD_WaitForSynchro(__HANDLE__); \ |
| bogdanm | 0:9b334a45a8ff | 547 | }while(0) |
| bogdanm | 0:9b334a45a8ff | 548 | |
| bogdanm | 0:9b334a45a8ff | 549 | /** |
| bogdanm | 0:9b334a45a8ff | 550 | * @brief Macro to configure the LCD dead time. |
| bogdanm | 0:9b334a45a8ff | 551 | * @param __HANDLE__: specifies the LCD Handle. |
| bogdanm | 0:9b334a45a8ff | 552 | * @param __DEADTIME__: specifies the LCD dead time. |
| bogdanm | 0:9b334a45a8ff | 553 | * This parameter can be one of the following values: |
| bogdanm | 0:9b334a45a8ff | 554 | * @arg LCD_DEADTIME_0: No dead Time |
| bogdanm | 0:9b334a45a8ff | 555 | * @arg LCD_DEADTIME_1: One Phase between different couple of Frame |
| bogdanm | 0:9b334a45a8ff | 556 | * @arg LCD_DEADTIME_2: Two Phase between different couple of Frame |
| bogdanm | 0:9b334a45a8ff | 557 | * @arg LCD_DEADTIME_3: Three Phase between different couple of Frame |
| bogdanm | 0:9b334a45a8ff | 558 | * @arg LCD_DEADTIME_4: Four Phase between different couple of Frame |
| bogdanm | 0:9b334a45a8ff | 559 | * @arg LCD_DEADTIME_5: Five Phase between different couple of Frame |
| bogdanm | 0:9b334a45a8ff | 560 | * @arg LCD_DEADTIME_6: Six Phase between different couple of Frame |
| bogdanm | 0:9b334a45a8ff | 561 | * @arg LCD_DEADTIME_7: Seven Phase between different couple of Frame |
| bogdanm | 0:9b334a45a8ff | 562 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 563 | */ |
| bogdanm | 0:9b334a45a8ff | 564 | #define __HAL_LCD_DEADTIME_CONFIG(__HANDLE__, __DEADTIME__) \ |
| bogdanm | 0:9b334a45a8ff | 565 | do{ \ |
| bogdanm | 0:9b334a45a8ff | 566 | MODIFY_REG((__HANDLE__)->Instance->FCR, LCD_FCR_DEAD, (__DEADTIME__)); \ |
| bogdanm | 0:9b334a45a8ff | 567 | LCD_WaitForSynchro(__HANDLE__); \ |
| bogdanm | 0:9b334a45a8ff | 568 | }while(0) |
| bogdanm | 0:9b334a45a8ff | 569 | |
| bogdanm | 0:9b334a45a8ff | 570 | /** |
| bogdanm | 0:9b334a45a8ff | 571 | * @brief Macro to configure the LCD Contrast. |
| bogdanm | 0:9b334a45a8ff | 572 | * @param __HANDLE__: specifies the LCD Handle. |
| bogdanm | 0:9b334a45a8ff | 573 | * @param __CONTRAST__: specifies the LCD Contrast. |
| bogdanm | 0:9b334a45a8ff | 574 | * This parameter can be one of the following values: |
| bogdanm | 0:9b334a45a8ff | 575 | * @arg LCD_CONTRASTLEVEL_0: Maximum Voltage = 2.60V |
| bogdanm | 0:9b334a45a8ff | 576 | * @arg LCD_CONTRASTLEVEL_1: Maximum Voltage = 2.73V |
| bogdanm | 0:9b334a45a8ff | 577 | * @arg LCD_CONTRASTLEVEL_2: Maximum Voltage = 2.86V |
| bogdanm | 0:9b334a45a8ff | 578 | * @arg LCD_CONTRASTLEVEL_3: Maximum Voltage = 2.99V |
| bogdanm | 0:9b334a45a8ff | 579 | * @arg LCD_CONTRASTLEVEL_4: Maximum Voltage = 3.12V |
| bogdanm | 0:9b334a45a8ff | 580 | * @arg LCD_CONTRASTLEVEL_5: Maximum Voltage = 3.25V |
| bogdanm | 0:9b334a45a8ff | 581 | * @arg LCD_CONTRASTLEVEL_6: Maximum Voltage = 3.38V |
| bogdanm | 0:9b334a45a8ff | 582 | * @arg LCD_CONTRASTLEVEL_7: Maximum Voltage = 3.51V |
| bogdanm | 0:9b334a45a8ff | 583 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 584 | */ |
| bogdanm | 0:9b334a45a8ff | 585 | #define __HAL_LCD_CONTRAST_CONFIG(__HANDLE__, __CONTRAST__) \ |
| bogdanm | 0:9b334a45a8ff | 586 | do{ \ |
| bogdanm | 0:9b334a45a8ff | 587 | MODIFY_REG((__HANDLE__)->Instance->FCR, LCD_FCR_CC, (__CONTRAST__)); \ |
| bogdanm | 0:9b334a45a8ff | 588 | LCD_WaitForSynchro(__HANDLE__); \ |
| bogdanm | 0:9b334a45a8ff | 589 | } while(0) |
| bogdanm | 0:9b334a45a8ff | 590 | |
| bogdanm | 0:9b334a45a8ff | 591 | /** |
| bogdanm | 0:9b334a45a8ff | 592 | * @brief Macro to configure the LCD Blink mode and Blink frequency. |
| bogdanm | 0:9b334a45a8ff | 593 | * @param __HANDLE__: specifies the LCD Handle. |
| bogdanm | 0:9b334a45a8ff | 594 | * @param __BLINKMODE__: specifies the LCD blink mode. |
| bogdanm | 0:9b334a45a8ff | 595 | * This parameter can be one of the following values: |
| bogdanm | 0:9b334a45a8ff | 596 | * @arg LCD_BLINKMODE_OFF: Blink disabled |
| bogdanm | 0:9b334a45a8ff | 597 | * @arg LCD_BLINKMODE_SEG0_COM0: Blink enabled on SEG[0], COM[0] (1 pixel) |
| bogdanm | 0:9b334a45a8ff | 598 | * @arg LCD_BLINKMODE_SEG0_ALLCOM: Blink enabled on SEG[0], all COM (up to 8 |
| bogdanm | 0:9b334a45a8ff | 599 | * pixels according to the programmed duty) |
| bogdanm | 0:9b334a45a8ff | 600 | * @arg LCD_BLINKMODE_ALLSEG_ALLCOM: Blink enabled on all SEG and all COM |
| bogdanm | 0:9b334a45a8ff | 601 | * (all pixels) |
| bogdanm | 0:9b334a45a8ff | 602 | * @param __BLINKFREQUENCY__: specifies the LCD blink frequency. |
| bogdanm | 0:9b334a45a8ff | 603 | * @arg LCD_BLINKFREQUENCY_DIV8: The Blink frequency = fLcd/8 |
| bogdanm | 0:9b334a45a8ff | 604 | * @arg LCD_BLINKFREQUENCY_DIV16: The Blink frequency = fLcd/16 |
| bogdanm | 0:9b334a45a8ff | 605 | * @arg LCD_BLINKFREQUENCY_DIV32: The Blink frequency = fLcd/32 |
| bogdanm | 0:9b334a45a8ff | 606 | * @arg LCD_BLINKFREQUENCY_DIV64: The Blink frequency = fLcd/64 |
| bogdanm | 0:9b334a45a8ff | 607 | * @arg LCD_BLINKFREQUENCY_DIV128: The Blink frequency = fLcd/128 |
| bogdanm | 0:9b334a45a8ff | 608 | * @arg LCD_BLINKFREQUENCY_DIV256: The Blink frequency = fLcd/256 |
| bogdanm | 0:9b334a45a8ff | 609 | * @arg LCD_BLINKFREQUENCY_DIV512: The Blink frequency = fLcd/512 |
| bogdanm | 0:9b334a45a8ff | 610 | * @arg LCD_BLINKFREQUENCY_DIV1024: The Blink frequency = fLcd/1024 |
| bogdanm | 0:9b334a45a8ff | 611 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 612 | */ |
| bogdanm | 0:9b334a45a8ff | 613 | #define __HAL_LCD_BLINK_CONFIG(__HANDLE__, __BLINKMODE__, __BLINKFREQUENCY__) \ |
| bogdanm | 0:9b334a45a8ff | 614 | do{ \ |
| bogdanm | 0:9b334a45a8ff | 615 | MODIFY_REG((__HANDLE__)->Instance->FCR, (LCD_FCR_BLINKF | LCD_FCR_BLINK), ((__BLINKMODE__) | (__BLINKFREQUENCY__))); \ |
| bogdanm | 0:9b334a45a8ff | 616 | LCD_WaitForSynchro(__HANDLE__); \ |
| bogdanm | 0:9b334a45a8ff | 617 | }while(0) |
| bogdanm | 0:9b334a45a8ff | 618 | |
| bogdanm | 0:9b334a45a8ff | 619 | /** @brief Enables or disables the specified LCD interrupt. |
| bogdanm | 0:9b334a45a8ff | 620 | * @param __HANDLE__: specifies the LCD Handle. |
| bogdanm | 0:9b334a45a8ff | 621 | * @param __INTERRUPT__: specifies the LCD interrupt source to be enabled or disabled. |
| bogdanm | 0:9b334a45a8ff | 622 | * This parameter can be one of the following values: |
| bogdanm | 0:9b334a45a8ff | 623 | * @arg LCD_IT_SOF: Start of Frame Interrupt |
| bogdanm | 0:9b334a45a8ff | 624 | * @arg LCD_IT_UDD: Update Display Done Interrupt |
| bogdanm | 0:9b334a45a8ff | 625 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 626 | */ |
| bogdanm | 0:9b334a45a8ff | 627 | #define __HAL_LCD_ENABLE_IT(__HANDLE__, __INTERRUPT__) \ |
| bogdanm | 0:9b334a45a8ff | 628 | do{ \ |
| bogdanm | 0:9b334a45a8ff | 629 | SET_BIT((__HANDLE__)->Instance->FCR, (__INTERRUPT__)); \ |
| bogdanm | 0:9b334a45a8ff | 630 | LCD_WaitForSynchro(__HANDLE__); \ |
| bogdanm | 0:9b334a45a8ff | 631 | }while(0) |
| bogdanm | 0:9b334a45a8ff | 632 | #define __HAL_LCD_DISABLE_IT(__HANDLE__, __INTERRUPT__) \ |
| bogdanm | 0:9b334a45a8ff | 633 | do{ \ |
| bogdanm | 0:9b334a45a8ff | 634 | CLEAR_BIT((__HANDLE__)->Instance->FCR, (__INTERRUPT__)); \ |
| bogdanm | 0:9b334a45a8ff | 635 | LCD_WaitForSynchro(__HANDLE__); \ |
| bogdanm | 0:9b334a45a8ff | 636 | }while(0) |
| bogdanm | 0:9b334a45a8ff | 637 | |
| bogdanm | 0:9b334a45a8ff | 638 | /** @brief Checks whether the specified LCD interrupt is enabled or not. |
| bogdanm | 0:9b334a45a8ff | 639 | * @param __HANDLE__: specifies the LCD Handle. |
| bogdanm | 0:9b334a45a8ff | 640 | * @param __IT__: specifies the LCD interrupt source to check. |
| bogdanm | 0:9b334a45a8ff | 641 | * This parameter can be one of the following values: |
| bogdanm | 0:9b334a45a8ff | 642 | * @arg LCD_IT_SOF: Start of Frame Interrupt |
| bogdanm | 0:9b334a45a8ff | 643 | * @arg LCD_IT_UDD: Update Display Done Interrupt. |
| bogdanm | 0:9b334a45a8ff | 644 | * @note If the device is in STOP mode (PCLK not provided) UDD will not |
| bogdanm | 0:9b334a45a8ff | 645 | * generate an interrupt even if UDDIE = 1. |
| bogdanm | 0:9b334a45a8ff | 646 | * If the display is not enabled the UDD interrupt will never occur. |
| bogdanm | 0:9b334a45a8ff | 647 | * @retval The state of __IT__ (TRUE or FALSE). |
| bogdanm | 0:9b334a45a8ff | 648 | */ |
| bogdanm | 0:9b334a45a8ff | 649 | #define __HAL_LCD_GET_IT_SOURCE(__HANDLE__, __IT__) (((__HANDLE__)->Instance->FCR) & (__IT__)) |
| bogdanm | 0:9b334a45a8ff | 650 | |
| bogdanm | 0:9b334a45a8ff | 651 | /** @brief Checks whether the specified LCD flag is set or not. |
| bogdanm | 0:9b334a45a8ff | 652 | * @param __HANDLE__: specifies the LCD Handle. |
| bogdanm | 0:9b334a45a8ff | 653 | * @param __FLAG__: specifies the flag to check. |
| bogdanm | 0:9b334a45a8ff | 654 | * This parameter can be one of the following values: |
| bogdanm | 0:9b334a45a8ff | 655 | * @arg LCD_FLAG_ENS: LCD Enabled flag. It indicates the LCD controller status. |
| bogdanm | 0:9b334a45a8ff | 656 | * @note The ENS bit is set immediately when the LCDEN bit in the LCD_CR |
| bogdanm | 0:9b334a45a8ff | 657 | * goes from 0 to 1. On deactivation it reflects the real status of |
| bogdanm | 0:9b334a45a8ff | 658 | * LCD so it becomes 0 at the end of the last displayed frame. |
| bogdanm | 0:9b334a45a8ff | 659 | * @arg LCD_FLAG_SOF: Start of Frame flag. This flag is set by hardware at |
| bogdanm | 0:9b334a45a8ff | 660 | * the beginning of a new frame, at the same time as the display data is |
| bogdanm | 0:9b334a45a8ff | 661 | * updated. |
| bogdanm | 0:9b334a45a8ff | 662 | * @arg LCD_FLAG_UDR: Update Display Request flag. |
| bogdanm | 0:9b334a45a8ff | 663 | * @arg LCD_FLAG_UDD: Update Display Done flag. |
| bogdanm | 0:9b334a45a8ff | 664 | * @arg LCD_FLAG_RDY: Step_up converter Ready flag. It indicates the status |
| bogdanm | 0:9b334a45a8ff | 665 | * of the step-up converter. |
| bogdanm | 0:9b334a45a8ff | 666 | * @arg LCD_FLAG_FCRSF: LCD Frame Control Register Synchronization Flag. |
| bogdanm | 0:9b334a45a8ff | 667 | * This flag is set by hardware each time the LCD_FCR register is updated |
| bogdanm | 0:9b334a45a8ff | 668 | * in the LCDCLK domain. |
| bogdanm | 0:9b334a45a8ff | 669 | * @retval The new state of __FLAG__ (TRUE or FALSE). |
| bogdanm | 0:9b334a45a8ff | 670 | */ |
| bogdanm | 0:9b334a45a8ff | 671 | #define __HAL_LCD_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__)) |
| bogdanm | 0:9b334a45a8ff | 672 | |
| bogdanm | 0:9b334a45a8ff | 673 | /** @brief Clears the specified LCD pending flag. |
| bogdanm | 0:9b334a45a8ff | 674 | * @param __HANDLE__: specifies the LCD Handle. |
| bogdanm | 0:9b334a45a8ff | 675 | * @param __FLAG__: specifies the flag to clear. |
| bogdanm | 0:9b334a45a8ff | 676 | * This parameter can be any combination of the following values: |
| bogdanm | 0:9b334a45a8ff | 677 | * @arg LCD_FLAG_SOF: Start of Frame Interrupt |
| bogdanm | 0:9b334a45a8ff | 678 | * @arg LCD_FLAG_UDD: Update Display Done Interrupt |
| bogdanm | 0:9b334a45a8ff | 679 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 680 | */ |
| bogdanm | 0:9b334a45a8ff | 681 | #define __HAL_LCD_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->CLR = (__FLAG__)) |
| bogdanm | 0:9b334a45a8ff | 682 | |
| bogdanm | 0:9b334a45a8ff | 683 | /** |
| bogdanm | 0:9b334a45a8ff | 684 | * @} |
| bogdanm | 0:9b334a45a8ff | 685 | */ |
| bogdanm | 0:9b334a45a8ff | 686 | |
| bogdanm | 0:9b334a45a8ff | 687 | /* Exported functions ------------------------------------------------------- */ |
| bogdanm | 0:9b334a45a8ff | 688 | |
| bogdanm | 0:9b334a45a8ff | 689 | /** @addtogroup LCD_Exported_Functions |
| bogdanm | 0:9b334a45a8ff | 690 | * @{ |
| bogdanm | 0:9b334a45a8ff | 691 | */ |
| bogdanm | 0:9b334a45a8ff | 692 | |
| bogdanm | 0:9b334a45a8ff | 693 | /** @addtogroup LCD_Exported_Functions_Group1 |
| bogdanm | 0:9b334a45a8ff | 694 | * @{ |
| bogdanm | 0:9b334a45a8ff | 695 | */ |
| bogdanm | 0:9b334a45a8ff | 696 | |
| bogdanm | 0:9b334a45a8ff | 697 | /* Initialization/de-initialization methods **********************************/ |
| bogdanm | 0:9b334a45a8ff | 698 | HAL_StatusTypeDef HAL_LCD_DeInit(LCD_HandleTypeDef *hlcd); |
| bogdanm | 0:9b334a45a8ff | 699 | HAL_StatusTypeDef HAL_LCD_Init(LCD_HandleTypeDef *hlcd); |
| bogdanm | 0:9b334a45a8ff | 700 | void HAL_LCD_MspInit(LCD_HandleTypeDef *hlcd); |
| bogdanm | 0:9b334a45a8ff | 701 | void HAL_LCD_MspDeInit(LCD_HandleTypeDef *hlcd); |
| bogdanm | 0:9b334a45a8ff | 702 | |
| bogdanm | 0:9b334a45a8ff | 703 | /** |
| bogdanm | 0:9b334a45a8ff | 704 | * @} |
| bogdanm | 0:9b334a45a8ff | 705 | */ |
| bogdanm | 0:9b334a45a8ff | 706 | |
| bogdanm | 0:9b334a45a8ff | 707 | /** @addtogroup LCD_Exported_Functions_Group2 |
| bogdanm | 0:9b334a45a8ff | 708 | * @{ |
| bogdanm | 0:9b334a45a8ff | 709 | */ |
| bogdanm | 0:9b334a45a8ff | 710 | |
| bogdanm | 0:9b334a45a8ff | 711 | /* IO operation methods *******************************************************/ |
| bogdanm | 0:9b334a45a8ff | 712 | HAL_StatusTypeDef HAL_LCD_Write(LCD_HandleTypeDef *hlcd, uint32_t RAMRegisterIndex, uint32_t RAMRegisterMask, uint32_t Data); |
| bogdanm | 0:9b334a45a8ff | 713 | HAL_StatusTypeDef HAL_LCD_Clear(LCD_HandleTypeDef *hlcd); |
| bogdanm | 0:9b334a45a8ff | 714 | HAL_StatusTypeDef HAL_LCD_UpdateDisplayRequest(LCD_HandleTypeDef *hlcd); |
| bogdanm | 0:9b334a45a8ff | 715 | |
| bogdanm | 0:9b334a45a8ff | 716 | /** |
| bogdanm | 0:9b334a45a8ff | 717 | * @} |
| bogdanm | 0:9b334a45a8ff | 718 | */ |
| bogdanm | 0:9b334a45a8ff | 719 | |
| bogdanm | 0:9b334a45a8ff | 720 | /** @addtogroup LCD_Exported_Functions_Group3 |
| bogdanm | 0:9b334a45a8ff | 721 | * @{ |
| bogdanm | 0:9b334a45a8ff | 722 | */ |
| bogdanm | 0:9b334a45a8ff | 723 | |
| bogdanm | 0:9b334a45a8ff | 724 | /* Peripheral State methods **************************************************/ |
| bogdanm | 0:9b334a45a8ff | 725 | HAL_LCD_StateTypeDef HAL_LCD_GetState(LCD_HandleTypeDef *hlcd); |
| bogdanm | 0:9b334a45a8ff | 726 | uint32_t HAL_LCD_GetError(LCD_HandleTypeDef *hlcd); |
| bogdanm | 0:9b334a45a8ff | 727 | |
| bogdanm | 0:9b334a45a8ff | 728 | /** |
| bogdanm | 0:9b334a45a8ff | 729 | * @} |
| bogdanm | 0:9b334a45a8ff | 730 | */ |
| bogdanm | 0:9b334a45a8ff | 731 | |
| bogdanm | 0:9b334a45a8ff | 732 | /** |
| bogdanm | 0:9b334a45a8ff | 733 | * @} |
| bogdanm | 0:9b334a45a8ff | 734 | */ |
| bogdanm | 0:9b334a45a8ff | 735 | |
| bogdanm | 0:9b334a45a8ff | 736 | /** @addtogroup LCD_Private_Functions |
| bogdanm | 0:9b334a45a8ff | 737 | * @{ |
| bogdanm | 0:9b334a45a8ff | 738 | */ |
| bogdanm | 0:9b334a45a8ff | 739 | |
| bogdanm | 0:9b334a45a8ff | 740 | /* Private functions ---------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 741 | HAL_StatusTypeDef LCD_WaitForSynchro(LCD_HandleTypeDef *hlcd); |
| bogdanm | 0:9b334a45a8ff | 742 | |
| bogdanm | 0:9b334a45a8ff | 743 | /** |
| bogdanm | 0:9b334a45a8ff | 744 | * @} |
| bogdanm | 0:9b334a45a8ff | 745 | */ |
| bogdanm | 0:9b334a45a8ff | 746 | |
| bogdanm | 0:9b334a45a8ff | 747 | /** |
| bogdanm | 0:9b334a45a8ff | 748 | * @} |
| bogdanm | 0:9b334a45a8ff | 749 | */ |
| bogdanm | 0:9b334a45a8ff | 750 | |
| bogdanm | 0:9b334a45a8ff | 751 | #endif /* STM32L100xB || STM32L100xBA || STM32L100xC ||... || STM32L162xD || STM32L162xE */ |
| bogdanm | 0:9b334a45a8ff | 752 | |
| bogdanm | 0:9b334a45a8ff | 753 | /** |
| bogdanm | 0:9b334a45a8ff | 754 | * @} |
| bogdanm | 0:9b334a45a8ff | 755 | */ |
| bogdanm | 0:9b334a45a8ff | 756 | |
| bogdanm | 0:9b334a45a8ff | 757 | #ifdef __cplusplus |
| bogdanm | 0:9b334a45a8ff | 758 | } |
| bogdanm | 0:9b334a45a8ff | 759 | #endif |
| bogdanm | 0:9b334a45a8ff | 760 | |
| bogdanm | 0:9b334a45a8ff | 761 | #endif /* __STM32L1xx_HAL_LCD_H */ |
| bogdanm | 0:9b334a45a8ff | 762 | |
| bogdanm | 0:9b334a45a8ff | 763 | /******************* (C) COPYRIGHT 2014 STMicroelectronics *****END OF FILE****/ |