en 129 / mbed-dev

fix LPC812 PWM

Dependents:   IR_LED_Send

Fork of mbed-dev by mbed official

targets/cmsis/TARGET_STM/TARGET_STM32L1/stm32l1xx_hal_i2c.h@0:9b334a45a8ff, 2015-10-01 (annotated)

Committer:
bogdanm
Date:
Thu Oct 01 15:25:22 2015 +0300
Revision:
0:9b334a45a8ff
Initial commit on mbed-dev



Replaces mbed-src (now inactive)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /**
bogdanm 0:9b334a45a8ff 2 ******************************************************************************
bogdanm 0:9b334a45a8ff 3 * @file stm32l1xx_hal_i2c.h
bogdanm 0:9b334a45a8ff 4 * @author MCD Application Team
bogdanm 0:9b334a45a8ff 5 * @version V1.0.0
bogdanm 0:9b334a45a8ff 6 * @date 5-September-2014
bogdanm 0:9b334a45a8ff 7 * @brief Header file of I2C HAL module.
bogdanm 0:9b334a45a8ff 8 ******************************************************************************
bogdanm 0:9b334a45a8ff 9 * @attention
bogdanm 0:9b334a45a8ff 10 *
bogdanm 0:9b334a45a8ff 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
bogdanm 0:9b334a45a8ff 12 *
bogdanm 0:9b334a45a8ff 13 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 0:9b334a45a8ff 14 * are permitted provided that the following conditions are met:
bogdanm 0:9b334a45a8ff 15 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 0:9b334a45a8ff 16 * this list of conditions and the following disclaimer.
bogdanm 0:9b334a45a8ff 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 0:9b334a45a8ff 18 * this list of conditions and the following disclaimer in the documentation
bogdanm 0:9b334a45a8ff 19 * and/or other materials provided with the distribution.
bogdanm 0:9b334a45a8ff 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 0:9b334a45a8ff 21 * may be used to endorse or promote products derived from this software
bogdanm 0:9b334a45a8ff 22 * without specific prior written permission.
bogdanm 0:9b334a45a8ff 23 *
bogdanm 0:9b334a45a8ff 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 0:9b334a45a8ff 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 0:9b334a45a8ff 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 0:9b334a45a8ff 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 0:9b334a45a8ff 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 0:9b334a45a8ff 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 0:9b334a45a8ff 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 0:9b334a45a8ff 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 0:9b334a45a8ff 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 0:9b334a45a8ff 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 0:9b334a45a8ff 34 *
bogdanm 0:9b334a45a8ff 35 ******************************************************************************
bogdanm 0:9b334a45a8ff 36 */
bogdanm 0:9b334a45a8ff 37
bogdanm 0:9b334a45a8ff 38 /* Define to prevent recursive inclusion -------------------------------------*/
bogdanm 0:9b334a45a8ff 39 #ifndef __STM32L1xx_HAL_I2C_H
bogdanm 0:9b334a45a8ff 40 #define __STM32L1xx_HAL_I2C_H
bogdanm 0:9b334a45a8ff 41
bogdanm 0:9b334a45a8ff 42 #ifdef __cplusplus
bogdanm 0:9b334a45a8ff 43 extern "C" {
bogdanm 0:9b334a45a8ff 44 #endif
bogdanm 0:9b334a45a8ff 45
bogdanm 0:9b334a45a8ff 46 /* Includes ------------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 47 #include "stm32l1xx_hal_def.h"
bogdanm 0:9b334a45a8ff 48
bogdanm 0:9b334a45a8ff 49 /** @addtogroup STM32L1xx_HAL_Driver
bogdanm 0:9b334a45a8ff 50 * @{
bogdanm 0:9b334a45a8ff 51 */
bogdanm 0:9b334a45a8ff 52
bogdanm 0:9b334a45a8ff 53 /** @addtogroup I2C
bogdanm 0:9b334a45a8ff 54 * @{
bogdanm 0:9b334a45a8ff 55 */
bogdanm 0:9b334a45a8ff 56
bogdanm 0:9b334a45a8ff 57 /* Exported types ------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 58 /** @defgroup I2C_Exported_Types I2C Exported Types
bogdanm 0:9b334a45a8ff 59 * @{
bogdanm 0:9b334a45a8ff 60 */
bogdanm 0:9b334a45a8ff 61
bogdanm 0:9b334a45a8ff 62 /**
bogdanm 0:9b334a45a8ff 63 * @brief I2C Configuration Structure definition
bogdanm 0:9b334a45a8ff 64 */
bogdanm 0:9b334a45a8ff 65 typedef struct
bogdanm 0:9b334a45a8ff 66 {
bogdanm 0:9b334a45a8ff 67 uint32_t ClockSpeed; /*!< Specifies the clock frequency.
bogdanm 0:9b334a45a8ff 68 This parameter must be set to a value lower than 400kHz */
bogdanm 0:9b334a45a8ff 69
bogdanm 0:9b334a45a8ff 70 uint32_t DutyCycle; /*!< Specifies the I2C fast mode duty cycle.
bogdanm 0:9b334a45a8ff 71 This parameter can be a value of @ref I2C_duty_cycle_in_fast_mode */
bogdanm 0:9b334a45a8ff 72
bogdanm 0:9b334a45a8ff 73 uint32_t OwnAddress1; /*!< Specifies the first device own address.
bogdanm 0:9b334a45a8ff 74 This parameter can be a 7-bit or 10-bit address. */
bogdanm 0:9b334a45a8ff 75
bogdanm 0:9b334a45a8ff 76 uint32_t AddressingMode; /*!< Specifies if 7-bit or 10-bit addressing mode is selected.
bogdanm 0:9b334a45a8ff 77 This parameter can be a value of @ref I2C_addressing_mode */
bogdanm 0:9b334a45a8ff 78
bogdanm 0:9b334a45a8ff 79 uint32_t DualAddressMode; /*!< Specifies if dual addressing mode is selected.
bogdanm 0:9b334a45a8ff 80 This parameter can be a value of @ref I2C_dual_addressing_mode */
bogdanm 0:9b334a45a8ff 81
bogdanm 0:9b334a45a8ff 82 uint32_t OwnAddress2; /*!< Specifies the second device own address if dual addressing mode is selected
bogdanm 0:9b334a45a8ff 83 This parameter can be a 7-bit address. */
bogdanm 0:9b334a45a8ff 84
bogdanm 0:9b334a45a8ff 85 uint32_t GeneralCallMode; /*!< Specifies if general call mode is selected.
bogdanm 0:9b334a45a8ff 86 This parameter can be a value of @ref I2C_general_call_addressing_mode */
bogdanm 0:9b334a45a8ff 87
bogdanm 0:9b334a45a8ff 88 uint32_t NoStretchMode; /*!< Specifies if nostretch mode is selected.
bogdanm 0:9b334a45a8ff 89 This parameter can be a value of @ref I2C_nostretch_mode */
bogdanm 0:9b334a45a8ff 90
bogdanm 0:9b334a45a8ff 91 }I2C_InitTypeDef;
bogdanm 0:9b334a45a8ff 92
bogdanm 0:9b334a45a8ff 93 /**
bogdanm 0:9b334a45a8ff 94 * @brief HAL State structures definition
bogdanm 0:9b334a45a8ff 95 */
bogdanm 0:9b334a45a8ff 96 typedef enum
bogdanm 0:9b334a45a8ff 97 {
bogdanm 0:9b334a45a8ff 98 HAL_I2C_STATE_RESET = 0x00, /*!< I2C not yet initialized or disabled */
bogdanm 0:9b334a45a8ff 99 HAL_I2C_STATE_READY = 0x01, /*!< I2C initialized and ready for use */
bogdanm 0:9b334a45a8ff 100 HAL_I2C_STATE_BUSY = 0x02, /*!< I2C internal process is ongoing */
bogdanm 0:9b334a45a8ff 101 HAL_I2C_STATE_BUSY_TX = 0x12, /*!< Data Transmission process is ongoing */
bogdanm 0:9b334a45a8ff 102 HAL_I2C_STATE_BUSY_RX = 0x22, /*!< Data Reception process is ongoing */
bogdanm 0:9b334a45a8ff 103 HAL_I2C_STATE_MEM_BUSY_TX = 0x32, /*!< Memory Data Transmission process is ongoing */
bogdanm 0:9b334a45a8ff 104 HAL_I2C_STATE_MEM_BUSY_RX = 0x42, /*!< Memory Data Reception process is ongoing */
bogdanm 0:9b334a45a8ff 105 HAL_I2C_STATE_TIMEOUT = 0x03, /*!< I2C timeout state */
bogdanm 0:9b334a45a8ff 106 HAL_I2C_STATE_ERROR = 0x04 /*!< I2C error state */
bogdanm 0:9b334a45a8ff 107
bogdanm 0:9b334a45a8ff 108 }HAL_I2C_StateTypeDef;
bogdanm 0:9b334a45a8ff 109
bogdanm 0:9b334a45a8ff 110 /**
bogdanm 0:9b334a45a8ff 111 * @brief HAL I2C Error Code structure definition
bogdanm 0:9b334a45a8ff 112 */
bogdanm 0:9b334a45a8ff 113 typedef enum
bogdanm 0:9b334a45a8ff 114 {
bogdanm 0:9b334a45a8ff 115 HAL_I2C_ERROR_NONE = 0x00, /*!< No error */
bogdanm 0:9b334a45a8ff 116 HAL_I2C_ERROR_BERR = 0x01, /*!< BERR error */
bogdanm 0:9b334a45a8ff 117 HAL_I2C_ERROR_ARLO = 0x02, /*!< ARLO error */
bogdanm 0:9b334a45a8ff 118 HAL_I2C_ERROR_AF = 0x04, /*!< AF error */
bogdanm 0:9b334a45a8ff 119 HAL_I2C_ERROR_OVR = 0x08, /*!< OVR error */
bogdanm 0:9b334a45a8ff 120 HAL_I2C_ERROR_DMA = 0x10, /*!< DMA transfer error */
bogdanm 0:9b334a45a8ff 121 HAL_I2C_ERROR_TIMEOUT = 0x20 /*!< Timeout error */
bogdanm 0:9b334a45a8ff 122
bogdanm 0:9b334a45a8ff 123 }HAL_I2C_ErrorTypeDef;
bogdanm 0:9b334a45a8ff 124
bogdanm 0:9b334a45a8ff 125 /**
bogdanm 0:9b334a45a8ff 126 * @brief I2C handle Structure definition
bogdanm 0:9b334a45a8ff 127 */
bogdanm 0:9b334a45a8ff 128 typedef struct
bogdanm 0:9b334a45a8ff 129 {
bogdanm 0:9b334a45a8ff 130 I2C_TypeDef *Instance; /*!< I2C registers base address */
bogdanm 0:9b334a45a8ff 131
bogdanm 0:9b334a45a8ff 132 I2C_InitTypeDef Init; /*!< I2C communication parameters */
bogdanm 0:9b334a45a8ff 133
bogdanm 0:9b334a45a8ff 134 uint8_t *pBuffPtr; /*!< Pointer to I2C transfer buffer */
bogdanm 0:9b334a45a8ff 135
bogdanm 0:9b334a45a8ff 136 uint16_t XferSize; /*!< I2C transfer size */
bogdanm 0:9b334a45a8ff 137
bogdanm 0:9b334a45a8ff 138 __IO uint16_t XferCount; /*!< I2C transfer counter */
bogdanm 0:9b334a45a8ff 139
bogdanm 0:9b334a45a8ff 140 DMA_HandleTypeDef *hdmatx; /*!< I2C Tx DMA handle parameters */
bogdanm 0:9b334a45a8ff 141
bogdanm 0:9b334a45a8ff 142 DMA_HandleTypeDef *hdmarx; /*!< I2C Rx DMA handle parameters */
bogdanm 0:9b334a45a8ff 143
bogdanm 0:9b334a45a8ff 144 HAL_LockTypeDef Lock; /*!< I2C locking object */
bogdanm 0:9b334a45a8ff 145
bogdanm 0:9b334a45a8ff 146 __IO HAL_I2C_StateTypeDef State; /*!< I2C communication state */
bogdanm 0:9b334a45a8ff 147
bogdanm 0:9b334a45a8ff 148 __IO HAL_I2C_ErrorTypeDef ErrorCode; /* I2C Error code */
bogdanm 0:9b334a45a8ff 149
bogdanm 0:9b334a45a8ff 150 }I2C_HandleTypeDef;
bogdanm 0:9b334a45a8ff 151 /**
bogdanm 0:9b334a45a8ff 152 * @}
bogdanm 0:9b334a45a8ff 153 */
bogdanm 0:9b334a45a8ff 154
bogdanm 0:9b334a45a8ff 155
bogdanm 0:9b334a45a8ff 156 /* Exported constants --------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 157
bogdanm 0:9b334a45a8ff 158 /** @defgroup I2C_Exported_Constants I2C Exported Constants
bogdanm 0:9b334a45a8ff 159 * @{
bogdanm 0:9b334a45a8ff 160 */
bogdanm 0:9b334a45a8ff 161
bogdanm 0:9b334a45a8ff 162 /** @defgroup I2C_duty_cycle_in_fast_mode I2C_duty_cycle_in_fast_mode
bogdanm 0:9b334a45a8ff 163 * @{
bogdanm 0:9b334a45a8ff 164 */
bogdanm 0:9b334a45a8ff 165 #define I2C_DUTYCYCLE_2 ((uint32_t)0x00000000)
bogdanm 0:9b334a45a8ff 166 #define I2C_DUTYCYCLE_16_9 I2C_CCR_DUTY
bogdanm 0:9b334a45a8ff 167
bogdanm 0:9b334a45a8ff 168 #define IS_I2C_DUTY_CYCLE(CYCLE) (((CYCLE) == I2C_DUTYCYCLE_2) || \
bogdanm 0:9b334a45a8ff 169 ((CYCLE) == I2C_DUTYCYCLE_16_9))
bogdanm 0:9b334a45a8ff 170 /**
bogdanm 0:9b334a45a8ff 171 * @}
bogdanm 0:9b334a45a8ff 172 */
bogdanm 0:9b334a45a8ff 173
bogdanm 0:9b334a45a8ff 174 /** @defgroup I2C_addressing_mode I2C_addressing_mode
bogdanm 0:9b334a45a8ff 175 * @{
bogdanm 0:9b334a45a8ff 176 */
bogdanm 0:9b334a45a8ff 177 #define I2C_ADDRESSINGMODE_7BIT ((uint32_t)0x00004000)
bogdanm 0:9b334a45a8ff 178 #define I2C_ADDRESSINGMODE_10BIT (I2C_OAR1_ADDMODE | ((uint32_t)0x00004000))
bogdanm 0:9b334a45a8ff 179
bogdanm 0:9b334a45a8ff 180 #define IS_I2C_ADDRESSING_MODE(ADDRESS) (((ADDRESS) == I2C_ADDRESSINGMODE_7BIT) || \
bogdanm 0:9b334a45a8ff 181 ((ADDRESS) == I2C_ADDRESSINGMODE_10BIT))
bogdanm 0:9b334a45a8ff 182 /**
bogdanm 0:9b334a45a8ff 183 * @}
bogdanm 0:9b334a45a8ff 184 */
bogdanm 0:9b334a45a8ff 185
bogdanm 0:9b334a45a8ff 186 /** @defgroup I2C_dual_addressing_mode I2C_dual_addressing_mode
bogdanm 0:9b334a45a8ff 187 * @{
bogdanm 0:9b334a45a8ff 188 */
bogdanm 0:9b334a45a8ff 189 #define I2C_DUALADDRESS_DISABLED ((uint32_t)0x00000000)
bogdanm 0:9b334a45a8ff 190 #define I2C_DUALADDRESS_ENABLED I2C_OAR2_ENDUAL
bogdanm 0:9b334a45a8ff 191
bogdanm 0:9b334a45a8ff 192 #define IS_I2C_DUAL_ADDRESS(ADDRESS) (((ADDRESS) == I2C_DUALADDRESS_DISABLED) || \
bogdanm 0:9b334a45a8ff 193 ((ADDRESS) == I2C_DUALADDRESS_ENABLED))
bogdanm 0:9b334a45a8ff 194 /**
bogdanm 0:9b334a45a8ff 195 * @}
bogdanm 0:9b334a45a8ff 196 */
bogdanm 0:9b334a45a8ff 197
bogdanm 0:9b334a45a8ff 198 /** @defgroup I2C_general_call_addressing_mode I2C_general_call_addressing_mode
bogdanm 0:9b334a45a8ff 199 * @{
bogdanm 0:9b334a45a8ff 200 */
bogdanm 0:9b334a45a8ff 201 #define I2C_GENERALCALL_DISABLED ((uint32_t)0x00000000)
bogdanm 0:9b334a45a8ff 202 #define I2C_GENERALCALL_ENABLED I2C_CR1_ENGC
bogdanm 0:9b334a45a8ff 203
bogdanm 0:9b334a45a8ff 204 #define IS_I2C_GENERAL_CALL(CALL) (((CALL) == I2C_GENERALCALL_DISABLED) || \
bogdanm 0:9b334a45a8ff 205 ((CALL) == I2C_GENERALCALL_ENABLED))
bogdanm 0:9b334a45a8ff 206 /**
bogdanm 0:9b334a45a8ff 207 * @}
bogdanm 0:9b334a45a8ff 208 */
bogdanm 0:9b334a45a8ff 209
bogdanm 0:9b334a45a8ff 210 /** @defgroup I2C_nostretch_mode I2C_nostretch_mode
bogdanm 0:9b334a45a8ff 211 * @{
bogdanm 0:9b334a45a8ff 212 */
bogdanm 0:9b334a45a8ff 213 #define I2C_NOSTRETCH_DISABLED ((uint32_t)0x00000000)
bogdanm 0:9b334a45a8ff 214 #define I2C_NOSTRETCH_ENABLED I2C_CR1_NOSTRETCH
bogdanm 0:9b334a45a8ff 215
bogdanm 0:9b334a45a8ff 216 #define IS_I2C_NO_STRETCH(STRETCH) (((STRETCH) == I2C_NOSTRETCH_DISABLED) || \
bogdanm 0:9b334a45a8ff 217 ((STRETCH) == I2C_NOSTRETCH_ENABLED))
bogdanm 0:9b334a45a8ff 218 /**
bogdanm 0:9b334a45a8ff 219 * @}
bogdanm 0:9b334a45a8ff 220 */
bogdanm 0:9b334a45a8ff 221
bogdanm 0:9b334a45a8ff 222 /** @defgroup I2C_Memory_Address_Size I2C_Memory_Address_Size
bogdanm 0:9b334a45a8ff 223 * @{
bogdanm 0:9b334a45a8ff 224 */
bogdanm 0:9b334a45a8ff 225 #define I2C_MEMADD_SIZE_8BIT ((uint32_t)0x00000001)
bogdanm 0:9b334a45a8ff 226 #define I2C_MEMADD_SIZE_16BIT ((uint32_t)0x00000010)
bogdanm 0:9b334a45a8ff 227
bogdanm 0:9b334a45a8ff 228 #define IS_I2C_MEMADD_SIZE(SIZE) (((SIZE) == I2C_MEMADD_SIZE_8BIT) || \
bogdanm 0:9b334a45a8ff 229 ((SIZE) == I2C_MEMADD_SIZE_16BIT))
bogdanm 0:9b334a45a8ff 230 /**
bogdanm 0:9b334a45a8ff 231 * @}
bogdanm 0:9b334a45a8ff 232 */
bogdanm 0:9b334a45a8ff 233
bogdanm 0:9b334a45a8ff 234 /** @defgroup I2C_Interrupt_configuration_definition I2C_Interrupt_configuration_definition
bogdanm 0:9b334a45a8ff 235 * @{
bogdanm 0:9b334a45a8ff 236 */
bogdanm 0:9b334a45a8ff 237 #define I2C_IT_BUF I2C_CR2_ITBUFEN
bogdanm 0:9b334a45a8ff 238 #define I2C_IT_EVT I2C_CR2_ITEVTEN
bogdanm 0:9b334a45a8ff 239 #define I2C_IT_ERR I2C_CR2_ITERREN
bogdanm 0:9b334a45a8ff 240 /**
bogdanm 0:9b334a45a8ff 241 * @}
bogdanm 0:9b334a45a8ff 242 */
bogdanm 0:9b334a45a8ff 243
bogdanm 0:9b334a45a8ff 244 /** @defgroup I2C_Flag_definition I2C_Flag_definition
bogdanm 0:9b334a45a8ff 245 * @{
bogdanm 0:9b334a45a8ff 246 */
bogdanm 0:9b334a45a8ff 247 #define I2C_FLAG_OVR ((uint32_t)(1 << 16 | I2C_SR1_OVR))
bogdanm 0:9b334a45a8ff 248 #define I2C_FLAG_AF ((uint32_t)(1 << 16 | I2C_SR1_AF))
bogdanm 0:9b334a45a8ff 249 #define I2C_FLAG_ARLO ((uint32_t)(1 << 16 | I2C_SR1_ARLO))
bogdanm 0:9b334a45a8ff 250 #define I2C_FLAG_BERR ((uint32_t)(1 << 16 | I2C_SR1_BERR))
bogdanm 0:9b334a45a8ff 251 #define I2C_FLAG_TXE ((uint32_t)(1 << 16 | I2C_SR1_TXE))
bogdanm 0:9b334a45a8ff 252 #define I2C_FLAG_RXNE ((uint32_t)(1 << 16 | I2C_SR1_RXNE))
bogdanm 0:9b334a45a8ff 253 #define I2C_FLAG_STOPF ((uint32_t)(1 << 16 | I2C_SR1_STOPF))
bogdanm 0:9b334a45a8ff 254 #define I2C_FLAG_ADD10 ((uint32_t)(1 << 16 | I2C_SR1_ADD10))
bogdanm 0:9b334a45a8ff 255 #define I2C_FLAG_BTF ((uint32_t)(1 << 16 | I2C_SR1_BTF))
bogdanm 0:9b334a45a8ff 256 #define I2C_FLAG_ADDR ((uint32_t)(1 << 16 | I2C_SR1_ADDR))
bogdanm 0:9b334a45a8ff 257 #define I2C_FLAG_SB ((uint32_t)(1 << 16 | I2C_SR1_SB))
bogdanm 0:9b334a45a8ff 258 #define I2C_FLAG_DUALF ((uint32_t)(2 << 16 | I2C_SR2_DUALF))
bogdanm 0:9b334a45a8ff 259 #define I2C_FLAG_GENCALL ((uint32_t)(2 << 16 | I2C_SR2_GENCALL))
bogdanm 0:9b334a45a8ff 260 #define I2C_FLAG_TRA ((uint32_t)(2 << 16 | I2C_SR2_TRA))
bogdanm 0:9b334a45a8ff 261 #define I2C_FLAG_BUSY ((uint32_t)(2 << 16 | I2C_SR2_BUSY))
bogdanm 0:9b334a45a8ff 262 #define I2C_FLAG_MSL ((uint32_t)(2 << 16 | I2C_SR2_MSL))
bogdanm 0:9b334a45a8ff 263
bogdanm 0:9b334a45a8ff 264
bogdanm 0:9b334a45a8ff 265 #define I2C_FLAG_MASK ((uint32_t)0x0000FFFF)
bogdanm 0:9b334a45a8ff 266
bogdanm 0:9b334a45a8ff 267 /**
bogdanm 0:9b334a45a8ff 268 * @}
bogdanm 0:9b334a45a8ff 269 */
bogdanm 0:9b334a45a8ff 270
bogdanm 0:9b334a45a8ff 271 /** @defgroup I2C_Clock_Speed_definition I2C_Clock_Speed_definition
bogdanm 0:9b334a45a8ff 272 * @{
bogdanm 0:9b334a45a8ff 273 */
bogdanm 0:9b334a45a8ff 274 #define IS_I2C_CLOCK_SPEED(SPEED) (((SPEED) > 0) && ((SPEED) <= 400000))
bogdanm 0:9b334a45a8ff 275 /**
bogdanm 0:9b334a45a8ff 276 * @}
bogdanm 0:9b334a45a8ff 277 */
bogdanm 0:9b334a45a8ff 278
bogdanm 0:9b334a45a8ff 279 /** @defgroup I2C_Own_Address1_definition I2C_Own_Address1_definition
bogdanm 0:9b334a45a8ff 280 * @{
bogdanm 0:9b334a45a8ff 281 */
bogdanm 0:9b334a45a8ff 282 #define IS_I2C_OWN_ADDRESS1(ADDRESS1) (((ADDRESS1) & (uint32_t)(0xFFFFFC00)) == 0)
bogdanm 0:9b334a45a8ff 283 /**
bogdanm 0:9b334a45a8ff 284 * @}
bogdanm 0:9b334a45a8ff 285 */
bogdanm 0:9b334a45a8ff 286
bogdanm 0:9b334a45a8ff 287 /** @defgroup I2C_Own_Address2_definition I2C_Own_Address2_definition
bogdanm 0:9b334a45a8ff 288 * @{
bogdanm 0:9b334a45a8ff 289 */
bogdanm 0:9b334a45a8ff 290 #define IS_I2C_OWN_ADDRESS2(ADDRESS2) (((ADDRESS2) & (uint32_t)(0xFFFFFF01)) == 0)
bogdanm 0:9b334a45a8ff 291 /**
bogdanm 0:9b334a45a8ff 292 * @}
bogdanm 0:9b334a45a8ff 293 */
bogdanm 0:9b334a45a8ff 294
bogdanm 0:9b334a45a8ff 295
bogdanm 0:9b334a45a8ff 296 /**
bogdanm 0:9b334a45a8ff 297 * @}
bogdanm 0:9b334a45a8ff 298 */
bogdanm 0:9b334a45a8ff 299
bogdanm 0:9b334a45a8ff 300 /* Exported macro ------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 301 /** @defgroup I2C_Exported_Macros I2C Exported Macros
bogdanm 0:9b334a45a8ff 302 * @{
bogdanm 0:9b334a45a8ff 303 */
bogdanm 0:9b334a45a8ff 304
bogdanm 0:9b334a45a8ff 305 /** @brief Reset I2C handle state
bogdanm 0:9b334a45a8ff 306 * @param __HANDLE__: specifies the I2C Handle.
bogdanm 0:9b334a45a8ff 307 * This parameter can be I2C where x: 1, 2, or 3 to select the I2C peripheral.
bogdanm 0:9b334a45a8ff 308 * @retval None
bogdanm 0:9b334a45a8ff 309 */
bogdanm 0:9b334a45a8ff 310 #define __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2C_STATE_RESET)
bogdanm 0:9b334a45a8ff 311
bogdanm 0:9b334a45a8ff 312 /** @brief Enable or disable the specified I2C interrupts.
bogdanm 0:9b334a45a8ff 313 * @param __HANDLE__: specifies the I2C Handle.
bogdanm 0:9b334a45a8ff 314 * This parameter can be I2Cx where x: 1 or 2 to select the I2C peripheral.
bogdanm 0:9b334a45a8ff 315 * @param __INTERRUPT__: specifies the interrupt source to enable or disable.
bogdanm 0:9b334a45a8ff 316 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 317 * @arg I2C_IT_BUF: Buffer interrupt enable
bogdanm 0:9b334a45a8ff 318 * @arg I2C_IT_EVT: Event interrupt enable
bogdanm 0:9b334a45a8ff 319 * @arg I2C_IT_ERR: Error interrupt enable
bogdanm 0:9b334a45a8ff 320 * @retval None
bogdanm 0:9b334a45a8ff 321 */
bogdanm 0:9b334a45a8ff 322
bogdanm 0:9b334a45a8ff 323 #define __HAL_I2C_ENABLE_IT(__HANDLE__, __INTERRUPT__) SET_BIT((__HANDLE__)->Instance->CR2,(__INTERRUPT__))
bogdanm 0:9b334a45a8ff 324 #define __HAL_I2C_DISABLE_IT(__HANDLE__, __INTERRUPT__) CLEAR_BIT((__HANDLE__)->Instance->CR2, (__INTERRUPT__))
bogdanm 0:9b334a45a8ff 325
bogdanm 0:9b334a45a8ff 326 /** @brief Checks if the specified I2C interrupt source is enabled or disabled.
bogdanm 0:9b334a45a8ff 327 * @param __HANDLE__: specifies the I2C Handle.
bogdanm 0:9b334a45a8ff 328 * This parameter can be I2Cx where x: 1 or 2 to select the I2C peripheral.
bogdanm 0:9b334a45a8ff 329 * @param __INTERRUPT__: specifies the I2C interrupt source to check.
bogdanm 0:9b334a45a8ff 330 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 331 * @arg I2C_IT_BUF: Buffer interrupt enable
bogdanm 0:9b334a45a8ff 332 * @arg I2C_IT_EVT: Event interrupt enable
bogdanm 0:9b334a45a8ff 333 * @arg I2C_IT_ERR: Error interrupt enable
bogdanm 0:9b334a45a8ff 334 * @retval The new state of __INTERRUPT__ (TRUE or FALSE).
bogdanm 0:9b334a45a8ff 335 */
bogdanm 0:9b334a45a8ff 336 #define __HAL_I2C_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
bogdanm 0:9b334a45a8ff 337
bogdanm 0:9b334a45a8ff 338 /** @brief Checks whether the specified I2C flag is set or not.
bogdanm 0:9b334a45a8ff 339 * @param __HANDLE__: specifies the I2C Handle.
bogdanm 0:9b334a45a8ff 340 * This parameter can be I2Cx where x: 1 or 2 to select the I2C peripheral.
bogdanm 0:9b334a45a8ff 341 * @param __FLAG__: specifies the flag to check.
bogdanm 0:9b334a45a8ff 342 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 343 * @arg I2C_FLAG_OVR: Overrun/Underrun flag
bogdanm 0:9b334a45a8ff 344 * @arg I2C_FLAG_AF: Acknowledge failure flag
bogdanm 0:9b334a45a8ff 345 * @arg I2C_FLAG_ARLO: Arbitration lost flag
bogdanm 0:9b334a45a8ff 346 * @arg I2C_FLAG_BERR: Bus error flag
bogdanm 0:9b334a45a8ff 347 * @arg I2C_FLAG_TXE: Data register empty flag
bogdanm 0:9b334a45a8ff 348 * @arg I2C_FLAG_RXNE: Data register not empty flag
bogdanm 0:9b334a45a8ff 349 * @arg I2C_FLAG_STOPF: Stop detection flag
bogdanm 0:9b334a45a8ff 350 * @arg I2C_FLAG_ADD10: 10-bit header sent flag
bogdanm 0:9b334a45a8ff 351 * @arg I2C_FLAG_BTF: Byte transfer finished flag
bogdanm 0:9b334a45a8ff 352 * @arg I2C_FLAG_ADDR: Address sent flag
bogdanm 0:9b334a45a8ff 353 * Address matched flag
bogdanm 0:9b334a45a8ff 354 * @arg I2C_FLAG_SB: Start bit flag
bogdanm 0:9b334a45a8ff 355 * @arg I2C_FLAG_DUALF: Dual flag
bogdanm 0:9b334a45a8ff 356 * @arg I2C_FLAG_GENCALL: General call header flag
bogdanm 0:9b334a45a8ff 357 * @arg I2C_FLAG_TRA: Transmitter/Receiver flag
bogdanm 0:9b334a45a8ff 358 * @arg I2C_FLAG_BUSY: Bus busy flag
bogdanm 0:9b334a45a8ff 359 * @arg I2C_FLAG_MSL: Master/Slave flag
bogdanm 0:9b334a45a8ff 360 * @retval The new state of __FLAG__ (TRUE or FALSE).
bogdanm 0:9b334a45a8ff 361 */
bogdanm 0:9b334a45a8ff 362 #define __HAL_I2C_GET_FLAG(__HANDLE__, __FLAG__) ((((uint8_t)((__FLAG__) >> 16)) == 0x01)?((((__HANDLE__)->Instance->SR1) & ((__FLAG__) & I2C_FLAG_MASK)) == ((__FLAG__) & I2C_FLAG_MASK)): \
bogdanm 0:9b334a45a8ff 363 ((((__HANDLE__)->Instance->SR2) & ((__FLAG__) & I2C_FLAG_MASK)) == ((__FLAG__) & I2C_FLAG_MASK)))
bogdanm 0:9b334a45a8ff 364
bogdanm 0:9b334a45a8ff 365 /** @brief Clears the I2C pending flags which are cleared by writing 0 in a specific bit.
bogdanm 0:9b334a45a8ff 366 * @param __HANDLE__: specifies the I2C Handle.
bogdanm 0:9b334a45a8ff 367 * This parameter can be I2Cx where x: 1 or 2 to select the I2C peripheral.
bogdanm 0:9b334a45a8ff 368 * @param __FLAG__: specifies the flag to clear.
bogdanm 0:9b334a45a8ff 369 * This parameter can be any combination of the following values:
bogdanm 0:9b334a45a8ff 370 * @arg I2C_FLAG_OVR: Overrun/Underrun flag (Slave mode)
bogdanm 0:9b334a45a8ff 371 * @arg I2C_FLAG_AF: Acknowledge failure flag
bogdanm 0:9b334a45a8ff 372 * @arg I2C_FLAG_ARLO: Arbitration lost flag (Master mode)
bogdanm 0:9b334a45a8ff 373 * @arg I2C_FLAG_BERR: Bus error flag
bogdanm 0:9b334a45a8ff 374 * @retval None
bogdanm 0:9b334a45a8ff 375 */
bogdanm 0:9b334a45a8ff 376 #define __HAL_I2C_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR1 = ~((__FLAG__) & I2C_FLAG_MASK))
bogdanm 0:9b334a45a8ff 377
bogdanm 0:9b334a45a8ff 378 /** @brief Clears the I2C ADDR pending flag.
bogdanm 0:9b334a45a8ff 379 * @param __HANDLE__: specifies the I2C Handle.
bogdanm 0:9b334a45a8ff 380 * This parameter can be I2Cx where x: 1 or 2 to select the I2C peripheral.
bogdanm 0:9b334a45a8ff 381 * @retval None
bogdanm 0:9b334a45a8ff 382 */
bogdanm 0:9b334a45a8ff 383
bogdanm 0:9b334a45a8ff 384 #define __HAL_I2C_CLEAR_ADDRFLAG(__HANDLE__) do{(__HANDLE__)->Instance->SR1;\
bogdanm 0:9b334a45a8ff 385 (__HANDLE__)->Instance->SR2;}while(0)
bogdanm 0:9b334a45a8ff 386
bogdanm 0:9b334a45a8ff 387 /** @brief Clears the I2C STOPF pending flag.
bogdanm 0:9b334a45a8ff 388 * @param __HANDLE__: specifies the I2C Handle.
bogdanm 0:9b334a45a8ff 389 * This parameter can be I2Cx where x: 1 or 2 to select the I2C peripheral.
bogdanm 0:9b334a45a8ff 390 * @retval None
bogdanm 0:9b334a45a8ff 391 */
bogdanm 0:9b334a45a8ff 392 #define __HAL_I2C_CLEAR_STOPFLAG(__HANDLE__) do{(__HANDLE__)->Instance->SR1;\
bogdanm 0:9b334a45a8ff 393 SET_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE);}while(0)
bogdanm 0:9b334a45a8ff 394
bogdanm 0:9b334a45a8ff 395 /** @brief Enable the I2C peripheral.
bogdanm 0:9b334a45a8ff 396 * @param __HANDLE__: specifies the I2C Handle.
bogdanm 0:9b334a45a8ff 397 * This parameter can be I2Cx where x: 1 or 2 to select the I2C peripheral.
bogdanm 0:9b334a45a8ff 398 * @retval None
bogdanm 0:9b334a45a8ff 399 */
bogdanm 0:9b334a45a8ff 400 #define __HAL_I2C_ENABLE(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE)
bogdanm 0:9b334a45a8ff 401
bogdanm 0:9b334a45a8ff 402 /** @brief Disable the I2C peripheral.
bogdanm 0:9b334a45a8ff 403 * @param __HANDLE__: specifies the I2C Handle.
bogdanm 0:9b334a45a8ff 404 * This parameter can be I2Cx where x: 1 or 2 to select the I2C peripheral.
bogdanm 0:9b334a45a8ff 405 * @retval None
bogdanm 0:9b334a45a8ff 406 */
bogdanm 0:9b334a45a8ff 407 #define __HAL_I2C_DISABLE(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE)
bogdanm 0:9b334a45a8ff 408
bogdanm 0:9b334a45a8ff 409 /**
bogdanm 0:9b334a45a8ff 410 * @}
bogdanm 0:9b334a45a8ff 411 */
bogdanm 0:9b334a45a8ff 412
bogdanm 0:9b334a45a8ff 413 /** @defgroup I2C_Private_Macros I2C Private Macros
bogdanm 0:9b334a45a8ff 414 * @{
bogdanm 0:9b334a45a8ff 415 */
bogdanm 0:9b334a45a8ff 416
bogdanm 0:9b334a45a8ff 417 #define I2C_FREQRANGE(__PCLK__) ((__PCLK__)/1000000)
bogdanm 0:9b334a45a8ff 418 #define I2C_RISE_TIME(__FREQRANGE__, __SPEED__) (((__SPEED__) <= 100000) ? ((__FREQRANGE__) + 1) : ((((__FREQRANGE__) * 300) / 1000) + 1))
bogdanm 0:9b334a45a8ff 419 #define I2C_SPEED_STANDARD(__PCLK__, __SPEED__) (((((__PCLK__)/((__SPEED__) << 1)) & I2C_CCR_CCR) < 4)? 4:((__PCLK__) / ((__SPEED__) << 1)))
bogdanm 0:9b334a45a8ff 420 #define I2C_SPEED_FAST(__PCLK__, __SPEED__, __DUTYCYCLE__) (((__DUTYCYCLE__) == I2C_DUTYCYCLE_2)? ((__PCLK__) / ((__SPEED__) * 3)) : (((__PCLK__) / ((__SPEED__) * 25)) | I2C_DUTYCYCLE_16_9))
bogdanm 0:9b334a45a8ff 421 #define I2C_SPEED(__PCLK__, __SPEED__, __DUTYCYCLE__) (((__SPEED__) <= 100000)? (I2C_SPEED_STANDARD((__PCLK__), (__SPEED__))) : \
bogdanm 0:9b334a45a8ff 422 ((I2C_SPEED_FAST((__PCLK__), (__SPEED__), (__DUTYCYCLE__)) & I2C_CCR_CCR) == 0)? 1 : \
bogdanm 0:9b334a45a8ff 423 ((I2C_SPEED_FAST((__PCLK__), (__SPEED__), (__DUTYCYCLE__))) | I2C_CCR_FS))
bogdanm 0:9b334a45a8ff 424
bogdanm 0:9b334a45a8ff 425 #define I2C_7BIT_ADD_WRITE(__ADDRESS__) ((uint8_t)((__ADDRESS__) & (~I2C_OAR1_ADD0)))
bogdanm 0:9b334a45a8ff 426 #define I2C_7BIT_ADD_READ(__ADDRESS__) ((uint8_t)((__ADDRESS__) | I2C_OAR1_ADD0))
bogdanm 0:9b334a45a8ff 427
bogdanm 0:9b334a45a8ff 428 #define I2C_10BIT_ADDRESS(__ADDRESS__) ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)(0x00FF))))
bogdanm 0:9b334a45a8ff 429 #define I2C_10BIT_HEADER_WRITE(__ADDRESS__) ((uint8_t)((uint16_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)(0x0300))) >> 7) | (uint16_t)(0xF0))))
bogdanm 0:9b334a45a8ff 430 #define I2C_10BIT_HEADER_READ(__ADDRESS__) ((uint8_t)((uint16_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)(0x0300))) >> 7) | (uint16_t)(0xF1))))
bogdanm 0:9b334a45a8ff 431
bogdanm 0:9b334a45a8ff 432 #define I2C_MEM_ADD_MSB(__ADDRESS__) ((uint8_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)(0xFF00))) >> 8)))
bogdanm 0:9b334a45a8ff 433 #define I2C_MEM_ADD_LSB(__ADDRESS__) ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)(0x00FF))))
bogdanm 0:9b334a45a8ff 434
bogdanm 0:9b334a45a8ff 435 /**
bogdanm 0:9b334a45a8ff 436 * @}
bogdanm 0:9b334a45a8ff 437 */
bogdanm 0:9b334a45a8ff 438
bogdanm 0:9b334a45a8ff 439
bogdanm 0:9b334a45a8ff 440 /* Exported functions --------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 441 /** @addtogroup I2C_Exported_Functions
bogdanm 0:9b334a45a8ff 442 * @{
bogdanm 0:9b334a45a8ff 443 */
bogdanm 0:9b334a45a8ff 444
bogdanm 0:9b334a45a8ff 445 /* Initialization/de-initialization functions **********************************/
bogdanm 0:9b334a45a8ff 446 /** @addtogroup I2C_Exported_Functions_Group1
bogdanm 0:9b334a45a8ff 447 * @{
bogdanm 0:9b334a45a8ff 448 */
bogdanm 0:9b334a45a8ff 449
bogdanm 0:9b334a45a8ff 450 HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c);
bogdanm 0:9b334a45a8ff 451 HAL_StatusTypeDef HAL_I2C_DeInit (I2C_HandleTypeDef *hi2c);
bogdanm 0:9b334a45a8ff 452 void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c);
bogdanm 0:9b334a45a8ff 453 void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c);
bogdanm 0:9b334a45a8ff 454
bogdanm 0:9b334a45a8ff 455 /**
bogdanm 0:9b334a45a8ff 456 * @}
bogdanm 0:9b334a45a8ff 457 */
bogdanm 0:9b334a45a8ff 458
bogdanm 0:9b334a45a8ff 459
bogdanm 0:9b334a45a8ff 460 /* I/O operation functions *****************************************************/
bogdanm 0:9b334a45a8ff 461 /** @addtogroup I2C_Exported_Functions_Group2
bogdanm 0:9b334a45a8ff 462 * @{
bogdanm 0:9b334a45a8ff 463 */
bogdanm 0:9b334a45a8ff 464
bogdanm 0:9b334a45a8ff 465 /******* Blocking mode: Polling */
bogdanm 0:9b334a45a8ff 466 HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout);
bogdanm 0:9b334a45a8ff 467 HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout);
bogdanm 0:9b334a45a8ff 468 HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout);
bogdanm 0:9b334a45a8ff 469 HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout);
bogdanm 0:9b334a45a8ff 470 HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout);
bogdanm 0:9b334a45a8ff 471 HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout);
bogdanm 0:9b334a45a8ff 472 HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout);
bogdanm 0:9b334a45a8ff 473
bogdanm 0:9b334a45a8ff 474 /******* Non-Blocking mode: Interrupt */
bogdanm 0:9b334a45a8ff 475 HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
bogdanm 0:9b334a45a8ff 476 HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
bogdanm 0:9b334a45a8ff 477 HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
bogdanm 0:9b334a45a8ff 478 HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
bogdanm 0:9b334a45a8ff 479 HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
bogdanm 0:9b334a45a8ff 480 HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
bogdanm 0:9b334a45a8ff 481
bogdanm 0:9b334a45a8ff 482 /******* Non-Blocking mode: DMA */
bogdanm 0:9b334a45a8ff 483 HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
bogdanm 0:9b334a45a8ff 484 HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
bogdanm 0:9b334a45a8ff 485 HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
bogdanm 0:9b334a45a8ff 486 HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
bogdanm 0:9b334a45a8ff 487 HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
bogdanm 0:9b334a45a8ff 488 HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
bogdanm 0:9b334a45a8ff 489
bogdanm 0:9b334a45a8ff 490 /******* I2C IRQHandler and Callbacks used in non blocking modes (Interrupt and DMA) */
bogdanm 0:9b334a45a8ff 491 void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c);
bogdanm 0:9b334a45a8ff 492 void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c);
bogdanm 0:9b334a45a8ff 493 void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c);
bogdanm 0:9b334a45a8ff 494 void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c);
bogdanm 0:9b334a45a8ff 495 void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c);
bogdanm 0:9b334a45a8ff 496 void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c);
bogdanm 0:9b334a45a8ff 497 void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c);
bogdanm 0:9b334a45a8ff 498 void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c);
bogdanm 0:9b334a45a8ff 499 void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c);
bogdanm 0:9b334a45a8ff 500
bogdanm 0:9b334a45a8ff 501 /**
bogdanm 0:9b334a45a8ff 502 * @}
bogdanm 0:9b334a45a8ff 503 */
bogdanm 0:9b334a45a8ff 504
bogdanm 0:9b334a45a8ff 505
bogdanm 0:9b334a45a8ff 506 /* Peripheral Control and State functions **************************************/
bogdanm 0:9b334a45a8ff 507 /** @addtogroup I2C_Exported_Functions_Group3
bogdanm 0:9b334a45a8ff 508 * @{
bogdanm 0:9b334a45a8ff 509 */
bogdanm 0:9b334a45a8ff 510
bogdanm 0:9b334a45a8ff 511 HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c);
bogdanm 0:9b334a45a8ff 512 uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c);
bogdanm 0:9b334a45a8ff 513 /**
bogdanm 0:9b334a45a8ff 514 * @}
bogdanm 0:9b334a45a8ff 515 */
bogdanm 0:9b334a45a8ff 516
bogdanm 0:9b334a45a8ff 517 /**
bogdanm 0:9b334a45a8ff 518 * @}
bogdanm 0:9b334a45a8ff 519 */
bogdanm 0:9b334a45a8ff 520
bogdanm 0:9b334a45a8ff 521
bogdanm 0:9b334a45a8ff 522
bogdanm 0:9b334a45a8ff 523 /**
bogdanm 0:9b334a45a8ff 524 * @}
bogdanm 0:9b334a45a8ff 525 */
bogdanm 0:9b334a45a8ff 526
bogdanm 0:9b334a45a8ff 527 /**
bogdanm 0:9b334a45a8ff 528 * @}
bogdanm 0:9b334a45a8ff 529 */
bogdanm 0:9b334a45a8ff 530
bogdanm 0:9b334a45a8ff 531 #ifdef __cplusplus
bogdanm 0:9b334a45a8ff 532 }
bogdanm 0:9b334a45a8ff 533 #endif
bogdanm 0:9b334a45a8ff 534
bogdanm 0:9b334a45a8ff 535
bogdanm 0:9b334a45a8ff 536 #endif /* __STM32L1xx_HAL_I2C_H */
bogdanm 0:9b334a45a8ff 537
bogdanm 0:9b334a45a8ff 538 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/