mbed-dev - fix LPC812 PWM

Users » nameless129 » Code » mbed-dev

fix LPC812 PWM

targets/cmsis/TARGET_STM/TARGET_STM32L1/stm32l1xx_hal_i2c.c@0:9b334a45a8ff, 2015-10-01 (annotated)

Committer:: bogdanm
Date:: Thu Oct 01 15:25:22 2015 +0300
Revision:: 0:9b334a45a8ff

Initial commit on mbed-dev



Replaces mbed-src (now inactive)

Who changed what in which revision?

User	Revision	Line number	New contents of line
bogdanm	0:9b334a45a8ff	1	/**
bogdanm	0:9b334a45a8ff	2	******************************************************************************
bogdanm	0:9b334a45a8ff	3	* @file stm32l1xx_hal_i2c.c
bogdanm	0:9b334a45a8ff	4	* @author MCD Application Team
bogdanm	0:9b334a45a8ff	5	* @version V1.0.0
bogdanm	0:9b334a45a8ff	6	* @date 5-September-2014
bogdanm	0:9b334a45a8ff	7	* @brief I2C HAL module driver.
bogdanm	0:9b334a45a8ff	8	* This file provides firmware functions to manage the following
bogdanm	0:9b334a45a8ff	9	* functionalities of the Inter Integrated Circuit (I2C) peripheral:
bogdanm	0:9b334a45a8ff	10	* + Initialization and de-initialization functions
bogdanm	0:9b334a45a8ff	11	* + IO operation functions
bogdanm	0:9b334a45a8ff	12	* + Peripheral Control functions
bogdanm	0:9b334a45a8ff	13	* + Peripheral State functions
bogdanm	0:9b334a45a8ff	14	*
bogdanm	0:9b334a45a8ff	15	@verbatim
bogdanm	0:9b334a45a8ff	16	==============================================================================
bogdanm	0:9b334a45a8ff	17	##### How to use this driver #####
bogdanm	0:9b334a45a8ff	18	==============================================================================
bogdanm	0:9b334a45a8ff	19	[..]
bogdanm	0:9b334a45a8ff	20	The I2C HAL driver can be used as follows:
bogdanm	0:9b334a45a8ff	21
bogdanm	0:9b334a45a8ff	22	(#) Declare a I2C_HandleTypeDef handle structure, for example:
bogdanm	0:9b334a45a8ff	23	I2C_HandleTypeDef hi2c;
bogdanm	0:9b334a45a8ff	24
bogdanm	0:9b334a45a8ff	25	(#)Initialize the I2C low level resources by implement the HAL_I2C_MspInit() API:
bogdanm	0:9b334a45a8ff	26	(##) Enable the I2Cx interface clock
bogdanm	0:9b334a45a8ff	27	(##) I2C pins configuration
bogdanm	0:9b334a45a8ff	28	(+++) Enable the clock for the I2C GPIOs
bogdanm	0:9b334a45a8ff	29	(+++) Configure I2C pins as alternate function open-drain
bogdanm	0:9b334a45a8ff	30	(##) NVIC configuration if you need to use interrupt process
bogdanm	0:9b334a45a8ff	31	(+++) Configure the I2Cx interrupt priority
bogdanm	0:9b334a45a8ff	32	(+++) Enable the NVIC I2C IRQ Channel
bogdanm	0:9b334a45a8ff	33	(##) DMA Configuration if you need to use DMA process
bogdanm	0:9b334a45a8ff	34	(+++) Declare a DMA_HandleTypeDef handle structure for the transmit or receive channel
bogdanm	0:9b334a45a8ff	35	(+++) Enable the DMAx interface clock using
bogdanm	0:9b334a45a8ff	36	(+++) Configure the DMA handle parameters
bogdanm	0:9b334a45a8ff	37	(+++) Configure the DMA Tx or Rx Channel
bogdanm	0:9b334a45a8ff	38	(+++) Associate the initilalized DMA handle to the hi2c DMA Tx or Rx handle
bogdanm	0:9b334a45a8ff	39	(+++) Configure the priority and enable the NVIC for the transfer complete interrupt on
bogdanm	0:9b334a45a8ff	40	the DMA Tx or Rx Channel
bogdanm	0:9b334a45a8ff	41
bogdanm	0:9b334a45a8ff	42	(#) Configure the Communication Speed, Duty cycle, Addressing mode, Own Address1,
bogdanm	0:9b334a45a8ff	43	Dual Addressing mode, Own Address2, General call and Nostretch mode in the hi2c Init structure.
bogdanm	0:9b334a45a8ff	44
bogdanm	0:9b334a45a8ff	45	(#) Initialize the I2C registers by calling the HAL_I2C_Init(), configures also the low level Hardware
bogdanm	0:9b334a45a8ff	46	(GPIO, CLOCK, NVIC...etc) by calling the customed HAL_I2C_MspInit(&hi2c) API.
bogdanm	0:9b334a45a8ff	47
bogdanm	0:9b334a45a8ff	48	(#) To check if target device is ready for communication, use the function HAL_I2C_IsDeviceReady()
bogdanm	0:9b334a45a8ff	49
bogdanm	0:9b334a45a8ff	50	(#) For I2C IO and IO MEM operations, three operation modes are available within this driver :
bogdanm	0:9b334a45a8ff	51
bogdanm	0:9b334a45a8ff	52	* Polling mode IO operation *
bogdanm	0:9b334a45a8ff	53	=================================
bogdanm	0:9b334a45a8ff	54	[..]
bogdanm	0:9b334a45a8ff	55	(+) Transmit in master mode an amount of data in blocking mode using HAL_I2C_Master_Transmit()
bogdanm	0:9b334a45a8ff	56	(+) Receive in master mode an amount of data in blocking mode using HAL_I2C_Master_Receive()
bogdanm	0:9b334a45a8ff	57	(+) Transmit in slave mode an amount of data in blocking mode using HAL_I2C_Slave_Transmit()
bogdanm	0:9b334a45a8ff	58	(+) Receive in slave mode an amount of data in blocking mode using HAL_I2C_Slave_Receive()
bogdanm	0:9b334a45a8ff	59
bogdanm	0:9b334a45a8ff	60	* Polling mode IO MEM operation *
bogdanm	0:9b334a45a8ff	61	=====================================
bogdanm	0:9b334a45a8ff	62	[..]
bogdanm	0:9b334a45a8ff	63	(+) Write an amount of data in blocking mode to a specific memory address using HAL_I2C_Mem_Write()
bogdanm	0:9b334a45a8ff	64	(+) Read an amount of data in blocking mode from a specific memory address using HAL_I2C_Mem_Read()
bogdanm	0:9b334a45a8ff	65
bogdanm	0:9b334a45a8ff	66
bogdanm	0:9b334a45a8ff	67	* Interrupt mode IO operation *
bogdanm	0:9b334a45a8ff	68	===================================
bogdanm	0:9b334a45a8ff	69	[..]
bogdanm	0:9b334a45a8ff	70	(+) Transmit in master mode an amount of data in non blocking mode using HAL_I2C_Master_Transmit_IT()
bogdanm	0:9b334a45a8ff	71	(+) At transmission end of transfer HAL_I2C_MasterTxCpltCallback is executed and user can
bogdanm	0:9b334a45a8ff	72	add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback
bogdanm	0:9b334a45a8ff	73	(+) Receive in master mode an amount of data in non blocking mode using HAL_I2C_Master_Receive_IT()
bogdanm	0:9b334a45a8ff	74	(+) At reception end of transfer HAL_I2C_MasterRxCpltCallback is executed and user can
bogdanm	0:9b334a45a8ff	75	add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback
bogdanm	0:9b334a45a8ff	76	(+) Transmit in slave mode an amount of data in non blocking mode using HAL_I2C_Slave_Transmit_IT()
bogdanm	0:9b334a45a8ff	77	(+) At transmission end of transfer HAL_I2C_SlaveTxCpltCallback is executed and user can
bogdanm	0:9b334a45a8ff	78	add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback
bogdanm	0:9b334a45a8ff	79	(+) Receive in slave mode an amount of data in non blocking mode using HAL_I2C_Slave_Receive_IT()
bogdanm	0:9b334a45a8ff	80	(+) At reception end of transfer HAL_I2C_SlaveRxCpltCallback is executed and user can
bogdanm	0:9b334a45a8ff	81	add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback
bogdanm	0:9b334a45a8ff	82	(+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
bogdanm	0:9b334a45a8ff	83	add his own code by customization of function pointer HAL_I2C_ErrorCallback
bogdanm	0:9b334a45a8ff	84
bogdanm	0:9b334a45a8ff	85	* Interrupt mode IO MEM operation *
bogdanm	0:9b334a45a8ff	86	=======================================
bogdanm	0:9b334a45a8ff	87	[..]
bogdanm	0:9b334a45a8ff	88	(+) Write an amount of data in no-blocking mode with Interrupt to a specific memory address using
bogdanm	0:9b334a45a8ff	89	HAL_I2C_Mem_Write_IT()
bogdanm	0:9b334a45a8ff	90	(+) At MEM end of write transfer HAL_I2C_MemTxCpltCallback is executed and user can
bogdanm	0:9b334a45a8ff	91	add his own code by customization of function pointer HAL_I2C_MemTxCpltCallback
bogdanm	0:9b334a45a8ff	92	(+) Read an amount of data in no-blocking mode with Interrupt from a specific memory address using
bogdanm	0:9b334a45a8ff	93	HAL_I2C_Mem_Read_IT()
bogdanm	0:9b334a45a8ff	94	(+) At MEM end of read transfer HAL_I2C_MemRxCpltCallback is executed and user can
bogdanm	0:9b334a45a8ff	95	add his own code by customization of function pointer HAL_I2C_MemRxCpltCallback
bogdanm	0:9b334a45a8ff	96	(+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
bogdanm	0:9b334a45a8ff	97	add his own code by customization of function pointer HAL_I2C_ErrorCallback
bogdanm	0:9b334a45a8ff	98
bogdanm	0:9b334a45a8ff	99	* DMA mode IO operation *
bogdanm	0:9b334a45a8ff	100	==============================
bogdanm	0:9b334a45a8ff	101	[..]
bogdanm	0:9b334a45a8ff	102	(+) Transmit in master mode an amount of data in non blocking mode (DMA) using
bogdanm	0:9b334a45a8ff	103	HAL_I2C_Master_Transmit_DMA()
bogdanm	0:9b334a45a8ff	104	(+) At transmission end of transfer HAL_I2C_MasterTxCpltCallback is executed and user can
bogdanm	0:9b334a45a8ff	105	add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback
bogdanm	0:9b334a45a8ff	106	(+) Receive in master mode an amount of data in non blocking mode (DMA) using
bogdanm	0:9b334a45a8ff	107	HAL_I2C_Master_Receive_DMA()
bogdanm	0:9b334a45a8ff	108	(+) At reception end of transfer HAL_I2C_MasterRxCpltCallback is executed and user can
bogdanm	0:9b334a45a8ff	109	add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback
bogdanm	0:9b334a45a8ff	110	(+) Transmit in slave mode an amount of data in non blocking mode (DMA) using
bogdanm	0:9b334a45a8ff	111	HAL_I2C_Slave_Transmit_DMA()
bogdanm	0:9b334a45a8ff	112	(+) At transmission end of transfer HAL_I2C_SlaveTxCpltCallback is executed and user can
bogdanm	0:9b334a45a8ff	113	add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback
bogdanm	0:9b334a45a8ff	114	(+) Receive in slave mode an amount of data in non blocking mode (DMA) using
bogdanm	0:9b334a45a8ff	115	HAL_I2C_Slave_Receive_DMA()
bogdanm	0:9b334a45a8ff	116	(+) At reception end of transfer HAL_I2C_SlaveRxCpltCallback is executed and user can
bogdanm	0:9b334a45a8ff	117	add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback
bogdanm	0:9b334a45a8ff	118	(+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
bogdanm	0:9b334a45a8ff	119	add his own code by customization of function pointer HAL_I2C_ErrorCallback
bogdanm	0:9b334a45a8ff	120
bogdanm	0:9b334a45a8ff	121	* DMA mode IO MEM operation *
bogdanm	0:9b334a45a8ff	122	=================================
bogdanm	0:9b334a45a8ff	123	[..]
bogdanm	0:9b334a45a8ff	124	(+) Write an amount of data in no-blocking mode with DMA to a specific memory address using
bogdanm	0:9b334a45a8ff	125	HAL_I2C_Mem_Write_DMA()
bogdanm	0:9b334a45a8ff	126	(+) At MEM end of write transfer HAL_I2C_MemTxCpltCallback is executed and user can
bogdanm	0:9b334a45a8ff	127	add his own code by customization of function pointer HAL_I2C_MemTxCpltCallback
bogdanm	0:9b334a45a8ff	128	(+) Read an amount of data in no-blocking mode with DMA from a specific memory address using
bogdanm	0:9b334a45a8ff	129	HAL_I2C_Mem_Read_DMA()
bogdanm	0:9b334a45a8ff	130	(+) At MEM end of read transfer HAL_I2C_MemRxCpltCallback is executed and user can
bogdanm	0:9b334a45a8ff	131	add his own code by customization of function pointer HAL_I2C_MemRxCpltCallback
bogdanm	0:9b334a45a8ff	132	(+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
bogdanm	0:9b334a45a8ff	133	add his own code by customization of function pointer HAL_I2C_ErrorCallback
bogdanm	0:9b334a45a8ff	134
bogdanm	0:9b334a45a8ff	135
bogdanm	0:9b334a45a8ff	136	* I2C HAL driver macros list *
bogdanm	0:9b334a45a8ff	137	==================================
bogdanm	0:9b334a45a8ff	138	[..]
bogdanm	0:9b334a45a8ff	139	Below the list of most used macros in I2C HAL driver.
bogdanm	0:9b334a45a8ff	140
bogdanm	0:9b334a45a8ff	141	(+) __HAL_I2C_ENABLE: Enable the I2C peripheral
bogdanm	0:9b334a45a8ff	142	(+) __HAL_I2C_DISABLE: Disable the I2C peripheral
bogdanm	0:9b334a45a8ff	143	(+) __HAL_I2C_GET_FLAG : Checks whether the specified I2C flag is set or not
bogdanm	0:9b334a45a8ff	144	(+) __HAL_I2C_CLEAR_FLAG : Clear the specified I2C pending flag
bogdanm	0:9b334a45a8ff	145	(+) __HAL_I2C_ENABLE_IT: Enable the specified I2C interrupt
bogdanm	0:9b334a45a8ff	146	(+) __HAL_I2C_DISABLE_IT: Disable the specified I2C interrupt
bogdanm	0:9b334a45a8ff	147
bogdanm	0:9b334a45a8ff	148	[..]
bogdanm	0:9b334a45a8ff	149	(@) You can refer to the I2C HAL driver header file for more useful macros
bogdanm	0:9b334a45a8ff	150
bogdanm	0:9b334a45a8ff	151
bogdanm	0:9b334a45a8ff	152	@endverbatim
bogdanm	0:9b334a45a8ff	153	******************************************************************************
bogdanm	0:9b334a45a8ff	154	* @attention
bogdanm	0:9b334a45a8ff	155	*
bogdanm	0:9b334a45a8ff	156	* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
bogdanm	0:9b334a45a8ff	157	*
bogdanm	0:9b334a45a8ff	158	* Redistribution and use in source and binary forms, with or without modification,
bogdanm	0:9b334a45a8ff	159	* are permitted provided that the following conditions are met:
bogdanm	0:9b334a45a8ff	160	* 1. Redistributions of source code must retain the above copyright notice,
bogdanm	0:9b334a45a8ff	161	* this list of conditions and the following disclaimer.
bogdanm	0:9b334a45a8ff	162	* 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm	0:9b334a45a8ff	163	* this list of conditions and the following disclaimer in the documentation
bogdanm	0:9b334a45a8ff	164	* and/or other materials provided with the distribution.
bogdanm	0:9b334a45a8ff	165	* 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm	0:9b334a45a8ff	166	* may be used to endorse or promote products derived from this software
bogdanm	0:9b334a45a8ff	167	* without specific prior written permission.
bogdanm	0:9b334a45a8ff	168	*
bogdanm	0:9b334a45a8ff	169	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm	0:9b334a45a8ff	170	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm	0:9b334a45a8ff	171	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm	0:9b334a45a8ff	172	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm	0:9b334a45a8ff	173	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm	0:9b334a45a8ff	174	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm	0:9b334a45a8ff	175	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm	0:9b334a45a8ff	176	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm	0:9b334a45a8ff	177	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm	0:9b334a45a8ff	178	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm	0:9b334a45a8ff	179	*
bogdanm	0:9b334a45a8ff	180	******************************************************************************
bogdanm	0:9b334a45a8ff	181	*/
bogdanm	0:9b334a45a8ff	182
bogdanm	0:9b334a45a8ff	183	/* Includes ------------------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	184	#include "stm32l1xx_hal.h"
bogdanm	0:9b334a45a8ff	185
bogdanm	0:9b334a45a8ff	186	/** @addtogroup STM32L1xx_HAL_Driver
bogdanm	0:9b334a45a8ff	187	* @{
bogdanm	0:9b334a45a8ff	188	*/
bogdanm	0:9b334a45a8ff	189
bogdanm	0:9b334a45a8ff	190	/** @defgroup I2C I2C
bogdanm	0:9b334a45a8ff	191	* @brief I2C HAL module driver
bogdanm	0:9b334a45a8ff	192	* @{
bogdanm	0:9b334a45a8ff	193	*/
bogdanm	0:9b334a45a8ff	194
bogdanm	0:9b334a45a8ff	195	#ifdef HAL_I2C_MODULE_ENABLED
bogdanm	0:9b334a45a8ff	196
bogdanm	0:9b334a45a8ff	197	/* Private typedef -----------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	198	/* Private define ------------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	199	/** @defgroup I2C_Private_Constants I2C Private Constants
bogdanm	0:9b334a45a8ff	200	* @{
bogdanm	0:9b334a45a8ff	201	*/
bogdanm	0:9b334a45a8ff	202	#define I2C_TIMEOUT_FLAG ((uint32_t)35) /* 35 ms */
bogdanm	0:9b334a45a8ff	203	#define I2C_TIMEOUT_ADDR_SLAVE ((uint32_t)10000) /* 10 s */
bogdanm	0:9b334a45a8ff	204
bogdanm	0:9b334a45a8ff	205	#define I2C_MIN_PCLK_FREQ ((uint32_t)2000000) /* 2 MHz*/
bogdanm	0:9b334a45a8ff	206	/**
bogdanm	0:9b334a45a8ff	207	* @}
bogdanm	0:9b334a45a8ff	208	*/
bogdanm	0:9b334a45a8ff	209
bogdanm	0:9b334a45a8ff	210
bogdanm	0:9b334a45a8ff	211	/* Private macro -------------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	212	/* Private variables ---------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	213	/* Private function prototypes -----------------------------------------------*/
bogdanm	0:9b334a45a8ff	214	/** @defgroup I2C_Private_Functions I2C Private Functions
bogdanm	0:9b334a45a8ff	215	* @{
bogdanm	0:9b334a45a8ff	216	*/
bogdanm	0:9b334a45a8ff	217
bogdanm	0:9b334a45a8ff	218	static void I2C_DMAMasterTransmitCplt(DMA_HandleTypeDef *hdma);
bogdanm	0:9b334a45a8ff	219	static void I2C_DMAMasterReceiveCplt(DMA_HandleTypeDef *hdma);
bogdanm	0:9b334a45a8ff	220	static void I2C_DMASlaveTransmitCplt(DMA_HandleTypeDef *hdma);
bogdanm	0:9b334a45a8ff	221	static void I2C_DMASlaveReceiveCplt(DMA_HandleTypeDef *hdma);
bogdanm	0:9b334a45a8ff	222	static void I2C_DMAMemTransmitCplt(DMA_HandleTypeDef *hdma);
bogdanm	0:9b334a45a8ff	223	static void I2C_DMAMemReceiveCplt(DMA_HandleTypeDef *hdma);
bogdanm	0:9b334a45a8ff	224	static void I2C_DMAError(DMA_HandleTypeDef *hdma);
bogdanm	0:9b334a45a8ff	225
bogdanm	0:9b334a45a8ff	226	static HAL_StatusTypeDef I2C_MasterRequestWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout);
bogdanm	0:9b334a45a8ff	227	static HAL_StatusTypeDef I2C_MasterRequestRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout);
bogdanm	0:9b334a45a8ff	228	static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout);
bogdanm	0:9b334a45a8ff	229	static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout);
bogdanm	0:9b334a45a8ff	230	static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout);
bogdanm	0:9b334a45a8ff	231	static HAL_StatusTypeDef I2C_WaitOnMasterAddressFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, uint32_t Timeout);
bogdanm	0:9b334a45a8ff	232
bogdanm	0:9b334a45a8ff	233	static HAL_StatusTypeDef I2C_MasterTransmit_TXE(I2C_HandleTypeDef *hi2c);
bogdanm	0:9b334a45a8ff	234	static HAL_StatusTypeDef I2C_MasterTransmit_BTF(I2C_HandleTypeDef *hi2c);
bogdanm	0:9b334a45a8ff	235	static HAL_StatusTypeDef I2C_MasterReceive_RXNE(I2C_HandleTypeDef *hi2c);
bogdanm	0:9b334a45a8ff	236	static HAL_StatusTypeDef I2C_MasterReceive_BTF(I2C_HandleTypeDef *hi2c);
bogdanm	0:9b334a45a8ff	237
bogdanm	0:9b334a45a8ff	238	static HAL_StatusTypeDef I2C_SlaveTransmit_TXE(I2C_HandleTypeDef *hi2c);
bogdanm	0:9b334a45a8ff	239	static HAL_StatusTypeDef I2C_SlaveTransmit_BTF(I2C_HandleTypeDef *hi2c);
bogdanm	0:9b334a45a8ff	240	static HAL_StatusTypeDef I2C_SlaveReceive_RXNE(I2C_HandleTypeDef *hi2c);
bogdanm	0:9b334a45a8ff	241	static HAL_StatusTypeDef I2C_SlaveReceive_BTF(I2C_HandleTypeDef *hi2c);
bogdanm	0:9b334a45a8ff	242	static HAL_StatusTypeDef I2C_Slave_ADDR(I2C_HandleTypeDef *hi2c);
bogdanm	0:9b334a45a8ff	243	static HAL_StatusTypeDef I2C_Slave_STOPF(I2C_HandleTypeDef *hi2c);
bogdanm	0:9b334a45a8ff	244	static HAL_StatusTypeDef I2C_Slave_AF(I2C_HandleTypeDef *hi2c);
bogdanm	0:9b334a45a8ff	245	/**
bogdanm	0:9b334a45a8ff	246	* @}
bogdanm	0:9b334a45a8ff	247	*/
bogdanm	0:9b334a45a8ff	248
bogdanm	0:9b334a45a8ff	249
bogdanm	0:9b334a45a8ff	250	/* Exported functions ---------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	251
bogdanm	0:9b334a45a8ff	252	/** @defgroup I2C_Exported_Functions I2C Exported Functions
bogdanm	0:9b334a45a8ff	253	* @{
bogdanm	0:9b334a45a8ff	254	*/
bogdanm	0:9b334a45a8ff	255
bogdanm	0:9b334a45a8ff	256	/** @defgroup I2C_Exported_Functions_Group1 Initialization and de-initialization functions
bogdanm	0:9b334a45a8ff	257	* @brief Initialization and Configuration functions
bogdanm	0:9b334a45a8ff	258	*
bogdanm	0:9b334a45a8ff	259	@verbatim
bogdanm	0:9b334a45a8ff	260	===============================================================================
bogdanm	0:9b334a45a8ff	261	##### Initialization and de-initialization functions #####
bogdanm	0:9b334a45a8ff	262	===============================================================================
bogdanm	0:9b334a45a8ff	263	[..] This subsection provides a set of functions allowing to initialize and
bogdanm	0:9b334a45a8ff	264	de-initialiaze the I2Cx peripheral:
bogdanm	0:9b334a45a8ff	265
bogdanm	0:9b334a45a8ff	266	(+) User must Implement HAL_I2C_MspInit() function in which he configures
bogdanm	0:9b334a45a8ff	267	all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC).
bogdanm	0:9b334a45a8ff	268
bogdanm	0:9b334a45a8ff	269	(+) Call the function HAL_I2C_Init() to configure the selected device with
bogdanm	0:9b334a45a8ff	270	the selected configuration:
bogdanm	0:9b334a45a8ff	271	(++) Communication Speed
bogdanm	0:9b334a45a8ff	272	(++) Duty cycle
bogdanm	0:9b334a45a8ff	273	(++) Addressing mode
bogdanm	0:9b334a45a8ff	274	(++) Own Address 1
bogdanm	0:9b334a45a8ff	275	(++) Dual Addressing mode
bogdanm	0:9b334a45a8ff	276	(++) Own Address 2
bogdanm	0:9b334a45a8ff	277	(++) General call mode
bogdanm	0:9b334a45a8ff	278	(++) Nostretch mode
bogdanm	0:9b334a45a8ff	279
bogdanm	0:9b334a45a8ff	280	(+) Call the function HAL_I2C_DeInit() to restore the default configuration
bogdanm	0:9b334a45a8ff	281	of the selected I2Cx periperal.
bogdanm	0:9b334a45a8ff	282
bogdanm	0:9b334a45a8ff	283	@endverbatim
bogdanm	0:9b334a45a8ff	284	* @{
bogdanm	0:9b334a45a8ff	285	*/
bogdanm	0:9b334a45a8ff	286
bogdanm	0:9b334a45a8ff	287	/**
bogdanm	0:9b334a45a8ff	288	* @brief Initializes the I2C according to the specified parameters
bogdanm	0:9b334a45a8ff	289	* in the I2C_InitTypeDef and create the associated handle.
bogdanm	0:9b334a45a8ff	290	* @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	291	* the configuration information for I2C module
bogdanm	0:9b334a45a8ff	292	* @retval HAL status
bogdanm	0:9b334a45a8ff	293	*/
bogdanm	0:9b334a45a8ff	294	HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c)
bogdanm	0:9b334a45a8ff	295	{
bogdanm	0:9b334a45a8ff	296	uint32_t freqrange = 0;
bogdanm	0:9b334a45a8ff	297	uint32_t pclk1 = 0;
bogdanm	0:9b334a45a8ff	298
bogdanm	0:9b334a45a8ff	299	/* Check the I2C handle allocation */
bogdanm	0:9b334a45a8ff	300	if(hi2c == HAL_NULL)
bogdanm	0:9b334a45a8ff	301	{
bogdanm	0:9b334a45a8ff	302	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	303	}
bogdanm	0:9b334a45a8ff	304
bogdanm	0:9b334a45a8ff	305	/* Check the parameters */
bogdanm	0:9b334a45a8ff	306	assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
bogdanm	0:9b334a45a8ff	307	assert_param(IS_I2C_CLOCK_SPEED(hi2c->Init.ClockSpeed));
bogdanm	0:9b334a45a8ff	308	assert_param(IS_I2C_DUTY_CYCLE(hi2c->Init.DutyCycle));
bogdanm	0:9b334a45a8ff	309	assert_param(IS_I2C_OWN_ADDRESS1(hi2c->Init.OwnAddress1));
bogdanm	0:9b334a45a8ff	310	assert_param(IS_I2C_ADDRESSING_MODE(hi2c->Init.AddressingMode));
bogdanm	0:9b334a45a8ff	311	assert_param(IS_I2C_DUAL_ADDRESS(hi2c->Init.DualAddressMode));
bogdanm	0:9b334a45a8ff	312	assert_param(IS_I2C_OWN_ADDRESS2(hi2c->Init.OwnAddress2));
bogdanm	0:9b334a45a8ff	313	assert_param(IS_I2C_GENERAL_CALL(hi2c->Init.GeneralCallMode));
bogdanm	0:9b334a45a8ff	314	assert_param(IS_I2C_NO_STRETCH(hi2c->Init.NoStretchMode));
bogdanm	0:9b334a45a8ff	315
bogdanm	0:9b334a45a8ff	316	if(hi2c->State == HAL_I2C_STATE_RESET)
bogdanm	0:9b334a45a8ff	317	{
bogdanm	0:9b334a45a8ff	318	/* Init the low level hardware : GPIO, CLOCK, NVIC */
bogdanm	0:9b334a45a8ff	319	HAL_I2C_MspInit(hi2c);
bogdanm	0:9b334a45a8ff	320	}
bogdanm	0:9b334a45a8ff	321
bogdanm	0:9b334a45a8ff	322	/* Get PCLK1 frequency */
bogdanm	0:9b334a45a8ff	323	pclk1 = HAL_RCC_GetPCLK1Freq();
bogdanm	0:9b334a45a8ff	324
bogdanm	0:9b334a45a8ff	325	/* The minimum allowed frequency is 2 MHz */
bogdanm	0:9b334a45a8ff	326	if(pclk1 < I2C_MIN_PCLK_FREQ)
bogdanm	0:9b334a45a8ff	327	{
bogdanm	0:9b334a45a8ff	328	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	329	}
bogdanm	0:9b334a45a8ff	330
bogdanm	0:9b334a45a8ff	331	hi2c->State = HAL_I2C_STATE_BUSY;
bogdanm	0:9b334a45a8ff	332
bogdanm	0:9b334a45a8ff	333	/* Disble the selected I2C peripheral */
bogdanm	0:9b334a45a8ff	334	__HAL_I2C_DISABLE(hi2c);
bogdanm	0:9b334a45a8ff	335
bogdanm	0:9b334a45a8ff	336	/* Calculate frequency range */
bogdanm	0:9b334a45a8ff	337	freqrange = I2C_FREQRANGE(pclk1);
bogdanm	0:9b334a45a8ff	338
bogdanm	0:9b334a45a8ff	339	/---------------------------- I2Cx CR2 Configuration ----------------------/
bogdanm	0:9b334a45a8ff	340	/* Configure I2Cx: Frequency range */
bogdanm	0:9b334a45a8ff	341	MODIFY_REG(hi2c->Instance->CR2, I2C_CR2_FREQ, freqrange);
bogdanm	0:9b334a45a8ff	342
bogdanm	0:9b334a45a8ff	343	/---------------------------- I2Cx TRISE Configuration --------------------/
bogdanm	0:9b334a45a8ff	344	/* Configure I2Cx: Rise Time */
bogdanm	0:9b334a45a8ff	345	MODIFY_REG(hi2c->Instance->TRISE, I2C_TRISE_TRISE, I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed));
bogdanm	0:9b334a45a8ff	346
bogdanm	0:9b334a45a8ff	347	/---------------------------- I2Cx CCR Configuration ----------------------/
bogdanm	0:9b334a45a8ff	348	/* Configure I2Cx: Speed */
bogdanm	0:9b334a45a8ff	349	MODIFY_REG(hi2c->Instance->CCR, (I2C_CCR_FS \| I2C_CCR_DUTY \| I2C_CCR_CCR), I2C_SPEED(pclk1, hi2c->Init.ClockSpeed, hi2c->Init.DutyCycle));
bogdanm	0:9b334a45a8ff	350
bogdanm	0:9b334a45a8ff	351	/---------------------------- I2Cx CR1 Configuration ----------------------/
bogdanm	0:9b334a45a8ff	352	/* Configure I2Cx: Generalcall and NoStretch mode */
bogdanm	0:9b334a45a8ff	353	MODIFY_REG(hi2c->Instance->CR1, (I2C_CR1_ENGC \| I2C_CR1_NOSTRETCH), (hi2c->Init.GeneralCallMode \| hi2c->Init.NoStretchMode));
bogdanm	0:9b334a45a8ff	354
bogdanm	0:9b334a45a8ff	355	/---------------------------- I2Cx OAR1 Configuration ---------------------/
bogdanm	0:9b334a45a8ff	356	/* Configure I2Cx: Own Address1 and addressing mode */
bogdanm	0:9b334a45a8ff	357	MODIFY_REG(hi2c->Instance->OAR1, (I2C_OAR1_ADDMODE \| I2C_OAR1_ADD8_9 \| I2C_OAR1_ADD1_7 \| I2C_OAR1_ADD0), (hi2c->Init.AddressingMode \| hi2c->Init.OwnAddress1));
bogdanm	0:9b334a45a8ff	358
bogdanm	0:9b334a45a8ff	359	/---------------------------- I2Cx OAR2 Configuration ---------------------/
bogdanm	0:9b334a45a8ff	360	/* Configure I2Cx: Dual mode and Own Address2 */
bogdanm	0:9b334a45a8ff	361	MODIFY_REG(hi2c->Instance->OAR2, (I2C_OAR2_ENDUAL \| I2C_OAR2_ADD2), (hi2c->Init.DualAddressMode \| hi2c->Init.OwnAddress2));
bogdanm	0:9b334a45a8ff	362
bogdanm	0:9b334a45a8ff	363	/* Enable the selected I2C peripheral */
bogdanm	0:9b334a45a8ff	364	__HAL_I2C_ENABLE(hi2c);
bogdanm	0:9b334a45a8ff	365
bogdanm	0:9b334a45a8ff	366	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm	0:9b334a45a8ff	367	hi2c->State = HAL_I2C_STATE_READY;
bogdanm	0:9b334a45a8ff	368
bogdanm	0:9b334a45a8ff	369	return HAL_OK;
bogdanm	0:9b334a45a8ff	370	}
bogdanm	0:9b334a45a8ff	371
bogdanm	0:9b334a45a8ff	372	/**
bogdanm	0:9b334a45a8ff	373	* @brief DeInitializes the I2C peripheral.
bogdanm	0:9b334a45a8ff	374	* @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	375	* the configuration information for I2C module
bogdanm	0:9b334a45a8ff	376	* @retval HAL status
bogdanm	0:9b334a45a8ff	377	*/
bogdanm	0:9b334a45a8ff	378	HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c)
bogdanm	0:9b334a45a8ff	379	{
bogdanm	0:9b334a45a8ff	380	/* Check the I2C handle allocation */
bogdanm	0:9b334a45a8ff	381	if(hi2c == HAL_NULL)
bogdanm	0:9b334a45a8ff	382	{
bogdanm	0:9b334a45a8ff	383	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	384	}
bogdanm	0:9b334a45a8ff	385
bogdanm	0:9b334a45a8ff	386	/* Check the parameters */
bogdanm	0:9b334a45a8ff	387	assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
bogdanm	0:9b334a45a8ff	388
bogdanm	0:9b334a45a8ff	389	hi2c->State = HAL_I2C_STATE_BUSY;
bogdanm	0:9b334a45a8ff	390
bogdanm	0:9b334a45a8ff	391	/* Disable the I2C Peripheral Clock */
bogdanm	0:9b334a45a8ff	392	__HAL_I2C_DISABLE(hi2c);
bogdanm	0:9b334a45a8ff	393
bogdanm	0:9b334a45a8ff	394	/* DeInit the low level hardware: GPIO, CLOCK, NVIC */
bogdanm	0:9b334a45a8ff	395	HAL_I2C_MspDeInit(hi2c);
bogdanm	0:9b334a45a8ff	396
bogdanm	0:9b334a45a8ff	397	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm	0:9b334a45a8ff	398
bogdanm	0:9b334a45a8ff	399	hi2c->State = HAL_I2C_STATE_RESET;
bogdanm	0:9b334a45a8ff	400
bogdanm	0:9b334a45a8ff	401	/* Release Lock */
bogdanm	0:9b334a45a8ff	402	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	403
bogdanm	0:9b334a45a8ff	404	return HAL_OK;
bogdanm	0:9b334a45a8ff	405	}
bogdanm	0:9b334a45a8ff	406
bogdanm	0:9b334a45a8ff	407	/**
bogdanm	0:9b334a45a8ff	408	* @brief I2C MSP Init.
bogdanm	0:9b334a45a8ff	409	* @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	410	* the configuration information for I2C module
bogdanm	0:9b334a45a8ff	411	* @retval None
bogdanm	0:9b334a45a8ff	412	*/
bogdanm	0:9b334a45a8ff	413	__weak void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c)
bogdanm	0:9b334a45a8ff	414	{
bogdanm	0:9b334a45a8ff	415	/* NOTE : This function Should not be modified, when the callback is needed,
bogdanm	0:9b334a45a8ff	416	the HAL_I2C_MspInit could be implemented in the user file
bogdanm	0:9b334a45a8ff	417	*/
bogdanm	0:9b334a45a8ff	418	}
bogdanm	0:9b334a45a8ff	419
bogdanm	0:9b334a45a8ff	420	/**
bogdanm	0:9b334a45a8ff	421	* @brief I2C MSP DeInit
bogdanm	0:9b334a45a8ff	422	* @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	423	* the configuration information for I2C module
bogdanm	0:9b334a45a8ff	424	* @retval None
bogdanm	0:9b334a45a8ff	425	*/
bogdanm	0:9b334a45a8ff	426	__weak void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c)
bogdanm	0:9b334a45a8ff	427	{
bogdanm	0:9b334a45a8ff	428	/* NOTE : This function Should not be modified, when the callback is needed,
bogdanm	0:9b334a45a8ff	429	the HAL_I2C_MspDeInit could be implemented in the user file
bogdanm	0:9b334a45a8ff	430	*/
bogdanm	0:9b334a45a8ff	431	}
bogdanm	0:9b334a45a8ff	432
bogdanm	0:9b334a45a8ff	433	/**
bogdanm	0:9b334a45a8ff	434	* @}
bogdanm	0:9b334a45a8ff	435	*/
bogdanm	0:9b334a45a8ff	436
bogdanm	0:9b334a45a8ff	437	/** @defgroup I2C_Exported_Functions_Group2 IO operation functions
bogdanm	0:9b334a45a8ff	438	* @brief Data transfers functions
bogdanm	0:9b334a45a8ff	439	*
bogdanm	0:9b334a45a8ff	440	@verbatim
bogdanm	0:9b334a45a8ff	441	===============================================================================
bogdanm	0:9b334a45a8ff	442	##### IO operation functions #####
bogdanm	0:9b334a45a8ff	443	===============================================================================
bogdanm	0:9b334a45a8ff	444	[..]
bogdanm	0:9b334a45a8ff	445	This subsection provides a set of functions allowing to manage the I2C data
bogdanm	0:9b334a45a8ff	446	transfers.
bogdanm	0:9b334a45a8ff	447
bogdanm	0:9b334a45a8ff	448	(#) There are two modes of transfer:
bogdanm	0:9b334a45a8ff	449	(++) Blocking mode : The communication is performed in the polling mode.
bogdanm	0:9b334a45a8ff	450	The status of all data processing is returned by the same function
bogdanm	0:9b334a45a8ff	451	after finishing transfer.
bogdanm	0:9b334a45a8ff	452	(++) No-Blocking mode : The communication is performed using Interrupts
bogdanm	0:9b334a45a8ff	453	or DMA. These functions return the status of the transfer startup.
bogdanm	0:9b334a45a8ff	454	The end of the data processing will be indicated through the
bogdanm	0:9b334a45a8ff	455	dedicated I2C IRQ when using Interrupt mode or the DMA IRQ when
bogdanm	0:9b334a45a8ff	456	using DMA mode.
bogdanm	0:9b334a45a8ff	457
bogdanm	0:9b334a45a8ff	458	(#) Blocking mode functions are :
bogdanm	0:9b334a45a8ff	459	(++) HAL_I2C_Master_Transmit()
bogdanm	0:9b334a45a8ff	460	(++) HAL_I2C_Master_Receive()
bogdanm	0:9b334a45a8ff	461	(++) HAL_I2C_Slave_Transmit()
bogdanm	0:9b334a45a8ff	462	(++) HAL_I2C_Slave_Receive()
bogdanm	0:9b334a45a8ff	463	(++) HAL_I2C_Mem_Write()
bogdanm	0:9b334a45a8ff	464	(++) HAL_I2C_Mem_Read()
bogdanm	0:9b334a45a8ff	465	(++) HAL_I2C_IsDeviceReady()
bogdanm	0:9b334a45a8ff	466
bogdanm	0:9b334a45a8ff	467	(#) No-Blocking mode functions with Interrupt are :
bogdanm	0:9b334a45a8ff	468	(++) HAL_I2C_Master_Transmit_IT()
bogdanm	0:9b334a45a8ff	469	(++) HAL_I2C_Master_Receive_IT()
bogdanm	0:9b334a45a8ff	470	(++) HAL_I2C_Slave_Transmit_IT()
bogdanm	0:9b334a45a8ff	471	(++) HAL_I2C_Slave_Receive_IT()
bogdanm	0:9b334a45a8ff	472	(++) HAL_I2C_Mem_Write_IT()
bogdanm	0:9b334a45a8ff	473	(++) HAL_I2C_Mem_Read_IT()
bogdanm	0:9b334a45a8ff	474
bogdanm	0:9b334a45a8ff	475	(#) No-Blocking mode functions with DMA are :
bogdanm	0:9b334a45a8ff	476	(++) HAL_I2C_Master_Transmit_DMA()
bogdanm	0:9b334a45a8ff	477	(++) HAL_I2C_Master_Receive_DMA()
bogdanm	0:9b334a45a8ff	478	(++) HAL_I2C_Slave_Transmit_DMA()
bogdanm	0:9b334a45a8ff	479	(++) HAL_I2C_Slave_Receive_DMA()
bogdanm	0:9b334a45a8ff	480	(++) HAL_I2C_Mem_Write_DMA()
bogdanm	0:9b334a45a8ff	481	(++) HAL_I2C_Mem_Read_DMA()
bogdanm	0:9b334a45a8ff	482
bogdanm	0:9b334a45a8ff	483	(#) A set of Transfer Complete Callbacks are provided in non Blocking mode:
bogdanm	0:9b334a45a8ff	484	(++) HAL_I2C_MemTxCpltCallback()
bogdanm	0:9b334a45a8ff	485	(++) HAL_I2C_MemRxCpltCallback()
bogdanm	0:9b334a45a8ff	486	(++) HAL_I2C_MasterTxCpltCallback()
bogdanm	0:9b334a45a8ff	487	(++) HAL_I2C_MasterRxCpltCallback()
bogdanm	0:9b334a45a8ff	488	(++) HAL_I2C_SlaveTxCpltCallback()
bogdanm	0:9b334a45a8ff	489	(++) HAL_I2C_SlaveRxCpltCallback()
bogdanm	0:9b334a45a8ff	490	(++) HAL_I2C_ErrorCallback()
bogdanm	0:9b334a45a8ff	491
bogdanm	0:9b334a45a8ff	492	@endverbatim
bogdanm	0:9b334a45a8ff	493	* @{
bogdanm	0:9b334a45a8ff	494	*/
bogdanm	0:9b334a45a8ff	495
bogdanm	0:9b334a45a8ff	496	/**
bogdanm	0:9b334a45a8ff	497	* @brief Transmits in master mode an amount of data in blocking mode.
bogdanm	0:9b334a45a8ff	498	* @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	499	* the configuration information for I2C module
bogdanm	0:9b334a45a8ff	500	* @param DevAddress: Target device address
bogdanm	0:9b334a45a8ff	501	* @param pData: Pointer to data buffer
bogdanm	0:9b334a45a8ff	502	* @param Size: Amount of data to be sent
bogdanm	0:9b334a45a8ff	503	* @param Timeout: Timeout duration
bogdanm	0:9b334a45a8ff	504	* @retval HAL status
bogdanm	0:9b334a45a8ff	505	*/
bogdanm	0:9b334a45a8ff	506	HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint8_t pData, uint16_t Size, uint32_t Timeout)
bogdanm	0:9b334a45a8ff	507	{
bogdanm	0:9b334a45a8ff	508	if(hi2c->State == HAL_I2C_STATE_READY)
bogdanm	0:9b334a45a8ff	509	{
bogdanm	0:9b334a45a8ff	510	if((pData == HAL_NULL) \|\| (Size == 0))
bogdanm	0:9b334a45a8ff	511	{
bogdanm	0:9b334a45a8ff	512	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	513	}
bogdanm	0:9b334a45a8ff	514
bogdanm	0:9b334a45a8ff	515	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
bogdanm	0:9b334a45a8ff	516	{
bogdanm	0:9b334a45a8ff	517	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	518	}
bogdanm	0:9b334a45a8ff	519
bogdanm	0:9b334a45a8ff	520	/* Process Locked */
bogdanm	0:9b334a45a8ff	521	__HAL_LOCK(hi2c);
bogdanm	0:9b334a45a8ff	522
bogdanm	0:9b334a45a8ff	523	hi2c->State = HAL_I2C_STATE_BUSY_TX;
bogdanm	0:9b334a45a8ff	524	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm	0:9b334a45a8ff	525
bogdanm	0:9b334a45a8ff	526	/* Send Slave Address */
bogdanm	0:9b334a45a8ff	527	if(I2C_MasterRequestWrite(hi2c, DevAddress, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	528	{
bogdanm	0:9b334a45a8ff	529	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm	0:9b334a45a8ff	530	{
bogdanm	0:9b334a45a8ff	531	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	532	}
bogdanm	0:9b334a45a8ff	533	else
bogdanm	0:9b334a45a8ff	534	{
bogdanm	0:9b334a45a8ff	535	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	536	}
bogdanm	0:9b334a45a8ff	537	}
bogdanm	0:9b334a45a8ff	538
bogdanm	0:9b334a45a8ff	539	/* Clear ADDR flag */
bogdanm	0:9b334a45a8ff	540	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
bogdanm	0:9b334a45a8ff	541
bogdanm	0:9b334a45a8ff	542	while(Size > 0)
bogdanm	0:9b334a45a8ff	543	{
bogdanm	0:9b334a45a8ff	544	/* Wait until TXE flag is set */
bogdanm	0:9b334a45a8ff	545	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	546	{
bogdanm	0:9b334a45a8ff	547	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	548	}
bogdanm	0:9b334a45a8ff	549
bogdanm	0:9b334a45a8ff	550	/* Write data to DR */
bogdanm	0:9b334a45a8ff	551	hi2c->Instance->DR = (*pData++);
bogdanm	0:9b334a45a8ff	552	Size--;
bogdanm	0:9b334a45a8ff	553
bogdanm	0:9b334a45a8ff	554	if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (Size != 0))
bogdanm	0:9b334a45a8ff	555	{
bogdanm	0:9b334a45a8ff	556	/* Write data to DR */
bogdanm	0:9b334a45a8ff	557	hi2c->Instance->DR = (*pData++);
bogdanm	0:9b334a45a8ff	558	Size--;
bogdanm	0:9b334a45a8ff	559	}
bogdanm	0:9b334a45a8ff	560	}
bogdanm	0:9b334a45a8ff	561
bogdanm	0:9b334a45a8ff	562	/* Wait until TXE flag is set */
bogdanm	0:9b334a45a8ff	563	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	564	{
bogdanm	0:9b334a45a8ff	565	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	566	}
bogdanm	0:9b334a45a8ff	567
bogdanm	0:9b334a45a8ff	568	/* Generate Stop */
bogdanm	0:9b334a45a8ff	569	SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP);
bogdanm	0:9b334a45a8ff	570
bogdanm	0:9b334a45a8ff	571	/* Wait until BUSY flag is reset */
bogdanm	0:9b334a45a8ff	572	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	573	{
bogdanm	0:9b334a45a8ff	574	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	575	}
bogdanm	0:9b334a45a8ff	576
bogdanm	0:9b334a45a8ff	577	hi2c->State = HAL_I2C_STATE_READY;
bogdanm	0:9b334a45a8ff	578
bogdanm	0:9b334a45a8ff	579	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	580	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	581
bogdanm	0:9b334a45a8ff	582	return HAL_OK;
bogdanm	0:9b334a45a8ff	583	}
bogdanm	0:9b334a45a8ff	584	else
bogdanm	0:9b334a45a8ff	585	{
bogdanm	0:9b334a45a8ff	586	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	587	}
bogdanm	0:9b334a45a8ff	588	}
bogdanm	0:9b334a45a8ff	589
bogdanm	0:9b334a45a8ff	590	/**
bogdanm	0:9b334a45a8ff	591	* @brief Receives in master mode an amount of data in blocking mode.
bogdanm	0:9b334a45a8ff	592	* @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	593	* the configuration information for I2C module
bogdanm	0:9b334a45a8ff	594	* @param DevAddress: Target device address
bogdanm	0:9b334a45a8ff	595	* @param pData: Pointer to data buffer
bogdanm	0:9b334a45a8ff	596	* @param Size: Amount of data to be sent
bogdanm	0:9b334a45a8ff	597	* @param Timeout: Timeout duration
bogdanm	0:9b334a45a8ff	598	* @retval HAL status
bogdanm	0:9b334a45a8ff	599	*/
bogdanm	0:9b334a45a8ff	600	HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint8_t pData, uint16_t Size, uint32_t Timeout)
bogdanm	0:9b334a45a8ff	601	{
bogdanm	0:9b334a45a8ff	602	if(hi2c->State == HAL_I2C_STATE_READY)
bogdanm	0:9b334a45a8ff	603	{
bogdanm	0:9b334a45a8ff	604	if((pData == HAL_NULL) \|\| (Size == 0))
bogdanm	0:9b334a45a8ff	605	{
bogdanm	0:9b334a45a8ff	606	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	607	}
bogdanm	0:9b334a45a8ff	608
bogdanm	0:9b334a45a8ff	609	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
bogdanm	0:9b334a45a8ff	610	{
bogdanm	0:9b334a45a8ff	611	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	612	}
bogdanm	0:9b334a45a8ff	613
bogdanm	0:9b334a45a8ff	614	/* Process Locked */
bogdanm	0:9b334a45a8ff	615	__HAL_LOCK(hi2c);
bogdanm	0:9b334a45a8ff	616
bogdanm	0:9b334a45a8ff	617	hi2c->State = HAL_I2C_STATE_BUSY_RX;
bogdanm	0:9b334a45a8ff	618	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm	0:9b334a45a8ff	619
bogdanm	0:9b334a45a8ff	620	/* Send Slave Address */
bogdanm	0:9b334a45a8ff	621	if(I2C_MasterRequestRead(hi2c, DevAddress, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	622	{
bogdanm	0:9b334a45a8ff	623	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm	0:9b334a45a8ff	624	{
bogdanm	0:9b334a45a8ff	625	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	626	}
bogdanm	0:9b334a45a8ff	627	else
bogdanm	0:9b334a45a8ff	628	{
bogdanm	0:9b334a45a8ff	629	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	630	}
bogdanm	0:9b334a45a8ff	631	}
bogdanm	0:9b334a45a8ff	632
bogdanm	0:9b334a45a8ff	633	if(Size == 1)
bogdanm	0:9b334a45a8ff	634	{
bogdanm	0:9b334a45a8ff	635	/* Disable Acknowledge */
bogdanm	0:9b334a45a8ff	636	CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
bogdanm	0:9b334a45a8ff	637
bogdanm	0:9b334a45a8ff	638	/* Clear ADDR flag */
bogdanm	0:9b334a45a8ff	639	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
bogdanm	0:9b334a45a8ff	640
bogdanm	0:9b334a45a8ff	641	/* Generate Stop */
bogdanm	0:9b334a45a8ff	642	SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
bogdanm	0:9b334a45a8ff	643	}
bogdanm	0:9b334a45a8ff	644	else if(Size == 2)
bogdanm	0:9b334a45a8ff	645	{
bogdanm	0:9b334a45a8ff	646	/* Disable Acknowledge */
bogdanm	0:9b334a45a8ff	647	CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
bogdanm	0:9b334a45a8ff	648
bogdanm	0:9b334a45a8ff	649	/* Enable Pos */
bogdanm	0:9b334a45a8ff	650	SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
bogdanm	0:9b334a45a8ff	651
bogdanm	0:9b334a45a8ff	652	/* Clear ADDR flag */
bogdanm	0:9b334a45a8ff	653	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
bogdanm	0:9b334a45a8ff	654	}
bogdanm	0:9b334a45a8ff	655	else
bogdanm	0:9b334a45a8ff	656	{
bogdanm	0:9b334a45a8ff	657	/* Enable Acknowledge */
bogdanm	0:9b334a45a8ff	658	SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
bogdanm	0:9b334a45a8ff	659
bogdanm	0:9b334a45a8ff	660	/* Clear ADDR flag */
bogdanm	0:9b334a45a8ff	661	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
bogdanm	0:9b334a45a8ff	662	}
bogdanm	0:9b334a45a8ff	663
bogdanm	0:9b334a45a8ff	664	while(Size > 0)
bogdanm	0:9b334a45a8ff	665	{
bogdanm	0:9b334a45a8ff	666	if(Size <= 3)
bogdanm	0:9b334a45a8ff	667	{
bogdanm	0:9b334a45a8ff	668	/* One byte */
bogdanm	0:9b334a45a8ff	669	if(Size == 1)
bogdanm	0:9b334a45a8ff	670	{
bogdanm	0:9b334a45a8ff	671	/* Wait until RXNE flag is set */
bogdanm	0:9b334a45a8ff	672	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	673	{
bogdanm	0:9b334a45a8ff	674	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	675	}
bogdanm	0:9b334a45a8ff	676
bogdanm	0:9b334a45a8ff	677	/* Read data from DR */
bogdanm	0:9b334a45a8ff	678	(*pData++) = hi2c->Instance->DR;
bogdanm	0:9b334a45a8ff	679	Size--;
bogdanm	0:9b334a45a8ff	680	}
bogdanm	0:9b334a45a8ff	681	/* Two bytes */
bogdanm	0:9b334a45a8ff	682	else if(Size == 2)
bogdanm	0:9b334a45a8ff	683	{
bogdanm	0:9b334a45a8ff	684	/* Wait until BTF flag is set */
bogdanm	0:9b334a45a8ff	685	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	686	{
bogdanm	0:9b334a45a8ff	687	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	688	}
bogdanm	0:9b334a45a8ff	689
bogdanm	0:9b334a45a8ff	690	/* Generate Stop */
bogdanm	0:9b334a45a8ff	691	SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP);
bogdanm	0:9b334a45a8ff	692
bogdanm	0:9b334a45a8ff	693	/* Read data from DR */
bogdanm	0:9b334a45a8ff	694	(*pData++) = hi2c->Instance->DR;
bogdanm	0:9b334a45a8ff	695	Size--;
bogdanm	0:9b334a45a8ff	696
bogdanm	0:9b334a45a8ff	697	/* Read data from DR */
bogdanm	0:9b334a45a8ff	698	(*pData++) = hi2c->Instance->DR;
bogdanm	0:9b334a45a8ff	699	Size--;
bogdanm	0:9b334a45a8ff	700	}
bogdanm	0:9b334a45a8ff	701	/* 3 Last bytes */
bogdanm	0:9b334a45a8ff	702	else
bogdanm	0:9b334a45a8ff	703	{
bogdanm	0:9b334a45a8ff	704	/* Wait until BTF flag is set */
bogdanm	0:9b334a45a8ff	705	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	706	{
bogdanm	0:9b334a45a8ff	707	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	708	}
bogdanm	0:9b334a45a8ff	709
bogdanm	0:9b334a45a8ff	710	/* Disable Acknowledge */
bogdanm	0:9b334a45a8ff	711	CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
bogdanm	0:9b334a45a8ff	712
bogdanm	0:9b334a45a8ff	713	/* Read data from DR */
bogdanm	0:9b334a45a8ff	714	(*pData++) = hi2c->Instance->DR;
bogdanm	0:9b334a45a8ff	715	Size--;
bogdanm	0:9b334a45a8ff	716
bogdanm	0:9b334a45a8ff	717	/* Wait until BTF flag is set */
bogdanm	0:9b334a45a8ff	718	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	719	{
bogdanm	0:9b334a45a8ff	720	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	721	}
bogdanm	0:9b334a45a8ff	722
bogdanm	0:9b334a45a8ff	723	/* Generate Stop */
bogdanm	0:9b334a45a8ff	724	SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP);
bogdanm	0:9b334a45a8ff	725
bogdanm	0:9b334a45a8ff	726	/* Read data from DR */
bogdanm	0:9b334a45a8ff	727	(*pData++) = hi2c->Instance->DR;
bogdanm	0:9b334a45a8ff	728	Size--;
bogdanm	0:9b334a45a8ff	729
bogdanm	0:9b334a45a8ff	730	/* Read data from DR */
bogdanm	0:9b334a45a8ff	731	(*pData++) = hi2c->Instance->DR;
bogdanm	0:9b334a45a8ff	732	Size--;
bogdanm	0:9b334a45a8ff	733	}
bogdanm	0:9b334a45a8ff	734	}
bogdanm	0:9b334a45a8ff	735	else
bogdanm	0:9b334a45a8ff	736	{
bogdanm	0:9b334a45a8ff	737	/* Wait until RXNE flag is set */
bogdanm	0:9b334a45a8ff	738	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	739	{
bogdanm	0:9b334a45a8ff	740	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	741	}
bogdanm	0:9b334a45a8ff	742
bogdanm	0:9b334a45a8ff	743	/* Read data from DR */
bogdanm	0:9b334a45a8ff	744	(*pData++) = hi2c->Instance->DR;
bogdanm	0:9b334a45a8ff	745	Size--;
bogdanm	0:9b334a45a8ff	746
bogdanm	0:9b334a45a8ff	747	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET)
bogdanm	0:9b334a45a8ff	748	{
bogdanm	0:9b334a45a8ff	749	/* Read data from DR */
bogdanm	0:9b334a45a8ff	750	(*pData++) = hi2c->Instance->DR;
bogdanm	0:9b334a45a8ff	751	Size--;
bogdanm	0:9b334a45a8ff	752	}
bogdanm	0:9b334a45a8ff	753	}
bogdanm	0:9b334a45a8ff	754	}
bogdanm	0:9b334a45a8ff	755
bogdanm	0:9b334a45a8ff	756	/* Disable Pos */
bogdanm	0:9b334a45a8ff	757	CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
bogdanm	0:9b334a45a8ff	758
bogdanm	0:9b334a45a8ff	759	/* Wait until BUSY flag is reset */
bogdanm	0:9b334a45a8ff	760	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	761	{
bogdanm	0:9b334a45a8ff	762	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	763	}
bogdanm	0:9b334a45a8ff	764
bogdanm	0:9b334a45a8ff	765	hi2c->State = HAL_I2C_STATE_READY;
bogdanm	0:9b334a45a8ff	766
bogdanm	0:9b334a45a8ff	767	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	768	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	769
bogdanm	0:9b334a45a8ff	770	return HAL_OK;
bogdanm	0:9b334a45a8ff	771	}
bogdanm	0:9b334a45a8ff	772	else
bogdanm	0:9b334a45a8ff	773	{
bogdanm	0:9b334a45a8ff	774	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	775	}
bogdanm	0:9b334a45a8ff	776	}
bogdanm	0:9b334a45a8ff	777
bogdanm	0:9b334a45a8ff	778	/**
bogdanm	0:9b334a45a8ff	779	* @brief Transmits in slave mode an amount of data in blocking mode.
bogdanm	0:9b334a45a8ff	780	* @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	781	* the configuration information for I2C module
bogdanm	0:9b334a45a8ff	782	* @param pData: Pointer to data buffer
bogdanm	0:9b334a45a8ff	783	* @param Size: Amount of data to be sent
bogdanm	0:9b334a45a8ff	784	* @param Timeout: Timeout duration
bogdanm	0:9b334a45a8ff	785	* @retval HAL status
bogdanm	0:9b334a45a8ff	786	*/
bogdanm	0:9b334a45a8ff	787	HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef hi2c, uint8_t pData, uint16_t Size, uint32_t Timeout)
bogdanm	0:9b334a45a8ff	788	{
bogdanm	0:9b334a45a8ff	789	if(hi2c->State == HAL_I2C_STATE_READY)
bogdanm	0:9b334a45a8ff	790	{
bogdanm	0:9b334a45a8ff	791	if((pData == HAL_NULL) \|\| (Size == 0))
bogdanm	0:9b334a45a8ff	792	{
bogdanm	0:9b334a45a8ff	793	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	794	}
bogdanm	0:9b334a45a8ff	795
bogdanm	0:9b334a45a8ff	796	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
bogdanm	0:9b334a45a8ff	797	{
bogdanm	0:9b334a45a8ff	798	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	799	}
bogdanm	0:9b334a45a8ff	800
bogdanm	0:9b334a45a8ff	801	/* Process Locked */
bogdanm	0:9b334a45a8ff	802	__HAL_LOCK(hi2c);
bogdanm	0:9b334a45a8ff	803
bogdanm	0:9b334a45a8ff	804	hi2c->State = HAL_I2C_STATE_BUSY_TX;
bogdanm	0:9b334a45a8ff	805	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm	0:9b334a45a8ff	806
bogdanm	0:9b334a45a8ff	807	/* Enable Address Acknowledge */
bogdanm	0:9b334a45a8ff	808	SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
bogdanm	0:9b334a45a8ff	809
bogdanm	0:9b334a45a8ff	810	/* Wait until ADDR flag is set */
bogdanm	0:9b334a45a8ff	811	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	812	{
bogdanm	0:9b334a45a8ff	813	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	814	}
bogdanm	0:9b334a45a8ff	815
bogdanm	0:9b334a45a8ff	816	/* Clear ADDR flag */
bogdanm	0:9b334a45a8ff	817	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
bogdanm	0:9b334a45a8ff	818
bogdanm	0:9b334a45a8ff	819	/* If 10bit addressing mode is selected */
bogdanm	0:9b334a45a8ff	820	if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT)
bogdanm	0:9b334a45a8ff	821	{
bogdanm	0:9b334a45a8ff	822	/* Wait until ADDR flag is set */
bogdanm	0:9b334a45a8ff	823	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	824	{
bogdanm	0:9b334a45a8ff	825	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	826	}
bogdanm	0:9b334a45a8ff	827
bogdanm	0:9b334a45a8ff	828	/* Clear ADDR flag */
bogdanm	0:9b334a45a8ff	829	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
bogdanm	0:9b334a45a8ff	830	}
bogdanm	0:9b334a45a8ff	831
bogdanm	0:9b334a45a8ff	832	while(Size > 0)
bogdanm	0:9b334a45a8ff	833	{
bogdanm	0:9b334a45a8ff	834	/* Wait until TXE flag is set */
bogdanm	0:9b334a45a8ff	835	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	836	{
bogdanm	0:9b334a45a8ff	837	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	838	}
bogdanm	0:9b334a45a8ff	839
bogdanm	0:9b334a45a8ff	840	/* Write data to DR */
bogdanm	0:9b334a45a8ff	841	hi2c->Instance->DR = (*pData++);
bogdanm	0:9b334a45a8ff	842	Size--;
bogdanm	0:9b334a45a8ff	843
bogdanm	0:9b334a45a8ff	844	if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (Size != 0))
bogdanm	0:9b334a45a8ff	845	{
bogdanm	0:9b334a45a8ff	846	/* Write data to DR */
bogdanm	0:9b334a45a8ff	847	hi2c->Instance->DR = (*pData++);
bogdanm	0:9b334a45a8ff	848	Size--;
bogdanm	0:9b334a45a8ff	849	}
bogdanm	0:9b334a45a8ff	850	}
bogdanm	0:9b334a45a8ff	851
bogdanm	0:9b334a45a8ff	852	/* Wait until AF flag is set */
bogdanm	0:9b334a45a8ff	853	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_AF, RESET, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	854	{
bogdanm	0:9b334a45a8ff	855	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	856	}
bogdanm	0:9b334a45a8ff	857
bogdanm	0:9b334a45a8ff	858	/* Clear AF flag */
bogdanm	0:9b334a45a8ff	859	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
bogdanm	0:9b334a45a8ff	860
bogdanm	0:9b334a45a8ff	861	/* Disable Address Acknowledge */
bogdanm	0:9b334a45a8ff	862	CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
bogdanm	0:9b334a45a8ff	863
bogdanm	0:9b334a45a8ff	864	/* Wait until BUSY flag is reset */
bogdanm	0:9b334a45a8ff	865	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	866	{
bogdanm	0:9b334a45a8ff	867	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	868	}
bogdanm	0:9b334a45a8ff	869
bogdanm	0:9b334a45a8ff	870	hi2c->State = HAL_I2C_STATE_READY;
bogdanm	0:9b334a45a8ff	871
bogdanm	0:9b334a45a8ff	872	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	873	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	874
bogdanm	0:9b334a45a8ff	875	return HAL_OK;
bogdanm	0:9b334a45a8ff	876	}
bogdanm	0:9b334a45a8ff	877	else
bogdanm	0:9b334a45a8ff	878	{
bogdanm	0:9b334a45a8ff	879	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	880	}
bogdanm	0:9b334a45a8ff	881	}
bogdanm	0:9b334a45a8ff	882
bogdanm	0:9b334a45a8ff	883	/**
bogdanm	0:9b334a45a8ff	884	* @brief Receive in slave mode an amount of data in blocking mode
bogdanm	0:9b334a45a8ff	885	* @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	886	* the configuration information for I2C module
bogdanm	0:9b334a45a8ff	887	* @param pData: Pointer to data buffer
bogdanm	0:9b334a45a8ff	888	* @param Size: Amount of data to be sent
bogdanm	0:9b334a45a8ff	889	* @param Timeout: Timeout duration
bogdanm	0:9b334a45a8ff	890	* @retval HAL status
bogdanm	0:9b334a45a8ff	891	*/
bogdanm	0:9b334a45a8ff	892	HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef hi2c, uint8_t pData, uint16_t Size, uint32_t Timeout)
bogdanm	0:9b334a45a8ff	893	{
bogdanm	0:9b334a45a8ff	894	if(hi2c->State == HAL_I2C_STATE_READY)
bogdanm	0:9b334a45a8ff	895	{
bogdanm	0:9b334a45a8ff	896	if((pData == HAL_NULL) \|\| (Size == 0))
bogdanm	0:9b334a45a8ff	897	{
bogdanm	0:9b334a45a8ff	898	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	899	}
bogdanm	0:9b334a45a8ff	900
bogdanm	0:9b334a45a8ff	901	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
bogdanm	0:9b334a45a8ff	902	{
bogdanm	0:9b334a45a8ff	903	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	904	}
bogdanm	0:9b334a45a8ff	905
bogdanm	0:9b334a45a8ff	906	/* Process Locked */
bogdanm	0:9b334a45a8ff	907	__HAL_LOCK(hi2c);
bogdanm	0:9b334a45a8ff	908
bogdanm	0:9b334a45a8ff	909	hi2c->State = HAL_I2C_STATE_BUSY_RX;
bogdanm	0:9b334a45a8ff	910	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm	0:9b334a45a8ff	911
bogdanm	0:9b334a45a8ff	912	/* Enable Address Acknowledge */
bogdanm	0:9b334a45a8ff	913	SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
bogdanm	0:9b334a45a8ff	914
bogdanm	0:9b334a45a8ff	915	/* Wait until ADDR flag is set */
bogdanm	0:9b334a45a8ff	916	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	917	{
bogdanm	0:9b334a45a8ff	918	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	919	}
bogdanm	0:9b334a45a8ff	920
bogdanm	0:9b334a45a8ff	921	/* Clear ADDR flag */
bogdanm	0:9b334a45a8ff	922	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
bogdanm	0:9b334a45a8ff	923
bogdanm	0:9b334a45a8ff	924	while(Size > 0)
bogdanm	0:9b334a45a8ff	925	{
bogdanm	0:9b334a45a8ff	926	/* Wait until RXNE flag is set */
bogdanm	0:9b334a45a8ff	927	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	928	{
bogdanm	0:9b334a45a8ff	929	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	930	}
bogdanm	0:9b334a45a8ff	931
bogdanm	0:9b334a45a8ff	932	/* Read data from DR */
bogdanm	0:9b334a45a8ff	933	(*pData++) = hi2c->Instance->DR;
bogdanm	0:9b334a45a8ff	934	Size--;
bogdanm	0:9b334a45a8ff	935
bogdanm	0:9b334a45a8ff	936	if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (Size != 0))
bogdanm	0:9b334a45a8ff	937	{
bogdanm	0:9b334a45a8ff	938	/* Read data from DR */
bogdanm	0:9b334a45a8ff	939	(*pData++) = hi2c->Instance->DR;
bogdanm	0:9b334a45a8ff	940	Size--;
bogdanm	0:9b334a45a8ff	941	}
bogdanm	0:9b334a45a8ff	942	}
bogdanm	0:9b334a45a8ff	943
bogdanm	0:9b334a45a8ff	944	/* Wait until STOP flag is set */
bogdanm	0:9b334a45a8ff	945	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_STOPF, RESET, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	946	{
bogdanm	0:9b334a45a8ff	947	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	948	}
bogdanm	0:9b334a45a8ff	949
bogdanm	0:9b334a45a8ff	950	/* Clear STOP flag */
bogdanm	0:9b334a45a8ff	951	__HAL_I2C_CLEAR_STOPFLAG(hi2c);
bogdanm	0:9b334a45a8ff	952
bogdanm	0:9b334a45a8ff	953	/* Disable Address Acknowledge */
bogdanm	0:9b334a45a8ff	954	CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
bogdanm	0:9b334a45a8ff	955
bogdanm	0:9b334a45a8ff	956	/* Wait until BUSY flag is reset */
bogdanm	0:9b334a45a8ff	957	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	958	{
bogdanm	0:9b334a45a8ff	959	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	960	}
bogdanm	0:9b334a45a8ff	961
bogdanm	0:9b334a45a8ff	962	hi2c->State = HAL_I2C_STATE_READY;
bogdanm	0:9b334a45a8ff	963
bogdanm	0:9b334a45a8ff	964	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	965	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	966
bogdanm	0:9b334a45a8ff	967	return HAL_OK;
bogdanm	0:9b334a45a8ff	968	}
bogdanm	0:9b334a45a8ff	969	else
bogdanm	0:9b334a45a8ff	970	{
bogdanm	0:9b334a45a8ff	971	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	972	}
bogdanm	0:9b334a45a8ff	973	}
bogdanm	0:9b334a45a8ff	974
bogdanm	0:9b334a45a8ff	975	/**
bogdanm	0:9b334a45a8ff	976	* @brief Transmit in master mode an amount of data in no-blocking mode with Interrupt
bogdanm	0:9b334a45a8ff	977	* @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	978	* the configuration information for I2C module
bogdanm	0:9b334a45a8ff	979	* @param DevAddress: Target device address
bogdanm	0:9b334a45a8ff	980	* @param pData: Pointer to data buffer
bogdanm	0:9b334a45a8ff	981	* @param Size: Amount of data to be sent
bogdanm	0:9b334a45a8ff	982	* @retval HAL status
bogdanm	0:9b334a45a8ff	983	*/
bogdanm	0:9b334a45a8ff	984	HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint8_t pData, uint16_t Size)
bogdanm	0:9b334a45a8ff	985	{
bogdanm	0:9b334a45a8ff	986	if(hi2c->State == HAL_I2C_STATE_READY)
bogdanm	0:9b334a45a8ff	987	{
bogdanm	0:9b334a45a8ff	988	if((pData == HAL_NULL) \|\| (Size == 0))
bogdanm	0:9b334a45a8ff	989	{
bogdanm	0:9b334a45a8ff	990	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	991	}
bogdanm	0:9b334a45a8ff	992
bogdanm	0:9b334a45a8ff	993	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
bogdanm	0:9b334a45a8ff	994	{
bogdanm	0:9b334a45a8ff	995	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	996	}
bogdanm	0:9b334a45a8ff	997
bogdanm	0:9b334a45a8ff	998	/* Process Locked */
bogdanm	0:9b334a45a8ff	999	__HAL_LOCK(hi2c);
bogdanm	0:9b334a45a8ff	1000
bogdanm	0:9b334a45a8ff	1001	hi2c->State = HAL_I2C_STATE_BUSY_TX;
bogdanm	0:9b334a45a8ff	1002	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm	0:9b334a45a8ff	1003
bogdanm	0:9b334a45a8ff	1004	hi2c->pBuffPtr = pData;
bogdanm	0:9b334a45a8ff	1005	hi2c->XferSize = Size;
bogdanm	0:9b334a45a8ff	1006	hi2c->XferCount = Size;
bogdanm	0:9b334a45a8ff	1007
bogdanm	0:9b334a45a8ff	1008	/* Send Slave Address */
bogdanm	0:9b334a45a8ff	1009	if(I2C_MasterRequestWrite(hi2c, DevAddress, I2C_TIMEOUT_FLAG) != HAL_OK)
bogdanm	0:9b334a45a8ff	1010	{
bogdanm	0:9b334a45a8ff	1011	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm	0:9b334a45a8ff	1012	{
bogdanm	0:9b334a45a8ff	1013	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	1014	}
bogdanm	0:9b334a45a8ff	1015	else
bogdanm	0:9b334a45a8ff	1016	{
bogdanm	0:9b334a45a8ff	1017	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	1018	}
bogdanm	0:9b334a45a8ff	1019	}
bogdanm	0:9b334a45a8ff	1020
bogdanm	0:9b334a45a8ff	1021	/* Clear ADDR flag */
bogdanm	0:9b334a45a8ff	1022	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
bogdanm	0:9b334a45a8ff	1023
bogdanm	0:9b334a45a8ff	1024	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1025	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	1026
bogdanm	0:9b334a45a8ff	1027	/* Note : The I2C interrupts must be enabled after unlocking current process
bogdanm	0:9b334a45a8ff	1028	to avoid the risk of I2C interrupt handle execution before current
bogdanm	0:9b334a45a8ff	1029	process unlock */
bogdanm	0:9b334a45a8ff	1030
bogdanm	0:9b334a45a8ff	1031	/* Enable EVT, BUF and ERR interrupt */
bogdanm	0:9b334a45a8ff	1032	__HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
bogdanm	0:9b334a45a8ff	1033
bogdanm	0:9b334a45a8ff	1034	return HAL_OK;
bogdanm	0:9b334a45a8ff	1035	}
bogdanm	0:9b334a45a8ff	1036	else
bogdanm	0:9b334a45a8ff	1037	{
bogdanm	0:9b334a45a8ff	1038	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	1039	}
bogdanm	0:9b334a45a8ff	1040	}
bogdanm	0:9b334a45a8ff	1041
bogdanm	0:9b334a45a8ff	1042	/**
bogdanm	0:9b334a45a8ff	1043	* @brief Receive in master mode an amount of data in no-blocking mode with Interrupt
bogdanm	0:9b334a45a8ff	1044	* @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	1045	* the configuration information for I2C module
bogdanm	0:9b334a45a8ff	1046	* @param DevAddress: Target device address
bogdanm	0:9b334a45a8ff	1047	* @param pData: Pointer to data buffer
bogdanm	0:9b334a45a8ff	1048	* @param Size: Amount of data to be sent
bogdanm	0:9b334a45a8ff	1049	* @retval HAL status
bogdanm	0:9b334a45a8ff	1050	*/
bogdanm	0:9b334a45a8ff	1051	HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint8_t pData, uint16_t Size)
bogdanm	0:9b334a45a8ff	1052	{
bogdanm	0:9b334a45a8ff	1053	if(hi2c->State == HAL_I2C_STATE_READY)
bogdanm	0:9b334a45a8ff	1054	{
bogdanm	0:9b334a45a8ff	1055	if((pData == HAL_NULL) \|\| (Size == 0))
bogdanm	0:9b334a45a8ff	1056	{
bogdanm	0:9b334a45a8ff	1057	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	1058	}
bogdanm	0:9b334a45a8ff	1059
bogdanm	0:9b334a45a8ff	1060	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
bogdanm	0:9b334a45a8ff	1061	{
bogdanm	0:9b334a45a8ff	1062	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	1063	}
bogdanm	0:9b334a45a8ff	1064
bogdanm	0:9b334a45a8ff	1065	/* Process Locked */
bogdanm	0:9b334a45a8ff	1066	__HAL_LOCK(hi2c);
bogdanm	0:9b334a45a8ff	1067
bogdanm	0:9b334a45a8ff	1068	hi2c->State = HAL_I2C_STATE_BUSY_RX;
bogdanm	0:9b334a45a8ff	1069	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm	0:9b334a45a8ff	1070
bogdanm	0:9b334a45a8ff	1071	hi2c->pBuffPtr = pData;
bogdanm	0:9b334a45a8ff	1072	hi2c->XferSize = Size;
bogdanm	0:9b334a45a8ff	1073	hi2c->XferCount = Size;
bogdanm	0:9b334a45a8ff	1074
bogdanm	0:9b334a45a8ff	1075	/* Send Slave Address */
bogdanm	0:9b334a45a8ff	1076	if(I2C_MasterRequestRead(hi2c, DevAddress, I2C_TIMEOUT_FLAG) != HAL_OK)
bogdanm	0:9b334a45a8ff	1077	{
bogdanm	0:9b334a45a8ff	1078	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm	0:9b334a45a8ff	1079	{
bogdanm	0:9b334a45a8ff	1080	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	1081	}
bogdanm	0:9b334a45a8ff	1082	else
bogdanm	0:9b334a45a8ff	1083	{
bogdanm	0:9b334a45a8ff	1084	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	1085	}
bogdanm	0:9b334a45a8ff	1086	}
bogdanm	0:9b334a45a8ff	1087
bogdanm	0:9b334a45a8ff	1088	if(hi2c->XferCount == 1)
bogdanm	0:9b334a45a8ff	1089	{
bogdanm	0:9b334a45a8ff	1090	/* Disable Acknowledge */
bogdanm	0:9b334a45a8ff	1091	CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
bogdanm	0:9b334a45a8ff	1092
bogdanm	0:9b334a45a8ff	1093	/* Clear ADDR flag */
bogdanm	0:9b334a45a8ff	1094	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
bogdanm	0:9b334a45a8ff	1095
bogdanm	0:9b334a45a8ff	1096	/* Generate Stop */
bogdanm	0:9b334a45a8ff	1097	SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP);
bogdanm	0:9b334a45a8ff	1098	}
bogdanm	0:9b334a45a8ff	1099	else if(hi2c->XferCount == 2)
bogdanm	0:9b334a45a8ff	1100	{
bogdanm	0:9b334a45a8ff	1101	/* Disable Acknowledge */
bogdanm	0:9b334a45a8ff	1102	CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
bogdanm	0:9b334a45a8ff	1103
bogdanm	0:9b334a45a8ff	1104	/* Enable Pos */
bogdanm	0:9b334a45a8ff	1105	SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
bogdanm	0:9b334a45a8ff	1106
bogdanm	0:9b334a45a8ff	1107	/* Clear ADDR flag */
bogdanm	0:9b334a45a8ff	1108	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
bogdanm	0:9b334a45a8ff	1109	}
bogdanm	0:9b334a45a8ff	1110	else
bogdanm	0:9b334a45a8ff	1111	{
bogdanm	0:9b334a45a8ff	1112	/* Enable Acknowledge */
bogdanm	0:9b334a45a8ff	1113	SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
bogdanm	0:9b334a45a8ff	1114
bogdanm	0:9b334a45a8ff	1115	/* Clear ADDR flag */
bogdanm	0:9b334a45a8ff	1116	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
bogdanm	0:9b334a45a8ff	1117	}
bogdanm	0:9b334a45a8ff	1118
bogdanm	0:9b334a45a8ff	1119	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1120	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	1121
bogdanm	0:9b334a45a8ff	1122	/* Note : The I2C interrupts must be enabled after unlocking current process
bogdanm	0:9b334a45a8ff	1123	to avoid the risk of I2C interrupt handle execution before current
bogdanm	0:9b334a45a8ff	1124	process unlock */
bogdanm	0:9b334a45a8ff	1125
bogdanm	0:9b334a45a8ff	1126	/* Enable EVT, BUF and ERR interrupt */
bogdanm	0:9b334a45a8ff	1127	__HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
bogdanm	0:9b334a45a8ff	1128
bogdanm	0:9b334a45a8ff	1129	return HAL_OK;
bogdanm	0:9b334a45a8ff	1130	}
bogdanm	0:9b334a45a8ff	1131	else
bogdanm	0:9b334a45a8ff	1132	{
bogdanm	0:9b334a45a8ff	1133	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	1134	}
bogdanm	0:9b334a45a8ff	1135	}
bogdanm	0:9b334a45a8ff	1136
bogdanm	0:9b334a45a8ff	1137	/**
bogdanm	0:9b334a45a8ff	1138	* @brief Transmit in slave mode an amount of data in no-blocking mode with Interrupt
bogdanm	0:9b334a45a8ff	1139	* @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	1140	* the configuration information for I2C module
bogdanm	0:9b334a45a8ff	1141	* @param pData: Pointer to data buffer
bogdanm	0:9b334a45a8ff	1142	* @param Size: Amount of data to be sent
bogdanm	0:9b334a45a8ff	1143	* @retval HAL status
bogdanm	0:9b334a45a8ff	1144	*/
bogdanm	0:9b334a45a8ff	1145	HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef hi2c, uint8_t pData, uint16_t Size)
bogdanm	0:9b334a45a8ff	1146	{
bogdanm	0:9b334a45a8ff	1147	if(hi2c->State == HAL_I2C_STATE_READY)
bogdanm	0:9b334a45a8ff	1148	{
bogdanm	0:9b334a45a8ff	1149	if((pData == HAL_NULL) \|\| (Size == 0))
bogdanm	0:9b334a45a8ff	1150	{
bogdanm	0:9b334a45a8ff	1151	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	1152	}
bogdanm	0:9b334a45a8ff	1153
bogdanm	0:9b334a45a8ff	1154	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
bogdanm	0:9b334a45a8ff	1155	{
bogdanm	0:9b334a45a8ff	1156	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	1157	}
bogdanm	0:9b334a45a8ff	1158
bogdanm	0:9b334a45a8ff	1159	/* Process Locked */
bogdanm	0:9b334a45a8ff	1160	__HAL_LOCK(hi2c);
bogdanm	0:9b334a45a8ff	1161
bogdanm	0:9b334a45a8ff	1162	hi2c->State = HAL_I2C_STATE_BUSY_TX;
bogdanm	0:9b334a45a8ff	1163	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm	0:9b334a45a8ff	1164
bogdanm	0:9b334a45a8ff	1165	hi2c->pBuffPtr = pData;
bogdanm	0:9b334a45a8ff	1166	hi2c->XferSize = Size;
bogdanm	0:9b334a45a8ff	1167	hi2c->XferCount = Size;
bogdanm	0:9b334a45a8ff	1168
bogdanm	0:9b334a45a8ff	1169	/* Enable Address Acknowledge */
bogdanm	0:9b334a45a8ff	1170	SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
bogdanm	0:9b334a45a8ff	1171
bogdanm	0:9b334a45a8ff	1172	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1173	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	1174
bogdanm	0:9b334a45a8ff	1175	/* Note : The I2C interrupts must be enabled after unlocking current process
bogdanm	0:9b334a45a8ff	1176	to avoid the risk of I2C interrupt handle execution before current
bogdanm	0:9b334a45a8ff	1177	process unlock */
bogdanm	0:9b334a45a8ff	1178
bogdanm	0:9b334a45a8ff	1179	/* Enable EVT, BUF and ERR interrupt */
bogdanm	0:9b334a45a8ff	1180	__HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
bogdanm	0:9b334a45a8ff	1181
bogdanm	0:9b334a45a8ff	1182	return HAL_OK;
bogdanm	0:9b334a45a8ff	1183	}
bogdanm	0:9b334a45a8ff	1184	else
bogdanm	0:9b334a45a8ff	1185	{
bogdanm	0:9b334a45a8ff	1186	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	1187	}
bogdanm	0:9b334a45a8ff	1188	}
bogdanm	0:9b334a45a8ff	1189
bogdanm	0:9b334a45a8ff	1190	/**
bogdanm	0:9b334a45a8ff	1191	* @brief Receive in slave mode an amount of data in no-blocking mode with Interrupt
bogdanm	0:9b334a45a8ff	1192	* @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	1193	* the configuration information for I2C module
bogdanm	0:9b334a45a8ff	1194	* @param pData: Pointer to data buffer
bogdanm	0:9b334a45a8ff	1195	* @param Size: Amount of data to be sent
bogdanm	0:9b334a45a8ff	1196	* @retval HAL status
bogdanm	0:9b334a45a8ff	1197	*/
bogdanm	0:9b334a45a8ff	1198	HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef hi2c, uint8_t pData, uint16_t Size)
bogdanm	0:9b334a45a8ff	1199	{
bogdanm	0:9b334a45a8ff	1200	if(hi2c->State == HAL_I2C_STATE_READY)
bogdanm	0:9b334a45a8ff	1201	{
bogdanm	0:9b334a45a8ff	1202	if((pData == HAL_NULL) \|\| (Size == 0))
bogdanm	0:9b334a45a8ff	1203	{
bogdanm	0:9b334a45a8ff	1204	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	1205	}
bogdanm	0:9b334a45a8ff	1206
bogdanm	0:9b334a45a8ff	1207	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
bogdanm	0:9b334a45a8ff	1208	{
bogdanm	0:9b334a45a8ff	1209	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	1210	}
bogdanm	0:9b334a45a8ff	1211
bogdanm	0:9b334a45a8ff	1212	/* Process Locked */
bogdanm	0:9b334a45a8ff	1213	__HAL_LOCK(hi2c);
bogdanm	0:9b334a45a8ff	1214
bogdanm	0:9b334a45a8ff	1215	hi2c->State = HAL_I2C_STATE_BUSY_RX;
bogdanm	0:9b334a45a8ff	1216	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm	0:9b334a45a8ff	1217
bogdanm	0:9b334a45a8ff	1218	hi2c->pBuffPtr = pData;
bogdanm	0:9b334a45a8ff	1219	hi2c->XferSize = Size;
bogdanm	0:9b334a45a8ff	1220	hi2c->XferCount = Size;
bogdanm	0:9b334a45a8ff	1221
bogdanm	0:9b334a45a8ff	1222	/* Enable Address Acknowledge */
bogdanm	0:9b334a45a8ff	1223	SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
bogdanm	0:9b334a45a8ff	1224
bogdanm	0:9b334a45a8ff	1225	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1226	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	1227
bogdanm	0:9b334a45a8ff	1228	/* Note : The I2C interrupts must be enabled after unlocking current process
bogdanm	0:9b334a45a8ff	1229	to avoid the risk of I2C interrupt handle execution before current
bogdanm	0:9b334a45a8ff	1230	process unlock */
bogdanm	0:9b334a45a8ff	1231
bogdanm	0:9b334a45a8ff	1232	/* Enable EVT, BUF and ERR interrupt */
bogdanm	0:9b334a45a8ff	1233	__HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
bogdanm	0:9b334a45a8ff	1234
bogdanm	0:9b334a45a8ff	1235	return HAL_OK;
bogdanm	0:9b334a45a8ff	1236	}
bogdanm	0:9b334a45a8ff	1237	else
bogdanm	0:9b334a45a8ff	1238	{
bogdanm	0:9b334a45a8ff	1239	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	1240	}
bogdanm	0:9b334a45a8ff	1241	}
bogdanm	0:9b334a45a8ff	1242
bogdanm	0:9b334a45a8ff	1243	/**
bogdanm	0:9b334a45a8ff	1244	* @brief Transmit in master mode an amount of data in no-blocking mode with DMA
bogdanm	0:9b334a45a8ff	1245	* @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	1246	* the configuration information for I2C module
bogdanm	0:9b334a45a8ff	1247	* @param DevAddress: Target device address
bogdanm	0:9b334a45a8ff	1248	* @param pData: Pointer to data buffer
bogdanm	0:9b334a45a8ff	1249	* @param Size: Amount of data to be sent
bogdanm	0:9b334a45a8ff	1250	* @retval HAL status
bogdanm	0:9b334a45a8ff	1251	*/
bogdanm	0:9b334a45a8ff	1252	HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint8_t pData, uint16_t Size)
bogdanm	0:9b334a45a8ff	1253	{
bogdanm	0:9b334a45a8ff	1254	if(hi2c->State == HAL_I2C_STATE_READY)
bogdanm	0:9b334a45a8ff	1255	{
bogdanm	0:9b334a45a8ff	1256	if((pData == HAL_NULL) \|\| (Size == 0))
bogdanm	0:9b334a45a8ff	1257	{
bogdanm	0:9b334a45a8ff	1258	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	1259	}
bogdanm	0:9b334a45a8ff	1260
bogdanm	0:9b334a45a8ff	1261	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
bogdanm	0:9b334a45a8ff	1262	{
bogdanm	0:9b334a45a8ff	1263	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	1264	}
bogdanm	0:9b334a45a8ff	1265
bogdanm	0:9b334a45a8ff	1266	/* Process Locked */
bogdanm	0:9b334a45a8ff	1267	__HAL_LOCK(hi2c);
bogdanm	0:9b334a45a8ff	1268
bogdanm	0:9b334a45a8ff	1269	hi2c->State = HAL_I2C_STATE_BUSY_TX;
bogdanm	0:9b334a45a8ff	1270	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm	0:9b334a45a8ff	1271
bogdanm	0:9b334a45a8ff	1272	hi2c->pBuffPtr = pData;
bogdanm	0:9b334a45a8ff	1273	hi2c->XferSize = Size;
bogdanm	0:9b334a45a8ff	1274	hi2c->XferCount = Size;
bogdanm	0:9b334a45a8ff	1275
bogdanm	0:9b334a45a8ff	1276	/* Set the I2C DMA transfert complete callback */
bogdanm	0:9b334a45a8ff	1277	hi2c->hdmatx->XferCpltCallback = I2C_DMAMasterTransmitCplt;
bogdanm	0:9b334a45a8ff	1278
bogdanm	0:9b334a45a8ff	1279	/* Set the DMA error callback */
bogdanm	0:9b334a45a8ff	1280	hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
bogdanm	0:9b334a45a8ff	1281
bogdanm	0:9b334a45a8ff	1282	/* Enable the DMA Channel */
bogdanm	0:9b334a45a8ff	1283	HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->DR, Size);
bogdanm	0:9b334a45a8ff	1284
bogdanm	0:9b334a45a8ff	1285	/* Send Slave Address */
bogdanm	0:9b334a45a8ff	1286	if(I2C_MasterRequestWrite(hi2c, DevAddress, I2C_TIMEOUT_FLAG) != HAL_OK)
bogdanm	0:9b334a45a8ff	1287	{
bogdanm	0:9b334a45a8ff	1288	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm	0:9b334a45a8ff	1289	{
bogdanm	0:9b334a45a8ff	1290	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	1291	}
bogdanm	0:9b334a45a8ff	1292	else
bogdanm	0:9b334a45a8ff	1293	{
bogdanm	0:9b334a45a8ff	1294	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	1295	}
bogdanm	0:9b334a45a8ff	1296	}
bogdanm	0:9b334a45a8ff	1297
bogdanm	0:9b334a45a8ff	1298	/* Enable DMA Request */
bogdanm	0:9b334a45a8ff	1299	SET_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
bogdanm	0:9b334a45a8ff	1300
bogdanm	0:9b334a45a8ff	1301	/* Clear ADDR flag */
bogdanm	0:9b334a45a8ff	1302	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
bogdanm	0:9b334a45a8ff	1303
bogdanm	0:9b334a45a8ff	1304	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1305	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	1306
bogdanm	0:9b334a45a8ff	1307	return HAL_OK;
bogdanm	0:9b334a45a8ff	1308	}
bogdanm	0:9b334a45a8ff	1309	else
bogdanm	0:9b334a45a8ff	1310	{
bogdanm	0:9b334a45a8ff	1311	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	1312	}
bogdanm	0:9b334a45a8ff	1313	}
bogdanm	0:9b334a45a8ff	1314
bogdanm	0:9b334a45a8ff	1315	/**
bogdanm	0:9b334a45a8ff	1316	* @brief Receive in master mode an amount of data in no-blocking mode with DMA
bogdanm	0:9b334a45a8ff	1317	* @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	1318	* the configuration information for I2C module
bogdanm	0:9b334a45a8ff	1319	* @param DevAddress: Target device address
bogdanm	0:9b334a45a8ff	1320	* @param pData: Pointer to data buffer
bogdanm	0:9b334a45a8ff	1321	* @param Size: Amount of data to be sent
bogdanm	0:9b334a45a8ff	1322	* @retval HAL status
bogdanm	0:9b334a45a8ff	1323	*/
bogdanm	0:9b334a45a8ff	1324	HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint8_t pData, uint16_t Size)
bogdanm	0:9b334a45a8ff	1325	{
bogdanm	0:9b334a45a8ff	1326	if(hi2c->State == HAL_I2C_STATE_READY)
bogdanm	0:9b334a45a8ff	1327	{
bogdanm	0:9b334a45a8ff	1328	if((pData == HAL_NULL) \|\| (Size == 0))
bogdanm	0:9b334a45a8ff	1329	{
bogdanm	0:9b334a45a8ff	1330	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	1331	}
bogdanm	0:9b334a45a8ff	1332
bogdanm	0:9b334a45a8ff	1333	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
bogdanm	0:9b334a45a8ff	1334	{
bogdanm	0:9b334a45a8ff	1335	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	1336	}
bogdanm	0:9b334a45a8ff	1337
bogdanm	0:9b334a45a8ff	1338	/* Process Locked */
bogdanm	0:9b334a45a8ff	1339	__HAL_LOCK(hi2c);
bogdanm	0:9b334a45a8ff	1340
bogdanm	0:9b334a45a8ff	1341	hi2c->State = HAL_I2C_STATE_BUSY_RX;
bogdanm	0:9b334a45a8ff	1342	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm	0:9b334a45a8ff	1343
bogdanm	0:9b334a45a8ff	1344	hi2c->pBuffPtr = pData;
bogdanm	0:9b334a45a8ff	1345	hi2c->XferSize = Size;
bogdanm	0:9b334a45a8ff	1346	hi2c->XferCount = Size;
bogdanm	0:9b334a45a8ff	1347
bogdanm	0:9b334a45a8ff	1348	/* Set the I2C DMA transfert complete callback */
bogdanm	0:9b334a45a8ff	1349	hi2c->hdmarx->XferCpltCallback = I2C_DMAMasterReceiveCplt;
bogdanm	0:9b334a45a8ff	1350
bogdanm	0:9b334a45a8ff	1351	/* Set the DMA error callback */
bogdanm	0:9b334a45a8ff	1352	hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
bogdanm	0:9b334a45a8ff	1353
bogdanm	0:9b334a45a8ff	1354	/* Enable the DMA Channel */
bogdanm	0:9b334a45a8ff	1355	HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)pData, Size);
bogdanm	0:9b334a45a8ff	1356
bogdanm	0:9b334a45a8ff	1357	/* Send Slave Address */
bogdanm	0:9b334a45a8ff	1358	if(I2C_MasterRequestRead(hi2c, DevAddress, I2C_TIMEOUT_FLAG) != HAL_OK)
bogdanm	0:9b334a45a8ff	1359	{
bogdanm	0:9b334a45a8ff	1360	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm	0:9b334a45a8ff	1361	{
bogdanm	0:9b334a45a8ff	1362	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	1363	}
bogdanm	0:9b334a45a8ff	1364	else
bogdanm	0:9b334a45a8ff	1365	{
bogdanm	0:9b334a45a8ff	1366	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	1367	}
bogdanm	0:9b334a45a8ff	1368	}
bogdanm	0:9b334a45a8ff	1369
bogdanm	0:9b334a45a8ff	1370	if(Size == 1)
bogdanm	0:9b334a45a8ff	1371	{
bogdanm	0:9b334a45a8ff	1372	/* Disable Acknowledge */
bogdanm	0:9b334a45a8ff	1373	CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
bogdanm	0:9b334a45a8ff	1374	}
bogdanm	0:9b334a45a8ff	1375	else
bogdanm	0:9b334a45a8ff	1376	{
bogdanm	0:9b334a45a8ff	1377	/* Enable Last DMA bit */
bogdanm	0:9b334a45a8ff	1378	SET_BIT(hi2c->Instance->CR2, I2C_CR2_LAST);
bogdanm	0:9b334a45a8ff	1379	}
bogdanm	0:9b334a45a8ff	1380
bogdanm	0:9b334a45a8ff	1381	/* Enable DMA Request */
bogdanm	0:9b334a45a8ff	1382	SET_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
bogdanm	0:9b334a45a8ff	1383
bogdanm	0:9b334a45a8ff	1384	/* Clear ADDR flag */
bogdanm	0:9b334a45a8ff	1385	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
bogdanm	0:9b334a45a8ff	1386
bogdanm	0:9b334a45a8ff	1387	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1388	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	1389
bogdanm	0:9b334a45a8ff	1390	return HAL_OK;
bogdanm	0:9b334a45a8ff	1391	}
bogdanm	0:9b334a45a8ff	1392	else
bogdanm	0:9b334a45a8ff	1393	{
bogdanm	0:9b334a45a8ff	1394	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	1395	}
bogdanm	0:9b334a45a8ff	1396	}
bogdanm	0:9b334a45a8ff	1397
bogdanm	0:9b334a45a8ff	1398	/**
bogdanm	0:9b334a45a8ff	1399	* @brief Transmit in slave mode an amount of data in no-blocking mode with DMA
bogdanm	0:9b334a45a8ff	1400	* @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	1401	* the configuration information for I2C module
bogdanm	0:9b334a45a8ff	1402	* @param pData: Pointer to data buffer
bogdanm	0:9b334a45a8ff	1403	* @param Size: Amount of data to be sent
bogdanm	0:9b334a45a8ff	1404	* @retval HAL status
bogdanm	0:9b334a45a8ff	1405	*/
bogdanm	0:9b334a45a8ff	1406	HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef hi2c, uint8_t pData, uint16_t Size)
bogdanm	0:9b334a45a8ff	1407	{
bogdanm	0:9b334a45a8ff	1408	if(hi2c->State == HAL_I2C_STATE_READY)
bogdanm	0:9b334a45a8ff	1409	{
bogdanm	0:9b334a45a8ff	1410	if((pData == HAL_NULL) \|\| (Size == 0))
bogdanm	0:9b334a45a8ff	1411	{
bogdanm	0:9b334a45a8ff	1412	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	1413	}
bogdanm	0:9b334a45a8ff	1414
bogdanm	0:9b334a45a8ff	1415	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
bogdanm	0:9b334a45a8ff	1416	{
bogdanm	0:9b334a45a8ff	1417	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	1418	}
bogdanm	0:9b334a45a8ff	1419
bogdanm	0:9b334a45a8ff	1420	/* Process Locked */
bogdanm	0:9b334a45a8ff	1421	__HAL_LOCK(hi2c);
bogdanm	0:9b334a45a8ff	1422
bogdanm	0:9b334a45a8ff	1423	hi2c->State = HAL_I2C_STATE_BUSY_TX;
bogdanm	0:9b334a45a8ff	1424	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm	0:9b334a45a8ff	1425
bogdanm	0:9b334a45a8ff	1426	hi2c->pBuffPtr = pData;
bogdanm	0:9b334a45a8ff	1427	hi2c->XferSize = Size;
bogdanm	0:9b334a45a8ff	1428	hi2c->XferCount = Size;
bogdanm	0:9b334a45a8ff	1429
bogdanm	0:9b334a45a8ff	1430	/* Set the I2C DMA transfert complete callback */
bogdanm	0:9b334a45a8ff	1431	hi2c->hdmatx->XferCpltCallback = I2C_DMASlaveTransmitCplt;
bogdanm	0:9b334a45a8ff	1432
bogdanm	0:9b334a45a8ff	1433	/* Set the DMA error callback */
bogdanm	0:9b334a45a8ff	1434	hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
bogdanm	0:9b334a45a8ff	1435
bogdanm	0:9b334a45a8ff	1436	/* Enable the DMA Channel */
bogdanm	0:9b334a45a8ff	1437	HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->DR, Size);
bogdanm	0:9b334a45a8ff	1438
bogdanm	0:9b334a45a8ff	1439	/* Enable DMA Request */
bogdanm	0:9b334a45a8ff	1440	SET_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
bogdanm	0:9b334a45a8ff	1441
bogdanm	0:9b334a45a8ff	1442	/* Enable Address Acknowledge */
bogdanm	0:9b334a45a8ff	1443	SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
bogdanm	0:9b334a45a8ff	1444
bogdanm	0:9b334a45a8ff	1445	/* Wait until ADDR flag is set */
bogdanm	0:9b334a45a8ff	1446	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, I2C_TIMEOUT_ADDR_SLAVE) != HAL_OK)
bogdanm	0:9b334a45a8ff	1447	{
bogdanm	0:9b334a45a8ff	1448	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	1449	}
bogdanm	0:9b334a45a8ff	1450
bogdanm	0:9b334a45a8ff	1451	/* If 7bit addressing mode is selected */
bogdanm	0:9b334a45a8ff	1452	if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
bogdanm	0:9b334a45a8ff	1453	{
bogdanm	0:9b334a45a8ff	1454	/* Clear ADDR flag */
bogdanm	0:9b334a45a8ff	1455	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
bogdanm	0:9b334a45a8ff	1456	}
bogdanm	0:9b334a45a8ff	1457	else
bogdanm	0:9b334a45a8ff	1458	{
bogdanm	0:9b334a45a8ff	1459	/* Clear ADDR flag */
bogdanm	0:9b334a45a8ff	1460	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
bogdanm	0:9b334a45a8ff	1461
bogdanm	0:9b334a45a8ff	1462	/* Wait until ADDR flag is set */
bogdanm	0:9b334a45a8ff	1463	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, I2C_TIMEOUT_ADDR_SLAVE) != HAL_OK)
bogdanm	0:9b334a45a8ff	1464	{
bogdanm	0:9b334a45a8ff	1465	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	1466	}
bogdanm	0:9b334a45a8ff	1467
bogdanm	0:9b334a45a8ff	1468	/* Clear ADDR flag */
bogdanm	0:9b334a45a8ff	1469	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
bogdanm	0:9b334a45a8ff	1470	}
bogdanm	0:9b334a45a8ff	1471
bogdanm	0:9b334a45a8ff	1472	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1473	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	1474
bogdanm	0:9b334a45a8ff	1475	return HAL_OK;
bogdanm	0:9b334a45a8ff	1476	}
bogdanm	0:9b334a45a8ff	1477	else
bogdanm	0:9b334a45a8ff	1478	{
bogdanm	0:9b334a45a8ff	1479	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	1480	}
bogdanm	0:9b334a45a8ff	1481	}
bogdanm	0:9b334a45a8ff	1482
bogdanm	0:9b334a45a8ff	1483	/**
bogdanm	0:9b334a45a8ff	1484	* @brief Receive in slave mode an amount of data in no-blocking mode with DMA
bogdanm	0:9b334a45a8ff	1485	* @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	1486	* the configuration information for I2C module
bogdanm	0:9b334a45a8ff	1487	* @param pData: Pointer to data buffer
bogdanm	0:9b334a45a8ff	1488	* @param Size: Amount of data to be sent
bogdanm	0:9b334a45a8ff	1489	* @retval HAL status
bogdanm	0:9b334a45a8ff	1490	*/
bogdanm	0:9b334a45a8ff	1491	HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef hi2c, uint8_t pData, uint16_t Size)
bogdanm	0:9b334a45a8ff	1492	{
bogdanm	0:9b334a45a8ff	1493	if(hi2c->State == HAL_I2C_STATE_READY)
bogdanm	0:9b334a45a8ff	1494	{
bogdanm	0:9b334a45a8ff	1495	if((pData == HAL_NULL) \|\| (Size == 0))
bogdanm	0:9b334a45a8ff	1496	{
bogdanm	0:9b334a45a8ff	1497	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	1498	}
bogdanm	0:9b334a45a8ff	1499
bogdanm	0:9b334a45a8ff	1500	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
bogdanm	0:9b334a45a8ff	1501	{
bogdanm	0:9b334a45a8ff	1502	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	1503	}
bogdanm	0:9b334a45a8ff	1504
bogdanm	0:9b334a45a8ff	1505	/* Process Locked */
bogdanm	0:9b334a45a8ff	1506	__HAL_LOCK(hi2c);
bogdanm	0:9b334a45a8ff	1507
bogdanm	0:9b334a45a8ff	1508	hi2c->State = HAL_I2C_STATE_BUSY_RX;
bogdanm	0:9b334a45a8ff	1509	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm	0:9b334a45a8ff	1510
bogdanm	0:9b334a45a8ff	1511	hi2c->pBuffPtr = pData;
bogdanm	0:9b334a45a8ff	1512	hi2c->XferSize = Size;
bogdanm	0:9b334a45a8ff	1513	hi2c->XferCount = Size;
bogdanm	0:9b334a45a8ff	1514
bogdanm	0:9b334a45a8ff	1515	/* Set the I2C DMA transfert complete callback */
bogdanm	0:9b334a45a8ff	1516	hi2c->hdmarx->XferCpltCallback = I2C_DMASlaveReceiveCplt;
bogdanm	0:9b334a45a8ff	1517
bogdanm	0:9b334a45a8ff	1518	/* Set the DMA error callback */
bogdanm	0:9b334a45a8ff	1519	hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
bogdanm	0:9b334a45a8ff	1520
bogdanm	0:9b334a45a8ff	1521	/* Enable the DMA Channel */
bogdanm	0:9b334a45a8ff	1522	HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)pData, Size);
bogdanm	0:9b334a45a8ff	1523
bogdanm	0:9b334a45a8ff	1524	/* Enable DMA Request */
bogdanm	0:9b334a45a8ff	1525	SET_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
bogdanm	0:9b334a45a8ff	1526
bogdanm	0:9b334a45a8ff	1527	/* Enable Address Acknowledge */
bogdanm	0:9b334a45a8ff	1528	SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
bogdanm	0:9b334a45a8ff	1529
bogdanm	0:9b334a45a8ff	1530	/* Wait until ADDR flag is set */
bogdanm	0:9b334a45a8ff	1531	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, I2C_TIMEOUT_ADDR_SLAVE) != HAL_OK)
bogdanm	0:9b334a45a8ff	1532	{
bogdanm	0:9b334a45a8ff	1533	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	1534	}
bogdanm	0:9b334a45a8ff	1535
bogdanm	0:9b334a45a8ff	1536	/* Clear ADDR flag */
bogdanm	0:9b334a45a8ff	1537	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
bogdanm	0:9b334a45a8ff	1538
bogdanm	0:9b334a45a8ff	1539	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1540	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	1541
bogdanm	0:9b334a45a8ff	1542	return HAL_OK;
bogdanm	0:9b334a45a8ff	1543	}
bogdanm	0:9b334a45a8ff	1544	else
bogdanm	0:9b334a45a8ff	1545	{
bogdanm	0:9b334a45a8ff	1546	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	1547	}
bogdanm	0:9b334a45a8ff	1548	}
bogdanm	0:9b334a45a8ff	1549	/**
bogdanm	0:9b334a45a8ff	1550	* @brief Write an amount of data in blocking mode to a specific memory address
bogdanm	0:9b334a45a8ff	1551	* @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	1552	* the configuration information for I2C module
bogdanm	0:9b334a45a8ff	1553	* @param DevAddress: Target device address
bogdanm	0:9b334a45a8ff	1554	* @param MemAddress: Internal memory address
bogdanm	0:9b334a45a8ff	1555	* @param MemAddSize: Size of internal memory address
bogdanm	0:9b334a45a8ff	1556	* @param pData: Pointer to data buffer
bogdanm	0:9b334a45a8ff	1557	* @param Size: Amount of data to be sent
bogdanm	0:9b334a45a8ff	1558	* @param Timeout: Timeout duration
bogdanm	0:9b334a45a8ff	1559	* @retval HAL status
bogdanm	0:9b334a45a8ff	1560	*/
bogdanm	0:9b334a45a8ff	1561	HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t pData, uint16_t Size, uint32_t Timeout)
bogdanm	0:9b334a45a8ff	1562	{
bogdanm	0:9b334a45a8ff	1563	/* Check the parameters */
bogdanm	0:9b334a45a8ff	1564	assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
bogdanm	0:9b334a45a8ff	1565
bogdanm	0:9b334a45a8ff	1566	if(hi2c->State == HAL_I2C_STATE_READY)
bogdanm	0:9b334a45a8ff	1567	{
bogdanm	0:9b334a45a8ff	1568	if((pData == HAL_NULL) \|\| (Size == 0))
bogdanm	0:9b334a45a8ff	1569	{
bogdanm	0:9b334a45a8ff	1570	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	1571	}
bogdanm	0:9b334a45a8ff	1572
bogdanm	0:9b334a45a8ff	1573	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
bogdanm	0:9b334a45a8ff	1574	{
bogdanm	0:9b334a45a8ff	1575	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	1576	}
bogdanm	0:9b334a45a8ff	1577
bogdanm	0:9b334a45a8ff	1578	/* Process Locked */
bogdanm	0:9b334a45a8ff	1579	__HAL_LOCK(hi2c);
bogdanm	0:9b334a45a8ff	1580
bogdanm	0:9b334a45a8ff	1581	hi2c->State = HAL_I2C_STATE_MEM_BUSY_TX;
bogdanm	0:9b334a45a8ff	1582	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm	0:9b334a45a8ff	1583
bogdanm	0:9b334a45a8ff	1584	/* Send Slave Address and Memory Address */
bogdanm	0:9b334a45a8ff	1585	if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	1586	{
bogdanm	0:9b334a45a8ff	1587	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm	0:9b334a45a8ff	1588	{
bogdanm	0:9b334a45a8ff	1589	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	1590	}
bogdanm	0:9b334a45a8ff	1591	else
bogdanm	0:9b334a45a8ff	1592	{
bogdanm	0:9b334a45a8ff	1593	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	1594	}
bogdanm	0:9b334a45a8ff	1595	}
bogdanm	0:9b334a45a8ff	1596
bogdanm	0:9b334a45a8ff	1597	while(Size > 0)
bogdanm	0:9b334a45a8ff	1598	{
bogdanm	0:9b334a45a8ff	1599	/* Wait until TXE flag is set */
bogdanm	0:9b334a45a8ff	1600	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	1601	{
bogdanm	0:9b334a45a8ff	1602	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	1603	}
bogdanm	0:9b334a45a8ff	1604
bogdanm	0:9b334a45a8ff	1605	/* Write data to DR */
bogdanm	0:9b334a45a8ff	1606	hi2c->Instance->DR = (*pData++);
bogdanm	0:9b334a45a8ff	1607	Size--;
bogdanm	0:9b334a45a8ff	1608
bogdanm	0:9b334a45a8ff	1609	if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (Size != 0))
bogdanm	0:9b334a45a8ff	1610	{
bogdanm	0:9b334a45a8ff	1611	/* Write data to DR */
bogdanm	0:9b334a45a8ff	1612	hi2c->Instance->DR = (*pData++);
bogdanm	0:9b334a45a8ff	1613	Size--;
bogdanm	0:9b334a45a8ff	1614	}
bogdanm	0:9b334a45a8ff	1615	}
bogdanm	0:9b334a45a8ff	1616
bogdanm	0:9b334a45a8ff	1617	/* Wait until TXE flag is set */
bogdanm	0:9b334a45a8ff	1618	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	1619	{
bogdanm	0:9b334a45a8ff	1620	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	1621	}
bogdanm	0:9b334a45a8ff	1622
bogdanm	0:9b334a45a8ff	1623	/* Generate Stop */
bogdanm	0:9b334a45a8ff	1624	SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP);
bogdanm	0:9b334a45a8ff	1625
bogdanm	0:9b334a45a8ff	1626	/* Wait until BUSY flag is reset */
bogdanm	0:9b334a45a8ff	1627	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	1628	{
bogdanm	0:9b334a45a8ff	1629	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	1630	}
bogdanm	0:9b334a45a8ff	1631
bogdanm	0:9b334a45a8ff	1632	hi2c->State = HAL_I2C_STATE_READY;
bogdanm	0:9b334a45a8ff	1633
bogdanm	0:9b334a45a8ff	1634	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1635	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	1636
bogdanm	0:9b334a45a8ff	1637	return HAL_OK;
bogdanm	0:9b334a45a8ff	1638	}
bogdanm	0:9b334a45a8ff	1639	else
bogdanm	0:9b334a45a8ff	1640	{
bogdanm	0:9b334a45a8ff	1641	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	1642	}
bogdanm	0:9b334a45a8ff	1643	}
bogdanm	0:9b334a45a8ff	1644
bogdanm	0:9b334a45a8ff	1645	/**
bogdanm	0:9b334a45a8ff	1646	* @brief Read an amount of data in blocking mode from a specific memory address
bogdanm	0:9b334a45a8ff	1647	* @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	1648	* the configuration information for I2C module
bogdanm	0:9b334a45a8ff	1649	* @param DevAddress: Target device address
bogdanm	0:9b334a45a8ff	1650	* @param MemAddress: Internal memory address
bogdanm	0:9b334a45a8ff	1651	* @param MemAddSize: Size of internal memory address
bogdanm	0:9b334a45a8ff	1652	* @param pData: Pointer to data buffer
bogdanm	0:9b334a45a8ff	1653	* @param Size: Amount of data to be sent
bogdanm	0:9b334a45a8ff	1654	* @param Timeout: Timeout duration
bogdanm	0:9b334a45a8ff	1655	* @retval HAL status
bogdanm	0:9b334a45a8ff	1656	*/
bogdanm	0:9b334a45a8ff	1657	HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t pData, uint16_t Size, uint32_t Timeout)
bogdanm	0:9b334a45a8ff	1658	{
bogdanm	0:9b334a45a8ff	1659	/* Check the parameters */
bogdanm	0:9b334a45a8ff	1660	assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
bogdanm	0:9b334a45a8ff	1661
bogdanm	0:9b334a45a8ff	1662	if(hi2c->State == HAL_I2C_STATE_READY)
bogdanm	0:9b334a45a8ff	1663	{
bogdanm	0:9b334a45a8ff	1664	if((pData == HAL_NULL) \|\| (Size == 0))
bogdanm	0:9b334a45a8ff	1665	{
bogdanm	0:9b334a45a8ff	1666	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	1667	}
bogdanm	0:9b334a45a8ff	1668
bogdanm	0:9b334a45a8ff	1669	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
bogdanm	0:9b334a45a8ff	1670	{
bogdanm	0:9b334a45a8ff	1671	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	1672	}
bogdanm	0:9b334a45a8ff	1673
bogdanm	0:9b334a45a8ff	1674	/* Process Locked */
bogdanm	0:9b334a45a8ff	1675	__HAL_LOCK(hi2c);
bogdanm	0:9b334a45a8ff	1676
bogdanm	0:9b334a45a8ff	1677	hi2c->State = HAL_I2C_STATE_MEM_BUSY_RX;
bogdanm	0:9b334a45a8ff	1678	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm	0:9b334a45a8ff	1679
bogdanm	0:9b334a45a8ff	1680	/* Send Slave Address and Memory Address */
bogdanm	0:9b334a45a8ff	1681	if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	1682	{
bogdanm	0:9b334a45a8ff	1683	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm	0:9b334a45a8ff	1684	{
bogdanm	0:9b334a45a8ff	1685	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	1686	}
bogdanm	0:9b334a45a8ff	1687	else
bogdanm	0:9b334a45a8ff	1688	{
bogdanm	0:9b334a45a8ff	1689	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	1690	}
bogdanm	0:9b334a45a8ff	1691	}
bogdanm	0:9b334a45a8ff	1692
bogdanm	0:9b334a45a8ff	1693	if(Size == 1)
bogdanm	0:9b334a45a8ff	1694	{
bogdanm	0:9b334a45a8ff	1695	/* Disable Acknowledge */
bogdanm	0:9b334a45a8ff	1696	CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
bogdanm	0:9b334a45a8ff	1697
bogdanm	0:9b334a45a8ff	1698	/* Clear ADDR flag */
bogdanm	0:9b334a45a8ff	1699	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
bogdanm	0:9b334a45a8ff	1700
bogdanm	0:9b334a45a8ff	1701	/* Generate Stop */
bogdanm	0:9b334a45a8ff	1702	SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP);
bogdanm	0:9b334a45a8ff	1703	}
bogdanm	0:9b334a45a8ff	1704	else if(Size == 2)
bogdanm	0:9b334a45a8ff	1705	{
bogdanm	0:9b334a45a8ff	1706	/* Disable Acknowledge */
bogdanm	0:9b334a45a8ff	1707	CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
bogdanm	0:9b334a45a8ff	1708
bogdanm	0:9b334a45a8ff	1709	/* Enable Pos */
bogdanm	0:9b334a45a8ff	1710	SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
bogdanm	0:9b334a45a8ff	1711
bogdanm	0:9b334a45a8ff	1712	/* Clear ADDR flag */
bogdanm	0:9b334a45a8ff	1713	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
bogdanm	0:9b334a45a8ff	1714	}
bogdanm	0:9b334a45a8ff	1715	else
bogdanm	0:9b334a45a8ff	1716	{
bogdanm	0:9b334a45a8ff	1717	/* Clear ADDR flag */
bogdanm	0:9b334a45a8ff	1718	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
bogdanm	0:9b334a45a8ff	1719	}
bogdanm	0:9b334a45a8ff	1720
bogdanm	0:9b334a45a8ff	1721	while(Size > 0)
bogdanm	0:9b334a45a8ff	1722	{
bogdanm	0:9b334a45a8ff	1723	if(Size <= 3)
bogdanm	0:9b334a45a8ff	1724	{
bogdanm	0:9b334a45a8ff	1725	/* One byte */
bogdanm	0:9b334a45a8ff	1726	if(Size== 1)
bogdanm	0:9b334a45a8ff	1727	{
bogdanm	0:9b334a45a8ff	1728	/* Wait until RXNE flag is set */
bogdanm	0:9b334a45a8ff	1729	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	1730	{
bogdanm	0:9b334a45a8ff	1731	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	1732	}
bogdanm	0:9b334a45a8ff	1733
bogdanm	0:9b334a45a8ff	1734	/* Read data from DR */
bogdanm	0:9b334a45a8ff	1735	(*pData++) = hi2c->Instance->DR;
bogdanm	0:9b334a45a8ff	1736	Size--;
bogdanm	0:9b334a45a8ff	1737	}
bogdanm	0:9b334a45a8ff	1738	/* Two bytes */
bogdanm	0:9b334a45a8ff	1739	else if(Size == 2)
bogdanm	0:9b334a45a8ff	1740	{
bogdanm	0:9b334a45a8ff	1741	/* Wait until BTF flag is set */
bogdanm	0:9b334a45a8ff	1742	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	1743	{
bogdanm	0:9b334a45a8ff	1744	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	1745	}
bogdanm	0:9b334a45a8ff	1746
bogdanm	0:9b334a45a8ff	1747	/* Generate Stop */
bogdanm	0:9b334a45a8ff	1748	SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP);
bogdanm	0:9b334a45a8ff	1749
bogdanm	0:9b334a45a8ff	1750	/* Read data from DR */
bogdanm	0:9b334a45a8ff	1751	(*pData++) = hi2c->Instance->DR;
bogdanm	0:9b334a45a8ff	1752	Size--;
bogdanm	0:9b334a45a8ff	1753
bogdanm	0:9b334a45a8ff	1754	/* Read data from DR */
bogdanm	0:9b334a45a8ff	1755	(*pData++) = hi2c->Instance->DR;
bogdanm	0:9b334a45a8ff	1756	Size--;
bogdanm	0:9b334a45a8ff	1757	}
bogdanm	0:9b334a45a8ff	1758	/* 3 Last bytes */
bogdanm	0:9b334a45a8ff	1759	else
bogdanm	0:9b334a45a8ff	1760	{
bogdanm	0:9b334a45a8ff	1761	/* Wait until BTF flag is set */
bogdanm	0:9b334a45a8ff	1762	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	1763	{
bogdanm	0:9b334a45a8ff	1764	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	1765	}
bogdanm	0:9b334a45a8ff	1766
bogdanm	0:9b334a45a8ff	1767	/* Disable Acknowledge */
bogdanm	0:9b334a45a8ff	1768	CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
bogdanm	0:9b334a45a8ff	1769
bogdanm	0:9b334a45a8ff	1770	/* Read data from DR */
bogdanm	0:9b334a45a8ff	1771	(*pData++) = hi2c->Instance->DR;
bogdanm	0:9b334a45a8ff	1772	Size--;
bogdanm	0:9b334a45a8ff	1773
bogdanm	0:9b334a45a8ff	1774	/* Wait until BTF flag is set */
bogdanm	0:9b334a45a8ff	1775	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	1776	{
bogdanm	0:9b334a45a8ff	1777	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	1778	}
bogdanm	0:9b334a45a8ff	1779
bogdanm	0:9b334a45a8ff	1780	/* Generate Stop */
bogdanm	0:9b334a45a8ff	1781	SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP);
bogdanm	0:9b334a45a8ff	1782
bogdanm	0:9b334a45a8ff	1783	/* Read data from DR */
bogdanm	0:9b334a45a8ff	1784	(*pData++) = hi2c->Instance->DR;
bogdanm	0:9b334a45a8ff	1785	Size--;
bogdanm	0:9b334a45a8ff	1786
bogdanm	0:9b334a45a8ff	1787	/* Read data from DR */
bogdanm	0:9b334a45a8ff	1788	(*pData++) = hi2c->Instance->DR;
bogdanm	0:9b334a45a8ff	1789	Size--;
bogdanm	0:9b334a45a8ff	1790	}
bogdanm	0:9b334a45a8ff	1791	}
bogdanm	0:9b334a45a8ff	1792	else
bogdanm	0:9b334a45a8ff	1793	{
bogdanm	0:9b334a45a8ff	1794	/* Wait until RXNE flag is set */
bogdanm	0:9b334a45a8ff	1795	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	1796	{
bogdanm	0:9b334a45a8ff	1797	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	1798	}
bogdanm	0:9b334a45a8ff	1799
bogdanm	0:9b334a45a8ff	1800	/* Read data from DR */
bogdanm	0:9b334a45a8ff	1801	(*pData++) = hi2c->Instance->DR;
bogdanm	0:9b334a45a8ff	1802	Size--;
bogdanm	0:9b334a45a8ff	1803
bogdanm	0:9b334a45a8ff	1804	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET)
bogdanm	0:9b334a45a8ff	1805	{
bogdanm	0:9b334a45a8ff	1806	/* Read data from DR */
bogdanm	0:9b334a45a8ff	1807	(*pData++) = hi2c->Instance->DR;
bogdanm	0:9b334a45a8ff	1808	Size--;
bogdanm	0:9b334a45a8ff	1809	}
bogdanm	0:9b334a45a8ff	1810	}
bogdanm	0:9b334a45a8ff	1811	}
bogdanm	0:9b334a45a8ff	1812
bogdanm	0:9b334a45a8ff	1813	/* Disable Pos */
bogdanm	0:9b334a45a8ff	1814	CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
bogdanm	0:9b334a45a8ff	1815
bogdanm	0:9b334a45a8ff	1816	/* Wait until BUSY flag is reset */
bogdanm	0:9b334a45a8ff	1817	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	1818	{
bogdanm	0:9b334a45a8ff	1819	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	1820	}
bogdanm	0:9b334a45a8ff	1821
bogdanm	0:9b334a45a8ff	1822	hi2c->State = HAL_I2C_STATE_READY;
bogdanm	0:9b334a45a8ff	1823
bogdanm	0:9b334a45a8ff	1824	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1825	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	1826
bogdanm	0:9b334a45a8ff	1827	return HAL_OK;
bogdanm	0:9b334a45a8ff	1828	}
bogdanm	0:9b334a45a8ff	1829	else
bogdanm	0:9b334a45a8ff	1830	{
bogdanm	0:9b334a45a8ff	1831	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	1832	}
bogdanm	0:9b334a45a8ff	1833	}
bogdanm	0:9b334a45a8ff	1834	/**
bogdanm	0:9b334a45a8ff	1835	* @brief Write an amount of data in no-blocking mode with Interrupt to a specific memory address
bogdanm	0:9b334a45a8ff	1836	* @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	1837	* the configuration information for I2C module
bogdanm	0:9b334a45a8ff	1838	* @param DevAddress: Target device address
bogdanm	0:9b334a45a8ff	1839	* @param MemAddress: Internal memory address
bogdanm	0:9b334a45a8ff	1840	* @param MemAddSize: Size of internal memory address
bogdanm	0:9b334a45a8ff	1841	* @param pData: Pointer to data buffer
bogdanm	0:9b334a45a8ff	1842	* @param Size: Amount of data to be sent
bogdanm	0:9b334a45a8ff	1843	* @retval HAL status
bogdanm	0:9b334a45a8ff	1844	*/
bogdanm	0:9b334a45a8ff	1845	HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t pData, uint16_t Size)
bogdanm	0:9b334a45a8ff	1846	{
bogdanm	0:9b334a45a8ff	1847	/* Check the parameters */
bogdanm	0:9b334a45a8ff	1848	assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
bogdanm	0:9b334a45a8ff	1849
bogdanm	0:9b334a45a8ff	1850	if(hi2c->State == HAL_I2C_STATE_READY)
bogdanm	0:9b334a45a8ff	1851	{
bogdanm	0:9b334a45a8ff	1852	if((pData == HAL_NULL) \|\| (Size == 0))
bogdanm	0:9b334a45a8ff	1853	{
bogdanm	0:9b334a45a8ff	1854	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	1855	}
bogdanm	0:9b334a45a8ff	1856
bogdanm	0:9b334a45a8ff	1857	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
bogdanm	0:9b334a45a8ff	1858	{
bogdanm	0:9b334a45a8ff	1859	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	1860	}
bogdanm	0:9b334a45a8ff	1861
bogdanm	0:9b334a45a8ff	1862	/* Process Locked */
bogdanm	0:9b334a45a8ff	1863	__HAL_LOCK(hi2c);
bogdanm	0:9b334a45a8ff	1864
bogdanm	0:9b334a45a8ff	1865	hi2c->State = HAL_I2C_STATE_MEM_BUSY_TX;
bogdanm	0:9b334a45a8ff	1866	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm	0:9b334a45a8ff	1867
bogdanm	0:9b334a45a8ff	1868	hi2c->pBuffPtr = pData;
bogdanm	0:9b334a45a8ff	1869	hi2c->XferSize = Size;
bogdanm	0:9b334a45a8ff	1870	hi2c->XferCount = Size;
bogdanm	0:9b334a45a8ff	1871
bogdanm	0:9b334a45a8ff	1872	/* Send Slave Address and Memory Address */
bogdanm	0:9b334a45a8ff	1873	if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG) != HAL_OK)
bogdanm	0:9b334a45a8ff	1874	{
bogdanm	0:9b334a45a8ff	1875	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm	0:9b334a45a8ff	1876	{
bogdanm	0:9b334a45a8ff	1877	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	1878	}
bogdanm	0:9b334a45a8ff	1879	else
bogdanm	0:9b334a45a8ff	1880	{
bogdanm	0:9b334a45a8ff	1881	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	1882	}
bogdanm	0:9b334a45a8ff	1883	}
bogdanm	0:9b334a45a8ff	1884
bogdanm	0:9b334a45a8ff	1885	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1886	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	1887
bogdanm	0:9b334a45a8ff	1888	/* Note : The I2C interrupts must be enabled after unlocking current process
bogdanm	0:9b334a45a8ff	1889	to avoid the risk of I2C interrupt handle execution before current
bogdanm	0:9b334a45a8ff	1890	process unlock */
bogdanm	0:9b334a45a8ff	1891
bogdanm	0:9b334a45a8ff	1892	/* Enable EVT, BUF and ERR interrupt */
bogdanm	0:9b334a45a8ff	1893	__HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
bogdanm	0:9b334a45a8ff	1894
bogdanm	0:9b334a45a8ff	1895	return HAL_OK;
bogdanm	0:9b334a45a8ff	1896	}
bogdanm	0:9b334a45a8ff	1897	else
bogdanm	0:9b334a45a8ff	1898	{
bogdanm	0:9b334a45a8ff	1899	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	1900	}
bogdanm	0:9b334a45a8ff	1901	}
bogdanm	0:9b334a45a8ff	1902
bogdanm	0:9b334a45a8ff	1903	/**
bogdanm	0:9b334a45a8ff	1904	* @brief Read an amount of data in no-blocking mode with Interrupt from a specific memory address
bogdanm	0:9b334a45a8ff	1905	* @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	1906	* the configuration information for I2C module
bogdanm	0:9b334a45a8ff	1907	* @param DevAddress: Target device address
bogdanm	0:9b334a45a8ff	1908	* @param MemAddress: Internal memory address
bogdanm	0:9b334a45a8ff	1909	* @param MemAddSize: Size of internal memory address
bogdanm	0:9b334a45a8ff	1910	* @param pData: Pointer to data buffer
bogdanm	0:9b334a45a8ff	1911	* @param Size: Amount of data to be sent
bogdanm	0:9b334a45a8ff	1912	* @retval HAL status
bogdanm	0:9b334a45a8ff	1913	*/
bogdanm	0:9b334a45a8ff	1914	HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t pData, uint16_t Size)
bogdanm	0:9b334a45a8ff	1915	{
bogdanm	0:9b334a45a8ff	1916	/* Check the parameters */
bogdanm	0:9b334a45a8ff	1917	assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
bogdanm	0:9b334a45a8ff	1918
bogdanm	0:9b334a45a8ff	1919	if(hi2c->State == HAL_I2C_STATE_READY)
bogdanm	0:9b334a45a8ff	1920	{
bogdanm	0:9b334a45a8ff	1921	if((pData == HAL_NULL) \|\| (Size == 0))
bogdanm	0:9b334a45a8ff	1922	{
bogdanm	0:9b334a45a8ff	1923	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	1924	}
bogdanm	0:9b334a45a8ff	1925
bogdanm	0:9b334a45a8ff	1926	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
bogdanm	0:9b334a45a8ff	1927	{
bogdanm	0:9b334a45a8ff	1928	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	1929	}
bogdanm	0:9b334a45a8ff	1930
bogdanm	0:9b334a45a8ff	1931	/* Process Locked */
bogdanm	0:9b334a45a8ff	1932	__HAL_LOCK(hi2c);
bogdanm	0:9b334a45a8ff	1933
bogdanm	0:9b334a45a8ff	1934	hi2c->State = HAL_I2C_STATE_MEM_BUSY_RX;
bogdanm	0:9b334a45a8ff	1935	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm	0:9b334a45a8ff	1936
bogdanm	0:9b334a45a8ff	1937	hi2c->pBuffPtr = pData;
bogdanm	0:9b334a45a8ff	1938	hi2c->XferSize = Size;
bogdanm	0:9b334a45a8ff	1939	hi2c->XferCount = Size;
bogdanm	0:9b334a45a8ff	1940
bogdanm	0:9b334a45a8ff	1941	/* Send Slave Address and Memory Address */
bogdanm	0:9b334a45a8ff	1942	if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG) != HAL_OK)
bogdanm	0:9b334a45a8ff	1943	{
bogdanm	0:9b334a45a8ff	1944	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm	0:9b334a45a8ff	1945	{
bogdanm	0:9b334a45a8ff	1946	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	1947	}
bogdanm	0:9b334a45a8ff	1948	else
bogdanm	0:9b334a45a8ff	1949	{
bogdanm	0:9b334a45a8ff	1950	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	1951	}
bogdanm	0:9b334a45a8ff	1952	}
bogdanm	0:9b334a45a8ff	1953
bogdanm	0:9b334a45a8ff	1954	if(hi2c->XferCount == 1)
bogdanm	0:9b334a45a8ff	1955	{
bogdanm	0:9b334a45a8ff	1956	/* Disable Acknowledge */
bogdanm	0:9b334a45a8ff	1957	CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
bogdanm	0:9b334a45a8ff	1958
bogdanm	0:9b334a45a8ff	1959	/* Clear ADDR flag */
bogdanm	0:9b334a45a8ff	1960	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
bogdanm	0:9b334a45a8ff	1961
bogdanm	0:9b334a45a8ff	1962	/* Generate Stop */
bogdanm	0:9b334a45a8ff	1963	SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP);
bogdanm	0:9b334a45a8ff	1964	}
bogdanm	0:9b334a45a8ff	1965	else if(hi2c->XferCount == 2)
bogdanm	0:9b334a45a8ff	1966	{
bogdanm	0:9b334a45a8ff	1967	/* Disable Acknowledge */
bogdanm	0:9b334a45a8ff	1968	CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
bogdanm	0:9b334a45a8ff	1969
bogdanm	0:9b334a45a8ff	1970	/* Enable Pos */
bogdanm	0:9b334a45a8ff	1971	SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
bogdanm	0:9b334a45a8ff	1972
bogdanm	0:9b334a45a8ff	1973	/* Clear ADDR flag */
bogdanm	0:9b334a45a8ff	1974	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
bogdanm	0:9b334a45a8ff	1975	}
bogdanm	0:9b334a45a8ff	1976	else
bogdanm	0:9b334a45a8ff	1977	{
bogdanm	0:9b334a45a8ff	1978	/* Enable Acknowledge */
bogdanm	0:9b334a45a8ff	1979	SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
bogdanm	0:9b334a45a8ff	1980
bogdanm	0:9b334a45a8ff	1981	/* Clear ADDR flag */
bogdanm	0:9b334a45a8ff	1982	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
bogdanm	0:9b334a45a8ff	1983	}
bogdanm	0:9b334a45a8ff	1984
bogdanm	0:9b334a45a8ff	1985	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1986	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	1987
bogdanm	0:9b334a45a8ff	1988	/* Note : The I2C interrupts must be enabled after unlocking current process
bogdanm	0:9b334a45a8ff	1989	to avoid the risk of I2C interrupt handle execution before current
bogdanm	0:9b334a45a8ff	1990	process unlock */
bogdanm	0:9b334a45a8ff	1991
bogdanm	0:9b334a45a8ff	1992	/* Enable EVT, BUF and ERR interrupt */
bogdanm	0:9b334a45a8ff	1993	__HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
bogdanm	0:9b334a45a8ff	1994
bogdanm	0:9b334a45a8ff	1995	return HAL_OK;
bogdanm	0:9b334a45a8ff	1996	}
bogdanm	0:9b334a45a8ff	1997	else
bogdanm	0:9b334a45a8ff	1998	{
bogdanm	0:9b334a45a8ff	1999	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	2000	}
bogdanm	0:9b334a45a8ff	2001	}
bogdanm	0:9b334a45a8ff	2002	/**
bogdanm	0:9b334a45a8ff	2003	* @brief Write an amount of data in no-blocking mode with DMA to a specific memory address
bogdanm	0:9b334a45a8ff	2004	* @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	2005	* the configuration information for I2C module
bogdanm	0:9b334a45a8ff	2006	* @param DevAddress: Target device address
bogdanm	0:9b334a45a8ff	2007	* @param MemAddress: Internal memory address
bogdanm	0:9b334a45a8ff	2008	* @param MemAddSize: Size of internal memory address
bogdanm	0:9b334a45a8ff	2009	* @param pData: Pointer to data buffer
bogdanm	0:9b334a45a8ff	2010	* @param Size: Amount of data to be sent
bogdanm	0:9b334a45a8ff	2011	* @retval HAL status
bogdanm	0:9b334a45a8ff	2012	*/
bogdanm	0:9b334a45a8ff	2013	HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t pData, uint16_t Size)
bogdanm	0:9b334a45a8ff	2014	{
bogdanm	0:9b334a45a8ff	2015	/* Check the parameters */
bogdanm	0:9b334a45a8ff	2016	assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
bogdanm	0:9b334a45a8ff	2017
bogdanm	0:9b334a45a8ff	2018	if(hi2c->State == HAL_I2C_STATE_READY)
bogdanm	0:9b334a45a8ff	2019	{
bogdanm	0:9b334a45a8ff	2020	if((pData == HAL_NULL) \|\| (Size == 0))
bogdanm	0:9b334a45a8ff	2021	{
bogdanm	0:9b334a45a8ff	2022	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	2023	}
bogdanm	0:9b334a45a8ff	2024
bogdanm	0:9b334a45a8ff	2025	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
bogdanm	0:9b334a45a8ff	2026	{
bogdanm	0:9b334a45a8ff	2027	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	2028	}
bogdanm	0:9b334a45a8ff	2029
bogdanm	0:9b334a45a8ff	2030	/* Process Locked */
bogdanm	0:9b334a45a8ff	2031	__HAL_LOCK(hi2c);
bogdanm	0:9b334a45a8ff	2032
bogdanm	0:9b334a45a8ff	2033	hi2c->State = HAL_I2C_STATE_MEM_BUSY_TX;
bogdanm	0:9b334a45a8ff	2034	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm	0:9b334a45a8ff	2035
bogdanm	0:9b334a45a8ff	2036	hi2c->pBuffPtr = pData;
bogdanm	0:9b334a45a8ff	2037	hi2c->XferSize = Size;
bogdanm	0:9b334a45a8ff	2038	hi2c->XferCount = Size;
bogdanm	0:9b334a45a8ff	2039
bogdanm	0:9b334a45a8ff	2040	/* Set the I2C DMA transfert complete callback */
bogdanm	0:9b334a45a8ff	2041	hi2c->hdmatx->XferCpltCallback = I2C_DMAMemTransmitCplt;
bogdanm	0:9b334a45a8ff	2042
bogdanm	0:9b334a45a8ff	2043	/* Set the DMA error callback */
bogdanm	0:9b334a45a8ff	2044	hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
bogdanm	0:9b334a45a8ff	2045
bogdanm	0:9b334a45a8ff	2046	/* Enable the DMA Channel */
bogdanm	0:9b334a45a8ff	2047	HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->DR, Size);
bogdanm	0:9b334a45a8ff	2048
bogdanm	0:9b334a45a8ff	2049	/* Send Slave Address and Memory Address */
bogdanm	0:9b334a45a8ff	2050	if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG) != HAL_OK)
bogdanm	0:9b334a45a8ff	2051	{
bogdanm	0:9b334a45a8ff	2052	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm	0:9b334a45a8ff	2053	{
bogdanm	0:9b334a45a8ff	2054	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	2055	}
bogdanm	0:9b334a45a8ff	2056	else
bogdanm	0:9b334a45a8ff	2057	{
bogdanm	0:9b334a45a8ff	2058	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	2059	}
bogdanm	0:9b334a45a8ff	2060	}
bogdanm	0:9b334a45a8ff	2061
bogdanm	0:9b334a45a8ff	2062	/* Enable DMA Request */
bogdanm	0:9b334a45a8ff	2063	SET_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
bogdanm	0:9b334a45a8ff	2064
bogdanm	0:9b334a45a8ff	2065	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	2066	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	2067
bogdanm	0:9b334a45a8ff	2068	return HAL_OK;
bogdanm	0:9b334a45a8ff	2069	}
bogdanm	0:9b334a45a8ff	2070	else
bogdanm	0:9b334a45a8ff	2071	{
bogdanm	0:9b334a45a8ff	2072	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	2073	}
bogdanm	0:9b334a45a8ff	2074	}
bogdanm	0:9b334a45a8ff	2075
bogdanm	0:9b334a45a8ff	2076	/**
bogdanm	0:9b334a45a8ff	2077	* @brief Reads an amount of data in no-blocking mode with DMA from a specific memory address.
bogdanm	0:9b334a45a8ff	2078	* @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	2079	* the configuration information for I2C module
bogdanm	0:9b334a45a8ff	2080	* @param DevAddress: Target device address
bogdanm	0:9b334a45a8ff	2081	* @param MemAddress: Internal memory address
bogdanm	0:9b334a45a8ff	2082	* @param MemAddSize: Size of internal memory address
bogdanm	0:9b334a45a8ff	2083	* @param pData: Pointer to data buffer
bogdanm	0:9b334a45a8ff	2084	* @param Size: Amount of data to be read
bogdanm	0:9b334a45a8ff	2085	* @retval HAL status
bogdanm	0:9b334a45a8ff	2086	*/
bogdanm	0:9b334a45a8ff	2087	HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t pData, uint16_t Size)
bogdanm	0:9b334a45a8ff	2088	{
bogdanm	0:9b334a45a8ff	2089	/* Check the parameters */
bogdanm	0:9b334a45a8ff	2090	assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
bogdanm	0:9b334a45a8ff	2091
bogdanm	0:9b334a45a8ff	2092	if(hi2c->State == HAL_I2C_STATE_READY)
bogdanm	0:9b334a45a8ff	2093	{
bogdanm	0:9b334a45a8ff	2094	if((pData == HAL_NULL) \|\| (Size == 0))
bogdanm	0:9b334a45a8ff	2095	{
bogdanm	0:9b334a45a8ff	2096	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	2097	}
bogdanm	0:9b334a45a8ff	2098
bogdanm	0:9b334a45a8ff	2099	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
bogdanm	0:9b334a45a8ff	2100	{
bogdanm	0:9b334a45a8ff	2101	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	2102	}
bogdanm	0:9b334a45a8ff	2103
bogdanm	0:9b334a45a8ff	2104	/* Process Locked */
bogdanm	0:9b334a45a8ff	2105	__HAL_LOCK(hi2c);
bogdanm	0:9b334a45a8ff	2106
bogdanm	0:9b334a45a8ff	2107	hi2c->State = HAL_I2C_STATE_MEM_BUSY_RX;
bogdanm	0:9b334a45a8ff	2108	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm	0:9b334a45a8ff	2109
bogdanm	0:9b334a45a8ff	2110	hi2c->pBuffPtr = pData;
bogdanm	0:9b334a45a8ff	2111	hi2c->XferSize = Size;
bogdanm	0:9b334a45a8ff	2112	hi2c->XferCount = Size;
bogdanm	0:9b334a45a8ff	2113
bogdanm	0:9b334a45a8ff	2114	/* Set the I2C DMA transfert complete callback */
bogdanm	0:9b334a45a8ff	2115	hi2c->hdmarx->XferCpltCallback = I2C_DMAMemReceiveCplt;
bogdanm	0:9b334a45a8ff	2116
bogdanm	0:9b334a45a8ff	2117	/* Set the DMA error callback */
bogdanm	0:9b334a45a8ff	2118	hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
bogdanm	0:9b334a45a8ff	2119
bogdanm	0:9b334a45a8ff	2120	/* Enable the DMA Channel */
bogdanm	0:9b334a45a8ff	2121	HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)pData, Size);
bogdanm	0:9b334a45a8ff	2122
bogdanm	0:9b334a45a8ff	2123	/* Send Slave Address and Memory Address */
bogdanm	0:9b334a45a8ff	2124	if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG) != HAL_OK)
bogdanm	0:9b334a45a8ff	2125	{
bogdanm	0:9b334a45a8ff	2126	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm	0:9b334a45a8ff	2127	{
bogdanm	0:9b334a45a8ff	2128	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	2129	}
bogdanm	0:9b334a45a8ff	2130	else
bogdanm	0:9b334a45a8ff	2131	{
bogdanm	0:9b334a45a8ff	2132	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	2133	}
bogdanm	0:9b334a45a8ff	2134	}
bogdanm	0:9b334a45a8ff	2135
bogdanm	0:9b334a45a8ff	2136	if(Size == 1)
bogdanm	0:9b334a45a8ff	2137	{
bogdanm	0:9b334a45a8ff	2138	/* Disable Acknowledge */
bogdanm	0:9b334a45a8ff	2139	CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
bogdanm	0:9b334a45a8ff	2140	}
bogdanm	0:9b334a45a8ff	2141	else
bogdanm	0:9b334a45a8ff	2142	{
bogdanm	0:9b334a45a8ff	2143	/* Enable Last DMA bit */
bogdanm	0:9b334a45a8ff	2144	SET_BIT(hi2c->Instance->CR2, I2C_CR2_LAST);
bogdanm	0:9b334a45a8ff	2145	}
bogdanm	0:9b334a45a8ff	2146
bogdanm	0:9b334a45a8ff	2147	/* Enable DMA Request */
bogdanm	0:9b334a45a8ff	2148	SET_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
bogdanm	0:9b334a45a8ff	2149
bogdanm	0:9b334a45a8ff	2150	/* Clear ADDR flag */
bogdanm	0:9b334a45a8ff	2151	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
bogdanm	0:9b334a45a8ff	2152
bogdanm	0:9b334a45a8ff	2153	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	2154	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	2155
bogdanm	0:9b334a45a8ff	2156	return HAL_OK;
bogdanm	0:9b334a45a8ff	2157	}
bogdanm	0:9b334a45a8ff	2158	else
bogdanm	0:9b334a45a8ff	2159	{
bogdanm	0:9b334a45a8ff	2160	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	2161	}
bogdanm	0:9b334a45a8ff	2162	}
bogdanm	0:9b334a45a8ff	2163
bogdanm	0:9b334a45a8ff	2164	/**
bogdanm	0:9b334a45a8ff	2165	* @brief Checks if target device is ready for communication.
bogdanm	0:9b334a45a8ff	2166	* @note This function is used with Memory devices
bogdanm	0:9b334a45a8ff	2167	* @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	2168	* the configuration information for I2C module
bogdanm	0:9b334a45a8ff	2169	* @param DevAddress: Target device address
bogdanm	0:9b334a45a8ff	2170	* @param Trials: Number of trials
bogdanm	0:9b334a45a8ff	2171	* @param Timeout: Timeout duration
bogdanm	0:9b334a45a8ff	2172	* @retval HAL status
bogdanm	0:9b334a45a8ff	2173	*/
bogdanm	0:9b334a45a8ff	2174	HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout)
bogdanm	0:9b334a45a8ff	2175	{
bogdanm	0:9b334a45a8ff	2176	uint32_t tickstart = 0, I2C_Trials = 1;
bogdanm	0:9b334a45a8ff	2177
bogdanm	0:9b334a45a8ff	2178	if(hi2c->State == HAL_I2C_STATE_READY)
bogdanm	0:9b334a45a8ff	2179	{
bogdanm	0:9b334a45a8ff	2180	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
bogdanm	0:9b334a45a8ff	2181	{
bogdanm	0:9b334a45a8ff	2182	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	2183	}
bogdanm	0:9b334a45a8ff	2184
bogdanm	0:9b334a45a8ff	2185	/* Process Locked */
bogdanm	0:9b334a45a8ff	2186	__HAL_LOCK(hi2c);
bogdanm	0:9b334a45a8ff	2187
bogdanm	0:9b334a45a8ff	2188	hi2c->State = HAL_I2C_STATE_BUSY;
bogdanm	0:9b334a45a8ff	2189	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm	0:9b334a45a8ff	2190
bogdanm	0:9b334a45a8ff	2191	do
bogdanm	0:9b334a45a8ff	2192	{
bogdanm	0:9b334a45a8ff	2193	/* Generate Start */
bogdanm	0:9b334a45a8ff	2194	SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
bogdanm	0:9b334a45a8ff	2195
bogdanm	0:9b334a45a8ff	2196	/* Wait until SB flag is set */
bogdanm	0:9b334a45a8ff	2197	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	2198	{
bogdanm	0:9b334a45a8ff	2199	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	2200	}
bogdanm	0:9b334a45a8ff	2201
bogdanm	0:9b334a45a8ff	2202	/* Send slave address */
bogdanm	0:9b334a45a8ff	2203	hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
bogdanm	0:9b334a45a8ff	2204
bogdanm	0:9b334a45a8ff	2205	/* Wait until ADDR or AF flag are set */
bogdanm	0:9b334a45a8ff	2206	/* Get tick */
bogdanm	0:9b334a45a8ff	2207	tickstart = HAL_GetTick();
bogdanm	0:9b334a45a8ff	2208
bogdanm	0:9b334a45a8ff	2209	while((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR) == RESET) && \
bogdanm	0:9b334a45a8ff	2210	(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == RESET) && \
bogdanm	0:9b334a45a8ff	2211	(hi2c->State != HAL_I2C_STATE_TIMEOUT))
bogdanm	0:9b334a45a8ff	2212	{
bogdanm	0:9b334a45a8ff	2213	if(Timeout != HAL_MAX_DELAY)
bogdanm	0:9b334a45a8ff	2214	{
bogdanm	0:9b334a45a8ff	2215	if((Timeout == 0)\|\|((HAL_GetTick() - tickstart ) > Timeout))
bogdanm	0:9b334a45a8ff	2216	{
bogdanm	0:9b334a45a8ff	2217	hi2c->State = HAL_I2C_STATE_TIMEOUT;
bogdanm	0:9b334a45a8ff	2218	}
bogdanm	0:9b334a45a8ff	2219	}
bogdanm	0:9b334a45a8ff	2220	}
bogdanm	0:9b334a45a8ff	2221
bogdanm	0:9b334a45a8ff	2222	hi2c->State = HAL_I2C_STATE_READY;
bogdanm	0:9b334a45a8ff	2223
bogdanm	0:9b334a45a8ff	2224	/* Check if the ADDR flag has been set */
bogdanm	0:9b334a45a8ff	2225	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR) == SET)
bogdanm	0:9b334a45a8ff	2226	{
bogdanm	0:9b334a45a8ff	2227	/* Generate Stop */
bogdanm	0:9b334a45a8ff	2228	SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP);
bogdanm	0:9b334a45a8ff	2229
bogdanm	0:9b334a45a8ff	2230	/* Clear ADDR Flag */
bogdanm	0:9b334a45a8ff	2231	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
bogdanm	0:9b334a45a8ff	2232
bogdanm	0:9b334a45a8ff	2233	/* Wait until BUSY flag is reset */
bogdanm	0:9b334a45a8ff	2234	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	2235	{
bogdanm	0:9b334a45a8ff	2236	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	2237	}
bogdanm	0:9b334a45a8ff	2238
bogdanm	0:9b334a45a8ff	2239	hi2c->State = HAL_I2C_STATE_READY;
bogdanm	0:9b334a45a8ff	2240
bogdanm	0:9b334a45a8ff	2241	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	2242	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	2243
bogdanm	0:9b334a45a8ff	2244	return HAL_OK;
bogdanm	0:9b334a45a8ff	2245	}
bogdanm	0:9b334a45a8ff	2246	else
bogdanm	0:9b334a45a8ff	2247	{
bogdanm	0:9b334a45a8ff	2248	/* Generate Stop */
bogdanm	0:9b334a45a8ff	2249	SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP);
bogdanm	0:9b334a45a8ff	2250
bogdanm	0:9b334a45a8ff	2251	/* Clear AF Flag */
bogdanm	0:9b334a45a8ff	2252	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
bogdanm	0:9b334a45a8ff	2253
bogdanm	0:9b334a45a8ff	2254	/* Wait until BUSY flag is reset */
bogdanm	0:9b334a45a8ff	2255	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	2256	{
bogdanm	0:9b334a45a8ff	2257	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	2258	}
bogdanm	0:9b334a45a8ff	2259	}
bogdanm	0:9b334a45a8ff	2260	}while(I2C_Trials++ < Trials);
bogdanm	0:9b334a45a8ff	2261
bogdanm	0:9b334a45a8ff	2262	hi2c->State = HAL_I2C_STATE_READY;
bogdanm	0:9b334a45a8ff	2263
bogdanm	0:9b334a45a8ff	2264	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	2265	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	2266
bogdanm	0:9b334a45a8ff	2267	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	2268	}
bogdanm	0:9b334a45a8ff	2269	else
bogdanm	0:9b334a45a8ff	2270	{
bogdanm	0:9b334a45a8ff	2271	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	2272	}
bogdanm	0:9b334a45a8ff	2273	}
bogdanm	0:9b334a45a8ff	2274
bogdanm	0:9b334a45a8ff	2275	/**
bogdanm	0:9b334a45a8ff	2276	* @brief This function handles I2C event interrupt request.
bogdanm	0:9b334a45a8ff	2277	* @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	2278	* the configuration information for I2C module
bogdanm	0:9b334a45a8ff	2279	* @retval HAL status
bogdanm	0:9b334a45a8ff	2280	*/
bogdanm	0:9b334a45a8ff	2281	void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c)
bogdanm	0:9b334a45a8ff	2282	{
bogdanm	0:9b334a45a8ff	2283	/* Master mode selected */
bogdanm	0:9b334a45a8ff	2284	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_MSL) == SET)
bogdanm	0:9b334a45a8ff	2285	{
bogdanm	0:9b334a45a8ff	2286	/* I2C in mode Transmitter -----------------------------------------------*/
bogdanm	0:9b334a45a8ff	2287	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TRA) == SET)
bogdanm	0:9b334a45a8ff	2288	{
bogdanm	0:9b334a45a8ff	2289	/* TXE set and BTF reset -----------------------------------------------*/
bogdanm	0:9b334a45a8ff	2290	if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == SET) && \
bogdanm	0:9b334a45a8ff	2291	(__HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_BUF) == SET) && \
bogdanm	0:9b334a45a8ff	2292	(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == RESET))
bogdanm	0:9b334a45a8ff	2293	{
bogdanm	0:9b334a45a8ff	2294	I2C_MasterTransmit_TXE(hi2c);
bogdanm	0:9b334a45a8ff	2295	}
bogdanm	0:9b334a45a8ff	2296	/* BTF set -------------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	2297	else if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && \
bogdanm	0:9b334a45a8ff	2298	(__HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_EVT) == SET))
bogdanm	0:9b334a45a8ff	2299	{
bogdanm	0:9b334a45a8ff	2300	I2C_MasterTransmit_BTF(hi2c);
bogdanm	0:9b334a45a8ff	2301	}
bogdanm	0:9b334a45a8ff	2302	}
bogdanm	0:9b334a45a8ff	2303	/* I2C in mode Receiver --------------------------------------------------*/
bogdanm	0:9b334a45a8ff	2304	else
bogdanm	0:9b334a45a8ff	2305	{
bogdanm	0:9b334a45a8ff	2306	/* RXNE set and BTF reset -----------------------------------------------*/
bogdanm	0:9b334a45a8ff	2307	if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET) && \
bogdanm	0:9b334a45a8ff	2308	(__HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_BUF) == SET) && \
bogdanm	0:9b334a45a8ff	2309	(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == RESET))
bogdanm	0:9b334a45a8ff	2310	{
bogdanm	0:9b334a45a8ff	2311	I2C_MasterReceive_RXNE(hi2c);
bogdanm	0:9b334a45a8ff	2312	}
bogdanm	0:9b334a45a8ff	2313	/* BTF set -------------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	2314	else if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (__HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_EVT) == SET))
bogdanm	0:9b334a45a8ff	2315	{
bogdanm	0:9b334a45a8ff	2316	I2C_MasterReceive_BTF(hi2c);
bogdanm	0:9b334a45a8ff	2317	}
bogdanm	0:9b334a45a8ff	2318	}
bogdanm	0:9b334a45a8ff	2319	}
bogdanm	0:9b334a45a8ff	2320	/* Slave mode selected */
bogdanm	0:9b334a45a8ff	2321	else
bogdanm	0:9b334a45a8ff	2322	{
bogdanm	0:9b334a45a8ff	2323	/* ADDR set --------------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	2324	if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR) == SET) && \
bogdanm	0:9b334a45a8ff	2325	(__HAL_I2C_GET_IT_SOURCE(hi2c, (I2C_IT_EVT)) == SET))
bogdanm	0:9b334a45a8ff	2326	{
bogdanm	0:9b334a45a8ff	2327	I2C_Slave_ADDR(hi2c);
bogdanm	0:9b334a45a8ff	2328	}
bogdanm	0:9b334a45a8ff	2329	/* STOPF set --------------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	2330	else if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET) && \
bogdanm	0:9b334a45a8ff	2331	(__HAL_I2C_GET_IT_SOURCE(hi2c, (I2C_IT_EVT)) == SET))
bogdanm	0:9b334a45a8ff	2332	{
bogdanm	0:9b334a45a8ff	2333	I2C_Slave_STOPF(hi2c);
bogdanm	0:9b334a45a8ff	2334	}
bogdanm	0:9b334a45a8ff	2335	/* I2C in mode Transmitter -----------------------------------------------*/
bogdanm	0:9b334a45a8ff	2336	else if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TRA) == SET)
bogdanm	0:9b334a45a8ff	2337	{
bogdanm	0:9b334a45a8ff	2338	/* TXE set and BTF reset -----------------------------------------------*/
bogdanm	0:9b334a45a8ff	2339	if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == SET) && \
bogdanm	0:9b334a45a8ff	2340	(__HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_BUF) == SET) && \
bogdanm	0:9b334a45a8ff	2341	(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == RESET))
bogdanm	0:9b334a45a8ff	2342	{
bogdanm	0:9b334a45a8ff	2343	I2C_SlaveTransmit_TXE(hi2c);
bogdanm	0:9b334a45a8ff	2344	}
bogdanm	0:9b334a45a8ff	2345	/* BTF set -------------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	2346	else if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && \
bogdanm	0:9b334a45a8ff	2347	(__HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_EVT) == SET))
bogdanm	0:9b334a45a8ff	2348	{
bogdanm	0:9b334a45a8ff	2349	I2C_SlaveTransmit_BTF(hi2c);
bogdanm	0:9b334a45a8ff	2350	}
bogdanm	0:9b334a45a8ff	2351	}
bogdanm	0:9b334a45a8ff	2352	/* I2C in mode Receiver --------------------------------------------------*/
bogdanm	0:9b334a45a8ff	2353	else
bogdanm	0:9b334a45a8ff	2354	{
bogdanm	0:9b334a45a8ff	2355	/* RXNE set and BTF reset ----------------------------------------------*/
bogdanm	0:9b334a45a8ff	2356	if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET) && \
bogdanm	0:9b334a45a8ff	2357	(__HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_BUF) == SET) && \
bogdanm	0:9b334a45a8ff	2358	(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == RESET))
bogdanm	0:9b334a45a8ff	2359	{
bogdanm	0:9b334a45a8ff	2360	I2C_SlaveReceive_RXNE(hi2c);
bogdanm	0:9b334a45a8ff	2361	}
bogdanm	0:9b334a45a8ff	2362	/* BTF set -------------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	2363	else if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (__HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_EVT) == SET))
bogdanm	0:9b334a45a8ff	2364	{
bogdanm	0:9b334a45a8ff	2365	I2C_SlaveReceive_BTF(hi2c);
bogdanm	0:9b334a45a8ff	2366	}
bogdanm	0:9b334a45a8ff	2367	}
bogdanm	0:9b334a45a8ff	2368	}
bogdanm	0:9b334a45a8ff	2369	}
bogdanm	0:9b334a45a8ff	2370
bogdanm	0:9b334a45a8ff	2371	/**
bogdanm	0:9b334a45a8ff	2372	* @brief This function handles I2C error interrupt request.
bogdanm	0:9b334a45a8ff	2373	* @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	2374	* the configuration information for I2C module
bogdanm	0:9b334a45a8ff	2375	* @retval HAL status
bogdanm	0:9b334a45a8ff	2376	*/
bogdanm	0:9b334a45a8ff	2377	void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c)
bogdanm	0:9b334a45a8ff	2378	{
bogdanm	0:9b334a45a8ff	2379
bogdanm	0:9b334a45a8ff	2380	/* I2C Bus error interrupt occurred ----------------------------------------*/
bogdanm	0:9b334a45a8ff	2381	if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BERR) == SET) && \
bogdanm	0:9b334a45a8ff	2382	(__HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_ERR) == SET))
bogdanm	0:9b334a45a8ff	2383	{
bogdanm	0:9b334a45a8ff	2384	hi2c->ErrorCode \|= HAL_I2C_ERROR_BERR;
bogdanm	0:9b334a45a8ff	2385
bogdanm	0:9b334a45a8ff	2386	/* Clear BERR flag */
bogdanm	0:9b334a45a8ff	2387	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_BERR);
bogdanm	0:9b334a45a8ff	2388	}
bogdanm	0:9b334a45a8ff	2389
bogdanm	0:9b334a45a8ff	2390	/* I2C Arbitration Loss error interrupt occurred ---------------------------*/
bogdanm	0:9b334a45a8ff	2391	if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ARLO) == SET) && \
bogdanm	0:9b334a45a8ff	2392	(__HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_ERR) == SET))
bogdanm	0:9b334a45a8ff	2393	{
bogdanm	0:9b334a45a8ff	2394	hi2c->ErrorCode \|= HAL_I2C_ERROR_ARLO;
bogdanm	0:9b334a45a8ff	2395
bogdanm	0:9b334a45a8ff	2396	/* Clear ARLO flag */
bogdanm	0:9b334a45a8ff	2397	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ARLO);
bogdanm	0:9b334a45a8ff	2398	}
bogdanm	0:9b334a45a8ff	2399
bogdanm	0:9b334a45a8ff	2400	/* I2C Acknowledge failure error interrupt occurred ------------------------*/
bogdanm	0:9b334a45a8ff	2401	if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET) && \
bogdanm	0:9b334a45a8ff	2402	(__HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_ERR) == SET))
bogdanm	0:9b334a45a8ff	2403	{
bogdanm	0:9b334a45a8ff	2404	if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_MSL) == RESET) && \
bogdanm	0:9b334a45a8ff	2405	(hi2c->XferCount == 0) && \
bogdanm	0:9b334a45a8ff	2406	(hi2c->State == HAL_I2C_STATE_BUSY_TX))
bogdanm	0:9b334a45a8ff	2407	{
bogdanm	0:9b334a45a8ff	2408	I2C_Slave_AF(hi2c);
bogdanm	0:9b334a45a8ff	2409	}
bogdanm	0:9b334a45a8ff	2410	else
bogdanm	0:9b334a45a8ff	2411	{
bogdanm	0:9b334a45a8ff	2412	hi2c->ErrorCode \|= HAL_I2C_ERROR_AF;
bogdanm	0:9b334a45a8ff	2413	/* Clear AF flag */
bogdanm	0:9b334a45a8ff	2414	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
bogdanm	0:9b334a45a8ff	2415	}
bogdanm	0:9b334a45a8ff	2416	}
bogdanm	0:9b334a45a8ff	2417
bogdanm	0:9b334a45a8ff	2418	/* I2C Over-Run/Under-Run interrupt occurred -------------------------------*/
bogdanm	0:9b334a45a8ff	2419	if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_OVR) == SET) && \
bogdanm	0:9b334a45a8ff	2420	(__HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_ERR) == SET))
bogdanm	0:9b334a45a8ff	2421	{
bogdanm	0:9b334a45a8ff	2422	hi2c->ErrorCode \|= HAL_I2C_ERROR_OVR;
bogdanm	0:9b334a45a8ff	2423	/* Clear OVR flag */
bogdanm	0:9b334a45a8ff	2424	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_OVR);
bogdanm	0:9b334a45a8ff	2425	}
bogdanm	0:9b334a45a8ff	2426
bogdanm	0:9b334a45a8ff	2427	if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
bogdanm	0:9b334a45a8ff	2428	{
bogdanm	0:9b334a45a8ff	2429	hi2c->State = HAL_I2C_STATE_READY;
bogdanm	0:9b334a45a8ff	2430
bogdanm	0:9b334a45a8ff	2431	/* Disable EVT, BUF and ERR interrupts */
bogdanm	0:9b334a45a8ff	2432	__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
bogdanm	0:9b334a45a8ff	2433
bogdanm	0:9b334a45a8ff	2434	HAL_I2C_ErrorCallback(hi2c);
bogdanm	0:9b334a45a8ff	2435	}
bogdanm	0:9b334a45a8ff	2436	}
bogdanm	0:9b334a45a8ff	2437
bogdanm	0:9b334a45a8ff	2438	/**
bogdanm	0:9b334a45a8ff	2439	* @brief Master Tx Transfer completed callbacks.
bogdanm	0:9b334a45a8ff	2440	* @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	2441	* the configuration information for I2C module
bogdanm	0:9b334a45a8ff	2442	* @retval None
bogdanm	0:9b334a45a8ff	2443	*/
bogdanm	0:9b334a45a8ff	2444	__weak void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c)
bogdanm	0:9b334a45a8ff	2445	{
bogdanm	0:9b334a45a8ff	2446	/* NOTE : This function should not be modified, when the callback is needed,
bogdanm	0:9b334a45a8ff	2447	the HAL_I2C_MasterTxCpltCallback can be implemented in the user file
bogdanm	0:9b334a45a8ff	2448	*/
bogdanm	0:9b334a45a8ff	2449	}
bogdanm	0:9b334a45a8ff	2450
bogdanm	0:9b334a45a8ff	2451	/**
bogdanm	0:9b334a45a8ff	2452	* @brief Master Rx Transfer completed callbacks.
bogdanm	0:9b334a45a8ff	2453	* @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	2454	* the configuration information for I2C module
bogdanm	0:9b334a45a8ff	2455	* @retval None
bogdanm	0:9b334a45a8ff	2456	*/
bogdanm	0:9b334a45a8ff	2457	__weak void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c)
bogdanm	0:9b334a45a8ff	2458	{
bogdanm	0:9b334a45a8ff	2459	/* NOTE : This function should not be modified, when the callback is needed,
bogdanm	0:9b334a45a8ff	2460	the HAL_I2C_MasterRxCpltCallback can be implemented in the user file
bogdanm	0:9b334a45a8ff	2461	*/
bogdanm	0:9b334a45a8ff	2462	}
bogdanm	0:9b334a45a8ff	2463
bogdanm	0:9b334a45a8ff	2464	/** @brief Slave Tx Transfer completed callbacks.
bogdanm	0:9b334a45a8ff	2465	* @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	2466	* the configuration information for I2C module
bogdanm	0:9b334a45a8ff	2467	* @retval None
bogdanm	0:9b334a45a8ff	2468	*/
bogdanm	0:9b334a45a8ff	2469	__weak void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c)
bogdanm	0:9b334a45a8ff	2470	{
bogdanm	0:9b334a45a8ff	2471	/* NOTE : This function should not be modified, when the callback is needed,
bogdanm	0:9b334a45a8ff	2472	the HAL_I2C_SlaveTxCpltCallback can be implemented in the user file
bogdanm	0:9b334a45a8ff	2473	*/
bogdanm	0:9b334a45a8ff	2474	}
bogdanm	0:9b334a45a8ff	2475
bogdanm	0:9b334a45a8ff	2476	/**
bogdanm	0:9b334a45a8ff	2477	* @brief Slave Rx Transfer completed callbacks.
bogdanm	0:9b334a45a8ff	2478	* @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	2479	* the configuration information for I2C module
bogdanm	0:9b334a45a8ff	2480	* @retval None
bogdanm	0:9b334a45a8ff	2481	*/
bogdanm	0:9b334a45a8ff	2482	__weak void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c)
bogdanm	0:9b334a45a8ff	2483	{
bogdanm	0:9b334a45a8ff	2484	/* NOTE : This function should not be modified, when the callback is needed,
bogdanm	0:9b334a45a8ff	2485	the HAL_I2C_SlaveRxCpltCallback can be implemented in the user file
bogdanm	0:9b334a45a8ff	2486	*/
bogdanm	0:9b334a45a8ff	2487	}
bogdanm	0:9b334a45a8ff	2488
bogdanm	0:9b334a45a8ff	2489	/**
bogdanm	0:9b334a45a8ff	2490	* @brief Memory Tx Transfer completed callbacks.
bogdanm	0:9b334a45a8ff	2491	* @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	2492	* the configuration information for I2C module
bogdanm	0:9b334a45a8ff	2493	* @retval None
bogdanm	0:9b334a45a8ff	2494	*/
bogdanm	0:9b334a45a8ff	2495	__weak void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c)
bogdanm	0:9b334a45a8ff	2496	{
bogdanm	0:9b334a45a8ff	2497	/* NOTE : This function should not be modified, when the callback is needed,
bogdanm	0:9b334a45a8ff	2498	the HAL_I2C_MemTxCpltCallback can be implemented in the user file
bogdanm	0:9b334a45a8ff	2499	*/
bogdanm	0:9b334a45a8ff	2500	}
bogdanm	0:9b334a45a8ff	2501
bogdanm	0:9b334a45a8ff	2502	/**
bogdanm	0:9b334a45a8ff	2503	* @brief Memory Rx Transfer completed callbacks.
bogdanm	0:9b334a45a8ff	2504	* @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	2505	* the configuration information for I2C module
bogdanm	0:9b334a45a8ff	2506	* @retval None
bogdanm	0:9b334a45a8ff	2507	*/
bogdanm	0:9b334a45a8ff	2508	__weak void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c)
bogdanm	0:9b334a45a8ff	2509	{
bogdanm	0:9b334a45a8ff	2510	/* NOTE : This function should not be modified, when the callback is needed,
bogdanm	0:9b334a45a8ff	2511	the HAL_I2C_MemRxCpltCallback can be implemented in the user file
bogdanm	0:9b334a45a8ff	2512	*/
bogdanm	0:9b334a45a8ff	2513	}
bogdanm	0:9b334a45a8ff	2514
bogdanm	0:9b334a45a8ff	2515	/**
bogdanm	0:9b334a45a8ff	2516	* @brief I2C error callbacks.
bogdanm	0:9b334a45a8ff	2517	* @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	2518	* the configuration information for I2C module
bogdanm	0:9b334a45a8ff	2519	* @retval None
bogdanm	0:9b334a45a8ff	2520	*/
bogdanm	0:9b334a45a8ff	2521	__weak void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c)
bogdanm	0:9b334a45a8ff	2522	{
bogdanm	0:9b334a45a8ff	2523	/* NOTE : This function should not be modified, when the callback is needed,
bogdanm	0:9b334a45a8ff	2524	the HAL_I2C_ErrorCallback can be implemented in the user file
bogdanm	0:9b334a45a8ff	2525	*/
bogdanm	0:9b334a45a8ff	2526	}
bogdanm	0:9b334a45a8ff	2527
bogdanm	0:9b334a45a8ff	2528	/**
bogdanm	0:9b334a45a8ff	2529	* @}
bogdanm	0:9b334a45a8ff	2530	*/
bogdanm	0:9b334a45a8ff	2531
bogdanm	0:9b334a45a8ff	2532	/** @defgroup I2C_Exported_Functions_Group3 Peripheral State and Errors functions
bogdanm	0:9b334a45a8ff	2533	* @brief Peripheral State and Errors functions
bogdanm	0:9b334a45a8ff	2534	*
bogdanm	0:9b334a45a8ff	2535	@verbatim
bogdanm	0:9b334a45a8ff	2536	===============================================================================
bogdanm	0:9b334a45a8ff	2537	##### Peripheral State and Errors functions #####
bogdanm	0:9b334a45a8ff	2538	===============================================================================
bogdanm	0:9b334a45a8ff	2539	[..]
bogdanm	0:9b334a45a8ff	2540	This subsection permits to get in run-time the status of the peripheral
bogdanm	0:9b334a45a8ff	2541	and the data flow.
bogdanm	0:9b334a45a8ff	2542
bogdanm	0:9b334a45a8ff	2543	@endverbatim
bogdanm	0:9b334a45a8ff	2544	* @{
bogdanm	0:9b334a45a8ff	2545	*/
bogdanm	0:9b334a45a8ff	2546
bogdanm	0:9b334a45a8ff	2547	/**
bogdanm	0:9b334a45a8ff	2548	* @brief Returns the I2C state.
bogdanm	0:9b334a45a8ff	2549	* @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	2550	* the configuration information for I2C module
bogdanm	0:9b334a45a8ff	2551	* @retval HAL state
bogdanm	0:9b334a45a8ff	2552	*/
bogdanm	0:9b334a45a8ff	2553	HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c)
bogdanm	0:9b334a45a8ff	2554	{
bogdanm	0:9b334a45a8ff	2555	return hi2c->State;
bogdanm	0:9b334a45a8ff	2556	}
bogdanm	0:9b334a45a8ff	2557
bogdanm	0:9b334a45a8ff	2558	/**
bogdanm	0:9b334a45a8ff	2559	* @brief Return the I2C error code
bogdanm	0:9b334a45a8ff	2560	* @param hi2c : pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	2561	* the configuration information for the specified I2C.
bogdanm	0:9b334a45a8ff	2562	* @retval I2C Error Code
bogdanm	0:9b334a45a8ff	2563	*/
bogdanm	0:9b334a45a8ff	2564	uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c)
bogdanm	0:9b334a45a8ff	2565	{
bogdanm	0:9b334a45a8ff	2566	return hi2c->ErrorCode;
bogdanm	0:9b334a45a8ff	2567	}
bogdanm	0:9b334a45a8ff	2568
bogdanm	0:9b334a45a8ff	2569	/**
bogdanm	0:9b334a45a8ff	2570	* @}
bogdanm	0:9b334a45a8ff	2571	*/
bogdanm	0:9b334a45a8ff	2572
bogdanm	0:9b334a45a8ff	2573	/**
bogdanm	0:9b334a45a8ff	2574	* @}
bogdanm	0:9b334a45a8ff	2575	*/
bogdanm	0:9b334a45a8ff	2576
bogdanm	0:9b334a45a8ff	2577
bogdanm	0:9b334a45a8ff	2578	/** @addtogroup I2C_Private_Functions
bogdanm	0:9b334a45a8ff	2579	* @{
bogdanm	0:9b334a45a8ff	2580	*/
bogdanm	0:9b334a45a8ff	2581
bogdanm	0:9b334a45a8ff	2582
bogdanm	0:9b334a45a8ff	2583	/**
bogdanm	0:9b334a45a8ff	2584	* @brief Handle TXE flag for Master
bogdanm	0:9b334a45a8ff	2585	* @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	2586	* the configuration information for I2C module
bogdanm	0:9b334a45a8ff	2587	* @retval HAL status
bogdanm	0:9b334a45a8ff	2588	*/
bogdanm	0:9b334a45a8ff	2589	static HAL_StatusTypeDef I2C_MasterTransmit_TXE(I2C_HandleTypeDef *hi2c)
bogdanm	0:9b334a45a8ff	2590	{
bogdanm	0:9b334a45a8ff	2591	/* Write data to DR */
bogdanm	0:9b334a45a8ff	2592	hi2c->Instance->DR = (*hi2c->pBuffPtr++);
bogdanm	0:9b334a45a8ff	2593	hi2c->XferCount--;
bogdanm	0:9b334a45a8ff	2594
bogdanm	0:9b334a45a8ff	2595	if(hi2c->XferCount == 0)
bogdanm	0:9b334a45a8ff	2596	{
bogdanm	0:9b334a45a8ff	2597	/* Disable BUF interrupt */
bogdanm	0:9b334a45a8ff	2598	__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
bogdanm	0:9b334a45a8ff	2599	}
bogdanm	0:9b334a45a8ff	2600
bogdanm	0:9b334a45a8ff	2601	return HAL_OK;
bogdanm	0:9b334a45a8ff	2602	}
bogdanm	0:9b334a45a8ff	2603
bogdanm	0:9b334a45a8ff	2604	/**
bogdanm	0:9b334a45a8ff	2605	* @brief Handle BTF flag for Master transmitter
bogdanm	0:9b334a45a8ff	2606	* @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	2607	* the configuration information for I2C module
bogdanm	0:9b334a45a8ff	2608	* @retval HAL status
bogdanm	0:9b334a45a8ff	2609	*/
bogdanm	0:9b334a45a8ff	2610	static HAL_StatusTypeDef I2C_MasterTransmit_BTF(I2C_HandleTypeDef *hi2c)
bogdanm	0:9b334a45a8ff	2611	{
bogdanm	0:9b334a45a8ff	2612	if(hi2c->XferCount != 0)
bogdanm	0:9b334a45a8ff	2613	{
bogdanm	0:9b334a45a8ff	2614	/* Write data to DR */
bogdanm	0:9b334a45a8ff	2615	hi2c->Instance->DR = (*hi2c->pBuffPtr++);
bogdanm	0:9b334a45a8ff	2616	hi2c->XferCount--;
bogdanm	0:9b334a45a8ff	2617	}
bogdanm	0:9b334a45a8ff	2618	else
bogdanm	0:9b334a45a8ff	2619	{
bogdanm	0:9b334a45a8ff	2620	/* Disable EVT, BUF and ERR interrupt */
bogdanm	0:9b334a45a8ff	2621	__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
bogdanm	0:9b334a45a8ff	2622
bogdanm	0:9b334a45a8ff	2623	/* Generate Stop */
bogdanm	0:9b334a45a8ff	2624	SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP);
bogdanm	0:9b334a45a8ff	2625
bogdanm	0:9b334a45a8ff	2626	/* Wait until BUSY flag is reset */
bogdanm	0:9b334a45a8ff	2627	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK)
bogdanm	0:9b334a45a8ff	2628	{
bogdanm	0:9b334a45a8ff	2629	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	2630	}
bogdanm	0:9b334a45a8ff	2631
bogdanm	0:9b334a45a8ff	2632	if(hi2c->State == HAL_I2C_STATE_MEM_BUSY_TX)
bogdanm	0:9b334a45a8ff	2633	{
bogdanm	0:9b334a45a8ff	2634	hi2c->State = HAL_I2C_STATE_READY;
bogdanm	0:9b334a45a8ff	2635
bogdanm	0:9b334a45a8ff	2636	HAL_I2C_MemTxCpltCallback(hi2c);
bogdanm	0:9b334a45a8ff	2637	}
bogdanm	0:9b334a45a8ff	2638	else
bogdanm	0:9b334a45a8ff	2639	{
bogdanm	0:9b334a45a8ff	2640	hi2c->State = HAL_I2C_STATE_READY;
bogdanm	0:9b334a45a8ff	2641
bogdanm	0:9b334a45a8ff	2642	HAL_I2C_MasterTxCpltCallback(hi2c);
bogdanm	0:9b334a45a8ff	2643	}
bogdanm	0:9b334a45a8ff	2644	}
bogdanm	0:9b334a45a8ff	2645	return HAL_OK;
bogdanm	0:9b334a45a8ff	2646	}
bogdanm	0:9b334a45a8ff	2647
bogdanm	0:9b334a45a8ff	2648	/**
bogdanm	0:9b334a45a8ff	2649	* @brief Handle RXNE flag for Master
bogdanm	0:9b334a45a8ff	2650	* @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	2651	* the configuration information for I2C module
bogdanm	0:9b334a45a8ff	2652	* @retval HAL status
bogdanm	0:9b334a45a8ff	2653	*/
bogdanm	0:9b334a45a8ff	2654	static HAL_StatusTypeDef I2C_MasterReceive_RXNE(I2C_HandleTypeDef *hi2c)
bogdanm	0:9b334a45a8ff	2655	{
bogdanm	0:9b334a45a8ff	2656	uint32_t tmp = 0;
bogdanm	0:9b334a45a8ff	2657
bogdanm	0:9b334a45a8ff	2658	tmp = hi2c->XferCount;
bogdanm	0:9b334a45a8ff	2659	if(tmp > 3)
bogdanm	0:9b334a45a8ff	2660	{
bogdanm	0:9b334a45a8ff	2661	/* Read data from DR */
bogdanm	0:9b334a45a8ff	2662	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
bogdanm	0:9b334a45a8ff	2663	hi2c->XferCount--;
bogdanm	0:9b334a45a8ff	2664	}
bogdanm	0:9b334a45a8ff	2665	else if((tmp == 2) \|\| (tmp == 3))
bogdanm	0:9b334a45a8ff	2666	{
bogdanm	0:9b334a45a8ff	2667	/* Disable BUF interrupt */
bogdanm	0:9b334a45a8ff	2668	__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
bogdanm	0:9b334a45a8ff	2669	}
bogdanm	0:9b334a45a8ff	2670	else
bogdanm	0:9b334a45a8ff	2671	{
bogdanm	0:9b334a45a8ff	2672	/* Disable EVT, BUF and ERR interrupt */
bogdanm	0:9b334a45a8ff	2673	__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
bogdanm	0:9b334a45a8ff	2674
bogdanm	0:9b334a45a8ff	2675	/* Read data from DR */
bogdanm	0:9b334a45a8ff	2676	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
bogdanm	0:9b334a45a8ff	2677	hi2c->XferCount--;
bogdanm	0:9b334a45a8ff	2678
bogdanm	0:9b334a45a8ff	2679	/* Wait until BUSY flag is reset */
bogdanm	0:9b334a45a8ff	2680	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK)
bogdanm	0:9b334a45a8ff	2681	{
bogdanm	0:9b334a45a8ff	2682	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	2683	}
bogdanm	0:9b334a45a8ff	2684
bogdanm	0:9b334a45a8ff	2685	if(hi2c->State == HAL_I2C_STATE_MEM_BUSY_RX)
bogdanm	0:9b334a45a8ff	2686	{
bogdanm	0:9b334a45a8ff	2687	hi2c->State = HAL_I2C_STATE_READY;
bogdanm	0:9b334a45a8ff	2688
bogdanm	0:9b334a45a8ff	2689	HAL_I2C_MemRxCpltCallback(hi2c);
bogdanm	0:9b334a45a8ff	2690	}
bogdanm	0:9b334a45a8ff	2691	else
bogdanm	0:9b334a45a8ff	2692	{
bogdanm	0:9b334a45a8ff	2693	hi2c->State = HAL_I2C_STATE_READY;
bogdanm	0:9b334a45a8ff	2694
bogdanm	0:9b334a45a8ff	2695	HAL_I2C_MasterRxCpltCallback(hi2c);
bogdanm	0:9b334a45a8ff	2696	}
bogdanm	0:9b334a45a8ff	2697	}
bogdanm	0:9b334a45a8ff	2698	return HAL_OK;
bogdanm	0:9b334a45a8ff	2699	}
bogdanm	0:9b334a45a8ff	2700
bogdanm	0:9b334a45a8ff	2701	/**
bogdanm	0:9b334a45a8ff	2702	* @brief Handle BTF flag for Master receiver
bogdanm	0:9b334a45a8ff	2703	* @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	2704	* the configuration information for I2C module
bogdanm	0:9b334a45a8ff	2705	* @retval HAL status
bogdanm	0:9b334a45a8ff	2706	*/
bogdanm	0:9b334a45a8ff	2707	static HAL_StatusTypeDef I2C_MasterReceive_BTF(I2C_HandleTypeDef *hi2c)
bogdanm	0:9b334a45a8ff	2708	{
bogdanm	0:9b334a45a8ff	2709	if(hi2c->XferCount == 3)
bogdanm	0:9b334a45a8ff	2710	{
bogdanm	0:9b334a45a8ff	2711	/* Disable Acknowledge */
bogdanm	0:9b334a45a8ff	2712	CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
bogdanm	0:9b334a45a8ff	2713
bogdanm	0:9b334a45a8ff	2714	/* Read data from DR */
bogdanm	0:9b334a45a8ff	2715	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
bogdanm	0:9b334a45a8ff	2716	hi2c->XferCount--;
bogdanm	0:9b334a45a8ff	2717	}
bogdanm	0:9b334a45a8ff	2718	else if(hi2c->XferCount == 2)
bogdanm	0:9b334a45a8ff	2719	{
bogdanm	0:9b334a45a8ff	2720	/* Generate Stop */
bogdanm	0:9b334a45a8ff	2721	SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP);
bogdanm	0:9b334a45a8ff	2722
bogdanm	0:9b334a45a8ff	2723	/* Read data from DR */
bogdanm	0:9b334a45a8ff	2724	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
bogdanm	0:9b334a45a8ff	2725	hi2c->XferCount--;
bogdanm	0:9b334a45a8ff	2726
bogdanm	0:9b334a45a8ff	2727	/* Read data from DR */
bogdanm	0:9b334a45a8ff	2728	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
bogdanm	0:9b334a45a8ff	2729	hi2c->XferCount--;
bogdanm	0:9b334a45a8ff	2730
bogdanm	0:9b334a45a8ff	2731	/* Disable EVT and ERR interrupt */
bogdanm	0:9b334a45a8ff	2732	__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_ERR);
bogdanm	0:9b334a45a8ff	2733
bogdanm	0:9b334a45a8ff	2734	/* Wait until BUSY flag is reset */
bogdanm	0:9b334a45a8ff	2735	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK)
bogdanm	0:9b334a45a8ff	2736	{
bogdanm	0:9b334a45a8ff	2737	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	2738	}
bogdanm	0:9b334a45a8ff	2739
bogdanm	0:9b334a45a8ff	2740	if(hi2c->State == HAL_I2C_STATE_MEM_BUSY_RX)
bogdanm	0:9b334a45a8ff	2741	{
bogdanm	0:9b334a45a8ff	2742	hi2c->State = HAL_I2C_STATE_READY;
bogdanm	0:9b334a45a8ff	2743
bogdanm	0:9b334a45a8ff	2744	HAL_I2C_MemRxCpltCallback(hi2c);
bogdanm	0:9b334a45a8ff	2745	}
bogdanm	0:9b334a45a8ff	2746	else
bogdanm	0:9b334a45a8ff	2747	{
bogdanm	0:9b334a45a8ff	2748	hi2c->State = HAL_I2C_STATE_READY;
bogdanm	0:9b334a45a8ff	2749
bogdanm	0:9b334a45a8ff	2750	HAL_I2C_MasterRxCpltCallback(hi2c);
bogdanm	0:9b334a45a8ff	2751	}
bogdanm	0:9b334a45a8ff	2752	}
bogdanm	0:9b334a45a8ff	2753	else
bogdanm	0:9b334a45a8ff	2754	{
bogdanm	0:9b334a45a8ff	2755	/* Read data from DR */
bogdanm	0:9b334a45a8ff	2756	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
bogdanm	0:9b334a45a8ff	2757	hi2c->XferCount--;
bogdanm	0:9b334a45a8ff	2758	}
bogdanm	0:9b334a45a8ff	2759	return HAL_OK;
bogdanm	0:9b334a45a8ff	2760	}
bogdanm	0:9b334a45a8ff	2761
bogdanm	0:9b334a45a8ff	2762	/**
bogdanm	0:9b334a45a8ff	2763	* @brief Handle TXE flag for Slave
bogdanm	0:9b334a45a8ff	2764	* @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	2765	* the configuration information for I2C module
bogdanm	0:9b334a45a8ff	2766	* @retval HAL status
bogdanm	0:9b334a45a8ff	2767	*/
bogdanm	0:9b334a45a8ff	2768	static HAL_StatusTypeDef I2C_SlaveTransmit_TXE(I2C_HandleTypeDef *hi2c)
bogdanm	0:9b334a45a8ff	2769	{
bogdanm	0:9b334a45a8ff	2770	if(hi2c->XferCount != 0)
bogdanm	0:9b334a45a8ff	2771	{
bogdanm	0:9b334a45a8ff	2772	/* Write data to DR */
bogdanm	0:9b334a45a8ff	2773	hi2c->Instance->DR = (*hi2c->pBuffPtr++);
bogdanm	0:9b334a45a8ff	2774	hi2c->XferCount--;
bogdanm	0:9b334a45a8ff	2775	}
bogdanm	0:9b334a45a8ff	2776	return HAL_OK;
bogdanm	0:9b334a45a8ff	2777	}
bogdanm	0:9b334a45a8ff	2778
bogdanm	0:9b334a45a8ff	2779	/**
bogdanm	0:9b334a45a8ff	2780	* @brief Handle BTF flag for Slave transmitter
bogdanm	0:9b334a45a8ff	2781	* @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	2782	* the configuration information for I2C module
bogdanm	0:9b334a45a8ff	2783	* @retval HAL status
bogdanm	0:9b334a45a8ff	2784	*/
bogdanm	0:9b334a45a8ff	2785	static HAL_StatusTypeDef I2C_SlaveTransmit_BTF(I2C_HandleTypeDef *hi2c)
bogdanm	0:9b334a45a8ff	2786	{
bogdanm	0:9b334a45a8ff	2787	if(hi2c->XferCount != 0)
bogdanm	0:9b334a45a8ff	2788	{
bogdanm	0:9b334a45a8ff	2789	/* Write data to DR */
bogdanm	0:9b334a45a8ff	2790	hi2c->Instance->DR = (*hi2c->pBuffPtr++);
bogdanm	0:9b334a45a8ff	2791	hi2c->XferCount--;
bogdanm	0:9b334a45a8ff	2792	}
bogdanm	0:9b334a45a8ff	2793	return HAL_OK;
bogdanm	0:9b334a45a8ff	2794	}
bogdanm	0:9b334a45a8ff	2795
bogdanm	0:9b334a45a8ff	2796	/**
bogdanm	0:9b334a45a8ff	2797	* @brief Handle RXNE flag for Slave
bogdanm	0:9b334a45a8ff	2798	* @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	2799	* the configuration information for I2C module
bogdanm	0:9b334a45a8ff	2800	* @retval HAL status
bogdanm	0:9b334a45a8ff	2801	*/
bogdanm	0:9b334a45a8ff	2802	static HAL_StatusTypeDef I2C_SlaveReceive_RXNE(I2C_HandleTypeDef *hi2c)
bogdanm	0:9b334a45a8ff	2803	{
bogdanm	0:9b334a45a8ff	2804	if(hi2c->XferCount != 0)
bogdanm	0:9b334a45a8ff	2805	{
bogdanm	0:9b334a45a8ff	2806	/* Read data from DR */
bogdanm	0:9b334a45a8ff	2807	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
bogdanm	0:9b334a45a8ff	2808	hi2c->XferCount--;
bogdanm	0:9b334a45a8ff	2809	}
bogdanm	0:9b334a45a8ff	2810	return HAL_OK;
bogdanm	0:9b334a45a8ff	2811	}
bogdanm	0:9b334a45a8ff	2812
bogdanm	0:9b334a45a8ff	2813	/**
bogdanm	0:9b334a45a8ff	2814	* @brief Handle BTF flag for Slave receiver
bogdanm	0:9b334a45a8ff	2815	* @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	2816	* the configuration information for I2C module
bogdanm	0:9b334a45a8ff	2817	* @retval HAL status
bogdanm	0:9b334a45a8ff	2818	*/
bogdanm	0:9b334a45a8ff	2819	static HAL_StatusTypeDef I2C_SlaveReceive_BTF(I2C_HandleTypeDef *hi2c)
bogdanm	0:9b334a45a8ff	2820	{
bogdanm	0:9b334a45a8ff	2821	if(hi2c->XferCount != 0)
bogdanm	0:9b334a45a8ff	2822	{
bogdanm	0:9b334a45a8ff	2823	/* Read data from DR */
bogdanm	0:9b334a45a8ff	2824	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
bogdanm	0:9b334a45a8ff	2825	hi2c->XferCount--;
bogdanm	0:9b334a45a8ff	2826	}
bogdanm	0:9b334a45a8ff	2827	return HAL_OK;
bogdanm	0:9b334a45a8ff	2828	}
bogdanm	0:9b334a45a8ff	2829
bogdanm	0:9b334a45a8ff	2830	/**
bogdanm	0:9b334a45a8ff	2831	* @brief Handle ADD flag for Slave
bogdanm	0:9b334a45a8ff	2832	* @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	2833	* the configuration information for I2C module
bogdanm	0:9b334a45a8ff	2834	* @retval HAL status
bogdanm	0:9b334a45a8ff	2835	*/
bogdanm	0:9b334a45a8ff	2836	static HAL_StatusTypeDef I2C_Slave_ADDR(I2C_HandleTypeDef *hi2c)
bogdanm	0:9b334a45a8ff	2837	{
bogdanm	0:9b334a45a8ff	2838	/* Clear ADDR flag */
bogdanm	0:9b334a45a8ff	2839	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
bogdanm	0:9b334a45a8ff	2840
bogdanm	0:9b334a45a8ff	2841	return HAL_OK;
bogdanm	0:9b334a45a8ff	2842	}
bogdanm	0:9b334a45a8ff	2843
bogdanm	0:9b334a45a8ff	2844	/**
bogdanm	0:9b334a45a8ff	2845	* @brief Handle STOPF flag for Slave
bogdanm	0:9b334a45a8ff	2846	* @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	2847	* the configuration information for I2C module
bogdanm	0:9b334a45a8ff	2848	* @retval HAL status
bogdanm	0:9b334a45a8ff	2849	*/
bogdanm	0:9b334a45a8ff	2850	static HAL_StatusTypeDef I2C_Slave_STOPF(I2C_HandleTypeDef *hi2c)
bogdanm	0:9b334a45a8ff	2851	{
bogdanm	0:9b334a45a8ff	2852	/* Disable EVT, BUF and ERR interrupt */
bogdanm	0:9b334a45a8ff	2853	__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
bogdanm	0:9b334a45a8ff	2854
bogdanm	0:9b334a45a8ff	2855	/* Clear STOPF flag */
bogdanm	0:9b334a45a8ff	2856	__HAL_I2C_CLEAR_STOPFLAG(hi2c);
bogdanm	0:9b334a45a8ff	2857
bogdanm	0:9b334a45a8ff	2858	/* Disable Acknowledge */
bogdanm	0:9b334a45a8ff	2859	CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
bogdanm	0:9b334a45a8ff	2860
bogdanm	0:9b334a45a8ff	2861	/* Wait until BUSY flag is reset */
bogdanm	0:9b334a45a8ff	2862	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK)
bogdanm	0:9b334a45a8ff	2863	{
bogdanm	0:9b334a45a8ff	2864	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	2865	}
bogdanm	0:9b334a45a8ff	2866
bogdanm	0:9b334a45a8ff	2867	hi2c->State = HAL_I2C_STATE_READY;
bogdanm	0:9b334a45a8ff	2868
bogdanm	0:9b334a45a8ff	2869	HAL_I2C_SlaveRxCpltCallback(hi2c);
bogdanm	0:9b334a45a8ff	2870
bogdanm	0:9b334a45a8ff	2871	return HAL_OK;
bogdanm	0:9b334a45a8ff	2872	}
bogdanm	0:9b334a45a8ff	2873
bogdanm	0:9b334a45a8ff	2874	/**
bogdanm	0:9b334a45a8ff	2875	* @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	2876	* the configuration information for I2C module
bogdanm	0:9b334a45a8ff	2877	* @retval HAL status
bogdanm	0:9b334a45a8ff	2878	*/
bogdanm	0:9b334a45a8ff	2879	static HAL_StatusTypeDef I2C_Slave_AF(I2C_HandleTypeDef *hi2c)
bogdanm	0:9b334a45a8ff	2880	{
bogdanm	0:9b334a45a8ff	2881	/* Disable EVT, BUF and ERR interrupt */
bogdanm	0:9b334a45a8ff	2882	__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
bogdanm	0:9b334a45a8ff	2883
bogdanm	0:9b334a45a8ff	2884	/* Clear AF flag */
bogdanm	0:9b334a45a8ff	2885	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
bogdanm	0:9b334a45a8ff	2886
bogdanm	0:9b334a45a8ff	2887	/* Disable Acknowledge */
bogdanm	0:9b334a45a8ff	2888	CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
bogdanm	0:9b334a45a8ff	2889
bogdanm	0:9b334a45a8ff	2890	/* Wait until BUSY flag is reset */
bogdanm	0:9b334a45a8ff	2891	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK)
bogdanm	0:9b334a45a8ff	2892	{
bogdanm	0:9b334a45a8ff	2893	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	2894	}
bogdanm	0:9b334a45a8ff	2895
bogdanm	0:9b334a45a8ff	2896	hi2c->State = HAL_I2C_STATE_READY;
bogdanm	0:9b334a45a8ff	2897
bogdanm	0:9b334a45a8ff	2898	HAL_I2C_SlaveTxCpltCallback(hi2c);
bogdanm	0:9b334a45a8ff	2899
bogdanm	0:9b334a45a8ff	2900	return HAL_OK;
bogdanm	0:9b334a45a8ff	2901	}
bogdanm	0:9b334a45a8ff	2902
bogdanm	0:9b334a45a8ff	2903	/**
bogdanm	0:9b334a45a8ff	2904	* @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	2905	* the configuration information for I2C module
bogdanm	0:9b334a45a8ff	2906	* @param DevAddress: Target device address
bogdanm	0:9b334a45a8ff	2907	* @param Timeout: Timeout duration
bogdanm	0:9b334a45a8ff	2908	* @retval HAL status
bogdanm	0:9b334a45a8ff	2909	*/
bogdanm	0:9b334a45a8ff	2910	static HAL_StatusTypeDef I2C_MasterRequestWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout)
bogdanm	0:9b334a45a8ff	2911	{
bogdanm	0:9b334a45a8ff	2912	/* Generate Start */
bogdanm	0:9b334a45a8ff	2913	SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
bogdanm	0:9b334a45a8ff	2914
bogdanm	0:9b334a45a8ff	2915	/* Wait until SB flag is set */
bogdanm	0:9b334a45a8ff	2916	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	2917	{
bogdanm	0:9b334a45a8ff	2918	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	2919	}
bogdanm	0:9b334a45a8ff	2920
bogdanm	0:9b334a45a8ff	2921	if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
bogdanm	0:9b334a45a8ff	2922	{
bogdanm	0:9b334a45a8ff	2923	/* Send slave address */
bogdanm	0:9b334a45a8ff	2924	hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
bogdanm	0:9b334a45a8ff	2925	}
bogdanm	0:9b334a45a8ff	2926	else
bogdanm	0:9b334a45a8ff	2927	{
bogdanm	0:9b334a45a8ff	2928	/* Send header of slave address */
bogdanm	0:9b334a45a8ff	2929	hi2c->Instance->DR = I2C_10BIT_HEADER_WRITE(DevAddress);
bogdanm	0:9b334a45a8ff	2930
bogdanm	0:9b334a45a8ff	2931	/* Wait until ADD10 flag is set */
bogdanm	0:9b334a45a8ff	2932	if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADD10, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	2933	{
bogdanm	0:9b334a45a8ff	2934	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm	0:9b334a45a8ff	2935	{
bogdanm	0:9b334a45a8ff	2936	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	2937	}
bogdanm	0:9b334a45a8ff	2938	else
bogdanm	0:9b334a45a8ff	2939	{
bogdanm	0:9b334a45a8ff	2940	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	2941	}
bogdanm	0:9b334a45a8ff	2942	}
bogdanm	0:9b334a45a8ff	2943
bogdanm	0:9b334a45a8ff	2944	/* Send slave address */
bogdanm	0:9b334a45a8ff	2945	hi2c->Instance->DR = I2C_10BIT_ADDRESS(DevAddress);
bogdanm	0:9b334a45a8ff	2946	}
bogdanm	0:9b334a45a8ff	2947
bogdanm	0:9b334a45a8ff	2948	/* Wait until ADDR flag is set */
bogdanm	0:9b334a45a8ff	2949	if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	2950	{
bogdanm	0:9b334a45a8ff	2951	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm	0:9b334a45a8ff	2952	{
bogdanm	0:9b334a45a8ff	2953	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	2954	}
bogdanm	0:9b334a45a8ff	2955	else
bogdanm	0:9b334a45a8ff	2956	{
bogdanm	0:9b334a45a8ff	2957	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	2958	}
bogdanm	0:9b334a45a8ff	2959	}
bogdanm	0:9b334a45a8ff	2960
bogdanm	0:9b334a45a8ff	2961	return HAL_OK;
bogdanm	0:9b334a45a8ff	2962	}
bogdanm	0:9b334a45a8ff	2963
bogdanm	0:9b334a45a8ff	2964	/**
bogdanm	0:9b334a45a8ff	2965	* @brief Master sends target device address for read request.
bogdanm	0:9b334a45a8ff	2966	* @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	2967	* the configuration information for I2C module
bogdanm	0:9b334a45a8ff	2968	* @param DevAddress: Target device address
bogdanm	0:9b334a45a8ff	2969	* @param Timeout: Timeout duration
bogdanm	0:9b334a45a8ff	2970	* @retval HAL status
bogdanm	0:9b334a45a8ff	2971	*/
bogdanm	0:9b334a45a8ff	2972	static HAL_StatusTypeDef I2C_MasterRequestRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout)
bogdanm	0:9b334a45a8ff	2973	{
bogdanm	0:9b334a45a8ff	2974	/* Enable Acknowledge */
bogdanm	0:9b334a45a8ff	2975	SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
bogdanm	0:9b334a45a8ff	2976
bogdanm	0:9b334a45a8ff	2977	/* Generate Start */
bogdanm	0:9b334a45a8ff	2978	SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
bogdanm	0:9b334a45a8ff	2979
bogdanm	0:9b334a45a8ff	2980	/* Wait until SB flag is set */
bogdanm	0:9b334a45a8ff	2981	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	2982	{
bogdanm	0:9b334a45a8ff	2983	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	2984	}
bogdanm	0:9b334a45a8ff	2985
bogdanm	0:9b334a45a8ff	2986	if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
bogdanm	0:9b334a45a8ff	2987	{
bogdanm	0:9b334a45a8ff	2988	/* Send slave address */
bogdanm	0:9b334a45a8ff	2989	hi2c->Instance->DR = I2C_7BIT_ADD_READ(DevAddress);
bogdanm	0:9b334a45a8ff	2990	}
bogdanm	0:9b334a45a8ff	2991	else
bogdanm	0:9b334a45a8ff	2992	{
bogdanm	0:9b334a45a8ff	2993	/* Send header of slave address */
bogdanm	0:9b334a45a8ff	2994	hi2c->Instance->DR = I2C_10BIT_HEADER_WRITE(DevAddress);
bogdanm	0:9b334a45a8ff	2995
bogdanm	0:9b334a45a8ff	2996	/* Wait until ADD10 flag is set */
bogdanm	0:9b334a45a8ff	2997	if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADD10, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	2998	{
bogdanm	0:9b334a45a8ff	2999	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm	0:9b334a45a8ff	3000	{
bogdanm	0:9b334a45a8ff	3001	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	3002	}
bogdanm	0:9b334a45a8ff	3003	else
bogdanm	0:9b334a45a8ff	3004	{
bogdanm	0:9b334a45a8ff	3005	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	3006	}
bogdanm	0:9b334a45a8ff	3007	}
bogdanm	0:9b334a45a8ff	3008
bogdanm	0:9b334a45a8ff	3009	/* Send slave address */
bogdanm	0:9b334a45a8ff	3010	hi2c->Instance->DR = I2C_10BIT_ADDRESS(DevAddress);
bogdanm	0:9b334a45a8ff	3011
bogdanm	0:9b334a45a8ff	3012	/* Wait until ADDR flag is set */
bogdanm	0:9b334a45a8ff	3013	if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	3014	{
bogdanm	0:9b334a45a8ff	3015	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm	0:9b334a45a8ff	3016	{
bogdanm	0:9b334a45a8ff	3017	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	3018	}
bogdanm	0:9b334a45a8ff	3019	else
bogdanm	0:9b334a45a8ff	3020	{
bogdanm	0:9b334a45a8ff	3021	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	3022	}
bogdanm	0:9b334a45a8ff	3023	}
bogdanm	0:9b334a45a8ff	3024
bogdanm	0:9b334a45a8ff	3025	/* Clear ADDR flag */
bogdanm	0:9b334a45a8ff	3026	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
bogdanm	0:9b334a45a8ff	3027
bogdanm	0:9b334a45a8ff	3028	/* Generate Restart */
bogdanm	0:9b334a45a8ff	3029	SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
bogdanm	0:9b334a45a8ff	3030
bogdanm	0:9b334a45a8ff	3031	/* Wait until SB flag is set */
bogdanm	0:9b334a45a8ff	3032	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	3033	{
bogdanm	0:9b334a45a8ff	3034	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	3035	}
bogdanm	0:9b334a45a8ff	3036
bogdanm	0:9b334a45a8ff	3037	/* Send header of slave address */
bogdanm	0:9b334a45a8ff	3038	hi2c->Instance->DR = I2C_10BIT_HEADER_READ(DevAddress);
bogdanm	0:9b334a45a8ff	3039	}
bogdanm	0:9b334a45a8ff	3040
bogdanm	0:9b334a45a8ff	3041	/* Wait until ADDR flag is set */
bogdanm	0:9b334a45a8ff	3042	if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	3043	{
bogdanm	0:9b334a45a8ff	3044	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm	0:9b334a45a8ff	3045	{
bogdanm	0:9b334a45a8ff	3046	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	3047	}
bogdanm	0:9b334a45a8ff	3048	else
bogdanm	0:9b334a45a8ff	3049	{
bogdanm	0:9b334a45a8ff	3050	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	3051	}
bogdanm	0:9b334a45a8ff	3052	}
bogdanm	0:9b334a45a8ff	3053
bogdanm	0:9b334a45a8ff	3054	return HAL_OK;
bogdanm	0:9b334a45a8ff	3055	}
bogdanm	0:9b334a45a8ff	3056
bogdanm	0:9b334a45a8ff	3057	/**
bogdanm	0:9b334a45a8ff	3058	* @brief Master sends target device address followed by internal memory address for write request.
bogdanm	0:9b334a45a8ff	3059	* @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	3060	* the configuration information for I2C module
bogdanm	0:9b334a45a8ff	3061	* @param DevAddress: Target device address
bogdanm	0:9b334a45a8ff	3062	* @param MemAddress: Internal memory address
bogdanm	0:9b334a45a8ff	3063	* @param MemAddSize: Size of internal memory address
bogdanm	0:9b334a45a8ff	3064	* @param Timeout: Timeout duration
bogdanm	0:9b334a45a8ff	3065	* @retval HAL status
bogdanm	0:9b334a45a8ff	3066	*/
bogdanm	0:9b334a45a8ff	3067	static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout)
bogdanm	0:9b334a45a8ff	3068	{
bogdanm	0:9b334a45a8ff	3069	/* Generate Start */
bogdanm	0:9b334a45a8ff	3070	SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
bogdanm	0:9b334a45a8ff	3071
bogdanm	0:9b334a45a8ff	3072	/* Wait until SB flag is set */
bogdanm	0:9b334a45a8ff	3073	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	3074	{
bogdanm	0:9b334a45a8ff	3075	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	3076	}
bogdanm	0:9b334a45a8ff	3077
bogdanm	0:9b334a45a8ff	3078	/* Send slave address */
bogdanm	0:9b334a45a8ff	3079	hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
bogdanm	0:9b334a45a8ff	3080
bogdanm	0:9b334a45a8ff	3081	/* Wait until ADDR flag is set */
bogdanm	0:9b334a45a8ff	3082	if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	3083	{
bogdanm	0:9b334a45a8ff	3084	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm	0:9b334a45a8ff	3085	{
bogdanm	0:9b334a45a8ff	3086	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	3087	}
bogdanm	0:9b334a45a8ff	3088	else
bogdanm	0:9b334a45a8ff	3089	{
bogdanm	0:9b334a45a8ff	3090	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	3091	}
bogdanm	0:9b334a45a8ff	3092	}
bogdanm	0:9b334a45a8ff	3093
bogdanm	0:9b334a45a8ff	3094	/* Clear ADDR flag */
bogdanm	0:9b334a45a8ff	3095	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
bogdanm	0:9b334a45a8ff	3096
bogdanm	0:9b334a45a8ff	3097	/* Wait until TXE flag is set */
bogdanm	0:9b334a45a8ff	3098	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	3099	{
bogdanm	0:9b334a45a8ff	3100	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	3101	}
bogdanm	0:9b334a45a8ff	3102
bogdanm	0:9b334a45a8ff	3103	/* If Memory address size is 8Bit */
bogdanm	0:9b334a45a8ff	3104	if(MemAddSize == I2C_MEMADD_SIZE_8BIT)
bogdanm	0:9b334a45a8ff	3105	{
bogdanm	0:9b334a45a8ff	3106	/* Send Memory Address */
bogdanm	0:9b334a45a8ff	3107	hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
bogdanm	0:9b334a45a8ff	3108	}
bogdanm	0:9b334a45a8ff	3109	/* If Memory address size is 16Bit */
bogdanm	0:9b334a45a8ff	3110	else
bogdanm	0:9b334a45a8ff	3111	{
bogdanm	0:9b334a45a8ff	3112	/* Send MSB of Memory Address */
bogdanm	0:9b334a45a8ff	3113	hi2c->Instance->DR = I2C_MEM_ADD_MSB(MemAddress);
bogdanm	0:9b334a45a8ff	3114
bogdanm	0:9b334a45a8ff	3115	/* Wait until TXE flag is set */
bogdanm	0:9b334a45a8ff	3116	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	3117	{
bogdanm	0:9b334a45a8ff	3118	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	3119	}
bogdanm	0:9b334a45a8ff	3120
bogdanm	0:9b334a45a8ff	3121	/* Send LSB of Memory Address */
bogdanm	0:9b334a45a8ff	3122	hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
bogdanm	0:9b334a45a8ff	3123	}
bogdanm	0:9b334a45a8ff	3124
bogdanm	0:9b334a45a8ff	3125	return HAL_OK;
bogdanm	0:9b334a45a8ff	3126	}
bogdanm	0:9b334a45a8ff	3127
bogdanm	0:9b334a45a8ff	3128	/**
bogdanm	0:9b334a45a8ff	3129	* @brief Master sends target device address followed by internal memory address for read request.
bogdanm	0:9b334a45a8ff	3130	* @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	3131	* the configuration information for I2C module
bogdanm	0:9b334a45a8ff	3132	* @param DevAddress: Target device address
bogdanm	0:9b334a45a8ff	3133	* @param MemAddress: Internal memory address
bogdanm	0:9b334a45a8ff	3134	* @param MemAddSize: Size of internal memory address
bogdanm	0:9b334a45a8ff	3135	* @param Timeout: Timeout duration
bogdanm	0:9b334a45a8ff	3136	* @retval HAL status
bogdanm	0:9b334a45a8ff	3137	*/
bogdanm	0:9b334a45a8ff	3138	static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout)
bogdanm	0:9b334a45a8ff	3139	{
bogdanm	0:9b334a45a8ff	3140	/* Enable Acknowledge */
bogdanm	0:9b334a45a8ff	3141	SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
bogdanm	0:9b334a45a8ff	3142
bogdanm	0:9b334a45a8ff	3143	/* Generate Start */
bogdanm	0:9b334a45a8ff	3144	SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
bogdanm	0:9b334a45a8ff	3145
bogdanm	0:9b334a45a8ff	3146	/* Wait until SB flag is set */
bogdanm	0:9b334a45a8ff	3147	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	3148	{
bogdanm	0:9b334a45a8ff	3149	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	3150	}
bogdanm	0:9b334a45a8ff	3151
bogdanm	0:9b334a45a8ff	3152	/* Send slave address */
bogdanm	0:9b334a45a8ff	3153	hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
bogdanm	0:9b334a45a8ff	3154
bogdanm	0:9b334a45a8ff	3155	/* Wait until ADDR flag is set */
bogdanm	0:9b334a45a8ff	3156	if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	3157	{
bogdanm	0:9b334a45a8ff	3158	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm	0:9b334a45a8ff	3159	{
bogdanm	0:9b334a45a8ff	3160	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	3161	}
bogdanm	0:9b334a45a8ff	3162	else
bogdanm	0:9b334a45a8ff	3163	{
bogdanm	0:9b334a45a8ff	3164	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	3165	}
bogdanm	0:9b334a45a8ff	3166	}
bogdanm	0:9b334a45a8ff	3167
bogdanm	0:9b334a45a8ff	3168	/* Clear ADDR flag */
bogdanm	0:9b334a45a8ff	3169	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
bogdanm	0:9b334a45a8ff	3170
bogdanm	0:9b334a45a8ff	3171	/* Wait until TXE flag is set */
bogdanm	0:9b334a45a8ff	3172	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	3173	{
bogdanm	0:9b334a45a8ff	3174	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	3175	}
bogdanm	0:9b334a45a8ff	3176
bogdanm	0:9b334a45a8ff	3177	/* If Memory address size is 8Bit */
bogdanm	0:9b334a45a8ff	3178	if(MemAddSize == I2C_MEMADD_SIZE_8BIT)
bogdanm	0:9b334a45a8ff	3179	{
bogdanm	0:9b334a45a8ff	3180	/* Send Memory Address */
bogdanm	0:9b334a45a8ff	3181	hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
bogdanm	0:9b334a45a8ff	3182	}
bogdanm	0:9b334a45a8ff	3183	/* If Memory address size is 16Bit */
bogdanm	0:9b334a45a8ff	3184	else
bogdanm	0:9b334a45a8ff	3185	{
bogdanm	0:9b334a45a8ff	3186	/* Send MSB of Memory Address */
bogdanm	0:9b334a45a8ff	3187	hi2c->Instance->DR = I2C_MEM_ADD_MSB(MemAddress);
bogdanm	0:9b334a45a8ff	3188
bogdanm	0:9b334a45a8ff	3189	/* Wait until TXE flag is set */
bogdanm	0:9b334a45a8ff	3190	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	3191	{
bogdanm	0:9b334a45a8ff	3192	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	3193	}
bogdanm	0:9b334a45a8ff	3194
bogdanm	0:9b334a45a8ff	3195	/* Send LSB of Memory Address */
bogdanm	0:9b334a45a8ff	3196	hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
bogdanm	0:9b334a45a8ff	3197	}
bogdanm	0:9b334a45a8ff	3198
bogdanm	0:9b334a45a8ff	3199	/* Wait until TXE flag is set */
bogdanm	0:9b334a45a8ff	3200	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	3201	{
bogdanm	0:9b334a45a8ff	3202	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	3203	}
bogdanm	0:9b334a45a8ff	3204
bogdanm	0:9b334a45a8ff	3205	/* Generate Restart */
bogdanm	0:9b334a45a8ff	3206	SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
bogdanm	0:9b334a45a8ff	3207
bogdanm	0:9b334a45a8ff	3208	/* Wait until SB flag is set */
bogdanm	0:9b334a45a8ff	3209	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	3210	{
bogdanm	0:9b334a45a8ff	3211	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	3212	}
bogdanm	0:9b334a45a8ff	3213
bogdanm	0:9b334a45a8ff	3214	/* Send slave address */
bogdanm	0:9b334a45a8ff	3215	hi2c->Instance->DR = I2C_7BIT_ADD_READ(DevAddress);
bogdanm	0:9b334a45a8ff	3216
bogdanm	0:9b334a45a8ff	3217	/* Wait until ADDR flag is set */
bogdanm	0:9b334a45a8ff	3218	if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	3219	{
bogdanm	0:9b334a45a8ff	3220	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm	0:9b334a45a8ff	3221	{
bogdanm	0:9b334a45a8ff	3222	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	3223	}
bogdanm	0:9b334a45a8ff	3224	else
bogdanm	0:9b334a45a8ff	3225	{
bogdanm	0:9b334a45a8ff	3226	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	3227	}
bogdanm	0:9b334a45a8ff	3228	}
bogdanm	0:9b334a45a8ff	3229
bogdanm	0:9b334a45a8ff	3230	return HAL_OK;
bogdanm	0:9b334a45a8ff	3231	}
bogdanm	0:9b334a45a8ff	3232
bogdanm	0:9b334a45a8ff	3233	/**
bogdanm	0:9b334a45a8ff	3234	* @brief DMA I2C master transmit process complete callback.
bogdanm	0:9b334a45a8ff	3235	* @param hdma: DMA handle
bogdanm	0:9b334a45a8ff	3236	* @retval None
bogdanm	0:9b334a45a8ff	3237	*/
bogdanm	0:9b334a45a8ff	3238	static void I2C_DMAMasterTransmitCplt(DMA_HandleTypeDef *hdma)
bogdanm	0:9b334a45a8ff	3239	{
bogdanm	0:9b334a45a8ff	3240	I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef)((DMA_HandleTypeDef)hdma)->Parent;
bogdanm	0:9b334a45a8ff	3241
bogdanm	0:9b334a45a8ff	3242	/* Wait until BTF flag is reset */
bogdanm	0:9b334a45a8ff	3243	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, I2C_TIMEOUT_FLAG) != HAL_OK)
bogdanm	0:9b334a45a8ff	3244	{
bogdanm	0:9b334a45a8ff	3245	hi2c->ErrorCode \|= HAL_I2C_ERROR_TIMEOUT;
bogdanm	0:9b334a45a8ff	3246	}
bogdanm	0:9b334a45a8ff	3247
bogdanm	0:9b334a45a8ff	3248	/* Generate Stop */
bogdanm	0:9b334a45a8ff	3249	SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP);
bogdanm	0:9b334a45a8ff	3250
bogdanm	0:9b334a45a8ff	3251	/* Disable DMA Request */
bogdanm	0:9b334a45a8ff	3252	CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
bogdanm	0:9b334a45a8ff	3253
bogdanm	0:9b334a45a8ff	3254	hi2c->XferCount = 0;
bogdanm	0:9b334a45a8ff	3255
bogdanm	0:9b334a45a8ff	3256	/* Wait until BUSY flag is reset */
bogdanm	0:9b334a45a8ff	3257	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK)
bogdanm	0:9b334a45a8ff	3258	{
bogdanm	0:9b334a45a8ff	3259	hi2c->ErrorCode \|= HAL_I2C_ERROR_TIMEOUT;
bogdanm	0:9b334a45a8ff	3260	}
bogdanm	0:9b334a45a8ff	3261
bogdanm	0:9b334a45a8ff	3262	hi2c->State = HAL_I2C_STATE_READY;
bogdanm	0:9b334a45a8ff	3263
bogdanm	0:9b334a45a8ff	3264	/* Check if Errors has been detected during transfer */
bogdanm	0:9b334a45a8ff	3265	if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
bogdanm	0:9b334a45a8ff	3266	{
bogdanm	0:9b334a45a8ff	3267	HAL_I2C_ErrorCallback(hi2c);
bogdanm	0:9b334a45a8ff	3268	}
bogdanm	0:9b334a45a8ff	3269	else
bogdanm	0:9b334a45a8ff	3270	{
bogdanm	0:9b334a45a8ff	3271	HAL_I2C_MasterTxCpltCallback(hi2c);
bogdanm	0:9b334a45a8ff	3272	}
bogdanm	0:9b334a45a8ff	3273	}
bogdanm	0:9b334a45a8ff	3274
bogdanm	0:9b334a45a8ff	3275	/**
bogdanm	0:9b334a45a8ff	3276	* @brief DMA I2C slave transmit process complete callback.
bogdanm	0:9b334a45a8ff	3277	* @param hdma: DMA handle
bogdanm	0:9b334a45a8ff	3278	* @retval None
bogdanm	0:9b334a45a8ff	3279	*/
bogdanm	0:9b334a45a8ff	3280	static void I2C_DMASlaveTransmitCplt(DMA_HandleTypeDef *hdma)
bogdanm	0:9b334a45a8ff	3281	{
bogdanm	0:9b334a45a8ff	3282	I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef)((DMA_HandleTypeDef)hdma)->Parent;
bogdanm	0:9b334a45a8ff	3283
bogdanm	0:9b334a45a8ff	3284	/* Wait until AF flag is reset */
bogdanm	0:9b334a45a8ff	3285	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_AF, RESET, I2C_TIMEOUT_FLAG) != HAL_OK)
bogdanm	0:9b334a45a8ff	3286	{
bogdanm	0:9b334a45a8ff	3287	hi2c->ErrorCode \|= HAL_I2C_ERROR_TIMEOUT;
bogdanm	0:9b334a45a8ff	3288	}
bogdanm	0:9b334a45a8ff	3289
bogdanm	0:9b334a45a8ff	3290	/* Clear AF flag */
bogdanm	0:9b334a45a8ff	3291	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
bogdanm	0:9b334a45a8ff	3292
bogdanm	0:9b334a45a8ff	3293	/* Disable Address Acknowledge */
bogdanm	0:9b334a45a8ff	3294	CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
bogdanm	0:9b334a45a8ff	3295
bogdanm	0:9b334a45a8ff	3296	/* Disable DMA Request */
bogdanm	0:9b334a45a8ff	3297	CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
bogdanm	0:9b334a45a8ff	3298
bogdanm	0:9b334a45a8ff	3299	hi2c->XferCount = 0;
bogdanm	0:9b334a45a8ff	3300
bogdanm	0:9b334a45a8ff	3301	/* Wait until BUSY flag is reset */
bogdanm	0:9b334a45a8ff	3302	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK)
bogdanm	0:9b334a45a8ff	3303	{
bogdanm	0:9b334a45a8ff	3304	hi2c->ErrorCode \|= HAL_I2C_ERROR_TIMEOUT;
bogdanm	0:9b334a45a8ff	3305	}
bogdanm	0:9b334a45a8ff	3306
bogdanm	0:9b334a45a8ff	3307	hi2c->State = HAL_I2C_STATE_READY;
bogdanm	0:9b334a45a8ff	3308
bogdanm	0:9b334a45a8ff	3309	/* Check if Errors has been detected during transfer */
bogdanm	0:9b334a45a8ff	3310	if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
bogdanm	0:9b334a45a8ff	3311	{
bogdanm	0:9b334a45a8ff	3312	HAL_I2C_ErrorCallback(hi2c);
bogdanm	0:9b334a45a8ff	3313	}
bogdanm	0:9b334a45a8ff	3314	else
bogdanm	0:9b334a45a8ff	3315	{
bogdanm	0:9b334a45a8ff	3316	HAL_I2C_SlaveTxCpltCallback(hi2c);
bogdanm	0:9b334a45a8ff	3317	}
bogdanm	0:9b334a45a8ff	3318	}
bogdanm	0:9b334a45a8ff	3319
bogdanm	0:9b334a45a8ff	3320	/**
bogdanm	0:9b334a45a8ff	3321	* @brief DMA I2C master receive process complete callback
bogdanm	0:9b334a45a8ff	3322	* @param hdma: DMA handle
bogdanm	0:9b334a45a8ff	3323	* @retval None
bogdanm	0:9b334a45a8ff	3324	*/
bogdanm	0:9b334a45a8ff	3325	static void I2C_DMAMasterReceiveCplt(DMA_HandleTypeDef *hdma)
bogdanm	0:9b334a45a8ff	3326	{
bogdanm	0:9b334a45a8ff	3327	I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef)((DMA_HandleTypeDef)hdma)->Parent;
bogdanm	0:9b334a45a8ff	3328
bogdanm	0:9b334a45a8ff	3329	/* Generate Stop */
bogdanm	0:9b334a45a8ff	3330	SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP);
bogdanm	0:9b334a45a8ff	3331
bogdanm	0:9b334a45a8ff	3332	/* Disable Last DMA */
bogdanm	0:9b334a45a8ff	3333	CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_LAST);
bogdanm	0:9b334a45a8ff	3334
bogdanm	0:9b334a45a8ff	3335	/* Disable Acknowledge */
bogdanm	0:9b334a45a8ff	3336	CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
bogdanm	0:9b334a45a8ff	3337
bogdanm	0:9b334a45a8ff	3338	/* Disable DMA Request */
bogdanm	0:9b334a45a8ff	3339	CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
bogdanm	0:9b334a45a8ff	3340
bogdanm	0:9b334a45a8ff	3341	hi2c->XferCount = 0;
bogdanm	0:9b334a45a8ff	3342
bogdanm	0:9b334a45a8ff	3343	/* Wait until BUSY flag is reset */
bogdanm	0:9b334a45a8ff	3344	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK)
bogdanm	0:9b334a45a8ff	3345	{
bogdanm	0:9b334a45a8ff	3346	hi2c->ErrorCode \|= HAL_I2C_ERROR_TIMEOUT;
bogdanm	0:9b334a45a8ff	3347	}
bogdanm	0:9b334a45a8ff	3348
bogdanm	0:9b334a45a8ff	3349	hi2c->State = HAL_I2C_STATE_READY;
bogdanm	0:9b334a45a8ff	3350
bogdanm	0:9b334a45a8ff	3351	/* Check if Errors has been detected during transfer */
bogdanm	0:9b334a45a8ff	3352	if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
bogdanm	0:9b334a45a8ff	3353	{
bogdanm	0:9b334a45a8ff	3354	HAL_I2C_ErrorCallback(hi2c);
bogdanm	0:9b334a45a8ff	3355	}
bogdanm	0:9b334a45a8ff	3356	else
bogdanm	0:9b334a45a8ff	3357	{
bogdanm	0:9b334a45a8ff	3358	HAL_I2C_MasterRxCpltCallback(hi2c);
bogdanm	0:9b334a45a8ff	3359	}
bogdanm	0:9b334a45a8ff	3360	}
bogdanm	0:9b334a45a8ff	3361
bogdanm	0:9b334a45a8ff	3362	/**
bogdanm	0:9b334a45a8ff	3363	* @brief DMA I2C slave receive process complete callback.
bogdanm	0:9b334a45a8ff	3364	* @param hdma: DMA handle
bogdanm	0:9b334a45a8ff	3365	* @retval None
bogdanm	0:9b334a45a8ff	3366	*/
bogdanm	0:9b334a45a8ff	3367	static void I2C_DMASlaveReceiveCplt(DMA_HandleTypeDef *hdma)
bogdanm	0:9b334a45a8ff	3368	{
bogdanm	0:9b334a45a8ff	3369	I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef)((DMA_HandleTypeDef)hdma)->Parent;
bogdanm	0:9b334a45a8ff	3370
bogdanm	0:9b334a45a8ff	3371	/* Wait until STOPF flag is reset */
bogdanm	0:9b334a45a8ff	3372	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_STOPF, RESET, I2C_TIMEOUT_FLAG) != HAL_OK)
bogdanm	0:9b334a45a8ff	3373	{
bogdanm	0:9b334a45a8ff	3374	hi2c->ErrorCode \|= HAL_I2C_ERROR_TIMEOUT;
bogdanm	0:9b334a45a8ff	3375	}
bogdanm	0:9b334a45a8ff	3376
bogdanm	0:9b334a45a8ff	3377	/* Clear STOPF flag */
bogdanm	0:9b334a45a8ff	3378	__HAL_I2C_CLEAR_STOPFLAG(hi2c);
bogdanm	0:9b334a45a8ff	3379
bogdanm	0:9b334a45a8ff	3380	/* Disable Address Acknowledge */
bogdanm	0:9b334a45a8ff	3381	CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
bogdanm	0:9b334a45a8ff	3382
bogdanm	0:9b334a45a8ff	3383	/* Disable DMA Request */
bogdanm	0:9b334a45a8ff	3384	CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
bogdanm	0:9b334a45a8ff	3385
bogdanm	0:9b334a45a8ff	3386	hi2c->XferCount = 0;
bogdanm	0:9b334a45a8ff	3387
bogdanm	0:9b334a45a8ff	3388	/* Wait until BUSY flag is reset */
bogdanm	0:9b334a45a8ff	3389	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK)
bogdanm	0:9b334a45a8ff	3390	{
bogdanm	0:9b334a45a8ff	3391	hi2c->ErrorCode \|= HAL_I2C_ERROR_TIMEOUT;
bogdanm	0:9b334a45a8ff	3392	}
bogdanm	0:9b334a45a8ff	3393
bogdanm	0:9b334a45a8ff	3394	hi2c->State = HAL_I2C_STATE_READY;
bogdanm	0:9b334a45a8ff	3395
bogdanm	0:9b334a45a8ff	3396	/* Check if Errors has been detected during transfer */
bogdanm	0:9b334a45a8ff	3397	if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
bogdanm	0:9b334a45a8ff	3398	{
bogdanm	0:9b334a45a8ff	3399	HAL_I2C_ErrorCallback(hi2c);
bogdanm	0:9b334a45a8ff	3400	}
bogdanm	0:9b334a45a8ff	3401	else
bogdanm	0:9b334a45a8ff	3402	{
bogdanm	0:9b334a45a8ff	3403	HAL_I2C_SlaveRxCpltCallback(hi2c);
bogdanm	0:9b334a45a8ff	3404	}
bogdanm	0:9b334a45a8ff	3405	}
bogdanm	0:9b334a45a8ff	3406
bogdanm	0:9b334a45a8ff	3407	/**
bogdanm	0:9b334a45a8ff	3408	* @brief DMA I2C Memory Write process complete callback
bogdanm	0:9b334a45a8ff	3409	* @param hdma: DMA handle
bogdanm	0:9b334a45a8ff	3410	* @retval None
bogdanm	0:9b334a45a8ff	3411	*/
bogdanm	0:9b334a45a8ff	3412	static void I2C_DMAMemTransmitCplt(DMA_HandleTypeDef *hdma)
bogdanm	0:9b334a45a8ff	3413	{
bogdanm	0:9b334a45a8ff	3414	I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef)((DMA_HandleTypeDef)hdma)->Parent;
bogdanm	0:9b334a45a8ff	3415
bogdanm	0:9b334a45a8ff	3416	/* Wait until BTF flag is reset */
bogdanm	0:9b334a45a8ff	3417	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, I2C_TIMEOUT_FLAG) != HAL_OK)
bogdanm	0:9b334a45a8ff	3418	{
bogdanm	0:9b334a45a8ff	3419	hi2c->ErrorCode \|= HAL_I2C_ERROR_TIMEOUT;
bogdanm	0:9b334a45a8ff	3420	}
bogdanm	0:9b334a45a8ff	3421
bogdanm	0:9b334a45a8ff	3422	/* Generate Stop */
bogdanm	0:9b334a45a8ff	3423	SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP);
bogdanm	0:9b334a45a8ff	3424
bogdanm	0:9b334a45a8ff	3425	/* Disable DMA Request */
bogdanm	0:9b334a45a8ff	3426	CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
bogdanm	0:9b334a45a8ff	3427
bogdanm	0:9b334a45a8ff	3428	hi2c->XferCount = 0;
bogdanm	0:9b334a45a8ff	3429
bogdanm	0:9b334a45a8ff	3430	/* Wait until BUSY flag is reset */
bogdanm	0:9b334a45a8ff	3431	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK)
bogdanm	0:9b334a45a8ff	3432	{
bogdanm	0:9b334a45a8ff	3433	hi2c->ErrorCode \|= HAL_I2C_ERROR_TIMEOUT;
bogdanm	0:9b334a45a8ff	3434	}
bogdanm	0:9b334a45a8ff	3435
bogdanm	0:9b334a45a8ff	3436	hi2c->State = HAL_I2C_STATE_READY;
bogdanm	0:9b334a45a8ff	3437
bogdanm	0:9b334a45a8ff	3438	/* Check if Errors has been detected during transfer */
bogdanm	0:9b334a45a8ff	3439	if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
bogdanm	0:9b334a45a8ff	3440	{
bogdanm	0:9b334a45a8ff	3441	HAL_I2C_ErrorCallback(hi2c);
bogdanm	0:9b334a45a8ff	3442	}
bogdanm	0:9b334a45a8ff	3443	else
bogdanm	0:9b334a45a8ff	3444	{
bogdanm	0:9b334a45a8ff	3445	HAL_I2C_MemTxCpltCallback(hi2c);
bogdanm	0:9b334a45a8ff	3446	}
bogdanm	0:9b334a45a8ff	3447	}
bogdanm	0:9b334a45a8ff	3448
bogdanm	0:9b334a45a8ff	3449	/**
bogdanm	0:9b334a45a8ff	3450	* @brief DMA I2C Memory Read process complete callback
bogdanm	0:9b334a45a8ff	3451	* @param hdma: DMA handle
bogdanm	0:9b334a45a8ff	3452	* @retval None
bogdanm	0:9b334a45a8ff	3453	*/
bogdanm	0:9b334a45a8ff	3454	static void I2C_DMAMemReceiveCplt(DMA_HandleTypeDef *hdma)
bogdanm	0:9b334a45a8ff	3455	{
bogdanm	0:9b334a45a8ff	3456	I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef)((DMA_HandleTypeDef)hdma)->Parent;
bogdanm	0:9b334a45a8ff	3457
bogdanm	0:9b334a45a8ff	3458	/* Generate Stop */
bogdanm	0:9b334a45a8ff	3459	SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP);
bogdanm	0:9b334a45a8ff	3460
bogdanm	0:9b334a45a8ff	3461	/* Disable Last DMA */
bogdanm	0:9b334a45a8ff	3462	CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_LAST);
bogdanm	0:9b334a45a8ff	3463
bogdanm	0:9b334a45a8ff	3464	/* Disable Acknowledge */
bogdanm	0:9b334a45a8ff	3465	CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
bogdanm	0:9b334a45a8ff	3466
bogdanm	0:9b334a45a8ff	3467	/* Disable DMA Request */
bogdanm	0:9b334a45a8ff	3468	CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
bogdanm	0:9b334a45a8ff	3469
bogdanm	0:9b334a45a8ff	3470	hi2c->XferCount = 0;
bogdanm	0:9b334a45a8ff	3471
bogdanm	0:9b334a45a8ff	3472	/* Wait until BUSY flag is reset */
bogdanm	0:9b334a45a8ff	3473	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK)
bogdanm	0:9b334a45a8ff	3474	{
bogdanm	0:9b334a45a8ff	3475	hi2c->ErrorCode \|= HAL_I2C_ERROR_TIMEOUT;
bogdanm	0:9b334a45a8ff	3476	}
bogdanm	0:9b334a45a8ff	3477
bogdanm	0:9b334a45a8ff	3478	hi2c->State = HAL_I2C_STATE_READY;
bogdanm	0:9b334a45a8ff	3479
bogdanm	0:9b334a45a8ff	3480	/* Check if Errors has been detected during transfer */
bogdanm	0:9b334a45a8ff	3481	if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
bogdanm	0:9b334a45a8ff	3482	{
bogdanm	0:9b334a45a8ff	3483	HAL_I2C_ErrorCallback(hi2c);
bogdanm	0:9b334a45a8ff	3484	}
bogdanm	0:9b334a45a8ff	3485	else
bogdanm	0:9b334a45a8ff	3486	{
bogdanm	0:9b334a45a8ff	3487	HAL_I2C_MemRxCpltCallback(hi2c);
bogdanm	0:9b334a45a8ff	3488	}
bogdanm	0:9b334a45a8ff	3489	}
bogdanm	0:9b334a45a8ff	3490
bogdanm	0:9b334a45a8ff	3491	/**
bogdanm	0:9b334a45a8ff	3492	* @brief DMA I2C communication error callback.
bogdanm	0:9b334a45a8ff	3493	* @param hdma: DMA handle
bogdanm	0:9b334a45a8ff	3494	* @retval None
bogdanm	0:9b334a45a8ff	3495	*/
bogdanm	0:9b334a45a8ff	3496	static void I2C_DMAError(DMA_HandleTypeDef *hdma)
bogdanm	0:9b334a45a8ff	3497	{
bogdanm	0:9b334a45a8ff	3498	I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef)((DMA_HandleTypeDef)hdma)->Parent;
bogdanm	0:9b334a45a8ff	3499
bogdanm	0:9b334a45a8ff	3500	/* Disable Acknowledge */
bogdanm	0:9b334a45a8ff	3501	CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
bogdanm	0:9b334a45a8ff	3502
bogdanm	0:9b334a45a8ff	3503	hi2c->XferCount = 0;
bogdanm	0:9b334a45a8ff	3504
bogdanm	0:9b334a45a8ff	3505	hi2c->State = HAL_I2C_STATE_READY;
bogdanm	0:9b334a45a8ff	3506
bogdanm	0:9b334a45a8ff	3507	hi2c->ErrorCode \|= HAL_I2C_ERROR_DMA;
bogdanm	0:9b334a45a8ff	3508
bogdanm	0:9b334a45a8ff	3509	HAL_I2C_ErrorCallback(hi2c);
bogdanm	0:9b334a45a8ff	3510	}
bogdanm	0:9b334a45a8ff	3511
bogdanm	0:9b334a45a8ff	3512	/**
bogdanm	0:9b334a45a8ff	3513	* @brief This function handles I2C Communication Timeout.
bogdanm	0:9b334a45a8ff	3514	* @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	3515	* the configuration information for I2C module
bogdanm	0:9b334a45a8ff	3516	* @param Flag: specifies the I2C flag to check.
bogdanm	0:9b334a45a8ff	3517	* @param Status: The new Flag status (SET or RESET).
bogdanm	0:9b334a45a8ff	3518	* @param Timeout: Timeout duration
bogdanm	0:9b334a45a8ff	3519	* @retval HAL status
bogdanm	0:9b334a45a8ff	3520	*/
bogdanm	0:9b334a45a8ff	3521	static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout)
bogdanm	0:9b334a45a8ff	3522	{
bogdanm	0:9b334a45a8ff	3523	uint32_t tickstart = 0;
bogdanm	0:9b334a45a8ff	3524
bogdanm	0:9b334a45a8ff	3525	/* Get tick */
bogdanm	0:9b334a45a8ff	3526	tickstart = HAL_GetTick();
bogdanm	0:9b334a45a8ff	3527
bogdanm	0:9b334a45a8ff	3528	/* Wait until flag is set */
bogdanm	0:9b334a45a8ff	3529	if(Status == RESET)
bogdanm	0:9b334a45a8ff	3530	{
bogdanm	0:9b334a45a8ff	3531	while(__HAL_I2C_GET_FLAG(hi2c, Flag) == RESET)
bogdanm	0:9b334a45a8ff	3532	{
bogdanm	0:9b334a45a8ff	3533	/* Check for the Timeout */
bogdanm	0:9b334a45a8ff	3534	if(Timeout != HAL_MAX_DELAY)
bogdanm	0:9b334a45a8ff	3535	{
bogdanm	0:9b334a45a8ff	3536	if((Timeout == 0)\|\|((HAL_GetTick() - tickstart ) > Timeout))
bogdanm	0:9b334a45a8ff	3537	{
bogdanm	0:9b334a45a8ff	3538	hi2c->State= HAL_I2C_STATE_READY;
bogdanm	0:9b334a45a8ff	3539
bogdanm	0:9b334a45a8ff	3540	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	3541	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	3542
bogdanm	0:9b334a45a8ff	3543	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	3544	}
bogdanm	0:9b334a45a8ff	3545	}
bogdanm	0:9b334a45a8ff	3546	}
bogdanm	0:9b334a45a8ff	3547	}
bogdanm	0:9b334a45a8ff	3548	else
bogdanm	0:9b334a45a8ff	3549	{
bogdanm	0:9b334a45a8ff	3550	while(__HAL_I2C_GET_FLAG(hi2c, Flag) != RESET)
bogdanm	0:9b334a45a8ff	3551	{
bogdanm	0:9b334a45a8ff	3552	/* Check for the Timeout */
bogdanm	0:9b334a45a8ff	3553	if(Timeout != HAL_MAX_DELAY)
bogdanm	0:9b334a45a8ff	3554	{
bogdanm	0:9b334a45a8ff	3555	if((Timeout == 0)\|\|((HAL_GetTick() - tickstart ) > Timeout))
bogdanm	0:9b334a45a8ff	3556	{
bogdanm	0:9b334a45a8ff	3557	hi2c->State= HAL_I2C_STATE_READY;
bogdanm	0:9b334a45a8ff	3558
bogdanm	0:9b334a45a8ff	3559	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	3560	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	3561
bogdanm	0:9b334a45a8ff	3562	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	3563	}
bogdanm	0:9b334a45a8ff	3564	}
bogdanm	0:9b334a45a8ff	3565	}
bogdanm	0:9b334a45a8ff	3566	}
bogdanm	0:9b334a45a8ff	3567	return HAL_OK;
bogdanm	0:9b334a45a8ff	3568	}
bogdanm	0:9b334a45a8ff	3569
bogdanm	0:9b334a45a8ff	3570	/**
bogdanm	0:9b334a45a8ff	3571	* @brief This function handles I2C Communication Timeout for Master addressing phase.
bogdanm	0:9b334a45a8ff	3572	* @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	3573	* the configuration information for I2C module
bogdanm	0:9b334a45a8ff	3574	* @param Flag: specifies the I2C flag to check.
bogdanm	0:9b334a45a8ff	3575	* @param Timeout: Timeout duration
bogdanm	0:9b334a45a8ff	3576	* @retval HAL status
bogdanm	0:9b334a45a8ff	3577	*/
bogdanm	0:9b334a45a8ff	3578	static HAL_StatusTypeDef I2C_WaitOnMasterAddressFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, uint32_t Timeout)
bogdanm	0:9b334a45a8ff	3579	{
bogdanm	0:9b334a45a8ff	3580	uint32_t tickstart = 0;
bogdanm	0:9b334a45a8ff	3581
bogdanm	0:9b334a45a8ff	3582	/* Get tick */
bogdanm	0:9b334a45a8ff	3583	tickstart = HAL_GetTick();
bogdanm	0:9b334a45a8ff	3584
bogdanm	0:9b334a45a8ff	3585	while(__HAL_I2C_GET_FLAG(hi2c, Flag) == RESET)
bogdanm	0:9b334a45a8ff	3586	{
bogdanm	0:9b334a45a8ff	3587	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)
bogdanm	0:9b334a45a8ff	3588	{
bogdanm	0:9b334a45a8ff	3589	/* Generate Stop */
bogdanm	0:9b334a45a8ff	3590	SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP);
bogdanm	0:9b334a45a8ff	3591
bogdanm	0:9b334a45a8ff	3592	/* Clear AF Flag */
bogdanm	0:9b334a45a8ff	3593	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
bogdanm	0:9b334a45a8ff	3594
bogdanm	0:9b334a45a8ff	3595	hi2c->ErrorCode = HAL_I2C_ERROR_AF;
bogdanm	0:9b334a45a8ff	3596	hi2c->State= HAL_I2C_STATE_READY;
bogdanm	0:9b334a45a8ff	3597
bogdanm	0:9b334a45a8ff	3598	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	3599	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	3600
bogdanm	0:9b334a45a8ff	3601	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	3602	}
bogdanm	0:9b334a45a8ff	3603
bogdanm	0:9b334a45a8ff	3604	/* Check for the Timeout */
bogdanm	0:9b334a45a8ff	3605	if(Timeout != HAL_MAX_DELAY)
bogdanm	0:9b334a45a8ff	3606	{
bogdanm	0:9b334a45a8ff	3607	if((Timeout == 0)\|\|((HAL_GetTick() - tickstart ) > Timeout))
bogdanm	0:9b334a45a8ff	3608	{
bogdanm	0:9b334a45a8ff	3609	hi2c->State= HAL_I2C_STATE_READY;
bogdanm	0:9b334a45a8ff	3610
bogdanm	0:9b334a45a8ff	3611	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	3612	__HAL_UNLOCK(hi2c);
bogdanm	0:9b334a45a8ff	3613
bogdanm	0:9b334a45a8ff	3614	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	3615	}
bogdanm	0:9b334a45a8ff	3616	}
bogdanm	0:9b334a45a8ff	3617	}
bogdanm	0:9b334a45a8ff	3618	return HAL_OK;
bogdanm	0:9b334a45a8ff	3619	}
bogdanm	0:9b334a45a8ff	3620
bogdanm	0:9b334a45a8ff	3621	/**
bogdanm	0:9b334a45a8ff	3622	* @}
bogdanm	0:9b334a45a8ff	3623	*/
bogdanm	0:9b334a45a8ff	3624
bogdanm	0:9b334a45a8ff	3625	#endif /* HAL_I2C_MODULE_ENABLED */
bogdanm	0:9b334a45a8ff	3626
bogdanm	0:9b334a45a8ff	3627	/**
bogdanm	0:9b334a45a8ff	3628	* @}
bogdanm	0:9b334a45a8ff	3629	*/
bogdanm	0:9b334a45a8ff	3630
bogdanm	0:9b334a45a8ff	3631	/**
bogdanm	0:9b334a45a8ff	3632	* @}
bogdanm	0:9b334a45a8ff	3633	*/
bogdanm	0:9b334a45a8ff	3634
bogdanm	0:9b334a45a8ff	3635	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/

Repository toolbox

Export to desktop IDE

Repository details

Type:	Library
Created:	16 May 2016
Imports:	1
Forks:	0
Commits:	130
Dependents:	1
Dependencies:	0
Followers:	1

targets/cmsis/TARGET_STM/TARGET_STM32L1/stm32l1xx_hal_i2c.c@0:9b334a45a8ff, 2015-10-01 (annotated)

Who changed what in which revision?

Repository toolbox

Repository details

Important Information for this Arm website

Access Warning