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fix LPC812 PWM
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targets/cmsis/TARGET_STM/TARGET_STM32L1/stm32l1xx_hal_adc_ex.h@0:9b334a45a8ff, 2015-10-01 (annotated)
- Committer:
- bogdanm
- Date:
- Thu Oct 01 15:25:22 2015 +0300
- Revision:
- 0:9b334a45a8ff
Initial commit on mbed-dev
Replaces mbed-src (now inactive)
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| bogdanm | 0:9b334a45a8ff | 1 | /** |
| bogdanm | 0:9b334a45a8ff | 2 | ****************************************************************************** |
| bogdanm | 0:9b334a45a8ff | 3 | * @file stm32l1xx_hal_adc_ex.h |
| bogdanm | 0:9b334a45a8ff | 4 | * @author MCD Application Team |
| bogdanm | 0:9b334a45a8ff | 5 | * @version V1.0.0 |
| bogdanm | 0:9b334a45a8ff | 6 | * @date 5-September-2014 |
| bogdanm | 0:9b334a45a8ff | 7 | * @brief Header file of ADC HAL Extension module. |
| bogdanm | 0:9b334a45a8ff | 8 | ****************************************************************************** |
| bogdanm | 0:9b334a45a8ff | 9 | * @attention |
| bogdanm | 0:9b334a45a8ff | 10 | * |
| bogdanm | 0:9b334a45a8ff | 11 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
| bogdanm | 0:9b334a45a8ff | 12 | * |
| bogdanm | 0:9b334a45a8ff | 13 | * Redistribution and use in source and binary forms, with or without modification, |
| bogdanm | 0:9b334a45a8ff | 14 | * are permitted provided that the following conditions are met: |
| bogdanm | 0:9b334a45a8ff | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
| bogdanm | 0:9b334a45a8ff | 16 | * this list of conditions and the following disclaimer. |
| bogdanm | 0:9b334a45a8ff | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| bogdanm | 0:9b334a45a8ff | 18 | * this list of conditions and the following disclaimer in the documentation |
| bogdanm | 0:9b334a45a8ff | 19 | * and/or other materials provided with the distribution. |
| bogdanm | 0:9b334a45a8ff | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| bogdanm | 0:9b334a45a8ff | 21 | * may be used to endorse or promote products derived from this software |
| bogdanm | 0:9b334a45a8ff | 22 | * without specific prior written permission. |
| bogdanm | 0:9b334a45a8ff | 23 | * |
| bogdanm | 0:9b334a45a8ff | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| bogdanm | 0:9b334a45a8ff | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| bogdanm | 0:9b334a45a8ff | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| bogdanm | 0:9b334a45a8ff | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| bogdanm | 0:9b334a45a8ff | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| bogdanm | 0:9b334a45a8ff | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| bogdanm | 0:9b334a45a8ff | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| bogdanm | 0:9b334a45a8ff | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| bogdanm | 0:9b334a45a8ff | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| bogdanm | 0:9b334a45a8ff | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| bogdanm | 0:9b334a45a8ff | 34 | * |
| bogdanm | 0:9b334a45a8ff | 35 | ****************************************************************************** |
| bogdanm | 0:9b334a45a8ff | 36 | */ |
| bogdanm | 0:9b334a45a8ff | 37 | |
| bogdanm | 0:9b334a45a8ff | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 39 | #ifndef __STM32L1xx_HAL_ADC_EX_H |
| bogdanm | 0:9b334a45a8ff | 40 | #define __STM32L1xx_HAL_ADC_EX_H |
| bogdanm | 0:9b334a45a8ff | 41 | |
| bogdanm | 0:9b334a45a8ff | 42 | #ifdef __cplusplus |
| bogdanm | 0:9b334a45a8ff | 43 | extern "C" { |
| bogdanm | 0:9b334a45a8ff | 44 | #endif |
| bogdanm | 0:9b334a45a8ff | 45 | |
| bogdanm | 0:9b334a45a8ff | 46 | /* Includes ------------------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 47 | #include "stm32l1xx_hal_def.h" |
| bogdanm | 0:9b334a45a8ff | 48 | |
| bogdanm | 0:9b334a45a8ff | 49 | /** @addtogroup STM32L1xx_HAL_Driver |
| bogdanm | 0:9b334a45a8ff | 50 | * @{ |
| bogdanm | 0:9b334a45a8ff | 51 | */ |
| bogdanm | 0:9b334a45a8ff | 52 | |
| bogdanm | 0:9b334a45a8ff | 53 | /** @addtogroup ADCEx |
| bogdanm | 0:9b334a45a8ff | 54 | * @{ |
| bogdanm | 0:9b334a45a8ff | 55 | */ |
| bogdanm | 0:9b334a45a8ff | 56 | |
| bogdanm | 0:9b334a45a8ff | 57 | /* Exported types ------------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 58 | /** @defgroup ADCEx_Exported_Types ADCEx Exported Types |
| bogdanm | 0:9b334a45a8ff | 59 | * @{ |
| bogdanm | 0:9b334a45a8ff | 60 | */ |
| bogdanm | 0:9b334a45a8ff | 61 | |
| bogdanm | 0:9b334a45a8ff | 62 | /** |
| bogdanm | 0:9b334a45a8ff | 63 | * @brief ADC Configuration injected Channel structure definition |
| bogdanm | 0:9b334a45a8ff | 64 | * @note Parameters of this structure are shared within 2 scopes: |
| bogdanm | 0:9b334a45a8ff | 65 | * - Scope channel: InjectedChannel, InjectedRank, InjectedSamplingTime, InjectedOffset |
| bogdanm | 0:9b334a45a8ff | 66 | * - Scope injected group (affects all channels of injected group): InjectedNbrOfConversion, InjectedDiscontinuousConvMode, |
| bogdanm | 0:9b334a45a8ff | 67 | * AutoInjectedConv, ExternalTrigInjecConvEdge, ExternalTrigInjecConv. |
| bogdanm | 0:9b334a45a8ff | 68 | * @note The setting of these parameters with function HAL_ADCEx_InjectedConfigChannel() is conditioned to ADC state. |
| bogdanm | 0:9b334a45a8ff | 69 | * ADC state can be either: |
| bogdanm | 0:9b334a45a8ff | 70 | * - For all parameters: ADC disabled |
| bogdanm | 0:9b334a45a8ff | 71 | * - For all except parameters 'InjectedDiscontinuousConvMode' and 'AutoInjectedConv': ADC enabled without conversion on going on injected group. |
| bogdanm | 0:9b334a45a8ff | 72 | * - For parameters 'ExternalTrigInjecConv' and 'ExternalTrigInjecConvEdge': ADC enabled, even with conversion on going on injected group. |
| bogdanm | 0:9b334a45a8ff | 73 | */ |
| bogdanm | 0:9b334a45a8ff | 74 | typedef struct |
| bogdanm | 0:9b334a45a8ff | 75 | { |
| bogdanm | 0:9b334a45a8ff | 76 | uint32_t InjectedChannel; /*!< Selection of ADC channel to configure |
| bogdanm | 0:9b334a45a8ff | 77 | This parameter can be a value of @ref ADC_channels |
| bogdanm | 0:9b334a45a8ff | 78 | Note: Depending on devices, some channels may not be available on package pins. Refer to device datasheet for channels availability. */ |
| bogdanm | 0:9b334a45a8ff | 79 | uint32_t InjectedRank; /*!< Rank in the injected group sequencer |
| bogdanm | 0:9b334a45a8ff | 80 | This parameter must be a value of @ref ADCEx_injected_rank |
| bogdanm | 0:9b334a45a8ff | 81 | Note: In case of need to disable a channel or change order of conversion sequencer, rank containing a previous channel setting can be overwritten by the new channel setting (or parameter number of conversions can be adjusted) */ |
| bogdanm | 0:9b334a45a8ff | 82 | uint32_t InjectedSamplingTime; /*!< Sampling time value to be set for the selected channel. |
| bogdanm | 0:9b334a45a8ff | 83 | Unit: ADC clock cycles |
| bogdanm | 0:9b334a45a8ff | 84 | Conversion time is the addition of sampling time and processing time (12 ADC clock cycles at ADC resolution 12 bits, 11 cycles at 10 bits, 9 cycles at 8 bits, 7 cycles at 6 bits). |
| bogdanm | 0:9b334a45a8ff | 85 | This parameter can be a value of @ref ADC_sampling_times |
| bogdanm | 0:9b334a45a8ff | 86 | Caution: This parameter updates the parameter property of the channel, that can be used into regular and/or injected groups. |
| bogdanm | 0:9b334a45a8ff | 87 | If this same channel has been previously configured in the other group (regular/injected), it will be updated to last setting. |
| bogdanm | 0:9b334a45a8ff | 88 | Note: In case of usage of internal measurement channels (VrefInt/Vbat/TempSensor), |
| bogdanm | 0:9b334a45a8ff | 89 | sampling time constraints must be respected (sampling time can be adjusted in function of ADC clock frequency and sampling time setting) |
| bogdanm | 0:9b334a45a8ff | 90 | Refer to device datasheet for timings values, parameters TS_vrefint, TS_temp (values rough order: 4us min). */ |
| bogdanm | 0:9b334a45a8ff | 91 | uint32_t InjectedOffset; /*!< Defines the offset to be subtracted from the raw converted data (for channels set on injected group only). |
| bogdanm | 0:9b334a45a8ff | 92 | Offset value must be a positive number. |
| bogdanm | 0:9b334a45a8ff | 93 | Depending of ADC resolution selected (12, 10, 8 or 6 bits), |
| bogdanm | 0:9b334a45a8ff | 94 | this parameter must be a number between Min_Data = 0x000 and Max_Data = 0xFFF, 0x3FF, 0xFF or 0x3F respectively. */ |
| bogdanm | 0:9b334a45a8ff | 95 | uint32_t InjectedNbrOfConversion; /*!< Specifies the number of ranks that will be converted within the injected group sequencer. |
| bogdanm | 0:9b334a45a8ff | 96 | To use the injected group sequencer and convert several ranks, parameter 'ScanConvMode' must be enabled. |
| bogdanm | 0:9b334a45a8ff | 97 | This parameter must be a number between Min_Data = 1 and Max_Data = 4. |
| bogdanm | 0:9b334a45a8ff | 98 | Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to |
| bogdanm | 0:9b334a45a8ff | 99 | configure a channel on injected group can impact the configuration of other channels previously set. */ |
| bogdanm | 0:9b334a45a8ff | 100 | uint32_t InjectedDiscontinuousConvMode; /*!< Specifies whether the conversions sequence of injected group is performed in Complete-sequence/Discontinuous-sequence (main sequence subdivided in successive parts). |
| bogdanm | 0:9b334a45a8ff | 101 | Discontinuous mode is used only if sequencer is enabled (parameter 'ScanConvMode'). If sequencer is disabled, this parameter is discarded. |
| bogdanm | 0:9b334a45a8ff | 102 | Discontinuous mode can be enabled only if continuous mode is disabled. If continuous mode is enabled, this parameter setting is discarded. |
| bogdanm | 0:9b334a45a8ff | 103 | This parameter can be set to ENABLE or DISABLE. |
| bogdanm | 0:9b334a45a8ff | 104 | Note: For injected group, number of discontinuous ranks increment is fixed to one-by-one. |
| bogdanm | 0:9b334a45a8ff | 105 | Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to |
| bogdanm | 0:9b334a45a8ff | 106 | configure a channel on injected group can impact the configuration of other channels previously set. */ |
| bogdanm | 0:9b334a45a8ff | 107 | uint32_t AutoInjectedConv; /*!< Enables or disables the selected ADC automatic injected group conversion after regular one |
| bogdanm | 0:9b334a45a8ff | 108 | This parameter can be set to ENABLE or DISABLE. |
| bogdanm | 0:9b334a45a8ff | 109 | Note: To use Automatic injected conversion, discontinuous mode must be disabled ('DiscontinuousConvMode' and 'InjectedDiscontinuousConvMode' set to DISABLE) |
| bogdanm | 0:9b334a45a8ff | 110 | Note: To use Automatic injected conversion, injected group external triggers must be disabled ('ExternalTrigInjecConv' set to ADC_SOFTWARE_START) |
| bogdanm | 0:9b334a45a8ff | 111 | Note: In case of DMA used with regular group: if DMA configured in normal mode (single shot) JAUTO will be stopped upon DMA transfer complete. |
| bogdanm | 0:9b334a45a8ff | 112 | To maintain JAUTO always enabled, DMA must be configured in circular mode. |
| bogdanm | 0:9b334a45a8ff | 113 | Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to |
| bogdanm | 0:9b334a45a8ff | 114 | configure a channel on injected group can impact the configuration of other channels previously set. */ |
| bogdanm | 0:9b334a45a8ff | 115 | uint32_t ExternalTrigInjecConv; /*!< Selects the external event used to trigger the conversion start of injected group. |
| bogdanm | 0:9b334a45a8ff | 116 | If set to ADC_INJECTED_SOFTWARE_START, external triggers are disabled. |
| bogdanm | 0:9b334a45a8ff | 117 | If set to external trigger source, triggering is on event rising edge. |
| bogdanm | 0:9b334a45a8ff | 118 | This parameter can be a value of @ref ADCEx_External_trigger_source_Injected |
| bogdanm | 0:9b334a45a8ff | 119 | Note: This parameter must be modified when ADC is disabled (before ADC start conversion or after ADC stop conversion). |
| bogdanm | 0:9b334a45a8ff | 120 | If ADC is enabled, this parameter setting is bypassed without error reporting (as it can be the expected behaviour in case of another parameter update on the fly) |
| bogdanm | 0:9b334a45a8ff | 121 | Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to |
| bogdanm | 0:9b334a45a8ff | 122 | configure a channel on injected group can impact the configuration of other channels previously set. */ |
| bogdanm | 0:9b334a45a8ff | 123 | uint32_t ExternalTrigInjecConvEdge; /*!< Selects the external trigger edge of injected group. |
| bogdanm | 0:9b334a45a8ff | 124 | This parameter can be a value of @ref ADCEx_External_trigger_edge_Injected. |
| bogdanm | 0:9b334a45a8ff | 125 | If trigger is set to ADC_INJECTED_SOFTWARE_START, this parameter is discarded. |
| bogdanm | 0:9b334a45a8ff | 126 | Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to |
| bogdanm | 0:9b334a45a8ff | 127 | configure a channel on injected group can impact the configuration of other channels previously set. */ |
| bogdanm | 0:9b334a45a8ff | 128 | }ADC_InjectionConfTypeDef; |
| bogdanm | 0:9b334a45a8ff | 129 | /** |
| bogdanm | 0:9b334a45a8ff | 130 | * @} |
| bogdanm | 0:9b334a45a8ff | 131 | */ |
| bogdanm | 0:9b334a45a8ff | 132 | |
| bogdanm | 0:9b334a45a8ff | 133 | |
| bogdanm | 0:9b334a45a8ff | 134 | /* Exported constants --------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 135 | |
| bogdanm | 0:9b334a45a8ff | 136 | /** @defgroup ADCEx_Exported_Constants ADCEx Exported Constants |
| bogdanm | 0:9b334a45a8ff | 137 | * @{ |
| bogdanm | 0:9b334a45a8ff | 138 | */ |
| bogdanm | 0:9b334a45a8ff | 139 | |
| bogdanm | 0:9b334a45a8ff | 140 | /** @defgroup ADCEx_injected_rank ADCEx injected rank |
| bogdanm | 0:9b334a45a8ff | 141 | * @{ |
| bogdanm | 0:9b334a45a8ff | 142 | */ |
| bogdanm | 0:9b334a45a8ff | 143 | #define ADC_INJECTED_RANK_1 ((uint32_t)0x00000001) |
| bogdanm | 0:9b334a45a8ff | 144 | #define ADC_INJECTED_RANK_2 ((uint32_t)0x00000002) |
| bogdanm | 0:9b334a45a8ff | 145 | #define ADC_INJECTED_RANK_3 ((uint32_t)0x00000003) |
| bogdanm | 0:9b334a45a8ff | 146 | #define ADC_INJECTED_RANK_4 ((uint32_t)0x00000004) |
| bogdanm | 0:9b334a45a8ff | 147 | |
| bogdanm | 0:9b334a45a8ff | 148 | #define IS_ADC_INJECTED_RANK(CHANNEL) (((CHANNEL) == ADC_INJECTED_RANK_1) || \ |
| bogdanm | 0:9b334a45a8ff | 149 | ((CHANNEL) == ADC_INJECTED_RANK_2) || \ |
| bogdanm | 0:9b334a45a8ff | 150 | ((CHANNEL) == ADC_INJECTED_RANK_3) || \ |
| bogdanm | 0:9b334a45a8ff | 151 | ((CHANNEL) == ADC_INJECTED_RANK_4) ) |
| bogdanm | 0:9b334a45a8ff | 152 | /** |
| bogdanm | 0:9b334a45a8ff | 153 | * @} |
| bogdanm | 0:9b334a45a8ff | 154 | */ |
| bogdanm | 0:9b334a45a8ff | 155 | |
| bogdanm | 0:9b334a45a8ff | 156 | /** @defgroup ADCEx_External_trigger_edge_Injected ADCEx External trigger edge Injected |
| bogdanm | 0:9b334a45a8ff | 157 | * @{ |
| bogdanm | 0:9b334a45a8ff | 158 | */ |
| bogdanm | 0:9b334a45a8ff | 159 | #define ADC_EXTERNALTRIGINJECCONV_EDGE_NONE ((uint32_t)0x00000000) |
| bogdanm | 0:9b334a45a8ff | 160 | #define ADC_EXTERNALTRIGINJECCONV_EDGE_RISING ((uint32_t)ADC_CR2_JEXTEN_0) |
| bogdanm | 0:9b334a45a8ff | 161 | #define ADC_EXTERNALTRIGINJECCONV_EDGE_FALLING ((uint32_t)ADC_CR2_JEXTEN_1) |
| bogdanm | 0:9b334a45a8ff | 162 | #define ADC_EXTERNALTRIGINJECCONV_EDGE_RISINGFALLING ((uint32_t)ADC_CR2_JEXTEN) |
| bogdanm | 0:9b334a45a8ff | 163 | |
| bogdanm | 0:9b334a45a8ff | 164 | #define IS_ADC_EXTTRIGINJEC_EDGE(EDGE) (((EDGE) == ADC_EXTERNALTRIGINJECCONV_EDGE_NONE) || \ |
| bogdanm | 0:9b334a45a8ff | 165 | ((EDGE) == ADC_EXTERNALTRIGINJECCONV_EDGE_RISING) || \ |
| bogdanm | 0:9b334a45a8ff | 166 | ((EDGE) == ADC_EXTERNALTRIGINJECCONV_EDGE_FALLING) || \ |
| bogdanm | 0:9b334a45a8ff | 167 | ((EDGE) == ADC_EXTERNALTRIGINJECCONV_EDGE_RISINGFALLING) ) |
| bogdanm | 0:9b334a45a8ff | 168 | /** |
| bogdanm | 0:9b334a45a8ff | 169 | * @} |
| bogdanm | 0:9b334a45a8ff | 170 | */ |
| bogdanm | 0:9b334a45a8ff | 171 | |
| bogdanm | 0:9b334a45a8ff | 172 | /** @defgroup ADCEx_External_trigger_source_Injected ADCEx External trigger source Injected |
| bogdanm | 0:9b334a45a8ff | 173 | * @{ |
| bogdanm | 0:9b334a45a8ff | 174 | */ |
| bogdanm | 0:9b334a45a8ff | 175 | /* External triggers for injected groups of ADC1 */ |
| bogdanm | 0:9b334a45a8ff | 176 | #define ADC_EXTERNALTRIGINJECCONV_T2_CC1 ADC_EXTERNALTRIGINJEC_T2_CC1 |
| bogdanm | 0:9b334a45a8ff | 177 | #define ADC_EXTERNALTRIGINJECCONV_T2_TRGO ADC_EXTERNALTRIGINJEC_T2_TRGO |
| bogdanm | 0:9b334a45a8ff | 178 | #define ADC_EXTERNALTRIGINJECCONV_T3_CC4 ADC_EXTERNALTRIGINJEC_T3_CC4 |
| bogdanm | 0:9b334a45a8ff | 179 | #define ADC_EXTERNALTRIGINJECCONV_T4_TRGO ADC_EXTERNALTRIGINJEC_T4_TRGO |
| bogdanm | 0:9b334a45a8ff | 180 | #define ADC_EXTERNALTRIGINJECCONV_T4_CC1 ADC_EXTERNALTRIGINJEC_T4_CC1 |
| bogdanm | 0:9b334a45a8ff | 181 | #define ADC_EXTERNALTRIGINJECCONV_T4_CC2 ADC_EXTERNALTRIGINJEC_T4_CC2 |
| bogdanm | 0:9b334a45a8ff | 182 | #define ADC_EXTERNALTRIGINJECCONV_T4_CC3 ADC_EXTERNALTRIGINJEC_T4_CC3 |
| bogdanm | 0:9b334a45a8ff | 183 | #define ADC_EXTERNALTRIGINJECCONV_T7_TRGO ADC_EXTERNALTRIGINJEC_T7_TRGO |
| bogdanm | 0:9b334a45a8ff | 184 | #define ADC_EXTERNALTRIGINJECCONV_T9_CC1 ADC_EXTERNALTRIGINJEC_T9_CC1 |
| bogdanm | 0:9b334a45a8ff | 185 | #define ADC_EXTERNALTRIGINJECCONV_T9_TRGO ADC_EXTERNALTRIGINJEC_T9_TRGO |
| bogdanm | 0:9b334a45a8ff | 186 | #define ADC_EXTERNALTRIGINJECCONV_T10_CC1 ADC_EXTERNALTRIGINJEC_T10_CC1 |
| bogdanm | 0:9b334a45a8ff | 187 | #define ADC_EXTERNALTRIGINJECCONV_EXT_IT15 ADC_EXTERNALTRIGINJEC_EXT_IT15 |
| bogdanm | 0:9b334a45a8ff | 188 | |
| bogdanm | 0:9b334a45a8ff | 189 | #define ADC_INJECTED_SOFTWARE_START ((uint32_t)0x00000010) |
| bogdanm | 0:9b334a45a8ff | 190 | |
| bogdanm | 0:9b334a45a8ff | 191 | #define IS_ADC_EXTTRIGINJEC(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_CC1) || \ |
| bogdanm | 0:9b334a45a8ff | 192 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_TRGO) || \ |
| bogdanm | 0:9b334a45a8ff | 193 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T3_CC4) || \ |
| bogdanm | 0:9b334a45a8ff | 194 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_TRGO) || \ |
| bogdanm | 0:9b334a45a8ff | 195 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_CC1) || \ |
| bogdanm | 0:9b334a45a8ff | 196 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_CC2) || \ |
| bogdanm | 0:9b334a45a8ff | 197 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_CC3) || \ |
| bogdanm | 0:9b334a45a8ff | 198 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T7_TRGO) || \ |
| bogdanm | 0:9b334a45a8ff | 199 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T9_CC1) || \ |
| bogdanm | 0:9b334a45a8ff | 200 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T9_TRGO) || \ |
| bogdanm | 0:9b334a45a8ff | 201 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T10_CC1) || \ |
| bogdanm | 0:9b334a45a8ff | 202 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_EXT_IT15) || \ |
| bogdanm | 0:9b334a45a8ff | 203 | ((REGTRIG) == ADC_SOFTWARE_START) ) |
| bogdanm | 0:9b334a45a8ff | 204 | /** |
| bogdanm | 0:9b334a45a8ff | 205 | * @} |
| bogdanm | 0:9b334a45a8ff | 206 | */ |
| bogdanm | 0:9b334a45a8ff | 207 | |
| bogdanm | 0:9b334a45a8ff | 208 | /** @defgroup ADCEx_Internal_HAL_driver_Ext_trig_src_Injected ADCEx Internal HAL driver Ext trig src Injected |
| bogdanm | 0:9b334a45a8ff | 209 | * @{ |
| bogdanm | 0:9b334a45a8ff | 210 | */ |
| bogdanm | 0:9b334a45a8ff | 211 | |
| bogdanm | 0:9b334a45a8ff | 212 | /* List of external triggers of injected group for ADC1: */ |
| bogdanm | 0:9b334a45a8ff | 213 | /* (used internally by HAL driver. To not use into HAL structure parameters) */ |
| bogdanm | 0:9b334a45a8ff | 214 | #define ADC_EXTERNALTRIGINJEC_T9_CC1 ((uint32_t) 0x00000000) |
| bogdanm | 0:9b334a45a8ff | 215 | #define ADC_EXTERNALTRIGINJEC_T9_TRGO ((uint32_t)( ADC_CR2_JEXTSEL_0)) |
| bogdanm | 0:9b334a45a8ff | 216 | #define ADC_EXTERNALTRIGINJEC_T2_TRGO ((uint32_t)( ADC_CR2_JEXTSEL_1 )) |
| bogdanm | 0:9b334a45a8ff | 217 | #define ADC_EXTERNALTRIGINJEC_T2_CC1 ((uint32_t)( ADC_CR2_JEXTSEL_1 | ADC_CR2_JEXTSEL_0)) |
| bogdanm | 0:9b334a45a8ff | 218 | #define ADC_EXTERNALTRIGINJEC_T3_CC4 ((uint32_t)( ADC_CR2_JEXTSEL_2 )) |
| bogdanm | 0:9b334a45a8ff | 219 | #define ADC_EXTERNALTRIGINJEC_T4_TRGO ((uint32_t)( ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_0)) |
| bogdanm | 0:9b334a45a8ff | 220 | #define ADC_EXTERNALTRIGINJEC_T4_CC1 ((uint32_t)( ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_1 )) |
| bogdanm | 0:9b334a45a8ff | 221 | #define ADC_EXTERNALTRIGINJEC_T4_CC2 ((uint32_t)( ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_1 | ADC_CR2_JEXTSEL_0)) |
| bogdanm | 0:9b334a45a8ff | 222 | #define ADC_EXTERNALTRIGINJEC_T4_CC3 ((uint32_t)(ADC_CR2_JEXTSEL_3 )) |
| bogdanm | 0:9b334a45a8ff | 223 | #define ADC_EXTERNALTRIGINJEC_T10_CC1 ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_0)) |
| bogdanm | 0:9b334a45a8ff | 224 | #define ADC_EXTERNALTRIGINJEC_T7_TRGO ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_1 )) |
| bogdanm | 0:9b334a45a8ff | 225 | #define ADC_EXTERNALTRIGINJEC_EXT_IT15 ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_1 | ADC_CR2_JEXTSEL_0)) |
| bogdanm | 0:9b334a45a8ff | 226 | |
| bogdanm | 0:9b334a45a8ff | 227 | /** |
| bogdanm | 0:9b334a45a8ff | 228 | * @} |
| bogdanm | 0:9b334a45a8ff | 229 | */ |
| bogdanm | 0:9b334a45a8ff | 230 | |
| bogdanm | 0:9b334a45a8ff | 231 | |
| bogdanm | 0:9b334a45a8ff | 232 | /** @defgroup ADCEx_injected_nb_conv_verification ADCEx injected nb conv verification |
| bogdanm | 0:9b334a45a8ff | 233 | * @{ |
| bogdanm | 0:9b334a45a8ff | 234 | */ |
| bogdanm | 0:9b334a45a8ff | 235 | #define IS_ADC_INJECTED_NB_CONV(LENGTH) (((LENGTH) >= ((uint32_t)1)) && ((LENGTH) <= ((uint32_t)4))) |
| bogdanm | 0:9b334a45a8ff | 236 | /** |
| bogdanm | 0:9b334a45a8ff | 237 | * @} |
| bogdanm | 0:9b334a45a8ff | 238 | */ |
| bogdanm | 0:9b334a45a8ff | 239 | |
| bogdanm | 0:9b334a45a8ff | 240 | /** |
| bogdanm | 0:9b334a45a8ff | 241 | * @} |
| bogdanm | 0:9b334a45a8ff | 242 | */ |
| bogdanm | 0:9b334a45a8ff | 243 | |
| bogdanm | 0:9b334a45a8ff | 244 | |
| bogdanm | 0:9b334a45a8ff | 245 | /* Exported macro ------------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 246 | |
| bogdanm | 0:9b334a45a8ff | 247 | /** @defgroup ADCEx_Exported_Macros ADCEx Exported Macros |
| bogdanm | 0:9b334a45a8ff | 248 | * @{ |
| bogdanm | 0:9b334a45a8ff | 249 | */ |
| bogdanm | 0:9b334a45a8ff | 250 | /* Macro for internal HAL driver usage, and possibly can be used into code of */ |
| bogdanm | 0:9b334a45a8ff | 251 | /* final user. */ |
| bogdanm | 0:9b334a45a8ff | 252 | |
| bogdanm | 0:9b334a45a8ff | 253 | /** |
| bogdanm | 0:9b334a45a8ff | 254 | * @brief Selection of channels bank. |
| bogdanm | 0:9b334a45a8ff | 255 | * Note: Banks availability depends on devices categories. |
| bogdanm | 0:9b334a45a8ff | 256 | * This macro is intended to change bank selection quickly on the fly, |
| bogdanm | 0:9b334a45a8ff | 257 | * without going through ADC init structure update and execution of function |
| bogdanm | 0:9b334a45a8ff | 258 | * 'HAL_ADC_Init()'. |
| bogdanm | 0:9b334a45a8ff | 259 | * @param __HANDLE__: ADC handle |
| bogdanm | 0:9b334a45a8ff | 260 | * @param __BANK__: Bank selection. This parameter can be a value of @ref ADC_ChannelsBank. |
| bogdanm | 0:9b334a45a8ff | 261 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 262 | */ |
| bogdanm | 0:9b334a45a8ff | 263 | #define __HAL_ADC_CHANNELS_BANK(__HANDLE__, __BANK__) \ |
| bogdanm | 0:9b334a45a8ff | 264 | MODIFY_REG((__HANDLE__)->Instance->CR2, ADC_CR2_CFG, (__BANK__)) |
| bogdanm | 0:9b334a45a8ff | 265 | |
| bogdanm | 0:9b334a45a8ff | 266 | #if defined(STM32L100xC) || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || defined(STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || defined(STM32L151xE) || defined (STM32L152xE) || defined (STM32L162xE) |
| bogdanm | 0:9b334a45a8ff | 267 | /** |
| bogdanm | 0:9b334a45a8ff | 268 | * @brief Configures the ADC channels speed. |
| bogdanm | 0:9b334a45a8ff | 269 | * Limited to channels 3, 8, 13 and to devices category Cat.3, Cat.4, Cat.5. |
| bogdanm | 0:9b334a45a8ff | 270 | * - For ADC_CHANNEL_3: Used as ADC direct channel (fast channel) if OPAMP1 is |
| bogdanm | 0:9b334a45a8ff | 271 | * in power down mode. |
| bogdanm | 0:9b334a45a8ff | 272 | * - For ADC_CHANNEL_8: Used as ADC direct channel (fast channel) if OPAMP2 is |
| bogdanm | 0:9b334a45a8ff | 273 | * in power down mode. |
| bogdanm | 0:9b334a45a8ff | 274 | * - For ADC_CHANNEL_13: Used as ADC re-routed channel if OPAMP3 is in |
| bogdanm | 0:9b334a45a8ff | 275 | * power down mode. Otherwise, channel 13 is connected to OPAMP3 output and |
| bogdanm | 0:9b334a45a8ff | 276 | * routed through switches COMP1_SW1 and VCOMP to ADC switch matrix. |
| bogdanm | 0:9b334a45a8ff | 277 | * (Note: OPAMP3 is available on STM32L1 Cat.4 only). |
| bogdanm | 0:9b334a45a8ff | 278 | * @param __CHANNEL__: ADC channel |
| bogdanm | 0:9b334a45a8ff | 279 | * This parameter can be one of the following values: |
| bogdanm | 0:9b334a45a8ff | 280 | * @arg ADC_CHANNEL_3: Channel 3 is selected. |
| bogdanm | 0:9b334a45a8ff | 281 | * @arg ADC_CHANNEL_8: Channel 8 is selected. |
| bogdanm | 0:9b334a45a8ff | 282 | * @arg ADC_CHANNEL_13: Channel 13 is selected. |
| bogdanm | 0:9b334a45a8ff | 283 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 284 | */ |
| bogdanm | 0:9b334a45a8ff | 285 | #define __HAL_ADC_CHANNEL_SPEED_FAST(__CHANNEL__) \ |
| bogdanm | 0:9b334a45a8ff | 286 | ( ( ((__CHANNEL__) == ADC_CHANNEL_3) \ |
| bogdanm | 0:9b334a45a8ff | 287 | )? \ |
| bogdanm | 0:9b334a45a8ff | 288 | (SET_BIT(COMP->CSR, COMP_CSR_FCH3)) \ |
| bogdanm | 0:9b334a45a8ff | 289 | : \ |
| bogdanm | 0:9b334a45a8ff | 290 | ( ( ((__CHANNEL__) == ADC_CHANNEL_8) \ |
| bogdanm | 0:9b334a45a8ff | 291 | )? \ |
| bogdanm | 0:9b334a45a8ff | 292 | (SET_BIT(COMP->CSR, COMP_CSR_FCH8)) \ |
| bogdanm | 0:9b334a45a8ff | 293 | : \ |
| bogdanm | 0:9b334a45a8ff | 294 | ( ( ((__CHANNEL__) == ADC_CHANNEL_13) \ |
| bogdanm | 0:9b334a45a8ff | 295 | )? \ |
| bogdanm | 0:9b334a45a8ff | 296 | (SET_BIT(COMP->CSR, COMP_CSR_RCH13)) \ |
| bogdanm | 0:9b334a45a8ff | 297 | : \ |
| bogdanm | 0:9b334a45a8ff | 298 | (SET_BIT(COMP->CSR, 0x00000000)) \ |
| bogdanm | 0:9b334a45a8ff | 299 | ) \ |
| bogdanm | 0:9b334a45a8ff | 300 | ) \ |
| bogdanm | 0:9b334a45a8ff | 301 | ) |
| bogdanm | 0:9b334a45a8ff | 302 | |
| bogdanm | 0:9b334a45a8ff | 303 | #define __HAL_ADC_CHANNEL_SPEED_SLOW(__CHANNEL__) \ |
| bogdanm | 0:9b334a45a8ff | 304 | ( ( ((__CHANNEL__) == ADC_CHANNEL_3) \ |
| bogdanm | 0:9b334a45a8ff | 305 | )? \ |
| bogdanm | 0:9b334a45a8ff | 306 | (CLEAR_BIT(COMP->CSR, COMP_CSR_FCH3)) \ |
| bogdanm | 0:9b334a45a8ff | 307 | : \ |
| bogdanm | 0:9b334a45a8ff | 308 | ( ( ((__CHANNEL__) == ADC_CHANNEL_8) \ |
| bogdanm | 0:9b334a45a8ff | 309 | )? \ |
| bogdanm | 0:9b334a45a8ff | 310 | (CLEAR_BIT(COMP->CSR, COMP_CSR_FCH8)) \ |
| bogdanm | 0:9b334a45a8ff | 311 | : \ |
| bogdanm | 0:9b334a45a8ff | 312 | ( ( ((__CHANNEL__) == ADC_CHANNEL_13) \ |
| bogdanm | 0:9b334a45a8ff | 313 | )? \ |
| bogdanm | 0:9b334a45a8ff | 314 | (CLEAR_BIT(COMP->CSR, COMP_CSR_RCH13)) \ |
| bogdanm | 0:9b334a45a8ff | 315 | : \ |
| bogdanm | 0:9b334a45a8ff | 316 | (SET_BIT(COMP->CSR, 0x00000000)) \ |
| bogdanm | 0:9b334a45a8ff | 317 | ) \ |
| bogdanm | 0:9b334a45a8ff | 318 | ) \ |
| bogdanm | 0:9b334a45a8ff | 319 | ) |
| bogdanm | 0:9b334a45a8ff | 320 | #endif /* STM32L100xC || STM32L151xC || STM32L152xC || STM32L162xC || STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD || STM32L151xE || STM32L152xE || STM32L162xE */ |
| bogdanm | 0:9b334a45a8ff | 321 | |
| bogdanm | 0:9b334a45a8ff | 322 | /** |
| bogdanm | 0:9b334a45a8ff | 323 | * @} |
| bogdanm | 0:9b334a45a8ff | 324 | */ |
| bogdanm | 0:9b334a45a8ff | 325 | |
| bogdanm | 0:9b334a45a8ff | 326 | /* Private macro ------------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 327 | |
| bogdanm | 0:9b334a45a8ff | 328 | /** @defgroup ADCEx_Private_Macro ADCEx Private Macro |
| bogdanm | 0:9b334a45a8ff | 329 | * @{ |
| bogdanm | 0:9b334a45a8ff | 330 | */ |
| bogdanm | 0:9b334a45a8ff | 331 | /* Macro reserved for internal HAL driver usage, not intended to be used in */ |
| bogdanm | 0:9b334a45a8ff | 332 | /* code of final user. */ |
| bogdanm | 0:9b334a45a8ff | 333 | |
| bogdanm | 0:9b334a45a8ff | 334 | /** |
| bogdanm | 0:9b334a45a8ff | 335 | * @brief Set ADC number of ranks into regular channel sequence length. |
| bogdanm | 0:9b334a45a8ff | 336 | * @param _NbrOfConversion_: Regular channel sequence length |
| bogdanm | 0:9b334a45a8ff | 337 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 338 | */ |
| bogdanm | 0:9b334a45a8ff | 339 | #define __ADC_SQR1_L(_NbrOfConversion_) (((_NbrOfConversion_) - (uint8_t)1) << POSITION_VAL(ADC_SQR1_L)) |
| bogdanm | 0:9b334a45a8ff | 340 | |
| bogdanm | 0:9b334a45a8ff | 341 | /** |
| bogdanm | 0:9b334a45a8ff | 342 | * @brief Set ADC ranks available in register SQR1. |
| bogdanm | 0:9b334a45a8ff | 343 | * Register SQR1 bits availability depends on device category. |
| bogdanm | 0:9b334a45a8ff | 344 | * @param _NbrOfConversion_: Regular channel sequence length |
| bogdanm | 0:9b334a45a8ff | 345 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 346 | */ |
| bogdanm | 0:9b334a45a8ff | 347 | #if defined(STM32L100xC) || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || defined(STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || defined(STM32L151xE) || defined (STM32L152xE) || defined (STM32L162xE) |
| bogdanm | 0:9b334a45a8ff | 348 | #define __ADC_SQR1_SQXX ADC_SQR1_SQ28 | ADC_SQR1_SQ27 | ADC_SQR1_SQ26 | ADC_SQR1_SQ25 |
| bogdanm | 0:9b334a45a8ff | 349 | #else |
| bogdanm | 0:9b334a45a8ff | 350 | #define __ADC_SQR1_SQXX ADC_SQR1_SQ27 | ADC_SQR1_SQ26 | ADC_SQR1_SQ25 |
| bogdanm | 0:9b334a45a8ff | 351 | #endif /* STM32L100xC || STM32L151xC || STM32L152xC || STM32L162xC || STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD || STM32L151xE || STM32L152xE || STM32L162xE */ |
| bogdanm | 0:9b334a45a8ff | 352 | |
| bogdanm | 0:9b334a45a8ff | 353 | /** |
| bogdanm | 0:9b334a45a8ff | 354 | * @brief Set the ADC's sample time for channel numbers between 30 and 31. |
| bogdanm | 0:9b334a45a8ff | 355 | * Register SMPR0 availability depends on device category. If register is not |
| bogdanm | 0:9b334a45a8ff | 356 | * available on the current device, this macro does nothing. |
| bogdanm | 0:9b334a45a8ff | 357 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 358 | * @param _SAMPLETIME_: Sample time parameter. |
| bogdanm | 0:9b334a45a8ff | 359 | * @param _CHANNELNB_: Channel number. |
| bogdanm | 0:9b334a45a8ff | 360 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 361 | */ |
| bogdanm | 0:9b334a45a8ff | 362 | #if defined(STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || defined(STM32L151xE) || defined (STM32L152xE) || defined (STM32L162xE) |
| bogdanm | 0:9b334a45a8ff | 363 | #define __ADC_SMPR0(_SAMPLETIME_, _CHANNELNB_) ((_SAMPLETIME_) << (3 * ((_CHANNELNB_) - 30))) |
| bogdanm | 0:9b334a45a8ff | 364 | #else |
| bogdanm | 0:9b334a45a8ff | 365 | #define __ADC_SMPR0(_SAMPLETIME_, _CHANNELNB_) ((uint32_t)0x00000000) |
| bogdanm | 0:9b334a45a8ff | 366 | #endif /* STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD || STM32L151xE || STM32L152xE || STM32L162xE */ |
| bogdanm | 0:9b334a45a8ff | 367 | |
| bogdanm | 0:9b334a45a8ff | 368 | #if defined(STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || defined(STM32L151xE) || defined (STM32L152xE) || defined (STM32L162xE) |
| bogdanm | 0:9b334a45a8ff | 369 | /** |
| bogdanm | 0:9b334a45a8ff | 370 | * @brief Set the ADC's sample time for channel numbers between 20 and 29. |
| bogdanm | 0:9b334a45a8ff | 371 | * @param _SAMPLETIME_: Sample time parameter. |
| bogdanm | 0:9b334a45a8ff | 372 | * @param _CHANNELNB_: Channel number. |
| bogdanm | 0:9b334a45a8ff | 373 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 374 | */ |
| bogdanm | 0:9b334a45a8ff | 375 | #define __ADC_SMPR1(_SAMPLETIME_, _CHANNELNB_) ((_SAMPLETIME_) << (3 * ((_CHANNELNB_) - 20))) |
| bogdanm | 0:9b334a45a8ff | 376 | #else |
| bogdanm | 0:9b334a45a8ff | 377 | /** |
| bogdanm | 0:9b334a45a8ff | 378 | * @brief Set the ADC's sample time for channel numbers between 20 and 26. |
| bogdanm | 0:9b334a45a8ff | 379 | * @param _SAMPLETIME_: Sample time parameter. |
| bogdanm | 0:9b334a45a8ff | 380 | * @param _CHANNELNB_: Channel number. |
| bogdanm | 0:9b334a45a8ff | 381 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 382 | */ |
| bogdanm | 0:9b334a45a8ff | 383 | #define __ADC_SMPR1(_SAMPLETIME_, _CHANNELNB_) ((_SAMPLETIME_) << (3 * ((_CHANNELNB_) - 20))) |
| bogdanm | 0:9b334a45a8ff | 384 | #endif /* STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD || STM32L151xE || STM32L152xE || STM32L162xE */ |
| bogdanm | 0:9b334a45a8ff | 385 | |
| bogdanm | 0:9b334a45a8ff | 386 | /** |
| bogdanm | 0:9b334a45a8ff | 387 | * @brief Defines the highest channel available in register SMPR1. Channels |
| bogdanm | 0:9b334a45a8ff | 388 | * availability depends on device category: |
| bogdanm | 0:9b334a45a8ff | 389 | * Highest channel in register SMPR1 is channel 26 for devices Cat.1, Cat.2, Cat.3 |
| bogdanm | 0:9b334a45a8ff | 390 | * Highest channel in register SMPR1 is channel 29 for devices Cat.4, Cat.5 |
| bogdanm | 0:9b334a45a8ff | 391 | * @param None |
| bogdanm | 0:9b334a45a8ff | 392 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 393 | */ |
| bogdanm | 0:9b334a45a8ff | 394 | #if defined(STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || defined(STM32L151xE) || defined (STM32L152xE) || defined (STM32L162xE) |
| bogdanm | 0:9b334a45a8ff | 395 | #define ADC_SMPR1_CHANNEL_MAX ADC_CHANNEL_29 |
| bogdanm | 0:9b334a45a8ff | 396 | #else |
| bogdanm | 0:9b334a45a8ff | 397 | #define ADC_SMPR1_CHANNEL_MAX ADC_CHANNEL_26 |
| bogdanm | 0:9b334a45a8ff | 398 | #endif /* STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD || STM32L151xE || STM32L152xE || STM32L162xE */ |
| bogdanm | 0:9b334a45a8ff | 399 | |
| bogdanm | 0:9b334a45a8ff | 400 | /** |
| bogdanm | 0:9b334a45a8ff | 401 | * @brief Set the ADC's sample time for channel numbers between 10 and 18. |
| bogdanm | 0:9b334a45a8ff | 402 | * @param _SAMPLETIME_: Sample time parameter. |
| bogdanm | 0:9b334a45a8ff | 403 | * @param _CHANNELNB_: Channel number. |
| bogdanm | 0:9b334a45a8ff | 404 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 405 | */ |
| bogdanm | 0:9b334a45a8ff | 406 | #define __ADC_SMPR2(_SAMPLETIME_, _CHANNELNB_) ((_SAMPLETIME_) << (3 * ((_CHANNELNB_) - 10))) |
| bogdanm | 0:9b334a45a8ff | 407 | |
| bogdanm | 0:9b334a45a8ff | 408 | /** |
| bogdanm | 0:9b334a45a8ff | 409 | * @brief Set the ADC's sample time for channel numbers between 0 and 9. |
| bogdanm | 0:9b334a45a8ff | 410 | * @param _SAMPLETIME_: Sample time parameter. |
| bogdanm | 0:9b334a45a8ff | 411 | * @param _CHANNELNB_: Channel number. |
| bogdanm | 0:9b334a45a8ff | 412 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 413 | */ |
| bogdanm | 0:9b334a45a8ff | 414 | #define __ADC_SMPR3(_SAMPLETIME_, _CHANNELNB_) ((_SAMPLETIME_) << (3 * (_CHANNELNB_))) |
| bogdanm | 0:9b334a45a8ff | 415 | |
| bogdanm | 0:9b334a45a8ff | 416 | /** |
| bogdanm | 0:9b334a45a8ff | 417 | * @brief Set the selected regular channel rank for rank between 1 and 6. |
| bogdanm | 0:9b334a45a8ff | 418 | * @param _CHANNELNB_: Channel number. |
| bogdanm | 0:9b334a45a8ff | 419 | * @param _RANKNB_: Rank number. |
| bogdanm | 0:9b334a45a8ff | 420 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 421 | */ |
| bogdanm | 0:9b334a45a8ff | 422 | #define __ADC_SQR5_RK(_CHANNELNB_, _RANKNB_) ((_CHANNELNB_) << (5 * ((_RANKNB_) - 1))) |
| bogdanm | 0:9b334a45a8ff | 423 | |
| bogdanm | 0:9b334a45a8ff | 424 | /** |
| bogdanm | 0:9b334a45a8ff | 425 | * @brief Set the selected regular channel rank for rank between 7 and 12. |
| bogdanm | 0:9b334a45a8ff | 426 | * @param _CHANNELNB_: Channel number. |
| bogdanm | 0:9b334a45a8ff | 427 | * @param _RANKNB_: Rank number. |
| bogdanm | 0:9b334a45a8ff | 428 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 429 | */ |
| bogdanm | 0:9b334a45a8ff | 430 | #define __ADC_SQR4_RK(_CHANNELNB_, _RANKNB_) ((_CHANNELNB_) << (5 * ((_RANKNB_) - 7))) |
| bogdanm | 0:9b334a45a8ff | 431 | |
| bogdanm | 0:9b334a45a8ff | 432 | /** |
| bogdanm | 0:9b334a45a8ff | 433 | * @brief Set the selected regular channel rank for rank between 13 and 18. |
| bogdanm | 0:9b334a45a8ff | 434 | * @param _CHANNELNB_: Channel number. |
| bogdanm | 0:9b334a45a8ff | 435 | * @param _RANKNB_: Rank number. |
| bogdanm | 0:9b334a45a8ff | 436 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 437 | */ |
| bogdanm | 0:9b334a45a8ff | 438 | #define __ADC_SQR3_RK(_CHANNELNB_, _RANKNB_) ((_CHANNELNB_) << (5 * ((_RANKNB_) - 13))) |
| bogdanm | 0:9b334a45a8ff | 439 | |
| bogdanm | 0:9b334a45a8ff | 440 | /** |
| bogdanm | 0:9b334a45a8ff | 441 | * @brief Set the selected regular channel rank for rank between 19 and 24. |
| bogdanm | 0:9b334a45a8ff | 442 | * @param _CHANNELNB_: Channel number. |
| bogdanm | 0:9b334a45a8ff | 443 | * @param _RANKNB_: Rank number. |
| bogdanm | 0:9b334a45a8ff | 444 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 445 | */ |
| bogdanm | 0:9b334a45a8ff | 446 | #define __ADC_SQR2_RK(_CHANNELNB_, _RANKNB_) ((_CHANNELNB_) << (5 * ((_RANKNB_) - 19))) |
| bogdanm | 0:9b334a45a8ff | 447 | |
| bogdanm | 0:9b334a45a8ff | 448 | /** |
| bogdanm | 0:9b334a45a8ff | 449 | * @brief Set the selected regular channel rank for rank between 25 and 28. |
| bogdanm | 0:9b334a45a8ff | 450 | * @param _CHANNELNB_: Channel number. |
| bogdanm | 0:9b334a45a8ff | 451 | * @param _RANKNB_: Rank number. |
| bogdanm | 0:9b334a45a8ff | 452 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 453 | */ |
| bogdanm | 0:9b334a45a8ff | 454 | #define __ADC_SQR1_RK(_CHANNELNB_, _RANKNB_) ((_CHANNELNB_) << (5 * ((_RANKNB_) - 25))) |
| bogdanm | 0:9b334a45a8ff | 455 | |
| bogdanm | 0:9b334a45a8ff | 456 | /** |
| bogdanm | 0:9b334a45a8ff | 457 | * @brief Set the injected sequence length. |
| bogdanm | 0:9b334a45a8ff | 458 | * @param _JSQR_JL_: Sequence length. |
| bogdanm | 0:9b334a45a8ff | 459 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 460 | */ |
| bogdanm | 0:9b334a45a8ff | 461 | #define __ADC_JSQR_JL(_JSQR_JL_) (((_JSQR_JL_) -1) << 20) |
| bogdanm | 0:9b334a45a8ff | 462 | |
| bogdanm | 0:9b334a45a8ff | 463 | /** |
| bogdanm | 0:9b334a45a8ff | 464 | * @brief Set the selected injected Channel rank (channels sequence starting from 4-JL) |
| bogdanm | 0:9b334a45a8ff | 465 | * @param _CHANNELNB_: Channel number. |
| bogdanm | 0:9b334a45a8ff | 466 | * @param _RANKNB_: Rank number. |
| bogdanm | 0:9b334a45a8ff | 467 | * @param _JSQR_JL_: Sequence length. |
| bogdanm | 0:9b334a45a8ff | 468 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 469 | */ |
| bogdanm | 0:9b334a45a8ff | 470 | #define __ADC_JSQR_RK(_CHANNELNB_, _RANKNB_, _JSQR_JL_) \ |
| bogdanm | 0:9b334a45a8ff | 471 | ((_CHANNELNB_) << (5 * ((4 - ((_JSQR_JL_) - (_RANKNB_))) - 1))) |
| bogdanm | 0:9b334a45a8ff | 472 | |
| bogdanm | 0:9b334a45a8ff | 473 | |
| bogdanm | 0:9b334a45a8ff | 474 | /** |
| bogdanm | 0:9b334a45a8ff | 475 | * @brief Enable the ADC DMA continuous request. |
| bogdanm | 0:9b334a45a8ff | 476 | * @param _DMACONTREQ_MODE_: DMA continuous request mode. |
| bogdanm | 0:9b334a45a8ff | 477 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 478 | */ |
| bogdanm | 0:9b334a45a8ff | 479 | #define __ADC_CR2_DMACONTREQ(_DMACONTREQ_MODE_) ((_DMACONTREQ_MODE_) << POSITION_VAL(ADC_CR2_DDS)) |
| bogdanm | 0:9b334a45a8ff | 480 | |
| bogdanm | 0:9b334a45a8ff | 481 | /** |
| bogdanm | 0:9b334a45a8ff | 482 | * @brief Enable ADC continuous conversion mode. |
| bogdanm | 0:9b334a45a8ff | 483 | * @param _CONTINUOUS_MODE_: Continuous mode. |
| bogdanm | 0:9b334a45a8ff | 484 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 485 | */ |
| bogdanm | 0:9b334a45a8ff | 486 | #define __ADC_CR2_CONTINUOUS(_CONTINUOUS_MODE_) ((_CONTINUOUS_MODE_) << POSITION_VAL(ADC_CR2_CONT)) |
| bogdanm | 0:9b334a45a8ff | 487 | |
| bogdanm | 0:9b334a45a8ff | 488 | /** |
| bogdanm | 0:9b334a45a8ff | 489 | * @brief Define mask of configuration bits of ADC and regular group in |
| bogdanm | 0:9b334a45a8ff | 490 | * register CR2 (bits of ADC enable, conversion start and injected group are |
| bogdanm | 0:9b334a45a8ff | 491 | * excluded of this mask). |
| bogdanm | 0:9b334a45a8ff | 492 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 493 | */ |
| bogdanm | 0:9b334a45a8ff | 494 | #if defined (STM32L100xC) || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || defined (STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || defined (STM32L151xE) || defined (STM32L152xE) || defined (STM32L162xE) |
| bogdanm | 0:9b334a45a8ff | 495 | #define __ADC_CR2_MASK_ADCINIT() \ |
| bogdanm | 0:9b334a45a8ff | 496 | (ADC_CR2_EXTEN | ADC_CR2_EXTSEL | ADC_CR2_ALIGN | ADC_CR2_EOCS | ADC_CR2_DDS | ADC_CR2_DELS | ADC_CR2_CFG | ADC_CR2_CONT) |
| bogdanm | 0:9b334a45a8ff | 497 | #else |
| bogdanm | 0:9b334a45a8ff | 498 | #define __ADC_CR2_MASK_ADCINIT() \ |
| bogdanm | 0:9b334a45a8ff | 499 | (ADC_CR2_EXTEN | ADC_CR2_EXTSEL | ADC_CR2_ALIGN | ADC_CR2_EOCS | ADC_CR2_DDS | ADC_CR2_DELS | ADC_CR2_CONT) |
| bogdanm | 0:9b334a45a8ff | 500 | #endif |
| bogdanm | 0:9b334a45a8ff | 501 | |
| bogdanm | 0:9b334a45a8ff | 502 | /** |
| bogdanm | 0:9b334a45a8ff | 503 | * @brief Configures the number of discontinuous conversions for the regular group channels. |
| bogdanm | 0:9b334a45a8ff | 504 | * @param _NBR_DISCONTINUOUS_CONV_: Number of discontinuous conversions. |
| bogdanm | 0:9b334a45a8ff | 505 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 506 | */ |
| bogdanm | 0:9b334a45a8ff | 507 | #define __ADC_CR1_DISCONTINUOUS_NUM(_NBR_DISCONTINUOUS_CONV_) (((_NBR_DISCONTINUOUS_CONV_) - 1) << POSITION_VAL(ADC_CR1_DISCNUM)) |
| bogdanm | 0:9b334a45a8ff | 508 | |
| bogdanm | 0:9b334a45a8ff | 509 | /** |
| bogdanm | 0:9b334a45a8ff | 510 | * @brief Enable ADC scan mode to convert multiple ranks with sequencer. |
| bogdanm | 0:9b334a45a8ff | 511 | * @param _SCAN_MODE_: Scan conversion mode. |
| bogdanm | 0:9b334a45a8ff | 512 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 513 | */ |
| bogdanm | 0:9b334a45a8ff | 514 | #define __ADC_CR1_SCAN(_SCAN_MODE_) \ |
| bogdanm | 0:9b334a45a8ff | 515 | ( ( (_SCAN_MODE_) == (ADC_SCAN_ENABLE) \ |
| bogdanm | 0:9b334a45a8ff | 516 | )? (ADC_CR1_SCAN) : (0x00000000) \ |
| bogdanm | 0:9b334a45a8ff | 517 | ) |
| bogdanm | 0:9b334a45a8ff | 518 | |
| bogdanm | 0:9b334a45a8ff | 519 | /** |
| bogdanm | 0:9b334a45a8ff | 520 | * @brief Get the maximum ADC conversion cycles on all channels. |
| bogdanm | 0:9b334a45a8ff | 521 | * Returns the selected sampling time + conversion time (12.5 ADC clock cycles) |
| bogdanm | 0:9b334a45a8ff | 522 | * Approximation of sampling time within 2 ranges, returns the higher value: |
| bogdanm | 0:9b334a45a8ff | 523 | * below 24 cycles {4 cycles; 9 cycles; 16 cycles; 24 cycles} |
| bogdanm | 0:9b334a45a8ff | 524 | * between 48 cycles and 384 cycles {48 cycles; 96 cycles; 192 cycles; 384 cycles} |
| bogdanm | 0:9b334a45a8ff | 525 | * Unit: ADC clock cycles |
| bogdanm | 0:9b334a45a8ff | 526 | * @param __HANDLE__: ADC handle |
| bogdanm | 0:9b334a45a8ff | 527 | * @retval ADC conversion cycles on all channels |
| bogdanm | 0:9b334a45a8ff | 528 | */ |
| bogdanm | 0:9b334a45a8ff | 529 | #if defined(STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || defined(STM32L151xE) || defined (STM32L152xE) || defined (STM32L162xE) |
| bogdanm | 0:9b334a45a8ff | 530 | #define __ADC_CONVCYCLES_MAX_RANGE(__HANDLE__) \ |
| bogdanm | 0:9b334a45a8ff | 531 | (( (((__HANDLE__)->Instance->SMPR3 & ADC_SAMPLETIME_ALLCHANNELS_SMPR3BIT2) == RESET) && \ |
| bogdanm | 0:9b334a45a8ff | 532 | (((__HANDLE__)->Instance->SMPR2 & ADC_SAMPLETIME_ALLCHANNELS_SMPR2BIT2) == RESET) && \ |
| bogdanm | 0:9b334a45a8ff | 533 | (((__HANDLE__)->Instance->SMPR1 & ADC_SAMPLETIME_ALLCHANNELS_SMPR1BIT2) == RESET) && \ |
| bogdanm | 0:9b334a45a8ff | 534 | (((__HANDLE__)->Instance->SMPR0 & ADC_SAMPLETIME_ALLCHANNELS_SMPR0BIT2) == RESET) ) ? \ |
| bogdanm | 0:9b334a45a8ff | 535 | \ |
| bogdanm | 0:9b334a45a8ff | 536 | ADC_CONVERSIONCLOCKCYCLES_SAMPLETIME_24CYCLES : ADC_CONVERSIONCLOCKCYCLES_SAMPLETIME_384CYCLES \ |
| bogdanm | 0:9b334a45a8ff | 537 | ) |
| bogdanm | 0:9b334a45a8ff | 538 | #else |
| bogdanm | 0:9b334a45a8ff | 539 | #define __ADC_CONVCYCLES_MAX_RANGE(__HANDLE__) \ |
| bogdanm | 0:9b334a45a8ff | 540 | (( (((__HANDLE__)->Instance->SMPR3 & ADC_SAMPLETIME_ALLCHANNELS_SMPR3BIT2) == RESET) && \ |
| bogdanm | 0:9b334a45a8ff | 541 | (((__HANDLE__)->Instance->SMPR2 & ADC_SAMPLETIME_ALLCHANNELS_SMPR2BIT2) == RESET) && \ |
| bogdanm | 0:9b334a45a8ff | 542 | (((__HANDLE__)->Instance->SMPR1 & ADC_SAMPLETIME_ALLCHANNELS_SMPR1BIT2) == RESET) ) ? \ |
| bogdanm | 0:9b334a45a8ff | 543 | \ |
| bogdanm | 0:9b334a45a8ff | 544 | ADC_CONVERSIONCLOCKCYCLES_SAMPLETIME_24CYCLES : ADC_CONVERSIONCLOCKCYCLES_SAMPLETIME_384CYCLES \ |
| bogdanm | 0:9b334a45a8ff | 545 | ) |
| bogdanm | 0:9b334a45a8ff | 546 | #endif /* STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD || STM32L151xE || STM32L152xE || STM32L162xE */ |
| bogdanm | 0:9b334a45a8ff | 547 | |
| bogdanm | 0:9b334a45a8ff | 548 | /** |
| bogdanm | 0:9b334a45a8ff | 549 | * @brief Get the ADC clock prescaler from ADC common control register |
| bogdanm | 0:9b334a45a8ff | 550 | * and convert it to its decimal number setting (refer to reference manual) |
| bogdanm | 0:9b334a45a8ff | 551 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 552 | */ |
| bogdanm | 0:9b334a45a8ff | 553 | #define __ADC_GET_CLOCK_PRESCALER_DECIMAL(__HANDLE__) \ |
| bogdanm | 0:9b334a45a8ff | 554 | ((0x01) << ((ADC->CCR & ADC_CCR_ADCPRE) >> POSITION_VAL(ADC_CCR_ADCPRE))) |
| bogdanm | 0:9b334a45a8ff | 555 | |
| bogdanm | 0:9b334a45a8ff | 556 | /** |
| bogdanm | 0:9b334a45a8ff | 557 | * @brief Clear register SMPR0. |
| bogdanm | 0:9b334a45a8ff | 558 | * Register SMPR0 availability depends on device category. If register is not |
| bogdanm | 0:9b334a45a8ff | 559 | * available on the current device, this macro performs no action. |
| bogdanm | 0:9b334a45a8ff | 560 | * @param __HANDLE__: ADC handle |
| bogdanm | 0:9b334a45a8ff | 561 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 562 | */ |
| bogdanm | 0:9b334a45a8ff | 563 | #if defined(STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || defined(STM32L151xE) || defined (STM32L152xE) || defined (STM32L162xE) |
| bogdanm | 0:9b334a45a8ff | 564 | #define __ADC_SMPR0_CLEAR(__HANDLE__) \ |
| bogdanm | 0:9b334a45a8ff | 565 | (CLEAR_BIT((__HANDLE__)->Instance->SMPR0, (ADC_SMPR0_SMP31 | ADC_SMPR0_SMP30))) |
| bogdanm | 0:9b334a45a8ff | 566 | #else |
| bogdanm | 0:9b334a45a8ff | 567 | #define __ADC_SMPR0_CLEAR(__HANDLE__) __NOP() |
| bogdanm | 0:9b334a45a8ff | 568 | #endif /* STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD || STM32L151xE || STM32L152xE || STM32L162xE */ |
| bogdanm | 0:9b334a45a8ff | 569 | |
| bogdanm | 0:9b334a45a8ff | 570 | /** |
| bogdanm | 0:9b334a45a8ff | 571 | * @brief Clear register CR2. |
| bogdanm | 0:9b334a45a8ff | 572 | * @param __HANDLE__: ADC handle |
| bogdanm | 0:9b334a45a8ff | 573 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 574 | */ |
| bogdanm | 0:9b334a45a8ff | 575 | #if defined(STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || defined(STM32L151xE) || defined (STM32L152xE) || defined (STM32L162xE) |
| bogdanm | 0:9b334a45a8ff | 576 | #define __ADC_CR2_CLEAR(__HANDLE__) \ |
| bogdanm | 0:9b334a45a8ff | 577 | (CLEAR_BIT((__HANDLE__)->Instance->CR2, (ADC_CR2_SWSTART | ADC_CR2_EXTEN | ADC_CR2_EXTSEL | \ |
| bogdanm | 0:9b334a45a8ff | 578 | ADC_CR2_JSWSTART | ADC_CR2_JEXTEN | ADC_CR2_JEXTSEL | \ |
| bogdanm | 0:9b334a45a8ff | 579 | ADC_CR2_ALIGN | ADC_CR2_EOCS | ADC_CR2_DDS | \ |
| bogdanm | 0:9b334a45a8ff | 580 | ADC_CR2_DMA | ADC_CR2_DELS | ADC_CR2_CFG | \ |
| bogdanm | 0:9b334a45a8ff | 581 | ADC_CR2_CONT | ADC_CR2_ADON )) \ |
| bogdanm | 0:9b334a45a8ff | 582 | ) |
| bogdanm | 0:9b334a45a8ff | 583 | #else |
| bogdanm | 0:9b334a45a8ff | 584 | #define __ADC_CR2_CLEAR(__HANDLE__) \ |
| bogdanm | 0:9b334a45a8ff | 585 | (CLEAR_BIT((__HANDLE__)->Instance->CR2, (ADC_CR2_SWSTART | ADC_CR2_EXTEN | ADC_CR2_EXTSEL | \ |
| bogdanm | 0:9b334a45a8ff | 586 | ADC_CR2_JSWSTART | ADC_CR2_JEXTEN | ADC_CR2_JEXTSEL | \ |
| bogdanm | 0:9b334a45a8ff | 587 | ADC_CR2_ALIGN | ADC_CR2_EOCS | ADC_CR2_DDS | \ |
| bogdanm | 0:9b334a45a8ff | 588 | ADC_CR2_DMA | ADC_CR2_DELS | \ |
| bogdanm | 0:9b334a45a8ff | 589 | ADC_CR2_CONT | ADC_CR2_ADON )) \ |
| bogdanm | 0:9b334a45a8ff | 590 | ) |
| bogdanm | 0:9b334a45a8ff | 591 | #endif /* STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD || STM32L151xE || STM32L152xE || STM32L162xE */ |
| bogdanm | 0:9b334a45a8ff | 592 | |
| bogdanm | 0:9b334a45a8ff | 593 | /** |
| bogdanm | 0:9b334a45a8ff | 594 | * @brief Set the sampling time of selected channel on register SMPR0 |
| bogdanm | 0:9b334a45a8ff | 595 | * Register SMPR0 availability depends on device category. If register is not |
| bogdanm | 0:9b334a45a8ff | 596 | * available on the current device, this macro performs no action. |
| bogdanm | 0:9b334a45a8ff | 597 | * @param __HANDLE__: ADC handle |
| bogdanm | 0:9b334a45a8ff | 598 | * @param _SAMPLETIME_: Sample time parameter. |
| bogdanm | 0:9b334a45a8ff | 599 | * @param __CHANNEL__: Channel number. |
| bogdanm | 0:9b334a45a8ff | 600 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 601 | */ |
| bogdanm | 0:9b334a45a8ff | 602 | #if defined(STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || defined(STM32L151xE) || defined (STM32L152xE) || defined (STM32L162xE) |
| bogdanm | 0:9b334a45a8ff | 603 | #define __ADC_SMPR0_CHANNEL_SET(__HANDLE__, _SAMPLETIME_, __CHANNEL__) \ |
| bogdanm | 0:9b334a45a8ff | 604 | MODIFY_REG((__HANDLE__)->Instance->SMPR0, \ |
| bogdanm | 0:9b334a45a8ff | 605 | __ADC_SMPR0(ADC_SMPR0_SMP30, (__CHANNEL__)), \ |
| bogdanm | 0:9b334a45a8ff | 606 | __ADC_SMPR0((_SAMPLETIME_), (__CHANNEL__)) ) |
| bogdanm | 0:9b334a45a8ff | 607 | #else |
| bogdanm | 0:9b334a45a8ff | 608 | #define __ADC_SMPR0_CHANNEL_SET(__HANDLE__, _SAMPLETIME_, __CHANNEL__) __NOP() |
| bogdanm | 0:9b334a45a8ff | 609 | #endif /* STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD || STM32L151xE || STM32L152xE || STM32L162xE */ |
| bogdanm | 0:9b334a45a8ff | 610 | |
| bogdanm | 0:9b334a45a8ff | 611 | |
| bogdanm | 0:9b334a45a8ff | 612 | /** |
| bogdanm | 0:9b334a45a8ff | 613 | * @brief Enable the ADC peripheral |
| bogdanm | 0:9b334a45a8ff | 614 | * @param __HANDLE__: ADC handle |
| bogdanm | 0:9b334a45a8ff | 615 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 616 | */ |
| bogdanm | 0:9b334a45a8ff | 617 | #define __ADC_ENABLE(__HANDLE__) \ |
| bogdanm | 0:9b334a45a8ff | 618 | (__HANDLE__)->Instance->CR2 |= ADC_CR2_ADON |
| bogdanm | 0:9b334a45a8ff | 619 | |
| bogdanm | 0:9b334a45a8ff | 620 | /** |
| bogdanm | 0:9b334a45a8ff | 621 | * @brief Disable the ADC peripheral |
| bogdanm | 0:9b334a45a8ff | 622 | * @param __HANDLE__: ADC handle |
| bogdanm | 0:9b334a45a8ff | 623 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 624 | */ |
| bogdanm | 0:9b334a45a8ff | 625 | #define __ADC_DISABLE(__HANDLE__) \ |
| bogdanm | 0:9b334a45a8ff | 626 | (__HANDLE__)->Instance->CR2 &= ~ADC_CR2_ADON |
| bogdanm | 0:9b334a45a8ff | 627 | |
| bogdanm | 0:9b334a45a8ff | 628 | /** |
| bogdanm | 0:9b334a45a8ff | 629 | * @} |
| bogdanm | 0:9b334a45a8ff | 630 | */ |
| bogdanm | 0:9b334a45a8ff | 631 | |
| bogdanm | 0:9b334a45a8ff | 632 | |
| bogdanm | 0:9b334a45a8ff | 633 | /* Exported functions --------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 634 | /** @addtogroup ADCEx_Exported_Functions |
| bogdanm | 0:9b334a45a8ff | 635 | * @{ |
| bogdanm | 0:9b334a45a8ff | 636 | */ |
| bogdanm | 0:9b334a45a8ff | 637 | |
| bogdanm | 0:9b334a45a8ff | 638 | /* IO operation functions *****************************************************/ |
| bogdanm | 0:9b334a45a8ff | 639 | /** @addtogroup ADCEx_Exported_Functions_Group1 |
| bogdanm | 0:9b334a45a8ff | 640 | * @{ |
| bogdanm | 0:9b334a45a8ff | 641 | */ |
| bogdanm | 0:9b334a45a8ff | 642 | |
| bogdanm | 0:9b334a45a8ff | 643 | /* Blocking mode: Polling */ |
| bogdanm | 0:9b334a45a8ff | 644 | HAL_StatusTypeDef HAL_ADCEx_InjectedStart(ADC_HandleTypeDef* hadc); |
| bogdanm | 0:9b334a45a8ff | 645 | HAL_StatusTypeDef HAL_ADCEx_InjectedStop(ADC_HandleTypeDef* hadc); |
| bogdanm | 0:9b334a45a8ff | 646 | HAL_StatusTypeDef HAL_ADCEx_InjectedPollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout); |
| bogdanm | 0:9b334a45a8ff | 647 | |
| bogdanm | 0:9b334a45a8ff | 648 | /* Non-blocking mode: Interruption */ |
| bogdanm | 0:9b334a45a8ff | 649 | HAL_StatusTypeDef HAL_ADCEx_InjectedStart_IT(ADC_HandleTypeDef* hadc); |
| bogdanm | 0:9b334a45a8ff | 650 | HAL_StatusTypeDef HAL_ADCEx_InjectedStop_IT(ADC_HandleTypeDef* hadc); |
| bogdanm | 0:9b334a45a8ff | 651 | |
| bogdanm | 0:9b334a45a8ff | 652 | /* ADC retrieve conversion value intended to be used with polling or interruption */ |
| bogdanm | 0:9b334a45a8ff | 653 | uint32_t HAL_ADCEx_InjectedGetValue(ADC_HandleTypeDef* hadc, uint32_t InjectedRank); |
| bogdanm | 0:9b334a45a8ff | 654 | |
| bogdanm | 0:9b334a45a8ff | 655 | /* ADC IRQHandler and Callbacks used in non-blocking modes (Interruption) */ |
| bogdanm | 0:9b334a45a8ff | 656 | void HAL_ADCEx_InjectedConvCpltCallback(ADC_HandleTypeDef* hadc); |
| bogdanm | 0:9b334a45a8ff | 657 | /** |
| bogdanm | 0:9b334a45a8ff | 658 | * @} |
| bogdanm | 0:9b334a45a8ff | 659 | */ |
| bogdanm | 0:9b334a45a8ff | 660 | |
| bogdanm | 0:9b334a45a8ff | 661 | |
| bogdanm | 0:9b334a45a8ff | 662 | /* Peripheral Control functions ***********************************************/ |
| bogdanm | 0:9b334a45a8ff | 663 | /** @addtogroup ADCEx_Exported_Functions_Group2 |
| bogdanm | 0:9b334a45a8ff | 664 | * @{ |
| bogdanm | 0:9b334a45a8ff | 665 | */ |
| bogdanm | 0:9b334a45a8ff | 666 | |
| bogdanm | 0:9b334a45a8ff | 667 | HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef* hadc,ADC_InjectionConfTypeDef* sConfigInjected); |
| bogdanm | 0:9b334a45a8ff | 668 | /** |
| bogdanm | 0:9b334a45a8ff | 669 | * @} |
| bogdanm | 0:9b334a45a8ff | 670 | */ |
| bogdanm | 0:9b334a45a8ff | 671 | |
| bogdanm | 0:9b334a45a8ff | 672 | |
| bogdanm | 0:9b334a45a8ff | 673 | /** |
| bogdanm | 0:9b334a45a8ff | 674 | * @} |
| bogdanm | 0:9b334a45a8ff | 675 | */ |
| bogdanm | 0:9b334a45a8ff | 676 | |
| bogdanm | 0:9b334a45a8ff | 677 | |
| bogdanm | 0:9b334a45a8ff | 678 | /** |
| bogdanm | 0:9b334a45a8ff | 679 | * @} |
| bogdanm | 0:9b334a45a8ff | 680 | */ |
| bogdanm | 0:9b334a45a8ff | 681 | |
| bogdanm | 0:9b334a45a8ff | 682 | /** |
| bogdanm | 0:9b334a45a8ff | 683 | * @} |
| bogdanm | 0:9b334a45a8ff | 684 | */ |
| bogdanm | 0:9b334a45a8ff | 685 | |
| bogdanm | 0:9b334a45a8ff | 686 | #ifdef __cplusplus |
| bogdanm | 0:9b334a45a8ff | 687 | } |
| bogdanm | 0:9b334a45a8ff | 688 | #endif |
| bogdanm | 0:9b334a45a8ff | 689 | |
| bogdanm | 0:9b334a45a8ff | 690 | #endif /* __STM32L1xx_HAL_ADC_EX_H */ |
| bogdanm | 0:9b334a45a8ff | 691 | |
| bogdanm | 0:9b334a45a8ff | 692 | |
| bogdanm | 0:9b334a45a8ff | 693 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |