en 129 / mbed-dev

fix LPC812 PWM

Dependents:   IR_LED_Send

Fork of mbed-dev by mbed official

targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_tim_ex.c@0:9b334a45a8ff, 2015-10-01 (annotated)

Committer:
bogdanm
Date:
Thu Oct 01 15:25:22 2015 +0300
Revision:
0:9b334a45a8ff
Child:
113:b3775bf36a83
Initial commit on mbed-dev



Replaces mbed-src (now inactive)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /**
bogdanm 0:9b334a45a8ff 2 ******************************************************************************
bogdanm 0:9b334a45a8ff 3 * @file stm32l0xx_hal_tim_ex.c
bogdanm 0:9b334a45a8ff 4 * @author MCD Application Team
bogdanm 0:9b334a45a8ff 5 * @version V1.2.0
bogdanm 0:9b334a45a8ff 6 * @date 06-February-2015
bogdanm 0:9b334a45a8ff 7 * @brief TIM HAL module driver.
bogdanm 0:9b334a45a8ff 8 * @brief This file provides firmware functions to manage the following
bogdanm 0:9b334a45a8ff 9 * functionalities of the Timer (TIM) peripheral:
bogdanm 0:9b334a45a8ff 10 * + Time Hall Sensor Interface Initialization
bogdanm 0:9b334a45a8ff 11 * + Time Hall Sensor Interface Start
bogdanm 0:9b334a45a8ff 12 * + Time Master and Slave synchronization configuration
bogdanm 0:9b334a45a8ff 13 @verbatim
bogdanm 0:9b334a45a8ff 14 ================================================================================
bogdanm 0:9b334a45a8ff 15 ##### TIM specific features integration #####
bogdanm 0:9b334a45a8ff 16 ================================================================================
bogdanm 0:9b334a45a8ff 17
bogdanm 0:9b334a45a8ff 18 [..] The Timer features include:
bogdanm 0:9b334a45a8ff 19 (#) 16-bit up, down, up/down auto-reload counter.
bogdanm 0:9b334a45a8ff 20 (#) 16-bit programmable prescaler allowing dividing (also on the fly) the counter clock
bogdanm 0:9b334a45a8ff 21 frequency either by any factor between 1 and 65536.
bogdanm 0:9b334a45a8ff 22 (#) Up to 4 independent channels for:
bogdanm 0:9b334a45a8ff 23 Input Capture
bogdanm 0:9b334a45a8ff 24 Output Compare
bogdanm 0:9b334a45a8ff 25 PWM generation (Edge and Center-aligned Mode)
bogdanm 0:9b334a45a8ff 26 One-pulse mode output
bogdanm 0:9b334a45a8ff 27 (#) Synchronization circuit to control the timer with external signals and to interconnect
bogdanm 0:9b334a45a8ff 28 several timers together.
bogdanm 0:9b334a45a8ff 29 (#) Supports incremental (quadrature) encoder and hall-sensor circuitry for positioning
bogdanm 0:9b334a45a8ff 30 purposes
bogdanm 0:9b334a45a8ff 31
bogdanm 0:9b334a45a8ff 32 ##### How to use this driver #####
bogdanm 0:9b334a45a8ff 33 ================================================================================
bogdanm 0:9b334a45a8ff 34 [..]
bogdanm 0:9b334a45a8ff 35 (#) Enable the TIM interface clock using
bogdanm 0:9b334a45a8ff 36 __HAL_RCC_TIMx_CLK_ENABLE();
bogdanm 0:9b334a45a8ff 37
bogdanm 0:9b334a45a8ff 38 (#) TIM pins configuration
bogdanm 0:9b334a45a8ff 39 (++) Enable the clock for the TIM GPIOs using the following function:
bogdanm 0:9b334a45a8ff 40 __HAL_RCC_GPIOx_CLK_ENABLE();
bogdanm 0:9b334a45a8ff 41 (++) Configure these TIM pins in Alternate function mode using HAL_GPIO_Init();
bogdanm 0:9b334a45a8ff 42
bogdanm 0:9b334a45a8ff 43 (#) The external Clock can be configured, if needed (the default clock is the internal clock from the APBx),
bogdanm 0:9b334a45a8ff 44 using the following function:
bogdanm 0:9b334a45a8ff 45 HAL_TIM_ConfigClockSource, the clock configuration should be done before any start function.
bogdanm 0:9b334a45a8ff 46
bogdanm 0:9b334a45a8ff 47 (#) Configure the TIM in the desired operating mode using one of the
bogdanm 0:9b334a45a8ff 48 configuration function of this driver:
bogdanm 0:9b334a45a8ff 49 (++) HAL_TIMEx_MasterConfigSynchronization() to configure the peripheral in master mode.
bogdanm 0:9b334a45a8ff 50
bogdanm 0:9b334a45a8ff 51 (#) Remap the Timer I/O using HAL_TIMEx_RemapConfig() API.
bogdanm 0:9b334a45a8ff 52
bogdanm 0:9b334a45a8ff 53
bogdanm 0:9b334a45a8ff 54 @endverbatim
bogdanm 0:9b334a45a8ff 55 ******************************************************************************
bogdanm 0:9b334a45a8ff 56 * @attention
bogdanm 0:9b334a45a8ff 57 *
bogdanm 0:9b334a45a8ff 58 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
bogdanm 0:9b334a45a8ff 59 *
bogdanm 0:9b334a45a8ff 60 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 0:9b334a45a8ff 61 * are permitted provided that the following conditions are met:
bogdanm 0:9b334a45a8ff 62 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 0:9b334a45a8ff 63 * this list of conditions and the following disclaimer.
bogdanm 0:9b334a45a8ff 64 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 0:9b334a45a8ff 65 * this list of conditions and the following disclaimer in the documentation
bogdanm 0:9b334a45a8ff 66 * and/or other materials provided with the distribution.
bogdanm 0:9b334a45a8ff 67 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 0:9b334a45a8ff 68 * may be used to endorse or promote products derived from this software
bogdanm 0:9b334a45a8ff 69 * without specific prior written permission.
bogdanm 0:9b334a45a8ff 70 *
bogdanm 0:9b334a45a8ff 71 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 0:9b334a45a8ff 72 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 0:9b334a45a8ff 73 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 0:9b334a45a8ff 74 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 0:9b334a45a8ff 75 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 0:9b334a45a8ff 76 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 0:9b334a45a8ff 77 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 0:9b334a45a8ff 78 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 0:9b334a45a8ff 79 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 0:9b334a45a8ff 80 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 0:9b334a45a8ff 81 *
bogdanm 0:9b334a45a8ff 82 ******************************************************************************
bogdanm 0:9b334a45a8ff 83 */
bogdanm 0:9b334a45a8ff 84
bogdanm 0:9b334a45a8ff 85 /* Includes ------------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 86 #include "stm32l0xx_hal.h"
bogdanm 0:9b334a45a8ff 87
bogdanm 0:9b334a45a8ff 88 /** @addtogroup STM32L0xx_HAL_Driver
bogdanm 0:9b334a45a8ff 89 * @{
bogdanm 0:9b334a45a8ff 90 */
bogdanm 0:9b334a45a8ff 91
bogdanm 0:9b334a45a8ff 92 /** @addtogroup TIMEx
bogdanm 0:9b334a45a8ff 93 * @brief TIMEx HAL module driver
bogdanm 0:9b334a45a8ff 94 * @{
bogdanm 0:9b334a45a8ff 95 */
bogdanm 0:9b334a45a8ff 96
bogdanm 0:9b334a45a8ff 97 #ifdef HAL_TIM_MODULE_ENABLED
bogdanm 0:9b334a45a8ff 98
bogdanm 0:9b334a45a8ff 99
bogdanm 0:9b334a45a8ff 100 /** @addtogroup TIMEx_Exported_Functions
bogdanm 0:9b334a45a8ff 101 * @{
bogdanm 0:9b334a45a8ff 102 */
bogdanm 0:9b334a45a8ff 103
bogdanm 0:9b334a45a8ff 104
bogdanm 0:9b334a45a8ff 105 /** @addtogroup TIMEx_Exported_Functions_Group1
bogdanm 0:9b334a45a8ff 106 * @brief Peripheral Control functions
bogdanm 0:9b334a45a8ff 107 *
bogdanm 0:9b334a45a8ff 108 @verbatim
bogdanm 0:9b334a45a8ff 109 ===============================================================================
bogdanm 0:9b334a45a8ff 110 ##### Peripheral Control functions #####
bogdanm 0:9b334a45a8ff 111 ===============================================================================
bogdanm 0:9b334a45a8ff 112 [..] This section provides functions allowing to:
bogdanm 0:9b334a45a8ff 113 (+) Configure Master and the Slave synchronization.
bogdanm 0:9b334a45a8ff 114
bogdanm 0:9b334a45a8ff 115 @endverbatim
bogdanm 0:9b334a45a8ff 116 * @{
bogdanm 0:9b334a45a8ff 117 */
bogdanm 0:9b334a45a8ff 118
bogdanm 0:9b334a45a8ff 119 /**
bogdanm 0:9b334a45a8ff 120 * @brief Configures the TIM in master mode.
bogdanm 0:9b334a45a8ff 121 * @param htim: TIM handle.
bogdanm 0:9b334a45a8ff 122 * @param sMasterConfig: pointer to a TIM_MasterConfigTypeDef structure that
bogdanm 0:9b334a45a8ff 123 * contains the selected trigger output (TRGO) and the Master/Slave
bogdanm 0:9b334a45a8ff 124 * mode.
bogdanm 0:9b334a45a8ff 125 * @retval HAL status
bogdanm 0:9b334a45a8ff 126 */
bogdanm 0:9b334a45a8ff 127 HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, TIM_MasterConfigTypeDef * sMasterConfig)
bogdanm 0:9b334a45a8ff 128 {
bogdanm 0:9b334a45a8ff 129 /* Check the parameters */
bogdanm 0:9b334a45a8ff 130 assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance));
bogdanm 0:9b334a45a8ff 131 assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger));
bogdanm 0:9b334a45a8ff 132 assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode));
bogdanm 0:9b334a45a8ff 133
bogdanm 0:9b334a45a8ff 134 __HAL_LOCK(htim);
bogdanm 0:9b334a45a8ff 135
bogdanm 0:9b334a45a8ff 136 /* Change the handler state */
bogdanm 0:9b334a45a8ff 137 htim->State = HAL_TIM_STATE_BUSY;
bogdanm 0:9b334a45a8ff 138
bogdanm 0:9b334a45a8ff 139 /* Reset the MMS Bits */
bogdanm 0:9b334a45a8ff 140 htim->Instance->CR2 &= ~TIM_CR2_MMS;
bogdanm 0:9b334a45a8ff 141 /* Select the TRGO source */
bogdanm 0:9b334a45a8ff 142 htim->Instance->CR2 |= sMasterConfig->MasterOutputTrigger;
bogdanm 0:9b334a45a8ff 143
bogdanm 0:9b334a45a8ff 144 /* Reset the MSM Bit */
bogdanm 0:9b334a45a8ff 145 htim->Instance->SMCR &= ~TIM_SMCR_MSM;
bogdanm 0:9b334a45a8ff 146 /* Set or Reset the MSM Bit */
bogdanm 0:9b334a45a8ff 147 htim->Instance->SMCR |= sMasterConfig->MasterSlaveMode;
bogdanm 0:9b334a45a8ff 148
bogdanm 0:9b334a45a8ff 149 htim->State = HAL_TIM_STATE_READY;
bogdanm 0:9b334a45a8ff 150
bogdanm 0:9b334a45a8ff 151 __HAL_UNLOCK(htim);
bogdanm 0:9b334a45a8ff 152
bogdanm 0:9b334a45a8ff 153 return HAL_OK;
bogdanm 0:9b334a45a8ff 154 }
bogdanm 0:9b334a45a8ff 155
bogdanm 0:9b334a45a8ff 156
bogdanm 0:9b334a45a8ff 157 #if defined (STM32L071xx) || defined (STM32L072xx) || defined (STM32L073xx) \
bogdanm 0:9b334a45a8ff 158 || defined (STM32L081xx) || defined (STM32L082xx) || defined (STM32L083xx)
bogdanm 0:9b334a45a8ff 159
bogdanm 0:9b334a45a8ff 160 /**
bogdanm 0:9b334a45a8ff 161 * @brief Configures the remapping of the TIM2, TIM3, TIM21 and TIM22 inputs.
bogdanm 0:9b334a45a8ff 162 * The channel inputs (T1..T4) and the Trigger input (ETR) of the
bogdanm 0:9b334a45a8ff 163 * timers can be remaped thanks to this function. When an input is
bogdanm 0:9b334a45a8ff 164 * mapped, on a GPIO, refer yourself to the GPIO alternate functions
bogdanm 0:9b334a45a8ff 165 * for more details.
bogdanm 0:9b334a45a8ff 166 * @note It is not possible to connect TIM2 and TIM21 on
bogdanm 0:9b334a45a8ff 167 * GPIOB5_AF4 at the same time.
bogdanm 0:9b334a45a8ff 168 * When selecting TIM3_TI2_GPIOB5_AF4, Channel2 of TIM3 will be
bogdanm 0:9b334a45a8ff 169 * connected to GPIOB5_AF4 and Channel2 of TIM22 will be connected to
bogdanm 0:9b334a45a8ff 170 * some other GPIOs. (refer to alternate functions for more details)
bogdanm 0:9b334a45a8ff 171 * When selecting TIM3_TI2_GPIO_DEF, Channel2 of Timer 3 will be
bogdanm 0:9b334a45a8ff 172 * connected an GPIO (other than GPIOB5_AF4) and Channel2 of TIM22
bogdanm 0:9b334a45a8ff 173 * will be connected to GPIOB5_AF4.
bogdanm 0:9b334a45a8ff 174 *
bogdanm 0:9b334a45a8ff 175 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 176 * the configuration information for TIM module.
bogdanm 0:9b334a45a8ff 177 * @param Remap: specifies the TIM input remapping source.
bogdanm 0:9b334a45a8ff 178 * This parameter is a combination of the following values
bogdanm 0:9b334a45a8ff 179 * depending on TIM instance:
bogdanm 0:9b334a45a8ff 180 *
bogdanm 0:9b334a45a8ff 181 * For TIM2, the parameter can have the following values:
bogdanm 0:9b334a45a8ff 182 * @arg TIM2_ETR_GPIO: TIM2 ETR connected to GPIO (default):
bogdanm 0:9b334a45a8ff 183 * GPIOA(0)_AF5 or GPIOA(5)_AF2 or
bogdanm 0:9b334a45a8ff 184 * GPIOA(15)_AF2 or GPIOE(9)_AF2
bogdanm 0:9b334a45a8ff 185 * @arg TIM2_ETR_HSI48: TIM2 ETR connected to HSI48
bogdanm 0:9b334a45a8ff 186 * @arg TIM2_ETR_LSE: TIM2 ETR connected to LSE
bogdanm 0:9b334a45a8ff 187 * @arg TIM2_ETR_COMP2_OUT: TIM2 ETR connected to COMP2 output
bogdanm 0:9b334a45a8ff 188 * @arg TIM2_ETR_COMP1_OUT: TIM2 ETR connected to COMP1 output
bogdanm 0:9b334a45a8ff 189 * @arg TIM2_TI4_GPIO : TIM2 TI4 connected to GPIO1(default):
bogdanm 0:9b334a45a8ff 190 * GPIOA(3)_AF2 or GPIOB(11)_AF2 or
bogdanm 0:9b334a45a8ff 191 * GPIOE(12)_AF0
bogdanm 0:9b334a45a8ff 192 * @arg TIM2_TI4_COMP1: TIM2 TI4 connected to COMP1
bogdanm 0:9b334a45a8ff 193 * @arg TIM2_TI4_COMP2: TIM2 TI4 connected to COMP2
bogdanm 0:9b334a45a8ff 194 *
bogdanm 0:9b334a45a8ff 195 * For TIM3, the parameter can have the following values:
bogdanm 0:9b334a45a8ff 196 * @arg TIM3_ETR_GPIO: TIM3 ETR connected to GPIO (default):
bogdanm 0:9b334a45a8ff 197 * GPIOE(2)_AF2 or GPIOD(2)_AF2 or
bogdanm 0:9b334a45a8ff 198 * GPIOE(2)AF2
bogdanm 0:9b334a45a8ff 199 * @arg TIM3_ETR_HSI: TIM3 ETR connected to HSI
bogdanm 0:9b334a45a8ff 200 * @arg TIM3_TI1_USB_SOF: TIM3 TI1 connected to USB_SOF (default)
bogdanm 0:9b334a45a8ff 201 * @arg TIM3_TI1_GPIO: TIM3 TI1 connected to GPIO :
bogdanm 0:9b334a45a8ff 202 * GPIOE(3)_AF2 or GPIOA(6)_AF2 or
bogdanm 0:9b334a45a8ff 203 * GPIOC(6)_AF2 or GPIOB(4)_AF2
bogdanm 0:9b334a45a8ff 204 * @arg TIM3_TI2_GPIOB5_AF4:TIM3 TI3 connected to GPIOB(5)_AF4
bogdanm 0:9b334a45a8ff 205 * (refer to note)
bogdanm 0:9b334a45a8ff 206 * @arg TIM3_TI2_GPIO_DEF: TIM3 TI3 connected to GPIO (default):
bogdanm 0:9b334a45a8ff 207 * GPIO_A(7)_AF2 or GPIO_B(5)_AF4 or
bogdanm 0:9b334a45a8ff 208 * GPIOC(7)_AF2 or GPIOE(7)_AF2
bogdanm 0:9b334a45a8ff 209 * @arg TIM3_TI4_GPIO_DEF: TIM3 TI4 connected to GPIO:
bogdanm 0:9b334a45a8ff 210 * GPIO_B(1)_AF2 or GPIO_E(6)_AF2
bogdanm 0:9b334a45a8ff 211 * @arg TIM3_TI4_GPIOC9_AF2:TIM3 TI4 connected to GPIOC(9)_AF2
bogdanm 0:9b334a45a8ff 212 *
bogdanm 0:9b334a45a8ff 213 * For TIM21, the parameter can have the following values:
bogdanm 0:9b334a45a8ff 214 * @arg TIM21_ETR_GPIO: TIM21 ETR connected to GPIO(default) :
bogdanm 0:9b334a45a8ff 215 * APB2_PC(9)_AF0 or APB2_PA(1)_AF5
bogdanm 0:9b334a45a8ff 216 * @arg TIM21_ETR_COMP2_OUT:TIM21 ETR connected to COMP2 output
bogdanm 0:9b334a45a8ff 217 * @arg TIM21_ETR_COMP1_OUT:TIM21 ETR connected to COMP1 output
bogdanm 0:9b334a45a8ff 218 * @arg TIM21_ETR_LSE: TIM21 ETR connected to LSE
bogdanm 0:9b334a45a8ff 219 * @arg TIM21_TI1_MCO: TIM21 TI1 connected to MCO
bogdanm 0:9b334a45a8ff 220 * @arg TIM21_TI1_RTC_WKUT_IT: TIM21 TI1 connected to RTC WAKEUP interrupt
bogdanm 0:9b334a45a8ff 221 * @arg TIM21_TI1_HSE_RTC: TIM21 TI1 connected to HSE_RTC
bogdanm 0:9b334a45a8ff 222 * @arg TIM21_TI1_MSI: TIM21 TI1 connected to MSI clock
bogdanm 0:9b334a45a8ff 223 * @arg TIM21_TI1_LSE: TIM21 TI1 connected to LSE
bogdanm 0:9b334a45a8ff 224 * @arg TIM21_TI1_LSI: TIM21 TI1 connected to LSI
bogdanm 0:9b334a45a8ff 225 * @arg TIM21_TI1_COMP1_OUT:TIM21 TI1 connected to COMP1_OUT
bogdanm 0:9b334a45a8ff 226 * @arg TIM21_TI1_GPIO: TIM21 TI1 connected to GPIO(default):
bogdanm 0:9b334a45a8ff 227 * GPIOA(2)_AF0 or GPIOB(13)_AF6 or
bogdanm 0:9b334a45a8ff 228 * GPIOE(5)_AF0 or GPIOD(0)_AF0
bogdanm 0:9b334a45a8ff 229 * @arg TIM21_TI2_GPIO: TIM21 TI2 connected to GPIO(default):
bogdanm 0:9b334a45a8ff 230 * GPIOA(3)_AF0 or GPIOB(14)_AF6 or
bogdanm 0:9b334a45a8ff 231 * GPIOE(6)_AF0 or GPIOD(7)_AF1
bogdanm 0:9b334a45a8ff 232 * @arg TIM21_TI2_COMP2_OUT:TIM21 TI2 connected to COMP2 output
bogdanm 0:9b334a45a8ff 233 *
bogdanm 0:9b334a45a8ff 234 * For TIM22, the parameter can have the following values:
bogdanm 0:9b334a45a8ff 235 * @arg TIM22_ETR_LSE: TIM22 ETR connected to LSE
bogdanm 0:9b334a45a8ff 236 * @arg TIM22_ETR_COMP2_OUT:TIM22 ETR connected to COMP2 output
bogdanm 0:9b334a45a8ff 237 * @arg TIM22_ETR_COMP1_OUT:TIM22 ETR connected to COMP1 output
bogdanm 0:9b334a45a8ff 238 * @arg TIM22_ETR_GPIO: TIM22 ETR connected to GPIO(default):
bogdanm 0:9b334a45a8ff 239 * GPIOC(8)_AF0 or GPIOA(4)_AF5
bogdanm 0:9b334a45a8ff 240 * @arg TIM22_TI1_GPIO1: TIM22 TI1 connected to GPIO(default):
bogdanm 0:9b334a45a8ff 241 * GPIOC(6)_AF0 or GPIOA(6)_AF5 or
bogdanm 0:9b334a45a8ff 242 * GPIOB(4)_AF4 or GPIOE(0)_AF3
bogdanm 0:9b334a45a8ff 243 * @arg TIM22_TI1_COMP2_OUT:TIM22 TI1 connected to COMP2 output
bogdanm 0:9b334a45a8ff 244 * @arg TIM22_TI1_COMP1_OUT:TIM22 TI1 connected to COMP1 output
bogdanm 0:9b334a45a8ff 245 * @arg TIM22_TI1_GPIO2: TIM22 TI1 connected to GPIO:
bogdanm 0:9b334a45a8ff 246 * GPIOC(6)_AF0 or GPIOA(6)_AF5 or
bogdanm 0:9b334a45a8ff 247 * GPIOB(4)_AF4 or GPIOE(3)_AF0
bogdanm 0:9b334a45a8ff 248 *
bogdanm 0:9b334a45a8ff 249 * @retval HAL status
bogdanm 0:9b334a45a8ff 250 */
bogdanm 0:9b334a45a8ff 251 #else
bogdanm 0:9b334a45a8ff 252 /**
bogdanm 0:9b334a45a8ff 253 * @brief Configures the remapping of the TIM2, TIM21 and TIM22 inputs.
bogdanm 0:9b334a45a8ff 254 * The channel inputs (T1..T4) and the Trigger input (ETR) of the
bogdanm 0:9b334a45a8ff 255 * timers can be remaped thanks to this function. When an input is
bogdanm 0:9b334a45a8ff 256 * mapped, on a GPIO, refer yourself to the GPIO alternate functions
bogdanm 0:9b334a45a8ff 257 * for more details.
bogdanm 0:9b334a45a8ff 258 *
bogdanm 0:9b334a45a8ff 259 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 260 * the configuration information for TIM module.
bogdanm 0:9b334a45a8ff 261 * @param Remap: specifies the TIM input remapping source.
bogdanm 0:9b334a45a8ff 262 * This parameter is a combination of the following values
bogdanm 0:9b334a45a8ff 263 * depending on TIM instance:
bogdanm 0:9b334a45a8ff 264 *
bogdanm 0:9b334a45a8ff 265 * For TIM2, the parameter can have the following values:
bogdanm 0:9b334a45a8ff 266 * @arg TIM2_ETR_GPIO: TIM2 ETR connected to GPIO (default):
bogdanm 0:9b334a45a8ff 267 * GPIOA(0)_AF5 or GPIOA(5)_AF2 or
bogdanm 0:9b334a45a8ff 268 * GPIOA(15)_AF2 or GPIOE(9)_AF2
bogdanm 0:9b334a45a8ff 269 * @arg TIM2_ETR_HSI48: TIM2 ETR connected to HSI48
bogdanm 0:9b334a45a8ff 270 * @arg TIM2_ETR_LSE: TIM2 ETR connected to LSE
bogdanm 0:9b334a45a8ff 271 * @arg TIM2_ETR_COMP2_OUT: TIM2 ETR connected to COMP2 output
bogdanm 0:9b334a45a8ff 272 * @arg TIM2_ETR_COMP1_OUT: TIM2 ETR connected to COMP1 output
bogdanm 0:9b334a45a8ff 273 * @arg TIM2_TI4_GPIO: TIM2 TI4 connected to GPIO1(default):
bogdanm 0:9b334a45a8ff 274 * GPIOA(3)_AF2 or GPIOB(11)_AF2 or
bogdanm 0:9b334a45a8ff 275 * GPIOE(12)_AF0
bogdanm 0:9b334a45a8ff 276 * @arg TIM2_TI4_COMP1: TIM2 TI4 connected to COMP1
bogdanm 0:9b334a45a8ff 277 * @arg TIM2_TI4_COMP2: TIM2 TI4 connected to COMP2
bogdanm 0:9b334a45a8ff 278 * @arg TIM2_TI4_GPIO2: TIM2 TI4 connected to GPIO2 :
bogdanm 0:9b334a45a8ff 279 * GPIOA(3)_AF2 or GPIOB(11)_AF2 or
bogdanm 0:9b334a45a8ff 280 * GPIOE(12)_AF0
bogdanm 0:9b334a45a8ff 281 *
bogdanm 0:9b334a45a8ff 282 * For TIM21, the parameter can have the following values:
bogdanm 0:9b334a45a8ff 283 * @arg TIM21_ETR_GPIO: TIM21 ETR connected to GPIO(default) :
bogdanm 0:9b334a45a8ff 284 * APB2_PC(9)_AF0 or APB2_PA(1)_AF5
bogdanm 0:9b334a45a8ff 285 * @arg TIM21_ETR_COMP2_OUT:TIM21 ETR connected to COMP2 output
bogdanm 0:9b334a45a8ff 286 * @arg TIM21_ETR_COMP1_OUT:TIM21 ETR connected to COMP1 output
bogdanm 0:9b334a45a8ff 287 * @arg TIM21_ETR_LSE: TIM21 ETR connected to LSE
bogdanm 0:9b334a45a8ff 288 * @arg TIM21_TI1_MCO: TIM21 TI1 connected to MCO
bogdanm 0:9b334a45a8ff 289 * @arg TIM21_TI1_RTC_WKUT_IT: TIM21 TI1 connected to RTC WAKEUP interrupt
bogdanm 0:9b334a45a8ff 290 * @arg TIM21_TI1_HSE_RTC: TIM21 TI1 connected to HSE_RTC
bogdanm 0:9b334a45a8ff 291 * @arg TIM21_TI1_MSI: TIM21 TI1 connected to MSI clock
bogdanm 0:9b334a45a8ff 292 * @arg TIM21_TI1_LSE: TIM21 TI1 connected to LSE
bogdanm 0:9b334a45a8ff 293 * @arg TIM21_TI1_LSI: TIM21 TI1 connected to LSI
bogdanm 0:9b334a45a8ff 294 * @arg TIM21_TI1_COMP1_OUT:TIM21 TI1 connected to COMP1_OUT
bogdanm 0:9b334a45a8ff 295 * @arg TIM21_TI1_GPIO: TIM21 TI1 connected to GPIO(default):
bogdanm 0:9b334a45a8ff 296 * GPIOA(2)_AF0 or GPIOB(13)_AF6 or
bogdanm 0:9b334a45a8ff 297 * GPIOE(5)_AF0 or GPIOD(0)_AF0
bogdanm 0:9b334a45a8ff 298 * @arg TIM21_TI2_GPIO: TIM21 TI2 connected to GPIO(default):
bogdanm 0:9b334a45a8ff 299 * GPIOA(3)_AF0 or GPIOB(14)_AF6 or
bogdanm 0:9b334a45a8ff 300 * GPIOE(6)_AF0 or GPIOD(7)_AF1
bogdanm 0:9b334a45a8ff 301 * @arg TIM21_TI2_COMP2_OUT:TIM21 TI2 connected to COMP2 output
bogdanm 0:9b334a45a8ff 302 *
bogdanm 0:9b334a45a8ff 303 * For TIM22, the parameter can have the following values:
bogdanm 0:9b334a45a8ff 304 * @arg TIM22_ETR_LSE: TIM22 ETR connected to LSE
bogdanm 0:9b334a45a8ff 305 * @arg TIM22_ETR_COMP2_OUT:TIM22 ETR connected to COMP2 output
bogdanm 0:9b334a45a8ff 306 * @arg TIM22_ETR_COMP1_OUT:TIM22 ETR connected to COMP1 output
bogdanm 0:9b334a45a8ff 307 * @arg TIM22_ETR_GPIO: TIM22 ETR connected to GPIO(default):
bogdanm 0:9b334a45a8ff 308 * GPIOC(8)_AF0 or GPIOA(4)_AF5
bogdanm 0:9b334a45a8ff 309 * @arg TIM22_TI1_GPIO1: TIM22 TI1 connected to GPIO(default):
bogdanm 0:9b334a45a8ff 310 * GPIOC(6)_AF0 or GPIOA(6)_AF5 or
bogdanm 0:9b334a45a8ff 311 * GPIOB(4)_AF4 or GPIOE(0)_AF3
bogdanm 0:9b334a45a8ff 312 * @arg TIM22_TI1_COMP2_OUT:TIM22 TI1 connected to COMP2 output
bogdanm 0:9b334a45a8ff 313 * @arg TIM22_TI1_COMP1_OUT:TIM22 TI1 connected to COMP1 output
bogdanm 0:9b334a45a8ff 314 * @arg TIM22_TI1_GPIO2: TIM22 TI1 connected to GPIO:
bogdanm 0:9b334a45a8ff 315 * GPIOC(6)_AF0 or GPIOA(6)_AF5 or
bogdanm 0:9b334a45a8ff 316 * GPIOB(4)_AF4 or GPIOE(3)_AF0
bogdanm 0:9b334a45a8ff 317 *
bogdanm 0:9b334a45a8ff 318 * @retval HAL status
bogdanm 0:9b334a45a8ff 319 */
bogdanm 0:9b334a45a8ff 320
bogdanm 0:9b334a45a8ff 321 #endif /* STM32L07xxx or STM32L08xxx */
bogdanm 0:9b334a45a8ff 322
bogdanm 0:9b334a45a8ff 323 HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap)
bogdanm 0:9b334a45a8ff 324 {
bogdanm 0:9b334a45a8ff 325
bogdanm 0:9b334a45a8ff 326 __HAL_LOCK(htim);
bogdanm 0:9b334a45a8ff 327
bogdanm 0:9b334a45a8ff 328 /* Check parameters */
bogdanm 0:9b334a45a8ff 329 assert_param(IS_TIM_REMAP(htim->Instance,Remap));
bogdanm 0:9b334a45a8ff 330
bogdanm 0:9b334a45a8ff 331 /* Set the Timer remapping configuration */
bogdanm 0:9b334a45a8ff 332 htim->Instance->OR = Remap;
bogdanm 0:9b334a45a8ff 333
bogdanm 0:9b334a45a8ff 334 htim->State = HAL_TIM_STATE_READY;
bogdanm 0:9b334a45a8ff 335
bogdanm 0:9b334a45a8ff 336 __HAL_UNLOCK(htim);
bogdanm 0:9b334a45a8ff 337
bogdanm 0:9b334a45a8ff 338 return HAL_OK;
bogdanm 0:9b334a45a8ff 339 }
bogdanm 0:9b334a45a8ff 340
bogdanm 0:9b334a45a8ff 341 /**
bogdanm 0:9b334a45a8ff 342 * @}
bogdanm 0:9b334a45a8ff 343 */
bogdanm 0:9b334a45a8ff 344
bogdanm 0:9b334a45a8ff 345 /**
bogdanm 0:9b334a45a8ff 346 * @}
bogdanm 0:9b334a45a8ff 347 */
bogdanm 0:9b334a45a8ff 348
bogdanm 0:9b334a45a8ff 349 #endif /* HAL_TIM_MODULE_ENABLED */
bogdanm 0:9b334a45a8ff 350 /**
bogdanm 0:9b334a45a8ff 351 * @}
bogdanm 0:9b334a45a8ff 352 */
bogdanm 0:9b334a45a8ff 353
bogdanm 0:9b334a45a8ff 354 /**
bogdanm 0:9b334a45a8ff 355 * @}
bogdanm 0:9b334a45a8ff 356 */
bogdanm 0:9b334a45a8ff 357 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/