en 129 / mbed-dev

fix LPC812 PWM

Dependents:   IR_LED_Send

Fork of mbed-dev by mbed official

targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_iwdg.h@0:9b334a45a8ff, 2015-10-01 (annotated)

Committer:
bogdanm
Date:
Thu Oct 01 15:25:22 2015 +0300
Revision:
0:9b334a45a8ff
Child:
113:b3775bf36a83
Initial commit on mbed-dev



Replaces mbed-src (now inactive)

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bogdanm 0:9b334a45a8ff 1 /**
bogdanm 0:9b334a45a8ff 2 ******************************************************************************
bogdanm 0:9b334a45a8ff 3 * @file stm32l0xx_hal_iwdg.h
bogdanm 0:9b334a45a8ff 4 * @author MCD Application Team
bogdanm 0:9b334a45a8ff 5 * @version V1.2.0
bogdanm 0:9b334a45a8ff 6 * @date 06-February-2015
bogdanm 0:9b334a45a8ff 7 * @brief Header file of IWDG HAL module.
bogdanm 0:9b334a45a8ff 8 ******************************************************************************
bogdanm 0:9b334a45a8ff 9 * @attention
bogdanm 0:9b334a45a8ff 10 *
bogdanm 0:9b334a45a8ff 11 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
bogdanm 0:9b334a45a8ff 12 *
bogdanm 0:9b334a45a8ff 13 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 0:9b334a45a8ff 14 * are permitted provided that the following conditions are met:
bogdanm 0:9b334a45a8ff 15 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 0:9b334a45a8ff 16 * this list of conditions and the following disclaimer.
bogdanm 0:9b334a45a8ff 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 0:9b334a45a8ff 18 * this list of conditions and the following disclaimer in the documentation
bogdanm 0:9b334a45a8ff 19 * and/or other materials provided with the distribution.
bogdanm 0:9b334a45a8ff 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 0:9b334a45a8ff 21 * may be used to endorse or promote products derived from this software
bogdanm 0:9b334a45a8ff 22 * without specific prior written permission.
bogdanm 0:9b334a45a8ff 23 *
bogdanm 0:9b334a45a8ff 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 0:9b334a45a8ff 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 0:9b334a45a8ff 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 0:9b334a45a8ff 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 0:9b334a45a8ff 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 0:9b334a45a8ff 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 0:9b334a45a8ff 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 0:9b334a45a8ff 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 0:9b334a45a8ff 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 0:9b334a45a8ff 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 0:9b334a45a8ff 34 *
bogdanm 0:9b334a45a8ff 35 ******************************************************************************
bogdanm 0:9b334a45a8ff 36 */
bogdanm 0:9b334a45a8ff 37
bogdanm 0:9b334a45a8ff 38 /* Define to prevent recursive inclusion -------------------------------------*/
bogdanm 0:9b334a45a8ff 39 #ifndef __STM32L0xx_HAL_IWDG_H
bogdanm 0:9b334a45a8ff 40 #define __STM32L0xx_HAL_IWDG_H
bogdanm 0:9b334a45a8ff 41
bogdanm 0:9b334a45a8ff 42 #ifdef __cplusplus
bogdanm 0:9b334a45a8ff 43 extern "C" {
bogdanm 0:9b334a45a8ff 44 #endif
bogdanm 0:9b334a45a8ff 45
bogdanm 0:9b334a45a8ff 46 /* Includes ------------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 47 #include "stm32l0xx_hal_def.h"
bogdanm 0:9b334a45a8ff 48
bogdanm 0:9b334a45a8ff 49 /** @addtogroup STM32L0xx_HAL_Driver
bogdanm 0:9b334a45a8ff 50 * @{
bogdanm 0:9b334a45a8ff 51 */
bogdanm 0:9b334a45a8ff 52
bogdanm 0:9b334a45a8ff 53 /** @defgroup IWDG
bogdanm 0:9b334a45a8ff 54 * @{
bogdanm 0:9b334a45a8ff 55 */
bogdanm 0:9b334a45a8ff 56
bogdanm 0:9b334a45a8ff 57 /* Exported types ------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 58
bogdanm 0:9b334a45a8ff 59 /** @defgroup IWDG_Exported_Types IWDG Exported Types
bogdanm 0:9b334a45a8ff 60 * @{
bogdanm 0:9b334a45a8ff 61 */
bogdanm 0:9b334a45a8ff 62
bogdanm 0:9b334a45a8ff 63 /** @defgroup IWDG_State IWDG state definition
bogdanm 0:9b334a45a8ff 64 * @{
bogdanm 0:9b334a45a8ff 65 */
bogdanm 0:9b334a45a8ff 66 /**
bogdanm 0:9b334a45a8ff 67 * @brief IWDG HAL State Structure definition
bogdanm 0:9b334a45a8ff 68 */
bogdanm 0:9b334a45a8ff 69 typedef enum
bogdanm 0:9b334a45a8ff 70 {
bogdanm 0:9b334a45a8ff 71 HAL_IWDG_STATE_RESET = 0x00, /*!< IWDG not yet initialized or disabled */
bogdanm 0:9b334a45a8ff 72 HAL_IWDG_STATE_READY = 0x01, /*!< IWDG initialized and ready for use */
bogdanm 0:9b334a45a8ff 73 HAL_IWDG_STATE_BUSY = 0x02, /*!< IWDG internal process is ongoing */
bogdanm 0:9b334a45a8ff 74 HAL_IWDG_STATE_TIMEOUT = 0x03, /*!< IWDG timeout state */
bogdanm 0:9b334a45a8ff 75 HAL_IWDG_STATE_ERROR = 0x04 /*!< IWDG error state */
bogdanm 0:9b334a45a8ff 76
bogdanm 0:9b334a45a8ff 77 }HAL_IWDG_StateTypeDef;
bogdanm 0:9b334a45a8ff 78 /**
bogdanm 0:9b334a45a8ff 79 * @}
bogdanm 0:9b334a45a8ff 80 */
bogdanm 0:9b334a45a8ff 81 /** @defgroup IWDG_Init IWDG init configuration structure
bogdanm 0:9b334a45a8ff 82 * @{
bogdanm 0:9b334a45a8ff 83 */
bogdanm 0:9b334a45a8ff 84 /**
bogdanm 0:9b334a45a8ff 85 * @brief IWDG Init structure definition
bogdanm 0:9b334a45a8ff 86 */
bogdanm 0:9b334a45a8ff 87 typedef struct
bogdanm 0:9b334a45a8ff 88 {
bogdanm 0:9b334a45a8ff 89 uint32_t Prescaler; /*!< Select the prescaler of the IWDG.
bogdanm 0:9b334a45a8ff 90 This parameter can be a value of @ref IWDG_Prescaler */
bogdanm 0:9b334a45a8ff 91
bogdanm 0:9b334a45a8ff 92 uint32_t Reload; /*!< Specifies the IWDG down-counter reload value.
bogdanm 0:9b334a45a8ff 93 This parameter must be a number between Min_Data = 0 and Max_Data = 0x0FFF */
bogdanm 0:9b334a45a8ff 94
bogdanm 0:9b334a45a8ff 95 uint32_t Window; /*!< Specifies the window value to be compared to the down-counter.
bogdanm 0:9b334a45a8ff 96 This parameter must be a number between Min_Data = 0 and Max_Data = 0x0FFF */
bogdanm 0:9b334a45a8ff 97
bogdanm 0:9b334a45a8ff 98 } IWDG_InitTypeDef;
bogdanm 0:9b334a45a8ff 99 /**
bogdanm 0:9b334a45a8ff 100 * @}
bogdanm 0:9b334a45a8ff 101 */
bogdanm 0:9b334a45a8ff 102
bogdanm 0:9b334a45a8ff 103 /** @defgroup IWDG_handle IWDG handler
bogdanm 0:9b334a45a8ff 104 * @{
bogdanm 0:9b334a45a8ff 105 */
bogdanm 0:9b334a45a8ff 106 /**
bogdanm 0:9b334a45a8ff 107 * @brief IWDG Handle Structure definition
bogdanm 0:9b334a45a8ff 108 */
bogdanm 0:9b334a45a8ff 109 typedef struct
bogdanm 0:9b334a45a8ff 110 {
bogdanm 0:9b334a45a8ff 111 IWDG_TypeDef *Instance; /*!< Register base address */
bogdanm 0:9b334a45a8ff 112
bogdanm 0:9b334a45a8ff 113 IWDG_InitTypeDef Init; /*!< IWDG required parameters */
bogdanm 0:9b334a45a8ff 114
bogdanm 0:9b334a45a8ff 115 HAL_LockTypeDef Lock; /*!< IWDG Locking object */
bogdanm 0:9b334a45a8ff 116
bogdanm 0:9b334a45a8ff 117 __IO HAL_IWDG_StateTypeDef State; /*!< IWDG communication state */
bogdanm 0:9b334a45a8ff 118
bogdanm 0:9b334a45a8ff 119 }IWDG_HandleTypeDef;
bogdanm 0:9b334a45a8ff 120
bogdanm 0:9b334a45a8ff 121 /**
bogdanm 0:9b334a45a8ff 122 * @}
bogdanm 0:9b334a45a8ff 123 */
bogdanm 0:9b334a45a8ff 124
bogdanm 0:9b334a45a8ff 125 /**
bogdanm 0:9b334a45a8ff 126 * @}
bogdanm 0:9b334a45a8ff 127 */
bogdanm 0:9b334a45a8ff 128
bogdanm 0:9b334a45a8ff 129 /* Exported constants --------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 130
bogdanm 0:9b334a45a8ff 131 /** @defgroup IWDG_Exported_Constants IWDG Exported Constants
bogdanm 0:9b334a45a8ff 132 * @{
bogdanm 0:9b334a45a8ff 133 */
bogdanm 0:9b334a45a8ff 134
bogdanm 0:9b334a45a8ff 135 /** @defgroup IWDG_Registers_Key IWDG key
bogdanm 0:9b334a45a8ff 136 * @brief IWDG registers bit mask
bogdanm 0:9b334a45a8ff 137 * @{
bogdanm 0:9b334a45a8ff 138 */
bogdanm 0:9b334a45a8ff 139 /* --- KR Register ---*/
bogdanm 0:9b334a45a8ff 140 /* KR register bit mask */
bogdanm 0:9b334a45a8ff 141 #define IWDG_KEY_RELOAD ((uint32_t)0xAAAA) /*!< IWDG Reload Counter Enable */
bogdanm 0:9b334a45a8ff 142 #define IWDG_KEY_ENABLE ((uint32_t)0xCCCC) /*!< IWDG Peripheral Enable */
bogdanm 0:9b334a45a8ff 143 #define IWDG_KEY_WRITE_ACCESS_ENABLE ((uint32_t)0x5555) /*!< IWDG KR Write Access Enable */
bogdanm 0:9b334a45a8ff 144 #define IWDG_KEY_WRITE_ACCESS_DISABLE ((uint32_t)0x0000) /*!< IWDG KR Write Access Disable */
bogdanm 0:9b334a45a8ff 145 /**
bogdanm 0:9b334a45a8ff 146 * @}
bogdanm 0:9b334a45a8ff 147 */
bogdanm 0:9b334a45a8ff 148
bogdanm 0:9b334a45a8ff 149 #define IS_IWDG_KR(__KR__) (((__KR__) == IWDG_KEY_RELOAD) || \
bogdanm 0:9b334a45a8ff 150 ((__KR__) == IWDG_KEY_ENABLE))|| \
bogdanm 0:9b334a45a8ff 151 ((__KR__) == IWDG_KEY_WRITE_ACCESS_ENABLE)) || \
bogdanm 0:9b334a45a8ff 152 ((__KR__) == IWDG_KEY_WRITE_ACCESS_DISABLE))
bogdanm 0:9b334a45a8ff 153
bogdanm 0:9b334a45a8ff 154
bogdanm 0:9b334a45a8ff 155 /** @defgroup IWDG_Flag_definition IWDG Flag definition
bogdanm 0:9b334a45a8ff 156 * @{
bogdanm 0:9b334a45a8ff 157 */
bogdanm 0:9b334a45a8ff 158 #define IWDG_FLAG_PVU ((uint32_t)IWDG_SR_PVU) /*!< Watchdog counter prescaler value update flag */
bogdanm 0:9b334a45a8ff 159 #define IWDG_FLAG_RVU ((uint32_t)IWDG_SR_RVU) /*!< Watchdog counter reload value update flag */
bogdanm 0:9b334a45a8ff 160 #define IWDG_FLAG_WVU ((uint32_t)IWDG_SR_WVU) /*!< Watchdog counter window value update Flag */
bogdanm 0:9b334a45a8ff 161 /**
bogdanm 0:9b334a45a8ff 162 * @}
bogdanm 0:9b334a45a8ff 163 */
bogdanm 0:9b334a45a8ff 164 #define IS_IWDG_FLAG(__FLAG__) (((__FLAG__) == IWDG_FLAG_PVU) || \
bogdanm 0:9b334a45a8ff 165 ((__FLAG__) == IWDG_FLAG_RVU) || \
bogdanm 0:9b334a45a8ff 166 ((__FLAG__) == IWDG_FLAG_WVU))
bogdanm 0:9b334a45a8ff 167
bogdanm 0:9b334a45a8ff 168
bogdanm 0:9b334a45a8ff 169 /** @defgroup IWDG_Prescaler IWDG Prescaler
bogdanm 0:9b334a45a8ff 170 * @{
bogdanm 0:9b334a45a8ff 171 */
bogdanm 0:9b334a45a8ff 172 #define IWDG_PRESCALER_4 ((uint8_t)0x00) /*!< IWDG prescaler set to 4 */
bogdanm 0:9b334a45a8ff 173 #define IWDG_PRESCALER_8 ((uint8_t)(IWDG_PR_PR_0)) /*!< IWDG prescaler set to 8 */
bogdanm 0:9b334a45a8ff 174 #define IWDG_PRESCALER_16 ((uint8_t)(IWDG_PR_PR_1)) /*!< IWDG prescaler set to 16 */
bogdanm 0:9b334a45a8ff 175 #define IWDG_PRESCALER_32 ((uint8_t)(IWDG_PR_PR_1 | IWDG_PR_PR_0)) /*!< IWDG prescaler set to 32 */
bogdanm 0:9b334a45a8ff 176 #define IWDG_PRESCALER_64 ((uint8_t)(IWDG_PR_PR_2)) /*!< IWDG prescaler set to 64 */
bogdanm 0:9b334a45a8ff 177 #define IWDG_PRESCALER_128 ((uint8_t)(IWDG_PR_PR_2 | IWDG_PR_PR_0)) /*!< IWDG prescaler set to 128 */
bogdanm 0:9b334a45a8ff 178 #define IWDG_PRESCALER_256 ((uint8_t)(IWDG_PR_PR_2 | IWDG_PR_PR_1)) /*!< IWDG prescaler set to 256 */
bogdanm 0:9b334a45a8ff 179 /**
bogdanm 0:9b334a45a8ff 180 * @}
bogdanm 0:9b334a45a8ff 181 */
bogdanm 0:9b334a45a8ff 182 #define IS_IWDG_PRESCALER(__PRESCALER__) (((__PRESCALER__) == IWDG_PRESCALER_4) || \
bogdanm 0:9b334a45a8ff 183 ((__PRESCALER__) == IWDG_PRESCALER_8) || \
bogdanm 0:9b334a45a8ff 184 ((__PRESCALER__) == IWDG_PRESCALER_16) || \
bogdanm 0:9b334a45a8ff 185 ((__PRESCALER__) == IWDG_PRESCALER_32) || \
bogdanm 0:9b334a45a8ff 186 ((__PRESCALER__) == IWDG_PRESCALER_64) || \
bogdanm 0:9b334a45a8ff 187 ((__PRESCALER__) == IWDG_PRESCALER_128)|| \
bogdanm 0:9b334a45a8ff 188 ((__PRESCALER__) == IWDG_PRESCALER_256))
bogdanm 0:9b334a45a8ff 189
bogdanm 0:9b334a45a8ff 190 /* Check for reload value */
bogdanm 0:9b334a45a8ff 191 #define IS_IWDG_RELOAD(__RELOAD__) ((__RELOAD__) <= 0xFFF)
bogdanm 0:9b334a45a8ff 192
bogdanm 0:9b334a45a8ff 193 /* Check for window value */
bogdanm 0:9b334a45a8ff 194 #define IS_IWDG_WINDOW(__VALUE__) ((__VALUE__) <= 0xFFF)
bogdanm 0:9b334a45a8ff 195
bogdanm 0:9b334a45a8ff 196
bogdanm 0:9b334a45a8ff 197 /** @defgroup IWDG_Disable IWDG Disable
bogdanm 0:9b334a45a8ff 198 * @{
bogdanm 0:9b334a45a8ff 199 */
bogdanm 0:9b334a45a8ff 200 #define IWDG_WINDOW_DISABLE 0xFFF
bogdanm 0:9b334a45a8ff 201 /**
bogdanm 0:9b334a45a8ff 202 * @}
bogdanm 0:9b334a45a8ff 203 */
bogdanm 0:9b334a45a8ff 204
bogdanm 0:9b334a45a8ff 205 /**
bogdanm 0:9b334a45a8ff 206 * @}
bogdanm 0:9b334a45a8ff 207 */
bogdanm 0:9b334a45a8ff 208 /* Exported macro ------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 209 /** @defgroup IWDG_Exported_Macro IWDG Exported Macro
bogdanm 0:9b334a45a8ff 210 * @{
bogdanm 0:9b334a45a8ff 211 */
bogdanm 0:9b334a45a8ff 212
bogdanm 0:9b334a45a8ff 213 /** @brief Reset IWDG handle state
bogdanm 0:9b334a45a8ff 214 * @param __HANDLE__ : IWDG handle
bogdanm 0:9b334a45a8ff 215 * @retval None
bogdanm 0:9b334a45a8ff 216 */
bogdanm 0:9b334a45a8ff 217 #define __HAL_IWDG_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_IWDG_STATE_RESET)
bogdanm 0:9b334a45a8ff 218
bogdanm 0:9b334a45a8ff 219 /**
bogdanm 0:9b334a45a8ff 220 * @brief Enables the IWDG peripheral.
bogdanm 0:9b334a45a8ff 221 * @param __HANDLE__ : IWDG handle
bogdanm 0:9b334a45a8ff 222 * @retval None
bogdanm 0:9b334a45a8ff 223 */
bogdanm 0:9b334a45a8ff 224 #define __HAL_IWDG_START(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_ENABLE)
bogdanm 0:9b334a45a8ff 225
bogdanm 0:9b334a45a8ff 226 /**
bogdanm 0:9b334a45a8ff 227 * @brief Reloads IWDG counter with value defined in the reload register
bogdanm 0:9b334a45a8ff 228 * (write access to IWDG_PR and IWDG_RLR registers disabled).
bogdanm 0:9b334a45a8ff 229 * @param __HANDLE__ : IWDG handle
bogdanm 0:9b334a45a8ff 230 * @retval None
bogdanm 0:9b334a45a8ff 231 */
bogdanm 0:9b334a45a8ff 232 #define __HAL_IWDG_RELOAD_COUNTER(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_RELOAD)
bogdanm 0:9b334a45a8ff 233
bogdanm 0:9b334a45a8ff 234 /**
bogdanm 0:9b334a45a8ff 235 * @brief Enables write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers.
bogdanm 0:9b334a45a8ff 236 * @param __HANDLE__ : IWDG handle
bogdanm 0:9b334a45a8ff 237 * @retval None
bogdanm 0:9b334a45a8ff 238 */
bogdanm 0:9b334a45a8ff 239 #define IWDG_ENABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_ENABLE)
bogdanm 0:9b334a45a8ff 240
bogdanm 0:9b334a45a8ff 241 /**
bogdanm 0:9b334a45a8ff 242 * @brief Disables write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers.
bogdanm 0:9b334a45a8ff 243 * @param __HANDLE__ : IWDG handle
bogdanm 0:9b334a45a8ff 244 * @retval None
bogdanm 0:9b334a45a8ff 245 */
bogdanm 0:9b334a45a8ff 246 #define IWDG_DISABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_DISABLE)
bogdanm 0:9b334a45a8ff 247
bogdanm 0:9b334a45a8ff 248 /**
bogdanm 0:9b334a45a8ff 249 * @brief Gets the selected IWDG's flag status.
bogdanm 0:9b334a45a8ff 250 * @param __HANDLE__ : IWDG handle
bogdanm 0:9b334a45a8ff 251 * @param __FLAG__ : specifies the flag to check.
bogdanm 0:9b334a45a8ff 252 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 253 * @arg IWDG_FLAG_PVU: Watchdog counter reload value update flag
bogdanm 0:9b334a45a8ff 254 * @arg IWDG_FLAG_RVU: Watchdog counter prescaler value flag
bogdanm 0:9b334a45a8ff 255 * @arg IWDG_FLAG_WVU: Watchdog counter window value flag
bogdanm 0:9b334a45a8ff 256 * @retval The new state of __FLAG__ (TRUE or FALSE) .
bogdanm 0:9b334a45a8ff 257 */
bogdanm 0:9b334a45a8ff 258 #define __HAL_IWDG_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__))
bogdanm 0:9b334a45a8ff 259
bogdanm 0:9b334a45a8ff 260 /**
bogdanm 0:9b334a45a8ff 261 * @}
bogdanm 0:9b334a45a8ff 262 */
bogdanm 0:9b334a45a8ff 263
bogdanm 0:9b334a45a8ff 264 /* Exported functions --------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 265 /** @defgroup IWDG_Exported_Functions
bogdanm 0:9b334a45a8ff 266 * @{
bogdanm 0:9b334a45a8ff 267 */
bogdanm 0:9b334a45a8ff 268
bogdanm 0:9b334a45a8ff 269 /** @defgroup IWDG_Exported_Functions_Group1 Initialization/de-initialization functions
bogdanm 0:9b334a45a8ff 270 * @{
bogdanm 0:9b334a45a8ff 271 */
bogdanm 0:9b334a45a8ff 272 HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg);
bogdanm 0:9b334a45a8ff 273 void HAL_IWDG_MspInit(IWDG_HandleTypeDef *hiwdg);
bogdanm 0:9b334a45a8ff 274 /**
bogdanm 0:9b334a45a8ff 275 * @}
bogdanm 0:9b334a45a8ff 276 */
bogdanm 0:9b334a45a8ff 277
bogdanm 0:9b334a45a8ff 278 /** @defgroup IWDG_Exported_Functions_Group2 I/O operation functions
bogdanm 0:9b334a45a8ff 279 * @{
bogdanm 0:9b334a45a8ff 280 */
bogdanm 0:9b334a45a8ff 281 HAL_StatusTypeDef HAL_IWDG_Start(IWDG_HandleTypeDef *hiwdg);
bogdanm 0:9b334a45a8ff 282 HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg);
bogdanm 0:9b334a45a8ff 283 /**
bogdanm 0:9b334a45a8ff 284 * @}
bogdanm 0:9b334a45a8ff 285 */
bogdanm 0:9b334a45a8ff 286
bogdanm 0:9b334a45a8ff 287 /** @defgroup IWDG_Exported_Functions_Group3 Peripheral State functions
bogdanm 0:9b334a45a8ff 288 * @{
bogdanm 0:9b334a45a8ff 289 */
bogdanm 0:9b334a45a8ff 290 HAL_IWDG_StateTypeDef HAL_IWDG_GetState(IWDG_HandleTypeDef *hiwdg);
bogdanm 0:9b334a45a8ff 291 /**
bogdanm 0:9b334a45a8ff 292 * @}
bogdanm 0:9b334a45a8ff 293 */
bogdanm 0:9b334a45a8ff 294
bogdanm 0:9b334a45a8ff 295 /**
bogdanm 0:9b334a45a8ff 296 * @}
bogdanm 0:9b334a45a8ff 297 */
bogdanm 0:9b334a45a8ff 298
bogdanm 0:9b334a45a8ff 299 /**
bogdanm 0:9b334a45a8ff 300 * @}
bogdanm 0:9b334a45a8ff 301 */
bogdanm 0:9b334a45a8ff 302
bogdanm 0:9b334a45a8ff 303 /**
bogdanm 0:9b334a45a8ff 304 * @}
bogdanm 0:9b334a45a8ff 305 */
bogdanm 0:9b334a45a8ff 306
bogdanm 0:9b334a45a8ff 307 #ifdef __cplusplus
bogdanm 0:9b334a45a8ff 308 }
bogdanm 0:9b334a45a8ff 309 #endif
bogdanm 0:9b334a45a8ff 310
bogdanm 0:9b334a45a8ff 311 #endif /* __STM32L0xx_HAL_IWDG_H */
bogdanm 0:9b334a45a8ff 312
bogdanm 0:9b334a45a8ff 313 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
bogdanm 0:9b334a45a8ff 314