en 129
fix LPC812 PWM
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mbed official
targets/cmsis/TARGET_STM/TARGET_STM32F7/stm32f7xx_hal_spdifrx.c@0:9b334a45a8ff, 2015-10-01 (annotated)
- Committer:
- bogdanm
- Date:
- Thu Oct 01 15:25:22 2015 +0300
- Revision:
- 0:9b334a45a8ff
- Child:
- 83:a036322b8637
Initial commit on mbed-dev
Replaces mbed-src (now inactive)
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| bogdanm | 0:9b334a45a8ff | 1 | /** |
| bogdanm | 0:9b334a45a8ff | 2 | ****************************************************************************** |
| bogdanm | 0:9b334a45a8ff | 3 | * @file stm32f7xx_hal_spdifrx.c |
| bogdanm | 0:9b334a45a8ff | 4 | * @author MCD Application Team |
| bogdanm | 0:9b334a45a8ff | 5 | * @version V1.0.1 |
| bogdanm | 0:9b334a45a8ff | 6 | * @date 25-June-2015 |
| bogdanm | 0:9b334a45a8ff | 7 | * @brief This file provides firmware functions to manage the following |
| bogdanm | 0:9b334a45a8ff | 8 | * functionalities of the SPDIFRX audio interface: |
| bogdanm | 0:9b334a45a8ff | 9 | * + Initialization and Configuration |
| bogdanm | 0:9b334a45a8ff | 10 | * + Data transfers functions |
| bogdanm | 0:9b334a45a8ff | 11 | * + DMA transfers management |
| bogdanm | 0:9b334a45a8ff | 12 | * + Interrupts and flags management |
| bogdanm | 0:9b334a45a8ff | 13 | @verbatim |
| bogdanm | 0:9b334a45a8ff | 14 | =============================================================================== |
| bogdanm | 0:9b334a45a8ff | 15 | ##### How to use this driver ##### |
| bogdanm | 0:9b334a45a8ff | 16 | =============================================================================== |
| bogdanm | 0:9b334a45a8ff | 17 | [..] |
| bogdanm | 0:9b334a45a8ff | 18 | The SPDIFRX HAL driver can be used as follow: |
| bogdanm | 0:9b334a45a8ff | 19 | |
| bogdanm | 0:9b334a45a8ff | 20 | (#) Declare SPDIFRX_HandleTypeDef handle structure. |
| bogdanm | 0:9b334a45a8ff | 21 | (#) Initialize the SPDIFRX low level resources by implement the HAL_SPDIFRX_MspInit() API: |
| bogdanm | 0:9b334a45a8ff | 22 | (##) Enable the SPDIFRX interface clock. |
| bogdanm | 0:9b334a45a8ff | 23 | (##) SPDIFRX pins configuration: |
| bogdanm | 0:9b334a45a8ff | 24 | (+++) Enable the clock for the SPDIFRX GPIOs. |
| bogdanm | 0:9b334a45a8ff | 25 | (+++) Configure these SPDIFRX pins as alternate function pull-up. |
| bogdanm | 0:9b334a45a8ff | 26 | (##) NVIC configuration if you need to use interrupt process (HAL_SPDIFRX_ReceiveControlFlow_IT() and HAL_SPDIFRX_ReceiveDataFlow_IT() API's). |
| bogdanm | 0:9b334a45a8ff | 27 | (+++) Configure the SPDIFRX interrupt priority. |
| bogdanm | 0:9b334a45a8ff | 28 | (+++) Enable the NVIC SPDIFRX IRQ handle. |
| bogdanm | 0:9b334a45a8ff | 29 | (##) DMA Configuration if you need to use DMA process (HAL_SPDIFRX_ReceiveDataFlow_DMA() and HAL_SPDIFRX_ReceiveControlFlow_DMA() API's). |
| bogdanm | 0:9b334a45a8ff | 30 | (+++) Declare a DMA handle structure for the reception of the Data Flow channel. |
| bogdanm | 0:9b334a45a8ff | 31 | (+++) Declare a DMA handle structure for the reception of the Control Flow channel. |
| bogdanm | 0:9b334a45a8ff | 32 | (+++) Enable the DMAx interface clock. |
| bogdanm | 0:9b334a45a8ff | 33 | (+++) Configure the declared DMA handle structure CtrlRx/DataRx with the required parameters. |
| bogdanm | 0:9b334a45a8ff | 34 | (+++) Configure the DMA Channel. |
| bogdanm | 0:9b334a45a8ff | 35 | (+++) Associate the initialized DMA handle to the SPDIFRX DMA CtrlRx/DataRx handle. |
| bogdanm | 0:9b334a45a8ff | 36 | (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the |
| bogdanm | 0:9b334a45a8ff | 37 | DMA CtrlRx/DataRx channel. |
| bogdanm | 0:9b334a45a8ff | 38 | |
| bogdanm | 0:9b334a45a8ff | 39 | (#) Program the input selection, re-tries number, wait for activity, channel status selection, data format, stereo mode and masking of user bits |
| bogdanm | 0:9b334a45a8ff | 40 | using HAL_SPDIFRX_Init() function. |
| bogdanm | 0:9b334a45a8ff | 41 | |
| bogdanm | 0:9b334a45a8ff | 42 | -@- The specific SPDIFRX interrupts (RXNE/CSRNE and Error Interrupts) will be managed using the macros |
| bogdanm | 0:9b334a45a8ff | 43 | __SPDIFRX_ENABLE_IT() and __SPDIFRX_DISABLE_IT() inside the receive process. |
| bogdanm | 0:9b334a45a8ff | 44 | -@- Make sure that ck_spdif clock is configured. |
| bogdanm | 0:9b334a45a8ff | 45 | |
| bogdanm | 0:9b334a45a8ff | 46 | (#) Three operation modes are available within this driver : |
| bogdanm | 0:9b334a45a8ff | 47 | |
| bogdanm | 0:9b334a45a8ff | 48 | *** Polling mode for reception operation (for debug purpose) *** |
| bogdanm | 0:9b334a45a8ff | 49 | ================================================================ |
| bogdanm | 0:9b334a45a8ff | 50 | [..] |
| bogdanm | 0:9b334a45a8ff | 51 | (+) Receive data flow in blocking mode using HAL_SPDIFRX_ReceiveDataFlow() |
| bogdanm | 0:9b334a45a8ff | 52 | (+) Receive control flow of data in blocking mode using HAL_SPDIFRX_ReceiveControlFlow() |
| bogdanm | 0:9b334a45a8ff | 53 | |
| bogdanm | 0:9b334a45a8ff | 54 | *** Interrupt mode for reception operation *** |
| bogdanm | 0:9b334a45a8ff | 55 | ========================================= |
| bogdanm | 0:9b334a45a8ff | 56 | [..] |
| bogdanm | 0:9b334a45a8ff | 57 | (+) Receive an amount of data (Data Flow) in non blocking mode using HAL_SPDIFRX_ReceiveDataFlow_IT() |
| bogdanm | 0:9b334a45a8ff | 58 | (+) Receive an amount of data (Control Flow) in non blocking mode using HAL_SPDIFRX_ReceiveControlFlow_IT() |
| bogdanm | 0:9b334a45a8ff | 59 | (+) At reception end of half transfer HAL_SPDIFRX_RxHalfCpltCallback is executed and user can |
| bogdanm | 0:9b334a45a8ff | 60 | add his own code by customization of function pointer HAL_SPDIFRX_RxHalfCpltCallback |
| bogdanm | 0:9b334a45a8ff | 61 | (+) At reception end of transfer HAL_SPDIFRX_RxCpltCallback is executed and user can |
| bogdanm | 0:9b334a45a8ff | 62 | add his own code by customization of function pointer HAL_SPDIFRX_RxCpltCallback |
| bogdanm | 0:9b334a45a8ff | 63 | (+) In case of transfer Error, HAL_SPDIFRX_ErrorCallback() function is executed and user can |
| bogdanm | 0:9b334a45a8ff | 64 | add his own code by customization of function pointer HAL_SPDIFRX_ErrorCallback |
| bogdanm | 0:9b334a45a8ff | 65 | |
| bogdanm | 0:9b334a45a8ff | 66 | *** DMA mode for reception operation *** |
| bogdanm | 0:9b334a45a8ff | 67 | ======================================== |
| bogdanm | 0:9b334a45a8ff | 68 | [..] |
| bogdanm | 0:9b334a45a8ff | 69 | (+) Receive an amount of data (Data Flow) in non blocking mode (DMA) using HAL_SPDIFRX_ReceiveDataFlow_DMA() |
| bogdanm | 0:9b334a45a8ff | 70 | (+) Receive an amount of data (Control Flow) in non blocking mode (DMA) using HAL_SPDIFRX_ReceiveControlFlow_DMA() |
| bogdanm | 0:9b334a45a8ff | 71 | (+) At reception end of half transfer HAL_SPDIFRX_RxHalfCpltCallback is executed and user can |
| bogdanm | 0:9b334a45a8ff | 72 | add his own code by customization of function pointer HAL_SPDIFRX_RxHalfCpltCallback |
| bogdanm | 0:9b334a45a8ff | 73 | (+) At reception end of transfer HAL_SPDIFRX_RxCpltCallback is executed and user can |
| bogdanm | 0:9b334a45a8ff | 74 | add his own code by customization of function pointer HAL_SPDIFRX_RxCpltCallback |
| bogdanm | 0:9b334a45a8ff | 75 | (+) In case of transfer Error, HAL_SPDIFRX_ErrorCallback() function is executed and user can |
| bogdanm | 0:9b334a45a8ff | 76 | add his own code by customization of function pointer HAL_SPDIFRX_ErrorCallback |
| bogdanm | 0:9b334a45a8ff | 77 | (+) Stop the DMA Transfer using HAL_SPDIFRX_DMAStop() |
| bogdanm | 0:9b334a45a8ff | 78 | |
| bogdanm | 0:9b334a45a8ff | 79 | *** SPDIFRX HAL driver macros list *** |
| bogdanm | 0:9b334a45a8ff | 80 | ============================================= |
| bogdanm | 0:9b334a45a8ff | 81 | [..] |
| bogdanm | 0:9b334a45a8ff | 82 | Below the list of most used macros in USART HAL driver. |
| bogdanm | 0:9b334a45a8ff | 83 | (+) __HAL_SPDIFRX_IDLE: Disable the specified SPDIFRX peripheral (IDEL State) |
| bogdanm | 0:9b334a45a8ff | 84 | (+) __HAL_SPDIFRX_SYNC: Enable the synchronization state of the specified SPDIFRX peripheral (SYNC State) |
| bogdanm | 0:9b334a45a8ff | 85 | (+) __HAL_SPDIFRX_RCV: Enable the receive state of the specified SPDIFRX peripheral (RCV State) |
| bogdanm | 0:9b334a45a8ff | 86 | (+) __HAL_SPDIFRX_ENABLE_IT : Enable the specified SPDIFRX interrupts |
| bogdanm | 0:9b334a45a8ff | 87 | (+) __HAL_SPDIFRX_DISABLE_IT : Disable the specified SPDIFRX interrupts |
| bogdanm | 0:9b334a45a8ff | 88 | (+) __HAL_SPDIFRX_GET_FLAG: Check whether the specified SPDIFRX flag is set or not. |
| bogdanm | 0:9b334a45a8ff | 89 | |
| bogdanm | 0:9b334a45a8ff | 90 | [..] |
| bogdanm | 0:9b334a45a8ff | 91 | (@) You can refer to the SPDIFRX HAL driver header file for more useful macros |
| bogdanm | 0:9b334a45a8ff | 92 | |
| bogdanm | 0:9b334a45a8ff | 93 | @endverbatim |
| bogdanm | 0:9b334a45a8ff | 94 | ****************************************************************************** |
| bogdanm | 0:9b334a45a8ff | 95 | * @attention |
| bogdanm | 0:9b334a45a8ff | 96 | * |
| bogdanm | 0:9b334a45a8ff | 97 | * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> |
| bogdanm | 0:9b334a45a8ff | 98 | * |
| bogdanm | 0:9b334a45a8ff | 99 | * Redistribution and use in source and binary forms, with or without modification, |
| bogdanm | 0:9b334a45a8ff | 100 | * are permitted provided that the following conditions are met: |
| bogdanm | 0:9b334a45a8ff | 101 | * 1. Redistributions of source code must retain the above copyright notice, |
| bogdanm | 0:9b334a45a8ff | 102 | * this list of conditions and the following disclaimer. |
| bogdanm | 0:9b334a45a8ff | 103 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| bogdanm | 0:9b334a45a8ff | 104 | * this list of conditions and the following disclaimer in the documentation |
| bogdanm | 0:9b334a45a8ff | 105 | * and/or other materials provided with the distribution. |
| bogdanm | 0:9b334a45a8ff | 106 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| bogdanm | 0:9b334a45a8ff | 107 | * may be used to endorse or promote products derived from this software |
| bogdanm | 0:9b334a45a8ff | 108 | * without specific prior written permission. |
| bogdanm | 0:9b334a45a8ff | 109 | * |
| bogdanm | 0:9b334a45a8ff | 110 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| bogdanm | 0:9b334a45a8ff | 111 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| bogdanm | 0:9b334a45a8ff | 112 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| bogdanm | 0:9b334a45a8ff | 113 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| bogdanm | 0:9b334a45a8ff | 114 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| bogdanm | 0:9b334a45a8ff | 115 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| bogdanm | 0:9b334a45a8ff | 116 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| bogdanm | 0:9b334a45a8ff | 117 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| bogdanm | 0:9b334a45a8ff | 118 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| bogdanm | 0:9b334a45a8ff | 119 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| bogdanm | 0:9b334a45a8ff | 120 | * |
| bogdanm | 0:9b334a45a8ff | 121 | ****************************************************************************** |
| bogdanm | 0:9b334a45a8ff | 122 | */ |
| bogdanm | 0:9b334a45a8ff | 123 | |
| bogdanm | 0:9b334a45a8ff | 124 | /* Includes ------------------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 125 | #include "stm32f7xx_hal.h" |
| bogdanm | 0:9b334a45a8ff | 126 | |
| bogdanm | 0:9b334a45a8ff | 127 | /** @addtogroup STM32F7xx_HAL_Driver |
| bogdanm | 0:9b334a45a8ff | 128 | * @{ |
| bogdanm | 0:9b334a45a8ff | 129 | */ |
| bogdanm | 0:9b334a45a8ff | 130 | /** @defgroup SPDIFRX SPDIFRX |
| bogdanm | 0:9b334a45a8ff | 131 | * @brief SPDIFRX HAL module driver |
| bogdanm | 0:9b334a45a8ff | 132 | * @{ |
| bogdanm | 0:9b334a45a8ff | 133 | */ |
| bogdanm | 0:9b334a45a8ff | 134 | |
| bogdanm | 0:9b334a45a8ff | 135 | #ifdef HAL_SPDIFRX_MODULE_ENABLED |
| bogdanm | 0:9b334a45a8ff | 136 | |
| bogdanm | 0:9b334a45a8ff | 137 | /* Private typedef -----------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 138 | /* Private define ------------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 139 | #define SPDIFRX_TIMEOUT_VALUE 0xFFFF |
| bogdanm | 0:9b334a45a8ff | 140 | |
| bogdanm | 0:9b334a45a8ff | 141 | /* Private macro -------------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 142 | /* Private variables ---------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 143 | /* Private function prototypes -----------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 144 | /** @addtogroup SPDIFRX_Private_Functions |
| bogdanm | 0:9b334a45a8ff | 145 | * @{ |
| bogdanm | 0:9b334a45a8ff | 146 | */ |
| bogdanm | 0:9b334a45a8ff | 147 | static void SPDIFRX_DMARxCplt(DMA_HandleTypeDef *hdma); |
| bogdanm | 0:9b334a45a8ff | 148 | static void SPDIFRX_DMARxHalfCplt(DMA_HandleTypeDef *hdma); |
| bogdanm | 0:9b334a45a8ff | 149 | static void SPDIFRX_DMACxCplt(DMA_HandleTypeDef *hdma); |
| bogdanm | 0:9b334a45a8ff | 150 | static void SPDIFRX_DMACxHalfCplt(DMA_HandleTypeDef *hdma); |
| bogdanm | 0:9b334a45a8ff | 151 | static void SPDIFRX_DMAError(DMA_HandleTypeDef *hdma); |
| bogdanm | 0:9b334a45a8ff | 152 | static void SPDIFRX_ReceiveControlFlow_IT(SPDIFRX_HandleTypeDef *hspdif); |
| bogdanm | 0:9b334a45a8ff | 153 | static void SPDIFRX_ReceiveDataFlow_IT(SPDIFRX_HandleTypeDef *hspdif); |
| bogdanm | 0:9b334a45a8ff | 154 | static HAL_StatusTypeDef SPDIFRX_WaitOnFlagUntilTimeout(SPDIFRX_HandleTypeDef *hspdif, uint32_t Flag, FlagStatus Status, uint32_t Timeout); |
| bogdanm | 0:9b334a45a8ff | 155 | /** |
| bogdanm | 0:9b334a45a8ff | 156 | * @} |
| bogdanm | 0:9b334a45a8ff | 157 | */ |
| bogdanm | 0:9b334a45a8ff | 158 | /* Exported functions ---------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 159 | |
| bogdanm | 0:9b334a45a8ff | 160 | /** @defgroup SPDIFRX_Exported_Functions SPDIFRX Exported Functions |
| bogdanm | 0:9b334a45a8ff | 161 | * @{ |
| bogdanm | 0:9b334a45a8ff | 162 | */ |
| bogdanm | 0:9b334a45a8ff | 163 | |
| bogdanm | 0:9b334a45a8ff | 164 | /** @defgroup SPDIFRX_Exported_Functions_Group1 Initialization and de-initialization functions |
| bogdanm | 0:9b334a45a8ff | 165 | * @brief Initialization and Configuration functions |
| bogdanm | 0:9b334a45a8ff | 166 | * |
| bogdanm | 0:9b334a45a8ff | 167 | @verbatim |
| bogdanm | 0:9b334a45a8ff | 168 | =============================================================================== |
| bogdanm | 0:9b334a45a8ff | 169 | ##### Initialization and de-initialization functions ##### |
| bogdanm | 0:9b334a45a8ff | 170 | =============================================================================== |
| bogdanm | 0:9b334a45a8ff | 171 | [..] This subsection provides a set of functions allowing to initialize and |
| bogdanm | 0:9b334a45a8ff | 172 | de-initialize the SPDIFRX peripheral: |
| bogdanm | 0:9b334a45a8ff | 173 | |
| bogdanm | 0:9b334a45a8ff | 174 | (+) User must Implement HAL_SPDIFRX_MspInit() function in which he configures |
| bogdanm | 0:9b334a45a8ff | 175 | all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC ). |
| bogdanm | 0:9b334a45a8ff | 176 | |
| bogdanm | 0:9b334a45a8ff | 177 | (+) Call the function HAL_SPDIFRX_Init() to configure the SPDIFRX peripheral with |
| bogdanm | 0:9b334a45a8ff | 178 | the selected configuration: |
| bogdanm | 0:9b334a45a8ff | 179 | (++) Input Selection (IN0, IN1,...) |
| bogdanm | 0:9b334a45a8ff | 180 | (++) Maximum allowed re-tries during synchronization phase |
| bogdanm | 0:9b334a45a8ff | 181 | (++) Wait for activity on SPDIF selected input |
| bogdanm | 0:9b334a45a8ff | 182 | (++) Channel status selection (from channel A or B) |
| bogdanm | 0:9b334a45a8ff | 183 | (++) Data format (LSB, MSB, ...) |
| bogdanm | 0:9b334a45a8ff | 184 | (++) Stereo mode |
| bogdanm | 0:9b334a45a8ff | 185 | (++) User bits masking (PT,C,U,V,...) |
| bogdanm | 0:9b334a45a8ff | 186 | |
| bogdanm | 0:9b334a45a8ff | 187 | (+) Call the function HAL_SPDIFRX_DeInit() to restore the default configuration |
| bogdanm | 0:9b334a45a8ff | 188 | of the selected SPDIFRXx peripheral. |
| bogdanm | 0:9b334a45a8ff | 189 | @endverbatim |
| bogdanm | 0:9b334a45a8ff | 190 | * @{ |
| bogdanm | 0:9b334a45a8ff | 191 | */ |
| bogdanm | 0:9b334a45a8ff | 192 | |
| bogdanm | 0:9b334a45a8ff | 193 | /** |
| bogdanm | 0:9b334a45a8ff | 194 | * @brief Initializes the SPDIFRX according to the specified parameters |
| bogdanm | 0:9b334a45a8ff | 195 | * in the SPDIFRX_InitTypeDef and create the associated handle. |
| bogdanm | 0:9b334a45a8ff | 196 | * @param hspdif: SPDIFRX handle |
| bogdanm | 0:9b334a45a8ff | 197 | * @retval HAL status |
| bogdanm | 0:9b334a45a8ff | 198 | */ |
| bogdanm | 0:9b334a45a8ff | 199 | HAL_StatusTypeDef HAL_SPDIFRX_Init(SPDIFRX_HandleTypeDef *hspdif) |
| bogdanm | 0:9b334a45a8ff | 200 | { |
| bogdanm | 0:9b334a45a8ff | 201 | uint32_t tmpreg = 0; |
| bogdanm | 0:9b334a45a8ff | 202 | |
| bogdanm | 0:9b334a45a8ff | 203 | /* Check the SPDIFRX handle allocation */ |
| bogdanm | 0:9b334a45a8ff | 204 | if(hspdif == NULL) |
| bogdanm | 0:9b334a45a8ff | 205 | { |
| bogdanm | 0:9b334a45a8ff | 206 | return HAL_ERROR; |
| bogdanm | 0:9b334a45a8ff | 207 | } |
| bogdanm | 0:9b334a45a8ff | 208 | |
| bogdanm | 0:9b334a45a8ff | 209 | /* Check the SPDIFRX parameters */ |
| bogdanm | 0:9b334a45a8ff | 210 | assert_param(IS_STEREO_MODE(hspdif->Init.StereoMode)); |
| bogdanm | 0:9b334a45a8ff | 211 | assert_param(IS_SPDIFRX_INPUT_SELECT(hspdif->Init.InputSelection)); |
| bogdanm | 0:9b334a45a8ff | 212 | assert_param(IS_SPDIFRX_MAX_RETRIES(hspdif->Init.Retries)); |
| bogdanm | 0:9b334a45a8ff | 213 | assert_param(IS_SPDIFRX_WAIT_FOR_ACTIVITY(hspdif->Init.WaitForActivity)); |
| bogdanm | 0:9b334a45a8ff | 214 | assert_param(IS_SPDIFRX_CHANNEL(hspdif->Init.ChannelSelection)); |
| bogdanm | 0:9b334a45a8ff | 215 | assert_param(IS_SPDIFRX_DATA_FORMAT(hspdif->Init.DataFormat)); |
| bogdanm | 0:9b334a45a8ff | 216 | assert_param(IS_PREAMBLE_TYPE_MASK(hspdif->Init.PreambleTypeMask)); |
| bogdanm | 0:9b334a45a8ff | 217 | assert_param(IS_CHANNEL_STATUS_MASK(hspdif->Init.ChannelStatusMask)); |
| bogdanm | 0:9b334a45a8ff | 218 | assert_param(IS_VALIDITY_MASK(hspdif->Init.ValidityBitMask)); |
| bogdanm | 0:9b334a45a8ff | 219 | assert_param(IS_PARITY_ERROR_MASK(hspdif->Init.ParityErrorMask)); |
| bogdanm | 0:9b334a45a8ff | 220 | |
| bogdanm | 0:9b334a45a8ff | 221 | if(hspdif->State == HAL_SPDIFRX_STATE_RESET) |
| bogdanm | 0:9b334a45a8ff | 222 | { |
| bogdanm | 0:9b334a45a8ff | 223 | /* Allocate lock resource and initialize it */ |
| bogdanm | 0:9b334a45a8ff | 224 | hspdif->Lock = HAL_UNLOCKED; |
| bogdanm | 0:9b334a45a8ff | 225 | /* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */ |
| bogdanm | 0:9b334a45a8ff | 226 | HAL_SPDIFRX_MspInit(hspdif); |
| bogdanm | 0:9b334a45a8ff | 227 | } |
| bogdanm | 0:9b334a45a8ff | 228 | |
| bogdanm | 0:9b334a45a8ff | 229 | /* SPDIFRX peripheral state is BUSY*/ |
| bogdanm | 0:9b334a45a8ff | 230 | hspdif->State = HAL_SPDIFRX_STATE_BUSY; |
| bogdanm | 0:9b334a45a8ff | 231 | |
| bogdanm | 0:9b334a45a8ff | 232 | /* Disable SPDIFRX interface (IDLE State) */ |
| bogdanm | 0:9b334a45a8ff | 233 | __HAL_SPDIFRX_IDLE(hspdif); |
| bogdanm | 0:9b334a45a8ff | 234 | |
| bogdanm | 0:9b334a45a8ff | 235 | /* Reset the old SPDIFRX CR configuration */ |
| bogdanm | 0:9b334a45a8ff | 236 | tmpreg = hspdif->Instance->CR; |
| bogdanm | 0:9b334a45a8ff | 237 | |
| bogdanm | 0:9b334a45a8ff | 238 | tmpreg &= ~((uint16_t) SPDIFRX_CR_RXSTEO | SPDIFRX_CR_DRFMT | SPDIFRX_CR_PMSK | |
| bogdanm | 0:9b334a45a8ff | 239 | SPDIFRX_CR_VMSK | SPDIFRX_CR_CUMSK | SPDIFRX_CR_PTMSK | |
| bogdanm | 0:9b334a45a8ff | 240 | SPDIFRX_CR_CHSEL | SPDIFRX_CR_NBTR | SPDIFRX_CR_WFA | |
| bogdanm | 0:9b334a45a8ff | 241 | SPDIFRX_CR_INSEL); |
| bogdanm | 0:9b334a45a8ff | 242 | |
| bogdanm | 0:9b334a45a8ff | 243 | /* Sets the new configuration of the SPDIFRX peripheral */ |
| bogdanm | 0:9b334a45a8ff | 244 | tmpreg |= ((uint16_t) hspdif->Init.StereoMode | |
| bogdanm | 0:9b334a45a8ff | 245 | hspdif->Init.InputSelection | |
| bogdanm | 0:9b334a45a8ff | 246 | hspdif->Init.Retries | |
| bogdanm | 0:9b334a45a8ff | 247 | hspdif->Init.WaitForActivity | |
| bogdanm | 0:9b334a45a8ff | 248 | hspdif->Init.ChannelSelection | |
| bogdanm | 0:9b334a45a8ff | 249 | hspdif->Init.DataFormat | |
| bogdanm | 0:9b334a45a8ff | 250 | hspdif->Init.PreambleTypeMask | |
| bogdanm | 0:9b334a45a8ff | 251 | hspdif->Init.ChannelStatusMask | |
| bogdanm | 0:9b334a45a8ff | 252 | hspdif->Init.ValidityBitMask | |
| bogdanm | 0:9b334a45a8ff | 253 | hspdif->Init.ParityErrorMask); |
| bogdanm | 0:9b334a45a8ff | 254 | |
| bogdanm | 0:9b334a45a8ff | 255 | hspdif->Instance->CR = tmpreg; |
| bogdanm | 0:9b334a45a8ff | 256 | |
| bogdanm | 0:9b334a45a8ff | 257 | hspdif->ErrorCode = HAL_SPDIFRX_ERROR_NONE; |
| bogdanm | 0:9b334a45a8ff | 258 | |
| bogdanm | 0:9b334a45a8ff | 259 | /* SPDIFRX peripheral state is READY*/ |
| bogdanm | 0:9b334a45a8ff | 260 | hspdif->State = HAL_SPDIFRX_STATE_READY; |
| bogdanm | 0:9b334a45a8ff | 261 | |
| bogdanm | 0:9b334a45a8ff | 262 | return HAL_OK; |
| bogdanm | 0:9b334a45a8ff | 263 | } |
| bogdanm | 0:9b334a45a8ff | 264 | |
| bogdanm | 0:9b334a45a8ff | 265 | /** |
| bogdanm | 0:9b334a45a8ff | 266 | * @brief DeInitializes the SPDIFRX peripheral |
| bogdanm | 0:9b334a45a8ff | 267 | * @param hspdif: SPDIFRX handle |
| bogdanm | 0:9b334a45a8ff | 268 | * @retval HAL status |
| bogdanm | 0:9b334a45a8ff | 269 | */ |
| bogdanm | 0:9b334a45a8ff | 270 | HAL_StatusTypeDef HAL_SPDIFRX_DeInit(SPDIFRX_HandleTypeDef *hspdif) |
| bogdanm | 0:9b334a45a8ff | 271 | { |
| bogdanm | 0:9b334a45a8ff | 272 | /* Check the SPDIFRX handle allocation */ |
| bogdanm | 0:9b334a45a8ff | 273 | if(hspdif == NULL) |
| bogdanm | 0:9b334a45a8ff | 274 | { |
| bogdanm | 0:9b334a45a8ff | 275 | return HAL_ERROR; |
| bogdanm | 0:9b334a45a8ff | 276 | } |
| bogdanm | 0:9b334a45a8ff | 277 | |
| bogdanm | 0:9b334a45a8ff | 278 | /* Check the parameters */ |
| bogdanm | 0:9b334a45a8ff | 279 | assert_param(IS_SPDIFRX_ALL_INSTANCE(hspdif->Instance)); |
| bogdanm | 0:9b334a45a8ff | 280 | |
| bogdanm | 0:9b334a45a8ff | 281 | hspdif->State = HAL_SPDIFRX_STATE_BUSY; |
| bogdanm | 0:9b334a45a8ff | 282 | |
| bogdanm | 0:9b334a45a8ff | 283 | /* Disable SPDIFRX interface (IDLE state) */ |
| bogdanm | 0:9b334a45a8ff | 284 | __HAL_SPDIFRX_IDLE(hspdif); |
| bogdanm | 0:9b334a45a8ff | 285 | |
| bogdanm | 0:9b334a45a8ff | 286 | /* DeInit the low level hardware: GPIO, CLOCK, NVIC... */ |
| bogdanm | 0:9b334a45a8ff | 287 | HAL_SPDIFRX_MspDeInit(hspdif); |
| bogdanm | 0:9b334a45a8ff | 288 | |
| bogdanm | 0:9b334a45a8ff | 289 | hspdif->ErrorCode = HAL_SPDIFRX_ERROR_NONE; |
| bogdanm | 0:9b334a45a8ff | 290 | |
| bogdanm | 0:9b334a45a8ff | 291 | /* SPDIFRX peripheral state is RESET*/ |
| bogdanm | 0:9b334a45a8ff | 292 | hspdif->State = HAL_SPDIFRX_STATE_RESET; |
| bogdanm | 0:9b334a45a8ff | 293 | |
| bogdanm | 0:9b334a45a8ff | 294 | /* Release Lock */ |
| bogdanm | 0:9b334a45a8ff | 295 | __HAL_UNLOCK(hspdif); |
| bogdanm | 0:9b334a45a8ff | 296 | |
| bogdanm | 0:9b334a45a8ff | 297 | return HAL_OK; |
| bogdanm | 0:9b334a45a8ff | 298 | } |
| bogdanm | 0:9b334a45a8ff | 299 | |
| bogdanm | 0:9b334a45a8ff | 300 | /** |
| bogdanm | 0:9b334a45a8ff | 301 | * @brief SPDIFRX MSP Init |
| bogdanm | 0:9b334a45a8ff | 302 | * @param hspdif: SPDIFRX handle |
| bogdanm | 0:9b334a45a8ff | 303 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 304 | */ |
| bogdanm | 0:9b334a45a8ff | 305 | __weak void HAL_SPDIFRX_MspInit(SPDIFRX_HandleTypeDef *hspdif) |
| bogdanm | 0:9b334a45a8ff | 306 | { |
| bogdanm | 0:9b334a45a8ff | 307 | /* NOTE : This function Should not be modified, when the callback is needed, |
| bogdanm | 0:9b334a45a8ff | 308 | the HAL_SPDIFRX_MspInit could be implemented in the user file |
| bogdanm | 0:9b334a45a8ff | 309 | */ |
| bogdanm | 0:9b334a45a8ff | 310 | } |
| bogdanm | 0:9b334a45a8ff | 311 | |
| bogdanm | 0:9b334a45a8ff | 312 | /** |
| bogdanm | 0:9b334a45a8ff | 313 | * @brief SPDIFRX MSP DeInit |
| bogdanm | 0:9b334a45a8ff | 314 | * @param hspdif: SPDIFRX handle |
| bogdanm | 0:9b334a45a8ff | 315 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 316 | */ |
| bogdanm | 0:9b334a45a8ff | 317 | __weak void HAL_SPDIFRX_MspDeInit(SPDIFRX_HandleTypeDef *hspdif) |
| bogdanm | 0:9b334a45a8ff | 318 | { |
| bogdanm | 0:9b334a45a8ff | 319 | /* NOTE : This function Should not be modified, when the callback is needed, |
| bogdanm | 0:9b334a45a8ff | 320 | the HAL_SPDIFRX_MspDeInit could be implemented in the user file |
| bogdanm | 0:9b334a45a8ff | 321 | */ |
| bogdanm | 0:9b334a45a8ff | 322 | } |
| bogdanm | 0:9b334a45a8ff | 323 | |
| bogdanm | 0:9b334a45a8ff | 324 | /** |
| bogdanm | 0:9b334a45a8ff | 325 | * @brief Sets the SPDIFRX dtat format according to the specified parameters |
| bogdanm | 0:9b334a45a8ff | 326 | * in the SPDIFRX_InitTypeDef. |
| bogdanm | 0:9b334a45a8ff | 327 | * @param hspdif: SPDIFRX handle |
| bogdanm | 0:9b334a45a8ff | 328 | * @param sDataFormat: SPDIFRX data format |
| bogdanm | 0:9b334a45a8ff | 329 | * @retval HAL status |
| bogdanm | 0:9b334a45a8ff | 330 | */ |
| bogdanm | 0:9b334a45a8ff | 331 | HAL_StatusTypeDef HAL_SPDIFRX_SetDataFormat(SPDIFRX_HandleTypeDef *hspdif, SPDIFRX_SetDataFormatTypeDef sDataFormat) |
| bogdanm | 0:9b334a45a8ff | 332 | { |
| bogdanm | 0:9b334a45a8ff | 333 | uint32_t tmpreg = 0; |
| bogdanm | 0:9b334a45a8ff | 334 | |
| bogdanm | 0:9b334a45a8ff | 335 | /* Check the SPDIFRX handle allocation */ |
| bogdanm | 0:9b334a45a8ff | 336 | if(hspdif == NULL) |
| bogdanm | 0:9b334a45a8ff | 337 | { |
| bogdanm | 0:9b334a45a8ff | 338 | return HAL_ERROR; |
| bogdanm | 0:9b334a45a8ff | 339 | } |
| bogdanm | 0:9b334a45a8ff | 340 | |
| bogdanm | 0:9b334a45a8ff | 341 | /* Check the SPDIFRX parameters */ |
| bogdanm | 0:9b334a45a8ff | 342 | assert_param(IS_STEREO_MODE(sDataFormat.StereoMode)); |
| bogdanm | 0:9b334a45a8ff | 343 | assert_param(IS_SPDIFRX_DATA_FORMAT(sDataFormat.DataFormat)); |
| bogdanm | 0:9b334a45a8ff | 344 | assert_param(IS_PREAMBLE_TYPE_MASK(sDataFormat.PreambleTypeMask)); |
| bogdanm | 0:9b334a45a8ff | 345 | assert_param(IS_CHANNEL_STATUS_MASK(sDataFormat.ChannelStatusMask)); |
| bogdanm | 0:9b334a45a8ff | 346 | assert_param(IS_VALIDITY_MASK(sDataFormat.ValidityBitMask)); |
| bogdanm | 0:9b334a45a8ff | 347 | assert_param(IS_PARITY_ERROR_MASK(sDataFormat.ParityErrorMask)); |
| bogdanm | 0:9b334a45a8ff | 348 | |
| bogdanm | 0:9b334a45a8ff | 349 | /* Reset the old SPDIFRX CR configuration */ |
| bogdanm | 0:9b334a45a8ff | 350 | tmpreg = hspdif->Instance->CR; |
| bogdanm | 0:9b334a45a8ff | 351 | |
| bogdanm | 0:9b334a45a8ff | 352 | if(((tmpreg & SPDIFRX_STATE_RCV) == SPDIFRX_STATE_RCV) && |
| bogdanm | 0:9b334a45a8ff | 353 | (((tmpreg & SPDIFRX_CR_DRFMT) != sDataFormat.DataFormat) || |
| bogdanm | 0:9b334a45a8ff | 354 | ((tmpreg & SPDIFRX_CR_RXSTEO) != sDataFormat.StereoMode))) |
| bogdanm | 0:9b334a45a8ff | 355 | { |
| bogdanm | 0:9b334a45a8ff | 356 | return HAL_ERROR; |
| bogdanm | 0:9b334a45a8ff | 357 | } |
| bogdanm | 0:9b334a45a8ff | 358 | |
| bogdanm | 0:9b334a45a8ff | 359 | tmpreg &= ~((uint16_t) SPDIFRX_CR_RXSTEO | SPDIFRX_CR_DRFMT | SPDIFRX_CR_PMSK | |
| bogdanm | 0:9b334a45a8ff | 360 | SPDIFRX_CR_VMSK | SPDIFRX_CR_CUMSK | SPDIFRX_CR_PTMSK); |
| bogdanm | 0:9b334a45a8ff | 361 | |
| bogdanm | 0:9b334a45a8ff | 362 | /* Sets the new configuration of the SPDIFRX peripheral */ |
| bogdanm | 0:9b334a45a8ff | 363 | tmpreg |= ((uint16_t) sDataFormat.StereoMode | |
| bogdanm | 0:9b334a45a8ff | 364 | sDataFormat.DataFormat | |
| bogdanm | 0:9b334a45a8ff | 365 | sDataFormat.PreambleTypeMask | |
| bogdanm | 0:9b334a45a8ff | 366 | sDataFormat.ChannelStatusMask | |
| bogdanm | 0:9b334a45a8ff | 367 | sDataFormat.ValidityBitMask | |
| bogdanm | 0:9b334a45a8ff | 368 | sDataFormat.ParityErrorMask); |
| bogdanm | 0:9b334a45a8ff | 369 | |
| bogdanm | 0:9b334a45a8ff | 370 | hspdif->Instance->CR = tmpreg; |
| bogdanm | 0:9b334a45a8ff | 371 | |
| bogdanm | 0:9b334a45a8ff | 372 | return HAL_OK; |
| bogdanm | 0:9b334a45a8ff | 373 | } |
| bogdanm | 0:9b334a45a8ff | 374 | |
| bogdanm | 0:9b334a45a8ff | 375 | /** |
| bogdanm | 0:9b334a45a8ff | 376 | * @} |
| bogdanm | 0:9b334a45a8ff | 377 | */ |
| bogdanm | 0:9b334a45a8ff | 378 | |
| bogdanm | 0:9b334a45a8ff | 379 | /** @defgroup SPDIFRX_Exported_Functions_Group2 IO operation functions |
| bogdanm | 0:9b334a45a8ff | 380 | * @brief Data transfers functions |
| bogdanm | 0:9b334a45a8ff | 381 | * |
| bogdanm | 0:9b334a45a8ff | 382 | @verbatim |
| bogdanm | 0:9b334a45a8ff | 383 | =============================================================================== |
| bogdanm | 0:9b334a45a8ff | 384 | ##### IO operation functions ##### |
| bogdanm | 0:9b334a45a8ff | 385 | =============================================================================== |
| bogdanm | 0:9b334a45a8ff | 386 | [..] |
| bogdanm | 0:9b334a45a8ff | 387 | This subsection provides a set of functions allowing to manage the SPDIFRX data |
| bogdanm | 0:9b334a45a8ff | 388 | transfers. |
| bogdanm | 0:9b334a45a8ff | 389 | |
| bogdanm | 0:9b334a45a8ff | 390 | (#) There is two mode of transfer: |
| bogdanm | 0:9b334a45a8ff | 391 | (++) Blocking mode : The communication is performed in the polling mode. |
| bogdanm | 0:9b334a45a8ff | 392 | The status of all data processing is returned by the same function |
| bogdanm | 0:9b334a45a8ff | 393 | after finishing transfer. |
| bogdanm | 0:9b334a45a8ff | 394 | (++) No-Blocking mode : The communication is performed using Interrupts |
| bogdanm | 0:9b334a45a8ff | 395 | or DMA. These functions return the status of the transfer start-up. |
| bogdanm | 0:9b334a45a8ff | 396 | The end of the data processing will be indicated through the |
| bogdanm | 0:9b334a45a8ff | 397 | dedicated SPDIFRX IRQ when using Interrupt mode or the DMA IRQ when |
| bogdanm | 0:9b334a45a8ff | 398 | using DMA mode. |
| bogdanm | 0:9b334a45a8ff | 399 | |
| bogdanm | 0:9b334a45a8ff | 400 | (#) Blocking mode functions are : |
| bogdanm | 0:9b334a45a8ff | 401 | (++) HAL_SPDIFRX_ReceiveDataFlow() |
| bogdanm | 0:9b334a45a8ff | 402 | (++) HAL_SPDIFRX_ReceiveControlFlow() |
| bogdanm | 0:9b334a45a8ff | 403 | (+@) Do not use blocking mode to receive both control and data flow at the same time. |
| bogdanm | 0:9b334a45a8ff | 404 | |
| bogdanm | 0:9b334a45a8ff | 405 | (#) No-Blocking mode functions with Interrupt are : |
| bogdanm | 0:9b334a45a8ff | 406 | (++) HAL_SPDIFRX_ReceiveControlFlow_IT() |
| bogdanm | 0:9b334a45a8ff | 407 | (++) HAL_SPDIFRX_ReceiveDataFlow_IT() |
| bogdanm | 0:9b334a45a8ff | 408 | |
| bogdanm | 0:9b334a45a8ff | 409 | (#) No-Blocking mode functions with DMA are : |
| bogdanm | 0:9b334a45a8ff | 410 | (++) HAL_SPDIFRX_ReceiveControlFlow_DMA() |
| bogdanm | 0:9b334a45a8ff | 411 | (++) HAL_SPDIFRX_ReceiveDataFlow_DMA() |
| bogdanm | 0:9b334a45a8ff | 412 | |
| bogdanm | 0:9b334a45a8ff | 413 | (#) A set of Transfer Complete Callbacks are provided in No_Blocking mode: |
| bogdanm | 0:9b334a45a8ff | 414 | (++) HAL_SPDIFRX_RxCpltCallback() |
| bogdanm | 0:9b334a45a8ff | 415 | (++) HAL_SPDIFRX_ErrorCallback() |
| bogdanm | 0:9b334a45a8ff | 416 | |
| bogdanm | 0:9b334a45a8ff | 417 | @endverbatim |
| bogdanm | 0:9b334a45a8ff | 418 | * @{ |
| bogdanm | 0:9b334a45a8ff | 419 | */ |
| bogdanm | 0:9b334a45a8ff | 420 | |
| bogdanm | 0:9b334a45a8ff | 421 | |
| bogdanm | 0:9b334a45a8ff | 422 | /** |
| bogdanm | 0:9b334a45a8ff | 423 | * @brief Receives an amount of data (Data Flow) in blocking mode. |
| bogdanm | 0:9b334a45a8ff | 424 | * @param hspdif: pointer to SPDIFRX_HandleTypeDef structure that contains |
| bogdanm | 0:9b334a45a8ff | 425 | * the configuration information for SPDIFRX module. |
| bogdanm | 0:9b334a45a8ff | 426 | * @param pData: Pointer to data buffer |
| bogdanm | 0:9b334a45a8ff | 427 | * @param Size: Amount of data to be received |
| bogdanm | 0:9b334a45a8ff | 428 | * @param Timeout: Timeout duration |
| bogdanm | 0:9b334a45a8ff | 429 | * @retval HAL status |
| bogdanm | 0:9b334a45a8ff | 430 | */ |
| bogdanm | 0:9b334a45a8ff | 431 | HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size, uint32_t Timeout) |
| bogdanm | 0:9b334a45a8ff | 432 | { |
| bogdanm | 0:9b334a45a8ff | 433 | |
| bogdanm | 0:9b334a45a8ff | 434 | if((pData == NULL ) || (Size == 0)) |
| bogdanm | 0:9b334a45a8ff | 435 | { |
| bogdanm | 0:9b334a45a8ff | 436 | return HAL_ERROR; |
| bogdanm | 0:9b334a45a8ff | 437 | } |
| bogdanm | 0:9b334a45a8ff | 438 | |
| bogdanm | 0:9b334a45a8ff | 439 | if(hspdif->State == HAL_SPDIFRX_STATE_READY) |
| bogdanm | 0:9b334a45a8ff | 440 | { |
| bogdanm | 0:9b334a45a8ff | 441 | /* Process Locked */ |
| bogdanm | 0:9b334a45a8ff | 442 | __HAL_LOCK(hspdif); |
| bogdanm | 0:9b334a45a8ff | 443 | |
| bogdanm | 0:9b334a45a8ff | 444 | hspdif->State = HAL_SPDIFRX_STATE_BUSY; |
| bogdanm | 0:9b334a45a8ff | 445 | |
| bogdanm | 0:9b334a45a8ff | 446 | /* Start synchronisation */ |
| bogdanm | 0:9b334a45a8ff | 447 | __HAL_SPDIFRX_SYNC(hspdif); |
| bogdanm | 0:9b334a45a8ff | 448 | |
| bogdanm | 0:9b334a45a8ff | 449 | /* Wait until SYNCD flag is set */ |
| bogdanm | 0:9b334a45a8ff | 450 | if(SPDIFRX_WaitOnFlagUntilTimeout(hspdif, SPDIFRX_FLAG_SYNCD, RESET, Timeout) != HAL_OK) |
| bogdanm | 0:9b334a45a8ff | 451 | { |
| bogdanm | 0:9b334a45a8ff | 452 | return HAL_TIMEOUT; |
| bogdanm | 0:9b334a45a8ff | 453 | } |
| bogdanm | 0:9b334a45a8ff | 454 | |
| bogdanm | 0:9b334a45a8ff | 455 | /* Start reception */ |
| bogdanm | 0:9b334a45a8ff | 456 | __HAL_SPDIFRX_RCV(hspdif); |
| bogdanm | 0:9b334a45a8ff | 457 | |
| bogdanm | 0:9b334a45a8ff | 458 | /* Receive data flow */ |
| bogdanm | 0:9b334a45a8ff | 459 | while(Size > 0) |
| bogdanm | 0:9b334a45a8ff | 460 | { |
| bogdanm | 0:9b334a45a8ff | 461 | /* Wait until RXNE flag is set */ |
| bogdanm | 0:9b334a45a8ff | 462 | if(SPDIFRX_WaitOnFlagUntilTimeout(hspdif, SPDIFRX_FLAG_RXNE, RESET, Timeout) != HAL_OK) |
| bogdanm | 0:9b334a45a8ff | 463 | { |
| bogdanm | 0:9b334a45a8ff | 464 | return HAL_TIMEOUT; |
| bogdanm | 0:9b334a45a8ff | 465 | } |
| bogdanm | 0:9b334a45a8ff | 466 | |
| bogdanm | 0:9b334a45a8ff | 467 | (*pData++) = hspdif->Instance->DR; |
| bogdanm | 0:9b334a45a8ff | 468 | Size--; |
| bogdanm | 0:9b334a45a8ff | 469 | } |
| bogdanm | 0:9b334a45a8ff | 470 | |
| bogdanm | 0:9b334a45a8ff | 471 | /* SPDIFRX ready */ |
| bogdanm | 0:9b334a45a8ff | 472 | hspdif->State = HAL_SPDIFRX_STATE_READY; |
| bogdanm | 0:9b334a45a8ff | 473 | |
| bogdanm | 0:9b334a45a8ff | 474 | /* Process Unlocked */ |
| bogdanm | 0:9b334a45a8ff | 475 | __HAL_UNLOCK(hspdif); |
| bogdanm | 0:9b334a45a8ff | 476 | |
| bogdanm | 0:9b334a45a8ff | 477 | return HAL_OK; |
| bogdanm | 0:9b334a45a8ff | 478 | } |
| bogdanm | 0:9b334a45a8ff | 479 | else |
| bogdanm | 0:9b334a45a8ff | 480 | { |
| bogdanm | 0:9b334a45a8ff | 481 | return HAL_BUSY; |
| bogdanm | 0:9b334a45a8ff | 482 | } |
| bogdanm | 0:9b334a45a8ff | 483 | } |
| bogdanm | 0:9b334a45a8ff | 484 | |
| bogdanm | 0:9b334a45a8ff | 485 | /** |
| bogdanm | 0:9b334a45a8ff | 486 | * @brief Receives an amount of data (Control Flow) in blocking mode. |
| bogdanm | 0:9b334a45a8ff | 487 | * @param hspdif: pointer to a SPDIFRX_HandleTypeDef structure that contains |
| bogdanm | 0:9b334a45a8ff | 488 | * the configuration information for SPDIFRX module. |
| bogdanm | 0:9b334a45a8ff | 489 | * @param pData: Pointer to data buffer |
| bogdanm | 0:9b334a45a8ff | 490 | * @param Size: Amount of data to be received |
| bogdanm | 0:9b334a45a8ff | 491 | * @param Timeout: Timeout duration |
| bogdanm | 0:9b334a45a8ff | 492 | * @retval HAL status |
| bogdanm | 0:9b334a45a8ff | 493 | */ |
| bogdanm | 0:9b334a45a8ff | 494 | HAL_StatusTypeDef HAL_SPDIFRX_ReceiveControlFlow(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size, uint32_t Timeout) |
| bogdanm | 0:9b334a45a8ff | 495 | { |
| bogdanm | 0:9b334a45a8ff | 496 | |
| bogdanm | 0:9b334a45a8ff | 497 | if((pData == NULL ) || (Size == 0)) |
| bogdanm | 0:9b334a45a8ff | 498 | { |
| bogdanm | 0:9b334a45a8ff | 499 | return HAL_ERROR; |
| bogdanm | 0:9b334a45a8ff | 500 | } |
| bogdanm | 0:9b334a45a8ff | 501 | |
| bogdanm | 0:9b334a45a8ff | 502 | if(hspdif->State == HAL_SPDIFRX_STATE_READY) |
| bogdanm | 0:9b334a45a8ff | 503 | { |
| bogdanm | 0:9b334a45a8ff | 504 | /* Process Locked */ |
| bogdanm | 0:9b334a45a8ff | 505 | __HAL_LOCK(hspdif); |
| bogdanm | 0:9b334a45a8ff | 506 | |
| bogdanm | 0:9b334a45a8ff | 507 | hspdif->State = HAL_SPDIFRX_STATE_BUSY; |
| bogdanm | 0:9b334a45a8ff | 508 | |
| bogdanm | 0:9b334a45a8ff | 509 | /* Start synchronization */ |
| bogdanm | 0:9b334a45a8ff | 510 | __HAL_SPDIFRX_SYNC(hspdif); |
| bogdanm | 0:9b334a45a8ff | 511 | |
| bogdanm | 0:9b334a45a8ff | 512 | /* Wait until SYNCD flag is set */ |
| bogdanm | 0:9b334a45a8ff | 513 | if(SPDIFRX_WaitOnFlagUntilTimeout(hspdif, SPDIFRX_FLAG_SYNCD, RESET, Timeout) != HAL_OK) |
| bogdanm | 0:9b334a45a8ff | 514 | { |
| bogdanm | 0:9b334a45a8ff | 515 | return HAL_TIMEOUT; |
| bogdanm | 0:9b334a45a8ff | 516 | } |
| bogdanm | 0:9b334a45a8ff | 517 | |
| bogdanm | 0:9b334a45a8ff | 518 | /* Start reception */ |
| bogdanm | 0:9b334a45a8ff | 519 | __HAL_SPDIFRX_RCV(hspdif); |
| bogdanm | 0:9b334a45a8ff | 520 | |
| bogdanm | 0:9b334a45a8ff | 521 | /* Receive control flow */ |
| bogdanm | 0:9b334a45a8ff | 522 | while(Size > 0) |
| bogdanm | 0:9b334a45a8ff | 523 | { |
| bogdanm | 0:9b334a45a8ff | 524 | /* Wait until CSRNE flag is set */ |
| bogdanm | 0:9b334a45a8ff | 525 | if(SPDIFRX_WaitOnFlagUntilTimeout(hspdif, SPDIFRX_FLAG_CSRNE, RESET, Timeout) != HAL_OK) |
| bogdanm | 0:9b334a45a8ff | 526 | { |
| bogdanm | 0:9b334a45a8ff | 527 | return HAL_TIMEOUT; |
| bogdanm | 0:9b334a45a8ff | 528 | } |
| bogdanm | 0:9b334a45a8ff | 529 | |
| bogdanm | 0:9b334a45a8ff | 530 | (*pData++) = hspdif->Instance->CSR; |
| bogdanm | 0:9b334a45a8ff | 531 | Size--; |
| bogdanm | 0:9b334a45a8ff | 532 | } |
| bogdanm | 0:9b334a45a8ff | 533 | |
| bogdanm | 0:9b334a45a8ff | 534 | /* SPDIFRX ready */ |
| bogdanm | 0:9b334a45a8ff | 535 | hspdif->State = HAL_SPDIFRX_STATE_READY; |
| bogdanm | 0:9b334a45a8ff | 536 | |
| bogdanm | 0:9b334a45a8ff | 537 | /* Process Unlocked */ |
| bogdanm | 0:9b334a45a8ff | 538 | __HAL_UNLOCK(hspdif); |
| bogdanm | 0:9b334a45a8ff | 539 | |
| bogdanm | 0:9b334a45a8ff | 540 | return HAL_OK; |
| bogdanm | 0:9b334a45a8ff | 541 | } |
| bogdanm | 0:9b334a45a8ff | 542 | else |
| bogdanm | 0:9b334a45a8ff | 543 | { |
| bogdanm | 0:9b334a45a8ff | 544 | return HAL_BUSY; |
| bogdanm | 0:9b334a45a8ff | 545 | } |
| bogdanm | 0:9b334a45a8ff | 546 | } |
| bogdanm | 0:9b334a45a8ff | 547 | /** |
| bogdanm | 0:9b334a45a8ff | 548 | * @brief Receive an amount of data (Data Flow) in non-blocking mode with Interrupt |
| bogdanm | 0:9b334a45a8ff | 549 | * @param hspdif: SPDIFRX handle |
| bogdanm | 0:9b334a45a8ff | 550 | * @param pData: a 32-bit pointer to the Receive data buffer. |
| bogdanm | 0:9b334a45a8ff | 551 | * @param Size: number of data sample to be received . |
| bogdanm | 0:9b334a45a8ff | 552 | * @retval HAL status |
| bogdanm | 0:9b334a45a8ff | 553 | */ |
| bogdanm | 0:9b334a45a8ff | 554 | HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow_IT(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size) |
| bogdanm | 0:9b334a45a8ff | 555 | { |
| bogdanm | 0:9b334a45a8ff | 556 | if((hspdif->State == HAL_SPDIFRX_STATE_READY) || (hspdif->State == HAL_SPDIFRX_STATE_BUSY_CX)) |
| bogdanm | 0:9b334a45a8ff | 557 | { |
| bogdanm | 0:9b334a45a8ff | 558 | if((pData == NULL) || (Size == 0)) |
| bogdanm | 0:9b334a45a8ff | 559 | { |
| bogdanm | 0:9b334a45a8ff | 560 | return HAL_ERROR; |
| bogdanm | 0:9b334a45a8ff | 561 | } |
| bogdanm | 0:9b334a45a8ff | 562 | |
| bogdanm | 0:9b334a45a8ff | 563 | /* Process Locked */ |
| bogdanm | 0:9b334a45a8ff | 564 | __HAL_LOCK(hspdif); |
| bogdanm | 0:9b334a45a8ff | 565 | |
| bogdanm | 0:9b334a45a8ff | 566 | hspdif->pRxBuffPtr = pData; |
| bogdanm | 0:9b334a45a8ff | 567 | hspdif->RxXferSize = Size; |
| bogdanm | 0:9b334a45a8ff | 568 | hspdif->RxXferCount = Size; |
| bogdanm | 0:9b334a45a8ff | 569 | |
| bogdanm | 0:9b334a45a8ff | 570 | hspdif->ErrorCode = HAL_SPDIFRX_ERROR_NONE; |
| bogdanm | 0:9b334a45a8ff | 571 | |
| bogdanm | 0:9b334a45a8ff | 572 | /* Check if a receive process is ongoing or not */ |
| bogdanm | 0:9b334a45a8ff | 573 | hspdif->State = HAL_SPDIFRX_STATE_BUSY_RX; |
| bogdanm | 0:9b334a45a8ff | 574 | |
| bogdanm | 0:9b334a45a8ff | 575 | |
| bogdanm | 0:9b334a45a8ff | 576 | /* Enable the SPDIFRX PE Error Interrupt */ |
| bogdanm | 0:9b334a45a8ff | 577 | __HAL_SPDIFRX_ENABLE_IT(hspdif, SPDIFRX_IT_PERRIE); |
| bogdanm | 0:9b334a45a8ff | 578 | |
| bogdanm | 0:9b334a45a8ff | 579 | /* Enable the SPDIFRX OVR Error Interrupt */ |
| bogdanm | 0:9b334a45a8ff | 580 | __HAL_SPDIFRX_ENABLE_IT(hspdif, SPDIFRX_IT_OVRIE); |
| bogdanm | 0:9b334a45a8ff | 581 | |
| bogdanm | 0:9b334a45a8ff | 582 | /* Process Unlocked */ |
| bogdanm | 0:9b334a45a8ff | 583 | __HAL_UNLOCK(hspdif); |
| bogdanm | 0:9b334a45a8ff | 584 | |
| bogdanm | 0:9b334a45a8ff | 585 | /* Enable the SPDIFRX RXNE interrupt */ |
| bogdanm | 0:9b334a45a8ff | 586 | __HAL_SPDIFRX_ENABLE_IT(hspdif, SPDIFRX_IT_RXNE); |
| bogdanm | 0:9b334a45a8ff | 587 | |
| bogdanm | 0:9b334a45a8ff | 588 | if (((SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != SPDIFRX_STATE_SYNC) || ((SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != 0x00)) |
| bogdanm | 0:9b334a45a8ff | 589 | { |
| bogdanm | 0:9b334a45a8ff | 590 | /* Start synchronization */ |
| bogdanm | 0:9b334a45a8ff | 591 | __HAL_SPDIFRX_SYNC(hspdif); |
| bogdanm | 0:9b334a45a8ff | 592 | |
| bogdanm | 0:9b334a45a8ff | 593 | /* Wait until SYNCD flag is set */ |
| bogdanm | 0:9b334a45a8ff | 594 | if(SPDIFRX_WaitOnFlagUntilTimeout(hspdif, SPDIFRX_FLAG_SYNCD, RESET, SPDIFRX_TIMEOUT_VALUE) != HAL_OK) |
| bogdanm | 0:9b334a45a8ff | 595 | { |
| bogdanm | 0:9b334a45a8ff | 596 | return HAL_TIMEOUT; |
| bogdanm | 0:9b334a45a8ff | 597 | } |
| bogdanm | 0:9b334a45a8ff | 598 | |
| bogdanm | 0:9b334a45a8ff | 599 | /* Start reception */ |
| bogdanm | 0:9b334a45a8ff | 600 | __HAL_SPDIFRX_RCV(hspdif); |
| bogdanm | 0:9b334a45a8ff | 601 | } |
| bogdanm | 0:9b334a45a8ff | 602 | |
| bogdanm | 0:9b334a45a8ff | 603 | return HAL_OK; |
| bogdanm | 0:9b334a45a8ff | 604 | } |
| bogdanm | 0:9b334a45a8ff | 605 | else |
| bogdanm | 0:9b334a45a8ff | 606 | { |
| bogdanm | 0:9b334a45a8ff | 607 | return HAL_BUSY; |
| bogdanm | 0:9b334a45a8ff | 608 | } |
| bogdanm | 0:9b334a45a8ff | 609 | } |
| bogdanm | 0:9b334a45a8ff | 610 | |
| bogdanm | 0:9b334a45a8ff | 611 | /** |
| bogdanm | 0:9b334a45a8ff | 612 | * @brief Receive an amount of data (Control Flow) with Interrupt |
| bogdanm | 0:9b334a45a8ff | 613 | * @param hspdif: SPDIFRX handle |
| bogdanm | 0:9b334a45a8ff | 614 | * @param pData: a 32-bit pointer to the Receive data buffer. |
| bogdanm | 0:9b334a45a8ff | 615 | * @param Size: number of data sample (Control Flow) to be received : |
| bogdanm | 0:9b334a45a8ff | 616 | * @retval HAL status |
| bogdanm | 0:9b334a45a8ff | 617 | */ |
| bogdanm | 0:9b334a45a8ff | 618 | HAL_StatusTypeDef HAL_SPDIFRX_ReceiveControlFlow_IT(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size) |
| bogdanm | 0:9b334a45a8ff | 619 | { |
| bogdanm | 0:9b334a45a8ff | 620 | if((hspdif->State == HAL_SPDIFRX_STATE_READY) || (hspdif->State == HAL_SPDIFRX_STATE_BUSY_RX)) |
| bogdanm | 0:9b334a45a8ff | 621 | { |
| bogdanm | 0:9b334a45a8ff | 622 | if((pData == NULL ) || (Size == 0)) |
| bogdanm | 0:9b334a45a8ff | 623 | { |
| bogdanm | 0:9b334a45a8ff | 624 | return HAL_ERROR; |
| bogdanm | 0:9b334a45a8ff | 625 | } |
| bogdanm | 0:9b334a45a8ff | 626 | |
| bogdanm | 0:9b334a45a8ff | 627 | /* Process Locked */ |
| bogdanm | 0:9b334a45a8ff | 628 | __HAL_LOCK(hspdif); |
| bogdanm | 0:9b334a45a8ff | 629 | |
| bogdanm | 0:9b334a45a8ff | 630 | hspdif->pCsBuffPtr = pData; |
| bogdanm | 0:9b334a45a8ff | 631 | hspdif->CsXferSize = Size; |
| bogdanm | 0:9b334a45a8ff | 632 | hspdif->CsXferCount = Size; |
| bogdanm | 0:9b334a45a8ff | 633 | |
| bogdanm | 0:9b334a45a8ff | 634 | hspdif->ErrorCode = HAL_SPDIFRX_ERROR_NONE; |
| bogdanm | 0:9b334a45a8ff | 635 | |
| bogdanm | 0:9b334a45a8ff | 636 | /* Check if a receive process is ongoing or not */ |
| bogdanm | 0:9b334a45a8ff | 637 | hspdif->State = HAL_SPDIFRX_STATE_BUSY_CX; |
| bogdanm | 0:9b334a45a8ff | 638 | |
| bogdanm | 0:9b334a45a8ff | 639 | |
| bogdanm | 0:9b334a45a8ff | 640 | /* Enable the SPDIFRX PE Error Interrupt */ |
| bogdanm | 0:9b334a45a8ff | 641 | __HAL_SPDIFRX_ENABLE_IT(hspdif, SPDIFRX_IT_PERRIE); |
| bogdanm | 0:9b334a45a8ff | 642 | |
| bogdanm | 0:9b334a45a8ff | 643 | /* Enable the SPDIFRX OVR Error Interrupt */ |
| bogdanm | 0:9b334a45a8ff | 644 | __HAL_SPDIFRX_ENABLE_IT(hspdif, SPDIFRX_IT_OVRIE); |
| bogdanm | 0:9b334a45a8ff | 645 | |
| bogdanm | 0:9b334a45a8ff | 646 | /* Process Unlocked */ |
| bogdanm | 0:9b334a45a8ff | 647 | __HAL_UNLOCK(hspdif); |
| bogdanm | 0:9b334a45a8ff | 648 | |
| bogdanm | 0:9b334a45a8ff | 649 | /* Enable the SPDIFRX CSRNE interrupt */ |
| bogdanm | 0:9b334a45a8ff | 650 | __HAL_SPDIFRX_ENABLE_IT(hspdif, SPDIFRX_IT_CSRNE); |
| bogdanm | 0:9b334a45a8ff | 651 | |
| bogdanm | 0:9b334a45a8ff | 652 | if (((SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != SPDIFRX_STATE_SYNC) || ((SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != 0x00)) |
| bogdanm | 0:9b334a45a8ff | 653 | { |
| bogdanm | 0:9b334a45a8ff | 654 | /* Start synchronization */ |
| bogdanm | 0:9b334a45a8ff | 655 | __HAL_SPDIFRX_SYNC(hspdif); |
| bogdanm | 0:9b334a45a8ff | 656 | |
| bogdanm | 0:9b334a45a8ff | 657 | /* Wait until SYNCD flag is set */ |
| bogdanm | 0:9b334a45a8ff | 658 | if(SPDIFRX_WaitOnFlagUntilTimeout(hspdif, SPDIFRX_FLAG_SYNCD, RESET, SPDIFRX_TIMEOUT_VALUE) != HAL_OK) |
| bogdanm | 0:9b334a45a8ff | 659 | { |
| bogdanm | 0:9b334a45a8ff | 660 | return HAL_TIMEOUT; |
| bogdanm | 0:9b334a45a8ff | 661 | } |
| bogdanm | 0:9b334a45a8ff | 662 | |
| bogdanm | 0:9b334a45a8ff | 663 | /* Start reception */ |
| bogdanm | 0:9b334a45a8ff | 664 | __HAL_SPDIFRX_RCV(hspdif); |
| bogdanm | 0:9b334a45a8ff | 665 | } |
| bogdanm | 0:9b334a45a8ff | 666 | |
| bogdanm | 0:9b334a45a8ff | 667 | return HAL_OK; |
| bogdanm | 0:9b334a45a8ff | 668 | } |
| bogdanm | 0:9b334a45a8ff | 669 | else |
| bogdanm | 0:9b334a45a8ff | 670 | { |
| bogdanm | 0:9b334a45a8ff | 671 | return HAL_BUSY; |
| bogdanm | 0:9b334a45a8ff | 672 | } |
| bogdanm | 0:9b334a45a8ff | 673 | } |
| bogdanm | 0:9b334a45a8ff | 674 | |
| bogdanm | 0:9b334a45a8ff | 675 | /** |
| bogdanm | 0:9b334a45a8ff | 676 | * @brief Receive an amount of data (Data Flow) mode with DMA |
| bogdanm | 0:9b334a45a8ff | 677 | * @param hspdif: SPDIFRX handle |
| bogdanm | 0:9b334a45a8ff | 678 | * @param pData: a 32-bit pointer to the Receive data buffer. |
| bogdanm | 0:9b334a45a8ff | 679 | * @param Size: number of data sample to be received : |
| bogdanm | 0:9b334a45a8ff | 680 | * @retval HAL status |
| bogdanm | 0:9b334a45a8ff | 681 | */ |
| bogdanm | 0:9b334a45a8ff | 682 | HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow_DMA(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size) |
| bogdanm | 0:9b334a45a8ff | 683 | { |
| bogdanm | 0:9b334a45a8ff | 684 | |
| bogdanm | 0:9b334a45a8ff | 685 | if((pData == NULL) || (Size == 0)) |
| bogdanm | 0:9b334a45a8ff | 686 | { |
| bogdanm | 0:9b334a45a8ff | 687 | return HAL_ERROR; |
| bogdanm | 0:9b334a45a8ff | 688 | } |
| bogdanm | 0:9b334a45a8ff | 689 | |
| bogdanm | 0:9b334a45a8ff | 690 | if((hspdif->State == HAL_SPDIFRX_STATE_READY) || (hspdif->State == HAL_SPDIFRX_STATE_BUSY_CX)) |
| bogdanm | 0:9b334a45a8ff | 691 | { |
| bogdanm | 0:9b334a45a8ff | 692 | hspdif->pRxBuffPtr = pData; |
| bogdanm | 0:9b334a45a8ff | 693 | hspdif->RxXferSize = Size; |
| bogdanm | 0:9b334a45a8ff | 694 | hspdif->RxXferCount = Size; |
| bogdanm | 0:9b334a45a8ff | 695 | |
| bogdanm | 0:9b334a45a8ff | 696 | /* Process Locked */ |
| bogdanm | 0:9b334a45a8ff | 697 | __HAL_LOCK(hspdif); |
| bogdanm | 0:9b334a45a8ff | 698 | |
| bogdanm | 0:9b334a45a8ff | 699 | hspdif->ErrorCode = HAL_SPDIFRX_ERROR_NONE; |
| bogdanm | 0:9b334a45a8ff | 700 | hspdif->State = HAL_SPDIFRX_STATE_BUSY_RX; |
| bogdanm | 0:9b334a45a8ff | 701 | |
| bogdanm | 0:9b334a45a8ff | 702 | /* Set the SPDIFRX Rx DMA Half transfer complete callback */ |
| bogdanm | 0:9b334a45a8ff | 703 | hspdif->hdmaDrRx->XferHalfCpltCallback = SPDIFRX_DMARxHalfCplt; |
| bogdanm | 0:9b334a45a8ff | 704 | |
| bogdanm | 0:9b334a45a8ff | 705 | /* Set the SPDIFRX Rx DMA transfer complete callback */ |
| bogdanm | 0:9b334a45a8ff | 706 | hspdif->hdmaDrRx->XferCpltCallback = SPDIFRX_DMARxCplt; |
| bogdanm | 0:9b334a45a8ff | 707 | |
| bogdanm | 0:9b334a45a8ff | 708 | /* Set the DMA error callback */ |
| bogdanm | 0:9b334a45a8ff | 709 | hspdif->hdmaDrRx->XferErrorCallback = SPDIFRX_DMAError; |
| bogdanm | 0:9b334a45a8ff | 710 | |
| bogdanm | 0:9b334a45a8ff | 711 | /* Enable the DMA request */ |
| bogdanm | 0:9b334a45a8ff | 712 | HAL_DMA_Start_IT(hspdif->hdmaDrRx, (uint32_t)&hspdif->Instance->DR, (uint32_t)hspdif->pRxBuffPtr, Size); |
| bogdanm | 0:9b334a45a8ff | 713 | |
| bogdanm | 0:9b334a45a8ff | 714 | /* Enable RXDMAEN bit in SPDIFRX CR register for data flow reception*/ |
| bogdanm | 0:9b334a45a8ff | 715 | hspdif->Instance->CR |= SPDIFRX_CR_RXDMAEN; |
| bogdanm | 0:9b334a45a8ff | 716 | |
| bogdanm | 0:9b334a45a8ff | 717 | if (((SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != SPDIFRX_STATE_SYNC) || ((SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != 0x00)) |
| bogdanm | 0:9b334a45a8ff | 718 | { |
| bogdanm | 0:9b334a45a8ff | 719 | /* Start synchronization */ |
| bogdanm | 0:9b334a45a8ff | 720 | __HAL_SPDIFRX_SYNC(hspdif); |
| bogdanm | 0:9b334a45a8ff | 721 | |
| bogdanm | 0:9b334a45a8ff | 722 | /* Wait until SYNCD flag is set */ |
| bogdanm | 0:9b334a45a8ff | 723 | if(SPDIFRX_WaitOnFlagUntilTimeout(hspdif, SPDIFRX_FLAG_SYNCD, RESET, SPDIFRX_TIMEOUT_VALUE) != HAL_OK) |
| bogdanm | 0:9b334a45a8ff | 724 | { |
| bogdanm | 0:9b334a45a8ff | 725 | return HAL_TIMEOUT; |
| bogdanm | 0:9b334a45a8ff | 726 | } |
| bogdanm | 0:9b334a45a8ff | 727 | |
| bogdanm | 0:9b334a45a8ff | 728 | /* Start reception */ |
| bogdanm | 0:9b334a45a8ff | 729 | __HAL_SPDIFRX_RCV(hspdif); |
| bogdanm | 0:9b334a45a8ff | 730 | } |
| bogdanm | 0:9b334a45a8ff | 731 | |
| bogdanm | 0:9b334a45a8ff | 732 | /* Process Unlocked */ |
| bogdanm | 0:9b334a45a8ff | 733 | __HAL_UNLOCK(hspdif); |
| bogdanm | 0:9b334a45a8ff | 734 | |
| bogdanm | 0:9b334a45a8ff | 735 | return HAL_OK; |
| bogdanm | 0:9b334a45a8ff | 736 | } |
| bogdanm | 0:9b334a45a8ff | 737 | else |
| bogdanm | 0:9b334a45a8ff | 738 | { |
| bogdanm | 0:9b334a45a8ff | 739 | return HAL_BUSY; |
| bogdanm | 0:9b334a45a8ff | 740 | } |
| bogdanm | 0:9b334a45a8ff | 741 | } |
| bogdanm | 0:9b334a45a8ff | 742 | |
| bogdanm | 0:9b334a45a8ff | 743 | /** |
| bogdanm | 0:9b334a45a8ff | 744 | * @brief Receive an amount of data (Control Flow) with DMA |
| bogdanm | 0:9b334a45a8ff | 745 | * @param hspdif: SPDIFRX handle |
| bogdanm | 0:9b334a45a8ff | 746 | * @param pData: a 32-bit pointer to the Receive data buffer. |
| bogdanm | 0:9b334a45a8ff | 747 | * @param Size: number of data (Control Flow) sample to be received : |
| bogdanm | 0:9b334a45a8ff | 748 | * @retval HAL status |
| bogdanm | 0:9b334a45a8ff | 749 | */ |
| bogdanm | 0:9b334a45a8ff | 750 | HAL_StatusTypeDef HAL_SPDIFRX_ReceiveControlFlow_DMA(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size) |
| bogdanm | 0:9b334a45a8ff | 751 | { |
| bogdanm | 0:9b334a45a8ff | 752 | |
| bogdanm | 0:9b334a45a8ff | 753 | if((pData == NULL) || (Size == 0)) |
| bogdanm | 0:9b334a45a8ff | 754 | { |
| bogdanm | 0:9b334a45a8ff | 755 | return HAL_ERROR; |
| bogdanm | 0:9b334a45a8ff | 756 | } |
| bogdanm | 0:9b334a45a8ff | 757 | |
| bogdanm | 0:9b334a45a8ff | 758 | if((hspdif->State == HAL_SPDIFRX_STATE_READY) || (hspdif->State == HAL_SPDIFRX_STATE_BUSY_RX)) |
| bogdanm | 0:9b334a45a8ff | 759 | { |
| bogdanm | 0:9b334a45a8ff | 760 | hspdif->pCsBuffPtr = pData; |
| bogdanm | 0:9b334a45a8ff | 761 | hspdif->CsXferSize = Size; |
| bogdanm | 0:9b334a45a8ff | 762 | hspdif->CsXferCount = Size; |
| bogdanm | 0:9b334a45a8ff | 763 | |
| bogdanm | 0:9b334a45a8ff | 764 | /* Process Locked */ |
| bogdanm | 0:9b334a45a8ff | 765 | __HAL_LOCK(hspdif); |
| bogdanm | 0:9b334a45a8ff | 766 | |
| bogdanm | 0:9b334a45a8ff | 767 | hspdif->ErrorCode = HAL_SPDIFRX_ERROR_NONE; |
| bogdanm | 0:9b334a45a8ff | 768 | hspdif->State = HAL_SPDIFRX_STATE_BUSY_CX; |
| bogdanm | 0:9b334a45a8ff | 769 | |
| bogdanm | 0:9b334a45a8ff | 770 | /* Set the SPDIFRX Rx DMA Half transfer complete callback */ |
| bogdanm | 0:9b334a45a8ff | 771 | hspdif->hdmaCsRx->XferHalfCpltCallback = SPDIFRX_DMACxHalfCplt; |
| bogdanm | 0:9b334a45a8ff | 772 | |
| bogdanm | 0:9b334a45a8ff | 773 | /* Set the SPDIFRX Rx DMA transfer complete callback */ |
| bogdanm | 0:9b334a45a8ff | 774 | hspdif->hdmaCsRx->XferCpltCallback = SPDIFRX_DMACxCplt; |
| bogdanm | 0:9b334a45a8ff | 775 | |
| bogdanm | 0:9b334a45a8ff | 776 | /* Set the DMA error callback */ |
| bogdanm | 0:9b334a45a8ff | 777 | hspdif->hdmaCsRx->XferErrorCallback = SPDIFRX_DMAError; |
| bogdanm | 0:9b334a45a8ff | 778 | |
| bogdanm | 0:9b334a45a8ff | 779 | /* Enable the DMA request */ |
| bogdanm | 0:9b334a45a8ff | 780 | HAL_DMA_Start_IT(hspdif->hdmaCsRx, (uint32_t)&hspdif->Instance->CSR, (uint32_t)hspdif->pCsBuffPtr, Size); |
| bogdanm | 0:9b334a45a8ff | 781 | |
| bogdanm | 0:9b334a45a8ff | 782 | /* Enable CBDMAEN bit in SPDIFRX CR register for control flow reception*/ |
| bogdanm | 0:9b334a45a8ff | 783 | hspdif->Instance->CR |= SPDIFRX_CR_CBDMAEN; |
| bogdanm | 0:9b334a45a8ff | 784 | |
| bogdanm | 0:9b334a45a8ff | 785 | if (((SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != SPDIFRX_STATE_SYNC) || ((SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != 0x00)) |
| bogdanm | 0:9b334a45a8ff | 786 | { |
| bogdanm | 0:9b334a45a8ff | 787 | /* Start synchronization */ |
| bogdanm | 0:9b334a45a8ff | 788 | __HAL_SPDIFRX_SYNC(hspdif); |
| bogdanm | 0:9b334a45a8ff | 789 | |
| bogdanm | 0:9b334a45a8ff | 790 | /* Wait until SYNCD flag is set */ |
| bogdanm | 0:9b334a45a8ff | 791 | if(SPDIFRX_WaitOnFlagUntilTimeout(hspdif, SPDIFRX_FLAG_SYNCD, RESET, SPDIFRX_TIMEOUT_VALUE) != HAL_OK) |
| bogdanm | 0:9b334a45a8ff | 792 | { |
| bogdanm | 0:9b334a45a8ff | 793 | return HAL_TIMEOUT; |
| bogdanm | 0:9b334a45a8ff | 794 | } |
| bogdanm | 0:9b334a45a8ff | 795 | |
| bogdanm | 0:9b334a45a8ff | 796 | /* Start reception */ |
| bogdanm | 0:9b334a45a8ff | 797 | __HAL_SPDIFRX_RCV(hspdif); |
| bogdanm | 0:9b334a45a8ff | 798 | } |
| bogdanm | 0:9b334a45a8ff | 799 | |
| bogdanm | 0:9b334a45a8ff | 800 | /* Process Unlocked */ |
| bogdanm | 0:9b334a45a8ff | 801 | __HAL_UNLOCK(hspdif); |
| bogdanm | 0:9b334a45a8ff | 802 | |
| bogdanm | 0:9b334a45a8ff | 803 | return HAL_OK; |
| bogdanm | 0:9b334a45a8ff | 804 | } |
| bogdanm | 0:9b334a45a8ff | 805 | else |
| bogdanm | 0:9b334a45a8ff | 806 | { |
| bogdanm | 0:9b334a45a8ff | 807 | return HAL_BUSY; |
| bogdanm | 0:9b334a45a8ff | 808 | } |
| bogdanm | 0:9b334a45a8ff | 809 | } |
| bogdanm | 0:9b334a45a8ff | 810 | |
| bogdanm | 0:9b334a45a8ff | 811 | /** |
| bogdanm | 0:9b334a45a8ff | 812 | * @brief stop the audio stream receive from the Media. |
| bogdanm | 0:9b334a45a8ff | 813 | * @param hspdif: SPDIFRX handle |
| bogdanm | 0:9b334a45a8ff | 814 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 815 | */ |
| bogdanm | 0:9b334a45a8ff | 816 | HAL_StatusTypeDef HAL_SPDIFRX_DMAStop(SPDIFRX_HandleTypeDef *hspdif) |
| bogdanm | 0:9b334a45a8ff | 817 | { |
| bogdanm | 0:9b334a45a8ff | 818 | /* Process Locked */ |
| bogdanm | 0:9b334a45a8ff | 819 | __HAL_LOCK(hspdif); |
| bogdanm | 0:9b334a45a8ff | 820 | |
| bogdanm | 0:9b334a45a8ff | 821 | /* Disable the SPDIFRX DMA requests */ |
| bogdanm | 0:9b334a45a8ff | 822 | hspdif->Instance->CR &= (uint16_t)(~SPDIFRX_CR_RXDMAEN); |
| bogdanm | 0:9b334a45a8ff | 823 | hspdif->Instance->CR &= (uint16_t)(~SPDIFRX_CR_CBDMAEN); |
| bogdanm | 0:9b334a45a8ff | 824 | |
| bogdanm | 0:9b334a45a8ff | 825 | /* Disable the SPDIFRX DMA channel */ |
| bogdanm | 0:9b334a45a8ff | 826 | __HAL_DMA_DISABLE(hspdif->hdmaDrRx); |
| bogdanm | 0:9b334a45a8ff | 827 | __HAL_DMA_DISABLE(hspdif->hdmaCsRx); |
| bogdanm | 0:9b334a45a8ff | 828 | |
| bogdanm | 0:9b334a45a8ff | 829 | /* Disable SPDIFRX peripheral */ |
| bogdanm | 0:9b334a45a8ff | 830 | __HAL_SPDIFRX_IDLE(hspdif); |
| bogdanm | 0:9b334a45a8ff | 831 | |
| bogdanm | 0:9b334a45a8ff | 832 | hspdif->State = HAL_SPDIFRX_STATE_READY; |
| bogdanm | 0:9b334a45a8ff | 833 | |
| bogdanm | 0:9b334a45a8ff | 834 | /* Process Unlocked */ |
| bogdanm | 0:9b334a45a8ff | 835 | __HAL_UNLOCK(hspdif); |
| bogdanm | 0:9b334a45a8ff | 836 | |
| bogdanm | 0:9b334a45a8ff | 837 | return HAL_OK; |
| bogdanm | 0:9b334a45a8ff | 838 | } |
| bogdanm | 0:9b334a45a8ff | 839 | |
| bogdanm | 0:9b334a45a8ff | 840 | /** |
| bogdanm | 0:9b334a45a8ff | 841 | * @brief This function handles SPDIFRX interrupt request. |
| bogdanm | 0:9b334a45a8ff | 842 | * @param hspdif: SPDIFRX handle |
| bogdanm | 0:9b334a45a8ff | 843 | * @retval HAL status |
| bogdanm | 0:9b334a45a8ff | 844 | */ |
| bogdanm | 0:9b334a45a8ff | 845 | void HAL_SPDIFRX_IRQHandler(SPDIFRX_HandleTypeDef *hspdif) |
| bogdanm | 0:9b334a45a8ff | 846 | { |
| bogdanm | 0:9b334a45a8ff | 847 | /* SPDIFRX in mode Data Flow Reception ------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 848 | if((__HAL_SPDIFRX_GET_FLAG(hspdif, SPDIFRX_FLAG_RXNE) != RESET) && (__HAL_SPDIFRX_GET_IT_SOURCE(hspdif, SPDIFRX_IT_RXNE) != RESET)) |
| bogdanm | 0:9b334a45a8ff | 849 | { |
| bogdanm | 0:9b334a45a8ff | 850 | __HAL_SPDIFRX_CLEAR_IT(hspdif, SPDIFRX_IT_RXNE); |
| bogdanm | 0:9b334a45a8ff | 851 | SPDIFRX_ReceiveDataFlow_IT(hspdif); |
| bogdanm | 0:9b334a45a8ff | 852 | } |
| bogdanm | 0:9b334a45a8ff | 853 | |
| bogdanm | 0:9b334a45a8ff | 854 | /* SPDIFRX in mode Control Flow Reception ------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 855 | if((__HAL_SPDIFRX_GET_FLAG(hspdif, SPDIFRX_FLAG_CSRNE) != RESET) && (__HAL_SPDIFRX_GET_IT_SOURCE(hspdif, SPDIFRX_IT_CSRNE) != RESET)) |
| bogdanm | 0:9b334a45a8ff | 856 | { |
| bogdanm | 0:9b334a45a8ff | 857 | __HAL_SPDIFRX_CLEAR_IT(hspdif, SPDIFRX_IT_CSRNE); |
| bogdanm | 0:9b334a45a8ff | 858 | SPDIFRX_ReceiveControlFlow_IT(hspdif); |
| bogdanm | 0:9b334a45a8ff | 859 | } |
| bogdanm | 0:9b334a45a8ff | 860 | |
| bogdanm | 0:9b334a45a8ff | 861 | /* SPDIFRX Overrun error interrupt occurred ---------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 862 | if((__HAL_SPDIFRX_GET_FLAG(hspdif, SPDIFRX_FLAG_OVR) != RESET) && (__HAL_SPDIFRX_GET_IT_SOURCE(hspdif, SPDIFRX_IT_OVRIE) != RESET)) |
| bogdanm | 0:9b334a45a8ff | 863 | { |
| bogdanm | 0:9b334a45a8ff | 864 | __HAL_SPDIFRX_CLEAR_IT(hspdif, SPDIFRX_FLAG_OVR); |
| bogdanm | 0:9b334a45a8ff | 865 | |
| bogdanm | 0:9b334a45a8ff | 866 | /* Change the SPDIFRX error code */ |
| bogdanm | 0:9b334a45a8ff | 867 | hspdif->ErrorCode |= HAL_SPDIFRX_ERROR_OVR; |
| bogdanm | 0:9b334a45a8ff | 868 | |
| bogdanm | 0:9b334a45a8ff | 869 | /* the transfer is not stopped */ |
| bogdanm | 0:9b334a45a8ff | 870 | HAL_SPDIFRX_ErrorCallback(hspdif); |
| bogdanm | 0:9b334a45a8ff | 871 | } |
| bogdanm | 0:9b334a45a8ff | 872 | |
| bogdanm | 0:9b334a45a8ff | 873 | /* SPDIFRX Parity error interrupt occurred ---------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 874 | if((__HAL_SPDIFRX_GET_FLAG(hspdif, SPDIFRX_FLAG_PERR) != RESET) && (__HAL_SPDIFRX_GET_IT_SOURCE(hspdif, SPDIFRX_IT_PERRIE) != RESET)) |
| bogdanm | 0:9b334a45a8ff | 875 | { |
| bogdanm | 0:9b334a45a8ff | 876 | __HAL_SPDIFRX_CLEAR_IT(hspdif, SPDIFRX_FLAG_PERR); |
| bogdanm | 0:9b334a45a8ff | 877 | |
| bogdanm | 0:9b334a45a8ff | 878 | /* Change the SPDIFRX error code */ |
| bogdanm | 0:9b334a45a8ff | 879 | hspdif->ErrorCode |= HAL_SPDIFRX_ERROR_PE; |
| bogdanm | 0:9b334a45a8ff | 880 | |
| bogdanm | 0:9b334a45a8ff | 881 | /* the transfer is not stopped */ |
| bogdanm | 0:9b334a45a8ff | 882 | HAL_SPDIFRX_ErrorCallback(hspdif); |
| bogdanm | 0:9b334a45a8ff | 883 | } |
| bogdanm | 0:9b334a45a8ff | 884 | |
| bogdanm | 0:9b334a45a8ff | 885 | } |
| bogdanm | 0:9b334a45a8ff | 886 | |
| bogdanm | 0:9b334a45a8ff | 887 | /** |
| bogdanm | 0:9b334a45a8ff | 888 | * @brief Rx Transfer (Data flow) half completed callbacks |
| bogdanm | 0:9b334a45a8ff | 889 | * @param hspdif: SPDIFRX handle |
| bogdanm | 0:9b334a45a8ff | 890 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 891 | */ |
| bogdanm | 0:9b334a45a8ff | 892 | __weak void HAL_SPDIFRX_RxHalfCpltCallback(SPDIFRX_HandleTypeDef *hspdif) |
| bogdanm | 0:9b334a45a8ff | 893 | { |
| bogdanm | 0:9b334a45a8ff | 894 | /* NOTE : This function Should not be modified, when the callback is needed, |
| bogdanm | 0:9b334a45a8ff | 895 | the HAL_SPDIFRX_RxCpltCallback could be implemented in the user file |
| bogdanm | 0:9b334a45a8ff | 896 | */ |
| bogdanm | 0:9b334a45a8ff | 897 | } |
| bogdanm | 0:9b334a45a8ff | 898 | |
| bogdanm | 0:9b334a45a8ff | 899 | /** |
| bogdanm | 0:9b334a45a8ff | 900 | * @brief Rx Transfer (Data flow) completed callbacks |
| bogdanm | 0:9b334a45a8ff | 901 | * @param hspdif: SPDIFRX handle |
| bogdanm | 0:9b334a45a8ff | 902 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 903 | */ |
| bogdanm | 0:9b334a45a8ff | 904 | __weak void HAL_SPDIFRX_RxCpltCallback(SPDIFRX_HandleTypeDef *hspdif) |
| bogdanm | 0:9b334a45a8ff | 905 | { |
| bogdanm | 0:9b334a45a8ff | 906 | /* NOTE : This function Should not be modified, when the callback is needed, |
| bogdanm | 0:9b334a45a8ff | 907 | the HAL_SPDIFRX_RxCpltCallback could be implemented in the user file |
| bogdanm | 0:9b334a45a8ff | 908 | */ |
| bogdanm | 0:9b334a45a8ff | 909 | } |
| bogdanm | 0:9b334a45a8ff | 910 | |
| bogdanm | 0:9b334a45a8ff | 911 | /** |
| bogdanm | 0:9b334a45a8ff | 912 | * @brief Rx (Control flow) Transfer half completed callbacks |
| bogdanm | 0:9b334a45a8ff | 913 | * @param hspdif: SPDIFRX handle |
| bogdanm | 0:9b334a45a8ff | 914 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 915 | */ |
| bogdanm | 0:9b334a45a8ff | 916 | __weak void HAL_SPDIFRX_CxHalfCpltCallback(SPDIFRX_HandleTypeDef *hspdif) |
| bogdanm | 0:9b334a45a8ff | 917 | { |
| bogdanm | 0:9b334a45a8ff | 918 | /* NOTE : This function Should not be modified, when the callback is needed, |
| bogdanm | 0:9b334a45a8ff | 919 | the HAL_SPDIFRX_RxCpltCallback could be implemented in the user file |
| bogdanm | 0:9b334a45a8ff | 920 | */ |
| bogdanm | 0:9b334a45a8ff | 921 | } |
| bogdanm | 0:9b334a45a8ff | 922 | |
| bogdanm | 0:9b334a45a8ff | 923 | /** |
| bogdanm | 0:9b334a45a8ff | 924 | * @brief Rx Transfer (Control flow) completed callbacks |
| bogdanm | 0:9b334a45a8ff | 925 | * @param hspdif: SPDIFRX handle |
| bogdanm | 0:9b334a45a8ff | 926 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 927 | */ |
| bogdanm | 0:9b334a45a8ff | 928 | __weak void HAL_SPDIFRX_CxCpltCallback(SPDIFRX_HandleTypeDef *hspdif) |
| bogdanm | 0:9b334a45a8ff | 929 | { |
| bogdanm | 0:9b334a45a8ff | 930 | /* NOTE : This function Should not be modified, when the callback is needed, |
| bogdanm | 0:9b334a45a8ff | 931 | the HAL_SPDIFRX_RxCpltCallback could be implemented in the user file |
| bogdanm | 0:9b334a45a8ff | 932 | */ |
| bogdanm | 0:9b334a45a8ff | 933 | } |
| bogdanm | 0:9b334a45a8ff | 934 | |
| bogdanm | 0:9b334a45a8ff | 935 | /** |
| bogdanm | 0:9b334a45a8ff | 936 | * @brief SPDIFRX error callbacks |
| bogdanm | 0:9b334a45a8ff | 937 | * @param hspdif: SPDIFRX handle |
| bogdanm | 0:9b334a45a8ff | 938 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 939 | */ |
| bogdanm | 0:9b334a45a8ff | 940 | __weak void HAL_SPDIFRX_ErrorCallback(SPDIFRX_HandleTypeDef *hspdif) |
| bogdanm | 0:9b334a45a8ff | 941 | { |
| bogdanm | 0:9b334a45a8ff | 942 | /* NOTE : This function Should not be modified, when the callback is needed, |
| bogdanm | 0:9b334a45a8ff | 943 | the HAL_SPDIFRX_ErrorCallback could be implemented in the user file |
| bogdanm | 0:9b334a45a8ff | 944 | */ |
| bogdanm | 0:9b334a45a8ff | 945 | } |
| bogdanm | 0:9b334a45a8ff | 946 | |
| bogdanm | 0:9b334a45a8ff | 947 | /** |
| bogdanm | 0:9b334a45a8ff | 948 | * @} |
| bogdanm | 0:9b334a45a8ff | 949 | */ |
| bogdanm | 0:9b334a45a8ff | 950 | |
| bogdanm | 0:9b334a45a8ff | 951 | /** @defgroup SPDIFRX_Exported_Functions_Group3 Peripheral State and Errors functions |
| bogdanm | 0:9b334a45a8ff | 952 | * @brief Peripheral State functions |
| bogdanm | 0:9b334a45a8ff | 953 | * |
| bogdanm | 0:9b334a45a8ff | 954 | @verbatim |
| bogdanm | 0:9b334a45a8ff | 955 | =============================================================================== |
| bogdanm | 0:9b334a45a8ff | 956 | ##### Peripheral State and Errors functions ##### |
| bogdanm | 0:9b334a45a8ff | 957 | =============================================================================== |
| bogdanm | 0:9b334a45a8ff | 958 | [..] |
| bogdanm | 0:9b334a45a8ff | 959 | This subsection permit to get in run-time the status of the peripheral |
| bogdanm | 0:9b334a45a8ff | 960 | and the data flow. |
| bogdanm | 0:9b334a45a8ff | 961 | |
| bogdanm | 0:9b334a45a8ff | 962 | @endverbatim |
| bogdanm | 0:9b334a45a8ff | 963 | * @{ |
| bogdanm | 0:9b334a45a8ff | 964 | */ |
| bogdanm | 0:9b334a45a8ff | 965 | |
| bogdanm | 0:9b334a45a8ff | 966 | /** |
| bogdanm | 0:9b334a45a8ff | 967 | * @brief Return the SPDIFRX state |
| bogdanm | 0:9b334a45a8ff | 968 | * @param hspdif : SPDIFRX handle |
| bogdanm | 0:9b334a45a8ff | 969 | * @retval HAL state |
| bogdanm | 0:9b334a45a8ff | 970 | */ |
| bogdanm | 0:9b334a45a8ff | 971 | HAL_SPDIFRX_StateTypeDef HAL_SPDIFRX_GetState(SPDIFRX_HandleTypeDef *hspdif) |
| bogdanm | 0:9b334a45a8ff | 972 | { |
| bogdanm | 0:9b334a45a8ff | 973 | return hspdif->State; |
| bogdanm | 0:9b334a45a8ff | 974 | } |
| bogdanm | 0:9b334a45a8ff | 975 | |
| bogdanm | 0:9b334a45a8ff | 976 | /** |
| bogdanm | 0:9b334a45a8ff | 977 | * @brief Return the SPDIFRX error code |
| bogdanm | 0:9b334a45a8ff | 978 | * @param hspdif : SPDIFRX handle |
| bogdanm | 0:9b334a45a8ff | 979 | * @retval SPDIFRX Error Code |
| bogdanm | 0:9b334a45a8ff | 980 | */ |
| bogdanm | 0:9b334a45a8ff | 981 | uint32_t HAL_SPDIFRX_GetError(SPDIFRX_HandleTypeDef *hspdif) |
| bogdanm | 0:9b334a45a8ff | 982 | { |
| bogdanm | 0:9b334a45a8ff | 983 | return hspdif->ErrorCode; |
| bogdanm | 0:9b334a45a8ff | 984 | } |
| bogdanm | 0:9b334a45a8ff | 985 | |
| bogdanm | 0:9b334a45a8ff | 986 | /** |
| bogdanm | 0:9b334a45a8ff | 987 | * @} |
| bogdanm | 0:9b334a45a8ff | 988 | */ |
| bogdanm | 0:9b334a45a8ff | 989 | |
| bogdanm | 0:9b334a45a8ff | 990 | /** |
| bogdanm | 0:9b334a45a8ff | 991 | * @brief DMA SPDIFRX receive process (Data flow) complete callback |
| bogdanm | 0:9b334a45a8ff | 992 | * @param hdma : DMA handle |
| bogdanm | 0:9b334a45a8ff | 993 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 994 | */ |
| bogdanm | 0:9b334a45a8ff | 995 | static void SPDIFRX_DMARxCplt(DMA_HandleTypeDef *hdma) |
| bogdanm | 0:9b334a45a8ff | 996 | { |
| bogdanm | 0:9b334a45a8ff | 997 | SPDIFRX_HandleTypeDef* hspdif = ( SPDIFRX_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; |
| bogdanm | 0:9b334a45a8ff | 998 | |
| bogdanm | 0:9b334a45a8ff | 999 | /* Disable Rx DMA Request */ |
| bogdanm | 0:9b334a45a8ff | 1000 | hspdif->Instance->CR &= (uint16_t)(~SPDIFRX_CR_RXDMAEN); |
| bogdanm | 0:9b334a45a8ff | 1001 | hspdif->RxXferCount = 0; |
| bogdanm | 0:9b334a45a8ff | 1002 | |
| bogdanm | 0:9b334a45a8ff | 1003 | hspdif->State = HAL_SPDIFRX_STATE_READY; |
| bogdanm | 0:9b334a45a8ff | 1004 | HAL_SPDIFRX_RxCpltCallback(hspdif); |
| bogdanm | 0:9b334a45a8ff | 1005 | } |
| bogdanm | 0:9b334a45a8ff | 1006 | |
| bogdanm | 0:9b334a45a8ff | 1007 | /** |
| bogdanm | 0:9b334a45a8ff | 1008 | * @brief DMA SPDIFRX receive process (Data flow) half complete callback |
| bogdanm | 0:9b334a45a8ff | 1009 | * @param hdma : DMA handle |
| bogdanm | 0:9b334a45a8ff | 1010 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 1011 | */ |
| bogdanm | 0:9b334a45a8ff | 1012 | static void SPDIFRX_DMARxHalfCplt(DMA_HandleTypeDef *hdma) |
| bogdanm | 0:9b334a45a8ff | 1013 | { |
| bogdanm | 0:9b334a45a8ff | 1014 | SPDIFRX_HandleTypeDef* hspdif = (SPDIFRX_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent; |
| bogdanm | 0:9b334a45a8ff | 1015 | |
| bogdanm | 0:9b334a45a8ff | 1016 | HAL_SPDIFRX_RxHalfCpltCallback(hspdif); |
| bogdanm | 0:9b334a45a8ff | 1017 | } |
| bogdanm | 0:9b334a45a8ff | 1018 | |
| bogdanm | 0:9b334a45a8ff | 1019 | |
| bogdanm | 0:9b334a45a8ff | 1020 | /** |
| bogdanm | 0:9b334a45a8ff | 1021 | * @brief DMA SPDIFRX receive process (Control flow) complete callback |
| bogdanm | 0:9b334a45a8ff | 1022 | * @param hdma : DMA handle |
| bogdanm | 0:9b334a45a8ff | 1023 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 1024 | */ |
| bogdanm | 0:9b334a45a8ff | 1025 | static void SPDIFRX_DMACxCplt(DMA_HandleTypeDef *hdma) |
| bogdanm | 0:9b334a45a8ff | 1026 | { |
| bogdanm | 0:9b334a45a8ff | 1027 | SPDIFRX_HandleTypeDef* hspdif = ( SPDIFRX_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; |
| bogdanm | 0:9b334a45a8ff | 1028 | |
| bogdanm | 0:9b334a45a8ff | 1029 | /* Disable Cb DMA Request */ |
| bogdanm | 0:9b334a45a8ff | 1030 | hspdif->Instance->CR &= (uint16_t)(~SPDIFRX_CR_CBDMAEN); |
| bogdanm | 0:9b334a45a8ff | 1031 | hspdif->CsXferCount = 0; |
| bogdanm | 0:9b334a45a8ff | 1032 | |
| bogdanm | 0:9b334a45a8ff | 1033 | hspdif->State = HAL_SPDIFRX_STATE_READY; |
| bogdanm | 0:9b334a45a8ff | 1034 | HAL_SPDIFRX_CxCpltCallback(hspdif); |
| bogdanm | 0:9b334a45a8ff | 1035 | } |
| bogdanm | 0:9b334a45a8ff | 1036 | |
| bogdanm | 0:9b334a45a8ff | 1037 | /** |
| bogdanm | 0:9b334a45a8ff | 1038 | * @brief DMA SPDIFRX receive process (Control flow) half complete callback |
| bogdanm | 0:9b334a45a8ff | 1039 | * @param hdma : DMA handle |
| bogdanm | 0:9b334a45a8ff | 1040 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 1041 | */ |
| bogdanm | 0:9b334a45a8ff | 1042 | static void SPDIFRX_DMACxHalfCplt(DMA_HandleTypeDef *hdma) |
| bogdanm | 0:9b334a45a8ff | 1043 | { |
| bogdanm | 0:9b334a45a8ff | 1044 | SPDIFRX_HandleTypeDef* hspdif = (SPDIFRX_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent; |
| bogdanm | 0:9b334a45a8ff | 1045 | |
| bogdanm | 0:9b334a45a8ff | 1046 | HAL_SPDIFRX_CxHalfCpltCallback(hspdif); |
| bogdanm | 0:9b334a45a8ff | 1047 | } |
| bogdanm | 0:9b334a45a8ff | 1048 | |
| bogdanm | 0:9b334a45a8ff | 1049 | /** |
| bogdanm | 0:9b334a45a8ff | 1050 | * @brief DMA SPDIFRX communication error callback |
| bogdanm | 0:9b334a45a8ff | 1051 | * @param hdma : DMA handle |
| bogdanm | 0:9b334a45a8ff | 1052 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 1053 | */ |
| bogdanm | 0:9b334a45a8ff | 1054 | static void SPDIFRX_DMAError(DMA_HandleTypeDef *hdma) |
| bogdanm | 0:9b334a45a8ff | 1055 | { |
| bogdanm | 0:9b334a45a8ff | 1056 | SPDIFRX_HandleTypeDef* hspdif = ( SPDIFRX_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; |
| bogdanm | 0:9b334a45a8ff | 1057 | |
| bogdanm | 0:9b334a45a8ff | 1058 | /* Disable Rx and Cb DMA Request */ |
| bogdanm | 0:9b334a45a8ff | 1059 | hspdif->Instance->CR &= (uint16_t)(~(SPDIFRX_CR_RXDMAEN | SPDIFRX_CR_CBDMAEN)); |
| bogdanm | 0:9b334a45a8ff | 1060 | hspdif->RxXferCount = 0; |
| bogdanm | 0:9b334a45a8ff | 1061 | |
| bogdanm | 0:9b334a45a8ff | 1062 | hspdif->State= HAL_SPDIFRX_STATE_READY; |
| bogdanm | 0:9b334a45a8ff | 1063 | |
| bogdanm | 0:9b334a45a8ff | 1064 | /* Set the error code and execute error callback*/ |
| bogdanm | 0:9b334a45a8ff | 1065 | hspdif->ErrorCode |= HAL_SPDIFRX_ERROR_DMA; |
| bogdanm | 0:9b334a45a8ff | 1066 | HAL_SPDIFRX_ErrorCallback(hspdif); |
| bogdanm | 0:9b334a45a8ff | 1067 | } |
| bogdanm | 0:9b334a45a8ff | 1068 | |
| bogdanm | 0:9b334a45a8ff | 1069 | |
| bogdanm | 0:9b334a45a8ff | 1070 | /** |
| bogdanm | 0:9b334a45a8ff | 1071 | * @brief Receive an amount of data (Data Flow) with Interrupt |
| bogdanm | 0:9b334a45a8ff | 1072 | * @param hspdif: SPDIFRX handle |
| bogdanm | 0:9b334a45a8ff | 1073 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 1074 | */ |
| bogdanm | 0:9b334a45a8ff | 1075 | static void SPDIFRX_ReceiveDataFlow_IT(SPDIFRX_HandleTypeDef *hspdif) |
| bogdanm | 0:9b334a45a8ff | 1076 | { |
| bogdanm | 0:9b334a45a8ff | 1077 | /* Receive data */ |
| bogdanm | 0:9b334a45a8ff | 1078 | (*hspdif->pRxBuffPtr++) = hspdif->Instance->DR; |
| bogdanm | 0:9b334a45a8ff | 1079 | hspdif->RxXferCount--; |
| bogdanm | 0:9b334a45a8ff | 1080 | |
| bogdanm | 0:9b334a45a8ff | 1081 | if(hspdif->RxXferCount == 0) |
| bogdanm | 0:9b334a45a8ff | 1082 | { |
| bogdanm | 0:9b334a45a8ff | 1083 | /* Disable RXNE/PE and OVR interrupts */ |
| bogdanm | 0:9b334a45a8ff | 1084 | __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_OVRIE | SPDIFRX_IT_PERRIE | SPDIFRX_IT_RXNE); |
| bogdanm | 0:9b334a45a8ff | 1085 | |
| bogdanm | 0:9b334a45a8ff | 1086 | hspdif->State = HAL_SPDIFRX_STATE_READY; |
| bogdanm | 0:9b334a45a8ff | 1087 | |
| bogdanm | 0:9b334a45a8ff | 1088 | /* Process Unlocked */ |
| bogdanm | 0:9b334a45a8ff | 1089 | __HAL_UNLOCK(hspdif); |
| bogdanm | 0:9b334a45a8ff | 1090 | |
| bogdanm | 0:9b334a45a8ff | 1091 | HAL_SPDIFRX_RxCpltCallback(hspdif); |
| bogdanm | 0:9b334a45a8ff | 1092 | } |
| bogdanm | 0:9b334a45a8ff | 1093 | } |
| bogdanm | 0:9b334a45a8ff | 1094 | |
| bogdanm | 0:9b334a45a8ff | 1095 | /** |
| bogdanm | 0:9b334a45a8ff | 1096 | * @brief Receive an amount of data (Control Flow) with Interrupt |
| bogdanm | 0:9b334a45a8ff | 1097 | * @param hspdif: SPDIFRX handle |
| bogdanm | 0:9b334a45a8ff | 1098 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 1099 | */ |
| bogdanm | 0:9b334a45a8ff | 1100 | static void SPDIFRX_ReceiveControlFlow_IT(SPDIFRX_HandleTypeDef *hspdif) |
| bogdanm | 0:9b334a45a8ff | 1101 | { |
| bogdanm | 0:9b334a45a8ff | 1102 | /* Receive data */ |
| bogdanm | 0:9b334a45a8ff | 1103 | (*hspdif->pCsBuffPtr++) = hspdif->Instance->CSR; |
| bogdanm | 0:9b334a45a8ff | 1104 | hspdif->CsXferCount--; |
| bogdanm | 0:9b334a45a8ff | 1105 | |
| bogdanm | 0:9b334a45a8ff | 1106 | if(hspdif->CsXferCount == 0) |
| bogdanm | 0:9b334a45a8ff | 1107 | { |
| bogdanm | 0:9b334a45a8ff | 1108 | /* Disable CSRNE interrupt */ |
| bogdanm | 0:9b334a45a8ff | 1109 | __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_CSRNE); |
| bogdanm | 0:9b334a45a8ff | 1110 | |
| bogdanm | 0:9b334a45a8ff | 1111 | hspdif->State = HAL_SPDIFRX_STATE_READY; |
| bogdanm | 0:9b334a45a8ff | 1112 | |
| bogdanm | 0:9b334a45a8ff | 1113 | /* Process Unlocked */ |
| bogdanm | 0:9b334a45a8ff | 1114 | __HAL_UNLOCK(hspdif); |
| bogdanm | 0:9b334a45a8ff | 1115 | |
| bogdanm | 0:9b334a45a8ff | 1116 | HAL_SPDIFRX_CxCpltCallback(hspdif); |
| bogdanm | 0:9b334a45a8ff | 1117 | } |
| bogdanm | 0:9b334a45a8ff | 1118 | } |
| bogdanm | 0:9b334a45a8ff | 1119 | |
| bogdanm | 0:9b334a45a8ff | 1120 | /** |
| bogdanm | 0:9b334a45a8ff | 1121 | * @brief This function handles SPDIFRX Communication Timeout. |
| bogdanm | 0:9b334a45a8ff | 1122 | * @param hspdif: SPDIFRX handle |
| bogdanm | 0:9b334a45a8ff | 1123 | * @param Flag: Flag checked |
| bogdanm | 0:9b334a45a8ff | 1124 | * @param Status: Value of the flag expected |
| bogdanm | 0:9b334a45a8ff | 1125 | * @param Timeout: Duration of the timeout |
| bogdanm | 0:9b334a45a8ff | 1126 | * @retval HAL status |
| bogdanm | 0:9b334a45a8ff | 1127 | */ |
| bogdanm | 0:9b334a45a8ff | 1128 | static HAL_StatusTypeDef SPDIFRX_WaitOnFlagUntilTimeout(SPDIFRX_HandleTypeDef *hspdif, uint32_t Flag, FlagStatus Status, uint32_t Timeout) |
| bogdanm | 0:9b334a45a8ff | 1129 | { |
| bogdanm | 0:9b334a45a8ff | 1130 | uint32_t tickstart = 0; |
| bogdanm | 0:9b334a45a8ff | 1131 | |
| bogdanm | 0:9b334a45a8ff | 1132 | /* Get tick */ |
| bogdanm | 0:9b334a45a8ff | 1133 | tickstart = HAL_GetTick(); |
| bogdanm | 0:9b334a45a8ff | 1134 | |
| bogdanm | 0:9b334a45a8ff | 1135 | /* Wait until flag is set */ |
| bogdanm | 0:9b334a45a8ff | 1136 | if(Status == RESET) |
| bogdanm | 0:9b334a45a8ff | 1137 | { |
| bogdanm | 0:9b334a45a8ff | 1138 | while(__HAL_SPDIFRX_GET_FLAG(hspdif, Flag) == RESET) |
| bogdanm | 0:9b334a45a8ff | 1139 | { |
| bogdanm | 0:9b334a45a8ff | 1140 | /* Check for the Timeout */ |
| bogdanm | 0:9b334a45a8ff | 1141 | if(Timeout != HAL_MAX_DELAY) |
| bogdanm | 0:9b334a45a8ff | 1142 | { |
| bogdanm | 0:9b334a45a8ff | 1143 | if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout)) |
| bogdanm | 0:9b334a45a8ff | 1144 | { |
| bogdanm | 0:9b334a45a8ff | 1145 | /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */ |
| bogdanm | 0:9b334a45a8ff | 1146 | __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_RXNE); |
| bogdanm | 0:9b334a45a8ff | 1147 | __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_CSRNE); |
| bogdanm | 0:9b334a45a8ff | 1148 | __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_PERRIE); |
| bogdanm | 0:9b334a45a8ff | 1149 | __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_OVRIE); |
| bogdanm | 0:9b334a45a8ff | 1150 | __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SBLKIE); |
| bogdanm | 0:9b334a45a8ff | 1151 | __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SYNCDIE); |
| bogdanm | 0:9b334a45a8ff | 1152 | __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_IFEIE); |
| bogdanm | 0:9b334a45a8ff | 1153 | |
| bogdanm | 0:9b334a45a8ff | 1154 | hspdif->State= HAL_SPDIFRX_STATE_READY; |
| bogdanm | 0:9b334a45a8ff | 1155 | |
| bogdanm | 0:9b334a45a8ff | 1156 | /* Process Unlocked */ |
| bogdanm | 0:9b334a45a8ff | 1157 | __HAL_UNLOCK(hspdif); |
| bogdanm | 0:9b334a45a8ff | 1158 | |
| bogdanm | 0:9b334a45a8ff | 1159 | return HAL_TIMEOUT; |
| bogdanm | 0:9b334a45a8ff | 1160 | } |
| bogdanm | 0:9b334a45a8ff | 1161 | } |
| bogdanm | 0:9b334a45a8ff | 1162 | } |
| bogdanm | 0:9b334a45a8ff | 1163 | } |
| bogdanm | 0:9b334a45a8ff | 1164 | else |
| bogdanm | 0:9b334a45a8ff | 1165 | { |
| bogdanm | 0:9b334a45a8ff | 1166 | while(__HAL_SPDIFRX_GET_FLAG(hspdif, Flag) != RESET) |
| bogdanm | 0:9b334a45a8ff | 1167 | { |
| bogdanm | 0:9b334a45a8ff | 1168 | /* Check for the Timeout */ |
| bogdanm | 0:9b334a45a8ff | 1169 | if(Timeout != HAL_MAX_DELAY) |
| bogdanm | 0:9b334a45a8ff | 1170 | { |
| bogdanm | 0:9b334a45a8ff | 1171 | if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout)) |
| bogdanm | 0:9b334a45a8ff | 1172 | { |
| bogdanm | 0:9b334a45a8ff | 1173 | /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */ |
| bogdanm | 0:9b334a45a8ff | 1174 | __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_RXNE); |
| bogdanm | 0:9b334a45a8ff | 1175 | __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_CSRNE); |
| bogdanm | 0:9b334a45a8ff | 1176 | __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_PERRIE); |
| bogdanm | 0:9b334a45a8ff | 1177 | __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_OVRIE); |
| bogdanm | 0:9b334a45a8ff | 1178 | __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SBLKIE); |
| bogdanm | 0:9b334a45a8ff | 1179 | __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SYNCDIE); |
| bogdanm | 0:9b334a45a8ff | 1180 | __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_IFEIE); |
| bogdanm | 0:9b334a45a8ff | 1181 | |
| bogdanm | 0:9b334a45a8ff | 1182 | hspdif->State= HAL_SPDIFRX_STATE_READY; |
| bogdanm | 0:9b334a45a8ff | 1183 | |
| bogdanm | 0:9b334a45a8ff | 1184 | /* Process Unlocked */ |
| bogdanm | 0:9b334a45a8ff | 1185 | __HAL_UNLOCK(hspdif); |
| bogdanm | 0:9b334a45a8ff | 1186 | |
| bogdanm | 0:9b334a45a8ff | 1187 | return HAL_TIMEOUT; |
| bogdanm | 0:9b334a45a8ff | 1188 | } |
| bogdanm | 0:9b334a45a8ff | 1189 | } |
| bogdanm | 0:9b334a45a8ff | 1190 | } |
| bogdanm | 0:9b334a45a8ff | 1191 | } |
| bogdanm | 0:9b334a45a8ff | 1192 | return HAL_OK; |
| bogdanm | 0:9b334a45a8ff | 1193 | } |
| bogdanm | 0:9b334a45a8ff | 1194 | |
| bogdanm | 0:9b334a45a8ff | 1195 | /** |
| bogdanm | 0:9b334a45a8ff | 1196 | * @} |
| bogdanm | 0:9b334a45a8ff | 1197 | */ |
| bogdanm | 0:9b334a45a8ff | 1198 | |
| bogdanm | 0:9b334a45a8ff | 1199 | #endif /* HAL_SPDIFRX_MODULE_ENABLED */ |
| bogdanm | 0:9b334a45a8ff | 1200 | /** |
| bogdanm | 0:9b334a45a8ff | 1201 | * @} |
| bogdanm | 0:9b334a45a8ff | 1202 | */ |
| bogdanm | 0:9b334a45a8ff | 1203 | |
| bogdanm | 0:9b334a45a8ff | 1204 | /** |
| bogdanm | 0:9b334a45a8ff | 1205 | * @} |
| bogdanm | 0:9b334a45a8ff | 1206 | */ |
| bogdanm | 0:9b334a45a8ff | 1207 | |
| bogdanm | 0:9b334a45a8ff | 1208 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |