en 129 / mbed-dev

fix LPC812 PWM

Dependents:   IR_LED_Send

Fork of mbed-dev by mbed official

targets/cmsis/TARGET_STM/TARGET_STM32F7/stm32f7xx_hal_i2s.h@0:9b334a45a8ff, 2015-10-01 (annotated)

Committer:
bogdanm
Date:
Thu Oct 01 15:25:22 2015 +0300
Revision:
0:9b334a45a8ff
Child:
83:a036322b8637
Initial commit on mbed-dev



Replaces mbed-src (now inactive)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /**
bogdanm 0:9b334a45a8ff 2 ******************************************************************************
bogdanm 0:9b334a45a8ff 3 * @file stm32f7xx_hal_i2s.h
bogdanm 0:9b334a45a8ff 4 * @author MCD Application Team
bogdanm 0:9b334a45a8ff 5 * @version V1.0.1
bogdanm 0:9b334a45a8ff 6 * @date 25-June-2015
bogdanm 0:9b334a45a8ff 7 * @brief Header file of I2S HAL module.
bogdanm 0:9b334a45a8ff 8 ******************************************************************************
bogdanm 0:9b334a45a8ff 9 * @attention
bogdanm 0:9b334a45a8ff 10 *
bogdanm 0:9b334a45a8ff 11 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
bogdanm 0:9b334a45a8ff 12 *
bogdanm 0:9b334a45a8ff 13 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 0:9b334a45a8ff 14 * are permitted provided that the following conditions are met:
bogdanm 0:9b334a45a8ff 15 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 0:9b334a45a8ff 16 * this list of conditions and the following disclaimer.
bogdanm 0:9b334a45a8ff 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 0:9b334a45a8ff 18 * this list of conditions and the following disclaimer in the documentation
bogdanm 0:9b334a45a8ff 19 * and/or other materials provided with the distribution.
bogdanm 0:9b334a45a8ff 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 0:9b334a45a8ff 21 * may be used to endorse or promote products derived from this software
bogdanm 0:9b334a45a8ff 22 * without specific prior written permission.
bogdanm 0:9b334a45a8ff 23 *
bogdanm 0:9b334a45a8ff 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 0:9b334a45a8ff 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 0:9b334a45a8ff 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 0:9b334a45a8ff 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 0:9b334a45a8ff 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 0:9b334a45a8ff 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 0:9b334a45a8ff 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 0:9b334a45a8ff 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 0:9b334a45a8ff 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 0:9b334a45a8ff 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 0:9b334a45a8ff 34 *
bogdanm 0:9b334a45a8ff 35 ******************************************************************************
bogdanm 0:9b334a45a8ff 36 */
bogdanm 0:9b334a45a8ff 37
bogdanm 0:9b334a45a8ff 38 /* Define to prevent recursive inclusion -------------------------------------*/
bogdanm 0:9b334a45a8ff 39 #ifndef __STM32F7xx_HAL_I2S_H
bogdanm 0:9b334a45a8ff 40 #define __STM32F7xx_HAL_I2S_H
bogdanm 0:9b334a45a8ff 41
bogdanm 0:9b334a45a8ff 42 #ifdef __cplusplus
bogdanm 0:9b334a45a8ff 43 extern "C" {
bogdanm 0:9b334a45a8ff 44 #endif
bogdanm 0:9b334a45a8ff 45
bogdanm 0:9b334a45a8ff 46 /* Includes ------------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 47 #include "stm32f7xx_hal_def.h"
bogdanm 0:9b334a45a8ff 48
bogdanm 0:9b334a45a8ff 49 /** @addtogroup STM32F7xx_HAL_Driver
bogdanm 0:9b334a45a8ff 50 * @{
bogdanm 0:9b334a45a8ff 51 */
bogdanm 0:9b334a45a8ff 52
bogdanm 0:9b334a45a8ff 53 /** @addtogroup I2S
bogdanm 0:9b334a45a8ff 54 * @{
bogdanm 0:9b334a45a8ff 55 */
bogdanm 0:9b334a45a8ff 56
bogdanm 0:9b334a45a8ff 57 /* Exported types ------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 58 /** @defgroup I2S_Exported_Types I2S Exported Types
bogdanm 0:9b334a45a8ff 59 * @{
bogdanm 0:9b334a45a8ff 60 */
bogdanm 0:9b334a45a8ff 61
bogdanm 0:9b334a45a8ff 62 /**
bogdanm 0:9b334a45a8ff 63 * @brief I2S Init structure definition
bogdanm 0:9b334a45a8ff 64 */
bogdanm 0:9b334a45a8ff 65 typedef struct
bogdanm 0:9b334a45a8ff 66 {
bogdanm 0:9b334a45a8ff 67 uint32_t Mode; /*!< Specifies the I2S operating mode.
bogdanm 0:9b334a45a8ff 68 This parameter can be a value of @ref I2S_Mode */
bogdanm 0:9b334a45a8ff 69
bogdanm 0:9b334a45a8ff 70 uint32_t Standard; /*!< Specifies the standard used for the I2S communication.
bogdanm 0:9b334a45a8ff 71 This parameter can be a value of @ref I2S_Standard */
bogdanm 0:9b334a45a8ff 72
bogdanm 0:9b334a45a8ff 73 uint32_t DataFormat; /*!< Specifies the data format for the I2S communication.
bogdanm 0:9b334a45a8ff 74 This parameter can be a value of @ref I2S_Data_Format */
bogdanm 0:9b334a45a8ff 75
bogdanm 0:9b334a45a8ff 76 uint32_t MCLKOutput; /*!< Specifies whether the I2S MCLK output is enabled or not.
bogdanm 0:9b334a45a8ff 77 This parameter can be a value of @ref I2S_MCLK_Output */
bogdanm 0:9b334a45a8ff 78
bogdanm 0:9b334a45a8ff 79 uint32_t AudioFreq; /*!< Specifies the frequency selected for the I2S communication.
bogdanm 0:9b334a45a8ff 80 This parameter can be a value of @ref I2S_Audio_Frequency */
bogdanm 0:9b334a45a8ff 81
bogdanm 0:9b334a45a8ff 82 uint32_t CPOL; /*!< Specifies the idle state of the I2S clock.
bogdanm 0:9b334a45a8ff 83 This parameter can be a value of @ref I2S_Clock_Polarity */
bogdanm 0:9b334a45a8ff 84
bogdanm 0:9b334a45a8ff 85 uint32_t ClockSource; /*!< Specifies the I2S Clock Source.
bogdanm 0:9b334a45a8ff 86 This parameter can be a value of @ref I2S_Clock_Source */
bogdanm 0:9b334a45a8ff 87 }I2S_InitTypeDef;
bogdanm 0:9b334a45a8ff 88
bogdanm 0:9b334a45a8ff 89 /**
bogdanm 0:9b334a45a8ff 90 * @brief HAL State structures definition
bogdanm 0:9b334a45a8ff 91 */
bogdanm 0:9b334a45a8ff 92 typedef enum
bogdanm 0:9b334a45a8ff 93 {
bogdanm 0:9b334a45a8ff 94 HAL_I2S_STATE_RESET = 0x00, /*!< I2S not yet initialized or disabled */
bogdanm 0:9b334a45a8ff 95 HAL_I2S_STATE_READY = 0x01, /*!< I2S initialized and ready for use */
bogdanm 0:9b334a45a8ff 96 HAL_I2S_STATE_BUSY = 0x02, /*!< I2S internal process is ongoing */
bogdanm 0:9b334a45a8ff 97 HAL_I2S_STATE_BUSY_TX = 0x03, /*!< Data Transmission process is ongoing */
bogdanm 0:9b334a45a8ff 98 HAL_I2S_STATE_BUSY_RX = 0x04, /*!< Data Reception process is ongoing */
bogdanm 0:9b334a45a8ff 99 HAL_I2S_STATE_BUSY_TX_RX = 0x05, /*!< Data Transmission and Reception process is ongoing */
bogdanm 0:9b334a45a8ff 100 HAL_I2S_STATE_TIMEOUT = 0x06, /*!< I2S timeout state */
bogdanm 0:9b334a45a8ff 101 HAL_I2S_STATE_ERROR = 0x07 /*!< I2S error state */
bogdanm 0:9b334a45a8ff 102
bogdanm 0:9b334a45a8ff 103 }HAL_I2S_StateTypeDef;
bogdanm 0:9b334a45a8ff 104
bogdanm 0:9b334a45a8ff 105 /**
bogdanm 0:9b334a45a8ff 106 * @brief I2S handle Structure definition
bogdanm 0:9b334a45a8ff 107 */
bogdanm 0:9b334a45a8ff 108 typedef struct
bogdanm 0:9b334a45a8ff 109 {
bogdanm 0:9b334a45a8ff 110 SPI_TypeDef *Instance; /* I2S registers base address */
bogdanm 0:9b334a45a8ff 111
bogdanm 0:9b334a45a8ff 112 I2S_InitTypeDef Init; /* I2S communication parameters */
bogdanm 0:9b334a45a8ff 113
bogdanm 0:9b334a45a8ff 114 uint16_t *pTxBuffPtr; /* Pointer to I2S Tx transfer buffer */
bogdanm 0:9b334a45a8ff 115
bogdanm 0:9b334a45a8ff 116 __IO uint16_t TxXferSize; /* I2S Tx transfer size */
bogdanm 0:9b334a45a8ff 117
bogdanm 0:9b334a45a8ff 118 __IO uint16_t TxXferCount; /* I2S Tx transfer Counter */
bogdanm 0:9b334a45a8ff 119
bogdanm 0:9b334a45a8ff 120 uint16_t *pRxBuffPtr; /* Pointer to I2S Rx transfer buffer */
bogdanm 0:9b334a45a8ff 121
bogdanm 0:9b334a45a8ff 122 __IO uint16_t RxXferSize; /* I2S Rx transfer size */
bogdanm 0:9b334a45a8ff 123
bogdanm 0:9b334a45a8ff 124 __IO uint16_t RxXferCount; /* I2S Rx transfer counter
bogdanm 0:9b334a45a8ff 125 (This field is initialized at the
bogdanm 0:9b334a45a8ff 126 same value as transfer size at the
bogdanm 0:9b334a45a8ff 127 beginning of the transfer and
bogdanm 0:9b334a45a8ff 128 decremented when a sample is received.
bogdanm 0:9b334a45a8ff 129 NbSamplesReceived = RxBufferSize-RxBufferCount) */
bogdanm 0:9b334a45a8ff 130
bogdanm 0:9b334a45a8ff 131 DMA_HandleTypeDef *hdmatx; /* I2S Tx DMA handle parameters */
bogdanm 0:9b334a45a8ff 132
bogdanm 0:9b334a45a8ff 133 DMA_HandleTypeDef *hdmarx; /* I2S Rx DMA handle parameters */
bogdanm 0:9b334a45a8ff 134
bogdanm 0:9b334a45a8ff 135 __IO HAL_LockTypeDef Lock; /* I2S locking object */
bogdanm 0:9b334a45a8ff 136
bogdanm 0:9b334a45a8ff 137 __IO HAL_I2S_StateTypeDef State; /* I2S communication state */
bogdanm 0:9b334a45a8ff 138
bogdanm 0:9b334a45a8ff 139 __IO uint32_t ErrorCode; /* I2S Error code */
bogdanm 0:9b334a45a8ff 140
bogdanm 0:9b334a45a8ff 141 }I2S_HandleTypeDef;
bogdanm 0:9b334a45a8ff 142 /**
bogdanm 0:9b334a45a8ff 143 * @}
bogdanm 0:9b334a45a8ff 144 */
bogdanm 0:9b334a45a8ff 145
bogdanm 0:9b334a45a8ff 146 /* Exported constants --------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 147 /** @defgroup I2S_Exported_Constants I2S Exported Constants
bogdanm 0:9b334a45a8ff 148 * @{
bogdanm 0:9b334a45a8ff 149 */
bogdanm 0:9b334a45a8ff 150
bogdanm 0:9b334a45a8ff 151 /** @defgroup I2S_Error_Defintion I2S_Error_Defintion
bogdanm 0:9b334a45a8ff 152 *@brief I2S Error Code
bogdanm 0:9b334a45a8ff 153 * @{
bogdanm 0:9b334a45a8ff 154 */
bogdanm 0:9b334a45a8ff 155 #define HAL_I2S_ERROR_NONE ((uint32_t)0x00000000) /*!< No error */
bogdanm 0:9b334a45a8ff 156 #define HAL_I2S_ERROR_TIMEOUT ((uint32_t)0x00000001) /*!< Timeout error */
bogdanm 0:9b334a45a8ff 157 #define HAL_I2S_ERROR_OVR ((uint32_t)0x00000002) /*!< OVR error */
bogdanm 0:9b334a45a8ff 158 #define HAL_I2S_ERROR_UDR ((uint32_t)0x00000004) /*!< UDR error */
bogdanm 0:9b334a45a8ff 159 #define HAL_I2S_ERROR_DMA ((uint32_t)0x00000008) /*!< DMA transfer error */
bogdanm 0:9b334a45a8ff 160 #define HAL_I2S_ERROR_UNKNOW ((uint32_t)0x00000010) /*!< Unknow Error error */
bogdanm 0:9b334a45a8ff 161
bogdanm 0:9b334a45a8ff 162 /**
bogdanm 0:9b334a45a8ff 163 * @}
bogdanm 0:9b334a45a8ff 164 */
bogdanm 0:9b334a45a8ff 165 /** @defgroup I2S_Clock_Source I2S Clock Source
bogdanm 0:9b334a45a8ff 166 * @{
bogdanm 0:9b334a45a8ff 167 */
bogdanm 0:9b334a45a8ff 168 #define I2S_CLOCK_EXTERNAL ((uint32_t)0x00000001)
bogdanm 0:9b334a45a8ff 169 #define I2S_CLOCK_SYSCLK ((uint32_t)0x00000002)
bogdanm 0:9b334a45a8ff 170 /**
bogdanm 0:9b334a45a8ff 171 * @}
bogdanm 0:9b334a45a8ff 172 */
bogdanm 0:9b334a45a8ff 173
bogdanm 0:9b334a45a8ff 174 /** @defgroup I2S_Mode I2S Mode
bogdanm 0:9b334a45a8ff 175 * @{
bogdanm 0:9b334a45a8ff 176 */
bogdanm 0:9b334a45a8ff 177 #define I2S_MODE_SLAVE_TX ((uint32_t)0x00000000)
bogdanm 0:9b334a45a8ff 178 #define I2S_MODE_SLAVE_RX ((uint32_t)0x00000100)
bogdanm 0:9b334a45a8ff 179 #define I2S_MODE_MASTER_TX ((uint32_t)0x00000200)
bogdanm 0:9b334a45a8ff 180 #define I2S_MODE_MASTER_RX ((uint32_t)0x00000300)
bogdanm 0:9b334a45a8ff 181 /**
bogdanm 0:9b334a45a8ff 182 * @}
bogdanm 0:9b334a45a8ff 183 */
bogdanm 0:9b334a45a8ff 184
bogdanm 0:9b334a45a8ff 185 /** @defgroup I2S_Standard I2S Standard
bogdanm 0:9b334a45a8ff 186 * @{
bogdanm 0:9b334a45a8ff 187 */
bogdanm 0:9b334a45a8ff 188 #define I2S_STANDARD_PHILIPS ((uint32_t)0x00000000)
bogdanm 0:9b334a45a8ff 189 #define I2S_STANDARD_MSB ((uint32_t)0x00000010)
bogdanm 0:9b334a45a8ff 190 #define I2S_STANDARD_LSB ((uint32_t)0x00000020)
bogdanm 0:9b334a45a8ff 191 #define I2S_STANDARD_PCM_SHORT ((uint32_t)0x00000030)
bogdanm 0:9b334a45a8ff 192 #define I2S_STANDARD_PCM_LONG ((uint32_t)0x000000B0)
bogdanm 0:9b334a45a8ff 193 /**
bogdanm 0:9b334a45a8ff 194 * @}
bogdanm 0:9b334a45a8ff 195 */
bogdanm 0:9b334a45a8ff 196
bogdanm 0:9b334a45a8ff 197 /** @defgroup I2S_Data_Format I2S Data Format
bogdanm 0:9b334a45a8ff 198 * @{
bogdanm 0:9b334a45a8ff 199 */
bogdanm 0:9b334a45a8ff 200 #define I2S_DATAFORMAT_16B ((uint32_t)0x00000000)
bogdanm 0:9b334a45a8ff 201 #define I2S_DATAFORMAT_16B_EXTENDED ((uint32_t)0x00000001)
bogdanm 0:9b334a45a8ff 202 #define I2S_DATAFORMAT_24B ((uint32_t)0x00000003)
bogdanm 0:9b334a45a8ff 203 #define I2S_DATAFORMAT_32B ((uint32_t)0x00000005)
bogdanm 0:9b334a45a8ff 204 /**
bogdanm 0:9b334a45a8ff 205 * @}
bogdanm 0:9b334a45a8ff 206 */
bogdanm 0:9b334a45a8ff 207
bogdanm 0:9b334a45a8ff 208 /** @defgroup I2S_MCLK_Output I2S Mclk Output
bogdanm 0:9b334a45a8ff 209 * @{
bogdanm 0:9b334a45a8ff 210 */
bogdanm 0:9b334a45a8ff 211 #define I2S_MCLKOUTPUT_ENABLE ((uint32_t)SPI_I2SPR_MCKOE)
bogdanm 0:9b334a45a8ff 212 #define I2S_MCLKOUTPUT_DISABLE ((uint32_t)0x00000000)
bogdanm 0:9b334a45a8ff 213 /**
bogdanm 0:9b334a45a8ff 214 * @}
bogdanm 0:9b334a45a8ff 215 */
bogdanm 0:9b334a45a8ff 216
bogdanm 0:9b334a45a8ff 217 /** @defgroup I2S_Audio_Frequency I2S Audio Frequency
bogdanm 0:9b334a45a8ff 218 * @{
bogdanm 0:9b334a45a8ff 219 */
bogdanm 0:9b334a45a8ff 220 #define I2S_AUDIOFREQ_192K ((uint32_t)192000)
bogdanm 0:9b334a45a8ff 221 #define I2S_AUDIOFREQ_96K ((uint32_t)96000)
bogdanm 0:9b334a45a8ff 222 #define I2S_AUDIOFREQ_48K ((uint32_t)48000)
bogdanm 0:9b334a45a8ff 223 #define I2S_AUDIOFREQ_44K ((uint32_t)44100)
bogdanm 0:9b334a45a8ff 224 #define I2S_AUDIOFREQ_32K ((uint32_t)32000)
bogdanm 0:9b334a45a8ff 225 #define I2S_AUDIOFREQ_22K ((uint32_t)22050)
bogdanm 0:9b334a45a8ff 226 #define I2S_AUDIOFREQ_16K ((uint32_t)16000)
bogdanm 0:9b334a45a8ff 227 #define I2S_AUDIOFREQ_11K ((uint32_t)11025)
bogdanm 0:9b334a45a8ff 228 #define I2S_AUDIOFREQ_8K ((uint32_t)8000)
bogdanm 0:9b334a45a8ff 229 #define I2S_AUDIOFREQ_DEFAULT ((uint32_t)2)
bogdanm 0:9b334a45a8ff 230 /**
bogdanm 0:9b334a45a8ff 231 * @}
bogdanm 0:9b334a45a8ff 232 */
bogdanm 0:9b334a45a8ff 233
bogdanm 0:9b334a45a8ff 234
bogdanm 0:9b334a45a8ff 235 /** @defgroup I2S_Clock_Polarity I2S Clock Polarity
bogdanm 0:9b334a45a8ff 236 * @{
bogdanm 0:9b334a45a8ff 237 */
bogdanm 0:9b334a45a8ff 238 #define I2S_CPOL_LOW ((uint32_t)0x00000000)
bogdanm 0:9b334a45a8ff 239 #define I2S_CPOL_HIGH ((uint32_t)SPI_I2SCFGR_CKPOL)
bogdanm 0:9b334a45a8ff 240 /**
bogdanm 0:9b334a45a8ff 241 * @}
bogdanm 0:9b334a45a8ff 242 */
bogdanm 0:9b334a45a8ff 243
bogdanm 0:9b334a45a8ff 244 /** @defgroup I2S_Interrupts_Definition I2S Interrupts Definition
bogdanm 0:9b334a45a8ff 245 * @{
bogdanm 0:9b334a45a8ff 246 */
bogdanm 0:9b334a45a8ff 247 #define I2S_IT_TXE SPI_CR2_TXEIE
bogdanm 0:9b334a45a8ff 248 #define I2S_IT_RXNE SPI_CR2_RXNEIE
bogdanm 0:9b334a45a8ff 249 #define I2S_IT_ERR SPI_CR2_ERRIE
bogdanm 0:9b334a45a8ff 250 /**
bogdanm 0:9b334a45a8ff 251 * @}
bogdanm 0:9b334a45a8ff 252 */
bogdanm 0:9b334a45a8ff 253
bogdanm 0:9b334a45a8ff 254 /** @defgroup I2S_Flags_Definition I2S Flags Definition
bogdanm 0:9b334a45a8ff 255 * @{
bogdanm 0:9b334a45a8ff 256 */
bogdanm 0:9b334a45a8ff 257 #define I2S_FLAG_TXE SPI_SR_TXE
bogdanm 0:9b334a45a8ff 258 #define I2S_FLAG_RXNE SPI_SR_RXNE
bogdanm 0:9b334a45a8ff 259
bogdanm 0:9b334a45a8ff 260 #define I2S_FLAG_UDR SPI_SR_UDR
bogdanm 0:9b334a45a8ff 261 #define I2S_FLAG_OVR SPI_SR_OVR
bogdanm 0:9b334a45a8ff 262 #define I2S_FLAG_FRE SPI_SR_FRE
bogdanm 0:9b334a45a8ff 263
bogdanm 0:9b334a45a8ff 264 #define I2S_FLAG_CHSIDE SPI_SR_CHSIDE
bogdanm 0:9b334a45a8ff 265 #define I2S_FLAG_BSY SPI_SR_BSY
bogdanm 0:9b334a45a8ff 266 /**
bogdanm 0:9b334a45a8ff 267 * @}
bogdanm 0:9b334a45a8ff 268 */
bogdanm 0:9b334a45a8ff 269
bogdanm 0:9b334a45a8ff 270 /**
bogdanm 0:9b334a45a8ff 271 * @}
bogdanm 0:9b334a45a8ff 272 */
bogdanm 0:9b334a45a8ff 273
bogdanm 0:9b334a45a8ff 274 /* Exported macros -----------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 275 /** @defgroup I2S_Exported_Macros I2S Exported Macros
bogdanm 0:9b334a45a8ff 276 * @{
bogdanm 0:9b334a45a8ff 277 */
bogdanm 0:9b334a45a8ff 278
bogdanm 0:9b334a45a8ff 279 /** @brief Reset I2S handle state
bogdanm 0:9b334a45a8ff 280 * @param __HANDLE__: specifies the I2S handle.
bogdanm 0:9b334a45a8ff 281 * @retval None
bogdanm 0:9b334a45a8ff 282 */
bogdanm 0:9b334a45a8ff 283 #define __HAL_I2S_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2S_STATE_RESET)
bogdanm 0:9b334a45a8ff 284
bogdanm 0:9b334a45a8ff 285 /** @brief Enable or disable the specified SPI peripheral (in I2S mode).
bogdanm 0:9b334a45a8ff 286 * @param __HANDLE__: specifies the I2S Handle.
bogdanm 0:9b334a45a8ff 287 * @retval None
bogdanm 0:9b334a45a8ff 288 */
bogdanm 0:9b334a45a8ff 289 #define __HAL_I2S_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->I2SCFGR |= SPI_I2SCFGR_I2SE)
bogdanm 0:9b334a45a8ff 290 #define __HAL_I2S_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->I2SCFGR &= ~SPI_I2SCFGR_I2SE)
bogdanm 0:9b334a45a8ff 291
bogdanm 0:9b334a45a8ff 292 /** @brief Enable or disable the specified I2S interrupts.
bogdanm 0:9b334a45a8ff 293 * @param __HANDLE__: specifies the I2S Handle.
bogdanm 0:9b334a45a8ff 294 * @param __INTERRUPT__: specifies the interrupt source to enable or disable.
bogdanm 0:9b334a45a8ff 295 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 296 * @arg I2S_IT_TXE: Tx buffer empty interrupt enable
bogdanm 0:9b334a45a8ff 297 * @arg I2S_IT_RXNE: RX buffer not empty interrupt enable
bogdanm 0:9b334a45a8ff 298 * @arg I2S_IT_ERR: Error interrupt enable
bogdanm 0:9b334a45a8ff 299 * @retval None
bogdanm 0:9b334a45a8ff 300 */
bogdanm 0:9b334a45a8ff 301 #define __HAL_I2S_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 |= (__INTERRUPT__))
bogdanm 0:9b334a45a8ff 302 #define __HAL_I2S_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 &= ~(__INTERRUPT__))
bogdanm 0:9b334a45a8ff 303
bogdanm 0:9b334a45a8ff 304 /** @brief Checks if the specified I2S interrupt source is enabled or disabled.
bogdanm 0:9b334a45a8ff 305 * @param __HANDLE__: specifies the I2S Handle.
bogdanm 0:9b334a45a8ff 306 * This parameter can be I2S where x: 1, 2, or 3 to select the I2S peripheral.
bogdanm 0:9b334a45a8ff 307 * @param __INTERRUPT__: specifies the I2S interrupt source to check.
bogdanm 0:9b334a45a8ff 308 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 309 * @arg I2S_IT_TXE: Tx buffer empty interrupt enable
bogdanm 0:9b334a45a8ff 310 * @arg I2S_IT_RXNE: RX buffer not empty interrupt enable
bogdanm 0:9b334a45a8ff 311 * @arg I2S_IT_ERR: Error interrupt enable
bogdanm 0:9b334a45a8ff 312 * @retval The new state of __IT__ (TRUE or FALSE).
bogdanm 0:9b334a45a8ff 313 */
bogdanm 0:9b334a45a8ff 314 #define __HAL_I2S_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
bogdanm 0:9b334a45a8ff 315
bogdanm 0:9b334a45a8ff 316 /** @brief Checks whether the specified I2S flag is set or not.
bogdanm 0:9b334a45a8ff 317 * @param __HANDLE__: specifies the I2S Handle.
bogdanm 0:9b334a45a8ff 318 * @param __FLAG__: specifies the flag to check.
bogdanm 0:9b334a45a8ff 319 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 320 * @arg I2S_FLAG_RXNE: Receive buffer not empty flag
bogdanm 0:9b334a45a8ff 321 * @arg I2S_FLAG_TXE: Transmit buffer empty flag
bogdanm 0:9b334a45a8ff 322 * @arg I2S_FLAG_UDR: Underrun flag
bogdanm 0:9b334a45a8ff 323 * @arg I2S_FLAG_OVR: Overrun flag
bogdanm 0:9b334a45a8ff 324 * @arg I2S_FLAG_FRE: Frame error flag
bogdanm 0:9b334a45a8ff 325 * @arg I2S_FLAG_CHSIDE: Channel Side flag
bogdanm 0:9b334a45a8ff 326 * @arg I2S_FLAG_BSY: Busy flag
bogdanm 0:9b334a45a8ff 327 * @retval The new state of __FLAG__ (TRUE or FALSE).
bogdanm 0:9b334a45a8ff 328 */
bogdanm 0:9b334a45a8ff 329 #define __HAL_I2S_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
bogdanm 0:9b334a45a8ff 330
bogdanm 0:9b334a45a8ff 331 /** @brief Clears the I2S OVR pending flag.
bogdanm 0:9b334a45a8ff 332 * @param __HANDLE__: specifies the I2S Handle.
bogdanm 0:9b334a45a8ff 333 * @retval None
bogdanm 0:9b334a45a8ff 334 */
bogdanm 0:9b334a45a8ff 335 #define __HAL_I2S_CLEAR_OVRFLAG(__HANDLE__) \
bogdanm 0:9b334a45a8ff 336 do{ \
bogdanm 0:9b334a45a8ff 337 __IO uint32_t tmpreg; \
bogdanm 0:9b334a45a8ff 338 tmpreg = (__HANDLE__)->Instance->DR; \
bogdanm 0:9b334a45a8ff 339 tmpreg = (__HANDLE__)->Instance->SR; \
bogdanm 0:9b334a45a8ff 340 UNUSED(tmpreg); \
bogdanm 0:9b334a45a8ff 341 } while(0)
bogdanm 0:9b334a45a8ff 342
bogdanm 0:9b334a45a8ff 343 /** @brief Clears the I2S UDR pending flag.
bogdanm 0:9b334a45a8ff 344 * @param __HANDLE__: specifies the I2S Handle.
bogdanm 0:9b334a45a8ff 345 * @retval None
bogdanm 0:9b334a45a8ff 346 */
bogdanm 0:9b334a45a8ff 347 #define __HAL_I2S_CLEAR_UDRFLAG(__HANDLE__) \
bogdanm 0:9b334a45a8ff 348 do{ \
bogdanm 0:9b334a45a8ff 349 __IO uint32_t tmpreg; \
bogdanm 0:9b334a45a8ff 350 tmpreg = (__HANDLE__)->Instance->SR; \
bogdanm 0:9b334a45a8ff 351 UNUSED(tmpreg); \
bogdanm 0:9b334a45a8ff 352 } while(0)
bogdanm 0:9b334a45a8ff 353 /**
bogdanm 0:9b334a45a8ff 354 * @}
bogdanm 0:9b334a45a8ff 355 */
bogdanm 0:9b334a45a8ff 356
bogdanm 0:9b334a45a8ff 357 /* Exported functions --------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 358 /** @addtogroup I2S_Exported_Functions I2S Exported Functions
bogdanm 0:9b334a45a8ff 359 * @{
bogdanm 0:9b334a45a8ff 360 */
bogdanm 0:9b334a45a8ff 361
bogdanm 0:9b334a45a8ff 362 /** @addtogroup I2S_Exported_Functions_Group1 Initialization and de-initialization functions
bogdanm 0:9b334a45a8ff 363 * @{
bogdanm 0:9b334a45a8ff 364 */
bogdanm 0:9b334a45a8ff 365
bogdanm 0:9b334a45a8ff 366 /* Initialization and de-initialization functions *****************************/
bogdanm 0:9b334a45a8ff 367 HAL_StatusTypeDef HAL_I2S_Init(I2S_HandleTypeDef *hi2s);
bogdanm 0:9b334a45a8ff 368 HAL_StatusTypeDef HAL_I2S_DeInit (I2S_HandleTypeDef *hi2s);
bogdanm 0:9b334a45a8ff 369 void HAL_I2S_MspInit(I2S_HandleTypeDef *hi2s);
bogdanm 0:9b334a45a8ff 370 void HAL_I2S_MspDeInit(I2S_HandleTypeDef *hi2s);
bogdanm 0:9b334a45a8ff 371 /**
bogdanm 0:9b334a45a8ff 372 * @}
bogdanm 0:9b334a45a8ff 373 */
bogdanm 0:9b334a45a8ff 374
bogdanm 0:9b334a45a8ff 375 /** @addtogroup I2S_Exported_Functions_Group2 Input and Output operation functions
bogdanm 0:9b334a45a8ff 376 * @{
bogdanm 0:9b334a45a8ff 377 */
bogdanm 0:9b334a45a8ff 378 /* I/O operation functions ***************************************************/
bogdanm 0:9b334a45a8ff 379 /* Blocking mode: Polling */
bogdanm 0:9b334a45a8ff 380 HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout);
bogdanm 0:9b334a45a8ff 381 HAL_StatusTypeDef HAL_I2S_Receive(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout);
bogdanm 0:9b334a45a8ff 382
bogdanm 0:9b334a45a8ff 383 /* Non-Blocking mode: Interrupt */
bogdanm 0:9b334a45a8ff 384 HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
bogdanm 0:9b334a45a8ff 385 HAL_StatusTypeDef HAL_I2S_Receive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
bogdanm 0:9b334a45a8ff 386 void HAL_I2S_IRQHandler(I2S_HandleTypeDef *hi2s);
bogdanm 0:9b334a45a8ff 387
bogdanm 0:9b334a45a8ff 388 /* Non-Blocking mode: DMA */
bogdanm 0:9b334a45a8ff 389 HAL_StatusTypeDef HAL_I2S_Transmit_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
bogdanm 0:9b334a45a8ff 390 HAL_StatusTypeDef HAL_I2S_Receive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
bogdanm 0:9b334a45a8ff 391
bogdanm 0:9b334a45a8ff 392 HAL_StatusTypeDef HAL_I2S_DMAPause(I2S_HandleTypeDef *hi2s);
bogdanm 0:9b334a45a8ff 393 HAL_StatusTypeDef HAL_I2S_DMAResume(I2S_HandleTypeDef *hi2s);
bogdanm 0:9b334a45a8ff 394 HAL_StatusTypeDef HAL_I2S_DMAStop(I2S_HandleTypeDef *hi2s);
bogdanm 0:9b334a45a8ff 395
bogdanm 0:9b334a45a8ff 396 /* Callbacks used in non blocking modes (Interrupt and DMA) *******************/
bogdanm 0:9b334a45a8ff 397 void HAL_I2S_TxHalfCpltCallback(I2S_HandleTypeDef *hi2s);
bogdanm 0:9b334a45a8ff 398 void HAL_I2S_TxCpltCallback(I2S_HandleTypeDef *hi2s);
bogdanm 0:9b334a45a8ff 399 void HAL_I2S_RxHalfCpltCallback(I2S_HandleTypeDef *hi2s);
bogdanm 0:9b334a45a8ff 400 void HAL_I2S_RxCpltCallback(I2S_HandleTypeDef *hi2s);
bogdanm 0:9b334a45a8ff 401 void HAL_I2S_ErrorCallback(I2S_HandleTypeDef *hi2s);
bogdanm 0:9b334a45a8ff 402 /**
bogdanm 0:9b334a45a8ff 403 * @}
bogdanm 0:9b334a45a8ff 404 */
bogdanm 0:9b334a45a8ff 405
bogdanm 0:9b334a45a8ff 406 /** @addtogroup I2S_Exported_Functions_Group3 Peripheral State and Errors functions
bogdanm 0:9b334a45a8ff 407 * @{
bogdanm 0:9b334a45a8ff 408 */
bogdanm 0:9b334a45a8ff 409 /* Peripheral Control and State functions ************************************/
bogdanm 0:9b334a45a8ff 410 HAL_I2S_StateTypeDef HAL_I2S_GetState(I2S_HandleTypeDef *hi2s);
bogdanm 0:9b334a45a8ff 411 uint32_t HAL_I2S_GetError(I2S_HandleTypeDef *hi2s);
bogdanm 0:9b334a45a8ff 412 /**
bogdanm 0:9b334a45a8ff 413 * @}
bogdanm 0:9b334a45a8ff 414 */
bogdanm 0:9b334a45a8ff 415
bogdanm 0:9b334a45a8ff 416 /**
bogdanm 0:9b334a45a8ff 417 * @}
bogdanm 0:9b334a45a8ff 418 */
bogdanm 0:9b334a45a8ff 419
bogdanm 0:9b334a45a8ff 420
bogdanm 0:9b334a45a8ff 421 /* Private types -------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 422 /* Private variables ---------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 423 /* Private constants ---------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 424 /** @defgroup I2S_Private_Constants I2S Private Constants
bogdanm 0:9b334a45a8ff 425 * @{
bogdanm 0:9b334a45a8ff 426 */
bogdanm 0:9b334a45a8ff 427
bogdanm 0:9b334a45a8ff 428 /**
bogdanm 0:9b334a45a8ff 429 * @}
bogdanm 0:9b334a45a8ff 430 */
bogdanm 0:9b334a45a8ff 431
bogdanm 0:9b334a45a8ff 432 /* Private macros ------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 433 /** @defgroup I2S_Private_Macros I2S Private Macros
bogdanm 0:9b334a45a8ff 434 * @{
bogdanm 0:9b334a45a8ff 435 */
bogdanm 0:9b334a45a8ff 436 #define IS_I2S_CLOCKSOURCE(CLOCK) (((CLOCK) == I2S_CLOCK_EXTERNAL) || \
bogdanm 0:9b334a45a8ff 437 ((CLOCK) == I2S_CLOCK_SYSCLK))
bogdanm 0:9b334a45a8ff 438
bogdanm 0:9b334a45a8ff 439 #define IS_I2S_MODE(MODE) (((MODE) == I2S_MODE_SLAVE_TX) || \
bogdanm 0:9b334a45a8ff 440 ((MODE) == I2S_MODE_SLAVE_RX) || \
bogdanm 0:9b334a45a8ff 441 ((MODE) == I2S_MODE_MASTER_TX)|| \
bogdanm 0:9b334a45a8ff 442 ((MODE) == I2S_MODE_MASTER_RX))
bogdanm 0:9b334a45a8ff 443
bogdanm 0:9b334a45a8ff 444 #define IS_I2S_STANDARD(STANDARD) (((STANDARD) == I2S_STANDARD_PHILIPS) || \
bogdanm 0:9b334a45a8ff 445 ((STANDARD) == I2S_STANDARD_MSB) || \
bogdanm 0:9b334a45a8ff 446 ((STANDARD) == I2S_STANDARD_LSB) || \
bogdanm 0:9b334a45a8ff 447 ((STANDARD) == I2S_STANDARD_PCM_SHORT) || \
bogdanm 0:9b334a45a8ff 448 ((STANDARD) == I2S_STANDARD_PCM_LONG))
bogdanm 0:9b334a45a8ff 449
bogdanm 0:9b334a45a8ff 450 #define IS_I2S_DATA_FORMAT(FORMAT) (((FORMAT) == I2S_DATAFORMAT_16B) || \
bogdanm 0:9b334a45a8ff 451 ((FORMAT) == I2S_DATAFORMAT_16B_EXTENDED) || \
bogdanm 0:9b334a45a8ff 452 ((FORMAT) == I2S_DATAFORMAT_24B) || \
bogdanm 0:9b334a45a8ff 453 ((FORMAT) == I2S_DATAFORMAT_32B))
bogdanm 0:9b334a45a8ff 454
bogdanm 0:9b334a45a8ff 455 #define IS_I2S_MCLK_OUTPUT(OUTPUT) (((OUTPUT) == I2S_MCLKOUTPUT_ENABLE) || \
bogdanm 0:9b334a45a8ff 456 ((OUTPUT) == I2S_MCLKOUTPUT_DISABLE))
bogdanm 0:9b334a45a8ff 457
bogdanm 0:9b334a45a8ff 458 #define IS_I2S_AUDIO_FREQ(FREQ) ((((FREQ) >= I2S_AUDIOFREQ_8K) && \
bogdanm 0:9b334a45a8ff 459 ((FREQ) <= I2S_AUDIOFREQ_192K)) || \
bogdanm 0:9b334a45a8ff 460 ((FREQ) == I2S_AUDIOFREQ_DEFAULT))
bogdanm 0:9b334a45a8ff 461
bogdanm 0:9b334a45a8ff 462 #define IS_I2S_CPOL(CPOL) (((CPOL) == I2S_CPOL_LOW) || \
bogdanm 0:9b334a45a8ff 463 ((CPOL) == I2S_CPOL_HIGH))
bogdanm 0:9b334a45a8ff 464 /**
bogdanm 0:9b334a45a8ff 465 * @}
bogdanm 0:9b334a45a8ff 466 */
bogdanm 0:9b334a45a8ff 467
bogdanm 0:9b334a45a8ff 468 /**
bogdanm 0:9b334a45a8ff 469 * @}
bogdanm 0:9b334a45a8ff 470 */
bogdanm 0:9b334a45a8ff 471
bogdanm 0:9b334a45a8ff 472 /**
bogdanm 0:9b334a45a8ff 473 * @}
bogdanm 0:9b334a45a8ff 474 */
bogdanm 0:9b334a45a8ff 475
bogdanm 0:9b334a45a8ff 476 #ifdef __cplusplus
bogdanm 0:9b334a45a8ff 477 }
bogdanm 0:9b334a45a8ff 478 #endif
bogdanm 0:9b334a45a8ff 479
bogdanm 0:9b334a45a8ff 480
bogdanm 0:9b334a45a8ff 481 #endif /* __STM32F7xx_HAL_I2S_H */
bogdanm 0:9b334a45a8ff 482
bogdanm 0:9b334a45a8ff 483 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/