fix LPC812 PWM

Dependents:   IR_LED_Send

Fork of mbed-dev by mbed official

Committer:
bogdanm
Date:
Thu Oct 01 15:25:22 2015 +0300
Revision:
0:9b334a45a8ff
Child:
83:a036322b8637
Initial commit on mbed-dev

Replaces mbed-src (now inactive)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /**
bogdanm 0:9b334a45a8ff 2 ******************************************************************************
bogdanm 0:9b334a45a8ff 3 * @file stm32f7xx_hal_gpio_ex.h
bogdanm 0:9b334a45a8ff 4 * @author MCD Application Team
bogdanm 0:9b334a45a8ff 5 * @version V1.0.1
bogdanm 0:9b334a45a8ff 6 * @date 25-June-2015
bogdanm 0:9b334a45a8ff 7 * @brief Header file of GPIO HAL Extension module.
bogdanm 0:9b334a45a8ff 8 ******************************************************************************
bogdanm 0:9b334a45a8ff 9 * @attention
bogdanm 0:9b334a45a8ff 10 *
bogdanm 0:9b334a45a8ff 11 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
bogdanm 0:9b334a45a8ff 12 *
bogdanm 0:9b334a45a8ff 13 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 0:9b334a45a8ff 14 * are permitted provided that the following conditions are met:
bogdanm 0:9b334a45a8ff 15 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 0:9b334a45a8ff 16 * this list of conditions and the following disclaimer.
bogdanm 0:9b334a45a8ff 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 0:9b334a45a8ff 18 * this list of conditions and the following disclaimer in the documentation
bogdanm 0:9b334a45a8ff 19 * and/or other materials provided with the distribution.
bogdanm 0:9b334a45a8ff 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 0:9b334a45a8ff 21 * may be used to endorse or promote products derived from this software
bogdanm 0:9b334a45a8ff 22 * without specific prior written permission.
bogdanm 0:9b334a45a8ff 23 *
bogdanm 0:9b334a45a8ff 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 0:9b334a45a8ff 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 0:9b334a45a8ff 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 0:9b334a45a8ff 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 0:9b334a45a8ff 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 0:9b334a45a8ff 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 0:9b334a45a8ff 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 0:9b334a45a8ff 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 0:9b334a45a8ff 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 0:9b334a45a8ff 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 0:9b334a45a8ff 34 *
bogdanm 0:9b334a45a8ff 35 ******************************************************************************
bogdanm 0:9b334a45a8ff 36 */
bogdanm 0:9b334a45a8ff 37
bogdanm 0:9b334a45a8ff 38 /* Define to prevent recursive inclusion -------------------------------------*/
bogdanm 0:9b334a45a8ff 39 #ifndef __STM32F7xx_HAL_GPIO_EX_H
bogdanm 0:9b334a45a8ff 40 #define __STM32F7xx_HAL_GPIO_EX_H
bogdanm 0:9b334a45a8ff 41
bogdanm 0:9b334a45a8ff 42 #ifdef __cplusplus
bogdanm 0:9b334a45a8ff 43 extern "C" {
bogdanm 0:9b334a45a8ff 44 #endif
bogdanm 0:9b334a45a8ff 45
bogdanm 0:9b334a45a8ff 46 /* Includes ------------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 47 #include "stm32f7xx_hal_def.h"
bogdanm 0:9b334a45a8ff 48
bogdanm 0:9b334a45a8ff 49 /** @addtogroup STM32F7xx_HAL_Driver
bogdanm 0:9b334a45a8ff 50 * @{
bogdanm 0:9b334a45a8ff 51 */
bogdanm 0:9b334a45a8ff 52
bogdanm 0:9b334a45a8ff 53 /** @defgroup GPIOEx GPIOEx
bogdanm 0:9b334a45a8ff 54 * @{
bogdanm 0:9b334a45a8ff 55 */
bogdanm 0:9b334a45a8ff 56
bogdanm 0:9b334a45a8ff 57 /* Exported types ------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 58
bogdanm 0:9b334a45a8ff 59 /* Exported constants --------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 60 /** @defgroup GPIOEx_Exported_Constants GPIO Exported Constants
bogdanm 0:9b334a45a8ff 61 * @{
bogdanm 0:9b334a45a8ff 62 */
bogdanm 0:9b334a45a8ff 63
bogdanm 0:9b334a45a8ff 64 /** @defgroup GPIO_Alternate_function_selection GPIO Alternate Function Selection
bogdanm 0:9b334a45a8ff 65 * @{
bogdanm 0:9b334a45a8ff 66 */
bogdanm 0:9b334a45a8ff 67
bogdanm 0:9b334a45a8ff 68 /**
bogdanm 0:9b334a45a8ff 69 * @brief AF 0 selection
bogdanm 0:9b334a45a8ff 70 */
bogdanm 0:9b334a45a8ff 71 #define GPIO_AF0_RTC_50Hz ((uint8_t)0x00) /* RTC_50Hz Alternate Function mapping */
bogdanm 0:9b334a45a8ff 72 #define GPIO_AF0_MCO ((uint8_t)0x00) /* MCO (MCO1 and MCO2) Alternate Function mapping */
bogdanm 0:9b334a45a8ff 73 #define GPIO_AF0_SWJ ((uint8_t)0x00) /* SWJ (SWD and JTAG) Alternate Function mapping */
bogdanm 0:9b334a45a8ff 74 #define GPIO_AF0_TRACE ((uint8_t)0x00) /* TRACE Alternate Function mapping */
bogdanm 0:9b334a45a8ff 75
bogdanm 0:9b334a45a8ff 76 /**
bogdanm 0:9b334a45a8ff 77 * @brief AF 1 selection
bogdanm 0:9b334a45a8ff 78 */
bogdanm 0:9b334a45a8ff 79 #define GPIO_AF1_TIM1 ((uint8_t)0x01) /* TIM1 Alternate Function mapping */
bogdanm 0:9b334a45a8ff 80 #define GPIO_AF1_TIM2 ((uint8_t)0x01) /* TIM2 Alternate Function mapping */
bogdanm 0:9b334a45a8ff 81
bogdanm 0:9b334a45a8ff 82 /**
bogdanm 0:9b334a45a8ff 83 * @brief AF 2 selection
bogdanm 0:9b334a45a8ff 84 */
bogdanm 0:9b334a45a8ff 85 #define GPIO_AF2_TIM3 ((uint8_t)0x02) /* TIM3 Alternate Function mapping */
bogdanm 0:9b334a45a8ff 86 #define GPIO_AF2_TIM4 ((uint8_t)0x02) /* TIM4 Alternate Function mapping */
bogdanm 0:9b334a45a8ff 87 #define GPIO_AF2_TIM5 ((uint8_t)0x02) /* TIM5 Alternate Function mapping */
bogdanm 0:9b334a45a8ff 88
bogdanm 0:9b334a45a8ff 89 /**
bogdanm 0:9b334a45a8ff 90 * @brief AF 3 selection
bogdanm 0:9b334a45a8ff 91 */
bogdanm 0:9b334a45a8ff 92 #define GPIO_AF3_TIM8 ((uint8_t)0x03) /* TIM8 Alternate Function mapping */
bogdanm 0:9b334a45a8ff 93 #define GPIO_AF3_TIM9 ((uint8_t)0x03) /* TIM9 Alternate Function mapping */
bogdanm 0:9b334a45a8ff 94 #define GPIO_AF3_TIM10 ((uint8_t)0x03) /* TIM10 Alternate Function mapping */
bogdanm 0:9b334a45a8ff 95 #define GPIO_AF3_TIM11 ((uint8_t)0x03) /* TIM11 Alternate Function mapping */
bogdanm 0:9b334a45a8ff 96 #define GPIO_AF3_LPTIM1 ((uint8_t)0x03) /* LPTIM1 Alternate Function mapping */
bogdanm 0:9b334a45a8ff 97 #define GPIO_AF3_CEC ((uint8_t)0x03) /* CEC Alternate Function mapping */
bogdanm 0:9b334a45a8ff 98
bogdanm 0:9b334a45a8ff 99
bogdanm 0:9b334a45a8ff 100 /**
bogdanm 0:9b334a45a8ff 101 * @brief AF 4 selection
bogdanm 0:9b334a45a8ff 102 */
bogdanm 0:9b334a45a8ff 103 #define GPIO_AF4_I2C1 ((uint8_t)0x04) /* I2C1 Alternate Function mapping */
bogdanm 0:9b334a45a8ff 104 #define GPIO_AF4_I2C2 ((uint8_t)0x04) /* I2C2 Alternate Function mapping */
bogdanm 0:9b334a45a8ff 105 #define GPIO_AF4_I2C3 ((uint8_t)0x04) /* I2C3 Alternate Function mapping */
bogdanm 0:9b334a45a8ff 106 #define GPIO_AF4_I2C4 ((uint8_t)0x04) /* I2C4 Alternate Function mapping */
bogdanm 0:9b334a45a8ff 107 #define GPIO_AF4_CEC ((uint8_t)0x04) /* CEC Alternate Function mapping */
bogdanm 0:9b334a45a8ff 108
bogdanm 0:9b334a45a8ff 109 /**
bogdanm 0:9b334a45a8ff 110 * @brief AF 5 selection
bogdanm 0:9b334a45a8ff 111 */
bogdanm 0:9b334a45a8ff 112 #define GPIO_AF5_SPI1 ((uint8_t)0x05) /* SPI1 Alternate Function mapping */
bogdanm 0:9b334a45a8ff 113 #define GPIO_AF5_SPI2 ((uint8_t)0x05) /* SPI2/I2S2 Alternate Function mapping */
bogdanm 0:9b334a45a8ff 114 #define GPIO_AF5_SPI3 ((uint8_t)0x05) /* SPI3/I2S3 Alternate Function mapping */
bogdanm 0:9b334a45a8ff 115 #define GPIO_AF5_SPI4 ((uint8_t)0x05) /* SPI4 Alternate Function mapping */
bogdanm 0:9b334a45a8ff 116 #define GPIO_AF5_SPI5 ((uint8_t)0x05) /* SPI5 Alternate Function mapping */
bogdanm 0:9b334a45a8ff 117 #define GPIO_AF5_SPI6 ((uint8_t)0x05) /* SPI6 Alternate Function mapping */
bogdanm 0:9b334a45a8ff 118
bogdanm 0:9b334a45a8ff 119 /**
bogdanm 0:9b334a45a8ff 120 * @brief AF 6 selection
bogdanm 0:9b334a45a8ff 121 */
bogdanm 0:9b334a45a8ff 122 #define GPIO_AF6_SPI3 ((uint8_t)0x06) /* SPI3/I2S3 Alternate Function mapping */
bogdanm 0:9b334a45a8ff 123 #define GPIO_AF6_SAI1 ((uint8_t)0x06) /* SAI1 Alternate Function mapping */
bogdanm 0:9b334a45a8ff 124
bogdanm 0:9b334a45a8ff 125 /**
bogdanm 0:9b334a45a8ff 126 * @brief AF 7 selection
bogdanm 0:9b334a45a8ff 127 */
bogdanm 0:9b334a45a8ff 128 #define GPIO_AF7_USART1 ((uint8_t)0x07) /* USART1 Alternate Function mapping */
bogdanm 0:9b334a45a8ff 129 #define GPIO_AF7_USART2 ((uint8_t)0x07) /* USART2 Alternate Function mapping */
bogdanm 0:9b334a45a8ff 130 #define GPIO_AF7_USART3 ((uint8_t)0x07) /* USART3 Alternate Function mapping */
bogdanm 0:9b334a45a8ff 131 #define GPIO_AF7_UART5 ((uint8_t)0x07) /* UART5 Alternate Function mapping */
bogdanm 0:9b334a45a8ff 132 #define GPIO_AF7_SPDIFRX ((uint8_t)0x07) /* SPDIF-RX Alternate Function mapping */
bogdanm 0:9b334a45a8ff 133 #define GPIO_AF7_SPI2 ((uint8_t)0x07) /* SPI2 Alternate Function mapping */
bogdanm 0:9b334a45a8ff 134 #define GPIO_AF7_SPI3 ((uint8_t)0x07) /* SPI3 Alternate Function mapping */
bogdanm 0:9b334a45a8ff 135
bogdanm 0:9b334a45a8ff 136 /**
bogdanm 0:9b334a45a8ff 137 * @brief AF 8 selection
bogdanm 0:9b334a45a8ff 138 */
bogdanm 0:9b334a45a8ff 139 #define GPIO_AF8_UART4 ((uint8_t)0x08) /* UART4 Alternate Function mapping */
bogdanm 0:9b334a45a8ff 140 #define GPIO_AF8_UART5 ((uint8_t)0x08) /* UART5 Alternate Function mapping */
bogdanm 0:9b334a45a8ff 141 #define GPIO_AF8_USART6 ((uint8_t)0x08) /* USART6 Alternate Function mapping */
bogdanm 0:9b334a45a8ff 142 #define GPIO_AF8_UART7 ((uint8_t)0x08) /* UART7 Alternate Function mapping */
bogdanm 0:9b334a45a8ff 143 #define GPIO_AF8_UART8 ((uint8_t)0x08) /* UART8 Alternate Function mapping */
bogdanm 0:9b334a45a8ff 144 #define GPIO_AF8_SPDIFRX ((uint8_t)0x08) /* SPIDIF-RX Alternate Function mapping */
bogdanm 0:9b334a45a8ff 145 #define GPIO_AF8_SAI2 ((uint8_t)0x08) /* SAI2 Alternate Function mapping */
bogdanm 0:9b334a45a8ff 146
bogdanm 0:9b334a45a8ff 147
bogdanm 0:9b334a45a8ff 148 /**
bogdanm 0:9b334a45a8ff 149 * @brief AF 9 selection
bogdanm 0:9b334a45a8ff 150 */
bogdanm 0:9b334a45a8ff 151 #define GPIO_AF9_CAN1 ((uint8_t)0x09) /* CAN1 Alternate Function mapping */
bogdanm 0:9b334a45a8ff 152 #define GPIO_AF9_CAN2 ((uint8_t)0x09) /* CAN2 Alternate Function mapping */
bogdanm 0:9b334a45a8ff 153 #define GPIO_AF9_TIM12 ((uint8_t)0x09) /* TIM12 Alternate Function mapping */
bogdanm 0:9b334a45a8ff 154 #define GPIO_AF9_TIM13 ((uint8_t)0x09) /* TIM13 Alternate Function mapping */
bogdanm 0:9b334a45a8ff 155 #define GPIO_AF9_TIM14 ((uint8_t)0x09) /* TIM14 Alternate Function mapping */
bogdanm 0:9b334a45a8ff 156 #define GPIO_AF9_QUADSPI ((uint8_t)0x09) /* QUADSPI Alternate Function mapping */
bogdanm 0:9b334a45a8ff 157 #if defined(STM32F756xx) || defined(STM32F746xx)
bogdanm 0:9b334a45a8ff 158 #define GPIO_AF9_LTDC ((uint8_t)0x09) /* LCD-TFT Alternate Function mapping */
bogdanm 0:9b334a45a8ff 159 #endif /* STM32F756xx || STM32F746xx */
bogdanm 0:9b334a45a8ff 160 /**
bogdanm 0:9b334a45a8ff 161 * @brief AF 10 selection
bogdanm 0:9b334a45a8ff 162 */
bogdanm 0:9b334a45a8ff 163 #define GPIO_AF10_OTG_FS ((uint8_t)0xA) /* OTG_FS Alternate Function mapping */
bogdanm 0:9b334a45a8ff 164 #define GPIO_AF10_OTG_HS ((uint8_t)0xA) /* OTG_HS Alternate Function mapping */
bogdanm 0:9b334a45a8ff 165 #define GPIO_AF10_QUADSPI ((uint8_t)0xA) /* QUADSPI Alternate Function mapping */
bogdanm 0:9b334a45a8ff 166 #define GPIO_AF10_SAI2 ((uint8_t)0xA) /* SAI2 Alternate Function mapping */
bogdanm 0:9b334a45a8ff 167
bogdanm 0:9b334a45a8ff 168 /**
bogdanm 0:9b334a45a8ff 169 * @brief AF 11 selection
bogdanm 0:9b334a45a8ff 170 */
bogdanm 0:9b334a45a8ff 171 #define GPIO_AF11_ETH ((uint8_t)0x0B) /* ETHERNET Alternate Function mapping */
bogdanm 0:9b334a45a8ff 172
bogdanm 0:9b334a45a8ff 173 /**
bogdanm 0:9b334a45a8ff 174 * @brief AF 12 selection
bogdanm 0:9b334a45a8ff 175 */
bogdanm 0:9b334a45a8ff 176 #define GPIO_AF12_FMC ((uint8_t)0xC) /* FMC Alternate Function mapping */
bogdanm 0:9b334a45a8ff 177 #define GPIO_AF12_OTG_HS_FS ((uint8_t)0xC) /* OTG HS configured in FS, Alternate Function mapping */
bogdanm 0:9b334a45a8ff 178 #define GPIO_AF12_SDMMC1 ((uint8_t)0xC) /* SDMMC1 Alternate Function mapping */
bogdanm 0:9b334a45a8ff 179
bogdanm 0:9b334a45a8ff 180 /**
bogdanm 0:9b334a45a8ff 181 * @brief AF 13 selection
bogdanm 0:9b334a45a8ff 182 */
bogdanm 0:9b334a45a8ff 183 #define GPIO_AF13_DCMI ((uint8_t)0x0D) /* DCMI Alternate Function mapping */
bogdanm 0:9b334a45a8ff 184
bogdanm 0:9b334a45a8ff 185 #if defined(STM32F756xx) || defined(STM32F746xx)
bogdanm 0:9b334a45a8ff 186 /**
bogdanm 0:9b334a45a8ff 187 * @brief AF 14 selection
bogdanm 0:9b334a45a8ff 188 */
bogdanm 0:9b334a45a8ff 189 #define GPIO_AF14_LTDC ((uint8_t)0x0E) /* LCD-TFT Alternate Function mapping */
bogdanm 0:9b334a45a8ff 190 #endif /* STM32F756xx || STM32F746xx */
bogdanm 0:9b334a45a8ff 191 /**
bogdanm 0:9b334a45a8ff 192 * @brief AF 15 selection
bogdanm 0:9b334a45a8ff 193 */
bogdanm 0:9b334a45a8ff 194 #define GPIO_AF15_EVENTOUT ((uint8_t)0x0F) /* EVENTOUT Alternate Function mapping */
bogdanm 0:9b334a45a8ff 195
bogdanm 0:9b334a45a8ff 196
bogdanm 0:9b334a45a8ff 197 /**
bogdanm 0:9b334a45a8ff 198 * @}
bogdanm 0:9b334a45a8ff 199 */
bogdanm 0:9b334a45a8ff 200
bogdanm 0:9b334a45a8ff 201 /**
bogdanm 0:9b334a45a8ff 202 * @}
bogdanm 0:9b334a45a8ff 203 */
bogdanm 0:9b334a45a8ff 204
bogdanm 0:9b334a45a8ff 205 /* Exported macro ------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 206 /** @defgroup GPIOEx_Exported_Macros GPIO Exported Macros
bogdanm 0:9b334a45a8ff 207 * @{
bogdanm 0:9b334a45a8ff 208 */
bogdanm 0:9b334a45a8ff 209 /**
bogdanm 0:9b334a45a8ff 210 * @}
bogdanm 0:9b334a45a8ff 211 */
bogdanm 0:9b334a45a8ff 212
bogdanm 0:9b334a45a8ff 213 /* Exported functions --------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 214 /** @defgroup GPIOEx_Exported_Functions GPIO Exported Functions
bogdanm 0:9b334a45a8ff 215 * @{
bogdanm 0:9b334a45a8ff 216 */
bogdanm 0:9b334a45a8ff 217 /**
bogdanm 0:9b334a45a8ff 218 * @}
bogdanm 0:9b334a45a8ff 219 */
bogdanm 0:9b334a45a8ff 220 /* Private types -------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 221 /* Private variables ---------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 222 /* Private constants ---------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 223 /** @defgroup GPIOEx_Private_Constants GPIO Private Constants
bogdanm 0:9b334a45a8ff 224 * @{
bogdanm 0:9b334a45a8ff 225 */
bogdanm 0:9b334a45a8ff 226
bogdanm 0:9b334a45a8ff 227 /**
bogdanm 0:9b334a45a8ff 228 * @brief GPIO pin available on the platform
bogdanm 0:9b334a45a8ff 229 */
bogdanm 0:9b334a45a8ff 230 /* Defines the available pins per GPIOs */
bogdanm 0:9b334a45a8ff 231 #define GPIOA_PIN_AVAILABLE GPIO_PIN_All
bogdanm 0:9b334a45a8ff 232 #define GPIOB_PIN_AVAILABLE GPIO_PIN_All
bogdanm 0:9b334a45a8ff 233 #define GPIOC_PIN_AVAILABLE GPIO_PIN_All
bogdanm 0:9b334a45a8ff 234 #define GPIOD_PIN_AVAILABLE GPIO_PIN_All
bogdanm 0:9b334a45a8ff 235 #define GPIOE_PIN_AVAILABLE GPIO_PIN_All
bogdanm 0:9b334a45a8ff 236 #define GPIOF_PIN_AVAILABLE GPIO_PIN_All
bogdanm 0:9b334a45a8ff 237 #define GPIOG_PIN_AVAILABLE GPIO_PIN_All
bogdanm 0:9b334a45a8ff 238 #define GPIOI_PIN_AVAILABLE GPIO_PIN_All
bogdanm 0:9b334a45a8ff 239 #define GPIOJ_PIN_AVAILABLE GPIO_PIN_All
bogdanm 0:9b334a45a8ff 240 #define GPIOH_PIN_AVAILABLE GPIO_PIN_All
bogdanm 0:9b334a45a8ff 241 #define GPIOK_PIN_AVAILABLE (GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_3 | GPIO_PIN_4 | \
bogdanm 0:9b334a45a8ff 242 GPIO_PIN_5 | GPIO_PIN_6 | GPIO_PIN_7)
bogdanm 0:9b334a45a8ff 243
bogdanm 0:9b334a45a8ff 244 /**
bogdanm 0:9b334a45a8ff 245 * @}
bogdanm 0:9b334a45a8ff 246 */
bogdanm 0:9b334a45a8ff 247
bogdanm 0:9b334a45a8ff 248 /* Private macros ------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 249 /** @defgroup GPIOEx_Private_Macros GPIO Private Macros
bogdanm 0:9b334a45a8ff 250 * @{
bogdanm 0:9b334a45a8ff 251 */
bogdanm 0:9b334a45a8ff 252 /** @defgroup GPIOEx_Get_Port_Index GPIO Get Port Index
bogdanm 0:9b334a45a8ff 253 * @{
bogdanm 0:9b334a45a8ff 254 */
bogdanm 0:9b334a45a8ff 255 #define GPIO_GET_INDEX(__GPIOx__) (uint8_t)(((__GPIOx__) == (GPIOA))? 0U :\
bogdanm 0:9b334a45a8ff 256 ((__GPIOx__) == (GPIOB))? 1U :\
bogdanm 0:9b334a45a8ff 257 ((__GPIOx__) == (GPIOC))? 2U :\
bogdanm 0:9b334a45a8ff 258 ((__GPIOx__) == (GPIOD))? 3U :\
bogdanm 0:9b334a45a8ff 259 ((__GPIOx__) == (GPIOE))? 4U :\
bogdanm 0:9b334a45a8ff 260 ((__GPIOx__) == (GPIOF))? 5U :\
bogdanm 0:9b334a45a8ff 261 ((__GPIOx__) == (GPIOG))? 6U :\
bogdanm 0:9b334a45a8ff 262 ((__GPIOx__) == (GPIOH))? 7U :\
bogdanm 0:9b334a45a8ff 263 ((__GPIOx__) == (GPIOI))? 8U :\
bogdanm 0:9b334a45a8ff 264 ((__GPIOx__) == (GPIOJ))? 9U : 10U)
bogdanm 0:9b334a45a8ff 265 /**
bogdanm 0:9b334a45a8ff 266 * @}
bogdanm 0:9b334a45a8ff 267 */
bogdanm 0:9b334a45a8ff 268
bogdanm 0:9b334a45a8ff 269 #define IS_GPIO_PIN_AVAILABLE(__INSTANCE__,__PIN__) \
bogdanm 0:9b334a45a8ff 270 ((((__INSTANCE__) == GPIOA) && (((__PIN__) & (GPIOA_PIN_AVAILABLE)) != 0) && (((__PIN__) | (GPIOA_PIN_AVAILABLE)) == (GPIOA_PIN_AVAILABLE))) || \
bogdanm 0:9b334a45a8ff 271 (((__INSTANCE__) == GPIOB) && (((__PIN__) & (GPIOB_PIN_AVAILABLE)) != 0) && (((__PIN__) | (GPIOB_PIN_AVAILABLE)) == (GPIOB_PIN_AVAILABLE))) || \
bogdanm 0:9b334a45a8ff 272 (((__INSTANCE__) == GPIOC) && (((__PIN__) & (GPIOC_PIN_AVAILABLE)) != 0) && (((__PIN__) | (GPIOC_PIN_AVAILABLE)) == (GPIOC_PIN_AVAILABLE))) || \
bogdanm 0:9b334a45a8ff 273 (((__INSTANCE__) == GPIOD) && (((__PIN__) & (GPIOD_PIN_AVAILABLE)) != 0) && (((__PIN__) | (GPIOD_PIN_AVAILABLE)) == (GPIOD_PIN_AVAILABLE))) || \
bogdanm 0:9b334a45a8ff 274 (((__INSTANCE__) == GPIOE) && (((__PIN__) & (GPIOE_PIN_AVAILABLE)) != 0) && (((__PIN__) | (GPIOE_PIN_AVAILABLE)) == (GPIOE_PIN_AVAILABLE))) || \
bogdanm 0:9b334a45a8ff 275 (((__INSTANCE__) == GPIOF) && (((__PIN__) & (GPIOF_PIN_AVAILABLE)) != 0) && (((__PIN__) | (GPIOF_PIN_AVAILABLE)) == (GPIOF_PIN_AVAILABLE))) || \
bogdanm 0:9b334a45a8ff 276 (((__INSTANCE__) == GPIOG) && (((__PIN__) & (GPIOG_PIN_AVAILABLE)) != 0) && (((__PIN__) | (GPIOG_PIN_AVAILABLE)) == (GPIOG_PIN_AVAILABLE))) || \
bogdanm 0:9b334a45a8ff 277 (((__INSTANCE__) == GPIOI) && (((__PIN__) & (GPIOI_PIN_AVAILABLE)) != 0) && (((__PIN__) | (GPIOI_PIN_AVAILABLE)) == (GPIOI_PIN_AVAILABLE))) || \
bogdanm 0:9b334a45a8ff 278 (((__INSTANCE__) == GPIOJ) && (((__PIN__) & (GPIOJ_PIN_AVAILABLE)) != 0) && (((__PIN__) | (GPIOJ_PIN_AVAILABLE)) == (GPIOJ_PIN_AVAILABLE))) || \
bogdanm 0:9b334a45a8ff 279 (((__INSTANCE__) == GPIOK) && (((__PIN__) & (GPIOK_PIN_AVAILABLE)) != 0) && (((__PIN__) | (GPIOK_PIN_AVAILABLE)) == (GPIOK_PIN_AVAILABLE))) || \
bogdanm 0:9b334a45a8ff 280 (((__INSTANCE__) == GPIOH) && (((__PIN__) & (GPIOH_PIN_AVAILABLE)) != 0) && (((__PIN__) | (GPIOH_PIN_AVAILABLE)) == (GPIOH_PIN_AVAILABLE))))
bogdanm 0:9b334a45a8ff 281 /** @defgroup GPIOEx_IS_Alternat_function_selection GPIO Check Alternate Function
bogdanm 0:9b334a45a8ff 282 * @{
bogdanm 0:9b334a45a8ff 283 */
bogdanm 0:9b334a45a8ff 284 #if defined(STM32F756xx) || defined(STM32F746xx)
bogdanm 0:9b334a45a8ff 285 #define IS_GPIO_AF(AF) (((AF) == GPIO_AF0_RTC_50Hz) || ((AF) == GPIO_AF1_TIM1) || \
bogdanm 0:9b334a45a8ff 286 ((AF) == GPIO_AF0_SWJ) || ((AF) == GPIO_AF0_TRACE) || \
bogdanm 0:9b334a45a8ff 287 ((AF) == GPIO_AF0_MCO) || ((AF) == GPIO_AF1_TIM2) || \
bogdanm 0:9b334a45a8ff 288 ((AF) == GPIO_AF2_TIM3) || ((AF) == GPIO_AF2_TIM4) || \
bogdanm 0:9b334a45a8ff 289 ((AF) == GPIO_AF2_TIM5) || ((AF) == GPIO_AF3_TIM8) || \
bogdanm 0:9b334a45a8ff 290 ((AF) == GPIO_AF3_TIM9) || ((AF) == GPIO_AF3_TIM10) || \
bogdanm 0:9b334a45a8ff 291 ((AF) == GPIO_AF3_TIM11) || ((AF) == GPIO_AF3_LPTIM1) || \
bogdanm 0:9b334a45a8ff 292 ((AF) == GPIO_AF3_CEC) || ((AF) == GPIO_AF4_CEC) || \
bogdanm 0:9b334a45a8ff 293 ((AF) == GPIO_AF4_I2C1) || ((AF) == GPIO_AF4_I2C2) || \
bogdanm 0:9b334a45a8ff 294 ((AF) == GPIO_AF4_I2C3) || ((AF) == GPIO_AF4_I2C4) || \
bogdanm 0:9b334a45a8ff 295 ((AF) == GPIO_AF5_SPI1) || ((AF) == GPIO_AF5_SPI2) || \
bogdanm 0:9b334a45a8ff 296 ((AF) == GPIO_AF5_SPI3) || ((AF) == GPIO_AF5_SPI4) || \
bogdanm 0:9b334a45a8ff 297 ((AF) == GPIO_AF5_SPI5) || ((AF) == GPIO_AF5_SPI6) || \
bogdanm 0:9b334a45a8ff 298 ((AF) == GPIO_AF6_SPI3) || ((AF) == GPIO_AF6_SAI1) || \
bogdanm 0:9b334a45a8ff 299 ((AF) == GPIO_AF7_SPI3) || ((AF) == GPIO_AF7_SPI2) || \
bogdanm 0:9b334a45a8ff 300 ((AF) == GPIO_AF7_USART1) || ((AF) == GPIO_AF7_USART2) || \
bogdanm 0:9b334a45a8ff 301 ((AF) == GPIO_AF7_USART3) || ((AF) == GPIO_AF7_UART5) || \
bogdanm 0:9b334a45a8ff 302 ((AF) == GPIO_AF7_SPDIFRX) || ((AF) == GPIO_AF8_SPDIFRX) || \
bogdanm 0:9b334a45a8ff 303 ((AF) == GPIO_AF8_SAI2) || ((AF) == GPIO_AF8_USART6) || \
bogdanm 0:9b334a45a8ff 304 ((AF) == GPIO_AF8_UART4) || ((AF) == GPIO_AF8_UART5) || \
bogdanm 0:9b334a45a8ff 305 ((AF) == GPIO_AF8_UART7) || ((AF) == GPIO_AF8_UART8) || \
bogdanm 0:9b334a45a8ff 306 ((AF) == GPIO_AF9_CAN1) || ((AF) == GPIO_AF9_CAN2) || \
bogdanm 0:9b334a45a8ff 307 ((AF) == GPIO_AF9_TIM12) || ((AF) == GPIO_AF9_TIM12) || \
bogdanm 0:9b334a45a8ff 308 ((AF) == GPIO_AF9_TIM14) || ((AF) == GPIO_AF9_QUADSPI) || \
bogdanm 0:9b334a45a8ff 309 ((AF) == GPIO_AF9_LTDC) || ((AF) == GPIO_AF10_OTG_FS) || \
bogdanm 0:9b334a45a8ff 310 ((AF) == GPIO_AF10_OTG_HS) || ((AF) == GPIO_AF10_SAI2) || \
bogdanm 0:9b334a45a8ff 311 ((AF) == GPIO_AF10_QUADSPI) || ((AF) == GPIO_AF11_ETH) || \
bogdanm 0:9b334a45a8ff 312 ((AF) == GPIO_AF12_OTG_HS_FS) || ((AF) == GPIO_AF12_SDMMC1) || \
bogdanm 0:9b334a45a8ff 313 ((AF) == GPIO_AF12_FMC) || ((AF) == GPIO_AF15_EVENTOUT) || \
bogdanm 0:9b334a45a8ff 314 ((AF) == GPIO_AF13_DCMI) || ((AF) == GPIO_AF14_LTDC))
bogdanm 0:9b334a45a8ff 315 #elif defined(STM32F745xx)
bogdanm 0:9b334a45a8ff 316 #define IS_GPIO_AF(AF) (((AF) == GPIO_AF0_RTC_50Hz) || ((AF) == GPIO_AF1_TIM1) || \
bogdanm 0:9b334a45a8ff 317 ((AF) == GPIO_AF0_SWJ) || ((AF) == GPIO_AF0_TRACE) || \
bogdanm 0:9b334a45a8ff 318 ((AF) == GPIO_AF0_MCO) || ((AF) == GPIO_AF1_TIM2) || \
bogdanm 0:9b334a45a8ff 319 ((AF) == GPIO_AF2_TIM3) || ((AF) == GPIO_AF2_TIM4) || \
bogdanm 0:9b334a45a8ff 320 ((AF) == GPIO_AF2_TIM5) || ((AF) == GPIO_AF3_TIM8) || \
bogdanm 0:9b334a45a8ff 321 ((AF) == GPIO_AF3_TIM9) || ((AF) == GPIO_AF3_TIM10) || \
bogdanm 0:9b334a45a8ff 322 ((AF) == GPIO_AF3_TIM11) || ((AF) == GPIO_AF3_LPTIM1) || \
bogdanm 0:9b334a45a8ff 323 ((AF) == GPIO_AF3_CEC) || ((AF) == GPIO_AF4_CEC) || \
bogdanm 0:9b334a45a8ff 324 ((AF) == GPIO_AF4_I2C1) || ((AF) == GPIO_AF4_I2C2) || \
bogdanm 0:9b334a45a8ff 325 ((AF) == GPIO_AF4_I2C3) || ((AF) == GPIO_AF4_I2C4) || \
bogdanm 0:9b334a45a8ff 326 ((AF) == GPIO_AF5_SPI1) || ((AF) == GPIO_AF5_SPI2) || \
bogdanm 0:9b334a45a8ff 327 ((AF) == GPIO_AF5_SPI3) || ((AF) == GPIO_AF5_SPI4) || \
bogdanm 0:9b334a45a8ff 328 ((AF) == GPIO_AF5_SPI5) || ((AF) == GPIO_AF5_SPI6) || \
bogdanm 0:9b334a45a8ff 329 ((AF) == GPIO_AF6_SPI3) || ((AF) == GPIO_AF6_SAI1) || \
bogdanm 0:9b334a45a8ff 330 ((AF) == GPIO_AF7_SPI3) || ((AF) == GPIO_AF7_SPI2) || \
bogdanm 0:9b334a45a8ff 331 ((AF) == GPIO_AF7_USART1) || ((AF) == GPIO_AF7_USART2) || \
bogdanm 0:9b334a45a8ff 332 ((AF) == GPIO_AF7_USART3) || ((AF) == GPIO_AF7_UART5) || \
bogdanm 0:9b334a45a8ff 333 ((AF) == GPIO_AF7_SPDIFRX) || ((AF) == GPIO_AF8_SPDIFRX) || \
bogdanm 0:9b334a45a8ff 334 ((AF) == GPIO_AF8_SAI2) || ((AF) == GPIO_AF8_USART6) || \
bogdanm 0:9b334a45a8ff 335 ((AF) == GPIO_AF8_UART4) || ((AF) == GPIO_AF8_UART5) || \
bogdanm 0:9b334a45a8ff 336 ((AF) == GPIO_AF8_UART7) || ((AF) == GPIO_AF8_UART8) || \
bogdanm 0:9b334a45a8ff 337 ((AF) == GPIO_AF9_CAN1) || ((AF) == GPIO_AF9_CAN2) || \
bogdanm 0:9b334a45a8ff 338 ((AF) == GPIO_AF9_TIM12) || ((AF) == GPIO_AF9_TIM12) || \
bogdanm 0:9b334a45a8ff 339 ((AF) == GPIO_AF9_TIM14) || ((AF) == GPIO_AF9_QUADSPI) || \
bogdanm 0:9b334a45a8ff 340 ((AF) == GPIO_AF13_DCMI) || ((AF) == GPIO_AF10_OTG_FS) || \
bogdanm 0:9b334a45a8ff 341 ((AF) == GPIO_AF10_OTG_HS) || ((AF) == GPIO_AF10_SAI2) || \
bogdanm 0:9b334a45a8ff 342 ((AF) == GPIO_AF10_QUADSPI) || ((AF) == GPIO_AF11_ETH) || \
bogdanm 0:9b334a45a8ff 343 ((AF) == GPIO_AF12_OTG_HS_FS) || ((AF) == GPIO_AF12_SDMMC1) || \
bogdanm 0:9b334a45a8ff 344 ((AF) == GPIO_AF12_FMC) || ((AF) == GPIO_AF15_EVENTOUT))
bogdanm 0:9b334a45a8ff 345 #endif /* STM32F756xx || STM32F746xx */
bogdanm 0:9b334a45a8ff 346 /**
bogdanm 0:9b334a45a8ff 347 * @}
bogdanm 0:9b334a45a8ff 348 */
bogdanm 0:9b334a45a8ff 349
bogdanm 0:9b334a45a8ff 350 /**
bogdanm 0:9b334a45a8ff 351 * @}
bogdanm 0:9b334a45a8ff 352 */
bogdanm 0:9b334a45a8ff 353
bogdanm 0:9b334a45a8ff 354 /* Private functions ---------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 355 /** @defgroup GPIOEx_Private_Functions GPIO Private Functions
bogdanm 0:9b334a45a8ff 356 * @{
bogdanm 0:9b334a45a8ff 357 */
bogdanm 0:9b334a45a8ff 358
bogdanm 0:9b334a45a8ff 359 /**
bogdanm 0:9b334a45a8ff 360 * @}
bogdanm 0:9b334a45a8ff 361 */
bogdanm 0:9b334a45a8ff 362
bogdanm 0:9b334a45a8ff 363 /**
bogdanm 0:9b334a45a8ff 364 * @}
bogdanm 0:9b334a45a8ff 365 */
bogdanm 0:9b334a45a8ff 366
bogdanm 0:9b334a45a8ff 367 /**
bogdanm 0:9b334a45a8ff 368 * @}
bogdanm 0:9b334a45a8ff 369 */
bogdanm 0:9b334a45a8ff 370
bogdanm 0:9b334a45a8ff 371 #ifdef __cplusplus
bogdanm 0:9b334a45a8ff 372 }
bogdanm 0:9b334a45a8ff 373 #endif
bogdanm 0:9b334a45a8ff 374
bogdanm 0:9b334a45a8ff 375 #endif /* __STM32F7xx_HAL_GPIO_EX_H */
bogdanm 0:9b334a45a8ff 376
bogdanm 0:9b334a45a8ff 377 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/