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fix LPC812 PWM
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targets/cmsis/TARGET_STM/TARGET_STM32F7/stm32f7xx_hal_flash_ex.c@0:9b334a45a8ff, 2015-10-01 (annotated)
- Committer:
- bogdanm
- Date:
- Thu Oct 01 15:25:22 2015 +0300
- Revision:
- 0:9b334a45a8ff
- Child:
- 83:a036322b8637
Initial commit on mbed-dev
Replaces mbed-src (now inactive)
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| bogdanm | 0:9b334a45a8ff | 1 | /** |
| bogdanm | 0:9b334a45a8ff | 2 | ****************************************************************************** |
| bogdanm | 0:9b334a45a8ff | 3 | * @file stm32f7xx_hal_flash_ex.c |
| bogdanm | 0:9b334a45a8ff | 4 | * @author MCD Application Team |
| bogdanm | 0:9b334a45a8ff | 5 | * @version V1.0.1 |
| bogdanm | 0:9b334a45a8ff | 6 | * @date 25-June-2015 |
| bogdanm | 0:9b334a45a8ff | 7 | * @brief Extended FLASH HAL module driver. |
| bogdanm | 0:9b334a45a8ff | 8 | * This file provides firmware functions to manage the following |
| bogdanm | 0:9b334a45a8ff | 9 | * functionalities of the FLASH extension peripheral: |
| bogdanm | 0:9b334a45a8ff | 10 | * + Extended programming operations functions |
| bogdanm | 0:9b334a45a8ff | 11 | * |
| bogdanm | 0:9b334a45a8ff | 12 | @verbatim |
| bogdanm | 0:9b334a45a8ff | 13 | ============================================================================== |
| bogdanm | 0:9b334a45a8ff | 14 | ##### Flash Extension features ##### |
| bogdanm | 0:9b334a45a8ff | 15 | ============================================================================== |
| bogdanm | 0:9b334a45a8ff | 16 | |
| bogdanm | 0:9b334a45a8ff | 17 | [..] Comparing to other previous devices, the FLASH interface for STM32F727xx/437xx and |
| bogdanm | 0:9b334a45a8ff | 18 | devices contains the following additional features |
| bogdanm | 0:9b334a45a8ff | 19 | |
| bogdanm | 0:9b334a45a8ff | 20 | (+) Capacity up to 2 Mbyte with dual bank architecture supporting read-while-write |
| bogdanm | 0:9b334a45a8ff | 21 | capability (RWW) |
| bogdanm | 0:9b334a45a8ff | 22 | (+) Dual bank memory organization |
| bogdanm | 0:9b334a45a8ff | 23 | (+) PCROP protection for all banks |
| bogdanm | 0:9b334a45a8ff | 24 | |
| bogdanm | 0:9b334a45a8ff | 25 | ##### How to use this driver ##### |
| bogdanm | 0:9b334a45a8ff | 26 | ============================================================================== |
| bogdanm | 0:9b334a45a8ff | 27 | [..] This driver provides functions to configure and program the FLASH memory |
| bogdanm | 0:9b334a45a8ff | 28 | of all STM32F7xx devices. It includes |
| bogdanm | 0:9b334a45a8ff | 29 | (#) FLASH Memory Erase functions: |
| bogdanm | 0:9b334a45a8ff | 30 | (++) Lock and Unlock the FLASH interface using HAL_FLASH_Unlock() and |
| bogdanm | 0:9b334a45a8ff | 31 | HAL_FLASH_Lock() functions |
| bogdanm | 0:9b334a45a8ff | 32 | (++) Erase function: Erase sector, erase all sectors |
| bogdanm | 0:9b334a45a8ff | 33 | (++) There are two modes of erase : |
| bogdanm | 0:9b334a45a8ff | 34 | (+++) Polling Mode using HAL_FLASHEx_Erase() |
| bogdanm | 0:9b334a45a8ff | 35 | (+++) Interrupt Mode using HAL_FLASHEx_Erase_IT() |
| bogdanm | 0:9b334a45a8ff | 36 | |
| bogdanm | 0:9b334a45a8ff | 37 | (#) Option Bytes Programming functions: Use HAL_FLASHEx_OBProgram() to : |
| bogdanm | 0:9b334a45a8ff | 38 | (++) Set/Reset the write protection |
| bogdanm | 0:9b334a45a8ff | 39 | (++) Set the Read protection Level |
| bogdanm | 0:9b334a45a8ff | 40 | (++) Set the BOR level |
| bogdanm | 0:9b334a45a8ff | 41 | (++) Program the user Option Bytes |
| bogdanm | 0:9b334a45a8ff | 42 | (#) Advanced Option Bytes Programming functions: Use HAL_FLASHEx_AdvOBProgram() to : |
| bogdanm | 0:9b334a45a8ff | 43 | (++) Extended space (bank 2) erase function |
| bogdanm | 0:9b334a45a8ff | 44 | (++) Full FLASH space (2 Mo) erase (bank 1 and bank 2) |
| bogdanm | 0:9b334a45a8ff | 45 | (++) Dual Boot activation |
| bogdanm | 0:9b334a45a8ff | 46 | (++) Write protection configuration for bank 2 |
| bogdanm | 0:9b334a45a8ff | 47 | (++) PCROP protection configuration and control for both banks |
| bogdanm | 0:9b334a45a8ff | 48 | |
| bogdanm | 0:9b334a45a8ff | 49 | @endverbatim |
| bogdanm | 0:9b334a45a8ff | 50 | ****************************************************************************** |
| bogdanm | 0:9b334a45a8ff | 51 | * @attention |
| bogdanm | 0:9b334a45a8ff | 52 | * |
| bogdanm | 0:9b334a45a8ff | 53 | * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> |
| bogdanm | 0:9b334a45a8ff | 54 | * |
| bogdanm | 0:9b334a45a8ff | 55 | * Redistribution and use in source and binary forms, with or without modification, |
| bogdanm | 0:9b334a45a8ff | 56 | * are permitted provided that the following conditions are met: |
| bogdanm | 0:9b334a45a8ff | 57 | * 1. Redistributions of source code must retain the above copyright notice, |
| bogdanm | 0:9b334a45a8ff | 58 | * this list of conditions and the following disclaimer. |
| bogdanm | 0:9b334a45a8ff | 59 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| bogdanm | 0:9b334a45a8ff | 60 | * this list of conditions and the following disclaimer in the documentation |
| bogdanm | 0:9b334a45a8ff | 61 | * and/or other materials provided with the distribution. |
| bogdanm | 0:9b334a45a8ff | 62 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| bogdanm | 0:9b334a45a8ff | 63 | * may be used to endorse or promote products derived from this software |
| bogdanm | 0:9b334a45a8ff | 64 | * without specific prior written permission. |
| bogdanm | 0:9b334a45a8ff | 65 | * |
| bogdanm | 0:9b334a45a8ff | 66 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| bogdanm | 0:9b334a45a8ff | 67 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| bogdanm | 0:9b334a45a8ff | 68 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| bogdanm | 0:9b334a45a8ff | 69 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| bogdanm | 0:9b334a45a8ff | 70 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| bogdanm | 0:9b334a45a8ff | 71 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| bogdanm | 0:9b334a45a8ff | 72 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| bogdanm | 0:9b334a45a8ff | 73 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| bogdanm | 0:9b334a45a8ff | 74 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| bogdanm | 0:9b334a45a8ff | 75 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| bogdanm | 0:9b334a45a8ff | 76 | * |
| bogdanm | 0:9b334a45a8ff | 77 | ****************************************************************************** |
| bogdanm | 0:9b334a45a8ff | 78 | */ |
| bogdanm | 0:9b334a45a8ff | 79 | |
| bogdanm | 0:9b334a45a8ff | 80 | /* Includes ------------------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 81 | #include "stm32f7xx_hal.h" |
| bogdanm | 0:9b334a45a8ff | 82 | |
| bogdanm | 0:9b334a45a8ff | 83 | /** @addtogroup STM32F7xx_HAL_Driver |
| bogdanm | 0:9b334a45a8ff | 84 | * @{ |
| bogdanm | 0:9b334a45a8ff | 85 | */ |
| bogdanm | 0:9b334a45a8ff | 86 | |
| bogdanm | 0:9b334a45a8ff | 87 | /** @defgroup FLASHEx FLASHEx |
| bogdanm | 0:9b334a45a8ff | 88 | * @brief FLASH HAL Extension module driver |
| bogdanm | 0:9b334a45a8ff | 89 | * @{ |
| bogdanm | 0:9b334a45a8ff | 90 | */ |
| bogdanm | 0:9b334a45a8ff | 91 | |
| bogdanm | 0:9b334a45a8ff | 92 | #ifdef HAL_FLASH_MODULE_ENABLED |
| bogdanm | 0:9b334a45a8ff | 93 | |
| bogdanm | 0:9b334a45a8ff | 94 | /* Private typedef -----------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 95 | /* Private define ------------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 96 | /** @addtogroup FLASHEx_Private_Constants |
| bogdanm | 0:9b334a45a8ff | 97 | * @{ |
| bogdanm | 0:9b334a45a8ff | 98 | */ |
| bogdanm | 0:9b334a45a8ff | 99 | #define SECTOR_MASK ((uint32_t)0xFFFFFF07) |
| bogdanm | 0:9b334a45a8ff | 100 | #define FLASH_TIMEOUT_VALUE ((uint32_t)50000)/* 50 s */ |
| bogdanm | 0:9b334a45a8ff | 101 | /** |
| bogdanm | 0:9b334a45a8ff | 102 | * @} |
| bogdanm | 0:9b334a45a8ff | 103 | */ |
| bogdanm | 0:9b334a45a8ff | 104 | |
| bogdanm | 0:9b334a45a8ff | 105 | /* Private macro -------------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 106 | /* Private variables ---------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 107 | /** @addtogroup FLASHEx_Private_Variables |
| bogdanm | 0:9b334a45a8ff | 108 | * @{ |
| bogdanm | 0:9b334a45a8ff | 109 | */ |
| bogdanm | 0:9b334a45a8ff | 110 | extern FLASH_ProcessTypeDef pFlash; |
| bogdanm | 0:9b334a45a8ff | 111 | /** |
| bogdanm | 0:9b334a45a8ff | 112 | * @} |
| bogdanm | 0:9b334a45a8ff | 113 | */ |
| bogdanm | 0:9b334a45a8ff | 114 | |
| bogdanm | 0:9b334a45a8ff | 115 | /* Private function prototypes -----------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 116 | /** @addtogroup FLASHEx_Private_Functions |
| bogdanm | 0:9b334a45a8ff | 117 | * @{ |
| bogdanm | 0:9b334a45a8ff | 118 | */ |
| bogdanm | 0:9b334a45a8ff | 119 | /* Option bytes control */ |
| bogdanm | 0:9b334a45a8ff | 120 | static void FLASH_MassErase(uint8_t VoltageRange); |
| bogdanm | 0:9b334a45a8ff | 121 | static HAL_StatusTypeDef FLASH_OB_EnableWRP(uint32_t WRPSector); |
| bogdanm | 0:9b334a45a8ff | 122 | static HAL_StatusTypeDef FLASH_OB_DisableWRP(uint32_t WRPSector); |
| bogdanm | 0:9b334a45a8ff | 123 | static HAL_StatusTypeDef FLASH_OB_RDP_LevelConfig(uint32_t Level); |
| bogdanm | 0:9b334a45a8ff | 124 | static HAL_StatusTypeDef FLASH_OB_UserConfig(uint32_t Wwdg, uint32_t Iwdg, uint32_t Stop, uint32_t Stdby, uint32_t Iwdgstop, uint32_t Iwdgstdby); |
| bogdanm | 0:9b334a45a8ff | 125 | static HAL_StatusTypeDef FLASH_OB_BOR_LevelConfig(uint8_t Level); |
| bogdanm | 0:9b334a45a8ff | 126 | static HAL_StatusTypeDef FLASH_OB_BootAddressConfig(uint32_t BootOption, uint32_t Address); |
| bogdanm | 0:9b334a45a8ff | 127 | static uint32_t FLASH_OB_GetUser(void); |
| bogdanm | 0:9b334a45a8ff | 128 | static uint32_t FLASH_OB_GetWRP(void); |
| bogdanm | 0:9b334a45a8ff | 129 | static uint8_t FLASH_OB_GetRDP(void); |
| bogdanm | 0:9b334a45a8ff | 130 | static uint32_t FLASH_OB_GetBOR(void); |
| bogdanm | 0:9b334a45a8ff | 131 | static uint32_t FLASH_OB_GetBootAddress(uint32_t BootOption); |
| bogdanm | 0:9b334a45a8ff | 132 | |
| bogdanm | 0:9b334a45a8ff | 133 | extern HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout); |
| bogdanm | 0:9b334a45a8ff | 134 | /** |
| bogdanm | 0:9b334a45a8ff | 135 | * @} |
| bogdanm | 0:9b334a45a8ff | 136 | */ |
| bogdanm | 0:9b334a45a8ff | 137 | |
| bogdanm | 0:9b334a45a8ff | 138 | /* Exported functions --------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 139 | /** @defgroup FLASHEx_Exported_Functions FLASHEx Exported Functions |
| bogdanm | 0:9b334a45a8ff | 140 | * @{ |
| bogdanm | 0:9b334a45a8ff | 141 | */ |
| bogdanm | 0:9b334a45a8ff | 142 | |
| bogdanm | 0:9b334a45a8ff | 143 | /** @defgroup FLASHEx_Exported_Functions_Group1 Extended IO operation functions |
| bogdanm | 0:9b334a45a8ff | 144 | * @brief Extended IO operation functions |
| bogdanm | 0:9b334a45a8ff | 145 | * |
| bogdanm | 0:9b334a45a8ff | 146 | @verbatim |
| bogdanm | 0:9b334a45a8ff | 147 | =============================================================================== |
| bogdanm | 0:9b334a45a8ff | 148 | ##### Extended programming operation functions ##### |
| bogdanm | 0:9b334a45a8ff | 149 | =============================================================================== |
| bogdanm | 0:9b334a45a8ff | 150 | [..] |
| bogdanm | 0:9b334a45a8ff | 151 | This subsection provides a set of functions allowing to manage the Extension FLASH |
| bogdanm | 0:9b334a45a8ff | 152 | programming operations Operations. |
| bogdanm | 0:9b334a45a8ff | 153 | |
| bogdanm | 0:9b334a45a8ff | 154 | @endverbatim |
| bogdanm | 0:9b334a45a8ff | 155 | * @{ |
| bogdanm | 0:9b334a45a8ff | 156 | */ |
| bogdanm | 0:9b334a45a8ff | 157 | /** |
| bogdanm | 0:9b334a45a8ff | 158 | * @brief Perform a mass erase or erase the specified FLASH memory sectors |
| bogdanm | 0:9b334a45a8ff | 159 | * @param[in] pEraseInit: pointer to an FLASH_EraseInitTypeDef structure that |
| bogdanm | 0:9b334a45a8ff | 160 | * contains the configuration information for the erasing. |
| bogdanm | 0:9b334a45a8ff | 161 | * |
| bogdanm | 0:9b334a45a8ff | 162 | * @param[out] SectorError: pointer to variable that |
| bogdanm | 0:9b334a45a8ff | 163 | * contains the configuration information on faulty sector in case of error |
| bogdanm | 0:9b334a45a8ff | 164 | * (0xFFFFFFFF means that all the sectors have been correctly erased) |
| bogdanm | 0:9b334a45a8ff | 165 | * |
| bogdanm | 0:9b334a45a8ff | 166 | * @retval HAL Status |
| bogdanm | 0:9b334a45a8ff | 167 | */ |
| bogdanm | 0:9b334a45a8ff | 168 | HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *SectorError) |
| bogdanm | 0:9b334a45a8ff | 169 | { |
| bogdanm | 0:9b334a45a8ff | 170 | HAL_StatusTypeDef status = HAL_ERROR; |
| bogdanm | 0:9b334a45a8ff | 171 | uint32_t index = 0; |
| bogdanm | 0:9b334a45a8ff | 172 | |
| bogdanm | 0:9b334a45a8ff | 173 | /* Process Locked */ |
| bogdanm | 0:9b334a45a8ff | 174 | __HAL_LOCK(&pFlash); |
| bogdanm | 0:9b334a45a8ff | 175 | |
| bogdanm | 0:9b334a45a8ff | 176 | /* Check the parameters */ |
| bogdanm | 0:9b334a45a8ff | 177 | assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase)); |
| bogdanm | 0:9b334a45a8ff | 178 | |
| bogdanm | 0:9b334a45a8ff | 179 | /* Wait for last operation to be completed */ |
| bogdanm | 0:9b334a45a8ff | 180 | status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); |
| bogdanm | 0:9b334a45a8ff | 181 | |
| bogdanm | 0:9b334a45a8ff | 182 | if(status == HAL_OK) |
| bogdanm | 0:9b334a45a8ff | 183 | { |
| bogdanm | 0:9b334a45a8ff | 184 | /*Initialization of SectorError variable*/ |
| bogdanm | 0:9b334a45a8ff | 185 | *SectorError = 0xFFFFFFFF; |
| bogdanm | 0:9b334a45a8ff | 186 | |
| bogdanm | 0:9b334a45a8ff | 187 | if(pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE) |
| bogdanm | 0:9b334a45a8ff | 188 | { |
| bogdanm | 0:9b334a45a8ff | 189 | /*Mass erase to be done*/ |
| bogdanm | 0:9b334a45a8ff | 190 | FLASH_MassErase((uint8_t) pEraseInit->VoltageRange); |
| bogdanm | 0:9b334a45a8ff | 191 | |
| bogdanm | 0:9b334a45a8ff | 192 | /* Wait for last operation to be completed */ |
| bogdanm | 0:9b334a45a8ff | 193 | status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); |
| bogdanm | 0:9b334a45a8ff | 194 | |
| bogdanm | 0:9b334a45a8ff | 195 | /* if the erase operation is completed, disable the MER Bit */ |
| bogdanm | 0:9b334a45a8ff | 196 | FLASH->CR &= (~FLASH_MER_BIT); |
| bogdanm | 0:9b334a45a8ff | 197 | } |
| bogdanm | 0:9b334a45a8ff | 198 | else |
| bogdanm | 0:9b334a45a8ff | 199 | { |
| bogdanm | 0:9b334a45a8ff | 200 | /* Check the parameters */ |
| bogdanm | 0:9b334a45a8ff | 201 | assert_param(IS_FLASH_NBSECTORS(pEraseInit->NbSectors + pEraseInit->Sector)); |
| bogdanm | 0:9b334a45a8ff | 202 | |
| bogdanm | 0:9b334a45a8ff | 203 | /* Erase by sector by sector to be done*/ |
| bogdanm | 0:9b334a45a8ff | 204 | for(index = pEraseInit->Sector; index < (pEraseInit->NbSectors + pEraseInit->Sector); index++) |
| bogdanm | 0:9b334a45a8ff | 205 | { |
| bogdanm | 0:9b334a45a8ff | 206 | FLASH_Erase_Sector(index, (uint8_t) pEraseInit->VoltageRange); |
| bogdanm | 0:9b334a45a8ff | 207 | |
| bogdanm | 0:9b334a45a8ff | 208 | /* Wait for last operation to be completed */ |
| bogdanm | 0:9b334a45a8ff | 209 | status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); |
| bogdanm | 0:9b334a45a8ff | 210 | |
| bogdanm | 0:9b334a45a8ff | 211 | /* If the erase operation is completed, disable the SER Bit */ |
| bogdanm | 0:9b334a45a8ff | 212 | FLASH->CR &= (~FLASH_CR_SER); |
| bogdanm | 0:9b334a45a8ff | 213 | FLASH->CR &= SECTOR_MASK; |
| bogdanm | 0:9b334a45a8ff | 214 | |
| bogdanm | 0:9b334a45a8ff | 215 | if(status != HAL_OK) |
| bogdanm | 0:9b334a45a8ff | 216 | { |
| bogdanm | 0:9b334a45a8ff | 217 | /* In case of error, stop erase procedure and return the faulty sector*/ |
| bogdanm | 0:9b334a45a8ff | 218 | *SectorError = index; |
| bogdanm | 0:9b334a45a8ff | 219 | break; |
| bogdanm | 0:9b334a45a8ff | 220 | } |
| bogdanm | 0:9b334a45a8ff | 221 | } |
| bogdanm | 0:9b334a45a8ff | 222 | } |
| bogdanm | 0:9b334a45a8ff | 223 | } |
| bogdanm | 0:9b334a45a8ff | 224 | |
| bogdanm | 0:9b334a45a8ff | 225 | /* Process Unlocked */ |
| bogdanm | 0:9b334a45a8ff | 226 | __HAL_UNLOCK(&pFlash); |
| bogdanm | 0:9b334a45a8ff | 227 | |
| bogdanm | 0:9b334a45a8ff | 228 | return status; |
| bogdanm | 0:9b334a45a8ff | 229 | } |
| bogdanm | 0:9b334a45a8ff | 230 | |
| bogdanm | 0:9b334a45a8ff | 231 | /** |
| bogdanm | 0:9b334a45a8ff | 232 | * @brief Perform a mass erase or erase the specified FLASH memory sectors with interrupt enabled |
| bogdanm | 0:9b334a45a8ff | 233 | * @param pEraseInit: pointer to an FLASH_EraseInitTypeDef structure that |
| bogdanm | 0:9b334a45a8ff | 234 | * contains the configuration information for the erasing. |
| bogdanm | 0:9b334a45a8ff | 235 | * |
| bogdanm | 0:9b334a45a8ff | 236 | * @retval HAL Status |
| bogdanm | 0:9b334a45a8ff | 237 | */ |
| bogdanm | 0:9b334a45a8ff | 238 | HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit) |
| bogdanm | 0:9b334a45a8ff | 239 | { |
| bogdanm | 0:9b334a45a8ff | 240 | HAL_StatusTypeDef status = HAL_OK; |
| bogdanm | 0:9b334a45a8ff | 241 | |
| bogdanm | 0:9b334a45a8ff | 242 | /* Process Locked */ |
| bogdanm | 0:9b334a45a8ff | 243 | __HAL_LOCK(&pFlash); |
| bogdanm | 0:9b334a45a8ff | 244 | |
| bogdanm | 0:9b334a45a8ff | 245 | /* Check the parameters */ |
| bogdanm | 0:9b334a45a8ff | 246 | assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase)); |
| bogdanm | 0:9b334a45a8ff | 247 | |
| bogdanm | 0:9b334a45a8ff | 248 | /* Enable End of FLASH Operation interrupt */ |
| bogdanm | 0:9b334a45a8ff | 249 | __HAL_FLASH_ENABLE_IT(FLASH_IT_EOP); |
| bogdanm | 0:9b334a45a8ff | 250 | |
| bogdanm | 0:9b334a45a8ff | 251 | /* Enable Error source interrupt */ |
| bogdanm | 0:9b334a45a8ff | 252 | __HAL_FLASH_ENABLE_IT(FLASH_IT_ERR); |
| bogdanm | 0:9b334a45a8ff | 253 | |
| bogdanm | 0:9b334a45a8ff | 254 | /* Clear pending flags (if any) */ |
| bogdanm | 0:9b334a45a8ff | 255 | __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP | FLASH_FLAG_OPERR | FLASH_FLAG_WRPERR |\ |
| bogdanm | 0:9b334a45a8ff | 256 | FLASH_FLAG_PGAERR | FLASH_FLAG_PGPERR| FLASH_FLAG_ERSERR); |
| bogdanm | 0:9b334a45a8ff | 257 | |
| bogdanm | 0:9b334a45a8ff | 258 | if(pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE) |
| bogdanm | 0:9b334a45a8ff | 259 | { |
| bogdanm | 0:9b334a45a8ff | 260 | /*Mass erase to be done*/ |
| bogdanm | 0:9b334a45a8ff | 261 | pFlash.ProcedureOnGoing = FLASH_PROC_MASSERASE; |
| bogdanm | 0:9b334a45a8ff | 262 | FLASH_MassErase((uint8_t) pEraseInit->VoltageRange); |
| bogdanm | 0:9b334a45a8ff | 263 | } |
| bogdanm | 0:9b334a45a8ff | 264 | else |
| bogdanm | 0:9b334a45a8ff | 265 | { |
| bogdanm | 0:9b334a45a8ff | 266 | /* Erase by sector to be done*/ |
| bogdanm | 0:9b334a45a8ff | 267 | |
| bogdanm | 0:9b334a45a8ff | 268 | /* Check the parameters */ |
| bogdanm | 0:9b334a45a8ff | 269 | assert_param(IS_FLASH_NBSECTORS(pEraseInit->NbSectors + pEraseInit->Sector)); |
| bogdanm | 0:9b334a45a8ff | 270 | |
| bogdanm | 0:9b334a45a8ff | 271 | pFlash.ProcedureOnGoing = FLASH_PROC_SECTERASE; |
| bogdanm | 0:9b334a45a8ff | 272 | pFlash.NbSectorsToErase = pEraseInit->NbSectors; |
| bogdanm | 0:9b334a45a8ff | 273 | pFlash.Sector = pEraseInit->Sector; |
| bogdanm | 0:9b334a45a8ff | 274 | pFlash.VoltageForErase = (uint8_t)pEraseInit->VoltageRange; |
| bogdanm | 0:9b334a45a8ff | 275 | |
| bogdanm | 0:9b334a45a8ff | 276 | /*Erase 1st sector and wait for IT*/ |
| bogdanm | 0:9b334a45a8ff | 277 | FLASH_Erase_Sector(pEraseInit->Sector, pEraseInit->VoltageRange); |
| bogdanm | 0:9b334a45a8ff | 278 | } |
| bogdanm | 0:9b334a45a8ff | 279 | |
| bogdanm | 0:9b334a45a8ff | 280 | return status; |
| bogdanm | 0:9b334a45a8ff | 281 | } |
| bogdanm | 0:9b334a45a8ff | 282 | |
| bogdanm | 0:9b334a45a8ff | 283 | /** |
| bogdanm | 0:9b334a45a8ff | 284 | * @brief Program option bytes |
| bogdanm | 0:9b334a45a8ff | 285 | * @param pOBInit: pointer to an FLASH_OBInitStruct structure that |
| bogdanm | 0:9b334a45a8ff | 286 | * contains the configuration information for the programming. |
| bogdanm | 0:9b334a45a8ff | 287 | * |
| bogdanm | 0:9b334a45a8ff | 288 | * @retval HAL Status |
| bogdanm | 0:9b334a45a8ff | 289 | */ |
| bogdanm | 0:9b334a45a8ff | 290 | HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit) |
| bogdanm | 0:9b334a45a8ff | 291 | { |
| bogdanm | 0:9b334a45a8ff | 292 | HAL_StatusTypeDef status = HAL_ERROR; |
| bogdanm | 0:9b334a45a8ff | 293 | |
| bogdanm | 0:9b334a45a8ff | 294 | /* Process Locked */ |
| bogdanm | 0:9b334a45a8ff | 295 | __HAL_LOCK(&pFlash); |
| bogdanm | 0:9b334a45a8ff | 296 | |
| bogdanm | 0:9b334a45a8ff | 297 | /* Check the parameters */ |
| bogdanm | 0:9b334a45a8ff | 298 | assert_param(IS_OPTIONBYTE(pOBInit->OptionType)); |
| bogdanm | 0:9b334a45a8ff | 299 | |
| bogdanm | 0:9b334a45a8ff | 300 | /* Write protection configuration */ |
| bogdanm | 0:9b334a45a8ff | 301 | if((pOBInit->OptionType & OPTIONBYTE_WRP) == OPTIONBYTE_WRP) |
| bogdanm | 0:9b334a45a8ff | 302 | { |
| bogdanm | 0:9b334a45a8ff | 303 | assert_param(IS_WRPSTATE(pOBInit->WRPState)); |
| bogdanm | 0:9b334a45a8ff | 304 | if(pOBInit->WRPState == OB_WRPSTATE_ENABLE) |
| bogdanm | 0:9b334a45a8ff | 305 | { |
| bogdanm | 0:9b334a45a8ff | 306 | /*Enable of Write protection on the selected Sector*/ |
| bogdanm | 0:9b334a45a8ff | 307 | status = FLASH_OB_EnableWRP(pOBInit->WRPSector); |
| bogdanm | 0:9b334a45a8ff | 308 | } |
| bogdanm | 0:9b334a45a8ff | 309 | else |
| bogdanm | 0:9b334a45a8ff | 310 | { |
| bogdanm | 0:9b334a45a8ff | 311 | /*Disable of Write protection on the selected Sector*/ |
| bogdanm | 0:9b334a45a8ff | 312 | status = FLASH_OB_DisableWRP(pOBInit->WRPSector); |
| bogdanm | 0:9b334a45a8ff | 313 | } |
| bogdanm | 0:9b334a45a8ff | 314 | } |
| bogdanm | 0:9b334a45a8ff | 315 | |
| bogdanm | 0:9b334a45a8ff | 316 | /* Read protection configuration */ |
| bogdanm | 0:9b334a45a8ff | 317 | if((pOBInit->OptionType & OPTIONBYTE_RDP) == OPTIONBYTE_RDP) |
| bogdanm | 0:9b334a45a8ff | 318 | { |
| bogdanm | 0:9b334a45a8ff | 319 | status = FLASH_OB_RDP_LevelConfig(pOBInit->RDPLevel); |
| bogdanm | 0:9b334a45a8ff | 320 | } |
| bogdanm | 0:9b334a45a8ff | 321 | |
| bogdanm | 0:9b334a45a8ff | 322 | /* USER configuration */ |
| bogdanm | 0:9b334a45a8ff | 323 | if((pOBInit->OptionType & OPTIONBYTE_USER) == OPTIONBYTE_USER) |
| bogdanm | 0:9b334a45a8ff | 324 | { |
| bogdanm | 0:9b334a45a8ff | 325 | status = FLASH_OB_UserConfig(pOBInit->USERConfig & OB_WWDG_SW, |
| bogdanm | 0:9b334a45a8ff | 326 | pOBInit->USERConfig & OB_IWDG_SW, |
| bogdanm | 0:9b334a45a8ff | 327 | pOBInit->USERConfig & OB_STOP_NO_RST, |
| bogdanm | 0:9b334a45a8ff | 328 | pOBInit->USERConfig & OB_STDBY_NO_RST, |
| bogdanm | 0:9b334a45a8ff | 329 | pOBInit->USERConfig & OB_IWDG_STOP_ACTIVE, |
| bogdanm | 0:9b334a45a8ff | 330 | pOBInit->USERConfig & OB_IWDG_STDBY_ACTIVE); |
| bogdanm | 0:9b334a45a8ff | 331 | } |
| bogdanm | 0:9b334a45a8ff | 332 | |
| bogdanm | 0:9b334a45a8ff | 333 | /* BOR Level configuration */ |
| bogdanm | 0:9b334a45a8ff | 334 | if((pOBInit->OptionType & OPTIONBYTE_BOR) == OPTIONBYTE_BOR) |
| bogdanm | 0:9b334a45a8ff | 335 | { |
| bogdanm | 0:9b334a45a8ff | 336 | status = FLASH_OB_BOR_LevelConfig(pOBInit->BORLevel); |
| bogdanm | 0:9b334a45a8ff | 337 | } |
| bogdanm | 0:9b334a45a8ff | 338 | |
| bogdanm | 0:9b334a45a8ff | 339 | /* Boot 0 Address configuration */ |
| bogdanm | 0:9b334a45a8ff | 340 | if((pOBInit->OptionType & OPTIONBYTE_BOOTADDR_0) == OPTIONBYTE_BOOTADDR_0) |
| bogdanm | 0:9b334a45a8ff | 341 | { |
| bogdanm | 0:9b334a45a8ff | 342 | status = FLASH_OB_BootAddressConfig(OPTIONBYTE_BOOTADDR_0, pOBInit->BootAddr0); |
| bogdanm | 0:9b334a45a8ff | 343 | } |
| bogdanm | 0:9b334a45a8ff | 344 | |
| bogdanm | 0:9b334a45a8ff | 345 | /* Boot 1 Address configuration */ |
| bogdanm | 0:9b334a45a8ff | 346 | if((pOBInit->OptionType & OPTIONBYTE_BOOTADDR_1) == OPTIONBYTE_BOOTADDR_1) |
| bogdanm | 0:9b334a45a8ff | 347 | { |
| bogdanm | 0:9b334a45a8ff | 348 | status = FLASH_OB_BootAddressConfig(OPTIONBYTE_BOOTADDR_1, pOBInit->BootAddr1); |
| bogdanm | 0:9b334a45a8ff | 349 | } |
| bogdanm | 0:9b334a45a8ff | 350 | |
| bogdanm | 0:9b334a45a8ff | 351 | /* Process Unlocked */ |
| bogdanm | 0:9b334a45a8ff | 352 | __HAL_UNLOCK(&pFlash); |
| bogdanm | 0:9b334a45a8ff | 353 | |
| bogdanm | 0:9b334a45a8ff | 354 | return status; |
| bogdanm | 0:9b334a45a8ff | 355 | } |
| bogdanm | 0:9b334a45a8ff | 356 | |
| bogdanm | 0:9b334a45a8ff | 357 | /** |
| bogdanm | 0:9b334a45a8ff | 358 | * @brief Get the Option byte configuration |
| bogdanm | 0:9b334a45a8ff | 359 | * @param pOBInit: pointer to an FLASH_OBInitStruct structure that |
| bogdanm | 0:9b334a45a8ff | 360 | * contains the configuration information for the programming. |
| bogdanm | 0:9b334a45a8ff | 361 | * |
| bogdanm | 0:9b334a45a8ff | 362 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 363 | */ |
| bogdanm | 0:9b334a45a8ff | 364 | void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit) |
| bogdanm | 0:9b334a45a8ff | 365 | { |
| bogdanm | 0:9b334a45a8ff | 366 | pOBInit->OptionType = OPTIONBYTE_WRP | OPTIONBYTE_RDP | OPTIONBYTE_USER |\ |
| bogdanm | 0:9b334a45a8ff | 367 | OPTIONBYTE_BOR | OPTIONBYTE_BOOTADDR_0 | OPTIONBYTE_BOOTADDR_1; |
| bogdanm | 0:9b334a45a8ff | 368 | |
| bogdanm | 0:9b334a45a8ff | 369 | /*Get WRP*/ |
| bogdanm | 0:9b334a45a8ff | 370 | pOBInit->WRPSector = FLASH_OB_GetWRP(); |
| bogdanm | 0:9b334a45a8ff | 371 | |
| bogdanm | 0:9b334a45a8ff | 372 | /*Get RDP Level*/ |
| bogdanm | 0:9b334a45a8ff | 373 | pOBInit->RDPLevel = FLASH_OB_GetRDP(); |
| bogdanm | 0:9b334a45a8ff | 374 | |
| bogdanm | 0:9b334a45a8ff | 375 | /*Get USER*/ |
| bogdanm | 0:9b334a45a8ff | 376 | pOBInit->USERConfig = FLASH_OB_GetUser(); |
| bogdanm | 0:9b334a45a8ff | 377 | |
| bogdanm | 0:9b334a45a8ff | 378 | /*Get BOR Level*/ |
| bogdanm | 0:9b334a45a8ff | 379 | pOBInit->BORLevel = FLASH_OB_GetBOR(); |
| bogdanm | 0:9b334a45a8ff | 380 | |
| bogdanm | 0:9b334a45a8ff | 381 | /*Get Boot Address when Boot pin = 0 */ |
| bogdanm | 0:9b334a45a8ff | 382 | pOBInit->BootAddr0 = FLASH_OB_GetBootAddress(OPTIONBYTE_BOOTADDR_0); |
| bogdanm | 0:9b334a45a8ff | 383 | |
| bogdanm | 0:9b334a45a8ff | 384 | /*Get Boot Address when Boot pin = 1 */ |
| bogdanm | 0:9b334a45a8ff | 385 | pOBInit->BootAddr1 = FLASH_OB_GetBootAddress(OPTIONBYTE_BOOTADDR_1); |
| bogdanm | 0:9b334a45a8ff | 386 | } |
| bogdanm | 0:9b334a45a8ff | 387 | |
| bogdanm | 0:9b334a45a8ff | 388 | /** |
| bogdanm | 0:9b334a45a8ff | 389 | * @} |
| bogdanm | 0:9b334a45a8ff | 390 | */ |
| bogdanm | 0:9b334a45a8ff | 391 | |
| bogdanm | 0:9b334a45a8ff | 392 | /** |
| bogdanm | 0:9b334a45a8ff | 393 | * @brief Full erase of FLASH memory sectors |
| bogdanm | 0:9b334a45a8ff | 394 | * @param VoltageRange: The device voltage range which defines the erase parallelism. |
| bogdanm | 0:9b334a45a8ff | 395 | * This parameter can be one of the following values: |
| bogdanm | 0:9b334a45a8ff | 396 | * @arg VOLTAGE_RANGE_1: when the device voltage range is 1.8V to 2.1V, |
| bogdanm | 0:9b334a45a8ff | 397 | * the operation will be done by byte (8-bit) |
| bogdanm | 0:9b334a45a8ff | 398 | * @arg VOLTAGE_RANGE_2: when the device voltage range is 2.1V to 2.7V, |
| bogdanm | 0:9b334a45a8ff | 399 | * the operation will be done by half word (16-bit) |
| bogdanm | 0:9b334a45a8ff | 400 | * @arg VOLTAGE_RANGE_3: when the device voltage range is 2.7V to 3.6V, |
| bogdanm | 0:9b334a45a8ff | 401 | * the operation will be done by word (32-bit) |
| bogdanm | 0:9b334a45a8ff | 402 | * @arg VOLTAGE_RANGE_4: when the device voltage range is 2.7V to 3.6V + External Vpp, |
| bogdanm | 0:9b334a45a8ff | 403 | * the operation will be done by double word (64-bit) |
| bogdanm | 0:9b334a45a8ff | 404 | * |
| bogdanm | 0:9b334a45a8ff | 405 | * @retval HAL Status |
| bogdanm | 0:9b334a45a8ff | 406 | */ |
| bogdanm | 0:9b334a45a8ff | 407 | static void FLASH_MassErase(uint8_t VoltageRange) |
| bogdanm | 0:9b334a45a8ff | 408 | { |
| bogdanm | 0:9b334a45a8ff | 409 | uint32_t tmp_psize = 0; |
| bogdanm | 0:9b334a45a8ff | 410 | |
| bogdanm | 0:9b334a45a8ff | 411 | /* Check the parameters */ |
| bogdanm | 0:9b334a45a8ff | 412 | assert_param(IS_VOLTAGERANGE(VoltageRange)); |
| bogdanm | 0:9b334a45a8ff | 413 | |
| bogdanm | 0:9b334a45a8ff | 414 | /* if the previous operation is completed, proceed to erase all sectors */ |
| bogdanm | 0:9b334a45a8ff | 415 | FLASH->CR &= CR_PSIZE_MASK; |
| bogdanm | 0:9b334a45a8ff | 416 | FLASH->CR |= tmp_psize; |
| bogdanm | 0:9b334a45a8ff | 417 | FLASH->CR |= FLASH_CR_MER; |
| bogdanm | 0:9b334a45a8ff | 418 | FLASH->CR |= FLASH_CR_STRT; |
| bogdanm | 0:9b334a45a8ff | 419 | /* Data synchronous Barrier (DSB) Just after the write operation |
| bogdanm | 0:9b334a45a8ff | 420 | This will force the CPU to respect the sequence of instruction (no optimization).*/ |
| bogdanm | 0:9b334a45a8ff | 421 | __DSB(); |
| bogdanm | 0:9b334a45a8ff | 422 | } |
| bogdanm | 0:9b334a45a8ff | 423 | |
| bogdanm | 0:9b334a45a8ff | 424 | /** |
| bogdanm | 0:9b334a45a8ff | 425 | * @brief Erase the specified FLASH memory sector |
| bogdanm | 0:9b334a45a8ff | 426 | * @param Sector: FLASH sector to erase |
| bogdanm | 0:9b334a45a8ff | 427 | * The value of this parameter depend on device used within the same series |
| bogdanm | 0:9b334a45a8ff | 428 | * @param VoltageRange: The device voltage range which defines the erase parallelism. |
| bogdanm | 0:9b334a45a8ff | 429 | * This parameter can be one of the following values: |
| bogdanm | 0:9b334a45a8ff | 430 | * @arg FLASH_VOLTAGE_RANGE_1: when the device voltage range is 1.8V to 2.1V, |
| bogdanm | 0:9b334a45a8ff | 431 | * the operation will be done by byte (8-bit) |
| bogdanm | 0:9b334a45a8ff | 432 | * @arg FLASH_VOLTAGE_RANGE_2: when the device voltage range is 2.1V to 2.7V, |
| bogdanm | 0:9b334a45a8ff | 433 | * the operation will be done by half word (16-bit) |
| bogdanm | 0:9b334a45a8ff | 434 | * @arg FLASH_VOLTAGE_RANGE_3: when the device voltage range is 2.7V to 3.6V, |
| bogdanm | 0:9b334a45a8ff | 435 | * the operation will be done by word (32-bit) |
| bogdanm | 0:9b334a45a8ff | 436 | * @arg FLASH_VOLTAGE_RANGE_4: when the device voltage range is 2.7V to 3.6V + External Vpp, |
| bogdanm | 0:9b334a45a8ff | 437 | * the operation will be done by double word (64-bit) |
| bogdanm | 0:9b334a45a8ff | 438 | * |
| bogdanm | 0:9b334a45a8ff | 439 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 440 | */ |
| bogdanm | 0:9b334a45a8ff | 441 | void FLASH_Erase_Sector(uint32_t Sector, uint8_t VoltageRange) |
| bogdanm | 0:9b334a45a8ff | 442 | { |
| bogdanm | 0:9b334a45a8ff | 443 | uint32_t tmp_psize = 0; |
| bogdanm | 0:9b334a45a8ff | 444 | |
| bogdanm | 0:9b334a45a8ff | 445 | /* Check the parameters */ |
| bogdanm | 0:9b334a45a8ff | 446 | assert_param(IS_FLASH_SECTOR(Sector)); |
| bogdanm | 0:9b334a45a8ff | 447 | assert_param(IS_VOLTAGERANGE(VoltageRange)); |
| bogdanm | 0:9b334a45a8ff | 448 | |
| bogdanm | 0:9b334a45a8ff | 449 | if(VoltageRange == FLASH_VOLTAGE_RANGE_1) |
| bogdanm | 0:9b334a45a8ff | 450 | { |
| bogdanm | 0:9b334a45a8ff | 451 | tmp_psize = FLASH_PSIZE_BYTE; |
| bogdanm | 0:9b334a45a8ff | 452 | } |
| bogdanm | 0:9b334a45a8ff | 453 | else if(VoltageRange == FLASH_VOLTAGE_RANGE_2) |
| bogdanm | 0:9b334a45a8ff | 454 | { |
| bogdanm | 0:9b334a45a8ff | 455 | tmp_psize = FLASH_PSIZE_HALF_WORD; |
| bogdanm | 0:9b334a45a8ff | 456 | } |
| bogdanm | 0:9b334a45a8ff | 457 | else if(VoltageRange == FLASH_VOLTAGE_RANGE_3) |
| bogdanm | 0:9b334a45a8ff | 458 | { |
| bogdanm | 0:9b334a45a8ff | 459 | tmp_psize = FLASH_PSIZE_WORD; |
| bogdanm | 0:9b334a45a8ff | 460 | } |
| bogdanm | 0:9b334a45a8ff | 461 | else |
| bogdanm | 0:9b334a45a8ff | 462 | { |
| bogdanm | 0:9b334a45a8ff | 463 | tmp_psize = FLASH_PSIZE_DOUBLE_WORD; |
| bogdanm | 0:9b334a45a8ff | 464 | } |
| bogdanm | 0:9b334a45a8ff | 465 | |
| bogdanm | 0:9b334a45a8ff | 466 | /* If the previous operation is completed, proceed to erase the sector */ |
| bogdanm | 0:9b334a45a8ff | 467 | FLASH->CR &= CR_PSIZE_MASK; |
| bogdanm | 0:9b334a45a8ff | 468 | FLASH->CR |= tmp_psize; |
| bogdanm | 0:9b334a45a8ff | 469 | FLASH->CR &= SECTOR_MASK; |
| bogdanm | 0:9b334a45a8ff | 470 | FLASH->CR |= FLASH_CR_SER | (Sector << POSITION_VAL(FLASH_CR_SNB)); |
| bogdanm | 0:9b334a45a8ff | 471 | FLASH->CR |= FLASH_CR_STRT; |
| bogdanm | 0:9b334a45a8ff | 472 | |
| bogdanm | 0:9b334a45a8ff | 473 | /* Data synchronous Barrier (DSB) Just after the write operation |
| bogdanm | 0:9b334a45a8ff | 474 | This will force the CPU to respect the sequence of instruction (no optimization).*/ |
| bogdanm | 0:9b334a45a8ff | 475 | __DSB(); |
| bogdanm | 0:9b334a45a8ff | 476 | } |
| bogdanm | 0:9b334a45a8ff | 477 | |
| bogdanm | 0:9b334a45a8ff | 478 | /** |
| bogdanm | 0:9b334a45a8ff | 479 | * @brief Enable the write protection of the desired bank1 or bank 2 sectors |
| bogdanm | 0:9b334a45a8ff | 480 | * |
| bogdanm | 0:9b334a45a8ff | 481 | * @note When the memory read protection level is selected (RDP level = 1), |
| bogdanm | 0:9b334a45a8ff | 482 | * it is not possible to program or erase the flash sector i if CortexM4 |
| bogdanm | 0:9b334a45a8ff | 483 | * debug features are connected or boot code is executed in RAM, even if nWRPi = 1 |
| bogdanm | 0:9b334a45a8ff | 484 | * @note Active value of nWRPi bits is inverted when PCROP mode is active (SPRMOD =1). |
| bogdanm | 0:9b334a45a8ff | 485 | * |
| bogdanm | 0:9b334a45a8ff | 486 | * @param WRPSector: specifies the sector(s) to be write protected. |
| bogdanm | 0:9b334a45a8ff | 487 | * This parameter can be one of the following values: |
| bogdanm | 0:9b334a45a8ff | 488 | * @arg WRPSector: A value between OB_WRP_SECTOR_0 and OB_WRP_SECTOR_7 |
| bogdanm | 0:9b334a45a8ff | 489 | * @arg OB_WRP_SECTOR_All |
| bogdanm | 0:9b334a45a8ff | 490 | * |
| bogdanm | 0:9b334a45a8ff | 491 | * @retval HAL FLASH State |
| bogdanm | 0:9b334a45a8ff | 492 | */ |
| bogdanm | 0:9b334a45a8ff | 493 | static HAL_StatusTypeDef FLASH_OB_EnableWRP(uint32_t WRPSector) |
| bogdanm | 0:9b334a45a8ff | 494 | { |
| bogdanm | 0:9b334a45a8ff | 495 | HAL_StatusTypeDef status = HAL_OK; |
| bogdanm | 0:9b334a45a8ff | 496 | |
| bogdanm | 0:9b334a45a8ff | 497 | /* Check the parameters */ |
| bogdanm | 0:9b334a45a8ff | 498 | assert_param(IS_OB_WRP_SECTOR(WRPSector)); |
| bogdanm | 0:9b334a45a8ff | 499 | |
| bogdanm | 0:9b334a45a8ff | 500 | /* Wait for last operation to be completed */ |
| bogdanm | 0:9b334a45a8ff | 501 | status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); |
| bogdanm | 0:9b334a45a8ff | 502 | |
| bogdanm | 0:9b334a45a8ff | 503 | if(status == HAL_OK) |
| bogdanm | 0:9b334a45a8ff | 504 | { |
| bogdanm | 0:9b334a45a8ff | 505 | /*Write protection enabled on sectors */ |
| bogdanm | 0:9b334a45a8ff | 506 | FLASH->OPTCR &= (~WRPSector); |
| bogdanm | 0:9b334a45a8ff | 507 | } |
| bogdanm | 0:9b334a45a8ff | 508 | |
| bogdanm | 0:9b334a45a8ff | 509 | return status; |
| bogdanm | 0:9b334a45a8ff | 510 | } |
| bogdanm | 0:9b334a45a8ff | 511 | |
| bogdanm | 0:9b334a45a8ff | 512 | /** |
| bogdanm | 0:9b334a45a8ff | 513 | * @brief Disable the write protection of the desired bank1 or bank 2 sectors |
| bogdanm | 0:9b334a45a8ff | 514 | * |
| bogdanm | 0:9b334a45a8ff | 515 | * @note When the memory read protection level is selected (RDP level = 1), |
| bogdanm | 0:9b334a45a8ff | 516 | * it is not possible to program or erase the flash sector i if CortexM4 |
| bogdanm | 0:9b334a45a8ff | 517 | * debug features are connected or boot code is executed in RAM, even if nWRPi = 1 |
| bogdanm | 0:9b334a45a8ff | 518 | * |
| bogdanm | 0:9b334a45a8ff | 519 | * @param WRPSector: specifies the sector(s) to be write protected. |
| bogdanm | 0:9b334a45a8ff | 520 | * This parameter can be one of the following values: |
| bogdanm | 0:9b334a45a8ff | 521 | * @arg WRPSector: A value between OB_WRP_SECTOR_0 and OB_WRP_SECTOR_7 |
| bogdanm | 0:9b334a45a8ff | 522 | * @arg OB_WRP_Sector_All |
| bogdanm | 0:9b334a45a8ff | 523 | * |
| bogdanm | 0:9b334a45a8ff | 524 | * |
| bogdanm | 0:9b334a45a8ff | 525 | * @retval HAL Status |
| bogdanm | 0:9b334a45a8ff | 526 | */ |
| bogdanm | 0:9b334a45a8ff | 527 | static HAL_StatusTypeDef FLASH_OB_DisableWRP(uint32_t WRPSector) |
| bogdanm | 0:9b334a45a8ff | 528 | { |
| bogdanm | 0:9b334a45a8ff | 529 | HAL_StatusTypeDef status = HAL_OK; |
| bogdanm | 0:9b334a45a8ff | 530 | |
| bogdanm | 0:9b334a45a8ff | 531 | /* Check the parameters */ |
| bogdanm | 0:9b334a45a8ff | 532 | assert_param(IS_OB_WRP_SECTOR(WRPSector)); |
| bogdanm | 0:9b334a45a8ff | 533 | |
| bogdanm | 0:9b334a45a8ff | 534 | /* Wait for last operation to be completed */ |
| bogdanm | 0:9b334a45a8ff | 535 | status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); |
| bogdanm | 0:9b334a45a8ff | 536 | |
| bogdanm | 0:9b334a45a8ff | 537 | if(status == HAL_OK) |
| bogdanm | 0:9b334a45a8ff | 538 | { |
| bogdanm | 0:9b334a45a8ff | 539 | /* Write protection disabled on sectors */ |
| bogdanm | 0:9b334a45a8ff | 540 | FLASH->OPTCR |= (WRPSector); |
| bogdanm | 0:9b334a45a8ff | 541 | } |
| bogdanm | 0:9b334a45a8ff | 542 | |
| bogdanm | 0:9b334a45a8ff | 543 | return status; |
| bogdanm | 0:9b334a45a8ff | 544 | } |
| bogdanm | 0:9b334a45a8ff | 545 | |
| bogdanm | 0:9b334a45a8ff | 546 | |
| bogdanm | 0:9b334a45a8ff | 547 | |
| bogdanm | 0:9b334a45a8ff | 548 | |
| bogdanm | 0:9b334a45a8ff | 549 | /** |
| bogdanm | 0:9b334a45a8ff | 550 | * @brief Set the read protection level. |
| bogdanm | 0:9b334a45a8ff | 551 | * @param Level: specifies the read protection level. |
| bogdanm | 0:9b334a45a8ff | 552 | * This parameter can be one of the following values: |
| bogdanm | 0:9b334a45a8ff | 553 | * @arg OB_RDP_LEVEL_0: No protection |
| bogdanm | 0:9b334a45a8ff | 554 | * @arg OB_RDP_LEVEL_1: Read protection of the memory |
| bogdanm | 0:9b334a45a8ff | 555 | * @arg OB_RDP_LEVEL_2: Full chip protection |
| bogdanm | 0:9b334a45a8ff | 556 | * |
| bogdanm | 0:9b334a45a8ff | 557 | * @note WARNING: When enabling OB_RDP level 2 it's no more possible to go back to level 1 or 0 |
| bogdanm | 0:9b334a45a8ff | 558 | * |
| bogdanm | 0:9b334a45a8ff | 559 | * @retval HAL Status |
| bogdanm | 0:9b334a45a8ff | 560 | */ |
| bogdanm | 0:9b334a45a8ff | 561 | static HAL_StatusTypeDef FLASH_OB_RDP_LevelConfig(uint32_t Level) |
| bogdanm | 0:9b334a45a8ff | 562 | { |
| bogdanm | 0:9b334a45a8ff | 563 | HAL_StatusTypeDef status = HAL_OK; |
| bogdanm | 0:9b334a45a8ff | 564 | |
| bogdanm | 0:9b334a45a8ff | 565 | /* Check the parameters */ |
| bogdanm | 0:9b334a45a8ff | 566 | assert_param(IS_OB_RDP_LEVEL(Level)); |
| bogdanm | 0:9b334a45a8ff | 567 | |
| bogdanm | 0:9b334a45a8ff | 568 | /* Wait for last operation to be completed */ |
| bogdanm | 0:9b334a45a8ff | 569 | status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); |
| bogdanm | 0:9b334a45a8ff | 570 | |
| bogdanm | 0:9b334a45a8ff | 571 | if(status == HAL_OK) |
| bogdanm | 0:9b334a45a8ff | 572 | { |
| bogdanm | 0:9b334a45a8ff | 573 | MODIFY_REG(FLASH->OPTCR, FLASH_OPTCR_RDP, Level); |
| bogdanm | 0:9b334a45a8ff | 574 | } |
| bogdanm | 0:9b334a45a8ff | 575 | |
| bogdanm | 0:9b334a45a8ff | 576 | return status; |
| bogdanm | 0:9b334a45a8ff | 577 | } |
| bogdanm | 0:9b334a45a8ff | 578 | |
| bogdanm | 0:9b334a45a8ff | 579 | /** |
| bogdanm | 0:9b334a45a8ff | 580 | * @brief Program the FLASH User Option Byte: IWDG_SW / RST_STOP / RST_STDBY. |
| bogdanm | 0:9b334a45a8ff | 581 | * @param Wwdg: Selects the IWDG mode |
| bogdanm | 0:9b334a45a8ff | 582 | * This parameter can be one of the following values: |
| bogdanm | 0:9b334a45a8ff | 583 | * @arg OB_WWDG_SW: Software WWDG selected |
| bogdanm | 0:9b334a45a8ff | 584 | * @arg OB_WWDG_HW: Hardware WWDG selected |
| bogdanm | 0:9b334a45a8ff | 585 | * @param Iwdg: Selects the WWDG mode |
| bogdanm | 0:9b334a45a8ff | 586 | * This parameter can be one of the following values: |
| bogdanm | 0:9b334a45a8ff | 587 | * @arg OB_IWDG_SW: Software IWDG selected |
| bogdanm | 0:9b334a45a8ff | 588 | * @arg OB_IWDG_HW: Hardware IWDG selected |
| bogdanm | 0:9b334a45a8ff | 589 | * @param Stop: Reset event when entering STOP mode. |
| bogdanm | 0:9b334a45a8ff | 590 | * This parameter can be one of the following values: |
| bogdanm | 0:9b334a45a8ff | 591 | * @arg OB_STOP_NO_RST: No reset generated when entering in STOP |
| bogdanm | 0:9b334a45a8ff | 592 | * @arg OB_STOP_RST: Reset generated when entering in STOP |
| bogdanm | 0:9b334a45a8ff | 593 | * @param Stdby: Reset event when entering Standby mode. |
| bogdanm | 0:9b334a45a8ff | 594 | * This parameter can be one of the following values: |
| bogdanm | 0:9b334a45a8ff | 595 | * @arg OB_STDBY_NO_RST: No reset generated when entering in STANDBY |
| bogdanm | 0:9b334a45a8ff | 596 | * @arg OB_STDBY_RST: Reset generated when entering in STANDBY |
| bogdanm | 0:9b334a45a8ff | 597 | * @param Iwdgstop: Independent watchdog counter freeze in Stop mode. |
| bogdanm | 0:9b334a45a8ff | 598 | * This parameter can be one of the following values: |
| bogdanm | 0:9b334a45a8ff | 599 | * @arg OB_IWDG_STOP_FREEZE: Freeze IWDG counter in STOP |
| bogdanm | 0:9b334a45a8ff | 600 | * @arg OB_IWDG_STOP_ACTIVE: IWDG counter active in STOP |
| bogdanm | 0:9b334a45a8ff | 601 | * @param Iwdgstdby: Independent watchdog counter freeze in standby mode. |
| bogdanm | 0:9b334a45a8ff | 602 | * This parameter can be one of the following values: |
| bogdanm | 0:9b334a45a8ff | 603 | * @arg OB_IWDG_STDBY_FREEZE: Freeze IWDG counter in STANDBY |
| bogdanm | 0:9b334a45a8ff | 604 | * @arg OB_IWDG_STDBY_ACTIVE: IWDG counter active in STANDBY |
| bogdanm | 0:9b334a45a8ff | 605 | * @retval HAL Status |
| bogdanm | 0:9b334a45a8ff | 606 | */ |
| bogdanm | 0:9b334a45a8ff | 607 | static HAL_StatusTypeDef FLASH_OB_UserConfig(uint32_t Wwdg, uint32_t Iwdg, uint32_t Stop, uint32_t Stdby, uint32_t Iwdgstop, uint32_t Iwdgstdby ) |
| bogdanm | 0:9b334a45a8ff | 608 | { |
| bogdanm | 0:9b334a45a8ff | 609 | uint32_t useroptionmask = 0x00; |
| bogdanm | 0:9b334a45a8ff | 610 | uint32_t useroptionvalue = 0x00; |
| bogdanm | 0:9b334a45a8ff | 611 | |
| bogdanm | 0:9b334a45a8ff | 612 | HAL_StatusTypeDef status = HAL_OK; |
| bogdanm | 0:9b334a45a8ff | 613 | |
| bogdanm | 0:9b334a45a8ff | 614 | /* Check the parameters */ |
| bogdanm | 0:9b334a45a8ff | 615 | assert_param(IS_OB_WWDG_SOURCE(Wwdg)); |
| bogdanm | 0:9b334a45a8ff | 616 | assert_param(IS_OB_IWDG_SOURCE(Iwdg)); |
| bogdanm | 0:9b334a45a8ff | 617 | assert_param(IS_OB_STOP_SOURCE(Stop)); |
| bogdanm | 0:9b334a45a8ff | 618 | assert_param(IS_OB_STDBY_SOURCE(Stdby)); |
| bogdanm | 0:9b334a45a8ff | 619 | assert_param(IS_OB_IWDG_STOP_FREEZE(Iwdgstop)); |
| bogdanm | 0:9b334a45a8ff | 620 | assert_param(IS_OB_IWDG_STDBY_FREEZE(Iwdgstdby)); |
| bogdanm | 0:9b334a45a8ff | 621 | |
| bogdanm | 0:9b334a45a8ff | 622 | /* Wait for last operation to be completed */ |
| bogdanm | 0:9b334a45a8ff | 623 | status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); |
| bogdanm | 0:9b334a45a8ff | 624 | |
| bogdanm | 0:9b334a45a8ff | 625 | if(status == HAL_OK) |
| bogdanm | 0:9b334a45a8ff | 626 | { |
| bogdanm | 0:9b334a45a8ff | 627 | useroptionmask = (FLASH_OPTCR_WWDG_SW | FLASH_OPTCR_IWDG_SW | FLASH_OPTCR_nRST_STOP | \ |
| bogdanm | 0:9b334a45a8ff | 628 | FLASH_OPTCR_nRST_STDBY | FLASH_OPTCR_IWDG_STOP | FLASH_OPTCR_IWDG_STDBY); |
| bogdanm | 0:9b334a45a8ff | 629 | |
| bogdanm | 0:9b334a45a8ff | 630 | useroptionvalue = (Iwdg | Wwdg | Stop | Stdby | Iwdgstop | Iwdgstdby); |
| bogdanm | 0:9b334a45a8ff | 631 | |
| bogdanm | 0:9b334a45a8ff | 632 | /* Update User Option Byte */ |
| bogdanm | 0:9b334a45a8ff | 633 | MODIFY_REG(FLASH->OPTCR, useroptionmask, useroptionvalue); |
| bogdanm | 0:9b334a45a8ff | 634 | } |
| bogdanm | 0:9b334a45a8ff | 635 | |
| bogdanm | 0:9b334a45a8ff | 636 | return status; |
| bogdanm | 0:9b334a45a8ff | 637 | |
| bogdanm | 0:9b334a45a8ff | 638 | } |
| bogdanm | 0:9b334a45a8ff | 639 | |
| bogdanm | 0:9b334a45a8ff | 640 | /** |
| bogdanm | 0:9b334a45a8ff | 641 | * @brief Set the BOR Level. |
| bogdanm | 0:9b334a45a8ff | 642 | * @param Level: specifies the Option Bytes BOR Reset Level. |
| bogdanm | 0:9b334a45a8ff | 643 | * This parameter can be one of the following values: |
| bogdanm | 0:9b334a45a8ff | 644 | * @arg OB_BOR_LEVEL3: Supply voltage ranges from 2.7 to 3.6 V |
| bogdanm | 0:9b334a45a8ff | 645 | * @arg OB_BOR_LEVEL2: Supply voltage ranges from 2.4 to 2.7 V |
| bogdanm | 0:9b334a45a8ff | 646 | * @arg OB_BOR_LEVEL1: Supply voltage ranges from 2.1 to 2.4 V |
| bogdanm | 0:9b334a45a8ff | 647 | * @arg OB_BOR_OFF: Supply voltage ranges from 1.62 to 2.1 V |
| bogdanm | 0:9b334a45a8ff | 648 | * @retval HAL Status |
| bogdanm | 0:9b334a45a8ff | 649 | */ |
| bogdanm | 0:9b334a45a8ff | 650 | static HAL_StatusTypeDef FLASH_OB_BOR_LevelConfig(uint8_t Level) |
| bogdanm | 0:9b334a45a8ff | 651 | { |
| bogdanm | 0:9b334a45a8ff | 652 | /* Check the parameters */ |
| bogdanm | 0:9b334a45a8ff | 653 | assert_param(IS_OB_BOR_LEVEL(Level)); |
| bogdanm | 0:9b334a45a8ff | 654 | |
| bogdanm | 0:9b334a45a8ff | 655 | /* Set the BOR Level */ |
| bogdanm | 0:9b334a45a8ff | 656 | MODIFY_REG(FLASH->OPTCR, FLASH_OPTCR_BOR_LEV, Level); |
| bogdanm | 0:9b334a45a8ff | 657 | |
| bogdanm | 0:9b334a45a8ff | 658 | return HAL_OK; |
| bogdanm | 0:9b334a45a8ff | 659 | |
| bogdanm | 0:9b334a45a8ff | 660 | } |
| bogdanm | 0:9b334a45a8ff | 661 | |
| bogdanm | 0:9b334a45a8ff | 662 | /** |
| bogdanm | 0:9b334a45a8ff | 663 | * @brief Configure Boot base address. |
| bogdanm | 0:9b334a45a8ff | 664 | * |
| bogdanm | 0:9b334a45a8ff | 665 | * @param BootOption : specifies Boot base address depending from Boot pin = 0 or pin = 1 |
| bogdanm | 0:9b334a45a8ff | 666 | * This parameter can be one of the following values: |
| bogdanm | 0:9b334a45a8ff | 667 | * @arg OPTIONBYTE_BOOTADDR_0 : Boot address based when Boot pin = 0 |
| bogdanm | 0:9b334a45a8ff | 668 | * @arg OPTIONBYTE_BOOTADDR_1 : Boot address based when Boot pin = 1 |
| bogdanm | 0:9b334a45a8ff | 669 | * @param Address: specifies Boot base address |
| bogdanm | 0:9b334a45a8ff | 670 | * This parameter can be one of the following values: |
| bogdanm | 0:9b334a45a8ff | 671 | * @arg OB_BOOTADDR_ITCM_RAM : Boot from ITCM RAM (0x00000000) |
| bogdanm | 0:9b334a45a8ff | 672 | * @arg OB_BOOTADDR_SYSTEM : Boot from System memory bootloader (0x00100000) |
| bogdanm | 0:9b334a45a8ff | 673 | * @arg OB_BOOTADDR_ITCM_FLASH : Boot from Flash on ITCM interface (0x00200000) |
| bogdanm | 0:9b334a45a8ff | 674 | * @arg OB_BOOTADDR_AXIM_FLASH : Boot from Flash on AXIM interface (0x08000000) |
| bogdanm | 0:9b334a45a8ff | 675 | * @arg OB_BOOTADDR_DTCM_RAM : Boot from DTCM RAM (0x20000000) |
| bogdanm | 0:9b334a45a8ff | 676 | * @arg OB_BOOTADDR_SRAM1 : Boot from SRAM1 (0x20010000) |
| bogdanm | 0:9b334a45a8ff | 677 | * @arg OB_BOOTADDR_SRAM2 : Boot from SRAM2 (0x2004C000) |
| bogdanm | 0:9b334a45a8ff | 678 | * |
| bogdanm | 0:9b334a45a8ff | 679 | * @retval HAL Status |
| bogdanm | 0:9b334a45a8ff | 680 | */ |
| bogdanm | 0:9b334a45a8ff | 681 | static HAL_StatusTypeDef FLASH_OB_BootAddressConfig(uint32_t BootOption, uint32_t Address) |
| bogdanm | 0:9b334a45a8ff | 682 | { |
| bogdanm | 0:9b334a45a8ff | 683 | HAL_StatusTypeDef status = HAL_OK; |
| bogdanm | 0:9b334a45a8ff | 684 | |
| bogdanm | 0:9b334a45a8ff | 685 | /* Check the parameters */ |
| bogdanm | 0:9b334a45a8ff | 686 | assert_param(IS_OB_BOOT_ADDRESS(Address)); |
| bogdanm | 0:9b334a45a8ff | 687 | |
| bogdanm | 0:9b334a45a8ff | 688 | /* Wait for last operation to be completed */ |
| bogdanm | 0:9b334a45a8ff | 689 | status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); |
| bogdanm | 0:9b334a45a8ff | 690 | |
| bogdanm | 0:9b334a45a8ff | 691 | if(status == HAL_OK) |
| bogdanm | 0:9b334a45a8ff | 692 | { |
| bogdanm | 0:9b334a45a8ff | 693 | if(BootOption == OPTIONBYTE_BOOTADDR_0) |
| bogdanm | 0:9b334a45a8ff | 694 | { |
| bogdanm | 0:9b334a45a8ff | 695 | MODIFY_REG(FLASH->OPTCR1, FLASH_OPTCR1_BOOT_ADD0, Address); |
| bogdanm | 0:9b334a45a8ff | 696 | } |
| bogdanm | 0:9b334a45a8ff | 697 | else |
| bogdanm | 0:9b334a45a8ff | 698 | { |
| bogdanm | 0:9b334a45a8ff | 699 | MODIFY_REG(FLASH->OPTCR1, FLASH_OPTCR1_BOOT_ADD1, (Address << 16)); |
| bogdanm | 0:9b334a45a8ff | 700 | } |
| bogdanm | 0:9b334a45a8ff | 701 | } |
| bogdanm | 0:9b334a45a8ff | 702 | |
| bogdanm | 0:9b334a45a8ff | 703 | return status; |
| bogdanm | 0:9b334a45a8ff | 704 | } |
| bogdanm | 0:9b334a45a8ff | 705 | |
| bogdanm | 0:9b334a45a8ff | 706 | /** |
| bogdanm | 0:9b334a45a8ff | 707 | * @brief Return the FLASH User Option Byte value. |
| bogdanm | 0:9b334a45a8ff | 708 | * @retval uint32_t FLASH User Option Bytes values: IWDG_SW(Bit0), RST_STOP(Bit1) |
| bogdanm | 0:9b334a45a8ff | 709 | * and RST_STDBY(Bit2). |
| bogdanm | 0:9b334a45a8ff | 710 | */ |
| bogdanm | 0:9b334a45a8ff | 711 | static uint32_t FLASH_OB_GetUser(void) |
| bogdanm | 0:9b334a45a8ff | 712 | { |
| bogdanm | 0:9b334a45a8ff | 713 | /* Return the User Option Byte */ |
| bogdanm | 0:9b334a45a8ff | 714 | return ((uint32_t)(FLASH->OPTCR & 0xC00000F0)); |
| bogdanm | 0:9b334a45a8ff | 715 | } |
| bogdanm | 0:9b334a45a8ff | 716 | |
| bogdanm | 0:9b334a45a8ff | 717 | /** |
| bogdanm | 0:9b334a45a8ff | 718 | * @brief Return the FLASH Write Protection Option Bytes value. |
| bogdanm | 0:9b334a45a8ff | 719 | * @retval uint32_t FLASH Write Protection Option Bytes value |
| bogdanm | 0:9b334a45a8ff | 720 | */ |
| bogdanm | 0:9b334a45a8ff | 721 | static uint32_t FLASH_OB_GetWRP(void) |
| bogdanm | 0:9b334a45a8ff | 722 | { |
| bogdanm | 0:9b334a45a8ff | 723 | /* Return the FLASH write protection Register value */ |
| bogdanm | 0:9b334a45a8ff | 724 | return ((uint32_t)(FLASH->OPTCR & 0x00FF0000)); |
| bogdanm | 0:9b334a45a8ff | 725 | } |
| bogdanm | 0:9b334a45a8ff | 726 | |
| bogdanm | 0:9b334a45a8ff | 727 | /** |
| bogdanm | 0:9b334a45a8ff | 728 | * @brief Returns the FLASH Read Protection level. |
| bogdanm | 0:9b334a45a8ff | 729 | * @retval FlagStatus FLASH ReadOut Protection Status: |
| bogdanm | 0:9b334a45a8ff | 730 | * This parameter can be one of the following values: |
| bogdanm | 0:9b334a45a8ff | 731 | * @arg OB_RDP_LEVEL_0: No protection |
| bogdanm | 0:9b334a45a8ff | 732 | * @arg OB_RDP_LEVEL_1: Read protection of the memory |
| bogdanm | 0:9b334a45a8ff | 733 | * @arg OB_RDP_LEVEL_2: Full chip protection |
| bogdanm | 0:9b334a45a8ff | 734 | */ |
| bogdanm | 0:9b334a45a8ff | 735 | static uint8_t FLASH_OB_GetRDP(void) |
| bogdanm | 0:9b334a45a8ff | 736 | { |
| bogdanm | 0:9b334a45a8ff | 737 | uint8_t readstatus = OB_RDP_LEVEL_0; |
| bogdanm | 0:9b334a45a8ff | 738 | |
| bogdanm | 0:9b334a45a8ff | 739 | if (((FLASH->OPTCR & FLASH_OPTCR_RDP) >> 8) == OB_RDP_LEVEL_0) |
| bogdanm | 0:9b334a45a8ff | 740 | { |
| bogdanm | 0:9b334a45a8ff | 741 | readstatus = OB_RDP_LEVEL_0; |
| bogdanm | 0:9b334a45a8ff | 742 | } |
| bogdanm | 0:9b334a45a8ff | 743 | else if (((FLASH->OPTCR & FLASH_OPTCR_RDP) >> 8) == OB_RDP_LEVEL_2) |
| bogdanm | 0:9b334a45a8ff | 744 | { |
| bogdanm | 0:9b334a45a8ff | 745 | readstatus = OB_RDP_LEVEL_2; |
| bogdanm | 0:9b334a45a8ff | 746 | } |
| bogdanm | 0:9b334a45a8ff | 747 | else |
| bogdanm | 0:9b334a45a8ff | 748 | { |
| bogdanm | 0:9b334a45a8ff | 749 | readstatus = OB_RDP_LEVEL_1; |
| bogdanm | 0:9b334a45a8ff | 750 | } |
| bogdanm | 0:9b334a45a8ff | 751 | |
| bogdanm | 0:9b334a45a8ff | 752 | return readstatus; |
| bogdanm | 0:9b334a45a8ff | 753 | } |
| bogdanm | 0:9b334a45a8ff | 754 | |
| bogdanm | 0:9b334a45a8ff | 755 | /** |
| bogdanm | 0:9b334a45a8ff | 756 | * @brief Returns the FLASH BOR level. |
| bogdanm | 0:9b334a45a8ff | 757 | * @retval uint32_t The FLASH BOR level: |
| bogdanm | 0:9b334a45a8ff | 758 | * - OB_BOR_LEVEL3: Supply voltage ranges from 2.7 to 3.6 V |
| bogdanm | 0:9b334a45a8ff | 759 | * - OB_BOR_LEVEL2: Supply voltage ranges from 2.4 to 2.7 V |
| bogdanm | 0:9b334a45a8ff | 760 | * - OB_BOR_LEVEL1: Supply voltage ranges from 2.1 to 2.4 V |
| bogdanm | 0:9b334a45a8ff | 761 | * - OB_BOR_OFF : Supply voltage ranges from 1.62 to 2.1 V |
| bogdanm | 0:9b334a45a8ff | 762 | */ |
| bogdanm | 0:9b334a45a8ff | 763 | static uint32_t FLASH_OB_GetBOR(void) |
| bogdanm | 0:9b334a45a8ff | 764 | { |
| bogdanm | 0:9b334a45a8ff | 765 | /* Return the FLASH BOR level */ |
| bogdanm | 0:9b334a45a8ff | 766 | return ((uint32_t)(FLASH->OPTCR & 0x0C)); |
| bogdanm | 0:9b334a45a8ff | 767 | } |
| bogdanm | 0:9b334a45a8ff | 768 | |
| bogdanm | 0:9b334a45a8ff | 769 | /** |
| bogdanm | 0:9b334a45a8ff | 770 | * @brief Configure Boot base address. |
| bogdanm | 0:9b334a45a8ff | 771 | * |
| bogdanm | 0:9b334a45a8ff | 772 | * @param BootOption : specifies Boot base address depending from Boot pin = 0 or pin = 1 |
| bogdanm | 0:9b334a45a8ff | 773 | * This parameter can be one of the following values: |
| bogdanm | 0:9b334a45a8ff | 774 | * @arg OPTIONBYTE_BOOTADDR_0 : Boot address based when Boot pin = 0 |
| bogdanm | 0:9b334a45a8ff | 775 | * @arg OPTIONBYTE_BOOTADDR_1 : Boot address based when Boot pin = 1 |
| bogdanm | 0:9b334a45a8ff | 776 | * |
| bogdanm | 0:9b334a45a8ff | 777 | * @retval uint32_t Boot Base Address: |
| bogdanm | 0:9b334a45a8ff | 778 | * - OB_BOOTADDR_ITCM_RAM : Boot from ITCM RAM (0x00000000) |
| bogdanm | 0:9b334a45a8ff | 779 | * - OB_BOOTADDR_SYSTEM : Boot from System memory bootloader (0x00100000) |
| bogdanm | 0:9b334a45a8ff | 780 | * - OB_BOOTADDR_ITCM_FLASH : Boot from Flash on ITCM interface (0x00200000) |
| bogdanm | 0:9b334a45a8ff | 781 | * - OB_BOOTADDR_AXIM_FLASH : Boot from Flash on AXIM interface (0x08000000) |
| bogdanm | 0:9b334a45a8ff | 782 | * - OB_BOOTADDR_DTCM_RAM : Boot from DTCM RAM (0x20000000) |
| bogdanm | 0:9b334a45a8ff | 783 | * - OB_BOOTADDR_SRAM1 : Boot from SRAM1 (0x20010000) |
| bogdanm | 0:9b334a45a8ff | 784 | * - OB_BOOTADDR_SRAM2 : Boot from SRAM2 (0x2004C000) |
| bogdanm | 0:9b334a45a8ff | 785 | */ |
| bogdanm | 0:9b334a45a8ff | 786 | static uint32_t FLASH_OB_GetBootAddress(uint32_t BootOption) |
| bogdanm | 0:9b334a45a8ff | 787 | { |
| bogdanm | 0:9b334a45a8ff | 788 | uint32_t Address = 0; |
| bogdanm | 0:9b334a45a8ff | 789 | |
| bogdanm | 0:9b334a45a8ff | 790 | /* Return the Boot base Address */ |
| bogdanm | 0:9b334a45a8ff | 791 | if(BootOption == OPTIONBYTE_BOOTADDR_0) |
| bogdanm | 0:9b334a45a8ff | 792 | { |
| bogdanm | 0:9b334a45a8ff | 793 | Address = FLASH->OPTCR1 & FLASH_OPTCR1_BOOT_ADD0; |
| bogdanm | 0:9b334a45a8ff | 794 | } |
| bogdanm | 0:9b334a45a8ff | 795 | else |
| bogdanm | 0:9b334a45a8ff | 796 | { |
| bogdanm | 0:9b334a45a8ff | 797 | Address = ((FLASH->OPTCR1 & FLASH_OPTCR1_BOOT_ADD1) >> 16); |
| bogdanm | 0:9b334a45a8ff | 798 | } |
| bogdanm | 0:9b334a45a8ff | 799 | |
| bogdanm | 0:9b334a45a8ff | 800 | return Address; |
| bogdanm | 0:9b334a45a8ff | 801 | } |
| bogdanm | 0:9b334a45a8ff | 802 | |
| bogdanm | 0:9b334a45a8ff | 803 | /** |
| bogdanm | 0:9b334a45a8ff | 804 | * @} |
| bogdanm | 0:9b334a45a8ff | 805 | */ |
| bogdanm | 0:9b334a45a8ff | 806 | |
| bogdanm | 0:9b334a45a8ff | 807 | #endif /* HAL_FLASH_MODULE_ENABLED */ |
| bogdanm | 0:9b334a45a8ff | 808 | |
| bogdanm | 0:9b334a45a8ff | 809 | /** |
| bogdanm | 0:9b334a45a8ff | 810 | * @} |
| bogdanm | 0:9b334a45a8ff | 811 | */ |
| bogdanm | 0:9b334a45a8ff | 812 | |
| bogdanm | 0:9b334a45a8ff | 813 | /** |
| bogdanm | 0:9b334a45a8ff | 814 | * @} |
| bogdanm | 0:9b334a45a8ff | 815 | */ |
| bogdanm | 0:9b334a45a8ff | 816 | |
| bogdanm | 0:9b334a45a8ff | 817 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |