mbed-dev - fix LPC812 PWM

Users » nameless129 » Code » mbed-dev

fix LPC812 PWM

targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_tim_ex.c@0:9b334a45a8ff, 2015-10-01 (annotated)

Committer:: bogdanm
Date:: Thu Oct 01 15:25:22 2015 +0300
Revision:: 0:9b334a45a8ff
Child:: 19:112740acecfa

Initial commit on mbed-dev



Replaces mbed-src (now inactive)

Who changed what in which revision?

User	Revision	Line number	New contents of line
bogdanm	0:9b334a45a8ff	1	/**
bogdanm	0:9b334a45a8ff	2	******************************************************************************
bogdanm	0:9b334a45a8ff	3	* @file stm32f4xx_hal_tim_ex.c
bogdanm	0:9b334a45a8ff	4	* @author MCD Application Team
bogdanm	0:9b334a45a8ff	5	* @version V1.3.2
bogdanm	0:9b334a45a8ff	6	* @date 26-June-2015
bogdanm	0:9b334a45a8ff	7	* @brief TIM HAL module driver.
bogdanm	0:9b334a45a8ff	8	* This file provides firmware functions to manage the following
bogdanm	0:9b334a45a8ff	9	* functionalities of the Timer extension peripheral:
bogdanm	0:9b334a45a8ff	10	* + Time Hall Sensor Interface Initialization
bogdanm	0:9b334a45a8ff	11	* + Time Hall Sensor Interface Start
bogdanm	0:9b334a45a8ff	12	* + Time Complementary signal bread and dead time configuration
bogdanm	0:9b334a45a8ff	13	* + Time Master and Slave synchronization configuration
bogdanm	0:9b334a45a8ff	14	@verbatim
bogdanm	0:9b334a45a8ff	15	==============================================================================
bogdanm	0:9b334a45a8ff	16	##### TIMER Extended features #####
bogdanm	0:9b334a45a8ff	17	==============================================================================
bogdanm	0:9b334a45a8ff	18	[..]
bogdanm	0:9b334a45a8ff	19	The Timer Extension features include:
bogdanm	0:9b334a45a8ff	20	(#) Complementary outputs with programmable dead-time for :
bogdanm	0:9b334a45a8ff	21	(++) Input Capture
bogdanm	0:9b334a45a8ff	22	(++) Output Compare
bogdanm	0:9b334a45a8ff	23	(++) PWM generation (Edge and Center-aligned Mode)
bogdanm	0:9b334a45a8ff	24	(++) One-pulse mode output
bogdanm	0:9b334a45a8ff	25	(#) Synchronization circuit to control the timer with external signals and to
bogdanm	0:9b334a45a8ff	26	interconnect several timers together.
bogdanm	0:9b334a45a8ff	27	(#) Break input to put the timer output signals in reset state or in a known state.
bogdanm	0:9b334a45a8ff	28	(#) Supports incremental (quadrature) encoder and hall-sensor circuitry for
bogdanm	0:9b334a45a8ff	29	positioning purposes
bogdanm	0:9b334a45a8ff	30
bogdanm	0:9b334a45a8ff	31	##### How to use this driver #####
bogdanm	0:9b334a45a8ff	32	==============================================================================
bogdanm	0:9b334a45a8ff	33	[..]
bogdanm	0:9b334a45a8ff	34	(#) Initialize the TIM low level resources by implementing the following functions
bogdanm	0:9b334a45a8ff	35	depending from feature used :
bogdanm	0:9b334a45a8ff	36	(++) Complementary Output Compare : HAL_TIM_OC_MspInit()
bogdanm	0:9b334a45a8ff	37	(++) Complementary PWM generation : HAL_TIM_PWM_MspInit()
bogdanm	0:9b334a45a8ff	38	(++) Complementary One-pulse mode output : HAL_TIM_OnePulse_MspInit()
bogdanm	0:9b334a45a8ff	39	(++) Hall Sensor output : HAL_TIM_HallSensor_MspInit()
bogdanm	0:9b334a45a8ff	40
bogdanm	0:9b334a45a8ff	41	(#) Initialize the TIM low level resources :
bogdanm	0:9b334a45a8ff	42	(##) Enable the TIM interface clock using __TIMx_CLK_ENABLE();
bogdanm	0:9b334a45a8ff	43	(##) TIM pins configuration
bogdanm	0:9b334a45a8ff	44	(+++) Enable the clock for the TIM GPIOs using the following function:
bogdanm	0:9b334a45a8ff	45	__GPIOx_CLK_ENABLE();
bogdanm	0:9b334a45a8ff	46	(+++) Configure these TIM pins in Alternate function mode using HAL_GPIO_Init();
bogdanm	0:9b334a45a8ff	47
bogdanm	0:9b334a45a8ff	48	(#) The external Clock can be configured, if needed (the default clock is the
bogdanm	0:9b334a45a8ff	49	internal clock from the APBx), using the following function:
bogdanm	0:9b334a45a8ff	50	HAL_TIM_ConfigClockSource, the clock configuration should be done before
bogdanm	0:9b334a45a8ff	51	any start function.
bogdanm	0:9b334a45a8ff	52
bogdanm	0:9b334a45a8ff	53	(#) Configure the TIM in the desired functioning mode using one of the
bogdanm	0:9b334a45a8ff	54	initialization function of this driver:
bogdanm	0:9b334a45a8ff	55	(++) HAL_TIMEx_HallSensor_Init and HAL_TIMEx_ConfigCommutationEvent: to use the
bogdanm	0:9b334a45a8ff	56	Timer Hall Sensor Interface and the commutation event with the corresponding
bogdanm	0:9b334a45a8ff	57	Interrupt and DMA request if needed (Note that One Timer is used to interface
bogdanm	0:9b334a45a8ff	58	with the Hall sensor Interface and another Timer should be used to use
bogdanm	0:9b334a45a8ff	59	the commutation event).
bogdanm	0:9b334a45a8ff	60
bogdanm	0:9b334a45a8ff	61	(#) Activate the TIM peripheral using one of the start functions:
bogdanm	0:9b334a45a8ff	62	(++) Complementary Output Compare : HAL_TIMEx_OCN_Start(), HAL_TIMEx_OCN_Start_DMA(), HAL_TIMEx_OC_Start_IT()
bogdanm	0:9b334a45a8ff	63	(++) Complementary PWM generation : HAL_TIMEx_PWMN_Start(), HAL_TIMEx_PWMN_Start_DMA(), HAL_TIMEx_PWMN_Start_IT()
bogdanm	0:9b334a45a8ff	64	(++) Complementary One-pulse mode output : HAL_TIMEx_OnePulseN_Start(), HAL_TIMEx_OnePulseN_Start_IT()
bogdanm	0:9b334a45a8ff	65	(++) Hall Sensor output : HAL_TIMEx_HallSensor_Start(), HAL_TIMEx_HallSensor_Start_DMA(), HAL_TIMEx_HallSensor_Start_IT().
bogdanm	0:9b334a45a8ff	66
bogdanm	0:9b334a45a8ff	67
bogdanm	0:9b334a45a8ff	68	@endverbatim
bogdanm	0:9b334a45a8ff	69	******************************************************************************
bogdanm	0:9b334a45a8ff	70	* @attention
bogdanm	0:9b334a45a8ff	71	*
bogdanm	0:9b334a45a8ff	72	* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
bogdanm	0:9b334a45a8ff	73	*
bogdanm	0:9b334a45a8ff	74	* Redistribution and use in source and binary forms, with or without modification,
bogdanm	0:9b334a45a8ff	75	* are permitted provided that the following conditions are met:
bogdanm	0:9b334a45a8ff	76	* 1. Redistributions of source code must retain the above copyright notice,
bogdanm	0:9b334a45a8ff	77	* this list of conditions and the following disclaimer.
bogdanm	0:9b334a45a8ff	78	* 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm	0:9b334a45a8ff	79	* this list of conditions and the following disclaimer in the documentation
bogdanm	0:9b334a45a8ff	80	* and/or other materials provided with the distribution.
bogdanm	0:9b334a45a8ff	81	* 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm	0:9b334a45a8ff	82	* may be used to endorse or promote products derived from this software
bogdanm	0:9b334a45a8ff	83	* without specific prior written permission.
bogdanm	0:9b334a45a8ff	84	*
bogdanm	0:9b334a45a8ff	85	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm	0:9b334a45a8ff	86	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm	0:9b334a45a8ff	87	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm	0:9b334a45a8ff	88	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm	0:9b334a45a8ff	89	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm	0:9b334a45a8ff	90	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm	0:9b334a45a8ff	91	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm	0:9b334a45a8ff	92	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm	0:9b334a45a8ff	93	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm	0:9b334a45a8ff	94	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm	0:9b334a45a8ff	95	*
bogdanm	0:9b334a45a8ff	96	******************************************************************************
bogdanm	0:9b334a45a8ff	97	*/
bogdanm	0:9b334a45a8ff	98
bogdanm	0:9b334a45a8ff	99	/* Includes ------------------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	100	#include "stm32f4xx_hal.h"
bogdanm	0:9b334a45a8ff	101
bogdanm	0:9b334a45a8ff	102	/** @addtogroup STM32F4xx_HAL_Driver
bogdanm	0:9b334a45a8ff	103	* @{
bogdanm	0:9b334a45a8ff	104	*/
bogdanm	0:9b334a45a8ff	105
bogdanm	0:9b334a45a8ff	106	/** @defgroup TIMEx TIMEx
bogdanm	0:9b334a45a8ff	107	* @brief TIM HAL module driver
bogdanm	0:9b334a45a8ff	108	* @{
bogdanm	0:9b334a45a8ff	109	*/
bogdanm	0:9b334a45a8ff	110
bogdanm	0:9b334a45a8ff	111	#ifdef HAL_TIM_MODULE_ENABLED
bogdanm	0:9b334a45a8ff	112
bogdanm	0:9b334a45a8ff	113	/* Private typedef -----------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	114	/* Private define ------------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	115	/* Private macro -------------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	116	/* Private variables ---------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	117	/** @addtogroup TIMEx_Private_Functions
bogdanm	0:9b334a45a8ff	118	* @{
bogdanm	0:9b334a45a8ff	119	*/
bogdanm	0:9b334a45a8ff	120	/* Private function prototypes -----------------------------------------------*/
bogdanm	0:9b334a45a8ff	121	static void TIM_CCxNChannelCmd(TIM_TypeDef* TIMx, uint32_t Channel, uint32_t ChannelNState);
bogdanm	0:9b334a45a8ff	122	/**
bogdanm	0:9b334a45a8ff	123	* @}
bogdanm	0:9b334a45a8ff	124	*/
bogdanm	0:9b334a45a8ff	125
bogdanm	0:9b334a45a8ff	126	/* Exported functions --------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	127	/** @defgroup TIMEx_Exported_Functions TIM Exported Functions
bogdanm	0:9b334a45a8ff	128	* @{
bogdanm	0:9b334a45a8ff	129	*/
bogdanm	0:9b334a45a8ff	130
bogdanm	0:9b334a45a8ff	131	/** @defgroup TIMEx_Exported_Functions_Group1 Timer Hall Sensor functions
bogdanm	0:9b334a45a8ff	132	* @brief Timer Hall Sensor functions
bogdanm	0:9b334a45a8ff	133	*
bogdanm	0:9b334a45a8ff	134	@verbatim
bogdanm	0:9b334a45a8ff	135	==============================================================================
bogdanm	0:9b334a45a8ff	136	##### Timer Hall Sensor functions #####
bogdanm	0:9b334a45a8ff	137	==============================================================================
bogdanm	0:9b334a45a8ff	138	[..]
bogdanm	0:9b334a45a8ff	139	This section provides functions allowing to:
bogdanm	0:9b334a45a8ff	140	(+) Initialize and configure TIM HAL Sensor.
bogdanm	0:9b334a45a8ff	141	(+) De-initialize TIM HAL Sensor.
bogdanm	0:9b334a45a8ff	142	(+) Start the Hall Sensor Interface.
bogdanm	0:9b334a45a8ff	143	(+) Stop the Hall Sensor Interface.
bogdanm	0:9b334a45a8ff	144	(+) Start the Hall Sensor Interface and enable interrupts.
bogdanm	0:9b334a45a8ff	145	(+) Stop the Hall Sensor Interface and disable interrupts.
bogdanm	0:9b334a45a8ff	146	(+) Start the Hall Sensor Interface and enable DMA transfers.
bogdanm	0:9b334a45a8ff	147	(+) Stop the Hall Sensor Interface and disable DMA transfers.
bogdanm	0:9b334a45a8ff	148
bogdanm	0:9b334a45a8ff	149	@endverbatim
bogdanm	0:9b334a45a8ff	150	* @{
bogdanm	0:9b334a45a8ff	151	*/
bogdanm	0:9b334a45a8ff	152	/**
bogdanm	0:9b334a45a8ff	153	* @brief Initializes the TIM Hall Sensor Interface and create the associated handle.
bogdanm	0:9b334a45a8ff	154	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	155	* the configuration information for TIM module.
bogdanm	0:9b334a45a8ff	156	* @param sConfig: TIM Hall Sensor configuration structure
bogdanm	0:9b334a45a8ff	157	* @retval HAL status
bogdanm	0:9b334a45a8ff	158	*/
bogdanm	0:9b334a45a8ff	159	HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef htim, TIM_HallSensor_InitTypeDef sConfig)
bogdanm	0:9b334a45a8ff	160	{
bogdanm	0:9b334a45a8ff	161	TIM_OC_InitTypeDef OC_Config;
bogdanm	0:9b334a45a8ff	162
bogdanm	0:9b334a45a8ff	163	/* Check the TIM handle allocation */
bogdanm	0:9b334a45a8ff	164	if(htim == NULL)
bogdanm	0:9b334a45a8ff	165	{
bogdanm	0:9b334a45a8ff	166	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	167	}
bogdanm	0:9b334a45a8ff	168
bogdanm	0:9b334a45a8ff	169	assert_param(IS_TIM_XOR_INSTANCE(htim->Instance));
bogdanm	0:9b334a45a8ff	170	assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
bogdanm	0:9b334a45a8ff	171	assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
bogdanm	0:9b334a45a8ff	172	assert_param(IS_TIM_IC_POLARITY(sConfig->IC1Polarity));
bogdanm	0:9b334a45a8ff	173	assert_param(IS_TIM_IC_PRESCALER(sConfig->IC1Prescaler));
bogdanm	0:9b334a45a8ff	174	assert_param(IS_TIM_IC_FILTER(sConfig->IC1Filter));
bogdanm	0:9b334a45a8ff	175
bogdanm	0:9b334a45a8ff	176	/* Set the TIM state */
bogdanm	0:9b334a45a8ff	177	htim->State= HAL_TIM_STATE_BUSY;
bogdanm	0:9b334a45a8ff	178
bogdanm	0:9b334a45a8ff	179	/* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
bogdanm	0:9b334a45a8ff	180	HAL_TIMEx_HallSensor_MspInit(htim);
bogdanm	0:9b334a45a8ff	181
bogdanm	0:9b334a45a8ff	182	/* Configure the Time base in the Encoder Mode */
bogdanm	0:9b334a45a8ff	183	TIM_Base_SetConfig(htim->Instance, &htim->Init);
bogdanm	0:9b334a45a8ff	184
bogdanm	0:9b334a45a8ff	185	/* Configure the Channel 1 as Input Channel to interface with the three Outputs of the Hall sensor */
bogdanm	0:9b334a45a8ff	186	TIM_TI1_SetConfig(htim->Instance, sConfig->IC1Polarity, TIM_ICSELECTION_TRC, sConfig->IC1Filter);
bogdanm	0:9b334a45a8ff	187
bogdanm	0:9b334a45a8ff	188	/* Reset the IC1PSC Bits */
bogdanm	0:9b334a45a8ff	189	htim->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC;
bogdanm	0:9b334a45a8ff	190	/* Set the IC1PSC value */
bogdanm	0:9b334a45a8ff	191	htim->Instance->CCMR1 \|= sConfig->IC1Prescaler;
bogdanm	0:9b334a45a8ff	192
bogdanm	0:9b334a45a8ff	193	/* Enable the Hall sensor interface (XOR function of the three inputs) */
bogdanm	0:9b334a45a8ff	194	htim->Instance->CR2 \|= TIM_CR2_TI1S;
bogdanm	0:9b334a45a8ff	195
bogdanm	0:9b334a45a8ff	196	/* Select the TIM_TS_TI1F_ED signal as Input trigger for the TIM */
bogdanm	0:9b334a45a8ff	197	htim->Instance->SMCR &= ~TIM_SMCR_TS;
bogdanm	0:9b334a45a8ff	198	htim->Instance->SMCR \|= TIM_TS_TI1F_ED;
bogdanm	0:9b334a45a8ff	199
bogdanm	0:9b334a45a8ff	200	/* Use the TIM_TS_TI1F_ED signal to reset the TIM counter each edge detection */
bogdanm	0:9b334a45a8ff	201	htim->Instance->SMCR &= ~TIM_SMCR_SMS;
bogdanm	0:9b334a45a8ff	202	htim->Instance->SMCR \|= TIM_SLAVEMODE_RESET;
bogdanm	0:9b334a45a8ff	203
bogdanm	0:9b334a45a8ff	204	/* Program channel 2 in PWM 2 mode with the desired Commutation_Delay*/
bogdanm	0:9b334a45a8ff	205	OC_Config.OCFastMode = TIM_OCFAST_DISABLE;
bogdanm	0:9b334a45a8ff	206	OC_Config.OCIdleState = TIM_OCIDLESTATE_RESET;
bogdanm	0:9b334a45a8ff	207	OC_Config.OCMode = TIM_OCMODE_PWM2;
bogdanm	0:9b334a45a8ff	208	OC_Config.OCNIdleState = TIM_OCNIDLESTATE_RESET;
bogdanm	0:9b334a45a8ff	209	OC_Config.OCNPolarity = TIM_OCNPOLARITY_HIGH;
bogdanm	0:9b334a45a8ff	210	OC_Config.OCPolarity = TIM_OCPOLARITY_HIGH;
bogdanm	0:9b334a45a8ff	211	OC_Config.Pulse = sConfig->Commutation_Delay;
bogdanm	0:9b334a45a8ff	212
bogdanm	0:9b334a45a8ff	213	TIM_OC2_SetConfig(htim->Instance, &OC_Config);
bogdanm	0:9b334a45a8ff	214
bogdanm	0:9b334a45a8ff	215	/* Select OC2REF as trigger output on TRGO: write the MMS bits in the TIMx_CR2
bogdanm	0:9b334a45a8ff	216	register to 101 */
bogdanm	0:9b334a45a8ff	217	htim->Instance->CR2 &= ~TIM_CR2_MMS;
bogdanm	0:9b334a45a8ff	218	htim->Instance->CR2 \|= TIM_TRGO_OC2REF;
bogdanm	0:9b334a45a8ff	219
bogdanm	0:9b334a45a8ff	220	/* Initialize the TIM state*/
bogdanm	0:9b334a45a8ff	221	htim->State= HAL_TIM_STATE_READY;
bogdanm	0:9b334a45a8ff	222
bogdanm	0:9b334a45a8ff	223	return HAL_OK;
bogdanm	0:9b334a45a8ff	224	}
bogdanm	0:9b334a45a8ff	225
bogdanm	0:9b334a45a8ff	226	/**
bogdanm	0:9b334a45a8ff	227	* @brief DeInitializes the TIM Hall Sensor interface
bogdanm	0:9b334a45a8ff	228	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	229	* the configuration information for TIM module.
bogdanm	0:9b334a45a8ff	230	* @retval HAL status
bogdanm	0:9b334a45a8ff	231	*/
bogdanm	0:9b334a45a8ff	232	HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef *htim)
bogdanm	0:9b334a45a8ff	233	{
bogdanm	0:9b334a45a8ff	234	/* Check the parameters */
bogdanm	0:9b334a45a8ff	235	assert_param(IS_TIM_INSTANCE(htim->Instance));
bogdanm	0:9b334a45a8ff	236
bogdanm	0:9b334a45a8ff	237	htim->State = HAL_TIM_STATE_BUSY;
bogdanm	0:9b334a45a8ff	238
bogdanm	0:9b334a45a8ff	239	/* Disable the TIM Peripheral Clock */
bogdanm	0:9b334a45a8ff	240	__HAL_TIM_DISABLE(htim);
bogdanm	0:9b334a45a8ff	241
bogdanm	0:9b334a45a8ff	242	/* DeInit the low level hardware: GPIO, CLOCK, NVIC */
bogdanm	0:9b334a45a8ff	243	HAL_TIMEx_HallSensor_MspDeInit(htim);
bogdanm	0:9b334a45a8ff	244
bogdanm	0:9b334a45a8ff	245	/* Change TIM state */
bogdanm	0:9b334a45a8ff	246	htim->State = HAL_TIM_STATE_RESET;
bogdanm	0:9b334a45a8ff	247
bogdanm	0:9b334a45a8ff	248	/* Release Lock */
bogdanm	0:9b334a45a8ff	249	__HAL_UNLOCK(htim);
bogdanm	0:9b334a45a8ff	250
bogdanm	0:9b334a45a8ff	251	return HAL_OK;
bogdanm	0:9b334a45a8ff	252	}
bogdanm	0:9b334a45a8ff	253
bogdanm	0:9b334a45a8ff	254	/**
bogdanm	0:9b334a45a8ff	255	* @brief Initializes the TIM Hall Sensor MSP.
bogdanm	0:9b334a45a8ff	256	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	257	* the configuration information for TIM module.
bogdanm	0:9b334a45a8ff	258	* @retval None
bogdanm	0:9b334a45a8ff	259	*/
bogdanm	0:9b334a45a8ff	260	__weak void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef *htim)
bogdanm	0:9b334a45a8ff	261	{
bogdanm	0:9b334a45a8ff	262	/* NOTE : This function Should not be modified, when the callback is needed,
bogdanm	0:9b334a45a8ff	263	the HAL_TIMEx_HallSensor_MspInit could be implemented in the user file
bogdanm	0:9b334a45a8ff	264	*/
bogdanm	0:9b334a45a8ff	265	}
bogdanm	0:9b334a45a8ff	266
bogdanm	0:9b334a45a8ff	267	/**
bogdanm	0:9b334a45a8ff	268	* @brief DeInitializes TIM Hall Sensor MSP.
bogdanm	0:9b334a45a8ff	269	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	270	* the configuration information for TIM module.
bogdanm	0:9b334a45a8ff	271	* @retval None
bogdanm	0:9b334a45a8ff	272	*/
bogdanm	0:9b334a45a8ff	273	__weak void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef *htim)
bogdanm	0:9b334a45a8ff	274	{
bogdanm	0:9b334a45a8ff	275	/* NOTE : This function Should not be modified, when the callback is needed,
bogdanm	0:9b334a45a8ff	276	the HAL_TIMEx_HallSensor_MspDeInit could be implemented in the user file
bogdanm	0:9b334a45a8ff	277	*/
bogdanm	0:9b334a45a8ff	278	}
bogdanm	0:9b334a45a8ff	279
bogdanm	0:9b334a45a8ff	280	/**
bogdanm	0:9b334a45a8ff	281	* @brief Starts the TIM Hall Sensor Interface.
bogdanm	0:9b334a45a8ff	282	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	283	* the configuration information for TIM module.
bogdanm	0:9b334a45a8ff	284	* @retval HAL status
bogdanm	0:9b334a45a8ff	285	*/
bogdanm	0:9b334a45a8ff	286	HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef *htim)
bogdanm	0:9b334a45a8ff	287	{
bogdanm	0:9b334a45a8ff	288	/* Check the parameters */
bogdanm	0:9b334a45a8ff	289	assert_param(IS_TIM_XOR_INSTANCE(htim->Instance));
bogdanm	0:9b334a45a8ff	290
bogdanm	0:9b334a45a8ff	291	/* Enable the Input Capture channels 1
bogdanm	0:9b334a45a8ff	292	(in the Hall Sensor Interface the Three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
bogdanm	0:9b334a45a8ff	293	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
bogdanm	0:9b334a45a8ff	294
bogdanm	0:9b334a45a8ff	295	/* Enable the Peripheral */
bogdanm	0:9b334a45a8ff	296	__HAL_TIM_ENABLE(htim);
bogdanm	0:9b334a45a8ff	297
bogdanm	0:9b334a45a8ff	298	/* Return function status */
bogdanm	0:9b334a45a8ff	299	return HAL_OK;
bogdanm	0:9b334a45a8ff	300	}
bogdanm	0:9b334a45a8ff	301
bogdanm	0:9b334a45a8ff	302	/**
bogdanm	0:9b334a45a8ff	303	* @brief Stops the TIM Hall sensor Interface.
bogdanm	0:9b334a45a8ff	304	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	305	* the configuration information for TIM module.
bogdanm	0:9b334a45a8ff	306	* @retval HAL status
bogdanm	0:9b334a45a8ff	307	*/
bogdanm	0:9b334a45a8ff	308	HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef *htim)
bogdanm	0:9b334a45a8ff	309	{
bogdanm	0:9b334a45a8ff	310	/* Check the parameters */
bogdanm	0:9b334a45a8ff	311	assert_param(IS_TIM_XOR_INSTANCE(htim->Instance));
bogdanm	0:9b334a45a8ff	312
bogdanm	0:9b334a45a8ff	313	/* Disable the Input Capture channels 1, 2 and 3
bogdanm	0:9b334a45a8ff	314	(in the Hall Sensor Interface the Three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
bogdanm	0:9b334a45a8ff	315	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
bogdanm	0:9b334a45a8ff	316
bogdanm	0:9b334a45a8ff	317	/* Disable the Peripheral */
bogdanm	0:9b334a45a8ff	318	__HAL_TIM_DISABLE(htim);
bogdanm	0:9b334a45a8ff	319
bogdanm	0:9b334a45a8ff	320	/* Return function status */
bogdanm	0:9b334a45a8ff	321	return HAL_OK;
bogdanm	0:9b334a45a8ff	322	}
bogdanm	0:9b334a45a8ff	323
bogdanm	0:9b334a45a8ff	324	/**
bogdanm	0:9b334a45a8ff	325	* @brief Starts the TIM Hall Sensor Interface in interrupt mode.
bogdanm	0:9b334a45a8ff	326	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	327	* the configuration information for TIM module.
bogdanm	0:9b334a45a8ff	328	* @retval HAL status
bogdanm	0:9b334a45a8ff	329	*/
bogdanm	0:9b334a45a8ff	330	HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef *htim)
bogdanm	0:9b334a45a8ff	331	{
bogdanm	0:9b334a45a8ff	332	/* Check the parameters */
bogdanm	0:9b334a45a8ff	333	assert_param(IS_TIM_XOR_INSTANCE(htim->Instance));
bogdanm	0:9b334a45a8ff	334
bogdanm	0:9b334a45a8ff	335	/* Enable the capture compare Interrupts 1 event */
bogdanm	0:9b334a45a8ff	336	__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
bogdanm	0:9b334a45a8ff	337
bogdanm	0:9b334a45a8ff	338	/* Enable the Input Capture channels 1
bogdanm	0:9b334a45a8ff	339	(in the Hall Sensor Interface the Three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
bogdanm	0:9b334a45a8ff	340	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
bogdanm	0:9b334a45a8ff	341
bogdanm	0:9b334a45a8ff	342	/* Enable the Peripheral */
bogdanm	0:9b334a45a8ff	343	__HAL_TIM_ENABLE(htim);
bogdanm	0:9b334a45a8ff	344
bogdanm	0:9b334a45a8ff	345	/* Return function status */
bogdanm	0:9b334a45a8ff	346	return HAL_OK;
bogdanm	0:9b334a45a8ff	347	}
bogdanm	0:9b334a45a8ff	348
bogdanm	0:9b334a45a8ff	349	/**
bogdanm	0:9b334a45a8ff	350	* @brief Stops the TIM Hall Sensor Interface in interrupt mode.
bogdanm	0:9b334a45a8ff	351	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	352	* the configuration information for TIM module.
bogdanm	0:9b334a45a8ff	353	* @retval HAL status
bogdanm	0:9b334a45a8ff	354	*/
bogdanm	0:9b334a45a8ff	355	HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef *htim)
bogdanm	0:9b334a45a8ff	356	{
bogdanm	0:9b334a45a8ff	357	/* Check the parameters */
bogdanm	0:9b334a45a8ff	358	assert_param(IS_TIM_XOR_INSTANCE(htim->Instance));
bogdanm	0:9b334a45a8ff	359
bogdanm	0:9b334a45a8ff	360	/* Disable the Input Capture channels 1
bogdanm	0:9b334a45a8ff	361	(in the Hall Sensor Interface the Three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
bogdanm	0:9b334a45a8ff	362	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
bogdanm	0:9b334a45a8ff	363
bogdanm	0:9b334a45a8ff	364	/* Disable the capture compare Interrupts event */
bogdanm	0:9b334a45a8ff	365	__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
bogdanm	0:9b334a45a8ff	366
bogdanm	0:9b334a45a8ff	367	/* Disable the Peripheral */
bogdanm	0:9b334a45a8ff	368	__HAL_TIM_DISABLE(htim);
bogdanm	0:9b334a45a8ff	369
bogdanm	0:9b334a45a8ff	370	/* Return function status */
bogdanm	0:9b334a45a8ff	371	return HAL_OK;
bogdanm	0:9b334a45a8ff	372	}
bogdanm	0:9b334a45a8ff	373
bogdanm	0:9b334a45a8ff	374	/**
bogdanm	0:9b334a45a8ff	375	* @brief Starts the TIM Hall Sensor Interface in DMA mode.
bogdanm	0:9b334a45a8ff	376	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	377	* the configuration information for TIM module.
bogdanm	0:9b334a45a8ff	378	* @param pData: The destination Buffer address.
bogdanm	0:9b334a45a8ff	379	* @param Length: The length of data to be transferred from TIM peripheral to memory.
bogdanm	0:9b334a45a8ff	380	* @retval HAL status
bogdanm	0:9b334a45a8ff	381	*/
bogdanm	0:9b334a45a8ff	382	HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef htim, uint32_t pData, uint16_t Length)
bogdanm	0:9b334a45a8ff	383	{
bogdanm	0:9b334a45a8ff	384	/* Check the parameters */
bogdanm	0:9b334a45a8ff	385	assert_param(IS_TIM_XOR_INSTANCE(htim->Instance));
bogdanm	0:9b334a45a8ff	386
bogdanm	0:9b334a45a8ff	387	if((htim->State == HAL_TIM_STATE_BUSY))
bogdanm	0:9b334a45a8ff	388	{
bogdanm	0:9b334a45a8ff	389	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	390	}
bogdanm	0:9b334a45a8ff	391	else if((htim->State == HAL_TIM_STATE_READY))
bogdanm	0:9b334a45a8ff	392	{
bogdanm	0:9b334a45a8ff	393	if(((uint32_t)pData == 0 ) && (Length > 0))
bogdanm	0:9b334a45a8ff	394	{
bogdanm	0:9b334a45a8ff	395	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	396	}
bogdanm	0:9b334a45a8ff	397	else
bogdanm	0:9b334a45a8ff	398	{
bogdanm	0:9b334a45a8ff	399	htim->State = HAL_TIM_STATE_BUSY;
bogdanm	0:9b334a45a8ff	400	}
bogdanm	0:9b334a45a8ff	401	}
bogdanm	0:9b334a45a8ff	402	/* Enable the Input Capture channels 1
bogdanm	0:9b334a45a8ff	403	(in the Hall Sensor Interface the Three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
bogdanm	0:9b334a45a8ff	404	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
bogdanm	0:9b334a45a8ff	405
bogdanm	0:9b334a45a8ff	406	/* Set the DMA Input Capture 1 Callback */
bogdanm	0:9b334a45a8ff	407	htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMACaptureCplt;
bogdanm	0:9b334a45a8ff	408	/* Set the DMA error callback */
bogdanm	0:9b334a45a8ff	409	htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ;
bogdanm	0:9b334a45a8ff	410
bogdanm	0:9b334a45a8ff	411	/* Enable the DMA Stream for Capture 1*/
bogdanm	0:9b334a45a8ff	412	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t)pData, Length);
bogdanm	0:9b334a45a8ff	413
bogdanm	0:9b334a45a8ff	414	/* Enable the capture compare 1 Interrupt */
bogdanm	0:9b334a45a8ff	415	__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
bogdanm	0:9b334a45a8ff	416
bogdanm	0:9b334a45a8ff	417	/* Enable the Peripheral */
bogdanm	0:9b334a45a8ff	418	__HAL_TIM_ENABLE(htim);
bogdanm	0:9b334a45a8ff	419
bogdanm	0:9b334a45a8ff	420	/* Return function status */
bogdanm	0:9b334a45a8ff	421	return HAL_OK;
bogdanm	0:9b334a45a8ff	422	}
bogdanm	0:9b334a45a8ff	423
bogdanm	0:9b334a45a8ff	424	/**
bogdanm	0:9b334a45a8ff	425	* @brief Stops the TIM Hall Sensor Interface in DMA mode.
bogdanm	0:9b334a45a8ff	426	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	427	* the configuration information for TIM module.
bogdanm	0:9b334a45a8ff	428	* @retval HAL status
bogdanm	0:9b334a45a8ff	429	*/
bogdanm	0:9b334a45a8ff	430	HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef *htim)
bogdanm	0:9b334a45a8ff	431	{
bogdanm	0:9b334a45a8ff	432	/* Check the parameters */
bogdanm	0:9b334a45a8ff	433	assert_param(IS_TIM_XOR_INSTANCE(htim->Instance));
bogdanm	0:9b334a45a8ff	434
bogdanm	0:9b334a45a8ff	435	/* Disable the Input Capture channels 1
bogdanm	0:9b334a45a8ff	436	(in the Hall Sensor Interface the Three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
bogdanm	0:9b334a45a8ff	437	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
bogdanm	0:9b334a45a8ff	438
bogdanm	0:9b334a45a8ff	439
bogdanm	0:9b334a45a8ff	440	/* Disable the capture compare Interrupts 1 event */
bogdanm	0:9b334a45a8ff	441	__HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
bogdanm	0:9b334a45a8ff	442
bogdanm	0:9b334a45a8ff	443	/* Disable the Peripheral */
bogdanm	0:9b334a45a8ff	444	__HAL_TIM_DISABLE(htim);
bogdanm	0:9b334a45a8ff	445
bogdanm	0:9b334a45a8ff	446	/* Return function status */
bogdanm	0:9b334a45a8ff	447	return HAL_OK;
bogdanm	0:9b334a45a8ff	448	}
bogdanm	0:9b334a45a8ff	449	/**
bogdanm	0:9b334a45a8ff	450	* @}
bogdanm	0:9b334a45a8ff	451	*/
bogdanm	0:9b334a45a8ff	452
bogdanm	0:9b334a45a8ff	453	/** @defgroup TIMEx_Exported_Functions_Group2 Timer Complementary Output Compare functions
bogdanm	0:9b334a45a8ff	454	* @brief Timer Complementary Output Compare functions
bogdanm	0:9b334a45a8ff	455	*
bogdanm	0:9b334a45a8ff	456	@verbatim
bogdanm	0:9b334a45a8ff	457	==============================================================================
bogdanm	0:9b334a45a8ff	458	##### Timer Complementary Output Compare functions #####
bogdanm	0:9b334a45a8ff	459	==============================================================================
bogdanm	0:9b334a45a8ff	460	[..]
bogdanm	0:9b334a45a8ff	461	This section provides functions allowing to:
bogdanm	0:9b334a45a8ff	462	(+) Start the Complementary Output Compare/PWM.
bogdanm	0:9b334a45a8ff	463	(+) Stop the Complementary Output Compare/PWM.
bogdanm	0:9b334a45a8ff	464	(+) Start the Complementary Output Compare/PWM and enable interrupts.
bogdanm	0:9b334a45a8ff	465	(+) Stop the Complementary Output Compare/PWM and disable interrupts.
bogdanm	0:9b334a45a8ff	466	(+) Start the Complementary Output Compare/PWM and enable DMA transfers.
bogdanm	0:9b334a45a8ff	467	(+) Stop the Complementary Output Compare/PWM and disable DMA transfers.
bogdanm	0:9b334a45a8ff	468
bogdanm	0:9b334a45a8ff	469	@endverbatim
bogdanm	0:9b334a45a8ff	470	* @{
bogdanm	0:9b334a45a8ff	471	*/
bogdanm	0:9b334a45a8ff	472
bogdanm	0:9b334a45a8ff	473	/**
bogdanm	0:9b334a45a8ff	474	* @brief Starts the TIM Output Compare signal generation on the complementary
bogdanm	0:9b334a45a8ff	475	* output.
bogdanm	0:9b334a45a8ff	476	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	477	* the configuration information for TIM module.
bogdanm	0:9b334a45a8ff	478	* @param Channel: TIM Channel to be enabled.
bogdanm	0:9b334a45a8ff	479	* This parameter can be one of the following values:
bogdanm	0:9b334a45a8ff	480	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
bogdanm	0:9b334a45a8ff	481	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
bogdanm	0:9b334a45a8ff	482	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
bogdanm	0:9b334a45a8ff	483	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
bogdanm	0:9b334a45a8ff	484	* @retval HAL status
bogdanm	0:9b334a45a8ff	485	*/
bogdanm	0:9b334a45a8ff	486	HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
bogdanm	0:9b334a45a8ff	487	{
bogdanm	0:9b334a45a8ff	488	/* Check the parameters */
bogdanm	0:9b334a45a8ff	489	assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
bogdanm	0:9b334a45a8ff	490
bogdanm	0:9b334a45a8ff	491	/* Enable the Capture compare channel N */
bogdanm	0:9b334a45a8ff	492	TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
bogdanm	0:9b334a45a8ff	493
bogdanm	0:9b334a45a8ff	494	/* Enable the Main Output */
bogdanm	0:9b334a45a8ff	495	__HAL_TIM_MOE_ENABLE(htim);
bogdanm	0:9b334a45a8ff	496
bogdanm	0:9b334a45a8ff	497	/* Enable the Peripheral */
bogdanm	0:9b334a45a8ff	498	__HAL_TIM_ENABLE(htim);
bogdanm	0:9b334a45a8ff	499
bogdanm	0:9b334a45a8ff	500	/* Return function status */
bogdanm	0:9b334a45a8ff	501	return HAL_OK;
bogdanm	0:9b334a45a8ff	502	}
bogdanm	0:9b334a45a8ff	503
bogdanm	0:9b334a45a8ff	504	/**
bogdanm	0:9b334a45a8ff	505	* @brief Stops the TIM Output Compare signal generation on the complementary
bogdanm	0:9b334a45a8ff	506	* output.
bogdanm	0:9b334a45a8ff	507	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	508	* the configuration information for TIM module.
bogdanm	0:9b334a45a8ff	509	* @param Channel: TIM Channel to be disabled.
bogdanm	0:9b334a45a8ff	510	* This parameter can be one of the following values:
bogdanm	0:9b334a45a8ff	511	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
bogdanm	0:9b334a45a8ff	512	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
bogdanm	0:9b334a45a8ff	513	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
bogdanm	0:9b334a45a8ff	514	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
bogdanm	0:9b334a45a8ff	515	* @retval HAL status
bogdanm	0:9b334a45a8ff	516	*/
bogdanm	0:9b334a45a8ff	517	HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
bogdanm	0:9b334a45a8ff	518	{
bogdanm	0:9b334a45a8ff	519	/* Check the parameters */
bogdanm	0:9b334a45a8ff	520	assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
bogdanm	0:9b334a45a8ff	521
bogdanm	0:9b334a45a8ff	522	/* Disable the Capture compare channel N */
bogdanm	0:9b334a45a8ff	523	TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
bogdanm	0:9b334a45a8ff	524
bogdanm	0:9b334a45a8ff	525	/* Disable the Main Output */
bogdanm	0:9b334a45a8ff	526	__HAL_TIM_MOE_DISABLE(htim);
bogdanm	0:9b334a45a8ff	527
bogdanm	0:9b334a45a8ff	528	/* Disable the Peripheral */
bogdanm	0:9b334a45a8ff	529	__HAL_TIM_DISABLE(htim);
bogdanm	0:9b334a45a8ff	530
bogdanm	0:9b334a45a8ff	531	/* Return function status */
bogdanm	0:9b334a45a8ff	532	return HAL_OK;
bogdanm	0:9b334a45a8ff	533	}
bogdanm	0:9b334a45a8ff	534
bogdanm	0:9b334a45a8ff	535	/**
bogdanm	0:9b334a45a8ff	536	* @brief Starts the TIM Output Compare signal generation in interrupt mode
bogdanm	0:9b334a45a8ff	537	* on the complementary output.
bogdanm	0:9b334a45a8ff	538	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	539	* the configuration information for TIM module.
bogdanm	0:9b334a45a8ff	540	* @param Channel: TIM Channel to be enabled.
bogdanm	0:9b334a45a8ff	541	* This parameter can be one of the following values:
bogdanm	0:9b334a45a8ff	542	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
bogdanm	0:9b334a45a8ff	543	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
bogdanm	0:9b334a45a8ff	544	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
bogdanm	0:9b334a45a8ff	545	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
bogdanm	0:9b334a45a8ff	546	* @retval HAL status
bogdanm	0:9b334a45a8ff	547	*/
bogdanm	0:9b334a45a8ff	548	HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
bogdanm	0:9b334a45a8ff	549	{
bogdanm	0:9b334a45a8ff	550	/* Check the parameters */
bogdanm	0:9b334a45a8ff	551	assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
bogdanm	0:9b334a45a8ff	552
bogdanm	0:9b334a45a8ff	553	switch (Channel)
bogdanm	0:9b334a45a8ff	554	{
bogdanm	0:9b334a45a8ff	555	case TIM_CHANNEL_1:
bogdanm	0:9b334a45a8ff	556	{
bogdanm	0:9b334a45a8ff	557	/* Enable the TIM Output Compare interrupt */
bogdanm	0:9b334a45a8ff	558	__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
bogdanm	0:9b334a45a8ff	559	}
bogdanm	0:9b334a45a8ff	560	break;
bogdanm	0:9b334a45a8ff	561
bogdanm	0:9b334a45a8ff	562	case TIM_CHANNEL_2:
bogdanm	0:9b334a45a8ff	563	{
bogdanm	0:9b334a45a8ff	564	/* Enable the TIM Output Compare interrupt */
bogdanm	0:9b334a45a8ff	565	__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
bogdanm	0:9b334a45a8ff	566	}
bogdanm	0:9b334a45a8ff	567	break;
bogdanm	0:9b334a45a8ff	568
bogdanm	0:9b334a45a8ff	569	case TIM_CHANNEL_3:
bogdanm	0:9b334a45a8ff	570	{
bogdanm	0:9b334a45a8ff	571	/* Enable the TIM Output Compare interrupt */
bogdanm	0:9b334a45a8ff	572	__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3);
bogdanm	0:9b334a45a8ff	573	}
bogdanm	0:9b334a45a8ff	574	break;
bogdanm	0:9b334a45a8ff	575
bogdanm	0:9b334a45a8ff	576	case TIM_CHANNEL_4:
bogdanm	0:9b334a45a8ff	577	{
bogdanm	0:9b334a45a8ff	578	/* Enable the TIM Output Compare interrupt */
bogdanm	0:9b334a45a8ff	579	__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC4);
bogdanm	0:9b334a45a8ff	580	}
bogdanm	0:9b334a45a8ff	581	break;
bogdanm	0:9b334a45a8ff	582
bogdanm	0:9b334a45a8ff	583	default:
bogdanm	0:9b334a45a8ff	584	break;
bogdanm	0:9b334a45a8ff	585	}
bogdanm	0:9b334a45a8ff	586
bogdanm	0:9b334a45a8ff	587	/* Enable the TIM Break interrupt */
bogdanm	0:9b334a45a8ff	588	__HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK);
bogdanm	0:9b334a45a8ff	589
bogdanm	0:9b334a45a8ff	590	/* Enable the Capture compare channel N */
bogdanm	0:9b334a45a8ff	591	TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
bogdanm	0:9b334a45a8ff	592
bogdanm	0:9b334a45a8ff	593	/* Enable the Main Output */
bogdanm	0:9b334a45a8ff	594	__HAL_TIM_MOE_ENABLE(htim);
bogdanm	0:9b334a45a8ff	595
bogdanm	0:9b334a45a8ff	596	/* Enable the Peripheral */
bogdanm	0:9b334a45a8ff	597	__HAL_TIM_ENABLE(htim);
bogdanm	0:9b334a45a8ff	598
bogdanm	0:9b334a45a8ff	599	/* Return function status */
bogdanm	0:9b334a45a8ff	600	return HAL_OK;
bogdanm	0:9b334a45a8ff	601	}
bogdanm	0:9b334a45a8ff	602
bogdanm	0:9b334a45a8ff	603	/**
bogdanm	0:9b334a45a8ff	604	* @brief Stops the TIM Output Compare signal generation in interrupt mode
bogdanm	0:9b334a45a8ff	605	* on the complementary output.
bogdanm	0:9b334a45a8ff	606	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	607	* the configuration information for TIM module.
bogdanm	0:9b334a45a8ff	608	* @param Channel: TIM Channel to be disabled.
bogdanm	0:9b334a45a8ff	609	* This parameter can be one of the following values:
bogdanm	0:9b334a45a8ff	610	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
bogdanm	0:9b334a45a8ff	611	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
bogdanm	0:9b334a45a8ff	612	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
bogdanm	0:9b334a45a8ff	613	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
bogdanm	0:9b334a45a8ff	614	* @retval HAL status
bogdanm	0:9b334a45a8ff	615	*/
bogdanm	0:9b334a45a8ff	616	HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
bogdanm	0:9b334a45a8ff	617	{
bogdanm	0:9b334a45a8ff	618	/* Check the parameters */
bogdanm	0:9b334a45a8ff	619	assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
bogdanm	0:9b334a45a8ff	620
bogdanm	0:9b334a45a8ff	621	switch (Channel)
bogdanm	0:9b334a45a8ff	622	{
bogdanm	0:9b334a45a8ff	623	case TIM_CHANNEL_1:
bogdanm	0:9b334a45a8ff	624	{
bogdanm	0:9b334a45a8ff	625	/* Disable the TIM Output Compare interrupt */
bogdanm	0:9b334a45a8ff	626	__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
bogdanm	0:9b334a45a8ff	627	}
bogdanm	0:9b334a45a8ff	628	break;
bogdanm	0:9b334a45a8ff	629
bogdanm	0:9b334a45a8ff	630	case TIM_CHANNEL_2:
bogdanm	0:9b334a45a8ff	631	{
bogdanm	0:9b334a45a8ff	632	/* Disable the TIM Output Compare interrupt */
bogdanm	0:9b334a45a8ff	633	__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
bogdanm	0:9b334a45a8ff	634	}
bogdanm	0:9b334a45a8ff	635	break;
bogdanm	0:9b334a45a8ff	636
bogdanm	0:9b334a45a8ff	637	case TIM_CHANNEL_3:
bogdanm	0:9b334a45a8ff	638	{
bogdanm	0:9b334a45a8ff	639	/* Disable the TIM Output Compare interrupt */
bogdanm	0:9b334a45a8ff	640	__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3);
bogdanm	0:9b334a45a8ff	641	}
bogdanm	0:9b334a45a8ff	642	break;
bogdanm	0:9b334a45a8ff	643
bogdanm	0:9b334a45a8ff	644	case TIM_CHANNEL_4:
bogdanm	0:9b334a45a8ff	645	{
bogdanm	0:9b334a45a8ff	646	/* Disable the TIM Output Compare interrupt */
bogdanm	0:9b334a45a8ff	647	__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC4);
bogdanm	0:9b334a45a8ff	648	}
bogdanm	0:9b334a45a8ff	649	break;
bogdanm	0:9b334a45a8ff	650
bogdanm	0:9b334a45a8ff	651	default:
bogdanm	0:9b334a45a8ff	652	break;
bogdanm	0:9b334a45a8ff	653	}
bogdanm	0:9b334a45a8ff	654
bogdanm	0:9b334a45a8ff	655	/* Disable the Capture compare channel N */
bogdanm	0:9b334a45a8ff	656	TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
bogdanm	0:9b334a45a8ff	657
bogdanm	0:9b334a45a8ff	658	/* Disable the TIM Break interrupt (only if no more channel is active) */
bogdanm	0:9b334a45a8ff	659	if((READ_REG(htim->Instance->CCER) & (TIM_CCER_CC1NE \| TIM_CCER_CC2NE \| TIM_CCER_CC3NE)) == RESET)
bogdanm	0:9b334a45a8ff	660	{
bogdanm	0:9b334a45a8ff	661	__HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK);
bogdanm	0:9b334a45a8ff	662	}
bogdanm	0:9b334a45a8ff	663
bogdanm	0:9b334a45a8ff	664	/* Disable the Main Output */
bogdanm	0:9b334a45a8ff	665	__HAL_TIM_MOE_DISABLE(htim);
bogdanm	0:9b334a45a8ff	666
bogdanm	0:9b334a45a8ff	667	/* Disable the Peripheral */
bogdanm	0:9b334a45a8ff	668	__HAL_TIM_DISABLE(htim);
bogdanm	0:9b334a45a8ff	669
bogdanm	0:9b334a45a8ff	670	/* Return function status */
bogdanm	0:9b334a45a8ff	671	return HAL_OK;
bogdanm	0:9b334a45a8ff	672	}
bogdanm	0:9b334a45a8ff	673
bogdanm	0:9b334a45a8ff	674	/**
bogdanm	0:9b334a45a8ff	675	* @brief Starts the TIM Output Compare signal generation in DMA mode
bogdanm	0:9b334a45a8ff	676	* on the complementary output.
bogdanm	0:9b334a45a8ff	677	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	678	* the configuration information for TIM module.
bogdanm	0:9b334a45a8ff	679	* @param Channel: TIM Channel to be enabled.
bogdanm	0:9b334a45a8ff	680	* This parameter can be one of the following values:
bogdanm	0:9b334a45a8ff	681	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
bogdanm	0:9b334a45a8ff	682	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
bogdanm	0:9b334a45a8ff	683	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
bogdanm	0:9b334a45a8ff	684	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
bogdanm	0:9b334a45a8ff	685	* @param pData: The source Buffer address.
bogdanm	0:9b334a45a8ff	686	* @param Length: The length of data to be transferred from memory to TIM peripheral
bogdanm	0:9b334a45a8ff	687	* @retval HAL status
bogdanm	0:9b334a45a8ff	688	*/
bogdanm	0:9b334a45a8ff	689	HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef htim, uint32_t Channel, uint32_t pData, uint16_t Length)
bogdanm	0:9b334a45a8ff	690	{
bogdanm	0:9b334a45a8ff	691	/* Check the parameters */
bogdanm	0:9b334a45a8ff	692	assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
bogdanm	0:9b334a45a8ff	693
bogdanm	0:9b334a45a8ff	694	if((htim->State == HAL_TIM_STATE_BUSY))
bogdanm	0:9b334a45a8ff	695	{
bogdanm	0:9b334a45a8ff	696	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	697	}
bogdanm	0:9b334a45a8ff	698	else if((htim->State == HAL_TIM_STATE_READY))
bogdanm	0:9b334a45a8ff	699	{
bogdanm	0:9b334a45a8ff	700	if(((uint32_t)pData == 0 ) && (Length > 0))
bogdanm	0:9b334a45a8ff	701	{
bogdanm	0:9b334a45a8ff	702	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	703	}
bogdanm	0:9b334a45a8ff	704	else
bogdanm	0:9b334a45a8ff	705	{
bogdanm	0:9b334a45a8ff	706	htim->State = HAL_TIM_STATE_BUSY;
bogdanm	0:9b334a45a8ff	707	}
bogdanm	0:9b334a45a8ff	708	}
bogdanm	0:9b334a45a8ff	709	switch (Channel)
bogdanm	0:9b334a45a8ff	710	{
bogdanm	0:9b334a45a8ff	711	case TIM_CHANNEL_1:
bogdanm	0:9b334a45a8ff	712	{
bogdanm	0:9b334a45a8ff	713	/* Set the DMA Period elapsed callback */
bogdanm	0:9b334a45a8ff	714	htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseCplt;
bogdanm	0:9b334a45a8ff	715
bogdanm	0:9b334a45a8ff	716	/* Set the DMA error callback */
bogdanm	0:9b334a45a8ff	717	htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ;
bogdanm	0:9b334a45a8ff	718
bogdanm	0:9b334a45a8ff	719	/* Enable the DMA Stream */
bogdanm	0:9b334a45a8ff	720	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, Length);
bogdanm	0:9b334a45a8ff	721
bogdanm	0:9b334a45a8ff	722	/* Enable the TIM Output Compare DMA request */
bogdanm	0:9b334a45a8ff	723	__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
bogdanm	0:9b334a45a8ff	724	}
bogdanm	0:9b334a45a8ff	725	break;
bogdanm	0:9b334a45a8ff	726
bogdanm	0:9b334a45a8ff	727	case TIM_CHANNEL_2:
bogdanm	0:9b334a45a8ff	728	{
bogdanm	0:9b334a45a8ff	729	/* Set the DMA Period elapsed callback */
bogdanm	0:9b334a45a8ff	730	htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseCplt;
bogdanm	0:9b334a45a8ff	731
bogdanm	0:9b334a45a8ff	732	/* Set the DMA error callback */
bogdanm	0:9b334a45a8ff	733	htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ;
bogdanm	0:9b334a45a8ff	734
bogdanm	0:9b334a45a8ff	735	/* Enable the DMA Stream */
bogdanm	0:9b334a45a8ff	736	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, Length);
bogdanm	0:9b334a45a8ff	737
bogdanm	0:9b334a45a8ff	738	/* Enable the TIM Output Compare DMA request */
bogdanm	0:9b334a45a8ff	739	__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
bogdanm	0:9b334a45a8ff	740	}
bogdanm	0:9b334a45a8ff	741	break;
bogdanm	0:9b334a45a8ff	742
bogdanm	0:9b334a45a8ff	743	case TIM_CHANNEL_3:
bogdanm	0:9b334a45a8ff	744	{
bogdanm	0:9b334a45a8ff	745	/* Set the DMA Period elapsed callback */
bogdanm	0:9b334a45a8ff	746	htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseCplt;
bogdanm	0:9b334a45a8ff	747
bogdanm	0:9b334a45a8ff	748	/* Set the DMA error callback */
bogdanm	0:9b334a45a8ff	749	htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ;
bogdanm	0:9b334a45a8ff	750
bogdanm	0:9b334a45a8ff	751	/* Enable the DMA Stream */
bogdanm	0:9b334a45a8ff	752	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,Length);
bogdanm	0:9b334a45a8ff	753
bogdanm	0:9b334a45a8ff	754	/* Enable the TIM Output Compare DMA request */
bogdanm	0:9b334a45a8ff	755	__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3);
bogdanm	0:9b334a45a8ff	756	}
bogdanm	0:9b334a45a8ff	757	break;
bogdanm	0:9b334a45a8ff	758
bogdanm	0:9b334a45a8ff	759	case TIM_CHANNEL_4:
bogdanm	0:9b334a45a8ff	760	{
bogdanm	0:9b334a45a8ff	761	/* Set the DMA Period elapsed callback */
bogdanm	0:9b334a45a8ff	762	htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = TIM_DMADelayPulseCplt;
bogdanm	0:9b334a45a8ff	763
bogdanm	0:9b334a45a8ff	764	/* Set the DMA error callback */
bogdanm	0:9b334a45a8ff	765	htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = TIM_DMAError ;
bogdanm	0:9b334a45a8ff	766
bogdanm	0:9b334a45a8ff	767	/* Enable the DMA Stream */
bogdanm	0:9b334a45a8ff	768	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)pData, (uint32_t)&htim->Instance->CCR4, Length);
bogdanm	0:9b334a45a8ff	769
bogdanm	0:9b334a45a8ff	770	/* Enable the TIM Output Compare DMA request */
bogdanm	0:9b334a45a8ff	771	__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC4);
bogdanm	0:9b334a45a8ff	772	}
bogdanm	0:9b334a45a8ff	773	break;
bogdanm	0:9b334a45a8ff	774
bogdanm	0:9b334a45a8ff	775	default:
bogdanm	0:9b334a45a8ff	776	break;
bogdanm	0:9b334a45a8ff	777	}
bogdanm	0:9b334a45a8ff	778
bogdanm	0:9b334a45a8ff	779	/* Enable the Capture compare channel N */
bogdanm	0:9b334a45a8ff	780	TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
bogdanm	0:9b334a45a8ff	781
bogdanm	0:9b334a45a8ff	782	/* Enable the Main Output */
bogdanm	0:9b334a45a8ff	783	__HAL_TIM_MOE_ENABLE(htim);
bogdanm	0:9b334a45a8ff	784
bogdanm	0:9b334a45a8ff	785	/* Enable the Peripheral */
bogdanm	0:9b334a45a8ff	786	__HAL_TIM_ENABLE(htim);
bogdanm	0:9b334a45a8ff	787
bogdanm	0:9b334a45a8ff	788	/* Return function status */
bogdanm	0:9b334a45a8ff	789	return HAL_OK;
bogdanm	0:9b334a45a8ff	790	}
bogdanm	0:9b334a45a8ff	791
bogdanm	0:9b334a45a8ff	792	/**
bogdanm	0:9b334a45a8ff	793	* @brief Stops the TIM Output Compare signal generation in DMA mode
bogdanm	0:9b334a45a8ff	794	* on the complementary output.
bogdanm	0:9b334a45a8ff	795	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	796	* the configuration information for TIM module.
bogdanm	0:9b334a45a8ff	797	* @param Channel: TIM Channel to be disabled.
bogdanm	0:9b334a45a8ff	798	* This parameter can be one of the following values:
bogdanm	0:9b334a45a8ff	799	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
bogdanm	0:9b334a45a8ff	800	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
bogdanm	0:9b334a45a8ff	801	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
bogdanm	0:9b334a45a8ff	802	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
bogdanm	0:9b334a45a8ff	803	* @retval HAL status
bogdanm	0:9b334a45a8ff	804	*/
bogdanm	0:9b334a45a8ff	805	HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
bogdanm	0:9b334a45a8ff	806	{
bogdanm	0:9b334a45a8ff	807	/* Check the parameters */
bogdanm	0:9b334a45a8ff	808	assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
bogdanm	0:9b334a45a8ff	809
bogdanm	0:9b334a45a8ff	810	switch (Channel)
bogdanm	0:9b334a45a8ff	811	{
bogdanm	0:9b334a45a8ff	812	case TIM_CHANNEL_1:
bogdanm	0:9b334a45a8ff	813	{
bogdanm	0:9b334a45a8ff	814	/* Disable the TIM Output Compare DMA request */
bogdanm	0:9b334a45a8ff	815	__HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
bogdanm	0:9b334a45a8ff	816	}
bogdanm	0:9b334a45a8ff	817	break;
bogdanm	0:9b334a45a8ff	818
bogdanm	0:9b334a45a8ff	819	case TIM_CHANNEL_2:
bogdanm	0:9b334a45a8ff	820	{
bogdanm	0:9b334a45a8ff	821	/* Disable the TIM Output Compare DMA request */
bogdanm	0:9b334a45a8ff	822	__HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
bogdanm	0:9b334a45a8ff	823	}
bogdanm	0:9b334a45a8ff	824	break;
bogdanm	0:9b334a45a8ff	825
bogdanm	0:9b334a45a8ff	826	case TIM_CHANNEL_3:
bogdanm	0:9b334a45a8ff	827	{
bogdanm	0:9b334a45a8ff	828	/* Disable the TIM Output Compare DMA request */
bogdanm	0:9b334a45a8ff	829	__HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3);
bogdanm	0:9b334a45a8ff	830	}
bogdanm	0:9b334a45a8ff	831	break;
bogdanm	0:9b334a45a8ff	832
bogdanm	0:9b334a45a8ff	833	case TIM_CHANNEL_4:
bogdanm	0:9b334a45a8ff	834	{
bogdanm	0:9b334a45a8ff	835	/* Disable the TIM Output Compare interrupt */
bogdanm	0:9b334a45a8ff	836	__HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC4);
bogdanm	0:9b334a45a8ff	837	}
bogdanm	0:9b334a45a8ff	838	break;
bogdanm	0:9b334a45a8ff	839
bogdanm	0:9b334a45a8ff	840	default:
bogdanm	0:9b334a45a8ff	841	break;
bogdanm	0:9b334a45a8ff	842	}
bogdanm	0:9b334a45a8ff	843
bogdanm	0:9b334a45a8ff	844	/* Disable the Capture compare channel N */
bogdanm	0:9b334a45a8ff	845	TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
bogdanm	0:9b334a45a8ff	846
bogdanm	0:9b334a45a8ff	847	/* Disable the Main Output */
bogdanm	0:9b334a45a8ff	848	__HAL_TIM_MOE_DISABLE(htim);
bogdanm	0:9b334a45a8ff	849
bogdanm	0:9b334a45a8ff	850	/* Disable the Peripheral */
bogdanm	0:9b334a45a8ff	851	__HAL_TIM_DISABLE(htim);
bogdanm	0:9b334a45a8ff	852
bogdanm	0:9b334a45a8ff	853	/* Change the htim state */
bogdanm	0:9b334a45a8ff	854	htim->State = HAL_TIM_STATE_READY;
bogdanm	0:9b334a45a8ff	855
bogdanm	0:9b334a45a8ff	856	/* Return function status */
bogdanm	0:9b334a45a8ff	857	return HAL_OK;
bogdanm	0:9b334a45a8ff	858	}
bogdanm	0:9b334a45a8ff	859	/**
bogdanm	0:9b334a45a8ff	860	* @}
bogdanm	0:9b334a45a8ff	861	*/
bogdanm	0:9b334a45a8ff	862
bogdanm	0:9b334a45a8ff	863	/** @defgroup TIMEx_Exported_Functions_Group3 Timer Complementary PWM functions
bogdanm	0:9b334a45a8ff	864	* @brief Timer Complementary PWM functions
bogdanm	0:9b334a45a8ff	865	*
bogdanm	0:9b334a45a8ff	866	@verbatim
bogdanm	0:9b334a45a8ff	867	==============================================================================
bogdanm	0:9b334a45a8ff	868	##### Timer Complementary PWM functions #####
bogdanm	0:9b334a45a8ff	869	==============================================================================
bogdanm	0:9b334a45a8ff	870	[..]
bogdanm	0:9b334a45a8ff	871	This section provides functions allowing to:
bogdanm	0:9b334a45a8ff	872	(+) Start the Complementary PWM.
bogdanm	0:9b334a45a8ff	873	(+) Stop the Complementary PWM.
bogdanm	0:9b334a45a8ff	874	(+) Start the Complementary PWM and enable interrupts.
bogdanm	0:9b334a45a8ff	875	(+) Stop the Complementary PWM and disable interrupts.
bogdanm	0:9b334a45a8ff	876	(+) Start the Complementary PWM and enable DMA transfers.
bogdanm	0:9b334a45a8ff	877	(+) Stop the Complementary PWM and disable DMA transfers.
bogdanm	0:9b334a45a8ff	878	(+) Start the Complementary Input Capture measurement.
bogdanm	0:9b334a45a8ff	879	(+) Stop the Complementary Input Capture.
bogdanm	0:9b334a45a8ff	880	(+) Start the Complementary Input Capture and enable interrupts.
bogdanm	0:9b334a45a8ff	881	(+) Stop the Complementary Input Capture and disable interrupts.
bogdanm	0:9b334a45a8ff	882	(+) Start the Complementary Input Capture and enable DMA transfers.
bogdanm	0:9b334a45a8ff	883	(+) Stop the Complementary Input Capture and disable DMA transfers.
bogdanm	0:9b334a45a8ff	884	(+) Start the Complementary One Pulse generation.
bogdanm	0:9b334a45a8ff	885	(+) Stop the Complementary One Pulse.
bogdanm	0:9b334a45a8ff	886	(+) Start the Complementary One Pulse and enable interrupts.
bogdanm	0:9b334a45a8ff	887	(+) Stop the Complementary One Pulse and disable interrupts.
bogdanm	0:9b334a45a8ff	888
bogdanm	0:9b334a45a8ff	889	@endverbatim
bogdanm	0:9b334a45a8ff	890	* @{
bogdanm	0:9b334a45a8ff	891	*/
bogdanm	0:9b334a45a8ff	892
bogdanm	0:9b334a45a8ff	893	/**
bogdanm	0:9b334a45a8ff	894	* @brief Starts the PWM signal generation on the complementary output.
bogdanm	0:9b334a45a8ff	895	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	896	* the configuration information for TIM module.
bogdanm	0:9b334a45a8ff	897	* @param Channel: TIM Channel to be enabled.
bogdanm	0:9b334a45a8ff	898	* This parameter can be one of the following values:
bogdanm	0:9b334a45a8ff	899	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
bogdanm	0:9b334a45a8ff	900	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
bogdanm	0:9b334a45a8ff	901	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
bogdanm	0:9b334a45a8ff	902	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
bogdanm	0:9b334a45a8ff	903	* @retval HAL status
bogdanm	0:9b334a45a8ff	904	*/
bogdanm	0:9b334a45a8ff	905	HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
bogdanm	0:9b334a45a8ff	906	{
bogdanm	0:9b334a45a8ff	907	/* Check the parameters */
bogdanm	0:9b334a45a8ff	908	assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
bogdanm	0:9b334a45a8ff	909
bogdanm	0:9b334a45a8ff	910	/* Enable the complementary PWM output */
bogdanm	0:9b334a45a8ff	911	TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
bogdanm	0:9b334a45a8ff	912
bogdanm	0:9b334a45a8ff	913	/* Enable the Main Output */
bogdanm	0:9b334a45a8ff	914	__HAL_TIM_MOE_ENABLE(htim);
bogdanm	0:9b334a45a8ff	915
bogdanm	0:9b334a45a8ff	916	/* Enable the Peripheral */
bogdanm	0:9b334a45a8ff	917	__HAL_TIM_ENABLE(htim);
bogdanm	0:9b334a45a8ff	918
bogdanm	0:9b334a45a8ff	919	/* Return function status */
bogdanm	0:9b334a45a8ff	920	return HAL_OK;
bogdanm	0:9b334a45a8ff	921	}
bogdanm	0:9b334a45a8ff	922
bogdanm	0:9b334a45a8ff	923	/**
bogdanm	0:9b334a45a8ff	924	* @brief Stops the PWM signal generation on the complementary output.
bogdanm	0:9b334a45a8ff	925	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	926	* the configuration information for TIM module.
bogdanm	0:9b334a45a8ff	927	* @param Channel: TIM Channel to be disabled.
bogdanm	0:9b334a45a8ff	928	* This parameter can be one of the following values:
bogdanm	0:9b334a45a8ff	929	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
bogdanm	0:9b334a45a8ff	930	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
bogdanm	0:9b334a45a8ff	931	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
bogdanm	0:9b334a45a8ff	932	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
bogdanm	0:9b334a45a8ff	933	* @retval HAL status
bogdanm	0:9b334a45a8ff	934	*/
bogdanm	0:9b334a45a8ff	935	HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
bogdanm	0:9b334a45a8ff	936	{
bogdanm	0:9b334a45a8ff	937	/* Check the parameters */
bogdanm	0:9b334a45a8ff	938	assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
bogdanm	0:9b334a45a8ff	939
bogdanm	0:9b334a45a8ff	940	/* Disable the complementary PWM output */
bogdanm	0:9b334a45a8ff	941	TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
bogdanm	0:9b334a45a8ff	942
bogdanm	0:9b334a45a8ff	943	/* Disable the Main Output */
bogdanm	0:9b334a45a8ff	944	__HAL_TIM_MOE_DISABLE(htim);
bogdanm	0:9b334a45a8ff	945
bogdanm	0:9b334a45a8ff	946	/* Disable the Peripheral */
bogdanm	0:9b334a45a8ff	947	__HAL_TIM_DISABLE(htim);
bogdanm	0:9b334a45a8ff	948
bogdanm	0:9b334a45a8ff	949	/* Return function status */
bogdanm	0:9b334a45a8ff	950	return HAL_OK;
bogdanm	0:9b334a45a8ff	951	}
bogdanm	0:9b334a45a8ff	952
bogdanm	0:9b334a45a8ff	953	/**
bogdanm	0:9b334a45a8ff	954	* @brief Starts the PWM signal generation in interrupt mode on the
bogdanm	0:9b334a45a8ff	955	* complementary output.
bogdanm	0:9b334a45a8ff	956	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	957	* the configuration information for TIM module.
bogdanm	0:9b334a45a8ff	958	* @param Channel: TIM Channel to be disabled.
bogdanm	0:9b334a45a8ff	959	* This parameter can be one of the following values:
bogdanm	0:9b334a45a8ff	960	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
bogdanm	0:9b334a45a8ff	961	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
bogdanm	0:9b334a45a8ff	962	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
bogdanm	0:9b334a45a8ff	963	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
bogdanm	0:9b334a45a8ff	964	* @retval HAL status
bogdanm	0:9b334a45a8ff	965	*/
bogdanm	0:9b334a45a8ff	966	HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
bogdanm	0:9b334a45a8ff	967	{
bogdanm	0:9b334a45a8ff	968	/* Check the parameters */
bogdanm	0:9b334a45a8ff	969	assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
bogdanm	0:9b334a45a8ff	970
bogdanm	0:9b334a45a8ff	971	switch (Channel)
bogdanm	0:9b334a45a8ff	972	{
bogdanm	0:9b334a45a8ff	973	case TIM_CHANNEL_1:
bogdanm	0:9b334a45a8ff	974	{
bogdanm	0:9b334a45a8ff	975	/* Enable the TIM Capture/Compare 1 interrupt */
bogdanm	0:9b334a45a8ff	976	__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
bogdanm	0:9b334a45a8ff	977	}
bogdanm	0:9b334a45a8ff	978	break;
bogdanm	0:9b334a45a8ff	979
bogdanm	0:9b334a45a8ff	980	case TIM_CHANNEL_2:
bogdanm	0:9b334a45a8ff	981	{
bogdanm	0:9b334a45a8ff	982	/* Enable the TIM Capture/Compare 2 interrupt */
bogdanm	0:9b334a45a8ff	983	__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
bogdanm	0:9b334a45a8ff	984	}
bogdanm	0:9b334a45a8ff	985	break;
bogdanm	0:9b334a45a8ff	986
bogdanm	0:9b334a45a8ff	987	case TIM_CHANNEL_3:
bogdanm	0:9b334a45a8ff	988	{
bogdanm	0:9b334a45a8ff	989	/* Enable the TIM Capture/Compare 3 interrupt */
bogdanm	0:9b334a45a8ff	990	__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3);
bogdanm	0:9b334a45a8ff	991	}
bogdanm	0:9b334a45a8ff	992	break;
bogdanm	0:9b334a45a8ff	993
bogdanm	0:9b334a45a8ff	994	case TIM_CHANNEL_4:
bogdanm	0:9b334a45a8ff	995	{
bogdanm	0:9b334a45a8ff	996	/* Enable the TIM Capture/Compare 4 interrupt */
bogdanm	0:9b334a45a8ff	997	__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC4);
bogdanm	0:9b334a45a8ff	998	}
bogdanm	0:9b334a45a8ff	999	break;
bogdanm	0:9b334a45a8ff	1000
bogdanm	0:9b334a45a8ff	1001	default:
bogdanm	0:9b334a45a8ff	1002	break;
bogdanm	0:9b334a45a8ff	1003	}
bogdanm	0:9b334a45a8ff	1004
bogdanm	0:9b334a45a8ff	1005	/* Enable the TIM Break interrupt */
bogdanm	0:9b334a45a8ff	1006	__HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK);
bogdanm	0:9b334a45a8ff	1007
bogdanm	0:9b334a45a8ff	1008	/* Enable the complementary PWM output */
bogdanm	0:9b334a45a8ff	1009	TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
bogdanm	0:9b334a45a8ff	1010
bogdanm	0:9b334a45a8ff	1011	/* Enable the Main Output */
bogdanm	0:9b334a45a8ff	1012	__HAL_TIM_MOE_ENABLE(htim);
bogdanm	0:9b334a45a8ff	1013
bogdanm	0:9b334a45a8ff	1014	/* Enable the Peripheral */
bogdanm	0:9b334a45a8ff	1015	__HAL_TIM_ENABLE(htim);
bogdanm	0:9b334a45a8ff	1016
bogdanm	0:9b334a45a8ff	1017	/* Return function status */
bogdanm	0:9b334a45a8ff	1018	return HAL_OK;
bogdanm	0:9b334a45a8ff	1019	}
bogdanm	0:9b334a45a8ff	1020
bogdanm	0:9b334a45a8ff	1021	/**
bogdanm	0:9b334a45a8ff	1022	* @brief Stops the PWM signal generation in interrupt mode on the
bogdanm	0:9b334a45a8ff	1023	* complementary output.
bogdanm	0:9b334a45a8ff	1024	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	1025	* the configuration information for TIM module.
bogdanm	0:9b334a45a8ff	1026	* @param Channel: TIM Channel to be disabled.
bogdanm	0:9b334a45a8ff	1027	* This parameter can be one of the following values:
bogdanm	0:9b334a45a8ff	1028	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
bogdanm	0:9b334a45a8ff	1029	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
bogdanm	0:9b334a45a8ff	1030	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
bogdanm	0:9b334a45a8ff	1031	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
bogdanm	0:9b334a45a8ff	1032	* @retval HAL status
bogdanm	0:9b334a45a8ff	1033	*/
bogdanm	0:9b334a45a8ff	1034	HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT (TIM_HandleTypeDef *htim, uint32_t Channel)
bogdanm	0:9b334a45a8ff	1035	{
bogdanm	0:9b334a45a8ff	1036	/* Check the parameters */
bogdanm	0:9b334a45a8ff	1037	assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
bogdanm	0:9b334a45a8ff	1038
bogdanm	0:9b334a45a8ff	1039	switch (Channel)
bogdanm	0:9b334a45a8ff	1040	{
bogdanm	0:9b334a45a8ff	1041	case TIM_CHANNEL_1:
bogdanm	0:9b334a45a8ff	1042	{
bogdanm	0:9b334a45a8ff	1043	/* Disable the TIM Capture/Compare 1 interrupt */
bogdanm	0:9b334a45a8ff	1044	__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
bogdanm	0:9b334a45a8ff	1045	}
bogdanm	0:9b334a45a8ff	1046	break;
bogdanm	0:9b334a45a8ff	1047
bogdanm	0:9b334a45a8ff	1048	case TIM_CHANNEL_2:
bogdanm	0:9b334a45a8ff	1049	{
bogdanm	0:9b334a45a8ff	1050	/* Disable the TIM Capture/Compare 2 interrupt */
bogdanm	0:9b334a45a8ff	1051	__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
bogdanm	0:9b334a45a8ff	1052	}
bogdanm	0:9b334a45a8ff	1053	break;
bogdanm	0:9b334a45a8ff	1054
bogdanm	0:9b334a45a8ff	1055	case TIM_CHANNEL_3:
bogdanm	0:9b334a45a8ff	1056	{
bogdanm	0:9b334a45a8ff	1057	/* Disable the TIM Capture/Compare 3 interrupt */
bogdanm	0:9b334a45a8ff	1058	__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3);
bogdanm	0:9b334a45a8ff	1059	}
bogdanm	0:9b334a45a8ff	1060	break;
bogdanm	0:9b334a45a8ff	1061
bogdanm	0:9b334a45a8ff	1062	case TIM_CHANNEL_4:
bogdanm	0:9b334a45a8ff	1063	{
bogdanm	0:9b334a45a8ff	1064	/* Disable the TIM Capture/Compare 3 interrupt */
bogdanm	0:9b334a45a8ff	1065	__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC4);
bogdanm	0:9b334a45a8ff	1066	}
bogdanm	0:9b334a45a8ff	1067	break;
bogdanm	0:9b334a45a8ff	1068
bogdanm	0:9b334a45a8ff	1069	default:
bogdanm	0:9b334a45a8ff	1070	break;
bogdanm	0:9b334a45a8ff	1071	}
bogdanm	0:9b334a45a8ff	1072
bogdanm	0:9b334a45a8ff	1073	/* Disable the complementary PWM output */
bogdanm	0:9b334a45a8ff	1074	TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
bogdanm	0:9b334a45a8ff	1075
bogdanm	0:9b334a45a8ff	1076	/* Disable the TIM Break interrupt (only if no more channel is active) */
bogdanm	0:9b334a45a8ff	1077	if((READ_REG(htim->Instance->CCER) & (TIM_CCER_CC1NE \| TIM_CCER_CC2NE \| TIM_CCER_CC3NE)) == RESET)
bogdanm	0:9b334a45a8ff	1078	{
bogdanm	0:9b334a45a8ff	1079	__HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK);
bogdanm	0:9b334a45a8ff	1080	}
bogdanm	0:9b334a45a8ff	1081
bogdanm	0:9b334a45a8ff	1082	/* Disable the Main Output */
bogdanm	0:9b334a45a8ff	1083	__HAL_TIM_MOE_DISABLE(htim);
bogdanm	0:9b334a45a8ff	1084
bogdanm	0:9b334a45a8ff	1085	/* Disable the Peripheral */
bogdanm	0:9b334a45a8ff	1086	__HAL_TIM_DISABLE(htim);
bogdanm	0:9b334a45a8ff	1087
bogdanm	0:9b334a45a8ff	1088	/* Return function status */
bogdanm	0:9b334a45a8ff	1089	return HAL_OK;
bogdanm	0:9b334a45a8ff	1090	}
bogdanm	0:9b334a45a8ff	1091
bogdanm	0:9b334a45a8ff	1092	/**
bogdanm	0:9b334a45a8ff	1093	* @brief Starts the TIM PWM signal generation in DMA mode on the
bogdanm	0:9b334a45a8ff	1094	* complementary output
bogdanm	0:9b334a45a8ff	1095	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	1096	* the configuration information for TIM module.
bogdanm	0:9b334a45a8ff	1097	* @param Channel: TIM Channel to be enabled.
bogdanm	0:9b334a45a8ff	1098	* This parameter can be one of the following values:
bogdanm	0:9b334a45a8ff	1099	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
bogdanm	0:9b334a45a8ff	1100	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
bogdanm	0:9b334a45a8ff	1101	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
bogdanm	0:9b334a45a8ff	1102	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
bogdanm	0:9b334a45a8ff	1103	* @param pData: The source Buffer address.
bogdanm	0:9b334a45a8ff	1104	* @param Length: The length of data to be transferred from memory to TIM peripheral
bogdanm	0:9b334a45a8ff	1105	* @retval HAL status
bogdanm	0:9b334a45a8ff	1106	*/
bogdanm	0:9b334a45a8ff	1107	HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef htim, uint32_t Channel, uint32_t pData, uint16_t Length)
bogdanm	0:9b334a45a8ff	1108	{
bogdanm	0:9b334a45a8ff	1109	/* Check the parameters */
bogdanm	0:9b334a45a8ff	1110	assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
bogdanm	0:9b334a45a8ff	1111
bogdanm	0:9b334a45a8ff	1112	if((htim->State == HAL_TIM_STATE_BUSY))
bogdanm	0:9b334a45a8ff	1113	{
bogdanm	0:9b334a45a8ff	1114	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	1115	}
bogdanm	0:9b334a45a8ff	1116	else if((htim->State == HAL_TIM_STATE_READY))
bogdanm	0:9b334a45a8ff	1117	{
bogdanm	0:9b334a45a8ff	1118	if(((uint32_t)pData == 0 ) && (Length > 0))
bogdanm	0:9b334a45a8ff	1119	{
bogdanm	0:9b334a45a8ff	1120	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	1121	}
bogdanm	0:9b334a45a8ff	1122	else
bogdanm	0:9b334a45a8ff	1123	{
bogdanm	0:9b334a45a8ff	1124	htim->State = HAL_TIM_STATE_BUSY;
bogdanm	0:9b334a45a8ff	1125	}
bogdanm	0:9b334a45a8ff	1126	}
bogdanm	0:9b334a45a8ff	1127	switch (Channel)
bogdanm	0:9b334a45a8ff	1128	{
bogdanm	0:9b334a45a8ff	1129	case TIM_CHANNEL_1:
bogdanm	0:9b334a45a8ff	1130	{
bogdanm	0:9b334a45a8ff	1131	/* Set the DMA Period elapsed callback */
bogdanm	0:9b334a45a8ff	1132	htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseCplt;
bogdanm	0:9b334a45a8ff	1133
bogdanm	0:9b334a45a8ff	1134	/* Set the DMA error callback */
bogdanm	0:9b334a45a8ff	1135	htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ;
bogdanm	0:9b334a45a8ff	1136
bogdanm	0:9b334a45a8ff	1137	/* Enable the DMA Stream */
bogdanm	0:9b334a45a8ff	1138	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, Length);
bogdanm	0:9b334a45a8ff	1139
bogdanm	0:9b334a45a8ff	1140	/* Enable the TIM Capture/Compare 1 DMA request */
bogdanm	0:9b334a45a8ff	1141	__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
bogdanm	0:9b334a45a8ff	1142	}
bogdanm	0:9b334a45a8ff	1143	break;
bogdanm	0:9b334a45a8ff	1144
bogdanm	0:9b334a45a8ff	1145	case TIM_CHANNEL_2:
bogdanm	0:9b334a45a8ff	1146	{
bogdanm	0:9b334a45a8ff	1147	/* Set the DMA Period elapsed callback */
bogdanm	0:9b334a45a8ff	1148	htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseCplt;
bogdanm	0:9b334a45a8ff	1149
bogdanm	0:9b334a45a8ff	1150	/* Set the DMA error callback */
bogdanm	0:9b334a45a8ff	1151	htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ;
bogdanm	0:9b334a45a8ff	1152
bogdanm	0:9b334a45a8ff	1153	/* Enable the DMA Stream */
bogdanm	0:9b334a45a8ff	1154	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, Length);
bogdanm	0:9b334a45a8ff	1155
bogdanm	0:9b334a45a8ff	1156	/* Enable the TIM Capture/Compare 2 DMA request */
bogdanm	0:9b334a45a8ff	1157	__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
bogdanm	0:9b334a45a8ff	1158	}
bogdanm	0:9b334a45a8ff	1159	break;
bogdanm	0:9b334a45a8ff	1160
bogdanm	0:9b334a45a8ff	1161	case TIM_CHANNEL_3:
bogdanm	0:9b334a45a8ff	1162	{
bogdanm	0:9b334a45a8ff	1163	/* Set the DMA Period elapsed callback */
bogdanm	0:9b334a45a8ff	1164	htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseCplt;
bogdanm	0:9b334a45a8ff	1165
bogdanm	0:9b334a45a8ff	1166	/* Set the DMA error callback */
bogdanm	0:9b334a45a8ff	1167	htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ;
bogdanm	0:9b334a45a8ff	1168
bogdanm	0:9b334a45a8ff	1169	/* Enable the DMA Stream */
bogdanm	0:9b334a45a8ff	1170	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,Length);
bogdanm	0:9b334a45a8ff	1171
bogdanm	0:9b334a45a8ff	1172	/* Enable the TIM Capture/Compare 3 DMA request */
bogdanm	0:9b334a45a8ff	1173	__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3);
bogdanm	0:9b334a45a8ff	1174	}
bogdanm	0:9b334a45a8ff	1175	break;
bogdanm	0:9b334a45a8ff	1176
bogdanm	0:9b334a45a8ff	1177	case TIM_CHANNEL_4:
bogdanm	0:9b334a45a8ff	1178	{
bogdanm	0:9b334a45a8ff	1179	/* Set the DMA Period elapsed callback */
bogdanm	0:9b334a45a8ff	1180	htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = TIM_DMADelayPulseCplt;
bogdanm	0:9b334a45a8ff	1181
bogdanm	0:9b334a45a8ff	1182	/* Set the DMA error callback */
bogdanm	0:9b334a45a8ff	1183	htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = TIM_DMAError ;
bogdanm	0:9b334a45a8ff	1184
bogdanm	0:9b334a45a8ff	1185	/* Enable the DMA Stream */
bogdanm	0:9b334a45a8ff	1186	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)pData, (uint32_t)&htim->Instance->CCR4, Length);
bogdanm	0:9b334a45a8ff	1187
bogdanm	0:9b334a45a8ff	1188	/* Enable the TIM Capture/Compare 4 DMA request */
bogdanm	0:9b334a45a8ff	1189	__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC4);
bogdanm	0:9b334a45a8ff	1190	}
bogdanm	0:9b334a45a8ff	1191	break;
bogdanm	0:9b334a45a8ff	1192
bogdanm	0:9b334a45a8ff	1193	default:
bogdanm	0:9b334a45a8ff	1194	break;
bogdanm	0:9b334a45a8ff	1195	}
bogdanm	0:9b334a45a8ff	1196
bogdanm	0:9b334a45a8ff	1197	/* Enable the complementary PWM output */
bogdanm	0:9b334a45a8ff	1198	TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
bogdanm	0:9b334a45a8ff	1199
bogdanm	0:9b334a45a8ff	1200	/* Enable the Main Output */
bogdanm	0:9b334a45a8ff	1201	__HAL_TIM_MOE_ENABLE(htim);
bogdanm	0:9b334a45a8ff	1202
bogdanm	0:9b334a45a8ff	1203	/* Enable the Peripheral */
bogdanm	0:9b334a45a8ff	1204	__HAL_TIM_ENABLE(htim);
bogdanm	0:9b334a45a8ff	1205
bogdanm	0:9b334a45a8ff	1206	/* Return function status */
bogdanm	0:9b334a45a8ff	1207	return HAL_OK;
bogdanm	0:9b334a45a8ff	1208	}
bogdanm	0:9b334a45a8ff	1209
bogdanm	0:9b334a45a8ff	1210	/**
bogdanm	0:9b334a45a8ff	1211	* @brief Stops the TIM PWM signal generation in DMA mode on the complementary
bogdanm	0:9b334a45a8ff	1212	* output
bogdanm	0:9b334a45a8ff	1213	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	1214	* the configuration information for TIM module.
bogdanm	0:9b334a45a8ff	1215	* @param Channel: TIM Channel to be disabled.
bogdanm	0:9b334a45a8ff	1216	* This parameter can be one of the following values:
bogdanm	0:9b334a45a8ff	1217	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
bogdanm	0:9b334a45a8ff	1218	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
bogdanm	0:9b334a45a8ff	1219	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
bogdanm	0:9b334a45a8ff	1220	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
bogdanm	0:9b334a45a8ff	1221	* @retval HAL status
bogdanm	0:9b334a45a8ff	1222	*/
bogdanm	0:9b334a45a8ff	1223	HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
bogdanm	0:9b334a45a8ff	1224	{
bogdanm	0:9b334a45a8ff	1225	/* Check the parameters */
bogdanm	0:9b334a45a8ff	1226	assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
bogdanm	0:9b334a45a8ff	1227
bogdanm	0:9b334a45a8ff	1228	switch (Channel)
bogdanm	0:9b334a45a8ff	1229	{
bogdanm	0:9b334a45a8ff	1230	case TIM_CHANNEL_1:
bogdanm	0:9b334a45a8ff	1231	{
bogdanm	0:9b334a45a8ff	1232	/* Disable the TIM Capture/Compare 1 DMA request */
bogdanm	0:9b334a45a8ff	1233	__HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
bogdanm	0:9b334a45a8ff	1234	}
bogdanm	0:9b334a45a8ff	1235	break;
bogdanm	0:9b334a45a8ff	1236
bogdanm	0:9b334a45a8ff	1237	case TIM_CHANNEL_2:
bogdanm	0:9b334a45a8ff	1238	{
bogdanm	0:9b334a45a8ff	1239	/* Disable the TIM Capture/Compare 2 DMA request */
bogdanm	0:9b334a45a8ff	1240	__HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
bogdanm	0:9b334a45a8ff	1241	}
bogdanm	0:9b334a45a8ff	1242	break;
bogdanm	0:9b334a45a8ff	1243
bogdanm	0:9b334a45a8ff	1244	case TIM_CHANNEL_3:
bogdanm	0:9b334a45a8ff	1245	{
bogdanm	0:9b334a45a8ff	1246	/* Disable the TIM Capture/Compare 3 DMA request */
bogdanm	0:9b334a45a8ff	1247	__HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3);
bogdanm	0:9b334a45a8ff	1248	}
bogdanm	0:9b334a45a8ff	1249	break;
bogdanm	0:9b334a45a8ff	1250
bogdanm	0:9b334a45a8ff	1251	case TIM_CHANNEL_4:
bogdanm	0:9b334a45a8ff	1252	{
bogdanm	0:9b334a45a8ff	1253	/* Disable the TIM Capture/Compare 4 DMA request */
bogdanm	0:9b334a45a8ff	1254	__HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC4);
bogdanm	0:9b334a45a8ff	1255	}
bogdanm	0:9b334a45a8ff	1256	break;
bogdanm	0:9b334a45a8ff	1257
bogdanm	0:9b334a45a8ff	1258	default:
bogdanm	0:9b334a45a8ff	1259	break;
bogdanm	0:9b334a45a8ff	1260	}
bogdanm	0:9b334a45a8ff	1261
bogdanm	0:9b334a45a8ff	1262	/* Disable the complementary PWM output */
bogdanm	0:9b334a45a8ff	1263	TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
bogdanm	0:9b334a45a8ff	1264
bogdanm	0:9b334a45a8ff	1265	/* Disable the Main Output */
bogdanm	0:9b334a45a8ff	1266	__HAL_TIM_MOE_DISABLE(htim);
bogdanm	0:9b334a45a8ff	1267
bogdanm	0:9b334a45a8ff	1268	/* Disable the Peripheral */
bogdanm	0:9b334a45a8ff	1269	__HAL_TIM_DISABLE(htim);
bogdanm	0:9b334a45a8ff	1270
bogdanm	0:9b334a45a8ff	1271	/* Change the htim state */
bogdanm	0:9b334a45a8ff	1272	htim->State = HAL_TIM_STATE_READY;
bogdanm	0:9b334a45a8ff	1273
bogdanm	0:9b334a45a8ff	1274	/* Return function status */
bogdanm	0:9b334a45a8ff	1275	return HAL_OK;
bogdanm	0:9b334a45a8ff	1276	}
bogdanm	0:9b334a45a8ff	1277
bogdanm	0:9b334a45a8ff	1278	/**
bogdanm	0:9b334a45a8ff	1279	* @}
bogdanm	0:9b334a45a8ff	1280	*/
bogdanm	0:9b334a45a8ff	1281
bogdanm	0:9b334a45a8ff	1282	/** @defgroup TIMEx_Exported_Functions_Group4 Timer Complementary One Pulse functions
bogdanm	0:9b334a45a8ff	1283	* @brief Timer Complementary One Pulse functions
bogdanm	0:9b334a45a8ff	1284	*
bogdanm	0:9b334a45a8ff	1285	@verbatim
bogdanm	0:9b334a45a8ff	1286	==============================================================================
bogdanm	0:9b334a45a8ff	1287	##### Timer Complementary One Pulse functions #####
bogdanm	0:9b334a45a8ff	1288	==============================================================================
bogdanm	0:9b334a45a8ff	1289	[..]
bogdanm	0:9b334a45a8ff	1290	This section provides functions allowing to:
bogdanm	0:9b334a45a8ff	1291	(+) Start the Complementary One Pulse generation.
bogdanm	0:9b334a45a8ff	1292	(+) Stop the Complementary One Pulse.
bogdanm	0:9b334a45a8ff	1293	(+) Start the Complementary One Pulse and enable interrupts.
bogdanm	0:9b334a45a8ff	1294	(+) Stop the Complementary One Pulse and disable interrupts.
bogdanm	0:9b334a45a8ff	1295
bogdanm	0:9b334a45a8ff	1296	@endverbatim
bogdanm	0:9b334a45a8ff	1297	* @{
bogdanm	0:9b334a45a8ff	1298	*/
bogdanm	0:9b334a45a8ff	1299
bogdanm	0:9b334a45a8ff	1300	/**
bogdanm	0:9b334a45a8ff	1301	* @brief Starts the TIM One Pulse signal generation on the complementary
bogdanm	0:9b334a45a8ff	1302	* output.
bogdanm	0:9b334a45a8ff	1303	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	1304	* the configuration information for TIM module.
bogdanm	0:9b334a45a8ff	1305	* @param OutputChannel: TIM Channel to be enabled.
bogdanm	0:9b334a45a8ff	1306	* This parameter can be one of the following values:
bogdanm	0:9b334a45a8ff	1307	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
bogdanm	0:9b334a45a8ff	1308	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
bogdanm	0:9b334a45a8ff	1309	* @retval HAL status
bogdanm	0:9b334a45a8ff	1310	*/
bogdanm	0:9b334a45a8ff	1311	HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
bogdanm	0:9b334a45a8ff	1312	{
bogdanm	0:9b334a45a8ff	1313	/* Check the parameters */
bogdanm	0:9b334a45a8ff	1314	assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
bogdanm	0:9b334a45a8ff	1315
bogdanm	0:9b334a45a8ff	1316	/* Enable the complementary One Pulse output */
bogdanm	0:9b334a45a8ff	1317	TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_ENABLE);
bogdanm	0:9b334a45a8ff	1318
bogdanm	0:9b334a45a8ff	1319	/* Enable the Main Output */
bogdanm	0:9b334a45a8ff	1320	__HAL_TIM_MOE_ENABLE(htim);
bogdanm	0:9b334a45a8ff	1321
bogdanm	0:9b334a45a8ff	1322	/* Return function status */
bogdanm	0:9b334a45a8ff	1323	return HAL_OK;
bogdanm	0:9b334a45a8ff	1324	}
bogdanm	0:9b334a45a8ff	1325
bogdanm	0:9b334a45a8ff	1326	/**
bogdanm	0:9b334a45a8ff	1327	* @brief Stops the TIM One Pulse signal generation on the complementary
bogdanm	0:9b334a45a8ff	1328	* output.
bogdanm	0:9b334a45a8ff	1329	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	1330	* the configuration information for TIM module.
bogdanm	0:9b334a45a8ff	1331	* @param OutputChannel: TIM Channel to be disabled.
bogdanm	0:9b334a45a8ff	1332	* This parameter can be one of the following values:
bogdanm	0:9b334a45a8ff	1333	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
bogdanm	0:9b334a45a8ff	1334	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
bogdanm	0:9b334a45a8ff	1335	* @retval HAL status
bogdanm	0:9b334a45a8ff	1336	*/
bogdanm	0:9b334a45a8ff	1337	HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
bogdanm	0:9b334a45a8ff	1338	{
bogdanm	0:9b334a45a8ff	1339
bogdanm	0:9b334a45a8ff	1340	/* Check the parameters */
bogdanm	0:9b334a45a8ff	1341	assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
bogdanm	0:9b334a45a8ff	1342
bogdanm	0:9b334a45a8ff	1343	/* Disable the complementary One Pulse output */
bogdanm	0:9b334a45a8ff	1344	TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_DISABLE);
bogdanm	0:9b334a45a8ff	1345
bogdanm	0:9b334a45a8ff	1346	/* Disable the Main Output */
bogdanm	0:9b334a45a8ff	1347	__HAL_TIM_MOE_DISABLE(htim);
bogdanm	0:9b334a45a8ff	1348
bogdanm	0:9b334a45a8ff	1349	/* Disable the Peripheral */
bogdanm	0:9b334a45a8ff	1350	__HAL_TIM_DISABLE(htim);
bogdanm	0:9b334a45a8ff	1351
bogdanm	0:9b334a45a8ff	1352	/* Return function status */
bogdanm	0:9b334a45a8ff	1353	return HAL_OK;
bogdanm	0:9b334a45a8ff	1354	}
bogdanm	0:9b334a45a8ff	1355
bogdanm	0:9b334a45a8ff	1356	/**
bogdanm	0:9b334a45a8ff	1357	* @brief Starts the TIM One Pulse signal generation in interrupt mode on the
bogdanm	0:9b334a45a8ff	1358	* complementary channel.
bogdanm	0:9b334a45a8ff	1359	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	1360	* the configuration information for TIM module.
bogdanm	0:9b334a45a8ff	1361	* @param OutputChannel: TIM Channel to be enabled.
bogdanm	0:9b334a45a8ff	1362	* This parameter can be one of the following values:
bogdanm	0:9b334a45a8ff	1363	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
bogdanm	0:9b334a45a8ff	1364	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
bogdanm	0:9b334a45a8ff	1365	* @retval HAL status
bogdanm	0:9b334a45a8ff	1366	*/
bogdanm	0:9b334a45a8ff	1367	HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
bogdanm	0:9b334a45a8ff	1368	{
bogdanm	0:9b334a45a8ff	1369	/* Check the parameters */
bogdanm	0:9b334a45a8ff	1370	assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
bogdanm	0:9b334a45a8ff	1371
bogdanm	0:9b334a45a8ff	1372	/* Enable the TIM Capture/Compare 1 interrupt */
bogdanm	0:9b334a45a8ff	1373	__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
bogdanm	0:9b334a45a8ff	1374
bogdanm	0:9b334a45a8ff	1375	/* Enable the TIM Capture/Compare 2 interrupt */
bogdanm	0:9b334a45a8ff	1376	__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
bogdanm	0:9b334a45a8ff	1377
bogdanm	0:9b334a45a8ff	1378	/* Enable the complementary One Pulse output */
bogdanm	0:9b334a45a8ff	1379	TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_ENABLE);
bogdanm	0:9b334a45a8ff	1380
bogdanm	0:9b334a45a8ff	1381	/* Enable the Main Output */
bogdanm	0:9b334a45a8ff	1382	__HAL_TIM_MOE_ENABLE(htim);
bogdanm	0:9b334a45a8ff	1383
bogdanm	0:9b334a45a8ff	1384	/* Return function status */
bogdanm	0:9b334a45a8ff	1385	return HAL_OK;
bogdanm	0:9b334a45a8ff	1386	}
bogdanm	0:9b334a45a8ff	1387
bogdanm	0:9b334a45a8ff	1388	/**
bogdanm	0:9b334a45a8ff	1389	* @brief Stops the TIM One Pulse signal generation in interrupt mode on the
bogdanm	0:9b334a45a8ff	1390	* complementary channel.
bogdanm	0:9b334a45a8ff	1391	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	1392	* the configuration information for TIM module.
bogdanm	0:9b334a45a8ff	1393	* @param OutputChannel: TIM Channel to be disabled.
bogdanm	0:9b334a45a8ff	1394	* This parameter can be one of the following values:
bogdanm	0:9b334a45a8ff	1395	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
bogdanm	0:9b334a45a8ff	1396	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
bogdanm	0:9b334a45a8ff	1397	* @retval HAL status
bogdanm	0:9b334a45a8ff	1398	*/
bogdanm	0:9b334a45a8ff	1399	HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
bogdanm	0:9b334a45a8ff	1400	{
bogdanm	0:9b334a45a8ff	1401	/* Check the parameters */
bogdanm	0:9b334a45a8ff	1402	assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
bogdanm	0:9b334a45a8ff	1403
bogdanm	0:9b334a45a8ff	1404	/* Disable the TIM Capture/Compare 1 interrupt */
bogdanm	0:9b334a45a8ff	1405	__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
bogdanm	0:9b334a45a8ff	1406
bogdanm	0:9b334a45a8ff	1407	/* Disable the TIM Capture/Compare 2 interrupt */
bogdanm	0:9b334a45a8ff	1408	__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
bogdanm	0:9b334a45a8ff	1409
bogdanm	0:9b334a45a8ff	1410	/* Disable the complementary One Pulse output */
bogdanm	0:9b334a45a8ff	1411	TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_DISABLE);
bogdanm	0:9b334a45a8ff	1412
bogdanm	0:9b334a45a8ff	1413	/* Disable the Main Output */
bogdanm	0:9b334a45a8ff	1414	__HAL_TIM_MOE_DISABLE(htim);
bogdanm	0:9b334a45a8ff	1415
bogdanm	0:9b334a45a8ff	1416	/* Disable the Peripheral */
bogdanm	0:9b334a45a8ff	1417	__HAL_TIM_DISABLE(htim);
bogdanm	0:9b334a45a8ff	1418
bogdanm	0:9b334a45a8ff	1419	/* Return function status */
bogdanm	0:9b334a45a8ff	1420	return HAL_OK;
bogdanm	0:9b334a45a8ff	1421	}
bogdanm	0:9b334a45a8ff	1422	/**
bogdanm	0:9b334a45a8ff	1423	* @}
bogdanm	0:9b334a45a8ff	1424	*/
bogdanm	0:9b334a45a8ff	1425
bogdanm	0:9b334a45a8ff	1426	/** @defgroup TIMEx_Exported_Functions_Group5 Peripheral Control functions
bogdanm	0:9b334a45a8ff	1427	* @brief Peripheral Control functions
bogdanm	0:9b334a45a8ff	1428	*
bogdanm	0:9b334a45a8ff	1429	@verbatim
bogdanm	0:9b334a45a8ff	1430	==============================================================================
bogdanm	0:9b334a45a8ff	1431	##### Peripheral Control functions #####
bogdanm	0:9b334a45a8ff	1432	==============================================================================
bogdanm	0:9b334a45a8ff	1433	[..]
bogdanm	0:9b334a45a8ff	1434	This section provides functions allowing to:
bogdanm	0:9b334a45a8ff	1435	(+) Configure The Input Output channels for OC, PWM, IC or One Pulse mode.
bogdanm	0:9b334a45a8ff	1436	(+) Configure External Clock source.
bogdanm	0:9b334a45a8ff	1437	(+) Configure Complementary channels, break features and dead time.
bogdanm	0:9b334a45a8ff	1438	(+) Configure Master and the Slave synchronization.
bogdanm	0:9b334a45a8ff	1439	(+) Configure the commutation event in case of use of the Hall sensor interface.
bogdanm	0:9b334a45a8ff	1440	(+) Configure the DMA Burst Mode.
bogdanm	0:9b334a45a8ff	1441
bogdanm	0:9b334a45a8ff	1442	@endverbatim
bogdanm	0:9b334a45a8ff	1443	* @{
bogdanm	0:9b334a45a8ff	1444	*/
bogdanm	0:9b334a45a8ff	1445	/**
bogdanm	0:9b334a45a8ff	1446	* @brief Configure the TIM commutation event sequence.
bogdanm	0:9b334a45a8ff	1447	* @note This function is mandatory to use the commutation event in order to
bogdanm	0:9b334a45a8ff	1448	* update the configuration at each commutation detection on the TRGI input of the Timer,
bogdanm	0:9b334a45a8ff	1449	* the typical use of this feature is with the use of another Timer(interface Timer)
bogdanm	0:9b334a45a8ff	1450	* configured in Hall sensor interface, this interface Timer will generate the
bogdanm	0:9b334a45a8ff	1451	* commutation at its TRGO output (connected to Timer used in this function) each time
bogdanm	0:9b334a45a8ff	1452	* the TI1 of the Interface Timer detect a commutation at its input TI1.
bogdanm	0:9b334a45a8ff	1453	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	1454	* the configuration information for TIM module.
bogdanm	0:9b334a45a8ff	1455	* @param InputTrigger: the Internal trigger corresponding to the Timer Interfacing with the Hall sensor.
bogdanm	0:9b334a45a8ff	1456	* This parameter can be one of the following values:
bogdanm	0:9b334a45a8ff	1457	* @arg TIM_TS_ITR0: Internal trigger 0 selected
bogdanm	0:9b334a45a8ff	1458	* @arg TIM_TS_ITR1: Internal trigger 1 selected
bogdanm	0:9b334a45a8ff	1459	* @arg TIM_TS_ITR2: Internal trigger 2 selected
bogdanm	0:9b334a45a8ff	1460	* @arg TIM_TS_ITR3: Internal trigger 3 selected
bogdanm	0:9b334a45a8ff	1461	* @arg TIM_TS_NONE: No trigger is needed
bogdanm	0:9b334a45a8ff	1462	* @param CommutationSource: the Commutation Event source.
bogdanm	0:9b334a45a8ff	1463	* This parameter can be one of the following values:
bogdanm	0:9b334a45a8ff	1464	* @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer
bogdanm	0:9b334a45a8ff	1465	* @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit
bogdanm	0:9b334a45a8ff	1466	* @retval HAL status
bogdanm	0:9b334a45a8ff	1467	*/
bogdanm	0:9b334a45a8ff	1468	HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource)
bogdanm	0:9b334a45a8ff	1469	{
bogdanm	0:9b334a45a8ff	1470	/* Check the parameters */
bogdanm	0:9b334a45a8ff	1471	assert_param(IS_TIM_ADVANCED_INSTANCE(htim->Instance));
bogdanm	0:9b334a45a8ff	1472	assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger));
bogdanm	0:9b334a45a8ff	1473
bogdanm	0:9b334a45a8ff	1474	__HAL_LOCK(htim);
bogdanm	0:9b334a45a8ff	1475
bogdanm	0:9b334a45a8ff	1476	if ((InputTrigger == TIM_TS_ITR0) \|\| (InputTrigger == TIM_TS_ITR1) \|\|
bogdanm	0:9b334a45a8ff	1477	(InputTrigger == TIM_TS_ITR2) \|\| (InputTrigger == TIM_TS_ITR3))
bogdanm	0:9b334a45a8ff	1478	{
bogdanm	0:9b334a45a8ff	1479	/* Select the Input trigger */
bogdanm	0:9b334a45a8ff	1480	htim->Instance->SMCR &= ~TIM_SMCR_TS;
bogdanm	0:9b334a45a8ff	1481	htim->Instance->SMCR \|= InputTrigger;
bogdanm	0:9b334a45a8ff	1482	}
bogdanm	0:9b334a45a8ff	1483
bogdanm	0:9b334a45a8ff	1484	/* Select the Capture Compare preload feature */
bogdanm	0:9b334a45a8ff	1485	htim->Instance->CR2 \|= TIM_CR2_CCPC;
bogdanm	0:9b334a45a8ff	1486	/* Select the Commutation event source */
bogdanm	0:9b334a45a8ff	1487	htim->Instance->CR2 &= ~TIM_CR2_CCUS;
bogdanm	0:9b334a45a8ff	1488	htim->Instance->CR2 \|= CommutationSource;
bogdanm	0:9b334a45a8ff	1489
bogdanm	0:9b334a45a8ff	1490	__HAL_UNLOCK(htim);
bogdanm	0:9b334a45a8ff	1491
bogdanm	0:9b334a45a8ff	1492	return HAL_OK;
bogdanm	0:9b334a45a8ff	1493	}
bogdanm	0:9b334a45a8ff	1494
bogdanm	0:9b334a45a8ff	1495	/**
bogdanm	0:9b334a45a8ff	1496	* @brief Configure the TIM commutation event sequence with interrupt.
bogdanm	0:9b334a45a8ff	1497	* @note This function is mandatory to use the commutation event in order to
bogdanm	0:9b334a45a8ff	1498	* update the configuration at each commutation detection on the TRGI input of the Timer,
bogdanm	0:9b334a45a8ff	1499	* the typical use of this feature is with the use of another Timer(interface Timer)
bogdanm	0:9b334a45a8ff	1500	* configured in Hall sensor interface, this interface Timer will generate the
bogdanm	0:9b334a45a8ff	1501	* commutation at its TRGO output (connected to Timer used in this function) each time
bogdanm	0:9b334a45a8ff	1502	* the TI1 of the Interface Timer detect a commutation at its input TI1.
bogdanm	0:9b334a45a8ff	1503	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	1504	* the configuration information for TIM module.
bogdanm	0:9b334a45a8ff	1505	* @param InputTrigger: the Internal trigger corresponding to the Timer Interfacing with the Hall sensor.
bogdanm	0:9b334a45a8ff	1506	* This parameter can be one of the following values:
bogdanm	0:9b334a45a8ff	1507	* @arg TIM_TS_ITR0: Internal trigger 0 selected
bogdanm	0:9b334a45a8ff	1508	* @arg TIM_TS_ITR1: Internal trigger 1 selected
bogdanm	0:9b334a45a8ff	1509	* @arg TIM_TS_ITR2: Internal trigger 2 selected
bogdanm	0:9b334a45a8ff	1510	* @arg TIM_TS_ITR3: Internal trigger 3 selected
bogdanm	0:9b334a45a8ff	1511	* @arg TIM_TS_NONE: No trigger is needed
bogdanm	0:9b334a45a8ff	1512	* @param CommutationSource: the Commutation Event source.
bogdanm	0:9b334a45a8ff	1513	* This parameter can be one of the following values:
bogdanm	0:9b334a45a8ff	1514	* @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer
bogdanm	0:9b334a45a8ff	1515	* @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit
bogdanm	0:9b334a45a8ff	1516	* @retval HAL status
bogdanm	0:9b334a45a8ff	1517	*/
bogdanm	0:9b334a45a8ff	1518	HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_IT(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource)
bogdanm	0:9b334a45a8ff	1519	{
bogdanm	0:9b334a45a8ff	1520	/* Check the parameters */
bogdanm	0:9b334a45a8ff	1521	assert_param(IS_TIM_ADVANCED_INSTANCE(htim->Instance));
bogdanm	0:9b334a45a8ff	1522	assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger));
bogdanm	0:9b334a45a8ff	1523
bogdanm	0:9b334a45a8ff	1524	__HAL_LOCK(htim);
bogdanm	0:9b334a45a8ff	1525
bogdanm	0:9b334a45a8ff	1526	if ((InputTrigger == TIM_TS_ITR0) \|\| (InputTrigger == TIM_TS_ITR1) \|\|
bogdanm	0:9b334a45a8ff	1527	(InputTrigger == TIM_TS_ITR2) \|\| (InputTrigger == TIM_TS_ITR3))
bogdanm	0:9b334a45a8ff	1528	{
bogdanm	0:9b334a45a8ff	1529	/* Select the Input trigger */
bogdanm	0:9b334a45a8ff	1530	htim->Instance->SMCR &= ~TIM_SMCR_TS;
bogdanm	0:9b334a45a8ff	1531	htim->Instance->SMCR \|= InputTrigger;
bogdanm	0:9b334a45a8ff	1532	}
bogdanm	0:9b334a45a8ff	1533
bogdanm	0:9b334a45a8ff	1534	/* Select the Capture Compare preload feature */
bogdanm	0:9b334a45a8ff	1535	htim->Instance->CR2 \|= TIM_CR2_CCPC;
bogdanm	0:9b334a45a8ff	1536	/* Select the Commutation event source */
bogdanm	0:9b334a45a8ff	1537	htim->Instance->CR2 &= ~TIM_CR2_CCUS;
bogdanm	0:9b334a45a8ff	1538	htim->Instance->CR2 \|= CommutationSource;
bogdanm	0:9b334a45a8ff	1539
bogdanm	0:9b334a45a8ff	1540	/* Enable the Commutation Interrupt Request */
bogdanm	0:9b334a45a8ff	1541	__HAL_TIM_ENABLE_IT(htim, TIM_IT_COM);
bogdanm	0:9b334a45a8ff	1542
bogdanm	0:9b334a45a8ff	1543	__HAL_UNLOCK(htim);
bogdanm	0:9b334a45a8ff	1544
bogdanm	0:9b334a45a8ff	1545	return HAL_OK;
bogdanm	0:9b334a45a8ff	1546	}
bogdanm	0:9b334a45a8ff	1547
bogdanm	0:9b334a45a8ff	1548	/**
bogdanm	0:9b334a45a8ff	1549	* @brief Configure the TIM commutation event sequence with DMA.
bogdanm	0:9b334a45a8ff	1550	* @note This function is mandatory to use the commutation event in order to
bogdanm	0:9b334a45a8ff	1551	* update the configuration at each commutation detection on the TRGI input of the Timer,
bogdanm	0:9b334a45a8ff	1552	* the typical use of this feature is with the use of another Timer(interface Timer)
bogdanm	0:9b334a45a8ff	1553	* configured in Hall sensor interface, this interface Timer will generate the
bogdanm	0:9b334a45a8ff	1554	* commutation at its TRGO output (connected to Timer used in this function) each time
bogdanm	0:9b334a45a8ff	1555	* the TI1 of the Interface Timer detect a commutation at its input TI1.
bogdanm	0:9b334a45a8ff	1556	* @note: The user should configure the DMA in his own software, in This function only the COMDE bit is set
bogdanm	0:9b334a45a8ff	1557	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	1558	* the configuration information for TIM module.
bogdanm	0:9b334a45a8ff	1559	* @param InputTrigger: the Internal trigger corresponding to the Timer Interfacing with the Hall sensor.
bogdanm	0:9b334a45a8ff	1560	* This parameter can be one of the following values:
bogdanm	0:9b334a45a8ff	1561	* @arg TIM_TS_ITR0: Internal trigger 0 selected
bogdanm	0:9b334a45a8ff	1562	* @arg TIM_TS_ITR1: Internal trigger 1 selected
bogdanm	0:9b334a45a8ff	1563	* @arg TIM_TS_ITR2: Internal trigger 2 selected
bogdanm	0:9b334a45a8ff	1564	* @arg TIM_TS_ITR3: Internal trigger 3 selected
bogdanm	0:9b334a45a8ff	1565	* @arg TIM_TS_NONE: No trigger is needed
bogdanm	0:9b334a45a8ff	1566	* @param CommutationSource: the Commutation Event source.
bogdanm	0:9b334a45a8ff	1567	* This parameter can be one of the following values:
bogdanm	0:9b334a45a8ff	1568	* @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer
bogdanm	0:9b334a45a8ff	1569	* @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit
bogdanm	0:9b334a45a8ff	1570	* @retval HAL status
bogdanm	0:9b334a45a8ff	1571	*/
bogdanm	0:9b334a45a8ff	1572	HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_DMA(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource)
bogdanm	0:9b334a45a8ff	1573	{
bogdanm	0:9b334a45a8ff	1574	/* Check the parameters */
bogdanm	0:9b334a45a8ff	1575	assert_param(IS_TIM_ADVANCED_INSTANCE(htim->Instance));
bogdanm	0:9b334a45a8ff	1576	assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger));
bogdanm	0:9b334a45a8ff	1577
bogdanm	0:9b334a45a8ff	1578	__HAL_LOCK(htim);
bogdanm	0:9b334a45a8ff	1579
bogdanm	0:9b334a45a8ff	1580	if ((InputTrigger == TIM_TS_ITR0) \|\| (InputTrigger == TIM_TS_ITR1) \|\|
bogdanm	0:9b334a45a8ff	1581	(InputTrigger == TIM_TS_ITR2) \|\| (InputTrigger == TIM_TS_ITR3))
bogdanm	0:9b334a45a8ff	1582	{
bogdanm	0:9b334a45a8ff	1583	/* Select the Input trigger */
bogdanm	0:9b334a45a8ff	1584	htim->Instance->SMCR &= ~TIM_SMCR_TS;
bogdanm	0:9b334a45a8ff	1585	htim->Instance->SMCR \|= InputTrigger;
bogdanm	0:9b334a45a8ff	1586	}
bogdanm	0:9b334a45a8ff	1587
bogdanm	0:9b334a45a8ff	1588	/* Select the Capture Compare preload feature */
bogdanm	0:9b334a45a8ff	1589	htim->Instance->CR2 \|= TIM_CR2_CCPC;
bogdanm	0:9b334a45a8ff	1590	/* Select the Commutation event source */
bogdanm	0:9b334a45a8ff	1591	htim->Instance->CR2 &= ~TIM_CR2_CCUS;
bogdanm	0:9b334a45a8ff	1592	htim->Instance->CR2 \|= CommutationSource;
bogdanm	0:9b334a45a8ff	1593
bogdanm	0:9b334a45a8ff	1594	/* Enable the Commutation DMA Request */
bogdanm	0:9b334a45a8ff	1595	/* Set the DMA Commutation Callback */
bogdanm	0:9b334a45a8ff	1596	htim->hdma[TIM_DMA_ID_COMMUTATION]->XferCpltCallback = TIMEx_DMACommutationCplt;
bogdanm	0:9b334a45a8ff	1597	/* Set the DMA error callback */
bogdanm	0:9b334a45a8ff	1598	htim->hdma[TIM_DMA_ID_COMMUTATION]->XferErrorCallback = TIM_DMAError;
bogdanm	0:9b334a45a8ff	1599
bogdanm	0:9b334a45a8ff	1600	/* Enable the Commutation DMA Request */
bogdanm	0:9b334a45a8ff	1601	__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_COM);
bogdanm	0:9b334a45a8ff	1602
bogdanm	0:9b334a45a8ff	1603	__HAL_UNLOCK(htim);
bogdanm	0:9b334a45a8ff	1604
bogdanm	0:9b334a45a8ff	1605	return HAL_OK;
bogdanm	0:9b334a45a8ff	1606	}
bogdanm	0:9b334a45a8ff	1607
bogdanm	0:9b334a45a8ff	1608	/**
bogdanm	0:9b334a45a8ff	1609	* @brief Configures the TIM in master mode.
bogdanm	0:9b334a45a8ff	1610	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	1611	* the configuration information for TIM module.
bogdanm	0:9b334a45a8ff	1612	* @param sMasterConfig: pointer to a TIM_MasterConfigTypeDef structure that
bogdanm	0:9b334a45a8ff	1613	* contains the selected trigger output (TRGO) and the Master/Slave
bogdanm	0:9b334a45a8ff	1614	* mode.
bogdanm	0:9b334a45a8ff	1615	* @retval HAL status
bogdanm	0:9b334a45a8ff	1616	*/
bogdanm	0:9b334a45a8ff	1617	HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef htim, TIM_MasterConfigTypeDef sMasterConfig)
bogdanm	0:9b334a45a8ff	1618	{
bogdanm	0:9b334a45a8ff	1619	/* Check the parameters */
bogdanm	0:9b334a45a8ff	1620	assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance));
bogdanm	0:9b334a45a8ff	1621	assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger));
bogdanm	0:9b334a45a8ff	1622	assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode));
bogdanm	0:9b334a45a8ff	1623
bogdanm	0:9b334a45a8ff	1624	__HAL_LOCK(htim);
bogdanm	0:9b334a45a8ff	1625
bogdanm	0:9b334a45a8ff	1626	htim->State = HAL_TIM_STATE_BUSY;
bogdanm	0:9b334a45a8ff	1627
bogdanm	0:9b334a45a8ff	1628	/* Reset the MMS Bits */
bogdanm	0:9b334a45a8ff	1629	htim->Instance->CR2 &= ~TIM_CR2_MMS;
bogdanm	0:9b334a45a8ff	1630	/* Select the TRGO source */
bogdanm	0:9b334a45a8ff	1631	htim->Instance->CR2 \|= sMasterConfig->MasterOutputTrigger;
bogdanm	0:9b334a45a8ff	1632
bogdanm	0:9b334a45a8ff	1633	/* Reset the MSM Bit */
bogdanm	0:9b334a45a8ff	1634	htim->Instance->SMCR &= ~TIM_SMCR_MSM;
bogdanm	0:9b334a45a8ff	1635	/* Set or Reset the MSM Bit */
bogdanm	0:9b334a45a8ff	1636	htim->Instance->SMCR \|= sMasterConfig->MasterSlaveMode;
bogdanm	0:9b334a45a8ff	1637
bogdanm	0:9b334a45a8ff	1638	htim->State = HAL_TIM_STATE_READY;
bogdanm	0:9b334a45a8ff	1639
bogdanm	0:9b334a45a8ff	1640	__HAL_UNLOCK(htim);
bogdanm	0:9b334a45a8ff	1641
bogdanm	0:9b334a45a8ff	1642	return HAL_OK;
bogdanm	0:9b334a45a8ff	1643	}
bogdanm	0:9b334a45a8ff	1644
bogdanm	0:9b334a45a8ff	1645	/**
bogdanm	0:9b334a45a8ff	1646	* @brief Configures the Break feature, dead time, Lock level, OSSI/OSSR State
bogdanm	0:9b334a45a8ff	1647	* and the AOE(automatic output enable).
bogdanm	0:9b334a45a8ff	1648	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	1649	* the configuration information for TIM module.
bogdanm	0:9b334a45a8ff	1650	* @param sBreakDeadTimeConfig: pointer to a TIM_ConfigBreakDeadConfig_TypeDef structure that
bogdanm	0:9b334a45a8ff	1651	* contains the BDTR Register configuration information for the TIM peripheral.
bogdanm	0:9b334a45a8ff	1652	* @retval HAL status
bogdanm	0:9b334a45a8ff	1653	*/
bogdanm	0:9b334a45a8ff	1654	HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim,
bogdanm	0:9b334a45a8ff	1655	TIM_BreakDeadTimeConfigTypeDef * sBreakDeadTimeConfig)
bogdanm	0:9b334a45a8ff	1656	{
bogdanm	0:9b334a45a8ff	1657	/* Check the parameters */
bogdanm	0:9b334a45a8ff	1658	assert_param(IS_TIM_CC4_INSTANCE(htim->Instance));
bogdanm	0:9b334a45a8ff	1659	assert_param(IS_TIM_OSSR_STATE(sBreakDeadTimeConfig->OffStateRunMode));
bogdanm	0:9b334a45a8ff	1660	assert_param(IS_TIM_OSSI_STATE(sBreakDeadTimeConfig->OffStateIDLEMode));
bogdanm	0:9b334a45a8ff	1661	assert_param(IS_TIM_LOCK_LEVEL(sBreakDeadTimeConfig->LockLevel));
bogdanm	0:9b334a45a8ff	1662	assert_param(IS_TIM_BREAK_STATE(sBreakDeadTimeConfig->BreakState));
bogdanm	0:9b334a45a8ff	1663	assert_param(IS_TIM_BREAK_POLARITY(sBreakDeadTimeConfig->BreakPolarity));
bogdanm	0:9b334a45a8ff	1664	assert_param(IS_TIM_AUTOMATIC_OUTPUT_STATE(sBreakDeadTimeConfig->AutomaticOutput));
bogdanm	0:9b334a45a8ff	1665	assert_param(IS_TIM_DEADTIME(sBreakDeadTimeConfig->DeadTime));
bogdanm	0:9b334a45a8ff	1666
bogdanm	0:9b334a45a8ff	1667	/* Process Locked */
bogdanm	0:9b334a45a8ff	1668	__HAL_LOCK(htim);
bogdanm	0:9b334a45a8ff	1669
bogdanm	0:9b334a45a8ff	1670	htim->State = HAL_TIM_STATE_BUSY;
bogdanm	0:9b334a45a8ff	1671
bogdanm	0:9b334a45a8ff	1672	/* Set the Lock level, the Break enable Bit and the Polarity, the OSSR State,
bogdanm	0:9b334a45a8ff	1673	the OSSI State, the dead time value and the Automatic Output Enable Bit */
bogdanm	0:9b334a45a8ff	1674	htim->Instance->BDTR = (uint32_t)sBreakDeadTimeConfig->OffStateRunMode \|
bogdanm	0:9b334a45a8ff	1675	sBreakDeadTimeConfig->OffStateIDLEMode \|
bogdanm	0:9b334a45a8ff	1676	sBreakDeadTimeConfig->LockLevel \|
bogdanm	0:9b334a45a8ff	1677	sBreakDeadTimeConfig->DeadTime \|
bogdanm	0:9b334a45a8ff	1678	sBreakDeadTimeConfig->BreakState \|
bogdanm	0:9b334a45a8ff	1679	sBreakDeadTimeConfig->BreakPolarity \|
bogdanm	0:9b334a45a8ff	1680	sBreakDeadTimeConfig->AutomaticOutput;
bogdanm	0:9b334a45a8ff	1681
bogdanm	0:9b334a45a8ff	1682
bogdanm	0:9b334a45a8ff	1683	htim->State = HAL_TIM_STATE_READY;
bogdanm	0:9b334a45a8ff	1684
bogdanm	0:9b334a45a8ff	1685	__HAL_UNLOCK(htim);
bogdanm	0:9b334a45a8ff	1686
bogdanm	0:9b334a45a8ff	1687	return HAL_OK;
bogdanm	0:9b334a45a8ff	1688	}
bogdanm	0:9b334a45a8ff	1689
bogdanm	0:9b334a45a8ff	1690	/**
bogdanm	0:9b334a45a8ff	1691	* @brief Configures the TIM2, TIM5 and TIM11 Remapping input capabilities.
bogdanm	0:9b334a45a8ff	1692	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	1693	* the configuration information for TIM module.
bogdanm	0:9b334a45a8ff	1694	* @param Remap: specifies the TIM input remapping source.
bogdanm	0:9b334a45a8ff	1695	* This parameter can be one of the following values:
bogdanm	0:9b334a45a8ff	1696	* @arg TIM_TIM2_TIM8_TRGO: TIM2 ITR1 input is connected to TIM8 Trigger output(default)
bogdanm	0:9b334a45a8ff	1697	* @arg TIM_TIM2_ETH_PTP: TIM2 ITR1 input is connected to ETH PTP trigger output.
bogdanm	0:9b334a45a8ff	1698	* @arg TIM_TIM2_USBFS_SOF: TIM2 ITR1 input is connected to USB FS SOF.
bogdanm	0:9b334a45a8ff	1699	* @arg TIM_TIM2_USBHS_SOF: TIM2 ITR1 input is connected to USB HS SOF.
bogdanm	0:9b334a45a8ff	1700	* @arg TIM_TIM5_GPIO: TIM5 CH4 input is connected to dedicated Timer pin(default)
bogdanm	0:9b334a45a8ff	1701	* @arg TIM_TIM5_LSI: TIM5 CH4 input is connected to LSI clock.
bogdanm	0:9b334a45a8ff	1702	* @arg TIM_TIM5_LSE: TIM5 CH4 input is connected to LSE clock.
bogdanm	0:9b334a45a8ff	1703	* @arg TIM_TIM5_RTC: TIM5 CH4 input is connected to RTC Output event.
bogdanm	0:9b334a45a8ff	1704	* @arg TIM_TIM11_GPIO: TIM11 CH4 input is connected to dedicated Timer pin(default)
bogdanm	0:9b334a45a8ff	1705	* @arg TIM_TIM11_HSE: TIM11 CH4 input is connected to HSE_RTC clock
bogdanm	0:9b334a45a8ff	1706	* (HSE divided by a programmable prescaler)
bogdanm	0:9b334a45a8ff	1707	* @retval HAL status
bogdanm	0:9b334a45a8ff	1708	*/
bogdanm	0:9b334a45a8ff	1709	HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap)
bogdanm	0:9b334a45a8ff	1710	{
bogdanm	0:9b334a45a8ff	1711	__HAL_LOCK(htim);
bogdanm	0:9b334a45a8ff	1712
bogdanm	0:9b334a45a8ff	1713	/* Check parameters */
bogdanm	0:9b334a45a8ff	1714	assert_param(IS_TIM_REMAP_INSTANCE(htim->Instance));
bogdanm	0:9b334a45a8ff	1715	assert_param(IS_TIM_REMAP(Remap));
bogdanm	0:9b334a45a8ff	1716
bogdanm	0:9b334a45a8ff	1717	/* Set the Timer remapping configuration */
bogdanm	0:9b334a45a8ff	1718	htim->Instance->OR = Remap;
bogdanm	0:9b334a45a8ff	1719
bogdanm	0:9b334a45a8ff	1720	htim->State = HAL_TIM_STATE_READY;
bogdanm	0:9b334a45a8ff	1721
bogdanm	0:9b334a45a8ff	1722	__HAL_UNLOCK(htim);
bogdanm	0:9b334a45a8ff	1723
bogdanm	0:9b334a45a8ff	1724	return HAL_OK;
bogdanm	0:9b334a45a8ff	1725	}
bogdanm	0:9b334a45a8ff	1726	/**
bogdanm	0:9b334a45a8ff	1727	* @}
bogdanm	0:9b334a45a8ff	1728	*/
bogdanm	0:9b334a45a8ff	1729
bogdanm	0:9b334a45a8ff	1730	/** @defgroup TIMEx_Exported_Functions_Group6 Extension Callbacks functions
bogdanm	0:9b334a45a8ff	1731	* @brief Extension Callbacks functions
bogdanm	0:9b334a45a8ff	1732	*
bogdanm	0:9b334a45a8ff	1733	@verbatim
bogdanm	0:9b334a45a8ff	1734	==============================================================================
bogdanm	0:9b334a45a8ff	1735	##### Extension Callbacks functions #####
bogdanm	0:9b334a45a8ff	1736	==============================================================================
bogdanm	0:9b334a45a8ff	1737	[..]
bogdanm	0:9b334a45a8ff	1738	This section provides Extension TIM callback functions:
bogdanm	0:9b334a45a8ff	1739	(+) Timer Commutation callback
bogdanm	0:9b334a45a8ff	1740	(+) Timer Break callback
bogdanm	0:9b334a45a8ff	1741
bogdanm	0:9b334a45a8ff	1742	@endverbatim
bogdanm	0:9b334a45a8ff	1743	* @{
bogdanm	0:9b334a45a8ff	1744	*/
bogdanm	0:9b334a45a8ff	1745
bogdanm	0:9b334a45a8ff	1746	/**
bogdanm	0:9b334a45a8ff	1747	* @brief Hall commutation changed callback in non blocking mode
bogdanm	0:9b334a45a8ff	1748	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	1749	* the configuration information for TIM module.
bogdanm	0:9b334a45a8ff	1750	* @retval None
bogdanm	0:9b334a45a8ff	1751	*/
bogdanm	0:9b334a45a8ff	1752	__weak void HAL_TIMEx_CommutationCallback(TIM_HandleTypeDef *htim)
bogdanm	0:9b334a45a8ff	1753	{
bogdanm	0:9b334a45a8ff	1754	/* NOTE : This function Should not be modified, when the callback is needed,
bogdanm	0:9b334a45a8ff	1755	the HAL_TIMEx_CommutationCallback could be implemented in the user file
bogdanm	0:9b334a45a8ff	1756	*/
bogdanm	0:9b334a45a8ff	1757	}
bogdanm	0:9b334a45a8ff	1758
bogdanm	0:9b334a45a8ff	1759	/**
bogdanm	0:9b334a45a8ff	1760	* @brief Hall Break detection callback in non blocking mode
bogdanm	0:9b334a45a8ff	1761	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	1762	* the configuration information for TIM module.
bogdanm	0:9b334a45a8ff	1763	* @retval None
bogdanm	0:9b334a45a8ff	1764	*/
bogdanm	0:9b334a45a8ff	1765	__weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim)
bogdanm	0:9b334a45a8ff	1766	{
bogdanm	0:9b334a45a8ff	1767	/* NOTE : This function Should not be modified, when the callback is needed,
bogdanm	0:9b334a45a8ff	1768	the HAL_TIMEx_BreakCallback could be implemented in the user file
bogdanm	0:9b334a45a8ff	1769	*/
bogdanm	0:9b334a45a8ff	1770	}
bogdanm	0:9b334a45a8ff	1771	/**
bogdanm	0:9b334a45a8ff	1772	* @}
bogdanm	0:9b334a45a8ff	1773	*/
bogdanm	0:9b334a45a8ff	1774
bogdanm	0:9b334a45a8ff	1775	/** @defgroup TIMEx_Exported_Functions_Group7 Extension Peripheral State functions
bogdanm	0:9b334a45a8ff	1776	* @brief Extension Peripheral State functions
bogdanm	0:9b334a45a8ff	1777	*
bogdanm	0:9b334a45a8ff	1778	@verbatim
bogdanm	0:9b334a45a8ff	1779	==============================================================================
bogdanm	0:9b334a45a8ff	1780	##### Extension Peripheral State functions #####
bogdanm	0:9b334a45a8ff	1781	==============================================================================
bogdanm	0:9b334a45a8ff	1782	[..]
bogdanm	0:9b334a45a8ff	1783	This subsection permits to get in run-time the status of the peripheral
bogdanm	0:9b334a45a8ff	1784	and the data flow.
bogdanm	0:9b334a45a8ff	1785
bogdanm	0:9b334a45a8ff	1786	@endverbatim
bogdanm	0:9b334a45a8ff	1787	* @{
bogdanm	0:9b334a45a8ff	1788	*/
bogdanm	0:9b334a45a8ff	1789
bogdanm	0:9b334a45a8ff	1790	/**
bogdanm	0:9b334a45a8ff	1791	* @brief Return the TIM Hall Sensor interface state
bogdanm	0:9b334a45a8ff	1792	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	1793	* the configuration information for TIM module.
bogdanm	0:9b334a45a8ff	1794	* @retval HAL state
bogdanm	0:9b334a45a8ff	1795	*/
bogdanm	0:9b334a45a8ff	1796	HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(TIM_HandleTypeDef *htim)
bogdanm	0:9b334a45a8ff	1797	{
bogdanm	0:9b334a45a8ff	1798	return htim->State;
bogdanm	0:9b334a45a8ff	1799	}
bogdanm	0:9b334a45a8ff	1800
bogdanm	0:9b334a45a8ff	1801	/**
bogdanm	0:9b334a45a8ff	1802	* @}
bogdanm	0:9b334a45a8ff	1803	*/
bogdanm	0:9b334a45a8ff	1804
bogdanm	0:9b334a45a8ff	1805	/**
bogdanm	0:9b334a45a8ff	1806	* @brief TIM DMA Commutation callback.
bogdanm	0:9b334a45a8ff	1807	* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	1808	* the configuration information for the specified DMA module.
bogdanm	0:9b334a45a8ff	1809	* @retval None
bogdanm	0:9b334a45a8ff	1810	*/
bogdanm	0:9b334a45a8ff	1811	void TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma)
bogdanm	0:9b334a45a8ff	1812	{
bogdanm	0:9b334a45a8ff	1813	TIM_HandleTypeDef* htim = ( TIM_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
bogdanm	0:9b334a45a8ff	1814
bogdanm	0:9b334a45a8ff	1815	htim->State= HAL_TIM_STATE_READY;
bogdanm	0:9b334a45a8ff	1816
bogdanm	0:9b334a45a8ff	1817	HAL_TIMEx_CommutationCallback(htim);
bogdanm	0:9b334a45a8ff	1818	}
bogdanm	0:9b334a45a8ff	1819	/**
bogdanm	0:9b334a45a8ff	1820	* @}
bogdanm	0:9b334a45a8ff	1821	*/
bogdanm	0:9b334a45a8ff	1822
bogdanm	0:9b334a45a8ff	1823	/**
bogdanm	0:9b334a45a8ff	1824	* @brief Enables or disables the TIM Capture Compare Channel xN.
bogdanm	0:9b334a45a8ff	1825	* @param TIMx to select the TIM peripheral
bogdanm	0:9b334a45a8ff	1826	* @param Channel: specifies the TIM Channel
bogdanm	0:9b334a45a8ff	1827	* This parameter can be one of the following values:
bogdanm	0:9b334a45a8ff	1828	* @arg TIM_Channel_1: TIM Channel 1
bogdanm	0:9b334a45a8ff	1829	* @arg TIM_Channel_2: TIM Channel 2
bogdanm	0:9b334a45a8ff	1830	* @arg TIM_Channel_3: TIM Channel 3
bogdanm	0:9b334a45a8ff	1831	* @param ChannelNState: specifies the TIM Channel CCxNE bit new state.
bogdanm	0:9b334a45a8ff	1832	* This parameter can be: TIM_CCxN_ENABLE or TIM_CCxN_Disable.
bogdanm	0:9b334a45a8ff	1833	* @retval None
bogdanm	0:9b334a45a8ff	1834	*/
bogdanm	0:9b334a45a8ff	1835	static void TIM_CCxNChannelCmd(TIM_TypeDef* TIMx, uint32_t Channel, uint32_t ChannelNState)
bogdanm	0:9b334a45a8ff	1836	{
bogdanm	0:9b334a45a8ff	1837	uint32_t tmp = 0;
bogdanm	0:9b334a45a8ff	1838
bogdanm	0:9b334a45a8ff	1839	/* Check the parameters */
bogdanm	0:9b334a45a8ff	1840	assert_param(IS_TIM_CC4_INSTANCE(TIMx));
bogdanm	0:9b334a45a8ff	1841	assert_param(IS_TIM_COMPLEMENTARY_CHANNELS(Channel));
bogdanm	0:9b334a45a8ff	1842
bogdanm	0:9b334a45a8ff	1843	tmp = TIM_CCER_CC1NE << Channel;
bogdanm	0:9b334a45a8ff	1844
bogdanm	0:9b334a45a8ff	1845	/* Reset the CCxNE Bit */
bogdanm	0:9b334a45a8ff	1846	TIMx->CCER &= ~tmp;
bogdanm	0:9b334a45a8ff	1847
bogdanm	0:9b334a45a8ff	1848	/* Set or reset the CCxNE Bit */
bogdanm	0:9b334a45a8ff	1849	TIMx->CCER \|= (uint32_t)(ChannelNState << Channel);
bogdanm	0:9b334a45a8ff	1850	}
bogdanm	0:9b334a45a8ff	1851
bogdanm	0:9b334a45a8ff	1852	/**
bogdanm	0:9b334a45a8ff	1853	* @}
bogdanm	0:9b334a45a8ff	1854	*/
bogdanm	0:9b334a45a8ff	1855
bogdanm	0:9b334a45a8ff	1856	#endif /* HAL_TIM_MODULE_ENABLED */
bogdanm	0:9b334a45a8ff	1857	/**
bogdanm	0:9b334a45a8ff	1858	* @}
bogdanm	0:9b334a45a8ff	1859	*/
bogdanm	0:9b334a45a8ff	1860
bogdanm	0:9b334a45a8ff	1861	/**
bogdanm	0:9b334a45a8ff	1862	* @}
bogdanm	0:9b334a45a8ff	1863	*/
bogdanm	0:9b334a45a8ff	1864	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/

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Type:	Library
Created:	16 May 2016
Imports:	1
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Commits:	130
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targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_tim_ex.c@0:9b334a45a8ff, 2015-10-01 (annotated)

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