fix LPC812 PWM

Dependents:   IR_LED_Send

Fork of mbed-dev by mbed official

Committer:
bogdanm
Date:
Thu Oct 01 15:25:22 2015 +0300
Revision:
0:9b334a45a8ff
Initial commit on mbed-dev

Replaces mbed-src (now inactive)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /**
bogdanm 0:9b334a45a8ff 2 ******************************************************************************
bogdanm 0:9b334a45a8ff 3 * @file startup_stm32f411xe.s
bogdanm 0:9b334a45a8ff 4 * @author MCD Application Team
bogdanm 0:9b334a45a8ff 5 * @version V2.3.0
bogdanm 0:9b334a45a8ff 6 * @date 02-March-2015
bogdanm 0:9b334a45a8ff 7 * @brief STM32F411xExx Devices vector table for Atollic TrueSTUDIO toolchain.
bogdanm 0:9b334a45a8ff 8 * This module performs:
bogdanm 0:9b334a45a8ff 9 * - Set the initial SP
bogdanm 0:9b334a45a8ff 10 * - Set the initial PC == Reset_Handler,
bogdanm 0:9b334a45a8ff 11 * - Set the vector table entries with the exceptions ISR address
bogdanm 0:9b334a45a8ff 12 * - Branches to main in the C library (which eventually
bogdanm 0:9b334a45a8ff 13 * calls main()).
bogdanm 0:9b334a45a8ff 14 * After Reset the Cortex-M4 processor is in Thread mode,
bogdanm 0:9b334a45a8ff 15 * priority is Privileged, and the Stack is set to Main.
bogdanm 0:9b334a45a8ff 16 ******************************************************************************
bogdanm 0:9b334a45a8ff 17 * @attention
bogdanm 0:9b334a45a8ff 18 *
bogdanm 0:9b334a45a8ff 19 * <h2><center>&copy; COPYRIGHT 2015 STMicroelectronics</center></h2>
bogdanm 0:9b334a45a8ff 20 *
bogdanm 0:9b334a45a8ff 21 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 0:9b334a45a8ff 22 * are permitted provided that the following conditions are met:
bogdanm 0:9b334a45a8ff 23 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 0:9b334a45a8ff 24 * this list of conditions and the following disclaimer.
bogdanm 0:9b334a45a8ff 25 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 0:9b334a45a8ff 26 * this list of conditions and the following disclaimer in the documentation
bogdanm 0:9b334a45a8ff 27 * and/or other materials provided with the distribution.
bogdanm 0:9b334a45a8ff 28 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 0:9b334a45a8ff 29 * may be used to endorse or promote products derived from this software
bogdanm 0:9b334a45a8ff 30 * without specific prior written permission.
bogdanm 0:9b334a45a8ff 31 *
bogdanm 0:9b334a45a8ff 32 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 0:9b334a45a8ff 33 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 0:9b334a45a8ff 34 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 0:9b334a45a8ff 35 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 0:9b334a45a8ff 36 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 0:9b334a45a8ff 37 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 0:9b334a45a8ff 38 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 0:9b334a45a8ff 39 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 0:9b334a45a8ff 40 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 0:9b334a45a8ff 41 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 0:9b334a45a8ff 42 *
bogdanm 0:9b334a45a8ff 43 ******************************************************************************
bogdanm 0:9b334a45a8ff 44 */
bogdanm 0:9b334a45a8ff 45
bogdanm 0:9b334a45a8ff 46 .syntax unified
bogdanm 0:9b334a45a8ff 47 .cpu cortex-m4
bogdanm 0:9b334a45a8ff 48 .fpu softvfp
bogdanm 0:9b334a45a8ff 49 .thumb
bogdanm 0:9b334a45a8ff 50
bogdanm 0:9b334a45a8ff 51 .global g_pfnVectors
bogdanm 0:9b334a45a8ff 52 .global Default_Handler
bogdanm 0:9b334a45a8ff 53
bogdanm 0:9b334a45a8ff 54 /* start address for the initialization values of the .data section.
bogdanm 0:9b334a45a8ff 55 defined in linker script */
bogdanm 0:9b334a45a8ff 56 .word _sidata
bogdanm 0:9b334a45a8ff 57 /* start address for the .data section. defined in linker script */
bogdanm 0:9b334a45a8ff 58 .word _sdata
bogdanm 0:9b334a45a8ff 59 /* end address for the .data section. defined in linker script */
bogdanm 0:9b334a45a8ff 60 .word _edata
bogdanm 0:9b334a45a8ff 61 /* start address for the .bss section. defined in linker script */
bogdanm 0:9b334a45a8ff 62 .word _sbss
bogdanm 0:9b334a45a8ff 63 /* end address for the .bss section. defined in linker script */
bogdanm 0:9b334a45a8ff 64 .word _ebss
bogdanm 0:9b334a45a8ff 65 /* stack used for SystemInit_ExtMemCtl; always internal RAM used */
bogdanm 0:9b334a45a8ff 66
bogdanm 0:9b334a45a8ff 67 /**
bogdanm 0:9b334a45a8ff 68 * @brief This is the code that gets called when the processor first
bogdanm 0:9b334a45a8ff 69 * starts execution following a reset event. Only the absolutely
bogdanm 0:9b334a45a8ff 70 * necessary set is performed, after which the application
bogdanm 0:9b334a45a8ff 71 * supplied main() routine is called.
bogdanm 0:9b334a45a8ff 72 * @param None
bogdanm 0:9b334a45a8ff 73 * @retval : None
bogdanm 0:9b334a45a8ff 74 */
bogdanm 0:9b334a45a8ff 75
bogdanm 0:9b334a45a8ff 76 .section .text.Reset_Handler
bogdanm 0:9b334a45a8ff 77 .weak Reset_Handler
bogdanm 0:9b334a45a8ff 78 .type Reset_Handler, %function
bogdanm 0:9b334a45a8ff 79 Reset_Handler:
bogdanm 0:9b334a45a8ff 80 ldr sp, =_estack /* set stack pointer */
bogdanm 0:9b334a45a8ff 81
bogdanm 0:9b334a45a8ff 82 /* Copy the data segment initializers from flash to SRAM */
bogdanm 0:9b334a45a8ff 83 movs r1, #0
bogdanm 0:9b334a45a8ff 84 b LoopCopyDataInit
bogdanm 0:9b334a45a8ff 85
bogdanm 0:9b334a45a8ff 86 CopyDataInit:
bogdanm 0:9b334a45a8ff 87 ldr r3, =_sidata
bogdanm 0:9b334a45a8ff 88 ldr r3, [r3, r1]
bogdanm 0:9b334a45a8ff 89 str r3, [r0, r1]
bogdanm 0:9b334a45a8ff 90 adds r1, r1, #4
bogdanm 0:9b334a45a8ff 91
bogdanm 0:9b334a45a8ff 92 LoopCopyDataInit:
bogdanm 0:9b334a45a8ff 93 ldr r0, =_sdata
bogdanm 0:9b334a45a8ff 94 ldr r3, =_edata
bogdanm 0:9b334a45a8ff 95 adds r2, r0, r1
bogdanm 0:9b334a45a8ff 96 cmp r2, r3
bogdanm 0:9b334a45a8ff 97 bcc CopyDataInit
bogdanm 0:9b334a45a8ff 98 ldr r2, =_sbss
bogdanm 0:9b334a45a8ff 99 b LoopFillZerobss
bogdanm 0:9b334a45a8ff 100 /* Zero fill the bss segment. */
bogdanm 0:9b334a45a8ff 101 FillZerobss:
bogdanm 0:9b334a45a8ff 102 movs r3, #0
bogdanm 0:9b334a45a8ff 103 str r3, [r2], #4
bogdanm 0:9b334a45a8ff 104
bogdanm 0:9b334a45a8ff 105 LoopFillZerobss:
bogdanm 0:9b334a45a8ff 106 ldr r3, = _ebss
bogdanm 0:9b334a45a8ff 107 cmp r2, r3
bogdanm 0:9b334a45a8ff 108 bcc FillZerobss
bogdanm 0:9b334a45a8ff 109
bogdanm 0:9b334a45a8ff 110 /* Call the clock system intitialization function.*/
bogdanm 0:9b334a45a8ff 111 bl SystemInit
bogdanm 0:9b334a45a8ff 112 /* Call static constructors */
bogdanm 0:9b334a45a8ff 113 //bl __libc_init_array
bogdanm 0:9b334a45a8ff 114 /* Call the application's entry point.*/
bogdanm 0:9b334a45a8ff 115 //bl main
bogdanm 0:9b334a45a8ff 116 // Calling the crt0 'cold-start' entry point. There __libc_init_array is called
bogdanm 0:9b334a45a8ff 117 // and when existing hardware_init_hook() and software_init_hook() before
bogdanm 0:9b334a45a8ff 118 // starting main(). software_init_hook() is available and has to be called due
bogdanm 0:9b334a45a8ff 119 // to initializsation when using rtos.
bogdanm 0:9b334a45a8ff 120 bl _start
bogdanm 0:9b334a45a8ff 121 bx lr
bogdanm 0:9b334a45a8ff 122 .size Reset_Handler, .-Reset_Handler
bogdanm 0:9b334a45a8ff 123
bogdanm 0:9b334a45a8ff 124 /**
bogdanm 0:9b334a45a8ff 125 * @brief This is the code that gets called when the processor receives an
bogdanm 0:9b334a45a8ff 126 * unexpected interrupt. This simply enters an infinite loop, preserving
bogdanm 0:9b334a45a8ff 127 * the system state for examination by a debugger.
bogdanm 0:9b334a45a8ff 128 * @param None
bogdanm 0:9b334a45a8ff 129 * @retval None
bogdanm 0:9b334a45a8ff 130 */
bogdanm 0:9b334a45a8ff 131 .section .text.Default_Handler,"ax",%progbits
bogdanm 0:9b334a45a8ff 132 Default_Handler:
bogdanm 0:9b334a45a8ff 133 Infinite_Loop:
bogdanm 0:9b334a45a8ff 134 b Infinite_Loop
bogdanm 0:9b334a45a8ff 135 .size Default_Handler, .-Default_Handler
bogdanm 0:9b334a45a8ff 136 /******************************************************************************
bogdanm 0:9b334a45a8ff 137 *
bogdanm 0:9b334a45a8ff 138 * The minimal vector table for a Cortex M3. Note that the proper constructs
bogdanm 0:9b334a45a8ff 139 * must be placed on this to ensure that it ends up at physical address
bogdanm 0:9b334a45a8ff 140 * 0x0000.0000.
bogdanm 0:9b334a45a8ff 141 *
bogdanm 0:9b334a45a8ff 142 *******************************************************************************/
bogdanm 0:9b334a45a8ff 143 .section .isr_vector,"a",%progbits
bogdanm 0:9b334a45a8ff 144 .type g_pfnVectors, %object
bogdanm 0:9b334a45a8ff 145 .size g_pfnVectors, .-g_pfnVectors
bogdanm 0:9b334a45a8ff 146
bogdanm 0:9b334a45a8ff 147 g_pfnVectors:
bogdanm 0:9b334a45a8ff 148 .word _estack
bogdanm 0:9b334a45a8ff 149 .word Reset_Handler
bogdanm 0:9b334a45a8ff 150 .word NMI_Handler
bogdanm 0:9b334a45a8ff 151 .word HardFault_Handler
bogdanm 0:9b334a45a8ff 152 .word MemManage_Handler
bogdanm 0:9b334a45a8ff 153 .word BusFault_Handler
bogdanm 0:9b334a45a8ff 154 .word UsageFault_Handler
bogdanm 0:9b334a45a8ff 155 .word 0
bogdanm 0:9b334a45a8ff 156 .word 0
bogdanm 0:9b334a45a8ff 157 .word 0
bogdanm 0:9b334a45a8ff 158 .word 0
bogdanm 0:9b334a45a8ff 159 .word SVC_Handler
bogdanm 0:9b334a45a8ff 160 .word DebugMon_Handler
bogdanm 0:9b334a45a8ff 161 .word 0
bogdanm 0:9b334a45a8ff 162 .word PendSV_Handler
bogdanm 0:9b334a45a8ff 163 .word SysTick_Handler
bogdanm 0:9b334a45a8ff 164
bogdanm 0:9b334a45a8ff 165 /* External Interrupts */
bogdanm 0:9b334a45a8ff 166 .word WWDG_IRQHandler /* Window WatchDog */
bogdanm 0:9b334a45a8ff 167 .word PVD_IRQHandler /* PVD through EXTI Line detection */
bogdanm 0:9b334a45a8ff 168 .word TAMP_STAMP_IRQHandler /* Tamper and TimeStamps through the EXTI line */
bogdanm 0:9b334a45a8ff 169 .word RTC_WKUP_IRQHandler /* RTC Wakeup through the EXTI line */
bogdanm 0:9b334a45a8ff 170 .word FLASH_IRQHandler /* FLASH */
bogdanm 0:9b334a45a8ff 171 .word RCC_IRQHandler /* RCC */
bogdanm 0:9b334a45a8ff 172 .word EXTI0_IRQHandler /* EXTI Line0 */
bogdanm 0:9b334a45a8ff 173 .word EXTI1_IRQHandler /* EXTI Line1 */
bogdanm 0:9b334a45a8ff 174 .word EXTI2_IRQHandler /* EXTI Line2 */
bogdanm 0:9b334a45a8ff 175 .word EXTI3_IRQHandler /* EXTI Line3 */
bogdanm 0:9b334a45a8ff 176 .word EXTI4_IRQHandler /* EXTI Line4 */
bogdanm 0:9b334a45a8ff 177 .word DMA1_Stream0_IRQHandler /* DMA1 Stream 0 */
bogdanm 0:9b334a45a8ff 178 .word DMA1_Stream1_IRQHandler /* DMA1 Stream 1 */
bogdanm 0:9b334a45a8ff 179 .word DMA1_Stream2_IRQHandler /* DMA1 Stream 2 */
bogdanm 0:9b334a45a8ff 180 .word DMA1_Stream3_IRQHandler /* DMA1 Stream 3 */
bogdanm 0:9b334a45a8ff 181 .word DMA1_Stream4_IRQHandler /* DMA1 Stream 4 */
bogdanm 0:9b334a45a8ff 182 .word DMA1_Stream5_IRQHandler /* DMA1 Stream 5 */
bogdanm 0:9b334a45a8ff 183 .word DMA1_Stream6_IRQHandler /* DMA1 Stream 6 */
bogdanm 0:9b334a45a8ff 184 .word ADC_IRQHandler /* ADC1, ADC2 and ADC3s */
bogdanm 0:9b334a45a8ff 185 .word 0 /* Reserved */
bogdanm 0:9b334a45a8ff 186 .word 0 /* Reserved */
bogdanm 0:9b334a45a8ff 187 .word 0 /* Reserved */
bogdanm 0:9b334a45a8ff 188 .word 0 /* Reserved */
bogdanm 0:9b334a45a8ff 189 .word EXTI9_5_IRQHandler /* External Line[9:5]s */
bogdanm 0:9b334a45a8ff 190 .word TIM1_BRK_TIM9_IRQHandler /* TIM1 Break and TIM9 */
bogdanm 0:9b334a45a8ff 191 .word TIM1_UP_TIM10_IRQHandler /* TIM1 Update and TIM10 */
bogdanm 0:9b334a45a8ff 192 .word TIM1_TRG_COM_TIM11_IRQHandler /* TIM1 Trigger and Commutation and TIM11 */
bogdanm 0:9b334a45a8ff 193 .word TIM1_CC_IRQHandler /* TIM1 Capture Compare */
bogdanm 0:9b334a45a8ff 194 .word TIM2_IRQHandler /* TIM2 */
bogdanm 0:9b334a45a8ff 195 .word TIM3_IRQHandler /* TIM3 */
bogdanm 0:9b334a45a8ff 196 .word TIM4_IRQHandler /* TIM4 */
bogdanm 0:9b334a45a8ff 197 .word I2C1_EV_IRQHandler /* I2C1 Event */
bogdanm 0:9b334a45a8ff 198 .word I2C1_ER_IRQHandler /* I2C1 Error */
bogdanm 0:9b334a45a8ff 199 .word I2C2_EV_IRQHandler /* I2C2 Event */
bogdanm 0:9b334a45a8ff 200 .word I2C2_ER_IRQHandler /* I2C2 Error */
bogdanm 0:9b334a45a8ff 201 .word SPI1_IRQHandler /* SPI1 */
bogdanm 0:9b334a45a8ff 202 .word SPI2_IRQHandler /* SPI2 */
bogdanm 0:9b334a45a8ff 203 .word USART1_IRQHandler /* USART1 */
bogdanm 0:9b334a45a8ff 204 .word USART2_IRQHandler /* USART2 */
bogdanm 0:9b334a45a8ff 205 .word 0 /* Reserved */
bogdanm 0:9b334a45a8ff 206 .word EXTI15_10_IRQHandler /* External Line[15:10]s */
bogdanm 0:9b334a45a8ff 207 .word RTC_Alarm_IRQHandler /* RTC Alarm (A and B) through EXTI Line */
bogdanm 0:9b334a45a8ff 208 .word OTG_FS_WKUP_IRQHandler /* USB OTG FS Wakeup through EXTI line */
bogdanm 0:9b334a45a8ff 209 .word 0 /* Reserved */
bogdanm 0:9b334a45a8ff 210 .word 0 /* Reserved */
bogdanm 0:9b334a45a8ff 211 .word 0 /* Reserved */
bogdanm 0:9b334a45a8ff 212 .word 0 /* Reserved */
bogdanm 0:9b334a45a8ff 213 .word DMA1_Stream7_IRQHandler /* DMA1 Stream7 */
bogdanm 0:9b334a45a8ff 214 .word 0 /* Reserved */
bogdanm 0:9b334a45a8ff 215 .word SDIO_IRQHandler /* SDIO */
bogdanm 0:9b334a45a8ff 216 .word TIM5_IRQHandler /* TIM5 */
bogdanm 0:9b334a45a8ff 217 .word SPI3_IRQHandler /* SPI3 */
bogdanm 0:9b334a45a8ff 218 .word 0 /* Reserved */
bogdanm 0:9b334a45a8ff 219 .word 0 /* Reserved */
bogdanm 0:9b334a45a8ff 220 .word 0 /* Reserved */
bogdanm 0:9b334a45a8ff 221 .word 0 /* Reserved */
bogdanm 0:9b334a45a8ff 222 .word DMA2_Stream0_IRQHandler /* DMA2 Stream 0 */
bogdanm 0:9b334a45a8ff 223 .word DMA2_Stream1_IRQHandler /* DMA2 Stream 1 */
bogdanm 0:9b334a45a8ff 224 .word DMA2_Stream2_IRQHandler /* DMA2 Stream 2 */
bogdanm 0:9b334a45a8ff 225 .word DMA2_Stream3_IRQHandler /* DMA2 Stream 3 */
bogdanm 0:9b334a45a8ff 226 .word DMA2_Stream4_IRQHandler /* DMA2 Stream 4 */
bogdanm 0:9b334a45a8ff 227 .word 0 /* Reserved */
bogdanm 0:9b334a45a8ff 228 .word 0 /* Reserved */
bogdanm 0:9b334a45a8ff 229 .word 0 /* Reserved */
bogdanm 0:9b334a45a8ff 230 .word 0 /* Reserved */
bogdanm 0:9b334a45a8ff 231 .word 0 /* Reserved */
bogdanm 0:9b334a45a8ff 232 .word 0 /* Reserved */
bogdanm 0:9b334a45a8ff 233 .word OTG_FS_IRQHandler /* USB OTG FS */
bogdanm 0:9b334a45a8ff 234 .word DMA2_Stream5_IRQHandler /* DMA2 Stream 5 */
bogdanm 0:9b334a45a8ff 235 .word DMA2_Stream6_IRQHandler /* DMA2 Stream 6 */
bogdanm 0:9b334a45a8ff 236 .word DMA2_Stream7_IRQHandler /* DMA2 Stream 7 */
bogdanm 0:9b334a45a8ff 237 .word USART6_IRQHandler /* USART6 */
bogdanm 0:9b334a45a8ff 238 .word I2C3_EV_IRQHandler /* I2C3 event */
bogdanm 0:9b334a45a8ff 239 .word I2C3_ER_IRQHandler /* I2C3 error */
bogdanm 0:9b334a45a8ff 240 .word 0 /* Reserved */
bogdanm 0:9b334a45a8ff 241 .word 0 /* Reserved */
bogdanm 0:9b334a45a8ff 242 .word 0 /* Reserved */
bogdanm 0:9b334a45a8ff 243 .word 0 /* Reserved */
bogdanm 0:9b334a45a8ff 244 .word 0 /* Reserved */
bogdanm 0:9b334a45a8ff 245 .word 0 /* Reserved */
bogdanm 0:9b334a45a8ff 246 .word 0 /* Reserved */
bogdanm 0:9b334a45a8ff 247 .word FPU_IRQHandler /* FPU */
bogdanm 0:9b334a45a8ff 248 .word 0 /* Reserved */
bogdanm 0:9b334a45a8ff 249 .word 0 /* Reserved */
bogdanm 0:9b334a45a8ff 250 .word SPI4_IRQHandler /* SPI4 */
bogdanm 0:9b334a45a8ff 251 .word SPI5_IRQHandler /* SPI5 */
bogdanm 0:9b334a45a8ff 252
bogdanm 0:9b334a45a8ff 253 /*******************************************************************************
bogdanm 0:9b334a45a8ff 254 *
bogdanm 0:9b334a45a8ff 255 * Provide weak aliases for each Exception handler to the Default_Handler.
bogdanm 0:9b334a45a8ff 256 * As they are weak aliases, any function with the same name will override
bogdanm 0:9b334a45a8ff 257 * this definition.
bogdanm 0:9b334a45a8ff 258 *
bogdanm 0:9b334a45a8ff 259 *******************************************************************************/
bogdanm 0:9b334a45a8ff 260 .weak NMI_Handler
bogdanm 0:9b334a45a8ff 261 .thumb_set NMI_Handler,Default_Handler
bogdanm 0:9b334a45a8ff 262
bogdanm 0:9b334a45a8ff 263 .weak HardFault_Handler
bogdanm 0:9b334a45a8ff 264 .thumb_set HardFault_Handler,Default_Handler
bogdanm 0:9b334a45a8ff 265
bogdanm 0:9b334a45a8ff 266 .weak MemManage_Handler
bogdanm 0:9b334a45a8ff 267 .thumb_set MemManage_Handler,Default_Handler
bogdanm 0:9b334a45a8ff 268
bogdanm 0:9b334a45a8ff 269 .weak BusFault_Handler
bogdanm 0:9b334a45a8ff 270 .thumb_set BusFault_Handler,Default_Handler
bogdanm 0:9b334a45a8ff 271
bogdanm 0:9b334a45a8ff 272 .weak UsageFault_Handler
bogdanm 0:9b334a45a8ff 273 .thumb_set UsageFault_Handler,Default_Handler
bogdanm 0:9b334a45a8ff 274
bogdanm 0:9b334a45a8ff 275 .weak SVC_Handler
bogdanm 0:9b334a45a8ff 276 .thumb_set SVC_Handler,Default_Handler
bogdanm 0:9b334a45a8ff 277
bogdanm 0:9b334a45a8ff 278 .weak DebugMon_Handler
bogdanm 0:9b334a45a8ff 279 .thumb_set DebugMon_Handler,Default_Handler
bogdanm 0:9b334a45a8ff 280
bogdanm 0:9b334a45a8ff 281 .weak PendSV_Handler
bogdanm 0:9b334a45a8ff 282 .thumb_set PendSV_Handler,Default_Handler
bogdanm 0:9b334a45a8ff 283
bogdanm 0:9b334a45a8ff 284 .weak SysTick_Handler
bogdanm 0:9b334a45a8ff 285 .thumb_set SysTick_Handler,Default_Handler
bogdanm 0:9b334a45a8ff 286
bogdanm 0:9b334a45a8ff 287 .weak WWDG_IRQHandler
bogdanm 0:9b334a45a8ff 288 .thumb_set WWDG_IRQHandler,Default_Handler
bogdanm 0:9b334a45a8ff 289
bogdanm 0:9b334a45a8ff 290 .weak PVD_IRQHandler
bogdanm 0:9b334a45a8ff 291 .thumb_set PVD_IRQHandler,Default_Handler
bogdanm 0:9b334a45a8ff 292
bogdanm 0:9b334a45a8ff 293 .weak TAMP_STAMP_IRQHandler
bogdanm 0:9b334a45a8ff 294 .thumb_set TAMP_STAMP_IRQHandler,Default_Handler
bogdanm 0:9b334a45a8ff 295
bogdanm 0:9b334a45a8ff 296 .weak RTC_WKUP_IRQHandler
bogdanm 0:9b334a45a8ff 297 .thumb_set RTC_WKUP_IRQHandler,Default_Handler
bogdanm 0:9b334a45a8ff 298
bogdanm 0:9b334a45a8ff 299 .weak FLASH_IRQHandler
bogdanm 0:9b334a45a8ff 300 .thumb_set FLASH_IRQHandler,Default_Handler
bogdanm 0:9b334a45a8ff 301
bogdanm 0:9b334a45a8ff 302 .weak RCC_IRQHandler
bogdanm 0:9b334a45a8ff 303 .thumb_set RCC_IRQHandler,Default_Handler
bogdanm 0:9b334a45a8ff 304
bogdanm 0:9b334a45a8ff 305 .weak EXTI0_IRQHandler
bogdanm 0:9b334a45a8ff 306 .thumb_set EXTI0_IRQHandler,Default_Handler
bogdanm 0:9b334a45a8ff 307
bogdanm 0:9b334a45a8ff 308 .weak EXTI1_IRQHandler
bogdanm 0:9b334a45a8ff 309 .thumb_set EXTI1_IRQHandler,Default_Handler
bogdanm 0:9b334a45a8ff 310
bogdanm 0:9b334a45a8ff 311 .weak EXTI2_IRQHandler
bogdanm 0:9b334a45a8ff 312 .thumb_set EXTI2_IRQHandler,Default_Handler
bogdanm 0:9b334a45a8ff 313
bogdanm 0:9b334a45a8ff 314 .weak EXTI3_IRQHandler
bogdanm 0:9b334a45a8ff 315 .thumb_set EXTI3_IRQHandler,Default_Handler
bogdanm 0:9b334a45a8ff 316
bogdanm 0:9b334a45a8ff 317 .weak EXTI4_IRQHandler
bogdanm 0:9b334a45a8ff 318 .thumb_set EXTI4_IRQHandler,Default_Handler
bogdanm 0:9b334a45a8ff 319
bogdanm 0:9b334a45a8ff 320 .weak DMA1_Stream0_IRQHandler
bogdanm 0:9b334a45a8ff 321 .thumb_set DMA1_Stream0_IRQHandler,Default_Handler
bogdanm 0:9b334a45a8ff 322
bogdanm 0:9b334a45a8ff 323 .weak DMA1_Stream1_IRQHandler
bogdanm 0:9b334a45a8ff 324 .thumb_set DMA1_Stream1_IRQHandler,Default_Handler
bogdanm 0:9b334a45a8ff 325
bogdanm 0:9b334a45a8ff 326 .weak DMA1_Stream2_IRQHandler
bogdanm 0:9b334a45a8ff 327 .thumb_set DMA1_Stream2_IRQHandler,Default_Handler
bogdanm 0:9b334a45a8ff 328
bogdanm 0:9b334a45a8ff 329 .weak DMA1_Stream3_IRQHandler
bogdanm 0:9b334a45a8ff 330 .thumb_set DMA1_Stream3_IRQHandler,Default_Handler
bogdanm 0:9b334a45a8ff 331
bogdanm 0:9b334a45a8ff 332 .weak DMA1_Stream4_IRQHandler
bogdanm 0:9b334a45a8ff 333 .thumb_set DMA1_Stream4_IRQHandler,Default_Handler
bogdanm 0:9b334a45a8ff 334
bogdanm 0:9b334a45a8ff 335 .weak DMA1_Stream5_IRQHandler
bogdanm 0:9b334a45a8ff 336 .thumb_set DMA1_Stream5_IRQHandler,Default_Handler
bogdanm 0:9b334a45a8ff 337
bogdanm 0:9b334a45a8ff 338 .weak DMA1_Stream6_IRQHandler
bogdanm 0:9b334a45a8ff 339 .thumb_set DMA1_Stream6_IRQHandler,Default_Handler
bogdanm 0:9b334a45a8ff 340
bogdanm 0:9b334a45a8ff 341 .weak ADC_IRQHandler
bogdanm 0:9b334a45a8ff 342 .thumb_set ADC_IRQHandler,Default_Handler
bogdanm 0:9b334a45a8ff 343
bogdanm 0:9b334a45a8ff 344 .weak EXTI9_5_IRQHandler
bogdanm 0:9b334a45a8ff 345 .thumb_set EXTI9_5_IRQHandler,Default_Handler
bogdanm 0:9b334a45a8ff 346
bogdanm 0:9b334a45a8ff 347 .weak TIM1_BRK_TIM9_IRQHandler
bogdanm 0:9b334a45a8ff 348 .thumb_set TIM1_BRK_TIM9_IRQHandler,Default_Handler
bogdanm 0:9b334a45a8ff 349
bogdanm 0:9b334a45a8ff 350 .weak TIM1_UP_TIM10_IRQHandler
bogdanm 0:9b334a45a8ff 351 .thumb_set TIM1_UP_TIM10_IRQHandler,Default_Handler
bogdanm 0:9b334a45a8ff 352
bogdanm 0:9b334a45a8ff 353 .weak TIM1_TRG_COM_TIM11_IRQHandler
bogdanm 0:9b334a45a8ff 354 .thumb_set TIM1_TRG_COM_TIM11_IRQHandler,Default_Handler
bogdanm 0:9b334a45a8ff 355
bogdanm 0:9b334a45a8ff 356 .weak TIM1_CC_IRQHandler
bogdanm 0:9b334a45a8ff 357 .thumb_set TIM1_CC_IRQHandler,Default_Handler
bogdanm 0:9b334a45a8ff 358
bogdanm 0:9b334a45a8ff 359 .weak TIM2_IRQHandler
bogdanm 0:9b334a45a8ff 360 .thumb_set TIM2_IRQHandler,Default_Handler
bogdanm 0:9b334a45a8ff 361
bogdanm 0:9b334a45a8ff 362 .weak TIM3_IRQHandler
bogdanm 0:9b334a45a8ff 363 .thumb_set TIM3_IRQHandler,Default_Handler
bogdanm 0:9b334a45a8ff 364
bogdanm 0:9b334a45a8ff 365 .weak TIM4_IRQHandler
bogdanm 0:9b334a45a8ff 366 .thumb_set TIM4_IRQHandler,Default_Handler
bogdanm 0:9b334a45a8ff 367
bogdanm 0:9b334a45a8ff 368 .weak I2C1_EV_IRQHandler
bogdanm 0:9b334a45a8ff 369 .thumb_set I2C1_EV_IRQHandler,Default_Handler
bogdanm 0:9b334a45a8ff 370
bogdanm 0:9b334a45a8ff 371 .weak I2C1_ER_IRQHandler
bogdanm 0:9b334a45a8ff 372 .thumb_set I2C1_ER_IRQHandler,Default_Handler
bogdanm 0:9b334a45a8ff 373
bogdanm 0:9b334a45a8ff 374 .weak I2C2_EV_IRQHandler
bogdanm 0:9b334a45a8ff 375 .thumb_set I2C2_EV_IRQHandler,Default_Handler
bogdanm 0:9b334a45a8ff 376
bogdanm 0:9b334a45a8ff 377 .weak I2C2_ER_IRQHandler
bogdanm 0:9b334a45a8ff 378 .thumb_set I2C2_ER_IRQHandler,Default_Handler
bogdanm 0:9b334a45a8ff 379
bogdanm 0:9b334a45a8ff 380 .weak SPI1_IRQHandler
bogdanm 0:9b334a45a8ff 381 .thumb_set SPI1_IRQHandler,Default_Handler
bogdanm 0:9b334a45a8ff 382
bogdanm 0:9b334a45a8ff 383 .weak SPI2_IRQHandler
bogdanm 0:9b334a45a8ff 384 .thumb_set SPI2_IRQHandler,Default_Handler
bogdanm 0:9b334a45a8ff 385
bogdanm 0:9b334a45a8ff 386 .weak USART1_IRQHandler
bogdanm 0:9b334a45a8ff 387 .thumb_set USART1_IRQHandler,Default_Handler
bogdanm 0:9b334a45a8ff 388
bogdanm 0:9b334a45a8ff 389 .weak USART2_IRQHandler
bogdanm 0:9b334a45a8ff 390 .thumb_set USART2_IRQHandler,Default_Handler
bogdanm 0:9b334a45a8ff 391
bogdanm 0:9b334a45a8ff 392 .weak EXTI15_10_IRQHandler
bogdanm 0:9b334a45a8ff 393 .thumb_set EXTI15_10_IRQHandler,Default_Handler
bogdanm 0:9b334a45a8ff 394
bogdanm 0:9b334a45a8ff 395 .weak RTC_Alarm_IRQHandler
bogdanm 0:9b334a45a8ff 396 .thumb_set RTC_Alarm_IRQHandler,Default_Handler
bogdanm 0:9b334a45a8ff 397
bogdanm 0:9b334a45a8ff 398 .weak OTG_FS_WKUP_IRQHandler
bogdanm 0:9b334a45a8ff 399 .thumb_set OTG_FS_WKUP_IRQHandler,Default_Handler
bogdanm 0:9b334a45a8ff 400
bogdanm 0:9b334a45a8ff 401 .weak DMA1_Stream7_IRQHandler
bogdanm 0:9b334a45a8ff 402 .thumb_set DMA1_Stream7_IRQHandler,Default_Handler
bogdanm 0:9b334a45a8ff 403
bogdanm 0:9b334a45a8ff 404 .weak SDIO_IRQHandler
bogdanm 0:9b334a45a8ff 405 .thumb_set SDIO_IRQHandler,Default_Handler
bogdanm 0:9b334a45a8ff 406
bogdanm 0:9b334a45a8ff 407 .weak TIM5_IRQHandler
bogdanm 0:9b334a45a8ff 408 .thumb_set TIM5_IRQHandler,Default_Handler
bogdanm 0:9b334a45a8ff 409
bogdanm 0:9b334a45a8ff 410 .weak SPI3_IRQHandler
bogdanm 0:9b334a45a8ff 411 .thumb_set SPI3_IRQHandler,Default_Handler
bogdanm 0:9b334a45a8ff 412
bogdanm 0:9b334a45a8ff 413 .weak DMA2_Stream0_IRQHandler
bogdanm 0:9b334a45a8ff 414 .thumb_set DMA2_Stream0_IRQHandler,Default_Handler
bogdanm 0:9b334a45a8ff 415
bogdanm 0:9b334a45a8ff 416 .weak DMA2_Stream1_IRQHandler
bogdanm 0:9b334a45a8ff 417 .thumb_set DMA2_Stream1_IRQHandler,Default_Handler
bogdanm 0:9b334a45a8ff 418
bogdanm 0:9b334a45a8ff 419 .weak DMA2_Stream2_IRQHandler
bogdanm 0:9b334a45a8ff 420 .thumb_set DMA2_Stream2_IRQHandler,Default_Handler
bogdanm 0:9b334a45a8ff 421
bogdanm 0:9b334a45a8ff 422 .weak DMA2_Stream3_IRQHandler
bogdanm 0:9b334a45a8ff 423 .thumb_set DMA2_Stream3_IRQHandler,Default_Handler
bogdanm 0:9b334a45a8ff 424
bogdanm 0:9b334a45a8ff 425 .weak DMA2_Stream4_IRQHandler
bogdanm 0:9b334a45a8ff 426 .thumb_set DMA2_Stream4_IRQHandler,Default_Handler
bogdanm 0:9b334a45a8ff 427
bogdanm 0:9b334a45a8ff 428 .weak OTG_FS_IRQHandler
bogdanm 0:9b334a45a8ff 429 .thumb_set OTG_FS_IRQHandler,Default_Handler
bogdanm 0:9b334a45a8ff 430
bogdanm 0:9b334a45a8ff 431 .weak DMA2_Stream5_IRQHandler
bogdanm 0:9b334a45a8ff 432 .thumb_set DMA2_Stream5_IRQHandler,Default_Handler
bogdanm 0:9b334a45a8ff 433
bogdanm 0:9b334a45a8ff 434 .weak DMA2_Stream6_IRQHandler
bogdanm 0:9b334a45a8ff 435 .thumb_set DMA2_Stream6_IRQHandler,Default_Handler
bogdanm 0:9b334a45a8ff 436
bogdanm 0:9b334a45a8ff 437 .weak DMA2_Stream7_IRQHandler
bogdanm 0:9b334a45a8ff 438 .thumb_set DMA2_Stream7_IRQHandler,Default_Handler
bogdanm 0:9b334a45a8ff 439
bogdanm 0:9b334a45a8ff 440 .weak USART6_IRQHandler
bogdanm 0:9b334a45a8ff 441 .thumb_set USART6_IRQHandler,Default_Handler
bogdanm 0:9b334a45a8ff 442
bogdanm 0:9b334a45a8ff 443 .weak I2C3_EV_IRQHandler
bogdanm 0:9b334a45a8ff 444 .thumb_set I2C3_EV_IRQHandler,Default_Handler
bogdanm 0:9b334a45a8ff 445
bogdanm 0:9b334a45a8ff 446 .weak I2C3_ER_IRQHandler
bogdanm 0:9b334a45a8ff 447 .thumb_set I2C3_ER_IRQHandler,Default_Handler
bogdanm 0:9b334a45a8ff 448
bogdanm 0:9b334a45a8ff 449 .weak FPU_IRQHandler
bogdanm 0:9b334a45a8ff 450 .thumb_set FPU_IRQHandler,Default_Handler
bogdanm 0:9b334a45a8ff 451
bogdanm 0:9b334a45a8ff 452 .weak SPI4_IRQHandler
bogdanm 0:9b334a45a8ff 453 .thumb_set SPI4_IRQHandler,Default_Handler
bogdanm 0:9b334a45a8ff 454
bogdanm 0:9b334a45a8ff 455 .weak SPI5_IRQHandler
bogdanm 0:9b334a45a8ff 456 .thumb_set SPI5_IRQHandler,Default_Handler
bogdanm 0:9b334a45a8ff 457
bogdanm 0:9b334a45a8ff 458 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
bogdanm 0:9b334a45a8ff 459