mbed-dev - fix LPC812 PWM

Users » nameless129 » Code » mbed-dev

fix LPC812 PWM

targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_uart.c@0:9b334a45a8ff, 2015-10-01 (annotated)

Committer:: bogdanm
Date:: Thu Oct 01 15:25:22 2015 +0300
Revision:: 0:9b334a45a8ff

Initial commit on mbed-dev



Replaces mbed-src (now inactive)

Who changed what in which revision?

User	Revision	Line number	New contents of line
bogdanm	0:9b334a45a8ff	1	/**
bogdanm	0:9b334a45a8ff	2	******************************************************************************
bogdanm	0:9b334a45a8ff	3	* @file stm32f3xx_hal_uart.c
bogdanm	0:9b334a45a8ff	4	* @author MCD Application Team
bogdanm	0:9b334a45a8ff	5	* @version V1.1.0
bogdanm	0:9b334a45a8ff	6	* @date 12-Sept-2014
bogdanm	0:9b334a45a8ff	7	* @brief UART HAL module driver.
bogdanm	0:9b334a45a8ff	8	*
bogdanm	0:9b334a45a8ff	9	* This file provides firmware functions to manage the following
bogdanm	0:9b334a45a8ff	10	* functionalities of the Universal Asynchronous Receiver Transmitter Peripheral (UART).
bogdanm	0:9b334a45a8ff	11	* + Initialization and de-initialization functions
bogdanm	0:9b334a45a8ff	12	* + IO operation functions
bogdanm	0:9b334a45a8ff	13	* + Peripheral Control functions
bogdanm	0:9b334a45a8ff	14	*
bogdanm	0:9b334a45a8ff	15	*
bogdanm	0:9b334a45a8ff	16	@verbatim
bogdanm	0:9b334a45a8ff	17	===============================================================================
bogdanm	0:9b334a45a8ff	18	##### How to use this driver #####
bogdanm	0:9b334a45a8ff	19	===============================================================================
bogdanm	0:9b334a45a8ff	20	[..]
bogdanm	0:9b334a45a8ff	21	The UART HAL driver can be used as follows:
bogdanm	0:9b334a45a8ff	22
bogdanm	0:9b334a45a8ff	23	(#) Declare a UART_HandleTypeDef handle structure.
bogdanm	0:9b334a45a8ff	24	(#) Initialize the UART low level resources by implementing the HAL_UART_MspInit ()API:
bogdanm	0:9b334a45a8ff	25	(##) Enable the USARTx interface clock.
bogdanm	0:9b334a45a8ff	26	(##) UART pins configuration:
bogdanm	0:9b334a45a8ff	27	(+) Enable the clock for the UART GPIOs.
bogdanm	0:9b334a45a8ff	28	(+) Configure these UART pins as alternate function pull-up.
bogdanm	0:9b334a45a8ff	29	(##) NVIC configuration if you need to use interrupt process (HAL_UART_Transmit_IT()
bogdanm	0:9b334a45a8ff	30	and HAL_UART_Receive_IT() APIs):
bogdanm	0:9b334a45a8ff	31	(+) Configure the USARTx interrupt priority.
bogdanm	0:9b334a45a8ff	32	(+) Enable the NVIC USART IRQ handle.
bogdanm	0:9b334a45a8ff	33	(@) The specific UART interrupts (Transmission complete interrupt,
bogdanm	0:9b334a45a8ff	34	RXNE interrupt and Error Interrupts) will be managed using the macros
bogdanm	0:9b334a45a8ff	35	__HAL_UART_ENABLE_IT() and __HAL_UART_DISABLE_IT() inside the transmit and receive process.
bogdanm	0:9b334a45a8ff	36	(##) DMA Configuration if you need to use DMA process (HAL_UART_Transmit_DMA()
bogdanm	0:9b334a45a8ff	37	and HAL_UART_Receive_DMA() APIs):
bogdanm	0:9b334a45a8ff	38	(+) Declare a DMA handle structure for the Tx/Rx channel.
bogdanm	0:9b334a45a8ff	39	(+) Enable the DMAx interface clock.
bogdanm	0:9b334a45a8ff	40	(+) Configure the declared DMA handle structure with the required Tx/Rx parameters.
bogdanm	0:9b334a45a8ff	41	(+) Configure the DMA Tx/Rx channel.
bogdanm	0:9b334a45a8ff	42	(+) Associate the initilalized DMA handle to the UART DMA Tx/Rx handle.
bogdanm	0:9b334a45a8ff	43	(+) Configure the priority and enable the NVIC for the transfer complete interrupt on the DMA Tx/Rx channel.
bogdanm	0:9b334a45a8ff	44
bogdanm	0:9b334a45a8ff	45	(#) Program the Baud Rate, Word Length , Stop Bit, Parity, Hardware
bogdanm	0:9b334a45a8ff	46	flow control and Mode(Receiver/Transmitter) in the huart Init structure.
bogdanm	0:9b334a45a8ff	47
bogdanm	0:9b334a45a8ff	48	(#) If required, program UART advanced features (TX/RX pins swap, auto Baud rate detection,...)
bogdanm	0:9b334a45a8ff	49	in the huart AdvancedInit structure.
bogdanm	0:9b334a45a8ff	50
bogdanm	0:9b334a45a8ff	51	(#) For the UART asynchronous mode, initialize the UART registers by calling
bogdanm	0:9b334a45a8ff	52	the HAL_UART_Init() API.
bogdanm	0:9b334a45a8ff	53
bogdanm	0:9b334a45a8ff	54	(#) For the UART Half duplex mode, initialize the UART registers by calling
bogdanm	0:9b334a45a8ff	55	the HAL_HalfDuplex_Init() API.
bogdanm	0:9b334a45a8ff	56
bogdanm	0:9b334a45a8ff	57	(#) For the UART LIN (Local Interconnection Network) mode, initialize the UART registers
bogdanm	0:9b334a45a8ff	58	by calling the HAL_LIN_Init() API.
bogdanm	0:9b334a45a8ff	59
bogdanm	0:9b334a45a8ff	60	(#) For the UART Multiprocessor mode, initialize the UART registers
bogdanm	0:9b334a45a8ff	61	by calling the HAL_MultiProcessor_Init() API.
bogdanm	0:9b334a45a8ff	62
bogdanm	0:9b334a45a8ff	63	(#) For the UART RS485 Driver Enabled mode, initialize the UART registers
bogdanm	0:9b334a45a8ff	64	by calling the HAL_RS485Ex_Init() API.
bogdanm	0:9b334a45a8ff	65
bogdanm	0:9b334a45a8ff	66	(@) These API's(HAL_UART_Init(), HAL_HalfDuplex_Init(), HAL_LIN_Init(), HAL_MultiProcessor_Init(),
bogdanm	0:9b334a45a8ff	67	also configure also the low level Hardware GPIO, CLOCK, CORTEX...etc) by
bogdanm	0:9b334a45a8ff	68	calling the customized HAL_UART_MspInit() API.
bogdanm	0:9b334a45a8ff	69
bogdanm	0:9b334a45a8ff	70	@endverbatim
bogdanm	0:9b334a45a8ff	71	******************************************************************************
bogdanm	0:9b334a45a8ff	72	* @attention
bogdanm	0:9b334a45a8ff	73	*
bogdanm	0:9b334a45a8ff	74	* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
bogdanm	0:9b334a45a8ff	75	*
bogdanm	0:9b334a45a8ff	76	* Redistribution and use in source and binary forms, with or without modification,
bogdanm	0:9b334a45a8ff	77	* are permitted provided that the following conditions are met:
bogdanm	0:9b334a45a8ff	78	* 1. Redistributions of source code must retain the above copyright notice,
bogdanm	0:9b334a45a8ff	79	* this list of conditions and the following disclaimer.
bogdanm	0:9b334a45a8ff	80	* 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm	0:9b334a45a8ff	81	* this list of conditions and the following disclaimer in the documentation
bogdanm	0:9b334a45a8ff	82	* and/or other materials provided with the distribution.
bogdanm	0:9b334a45a8ff	83	* 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm	0:9b334a45a8ff	84	* may be used to endorse or promote products derived from this software
bogdanm	0:9b334a45a8ff	85	* without specific prior written permission.
bogdanm	0:9b334a45a8ff	86	*
bogdanm	0:9b334a45a8ff	87	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm	0:9b334a45a8ff	88	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm	0:9b334a45a8ff	89	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm	0:9b334a45a8ff	90	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm	0:9b334a45a8ff	91	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm	0:9b334a45a8ff	92	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm	0:9b334a45a8ff	93	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm	0:9b334a45a8ff	94	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm	0:9b334a45a8ff	95	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm	0:9b334a45a8ff	96	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm	0:9b334a45a8ff	97	*
bogdanm	0:9b334a45a8ff	98	******************************************************************************
bogdanm	0:9b334a45a8ff	99	*/
bogdanm	0:9b334a45a8ff	100
bogdanm	0:9b334a45a8ff	101	/* Includes ------------------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	102	#include "stm32f3xx_hal.h"
bogdanm	0:9b334a45a8ff	103
bogdanm	0:9b334a45a8ff	104	/** @addtogroup STM32F3xx_HAL_Driver
bogdanm	0:9b334a45a8ff	105	* @{
bogdanm	0:9b334a45a8ff	106	*/
bogdanm	0:9b334a45a8ff	107
bogdanm	0:9b334a45a8ff	108	/** @defgroup UART UART HAL module driver
bogdanm	0:9b334a45a8ff	109	* @brief UART HAL module driver
bogdanm	0:9b334a45a8ff	110	* @{
bogdanm	0:9b334a45a8ff	111	*/
bogdanm	0:9b334a45a8ff	112	#ifdef HAL_UART_MODULE_ENABLED
bogdanm	0:9b334a45a8ff	113
bogdanm	0:9b334a45a8ff	114	/* Private typedef -----------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	115	/* Private define ------------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	116	/** @defgroup UART_Private_Constants UART Private Constants
bogdanm	0:9b334a45a8ff	117	* @{
bogdanm	0:9b334a45a8ff	118	*/
bogdanm	0:9b334a45a8ff	119	#define HAL_UART_TXDMA_TIMEOUTVALUE 22000
bogdanm	0:9b334a45a8ff	120	#define UART_CR1_FIELDS ((uint32_t)(USART_CR1_M \| USART_CR1_PCE \| USART_CR1_PS \| \
bogdanm	0:9b334a45a8ff	121	USART_CR1_TE \| USART_CR1_RE \| USART_CR1_OVER8))
bogdanm	0:9b334a45a8ff	122	/**
bogdanm	0:9b334a45a8ff	123	* @}
bogdanm	0:9b334a45a8ff	124	*/
bogdanm	0:9b334a45a8ff	125
bogdanm	0:9b334a45a8ff	126	/* Private macro -------------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	127	/* Private variables ---------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	128	/* Private function prototypes -----------------------------------------------*/
bogdanm	0:9b334a45a8ff	129	static void UART_DMATransmitCplt(DMA_HandleTypeDef *hdma);
bogdanm	0:9b334a45a8ff	130	static void UART_DMAReceiveCplt(DMA_HandleTypeDef *hdma);
bogdanm	0:9b334a45a8ff	131	static void UART_DMARxHalfCplt(DMA_HandleTypeDef *hdma);
bogdanm	0:9b334a45a8ff	132	static void UART_DMATxHalfCplt(DMA_HandleTypeDef *hdma);
bogdanm	0:9b334a45a8ff	133	static void UART_DMAError(DMA_HandleTypeDef *hdma);
bogdanm	0:9b334a45a8ff	134	static HAL_StatusTypeDef UART_Transmit_IT(UART_HandleTypeDef *huart);
bogdanm	0:9b334a45a8ff	135	static HAL_StatusTypeDef UART_EndTransmit_IT(UART_HandleTypeDef *huart);
bogdanm	0:9b334a45a8ff	136	static HAL_StatusTypeDef UART_Receive_IT(UART_HandleTypeDef *huart);
bogdanm	0:9b334a45a8ff	137	/* Exported functions ---------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	138
bogdanm	0:9b334a45a8ff	139	/** @defgroup UART_Exported_Functions UART Exported Functions
bogdanm	0:9b334a45a8ff	140	* @{
bogdanm	0:9b334a45a8ff	141	*/
bogdanm	0:9b334a45a8ff	142
bogdanm	0:9b334a45a8ff	143	/** @defgroup UART_Exported_Functions_Group1 Initialization and de-initialization functions
bogdanm	0:9b334a45a8ff	144	* @brief Initialization and Configuration functions
bogdanm	0:9b334a45a8ff	145	*
bogdanm	0:9b334a45a8ff	146	@verbatim
bogdanm	0:9b334a45a8ff	147	===============================================================================
bogdanm	0:9b334a45a8ff	148	##### Initialization and Configuration functions #####
bogdanm	0:9b334a45a8ff	149	===============================================================================
bogdanm	0:9b334a45a8ff	150	[..]
bogdanm	0:9b334a45a8ff	151	This subsection provides a set of functions allowing to initialize the USARTx or the UARTy
bogdanm	0:9b334a45a8ff	152	in asynchronous mode.
bogdanm	0:9b334a45a8ff	153	(+) For the asynchronous mode the parameters below can be configured:
bogdanm	0:9b334a45a8ff	154	(++) Baud Rate
bogdanm	0:9b334a45a8ff	155	(++) Word Length
bogdanm	0:9b334a45a8ff	156	(++) Stop Bit
bogdanm	0:9b334a45a8ff	157	(++) Parity: If the parity is enabled, then the MSB bit of the data written
bogdanm	0:9b334a45a8ff	158	in the data register is transmitted but is changed by the parity bit.
bogdanm	0:9b334a45a8ff	159	Depending on the frame length defined by the M bit (8-bits or 9-bits)
bogdanm	0:9b334a45a8ff	160	or by the M1 and M0 bits (7-bit, 8-bit or 9-bit),
bogdanm	0:9b334a45a8ff	161	the possible UART frame formats are as listed in the following table:
bogdanm	0:9b334a45a8ff	162	+---------------------------------------------------------------+
bogdanm	0:9b334a45a8ff	163	\| M bit \| PCE bit \| UART frame \|
bogdanm	0:9b334a45a8ff	164	\|-----------\|-----------\|---------------------------------------\|
bogdanm	0:9b334a45a8ff	165	\| 0 \| 0 \| \| SB \| 8-bit data \| STB \| \|
bogdanm	0:9b334a45a8ff	166	\|-----------\|-----------\|---------------------------------------\|
bogdanm	0:9b334a45a8ff	167	\| 0 \| 1 \| \| SB \| 7-bit data \| PB \| STB \| \|
bogdanm	0:9b334a45a8ff	168	\|-----------\|-----------\|---------------------------------------\|
bogdanm	0:9b334a45a8ff	169	\| 1 \| 0 \| \| SB \| 9-bit data \| STB \| \|
bogdanm	0:9b334a45a8ff	170	\|-----------\|-----------\|---------------------------------------\|
bogdanm	0:9b334a45a8ff	171	\| 1 \| 1 \| \| SB \| 8-bit data \| PB \| STB \| \|
bogdanm	0:9b334a45a8ff	172	+---------------------------------------------------------------+
bogdanm	0:9b334a45a8ff	173	\| M1M0 bits \| PCE bit \| UART frame \|
bogdanm	0:9b334a45a8ff	174	\|-----------------------\|---------------------------------------\|
bogdanm	0:9b334a45a8ff	175	\| 10 \| 0 \| \| SB \| 7-bit data \| STB \| \|
bogdanm	0:9b334a45a8ff	176	\|-----------\|-----------\|---------------------------------------\|
bogdanm	0:9b334a45a8ff	177	\| 10 \| 1 \| \| SB \| 6-bit data \| PB \| STB \| \|
bogdanm	0:9b334a45a8ff	178	+---------------------------------------------------------------+
bogdanm	0:9b334a45a8ff	179	(++) Hardware flow control
bogdanm	0:9b334a45a8ff	180	(++) Receiver/transmitter modes
bogdanm	0:9b334a45a8ff	181	(++) Over Sampling Method
bogdanm	0:9b334a45a8ff	182	(++) One-Bit Sampling Method
bogdanm	0:9b334a45a8ff	183	(+) For the asynchronous mode, the following advanced features can be configured as well:
bogdanm	0:9b334a45a8ff	184	(++) TX and/or RX pin level inversion
bogdanm	0:9b334a45a8ff	185	(++) data logical level inversion
bogdanm	0:9b334a45a8ff	186	(++) RX and TX pins swap
bogdanm	0:9b334a45a8ff	187	(++) RX overrun detection disabling
bogdanm	0:9b334a45a8ff	188	(++) DMA disabling on RX error
bogdanm	0:9b334a45a8ff	189	(++) MSB first on communication line
bogdanm	0:9b334a45a8ff	190	(++) auto Baud rate detection
bogdanm	0:9b334a45a8ff	191	[..]
bogdanm	0:9b334a45a8ff	192	The HAL_UART_Init(), HAL_HalfDuplex_Init(), HAL_LIN_Init() and HAL_MultiProcessor_Init()
bogdanm	0:9b334a45a8ff	193	API follow respectively the UART asynchronous, UART Half duplex, UART LIN mode and
bogdanm	0:9b334a45a8ff	194	multiprocessor configuration procedures (details for the procedures are available in reference manual).
bogdanm	0:9b334a45a8ff	195
bogdanm	0:9b334a45a8ff	196	@endverbatim
bogdanm	0:9b334a45a8ff	197	* @{
bogdanm	0:9b334a45a8ff	198	*/
bogdanm	0:9b334a45a8ff	199
bogdanm	0:9b334a45a8ff	200	/**
bogdanm	0:9b334a45a8ff	201	* @brief Initializes the UART mode according to the specified
bogdanm	0:9b334a45a8ff	202	* parameters in the UART_InitTypeDef and creates the associated handle .
bogdanm	0:9b334a45a8ff	203	* @param huart: uart handle
bogdanm	0:9b334a45a8ff	204	* @retval HAL status
bogdanm	0:9b334a45a8ff	205	*/
bogdanm	0:9b334a45a8ff	206	HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	207	{
bogdanm	0:9b334a45a8ff	208	/* Check the UART handle allocation */
bogdanm	0:9b334a45a8ff	209	if(huart == HAL_NULL)
bogdanm	0:9b334a45a8ff	210	{
bogdanm	0:9b334a45a8ff	211	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	212	}
bogdanm	0:9b334a45a8ff	213
bogdanm	0:9b334a45a8ff	214	if(huart->Init.HwFlowCtl != UART_HWCONTROL_NONE)
bogdanm	0:9b334a45a8ff	215	{
bogdanm	0:9b334a45a8ff	216	/* Check the parameters */
bogdanm	0:9b334a45a8ff	217	assert_param(IS_UART_HWFLOW_INSTANCE(huart->Instance));
bogdanm	0:9b334a45a8ff	218	}
bogdanm	0:9b334a45a8ff	219	else
bogdanm	0:9b334a45a8ff	220	{
bogdanm	0:9b334a45a8ff	221	/* Check the parameters */
bogdanm	0:9b334a45a8ff	222	assert_param(IS_UART_INSTANCE(huart->Instance));
bogdanm	0:9b334a45a8ff	223	}
bogdanm	0:9b334a45a8ff	224
bogdanm	0:9b334a45a8ff	225	if(huart->State == HAL_UART_STATE_RESET)
bogdanm	0:9b334a45a8ff	226	{
bogdanm	0:9b334a45a8ff	227	/* Init the low level hardware : GPIO, CLOCK */
bogdanm	0:9b334a45a8ff	228	HAL_UART_MspInit(huart);
bogdanm	0:9b334a45a8ff	229	}
bogdanm	0:9b334a45a8ff	230
bogdanm	0:9b334a45a8ff	231	huart->State = HAL_UART_STATE_BUSY;
bogdanm	0:9b334a45a8ff	232
bogdanm	0:9b334a45a8ff	233	/* Disable the Peripheral */
bogdanm	0:9b334a45a8ff	234	__HAL_UART_DISABLE(huart);
bogdanm	0:9b334a45a8ff	235
bogdanm	0:9b334a45a8ff	236	/* Set the UART Communication parameters */
bogdanm	0:9b334a45a8ff	237	if (UART_SetConfig(huart) == HAL_ERROR)
bogdanm	0:9b334a45a8ff	238	{
bogdanm	0:9b334a45a8ff	239	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	240	}
bogdanm	0:9b334a45a8ff	241
bogdanm	0:9b334a45a8ff	242	if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT)
bogdanm	0:9b334a45a8ff	243	{
bogdanm	0:9b334a45a8ff	244	UART_AdvFeatureConfig(huart);
bogdanm	0:9b334a45a8ff	245	}
bogdanm	0:9b334a45a8ff	246
bogdanm	0:9b334a45a8ff	247	/* In asynchronous mode, the following bits must be kept cleared:
bogdanm	0:9b334a45a8ff	248	- LINEN and CLKEN bits in the USART_CR2 register,
bogdanm	0:9b334a45a8ff	249	- SCEN, HDSEL and IREN bits in the USART_CR3 register.*/
bogdanm	0:9b334a45a8ff	250	huart->Instance->CR2 &= ~(USART_CR2_LINEN \| USART_CR2_CLKEN);
bogdanm	0:9b334a45a8ff	251	huart->Instance->CR3 &= ~(USART_CR3_SCEN \| USART_CR3_HDSEL \| USART_CR3_IREN);
bogdanm	0:9b334a45a8ff	252
bogdanm	0:9b334a45a8ff	253	/* Enable the Peripheral */
bogdanm	0:9b334a45a8ff	254	__HAL_UART_ENABLE(huart);
bogdanm	0:9b334a45a8ff	255
bogdanm	0:9b334a45a8ff	256	/* TEACK and/or REACK to check before moving huart->State to Ready */
bogdanm	0:9b334a45a8ff	257	return (UART_CheckIdleState(huart));
bogdanm	0:9b334a45a8ff	258	}
bogdanm	0:9b334a45a8ff	259
bogdanm	0:9b334a45a8ff	260	/**
bogdanm	0:9b334a45a8ff	261	* @brief Initializes the half-duplex mode according to the specified
bogdanm	0:9b334a45a8ff	262	* parameters in the UART_InitTypeDef and creates the associated handle .
bogdanm	0:9b334a45a8ff	263	* @param huart: uart handle
bogdanm	0:9b334a45a8ff	264	* @retval HAL status
bogdanm	0:9b334a45a8ff	265	*/
bogdanm	0:9b334a45a8ff	266	HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	267	{
bogdanm	0:9b334a45a8ff	268	/* Check the UART handle allocation */
bogdanm	0:9b334a45a8ff	269	if(huart == HAL_NULL)
bogdanm	0:9b334a45a8ff	270	{
bogdanm	0:9b334a45a8ff	271	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	272	}
bogdanm	0:9b334a45a8ff	273
bogdanm	0:9b334a45a8ff	274	/* Check UART instance */
bogdanm	0:9b334a45a8ff	275	assert_param(IS_UART_HALFDUPLEX_INSTANCE(huart->Instance));
bogdanm	0:9b334a45a8ff	276
bogdanm	0:9b334a45a8ff	277	if(huart->State == HAL_UART_STATE_RESET)
bogdanm	0:9b334a45a8ff	278	{
bogdanm	0:9b334a45a8ff	279	/* Init the low level hardware : GPIO, CLOCK */
bogdanm	0:9b334a45a8ff	280	HAL_UART_MspInit(huart);
bogdanm	0:9b334a45a8ff	281	}
bogdanm	0:9b334a45a8ff	282
bogdanm	0:9b334a45a8ff	283	huart->State = HAL_UART_STATE_BUSY;
bogdanm	0:9b334a45a8ff	284
bogdanm	0:9b334a45a8ff	285	/* Disable the Peripheral */
bogdanm	0:9b334a45a8ff	286	__HAL_UART_DISABLE(huart);
bogdanm	0:9b334a45a8ff	287
bogdanm	0:9b334a45a8ff	288	/* Set the UART Communication parameters */
bogdanm	0:9b334a45a8ff	289	if (UART_SetConfig(huart) == HAL_ERROR)
bogdanm	0:9b334a45a8ff	290	{
bogdanm	0:9b334a45a8ff	291	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	292	}
bogdanm	0:9b334a45a8ff	293
bogdanm	0:9b334a45a8ff	294	if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT)
bogdanm	0:9b334a45a8ff	295	{
bogdanm	0:9b334a45a8ff	296	UART_AdvFeatureConfig(huart);
bogdanm	0:9b334a45a8ff	297	}
bogdanm	0:9b334a45a8ff	298
bogdanm	0:9b334a45a8ff	299	/* In half-duplex mode, the following bits must be kept cleared:
bogdanm	0:9b334a45a8ff	300	- LINEN and CLKEN bits in the USART_CR2 register,
bogdanm	0:9b334a45a8ff	301	- SCEN and IREN bits in the USART_CR3 register.*/
bogdanm	0:9b334a45a8ff	302	huart->Instance->CR2 &= ~(USART_CR2_LINEN \| USART_CR2_CLKEN);
bogdanm	0:9b334a45a8ff	303	huart->Instance->CR3 &= ~(USART_CR3_IREN \| USART_CR3_SCEN);
bogdanm	0:9b334a45a8ff	304
bogdanm	0:9b334a45a8ff	305	/* Enable the Half-Duplex mode by setting the HDSEL bit in the CR3 register */
bogdanm	0:9b334a45a8ff	306	huart->Instance->CR3 \|= USART_CR3_HDSEL;
bogdanm	0:9b334a45a8ff	307
bogdanm	0:9b334a45a8ff	308	/* Enable the Peripheral */
bogdanm	0:9b334a45a8ff	309	__HAL_UART_ENABLE(huart);
bogdanm	0:9b334a45a8ff	310
bogdanm	0:9b334a45a8ff	311	/* TEACK and/or REACK to check before moving huart->State to Ready */
bogdanm	0:9b334a45a8ff	312	return (UART_CheckIdleState(huart));
bogdanm	0:9b334a45a8ff	313	}
bogdanm	0:9b334a45a8ff	314
bogdanm	0:9b334a45a8ff	315
bogdanm	0:9b334a45a8ff	316	/**
bogdanm	0:9b334a45a8ff	317	* @brief Initializes the LIN mode according to the specified
bogdanm	0:9b334a45a8ff	318	* parameters in the UART_InitTypeDef and creates the associated handle .
bogdanm	0:9b334a45a8ff	319	* @param huart: uart handle
bogdanm	0:9b334a45a8ff	320	* @param BreakDetectLength: specifies the LIN break detection length.
bogdanm	0:9b334a45a8ff	321	* This parameter can be one of the following values:
bogdanm	0:9b334a45a8ff	322	* @arg UART_LINBREAKDETECTLENGTH_10B: 10-bit break detection
bogdanm	0:9b334a45a8ff	323	* @arg UART_LINBREAKDETECTLENGTH_11B: 11-bit break detection
bogdanm	0:9b334a45a8ff	324	* @retval HAL status
bogdanm	0:9b334a45a8ff	325	*/
bogdanm	0:9b334a45a8ff	326	HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength)
bogdanm	0:9b334a45a8ff	327	{
bogdanm	0:9b334a45a8ff	328	/* Check the UART handle allocation */
bogdanm	0:9b334a45a8ff	329	if(huart == HAL_NULL)
bogdanm	0:9b334a45a8ff	330	{
bogdanm	0:9b334a45a8ff	331	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	332	}
bogdanm	0:9b334a45a8ff	333
bogdanm	0:9b334a45a8ff	334	/* Check the LIN UART instance */
bogdanm	0:9b334a45a8ff	335	assert_param(IS_UART_LIN_INSTANCE(huart->Instance));
bogdanm	0:9b334a45a8ff	336	/* Check the Break detection length parameter */
bogdanm	0:9b334a45a8ff	337	assert_param(IS_UART_LIN_BREAK_DETECT_LENGTH(BreakDetectLength));
bogdanm	0:9b334a45a8ff	338
bogdanm	0:9b334a45a8ff	339	/* LIN mode limited to 16-bit oversampling only */
bogdanm	0:9b334a45a8ff	340	if(huart->Init.OverSampling == UART_OVERSAMPLING_8)
bogdanm	0:9b334a45a8ff	341	{
bogdanm	0:9b334a45a8ff	342	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	343	}
bogdanm	0:9b334a45a8ff	344
bogdanm	0:9b334a45a8ff	345	if(huart->State == HAL_UART_STATE_RESET)
bogdanm	0:9b334a45a8ff	346	{
bogdanm	0:9b334a45a8ff	347	/* Init the low level hardware : GPIO, CLOCK */
bogdanm	0:9b334a45a8ff	348	HAL_UART_MspInit(huart);
bogdanm	0:9b334a45a8ff	349	}
bogdanm	0:9b334a45a8ff	350
bogdanm	0:9b334a45a8ff	351	huart->State = HAL_UART_STATE_BUSY;
bogdanm	0:9b334a45a8ff	352
bogdanm	0:9b334a45a8ff	353	/* Disable the Peripheral */
bogdanm	0:9b334a45a8ff	354	__HAL_UART_DISABLE(huart);
bogdanm	0:9b334a45a8ff	355
bogdanm	0:9b334a45a8ff	356	/* Set the UART Communication parameters */
bogdanm	0:9b334a45a8ff	357	if (UART_SetConfig(huart) == HAL_ERROR)
bogdanm	0:9b334a45a8ff	358	{
bogdanm	0:9b334a45a8ff	359	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	360	}
bogdanm	0:9b334a45a8ff	361
bogdanm	0:9b334a45a8ff	362	if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT)
bogdanm	0:9b334a45a8ff	363	{
bogdanm	0:9b334a45a8ff	364	UART_AdvFeatureConfig(huart);
bogdanm	0:9b334a45a8ff	365	}
bogdanm	0:9b334a45a8ff	366
bogdanm	0:9b334a45a8ff	367	/* In LIN mode, the following bits must be kept cleared:
bogdanm	0:9b334a45a8ff	368	- LINEN and CLKEN bits in the USART_CR2 register,
bogdanm	0:9b334a45a8ff	369	- SCEN and IREN bits in the USART_CR3 register.*/
bogdanm	0:9b334a45a8ff	370	huart->Instance->CR2 &= ~(USART_CR2_CLKEN);
bogdanm	0:9b334a45a8ff	371	huart->Instance->CR3 &= ~(USART_CR3_HDSEL \| USART_CR3_IREN \| USART_CR3_SCEN);
bogdanm	0:9b334a45a8ff	372
bogdanm	0:9b334a45a8ff	373	/* Enable the LIN mode by setting the LINEN bit in the CR2 register */
bogdanm	0:9b334a45a8ff	374	huart->Instance->CR2 \|= USART_CR2_LINEN;
bogdanm	0:9b334a45a8ff	375
bogdanm	0:9b334a45a8ff	376	/* Set the USART LIN Break detection length. */
bogdanm	0:9b334a45a8ff	377	MODIFY_REG(huart->Instance->CR2, USART_CR2_LBDL, BreakDetectLength);
bogdanm	0:9b334a45a8ff	378
bogdanm	0:9b334a45a8ff	379	/* Enable the Peripheral */
bogdanm	0:9b334a45a8ff	380	__HAL_UART_ENABLE(huart);
bogdanm	0:9b334a45a8ff	381
bogdanm	0:9b334a45a8ff	382	/* TEACK and/or REACK to check before moving huart->State to Ready */
bogdanm	0:9b334a45a8ff	383	return (UART_CheckIdleState(huart));
bogdanm	0:9b334a45a8ff	384	}
bogdanm	0:9b334a45a8ff	385
bogdanm	0:9b334a45a8ff	386
bogdanm	0:9b334a45a8ff	387
bogdanm	0:9b334a45a8ff	388	/**
bogdanm	0:9b334a45a8ff	389	* @brief Initializes the multiprocessor mode according to the specified
bogdanm	0:9b334a45a8ff	390	* parameters in the UART_InitTypeDef and creates the associated handle.
bogdanm	0:9b334a45a8ff	391	* @param huart: UART handle
bogdanm	0:9b334a45a8ff	392	* @param Address: UART node address (4-, 6-, 7- or 8-bit long)
bogdanm	0:9b334a45a8ff	393	* @param WakeUpMethod: specifies the UART wakeup method.
bogdanm	0:9b334a45a8ff	394	* This parameter can be one of the following values:
bogdanm	0:9b334a45a8ff	395	* @arg UART_WAKEUPMETHOD_IDLELINE: WakeUp by an idle line detection
bogdanm	0:9b334a45a8ff	396	* @arg UART_WAKEUPMETHOD_ADDRESSMARK: WakeUp by an address mark
bogdanm	0:9b334a45a8ff	397	* @note If the user resorts to idle line detection wake up, the Address parameter
bogdanm	0:9b334a45a8ff	398	* is useless and ignored by the initialization function.
bogdanm	0:9b334a45a8ff	399	* @note If the user resorts to address mark wake up, the address length detection
bogdanm	0:9b334a45a8ff	400	* is configured by default to 4 bits only. For the UART to be able to
bogdanm	0:9b334a45a8ff	401	* manage 6-, 7- or 8-bit long addresses detection, the API
bogdanm	0:9b334a45a8ff	402	* HAL_MultiProcessorEx_AddressLength_Set() must be called after
bogdanm	0:9b334a45a8ff	403	* HAL_MultiProcessor_Init().
bogdanm	0:9b334a45a8ff	404	* @retval HAL status
bogdanm	0:9b334a45a8ff	405	*/
bogdanm	0:9b334a45a8ff	406	HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod)
bogdanm	0:9b334a45a8ff	407	{
bogdanm	0:9b334a45a8ff	408	/* Check the UART handle allocation */
bogdanm	0:9b334a45a8ff	409	if(huart == HAL_NULL)
bogdanm	0:9b334a45a8ff	410	{
bogdanm	0:9b334a45a8ff	411	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	412	}
bogdanm	0:9b334a45a8ff	413
bogdanm	0:9b334a45a8ff	414	/* Check the wake up method parameter */
bogdanm	0:9b334a45a8ff	415	assert_param(IS_UART_WAKEUPMETHOD(WakeUpMethod));
bogdanm	0:9b334a45a8ff	416
bogdanm	0:9b334a45a8ff	417	if(huart->State == HAL_UART_STATE_RESET)
bogdanm	0:9b334a45a8ff	418	{
bogdanm	0:9b334a45a8ff	419	/* Init the low level hardware : GPIO, CLOCK */
bogdanm	0:9b334a45a8ff	420	HAL_UART_MspInit(huart);
bogdanm	0:9b334a45a8ff	421	}
bogdanm	0:9b334a45a8ff	422
bogdanm	0:9b334a45a8ff	423	huart->State = HAL_UART_STATE_BUSY;
bogdanm	0:9b334a45a8ff	424
bogdanm	0:9b334a45a8ff	425	/* Disable the Peripheral */
bogdanm	0:9b334a45a8ff	426	__HAL_UART_DISABLE(huart);
bogdanm	0:9b334a45a8ff	427
bogdanm	0:9b334a45a8ff	428	/* Set the UART Communication parameters */
bogdanm	0:9b334a45a8ff	429	if (UART_SetConfig(huart) == HAL_ERROR)
bogdanm	0:9b334a45a8ff	430	{
bogdanm	0:9b334a45a8ff	431	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	432	}
bogdanm	0:9b334a45a8ff	433
bogdanm	0:9b334a45a8ff	434	if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT)
bogdanm	0:9b334a45a8ff	435	{
bogdanm	0:9b334a45a8ff	436	UART_AdvFeatureConfig(huart);
bogdanm	0:9b334a45a8ff	437	}
bogdanm	0:9b334a45a8ff	438
bogdanm	0:9b334a45a8ff	439	/* In multiprocessor mode, the following bits must be kept cleared:
bogdanm	0:9b334a45a8ff	440	- LINEN and CLKEN bits in the USART_CR2 register,
bogdanm	0:9b334a45a8ff	441	- SCEN, HDSEL and IREN bits in the USART_CR3 register. */
bogdanm	0:9b334a45a8ff	442	huart->Instance->CR2 &= ~(USART_CR2_LINEN \| USART_CR2_CLKEN);
bogdanm	0:9b334a45a8ff	443	huart->Instance->CR3 &= ~(USART_CR3_SCEN \| USART_CR3_HDSEL \| USART_CR3_IREN);
bogdanm	0:9b334a45a8ff	444
bogdanm	0:9b334a45a8ff	445	if (WakeUpMethod == UART_WAKEUPMETHOD_ADDRESSMARK)
bogdanm	0:9b334a45a8ff	446	{
bogdanm	0:9b334a45a8ff	447	/* If address mark wake up method is chosen, set the USART address node */
bogdanm	0:9b334a45a8ff	448	MODIFY_REG(huart->Instance->CR2, USART_CR2_ADD, ((uint32_t)Address << UART_CR2_ADDRESS_LSB_POS));
bogdanm	0:9b334a45a8ff	449	}
bogdanm	0:9b334a45a8ff	450
bogdanm	0:9b334a45a8ff	451	/* Set the wake up method by setting the WAKE bit in the CR1 register */
bogdanm	0:9b334a45a8ff	452	MODIFY_REG(huart->Instance->CR1, USART_CR1_WAKE, WakeUpMethod);
bogdanm	0:9b334a45a8ff	453
bogdanm	0:9b334a45a8ff	454	/* Enable the Peripheral */
bogdanm	0:9b334a45a8ff	455	__HAL_UART_ENABLE(huart);
bogdanm	0:9b334a45a8ff	456
bogdanm	0:9b334a45a8ff	457	/* TEACK and/or REACK to check before moving huart->State to Ready */
bogdanm	0:9b334a45a8ff	458	return (UART_CheckIdleState(huart));
bogdanm	0:9b334a45a8ff	459	}
bogdanm	0:9b334a45a8ff	460
bogdanm	0:9b334a45a8ff	461
bogdanm	0:9b334a45a8ff	462
bogdanm	0:9b334a45a8ff	463
bogdanm	0:9b334a45a8ff	464	/**
bogdanm	0:9b334a45a8ff	465	* @brief DeInitializes the UART peripheral
bogdanm	0:9b334a45a8ff	466	* @param huart: uart handle
bogdanm	0:9b334a45a8ff	467	* @retval HAL status
bogdanm	0:9b334a45a8ff	468	*/
bogdanm	0:9b334a45a8ff	469	HAL_StatusTypeDef HAL_UART_DeInit(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	470	{
bogdanm	0:9b334a45a8ff	471	/* Check the UART handle allocation */
bogdanm	0:9b334a45a8ff	472	if(huart == HAL_NULL)
bogdanm	0:9b334a45a8ff	473	{
bogdanm	0:9b334a45a8ff	474	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	475	}
bogdanm	0:9b334a45a8ff	476
bogdanm	0:9b334a45a8ff	477	/* Check the parameters */
bogdanm	0:9b334a45a8ff	478	assert_param(IS_UART_INSTANCE(huart->Instance));
bogdanm	0:9b334a45a8ff	479
bogdanm	0:9b334a45a8ff	480	huart->State = HAL_UART_STATE_BUSY;
bogdanm	0:9b334a45a8ff	481
bogdanm	0:9b334a45a8ff	482	/* Disable the Peripheral */
bogdanm	0:9b334a45a8ff	483	__HAL_UART_DISABLE(huart);
bogdanm	0:9b334a45a8ff	484
bogdanm	0:9b334a45a8ff	485	huart->Instance->CR1 = 0x0;
bogdanm	0:9b334a45a8ff	486	huart->Instance->CR2 = 0x0;
bogdanm	0:9b334a45a8ff	487	huart->Instance->CR3 = 0x0;
bogdanm	0:9b334a45a8ff	488
bogdanm	0:9b334a45a8ff	489	/* DeInit the low level hardware */
bogdanm	0:9b334a45a8ff	490	HAL_UART_MspDeInit(huart);
bogdanm	0:9b334a45a8ff	491
bogdanm	0:9b334a45a8ff	492	huart->ErrorCode = HAL_UART_ERROR_NONE;
bogdanm	0:9b334a45a8ff	493	huart->State = HAL_UART_STATE_RESET;
bogdanm	0:9b334a45a8ff	494
bogdanm	0:9b334a45a8ff	495	/* Process Unlock */
bogdanm	0:9b334a45a8ff	496	__HAL_UNLOCK(huart);
bogdanm	0:9b334a45a8ff	497
bogdanm	0:9b334a45a8ff	498	return HAL_OK;
bogdanm	0:9b334a45a8ff	499	}
bogdanm	0:9b334a45a8ff	500
bogdanm	0:9b334a45a8ff	501	/**
bogdanm	0:9b334a45a8ff	502	* @brief UART MSP Init
bogdanm	0:9b334a45a8ff	503	* @param huart: uart handle
bogdanm	0:9b334a45a8ff	504	* @retval None
bogdanm	0:9b334a45a8ff	505	*/
bogdanm	0:9b334a45a8ff	506	__weak void HAL_UART_MspInit(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	507	{
bogdanm	0:9b334a45a8ff	508	/* NOTE : This function should not be modified, when the callback is needed,
bogdanm	0:9b334a45a8ff	509	the HAL_UART_MspInit can be implemented in the user file
bogdanm	0:9b334a45a8ff	510	*/
bogdanm	0:9b334a45a8ff	511	}
bogdanm	0:9b334a45a8ff	512
bogdanm	0:9b334a45a8ff	513	/**
bogdanm	0:9b334a45a8ff	514	* @brief UART MSP DeInit
bogdanm	0:9b334a45a8ff	515	* @param huart: uart handle
bogdanm	0:9b334a45a8ff	516	* @retval None
bogdanm	0:9b334a45a8ff	517	*/
bogdanm	0:9b334a45a8ff	518	__weak void HAL_UART_MspDeInit(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	519	{
bogdanm	0:9b334a45a8ff	520	/* NOTE : This function should not be modified, when the callback is needed,
bogdanm	0:9b334a45a8ff	521	the HAL_UART_MspDeInit can be implemented in the user file
bogdanm	0:9b334a45a8ff	522	*/
bogdanm	0:9b334a45a8ff	523	}
bogdanm	0:9b334a45a8ff	524
bogdanm	0:9b334a45a8ff	525	/**
bogdanm	0:9b334a45a8ff	526	* @}
bogdanm	0:9b334a45a8ff	527	*/
bogdanm	0:9b334a45a8ff	528
bogdanm	0:9b334a45a8ff	529	/** @defgroup UART_Exported_Functions_Group2 Input and Output operation functions
bogdanm	0:9b334a45a8ff	530	* @brief UART Transmit/Receive functions
bogdanm	0:9b334a45a8ff	531	*
bogdanm	0:9b334a45a8ff	532	@verbatim
bogdanm	0:9b334a45a8ff	533	===============================================================================
bogdanm	0:9b334a45a8ff	534	##### I/O operation functions #####
bogdanm	0:9b334a45a8ff	535	===============================================================================
bogdanm	0:9b334a45a8ff	536	This subsection provides a set of functions allowing to manage the UART asynchronous
bogdanm	0:9b334a45a8ff	537	and Half duplex data transfers.
bogdanm	0:9b334a45a8ff	538
bogdanm	0:9b334a45a8ff	539	(#) There are two mode of transfer:
bogdanm	0:9b334a45a8ff	540	(+) Blocking mode: The communication is performed in polling mode.
bogdanm	0:9b334a45a8ff	541	The HAL status of all data processing is returned by the same function
bogdanm	0:9b334a45a8ff	542	after finishing transfer.
bogdanm	0:9b334a45a8ff	543	(+) No-Blocking mode: The communication is performed using Interrupts
bogdanm	0:9b334a45a8ff	544	or DMA, These API's return the HAL status.
bogdanm	0:9b334a45a8ff	545	The end of the data processing will be indicated through the
bogdanm	0:9b334a45a8ff	546	dedicated UART IRQ when using Interrupt mode or the DMA IRQ when
bogdanm	0:9b334a45a8ff	547	using DMA mode.
bogdanm	0:9b334a45a8ff	548	The HAL_UART_TxCpltCallback(), HAL_UART_RxCpltCallback() user callbacks
bogdanm	0:9b334a45a8ff	549	will be executed respectivelly at the end of the transmit or Receive process
bogdanm	0:9b334a45a8ff	550	The HAL_UART_ErrorCallback()user callback will be executed when a communication error is detected
bogdanm	0:9b334a45a8ff	551
bogdanm	0:9b334a45a8ff	552	(#) Blocking mode API's are :
bogdanm	0:9b334a45a8ff	553	(+) HAL_UART_Transmit()
bogdanm	0:9b334a45a8ff	554	(+) HAL_UART_Receive()
bogdanm	0:9b334a45a8ff	555
bogdanm	0:9b334a45a8ff	556	(#) Non-Blocking mode API's with Interrupt are :
bogdanm	0:9b334a45a8ff	557	(+) HAL_UART_Transmit_IT()
bogdanm	0:9b334a45a8ff	558	(+) HAL_UART_Receive_IT()
bogdanm	0:9b334a45a8ff	559	(+) HAL_UART_IRQHandler()
bogdanm	0:9b334a45a8ff	560
bogdanm	0:9b334a45a8ff	561	(#) No-Blocking mode API's with DMA are :
bogdanm	0:9b334a45a8ff	562	(+) HAL_UART_Transmit_DMA()
bogdanm	0:9b334a45a8ff	563	(+) HAL_UART_Receive_DMA()
bogdanm	0:9b334a45a8ff	564	(+) HAL_UART_DMAPause()
bogdanm	0:9b334a45a8ff	565	(+) HAL_UART_DMAResume()
bogdanm	0:9b334a45a8ff	566	(+) HAL_UART_DMAStop()
bogdanm	0:9b334a45a8ff	567
bogdanm	0:9b334a45a8ff	568	(#) A set of Transfer Complete Callbacks are provided in No_Blocking mode:
bogdanm	0:9b334a45a8ff	569	(+) HAL_UART_TxHalfCpltCallback()
bogdanm	0:9b334a45a8ff	570	(+) HAL_UART_TxCpltCallback()
bogdanm	0:9b334a45a8ff	571	(+) HAL_UART_RxHalfCpltCallback()
bogdanm	0:9b334a45a8ff	572	(+) HAL_UART_RxCpltCallback()
bogdanm	0:9b334a45a8ff	573	(+) HAL_UART_ErrorCallback()
bogdanm	0:9b334a45a8ff	574
bogdanm	0:9b334a45a8ff	575
bogdanm	0:9b334a45a8ff	576	-@- In the Half duplex communication, it is forbidden to run the transmit
bogdanm	0:9b334a45a8ff	577	and receive process in parallel, the UART state HAL_UART_STATE_BUSY_TX_RX can't be useful.
bogdanm	0:9b334a45a8ff	578
bogdanm	0:9b334a45a8ff	579	@endverbatim
bogdanm	0:9b334a45a8ff	580	* @{
bogdanm	0:9b334a45a8ff	581	*/
bogdanm	0:9b334a45a8ff	582
bogdanm	0:9b334a45a8ff	583	/**
bogdanm	0:9b334a45a8ff	584	* @brief Send an amount of data in blocking mode
bogdanm	0:9b334a45a8ff	585	* @param huart: uart handle
bogdanm	0:9b334a45a8ff	586	* @param pData: pointer to data buffer
bogdanm	0:9b334a45a8ff	587	* @param Size: amount of data to be sent
bogdanm	0:9b334a45a8ff	588	* @param Timeout : Timeout duration
bogdanm	0:9b334a45a8ff	589	* @retval HAL status
bogdanm	0:9b334a45a8ff	590	*/
bogdanm	0:9b334a45a8ff	591	HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef huart, uint8_t pData, uint16_t Size, uint32_t Timeout)
bogdanm	0:9b334a45a8ff	592	{
bogdanm	0:9b334a45a8ff	593	uint16_t* tmp;
bogdanm	0:9b334a45a8ff	594
bogdanm	0:9b334a45a8ff	595	if((huart->State == HAL_UART_STATE_READY) \|\| (huart->State == HAL_UART_STATE_BUSY_RX))
bogdanm	0:9b334a45a8ff	596	{
bogdanm	0:9b334a45a8ff	597	if((pData == HAL_NULL ) \|\| (Size == 0))
bogdanm	0:9b334a45a8ff	598	{
bogdanm	0:9b334a45a8ff	599	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	600	}
bogdanm	0:9b334a45a8ff	601
bogdanm	0:9b334a45a8ff	602	/* Process Locked */
bogdanm	0:9b334a45a8ff	603	__HAL_LOCK(huart);
bogdanm	0:9b334a45a8ff	604
bogdanm	0:9b334a45a8ff	605	huart->ErrorCode = HAL_UART_ERROR_NONE;
bogdanm	0:9b334a45a8ff	606	/* Check if a non-blocking receive process is ongoing or not */
bogdanm	0:9b334a45a8ff	607	if(huart->State == HAL_UART_STATE_BUSY_RX)
bogdanm	0:9b334a45a8ff	608	{
bogdanm	0:9b334a45a8ff	609	huart->State = HAL_UART_STATE_BUSY_TX_RX;
bogdanm	0:9b334a45a8ff	610	}
bogdanm	0:9b334a45a8ff	611	else
bogdanm	0:9b334a45a8ff	612	{
bogdanm	0:9b334a45a8ff	613	huart->State = HAL_UART_STATE_BUSY_TX;
bogdanm	0:9b334a45a8ff	614	}
bogdanm	0:9b334a45a8ff	615
bogdanm	0:9b334a45a8ff	616	huart->TxXferSize = Size;
bogdanm	0:9b334a45a8ff	617	huart->TxXferCount = Size;
bogdanm	0:9b334a45a8ff	618	while(huart->TxXferCount > 0)
bogdanm	0:9b334a45a8ff	619	{
bogdanm	0:9b334a45a8ff	620	huart->TxXferCount--;
bogdanm	0:9b334a45a8ff	621	if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	622	{
bogdanm	0:9b334a45a8ff	623	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	624	}
bogdanm	0:9b334a45a8ff	625	if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
bogdanm	0:9b334a45a8ff	626	{
bogdanm	0:9b334a45a8ff	627	tmp = (uint16_t*) pData;
bogdanm	0:9b334a45a8ff	628	huart->Instance->TDR = (*tmp & (uint16_t)0x01FF);
bogdanm	0:9b334a45a8ff	629	pData += 2;
bogdanm	0:9b334a45a8ff	630	}
bogdanm	0:9b334a45a8ff	631	else
bogdanm	0:9b334a45a8ff	632	{
bogdanm	0:9b334a45a8ff	633	huart->Instance->TDR = (*pData++ & (uint8_t)0xFF);
bogdanm	0:9b334a45a8ff	634	}
bogdanm	0:9b334a45a8ff	635	}
bogdanm	0:9b334a45a8ff	636	if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	637	{
bogdanm	0:9b334a45a8ff	638	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	639	}
bogdanm	0:9b334a45a8ff	640	/* Check if a non-blocking receive Process is ongoing or not */
bogdanm	0:9b334a45a8ff	641	if(huart->State == HAL_UART_STATE_BUSY_TX_RX)
bogdanm	0:9b334a45a8ff	642	{
bogdanm	0:9b334a45a8ff	643	huart->State = HAL_UART_STATE_BUSY_RX;
bogdanm	0:9b334a45a8ff	644	}
bogdanm	0:9b334a45a8ff	645	else
bogdanm	0:9b334a45a8ff	646	{
bogdanm	0:9b334a45a8ff	647	huart->State = HAL_UART_STATE_READY;
bogdanm	0:9b334a45a8ff	648	}
bogdanm	0:9b334a45a8ff	649
bogdanm	0:9b334a45a8ff	650	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	651	__HAL_UNLOCK(huart);
bogdanm	0:9b334a45a8ff	652
bogdanm	0:9b334a45a8ff	653	return HAL_OK;
bogdanm	0:9b334a45a8ff	654	}
bogdanm	0:9b334a45a8ff	655	else
bogdanm	0:9b334a45a8ff	656	{
bogdanm	0:9b334a45a8ff	657	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	658	}
bogdanm	0:9b334a45a8ff	659	}
bogdanm	0:9b334a45a8ff	660
bogdanm	0:9b334a45a8ff	661	/**
bogdanm	0:9b334a45a8ff	662	* @brief Receive an amount of data in blocking mode
bogdanm	0:9b334a45a8ff	663	* @param huart: uart handle
bogdanm	0:9b334a45a8ff	664	* @param pData: pointer to data buffer
bogdanm	0:9b334a45a8ff	665	* @param Size: amount of data to be received
bogdanm	0:9b334a45a8ff	666	* @param Timeout : Timeout duration
bogdanm	0:9b334a45a8ff	667	* @retval HAL status
bogdanm	0:9b334a45a8ff	668	*/
bogdanm	0:9b334a45a8ff	669	HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef huart, uint8_t pData, uint16_t Size, uint32_t Timeout)
bogdanm	0:9b334a45a8ff	670	{
bogdanm	0:9b334a45a8ff	671	uint16_t* tmp;
bogdanm	0:9b334a45a8ff	672	uint16_t uhMask;
bogdanm	0:9b334a45a8ff	673
bogdanm	0:9b334a45a8ff	674	if((huart->State == HAL_UART_STATE_READY) \|\| (huart->State == HAL_UART_STATE_BUSY_TX))
bogdanm	0:9b334a45a8ff	675	{
bogdanm	0:9b334a45a8ff	676	if((pData == HAL_NULL ) \|\| (Size == 0))
bogdanm	0:9b334a45a8ff	677	{
bogdanm	0:9b334a45a8ff	678	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	679	}
bogdanm	0:9b334a45a8ff	680
bogdanm	0:9b334a45a8ff	681	/* Process Locked */
bogdanm	0:9b334a45a8ff	682	__HAL_LOCK(huart);
bogdanm	0:9b334a45a8ff	683
bogdanm	0:9b334a45a8ff	684	huart->ErrorCode = HAL_UART_ERROR_NONE;
bogdanm	0:9b334a45a8ff	685	/* Check if a non-blocking transmit process is ongoing or not */
bogdanm	0:9b334a45a8ff	686	if(huart->State == HAL_UART_STATE_BUSY_TX)
bogdanm	0:9b334a45a8ff	687	{
bogdanm	0:9b334a45a8ff	688	huart->State = HAL_UART_STATE_BUSY_TX_RX;
bogdanm	0:9b334a45a8ff	689	}
bogdanm	0:9b334a45a8ff	690	else
bogdanm	0:9b334a45a8ff	691	{
bogdanm	0:9b334a45a8ff	692	huart->State = HAL_UART_STATE_BUSY_RX;
bogdanm	0:9b334a45a8ff	693	}
bogdanm	0:9b334a45a8ff	694
bogdanm	0:9b334a45a8ff	695	huart->RxXferSize = Size;
bogdanm	0:9b334a45a8ff	696	huart->RxXferCount = Size;
bogdanm	0:9b334a45a8ff	697
bogdanm	0:9b334a45a8ff	698	/* Computation of UART mask to apply to RDR register */
bogdanm	0:9b334a45a8ff	699	__HAL_UART_MASK_COMPUTATION(huart);
bogdanm	0:9b334a45a8ff	700	uhMask = huart->Mask;
bogdanm	0:9b334a45a8ff	701
bogdanm	0:9b334a45a8ff	702	/* as long as data have to be received */
bogdanm	0:9b334a45a8ff	703	while(huart->RxXferCount > 0)
bogdanm	0:9b334a45a8ff	704	{
bogdanm	0:9b334a45a8ff	705	huart->RxXferCount--;
bogdanm	0:9b334a45a8ff	706	if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_RXNE, RESET, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	707	{
bogdanm	0:9b334a45a8ff	708	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	709	}
bogdanm	0:9b334a45a8ff	710	if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
bogdanm	0:9b334a45a8ff	711	{
bogdanm	0:9b334a45a8ff	712	tmp = (uint16_t*) pData ;
bogdanm	0:9b334a45a8ff	713	*tmp = (uint16_t)(huart->Instance->RDR & uhMask);
bogdanm	0:9b334a45a8ff	714	pData +=2;
bogdanm	0:9b334a45a8ff	715	}
bogdanm	0:9b334a45a8ff	716	else
bogdanm	0:9b334a45a8ff	717	{
bogdanm	0:9b334a45a8ff	718	*pData++ = (uint8_t)(huart->Instance->RDR & (uint8_t)uhMask);
bogdanm	0:9b334a45a8ff	719	}
bogdanm	0:9b334a45a8ff	720	}
bogdanm	0:9b334a45a8ff	721
bogdanm	0:9b334a45a8ff	722	/* Check if a non-blocking transmit Process is ongoing or not */
bogdanm	0:9b334a45a8ff	723	if(huart->State == HAL_UART_STATE_BUSY_TX_RX)
bogdanm	0:9b334a45a8ff	724	{
bogdanm	0:9b334a45a8ff	725	huart->State = HAL_UART_STATE_BUSY_TX;
bogdanm	0:9b334a45a8ff	726	}
bogdanm	0:9b334a45a8ff	727	else
bogdanm	0:9b334a45a8ff	728	{
bogdanm	0:9b334a45a8ff	729	huart->State = HAL_UART_STATE_READY;
bogdanm	0:9b334a45a8ff	730	}
bogdanm	0:9b334a45a8ff	731	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	732	__HAL_UNLOCK(huart);
bogdanm	0:9b334a45a8ff	733
bogdanm	0:9b334a45a8ff	734	return HAL_OK;
bogdanm	0:9b334a45a8ff	735	}
bogdanm	0:9b334a45a8ff	736	else
bogdanm	0:9b334a45a8ff	737	{
bogdanm	0:9b334a45a8ff	738	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	739	}
bogdanm	0:9b334a45a8ff	740	}
bogdanm	0:9b334a45a8ff	741
bogdanm	0:9b334a45a8ff	742	/**
bogdanm	0:9b334a45a8ff	743	* @brief Send an amount of data in interrupt mode
bogdanm	0:9b334a45a8ff	744	* @param huart: uart handle
bogdanm	0:9b334a45a8ff	745	* @param pData: pointer to data buffer
bogdanm	0:9b334a45a8ff	746	* @param Size: amount of data to be sent
bogdanm	0:9b334a45a8ff	747	* @retval HAL status
bogdanm	0:9b334a45a8ff	748	*/
bogdanm	0:9b334a45a8ff	749	HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef huart, uint8_t pData, uint16_t Size)
bogdanm	0:9b334a45a8ff	750	{
bogdanm	0:9b334a45a8ff	751	if((huart->State == HAL_UART_STATE_READY) \|\| (huart->State == HAL_UART_STATE_BUSY_RX))
bogdanm	0:9b334a45a8ff	752	{
bogdanm	0:9b334a45a8ff	753	if((pData == HAL_NULL ) \|\| (Size == 0))
bogdanm	0:9b334a45a8ff	754	{
bogdanm	0:9b334a45a8ff	755	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	756	}
bogdanm	0:9b334a45a8ff	757
bogdanm	0:9b334a45a8ff	758	/* Process Locked */
bogdanm	0:9b334a45a8ff	759	__HAL_LOCK(huart);
bogdanm	0:9b334a45a8ff	760
bogdanm	0:9b334a45a8ff	761	huart->pTxBuffPtr = pData;
bogdanm	0:9b334a45a8ff	762	huart->TxXferSize = Size;
bogdanm	0:9b334a45a8ff	763	huart->TxXferCount = Size;
bogdanm	0:9b334a45a8ff	764
bogdanm	0:9b334a45a8ff	765	huart->ErrorCode = HAL_UART_ERROR_NONE;
bogdanm	0:9b334a45a8ff	766	/* Check if a receive process is ongoing or not */
bogdanm	0:9b334a45a8ff	767	if(huart->State == HAL_UART_STATE_BUSY_RX)
bogdanm	0:9b334a45a8ff	768	{
bogdanm	0:9b334a45a8ff	769	huart->State = HAL_UART_STATE_BUSY_TX_RX;
bogdanm	0:9b334a45a8ff	770	}
bogdanm	0:9b334a45a8ff	771	else
bogdanm	0:9b334a45a8ff	772	{
bogdanm	0:9b334a45a8ff	773	huart->State = HAL_UART_STATE_BUSY_TX;
bogdanm	0:9b334a45a8ff	774	}
bogdanm	0:9b334a45a8ff	775
bogdanm	0:9b334a45a8ff	776	/* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */
bogdanm	0:9b334a45a8ff	777	__HAL_UART_ENABLE_IT(huart, UART_IT_ERR);
bogdanm	0:9b334a45a8ff	778
bogdanm	0:9b334a45a8ff	779	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	780	__HAL_UNLOCK(huart);
bogdanm	0:9b334a45a8ff	781
bogdanm	0:9b334a45a8ff	782	/* Enable the UART Transmit Data Register Empty Interrupt */
bogdanm	0:9b334a45a8ff	783	__HAL_UART_ENABLE_IT(huart, UART_IT_TXE);
bogdanm	0:9b334a45a8ff	784
bogdanm	0:9b334a45a8ff	785	return HAL_OK;
bogdanm	0:9b334a45a8ff	786	}
bogdanm	0:9b334a45a8ff	787	else
bogdanm	0:9b334a45a8ff	788	{
bogdanm	0:9b334a45a8ff	789	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	790	}
bogdanm	0:9b334a45a8ff	791	}
bogdanm	0:9b334a45a8ff	792
bogdanm	0:9b334a45a8ff	793	/**
bogdanm	0:9b334a45a8ff	794	* @brief Receive an amount of data in interrupt mode
bogdanm	0:9b334a45a8ff	795	* @param huart: uart handle
bogdanm	0:9b334a45a8ff	796	* @param pData: pointer to data buffer
bogdanm	0:9b334a45a8ff	797	* @param Size: amount of data to be received
bogdanm	0:9b334a45a8ff	798	* @retval HAL status
bogdanm	0:9b334a45a8ff	799	*/
bogdanm	0:9b334a45a8ff	800	HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef huart, uint8_t pData, uint16_t Size)
bogdanm	0:9b334a45a8ff	801	{
bogdanm	0:9b334a45a8ff	802	if((huart->State == HAL_UART_STATE_READY) \|\| (huart->State == HAL_UART_STATE_BUSY_TX))
bogdanm	0:9b334a45a8ff	803	{
bogdanm	0:9b334a45a8ff	804	if((pData == HAL_NULL ) \|\| (Size == 0))
bogdanm	0:9b334a45a8ff	805	{
bogdanm	0:9b334a45a8ff	806	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	807	}
bogdanm	0:9b334a45a8ff	808
bogdanm	0:9b334a45a8ff	809	/* Process Locked */
bogdanm	0:9b334a45a8ff	810	__HAL_LOCK(huart);
bogdanm	0:9b334a45a8ff	811
bogdanm	0:9b334a45a8ff	812	huart->pRxBuffPtr = pData;
bogdanm	0:9b334a45a8ff	813	huart->RxXferSize = Size;
bogdanm	0:9b334a45a8ff	814	huart->RxXferCount = Size;
bogdanm	0:9b334a45a8ff	815
bogdanm	0:9b334a45a8ff	816	/* Computation of UART mask to apply to RDR register */
bogdanm	0:9b334a45a8ff	817	__HAL_UART_MASK_COMPUTATION(huart);
bogdanm	0:9b334a45a8ff	818
bogdanm	0:9b334a45a8ff	819	huart->ErrorCode = HAL_UART_ERROR_NONE;
bogdanm	0:9b334a45a8ff	820	/* Check if a transmit process is ongoing or not */
bogdanm	0:9b334a45a8ff	821	if(huart->State == HAL_UART_STATE_BUSY_TX)
bogdanm	0:9b334a45a8ff	822	{
bogdanm	0:9b334a45a8ff	823	huart->State = HAL_UART_STATE_BUSY_TX_RX;
bogdanm	0:9b334a45a8ff	824	}
bogdanm	0:9b334a45a8ff	825	else
bogdanm	0:9b334a45a8ff	826	{
bogdanm	0:9b334a45a8ff	827	huart->State = HAL_UART_STATE_BUSY_RX;
bogdanm	0:9b334a45a8ff	828	}
bogdanm	0:9b334a45a8ff	829
bogdanm	0:9b334a45a8ff	830	/* Enable the UART Parity Error Interrupt */
bogdanm	0:9b334a45a8ff	831	__HAL_UART_ENABLE_IT(huart, UART_IT_PE);
bogdanm	0:9b334a45a8ff	832
bogdanm	0:9b334a45a8ff	833	/* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */
bogdanm	0:9b334a45a8ff	834	__HAL_UART_ENABLE_IT(huart, UART_IT_ERR);
bogdanm	0:9b334a45a8ff	835
bogdanm	0:9b334a45a8ff	836	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	837	__HAL_UNLOCK(huart);
bogdanm	0:9b334a45a8ff	838
bogdanm	0:9b334a45a8ff	839	/* Enable the UART Data Register not empty Interrupt */
bogdanm	0:9b334a45a8ff	840	__HAL_UART_ENABLE_IT(huart, UART_IT_RXNE);
bogdanm	0:9b334a45a8ff	841
bogdanm	0:9b334a45a8ff	842	return HAL_OK;
bogdanm	0:9b334a45a8ff	843	}
bogdanm	0:9b334a45a8ff	844	else
bogdanm	0:9b334a45a8ff	845	{
bogdanm	0:9b334a45a8ff	846	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	847	}
bogdanm	0:9b334a45a8ff	848	}
bogdanm	0:9b334a45a8ff	849
bogdanm	0:9b334a45a8ff	850	/**
bogdanm	0:9b334a45a8ff	851	* @brief Send an amount of data in DMA mode
bogdanm	0:9b334a45a8ff	852	* @param huart: uart handle
bogdanm	0:9b334a45a8ff	853	* @param pData: pointer to data buffer
bogdanm	0:9b334a45a8ff	854	* @param Size: amount of data to be sent
bogdanm	0:9b334a45a8ff	855	* @retval HAL status
bogdanm	0:9b334a45a8ff	856	*/
bogdanm	0:9b334a45a8ff	857	HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef huart, uint8_t pData, uint16_t Size)
bogdanm	0:9b334a45a8ff	858	{
bogdanm	0:9b334a45a8ff	859	uint32_t *tmp;
bogdanm	0:9b334a45a8ff	860
bogdanm	0:9b334a45a8ff	861	if((huart->State == HAL_UART_STATE_READY) \|\| (huart->State == HAL_UART_STATE_BUSY_RX))
bogdanm	0:9b334a45a8ff	862	{
bogdanm	0:9b334a45a8ff	863	if((pData == HAL_NULL ) \|\| (Size == 0))
bogdanm	0:9b334a45a8ff	864	{
bogdanm	0:9b334a45a8ff	865	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	866	}
bogdanm	0:9b334a45a8ff	867
bogdanm	0:9b334a45a8ff	868	/* Process Locked */
bogdanm	0:9b334a45a8ff	869	__HAL_LOCK(huart);
bogdanm	0:9b334a45a8ff	870
bogdanm	0:9b334a45a8ff	871	huart->pTxBuffPtr = pData;
bogdanm	0:9b334a45a8ff	872	huart->TxXferSize = Size;
bogdanm	0:9b334a45a8ff	873	huart->TxXferCount = Size;
bogdanm	0:9b334a45a8ff	874
bogdanm	0:9b334a45a8ff	875	huart->ErrorCode = HAL_UART_ERROR_NONE;
bogdanm	0:9b334a45a8ff	876	/* Check if a receive process is ongoing or not */
bogdanm	0:9b334a45a8ff	877	if(huart->State == HAL_UART_STATE_BUSY_RX)
bogdanm	0:9b334a45a8ff	878	{
bogdanm	0:9b334a45a8ff	879	huart->State = HAL_UART_STATE_BUSY_TX_RX;
bogdanm	0:9b334a45a8ff	880	}
bogdanm	0:9b334a45a8ff	881	else
bogdanm	0:9b334a45a8ff	882	{
bogdanm	0:9b334a45a8ff	883	huart->State = HAL_UART_STATE_BUSY_TX;
bogdanm	0:9b334a45a8ff	884	}
bogdanm	0:9b334a45a8ff	885
bogdanm	0:9b334a45a8ff	886	/* Set the UART DMA transfer complete callback */
bogdanm	0:9b334a45a8ff	887	huart->hdmatx->XferCpltCallback = UART_DMATransmitCplt;
bogdanm	0:9b334a45a8ff	888
bogdanm	0:9b334a45a8ff	889	/* Set the UART DMA Half transfer complete callback */
bogdanm	0:9b334a45a8ff	890	huart->hdmatx->XferHalfCpltCallback = UART_DMATxHalfCplt;
bogdanm	0:9b334a45a8ff	891
bogdanm	0:9b334a45a8ff	892	/* Set the DMA error callback */
bogdanm	0:9b334a45a8ff	893	huart->hdmatx->XferErrorCallback = UART_DMAError;
bogdanm	0:9b334a45a8ff	894
bogdanm	0:9b334a45a8ff	895	/* Enable the UART transmit DMA channel */
bogdanm	0:9b334a45a8ff	896	tmp = (uint32_t*)&pData;
bogdanm	0:9b334a45a8ff	897	HAL_DMA_Start_IT(huart->hdmatx, (uint32_t)tmp, (uint32_t)&huart->Instance->TDR, Size);
bogdanm	0:9b334a45a8ff	898
bogdanm	0:9b334a45a8ff	899	/* Enable the DMA transfer for transmit request by setting the DMAT bit
bogdanm	0:9b334a45a8ff	900	in the UART CR3 register */
bogdanm	0:9b334a45a8ff	901	huart->Instance->CR3 \|= USART_CR3_DMAT;
bogdanm	0:9b334a45a8ff	902
bogdanm	0:9b334a45a8ff	903	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	904	__HAL_UNLOCK(huart);
bogdanm	0:9b334a45a8ff	905
bogdanm	0:9b334a45a8ff	906	return HAL_OK;
bogdanm	0:9b334a45a8ff	907	}
bogdanm	0:9b334a45a8ff	908	else
bogdanm	0:9b334a45a8ff	909	{
bogdanm	0:9b334a45a8ff	910	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	911	}
bogdanm	0:9b334a45a8ff	912	}
bogdanm	0:9b334a45a8ff	913
bogdanm	0:9b334a45a8ff	914	/**
bogdanm	0:9b334a45a8ff	915	* @brief Receive an amount of data in DMA mode
bogdanm	0:9b334a45a8ff	916	* @param huart: uart handle
bogdanm	0:9b334a45a8ff	917	* @param pData: pointer to data buffer
bogdanm	0:9b334a45a8ff	918	* @param Size: amount of data to be received
bogdanm	0:9b334a45a8ff	919	* @note When the UART parity is enabled (PCE = 1), the received data contain
bogdanm	0:9b334a45a8ff	920	* the parity bit (MSB position)
bogdanm	0:9b334a45a8ff	921	* @retval HAL status
bogdanm	0:9b334a45a8ff	922	*/
bogdanm	0:9b334a45a8ff	923	HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef huart, uint8_t pData, uint16_t Size)
bogdanm	0:9b334a45a8ff	924	{
bogdanm	0:9b334a45a8ff	925	uint32_t *tmp;
bogdanm	0:9b334a45a8ff	926
bogdanm	0:9b334a45a8ff	927	if((huart->State == HAL_UART_STATE_READY) \|\| (huart->State == HAL_UART_STATE_BUSY_TX))
bogdanm	0:9b334a45a8ff	928	{
bogdanm	0:9b334a45a8ff	929	if((pData == HAL_NULL ) \|\| (Size == 0))
bogdanm	0:9b334a45a8ff	930	{
bogdanm	0:9b334a45a8ff	931	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	932	}
bogdanm	0:9b334a45a8ff	933
bogdanm	0:9b334a45a8ff	934	/* Process Locked */
bogdanm	0:9b334a45a8ff	935	__HAL_LOCK(huart);
bogdanm	0:9b334a45a8ff	936
bogdanm	0:9b334a45a8ff	937	huart->pRxBuffPtr = pData;
bogdanm	0:9b334a45a8ff	938	huart->RxXferSize = Size;
bogdanm	0:9b334a45a8ff	939
bogdanm	0:9b334a45a8ff	940	huart->ErrorCode = HAL_UART_ERROR_NONE;
bogdanm	0:9b334a45a8ff	941	/* Check if a transmit process is ongoing or not */
bogdanm	0:9b334a45a8ff	942	if(huart->State == HAL_UART_STATE_BUSY_TX)
bogdanm	0:9b334a45a8ff	943	{
bogdanm	0:9b334a45a8ff	944	huart->State = HAL_UART_STATE_BUSY_TX_RX;
bogdanm	0:9b334a45a8ff	945	}
bogdanm	0:9b334a45a8ff	946	else
bogdanm	0:9b334a45a8ff	947	{
bogdanm	0:9b334a45a8ff	948	huart->State = HAL_UART_STATE_BUSY_RX;
bogdanm	0:9b334a45a8ff	949	}
bogdanm	0:9b334a45a8ff	950
bogdanm	0:9b334a45a8ff	951	/* Set the UART DMA transfer complete callback */
bogdanm	0:9b334a45a8ff	952	huart->hdmarx->XferCpltCallback = UART_DMAReceiveCplt;
bogdanm	0:9b334a45a8ff	953
bogdanm	0:9b334a45a8ff	954	/* Set the UART DMA Half transfer complete callback */
bogdanm	0:9b334a45a8ff	955	huart->hdmarx->XferHalfCpltCallback = UART_DMARxHalfCplt;
bogdanm	0:9b334a45a8ff	956
bogdanm	0:9b334a45a8ff	957	/* Set the DMA error callback */
bogdanm	0:9b334a45a8ff	958	huart->hdmarx->XferErrorCallback = UART_DMAError;
bogdanm	0:9b334a45a8ff	959
bogdanm	0:9b334a45a8ff	960	/* Enable the DMA channel */
bogdanm	0:9b334a45a8ff	961	tmp = (uint32_t*)&pData;
bogdanm	0:9b334a45a8ff	962	HAL_DMA_Start_IT(huart->hdmarx, (uint32_t)&huart->Instance->RDR, (uint32_t)tmp, Size);
bogdanm	0:9b334a45a8ff	963
bogdanm	0:9b334a45a8ff	964	/* Enable the DMA transfer for the receiver request by setting the DMAR bit
bogdanm	0:9b334a45a8ff	965	in the UART CR3 register */
bogdanm	0:9b334a45a8ff	966	huart->Instance->CR3 \|= USART_CR3_DMAR;
bogdanm	0:9b334a45a8ff	967
bogdanm	0:9b334a45a8ff	968	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	969	__HAL_UNLOCK(huart);
bogdanm	0:9b334a45a8ff	970
bogdanm	0:9b334a45a8ff	971	return HAL_OK;
bogdanm	0:9b334a45a8ff	972	}
bogdanm	0:9b334a45a8ff	973	else
bogdanm	0:9b334a45a8ff	974	{
bogdanm	0:9b334a45a8ff	975	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	976	}
bogdanm	0:9b334a45a8ff	977	}
bogdanm	0:9b334a45a8ff	978
bogdanm	0:9b334a45a8ff	979	/**
bogdanm	0:9b334a45a8ff	980	* @brief Pauses the DMA Transfer.
bogdanm	0:9b334a45a8ff	981	* @param huart: UART handle
bogdanm	0:9b334a45a8ff	982	* @retval None
bogdanm	0:9b334a45a8ff	983	*/
bogdanm	0:9b334a45a8ff	984	HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	985	{
bogdanm	0:9b334a45a8ff	986	/* Process Locked */
bogdanm	0:9b334a45a8ff	987	__HAL_LOCK(huart);
bogdanm	0:9b334a45a8ff	988
bogdanm	0:9b334a45a8ff	989	if(huart->State == HAL_UART_STATE_BUSY_TX)
bogdanm	0:9b334a45a8ff	990	{
bogdanm	0:9b334a45a8ff	991	/* Disable the UART DMA Tx request */
bogdanm	0:9b334a45a8ff	992	huart->Instance->CR3 &= (uint32_t)(~USART_CR3_DMAT);
bogdanm	0:9b334a45a8ff	993	}
bogdanm	0:9b334a45a8ff	994	else if(huart->State == HAL_UART_STATE_BUSY_RX)
bogdanm	0:9b334a45a8ff	995	{
bogdanm	0:9b334a45a8ff	996	/* Disable the UART DMA Rx request */
bogdanm	0:9b334a45a8ff	997	huart->Instance->CR3 &= (uint32_t)(~USART_CR3_DMAR);
bogdanm	0:9b334a45a8ff	998	}
bogdanm	0:9b334a45a8ff	999	else if(huart->State == HAL_UART_STATE_BUSY_TX_RX)
bogdanm	0:9b334a45a8ff	1000	{
bogdanm	0:9b334a45a8ff	1001	/* Disable the UART DMA Tx request */
bogdanm	0:9b334a45a8ff	1002	huart->Instance->CR3 &= (uint32_t)(~USART_CR3_DMAT);
bogdanm	0:9b334a45a8ff	1003	/* Disable the UART DMA Rx request */
bogdanm	0:9b334a45a8ff	1004	huart->Instance->CR3 &= (uint32_t)(~USART_CR3_DMAR);
bogdanm	0:9b334a45a8ff	1005	}
bogdanm	0:9b334a45a8ff	1006
bogdanm	0:9b334a45a8ff	1007	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1008	__HAL_UNLOCK(huart);
bogdanm	0:9b334a45a8ff	1009
bogdanm	0:9b334a45a8ff	1010	return HAL_OK;
bogdanm	0:9b334a45a8ff	1011	}
bogdanm	0:9b334a45a8ff	1012
bogdanm	0:9b334a45a8ff	1013	/**
bogdanm	0:9b334a45a8ff	1014	* @brief Resumes the DMA Transfer.
bogdanm	0:9b334a45a8ff	1015	* @param huart: UART handle
bogdanm	0:9b334a45a8ff	1016	* @retval None
bogdanm	0:9b334a45a8ff	1017	*/
bogdanm	0:9b334a45a8ff	1018	HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	1019	{
bogdanm	0:9b334a45a8ff	1020	/* Process Locked */
bogdanm	0:9b334a45a8ff	1021	__HAL_LOCK(huart);
bogdanm	0:9b334a45a8ff	1022
bogdanm	0:9b334a45a8ff	1023	if(huart->State == HAL_UART_STATE_BUSY_TX)
bogdanm	0:9b334a45a8ff	1024	{
bogdanm	0:9b334a45a8ff	1025	/* Enable the UART DMA Tx request */
bogdanm	0:9b334a45a8ff	1026	huart->Instance->CR3 \|= USART_CR3_DMAT;
bogdanm	0:9b334a45a8ff	1027	}
bogdanm	0:9b334a45a8ff	1028	else if(huart->State == HAL_UART_STATE_BUSY_RX)
bogdanm	0:9b334a45a8ff	1029	{
bogdanm	0:9b334a45a8ff	1030	/* Enable the UART DMA Rx request */
bogdanm	0:9b334a45a8ff	1031	huart->Instance->CR3 \|= USART_CR3_DMAR;
bogdanm	0:9b334a45a8ff	1032	}
bogdanm	0:9b334a45a8ff	1033	else if(huart->State == HAL_UART_STATE_BUSY_TX_RX)
bogdanm	0:9b334a45a8ff	1034	{
bogdanm	0:9b334a45a8ff	1035	/* Enable the UART DMA Rx request before the DMA Tx request */
bogdanm	0:9b334a45a8ff	1036	huart->Instance->CR3 \|= USART_CR3_DMAR;
bogdanm	0:9b334a45a8ff	1037	/* Enable the UART DMA Tx request */
bogdanm	0:9b334a45a8ff	1038	huart->Instance->CR3 \|= USART_CR3_DMAT;
bogdanm	0:9b334a45a8ff	1039	}
bogdanm	0:9b334a45a8ff	1040
bogdanm	0:9b334a45a8ff	1041	/* If the UART peripheral is still not enabled, enable it */
bogdanm	0:9b334a45a8ff	1042	if ((huart->Instance->CR1 & USART_CR1_UE) == 0)
bogdanm	0:9b334a45a8ff	1043	{
bogdanm	0:9b334a45a8ff	1044	/* Enable UART peripheral */
bogdanm	0:9b334a45a8ff	1045	__HAL_UART_ENABLE(huart);
bogdanm	0:9b334a45a8ff	1046	}
bogdanm	0:9b334a45a8ff	1047
bogdanm	0:9b334a45a8ff	1048	/* TEACK and/or REACK to check before moving huart->State to Ready */
bogdanm	0:9b334a45a8ff	1049	return (UART_CheckIdleState(huart));
bogdanm	0:9b334a45a8ff	1050	}
bogdanm	0:9b334a45a8ff	1051
bogdanm	0:9b334a45a8ff	1052	/**
bogdanm	0:9b334a45a8ff	1053	* @brief Stops the DMA Transfer.
bogdanm	0:9b334a45a8ff	1054	* @param huart: UART handle
bogdanm	0:9b334a45a8ff	1055	* @retval None
bogdanm	0:9b334a45a8ff	1056	*/
bogdanm	0:9b334a45a8ff	1057	HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	1058	{
bogdanm	0:9b334a45a8ff	1059	/* Process Locked */
bogdanm	0:9b334a45a8ff	1060	__HAL_LOCK(huart);
bogdanm	0:9b334a45a8ff	1061
bogdanm	0:9b334a45a8ff	1062	/* Disable the UART Tx/Rx DMA requests */
bogdanm	0:9b334a45a8ff	1063	huart->Instance->CR3 &= ~USART_CR3_DMAT;
bogdanm	0:9b334a45a8ff	1064	huart->Instance->CR3 &= ~USART_CR3_DMAR;
bogdanm	0:9b334a45a8ff	1065
bogdanm	0:9b334a45a8ff	1066	/* Abort the UART DMA tx channel */
bogdanm	0:9b334a45a8ff	1067	if(huart->hdmatx != HAL_NULL)
bogdanm	0:9b334a45a8ff	1068	{
bogdanm	0:9b334a45a8ff	1069	HAL_DMA_Abort(huart->hdmatx);
bogdanm	0:9b334a45a8ff	1070	}
bogdanm	0:9b334a45a8ff	1071	/* Abort the UART DMA rx channel */
bogdanm	0:9b334a45a8ff	1072	if(huart->hdmarx != HAL_NULL)
bogdanm	0:9b334a45a8ff	1073	{
bogdanm	0:9b334a45a8ff	1074	HAL_DMA_Abort(huart->hdmarx);
bogdanm	0:9b334a45a8ff	1075	}
bogdanm	0:9b334a45a8ff	1076
bogdanm	0:9b334a45a8ff	1077	/* Disable UART peripheral */
bogdanm	0:9b334a45a8ff	1078	__HAL_UART_DISABLE(huart);
bogdanm	0:9b334a45a8ff	1079
bogdanm	0:9b334a45a8ff	1080	huart->State = HAL_UART_STATE_READY;
bogdanm	0:9b334a45a8ff	1081
bogdanm	0:9b334a45a8ff	1082	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1083	__HAL_UNLOCK(huart);
bogdanm	0:9b334a45a8ff	1084
bogdanm	0:9b334a45a8ff	1085	return HAL_OK;
bogdanm	0:9b334a45a8ff	1086	}
bogdanm	0:9b334a45a8ff	1087
bogdanm	0:9b334a45a8ff	1088	/**
bogdanm	0:9b334a45a8ff	1089	* @brief This function handles UART interrupt request.
bogdanm	0:9b334a45a8ff	1090	* @param huart: uart handle
bogdanm	0:9b334a45a8ff	1091	* @retval None
bogdanm	0:9b334a45a8ff	1092	*/
bogdanm	0:9b334a45a8ff	1093	void HAL_UART_IRQHandler(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	1094	{
bogdanm	0:9b334a45a8ff	1095	/* UART parity error interrupt occurred -------------------------------------*/
bogdanm	0:9b334a45a8ff	1096	if((__HAL_UART_GET_IT(huart, UART_IT_PE) != RESET) && (__HAL_UART_GET_IT_SOURCE(huart, UART_IT_PE) != RESET))
bogdanm	0:9b334a45a8ff	1097	{
bogdanm	0:9b334a45a8ff	1098	__HAL_UART_CLEAR_IT(huart, UART_CLEAR_PEF);
bogdanm	0:9b334a45a8ff	1099
bogdanm	0:9b334a45a8ff	1100	huart->ErrorCode \|= HAL_UART_ERROR_PE;
bogdanm	0:9b334a45a8ff	1101	/* Set the UART state ready to be able to start again the process */
bogdanm	0:9b334a45a8ff	1102	huart->State = HAL_UART_STATE_READY;
bogdanm	0:9b334a45a8ff	1103	}
bogdanm	0:9b334a45a8ff	1104
bogdanm	0:9b334a45a8ff	1105	/* UART frame error interrupt occured --------------------------------------*/
bogdanm	0:9b334a45a8ff	1106	if((__HAL_UART_GET_IT(huart, UART_IT_FE) != RESET) && (__HAL_UART_GET_IT_SOURCE(huart, UART_IT_ERR) != RESET))
bogdanm	0:9b334a45a8ff	1107	{
bogdanm	0:9b334a45a8ff	1108	__HAL_UART_CLEAR_IT(huart, UART_CLEAR_FEF);
bogdanm	0:9b334a45a8ff	1109
bogdanm	0:9b334a45a8ff	1110	huart->ErrorCode \|= HAL_UART_ERROR_FE;
bogdanm	0:9b334a45a8ff	1111	/* Set the UART state ready to be able to start again the process */
bogdanm	0:9b334a45a8ff	1112	huart->State = HAL_UART_STATE_READY;
bogdanm	0:9b334a45a8ff	1113	}
bogdanm	0:9b334a45a8ff	1114
bogdanm	0:9b334a45a8ff	1115	/* UART noise error interrupt occured --------------------------------------*/
bogdanm	0:9b334a45a8ff	1116	if((__HAL_UART_GET_IT(huart, UART_IT_NE) != RESET) && (__HAL_UART_GET_IT_SOURCE(huart, UART_IT_ERR) != RESET))
bogdanm	0:9b334a45a8ff	1117	{
bogdanm	0:9b334a45a8ff	1118	__HAL_UART_CLEAR_IT(huart, UART_CLEAR_NEF);
bogdanm	0:9b334a45a8ff	1119
bogdanm	0:9b334a45a8ff	1120	huart->ErrorCode \|= HAL_UART_ERROR_NE;
bogdanm	0:9b334a45a8ff	1121	/* Set the UART state ready to be able to start again the process */
bogdanm	0:9b334a45a8ff	1122	huart->State = HAL_UART_STATE_READY;
bogdanm	0:9b334a45a8ff	1123	}
bogdanm	0:9b334a45a8ff	1124
bogdanm	0:9b334a45a8ff	1125	/* UART Over-Run interrupt occured -----------------------------------------*/
bogdanm	0:9b334a45a8ff	1126	if((__HAL_UART_GET_IT(huart, UART_IT_ORE) != RESET) && (__HAL_UART_GET_IT_SOURCE(huart, UART_IT_ERR) != RESET))
bogdanm	0:9b334a45a8ff	1127	{
bogdanm	0:9b334a45a8ff	1128	__HAL_UART_CLEAR_IT(huart, UART_CLEAR_OREF);
bogdanm	0:9b334a45a8ff	1129
bogdanm	0:9b334a45a8ff	1130	huart->ErrorCode \|= HAL_UART_ERROR_ORE;
bogdanm	0:9b334a45a8ff	1131	/* Set the UART state ready to be able to start again the process */
bogdanm	0:9b334a45a8ff	1132	huart->State = HAL_UART_STATE_READY;
bogdanm	0:9b334a45a8ff	1133	}
bogdanm	0:9b334a45a8ff	1134
bogdanm	0:9b334a45a8ff	1135	/* Call UART Error Call back function if need be --------------------------*/
bogdanm	0:9b334a45a8ff	1136	if(huart->ErrorCode != HAL_UART_ERROR_NONE)
bogdanm	0:9b334a45a8ff	1137	{
bogdanm	0:9b334a45a8ff	1138	HAL_UART_ErrorCallback(huart);
bogdanm	0:9b334a45a8ff	1139	}
bogdanm	0:9b334a45a8ff	1140
bogdanm	0:9b334a45a8ff	1141	/* UART wakeup from Stop mode interrupt occurred -------------------------------------*/
bogdanm	0:9b334a45a8ff	1142	if((__HAL_UART_GET_IT(huart, UART_IT_WUF) != RESET) && (__HAL_UART_GET_IT_SOURCE(huart, UART_IT_WUF) != RESET))
bogdanm	0:9b334a45a8ff	1143	{
bogdanm	0:9b334a45a8ff	1144	__HAL_UART_CLEAR_IT(huart, UART_CLEAR_WUF);
bogdanm	0:9b334a45a8ff	1145	/* Set the UART state ready to be able to start again the process */
bogdanm	0:9b334a45a8ff	1146	huart->State = HAL_UART_STATE_READY;
bogdanm	0:9b334a45a8ff	1147	HAL_UART_WakeupCallback(huart);
bogdanm	0:9b334a45a8ff	1148	}
bogdanm	0:9b334a45a8ff	1149
bogdanm	0:9b334a45a8ff	1150	/* UART in mode Receiver ---------------------------------------------------*/
bogdanm	0:9b334a45a8ff	1151	if((__HAL_UART_GET_IT(huart, UART_IT_RXNE) != RESET) && (__HAL_UART_GET_IT_SOURCE(huart, UART_IT_RXNE) != RESET))
bogdanm	0:9b334a45a8ff	1152	{
bogdanm	0:9b334a45a8ff	1153	UART_Receive_IT(huart);
bogdanm	0:9b334a45a8ff	1154	/* Clear RXNE interrupt flag */
bogdanm	0:9b334a45a8ff	1155	__HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
bogdanm	0:9b334a45a8ff	1156	}
bogdanm	0:9b334a45a8ff	1157
bogdanm	0:9b334a45a8ff	1158
bogdanm	0:9b334a45a8ff	1159	/* UART in mode Transmitter ------------------------------------------------*/
bogdanm	0:9b334a45a8ff	1160	if((__HAL_UART_GET_IT(huart, UART_IT_TXE) != RESET) &&(__HAL_UART_GET_IT_SOURCE(huart, UART_IT_TXE) != RESET))
bogdanm	0:9b334a45a8ff	1161	{
bogdanm	0:9b334a45a8ff	1162	UART_Transmit_IT(huart);
bogdanm	0:9b334a45a8ff	1163	}
bogdanm	0:9b334a45a8ff	1164
bogdanm	0:9b334a45a8ff	1165	/* UART in mode Transmitter (transmission end) -----------------------------*/
bogdanm	0:9b334a45a8ff	1166	if((__HAL_UART_GET_IT(huart, UART_IT_TC) != RESET) &&(__HAL_UART_GET_IT_SOURCE(huart, UART_IT_TC) != RESET))
bogdanm	0:9b334a45a8ff	1167	{
bogdanm	0:9b334a45a8ff	1168	UART_EndTransmit_IT(huart);
bogdanm	0:9b334a45a8ff	1169	}
bogdanm	0:9b334a45a8ff	1170
bogdanm	0:9b334a45a8ff	1171	}
bogdanm	0:9b334a45a8ff	1172
bogdanm	0:9b334a45a8ff	1173
bogdanm	0:9b334a45a8ff	1174	/**
bogdanm	0:9b334a45a8ff	1175	* @brief This function handles UART Communication Timeout.
bogdanm	0:9b334a45a8ff	1176	* @param huart: UART handle
bogdanm	0:9b334a45a8ff	1177	* @param Flag: specifies the UART flag to check.
bogdanm	0:9b334a45a8ff	1178	* @param Status: The new Flag status (SET or RESET).
bogdanm	0:9b334a45a8ff	1179	* @param Timeout: Timeout duration
bogdanm	0:9b334a45a8ff	1180	* @retval HAL status
bogdanm	0:9b334a45a8ff	1181	*/
bogdanm	0:9b334a45a8ff	1182	HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Timeout)
bogdanm	0:9b334a45a8ff	1183	{
bogdanm	0:9b334a45a8ff	1184	uint32_t tickstart = HAL_GetTick();
bogdanm	0:9b334a45a8ff	1185
bogdanm	0:9b334a45a8ff	1186	/* Wait until flag is set */
bogdanm	0:9b334a45a8ff	1187	if(Status == RESET)
bogdanm	0:9b334a45a8ff	1188	{
bogdanm	0:9b334a45a8ff	1189	while(__HAL_UART_GET_FLAG(huart, Flag) == RESET)
bogdanm	0:9b334a45a8ff	1190	{
bogdanm	0:9b334a45a8ff	1191	/* Check for the Timeout */
bogdanm	0:9b334a45a8ff	1192	if(Timeout != HAL_MAX_DELAY)
bogdanm	0:9b334a45a8ff	1193	{
bogdanm	0:9b334a45a8ff	1194	if((Timeout == 0) \|\| ((HAL_GetTick()-tickstart) > Timeout))
bogdanm	0:9b334a45a8ff	1195	{
bogdanm	0:9b334a45a8ff	1196	/* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
bogdanm	0:9b334a45a8ff	1197	__HAL_UART_DISABLE_IT(huart, UART_IT_TXE);
bogdanm	0:9b334a45a8ff	1198	__HAL_UART_DISABLE_IT(huart, UART_IT_RXNE);
bogdanm	0:9b334a45a8ff	1199	__HAL_UART_DISABLE_IT(huart, UART_IT_PE);
bogdanm	0:9b334a45a8ff	1200	__HAL_UART_DISABLE_IT(huart, UART_IT_ERR);
bogdanm	0:9b334a45a8ff	1201
bogdanm	0:9b334a45a8ff	1202	huart->State = HAL_UART_STATE_TIMEOUT;
bogdanm	0:9b334a45a8ff	1203
bogdanm	0:9b334a45a8ff	1204	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1205	__HAL_UNLOCK(huart);
bogdanm	0:9b334a45a8ff	1206
bogdanm	0:9b334a45a8ff	1207	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	1208	}
bogdanm	0:9b334a45a8ff	1209	}
bogdanm	0:9b334a45a8ff	1210	}
bogdanm	0:9b334a45a8ff	1211	}
bogdanm	0:9b334a45a8ff	1212	else
bogdanm	0:9b334a45a8ff	1213	{
bogdanm	0:9b334a45a8ff	1214	while(__HAL_UART_GET_FLAG(huart, Flag) != RESET)
bogdanm	0:9b334a45a8ff	1215	{
bogdanm	0:9b334a45a8ff	1216	/* Check for the Timeout */
bogdanm	0:9b334a45a8ff	1217	if(Timeout != HAL_MAX_DELAY)
bogdanm	0:9b334a45a8ff	1218	{
bogdanm	0:9b334a45a8ff	1219	if((Timeout == 0) \|\| ((HAL_GetTick()-tickstart) > Timeout))
bogdanm	0:9b334a45a8ff	1220	{
bogdanm	0:9b334a45a8ff	1221	/* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
bogdanm	0:9b334a45a8ff	1222	__HAL_UART_DISABLE_IT(huart, UART_IT_TXE);
bogdanm	0:9b334a45a8ff	1223	__HAL_UART_DISABLE_IT(huart, UART_IT_RXNE);
bogdanm	0:9b334a45a8ff	1224	__HAL_UART_DISABLE_IT(huart, UART_IT_PE);
bogdanm	0:9b334a45a8ff	1225	__HAL_UART_DISABLE_IT(huart, UART_IT_ERR);
bogdanm	0:9b334a45a8ff	1226
bogdanm	0:9b334a45a8ff	1227	huart->State = HAL_UART_STATE_TIMEOUT;
bogdanm	0:9b334a45a8ff	1228
bogdanm	0:9b334a45a8ff	1229	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1230	__HAL_UNLOCK(huart);
bogdanm	0:9b334a45a8ff	1231
bogdanm	0:9b334a45a8ff	1232	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	1233	}
bogdanm	0:9b334a45a8ff	1234	}
bogdanm	0:9b334a45a8ff	1235	}
bogdanm	0:9b334a45a8ff	1236	}
bogdanm	0:9b334a45a8ff	1237	return HAL_OK;
bogdanm	0:9b334a45a8ff	1238	}
bogdanm	0:9b334a45a8ff	1239
bogdanm	0:9b334a45a8ff	1240	/**
bogdanm	0:9b334a45a8ff	1241	* @brief Tx Transfer completed callbacks
bogdanm	0:9b334a45a8ff	1242	* @param huart: uart handle
bogdanm	0:9b334a45a8ff	1243	* @retval None
bogdanm	0:9b334a45a8ff	1244	*/
bogdanm	0:9b334a45a8ff	1245	__weak void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	1246	{
bogdanm	0:9b334a45a8ff	1247	/* NOTE : This function should not be modified, when the callback is needed,
bogdanm	0:9b334a45a8ff	1248	the HAL_UART_TxCpltCallback can be implemented in the user file
bogdanm	0:9b334a45a8ff	1249	*/
bogdanm	0:9b334a45a8ff	1250	}
bogdanm	0:9b334a45a8ff	1251
bogdanm	0:9b334a45a8ff	1252	/**
bogdanm	0:9b334a45a8ff	1253	* @brief Tx Half Transfer completed callbacks.
bogdanm	0:9b334a45a8ff	1254	* @param huart: UART handle
bogdanm	0:9b334a45a8ff	1255	* @retval None
bogdanm	0:9b334a45a8ff	1256	*/
bogdanm	0:9b334a45a8ff	1257	__weak void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	1258	{
bogdanm	0:9b334a45a8ff	1259	/* NOTE: This function should not be modified, when the callback is needed,
bogdanm	0:9b334a45a8ff	1260	the HAL_UART_TxHalfCpltCallback can be implemented in the user file
bogdanm	0:9b334a45a8ff	1261	*/
bogdanm	0:9b334a45a8ff	1262	}
bogdanm	0:9b334a45a8ff	1263
bogdanm	0:9b334a45a8ff	1264	/**
bogdanm	0:9b334a45a8ff	1265	* @brief Rx Transfer completed callbacks
bogdanm	0:9b334a45a8ff	1266	* @param huart: uart handle
bogdanm	0:9b334a45a8ff	1267	* @retval None
bogdanm	0:9b334a45a8ff	1268	*/
bogdanm	0:9b334a45a8ff	1269	__weak void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	1270	{
bogdanm	0:9b334a45a8ff	1271	/* NOTE : This function should not be modified, when the callback is needed,
bogdanm	0:9b334a45a8ff	1272	the HAL_UART_RxCpltCallback can be implemented in the user file
bogdanm	0:9b334a45a8ff	1273	*/
bogdanm	0:9b334a45a8ff	1274	}
bogdanm	0:9b334a45a8ff	1275
bogdanm	0:9b334a45a8ff	1276	/**
bogdanm	0:9b334a45a8ff	1277	* @brief Rx Half Transfer completed callbacks.
bogdanm	0:9b334a45a8ff	1278	* @param huart: UART handle
bogdanm	0:9b334a45a8ff	1279	* @retval None
bogdanm	0:9b334a45a8ff	1280	*/
bogdanm	0:9b334a45a8ff	1281	__weak void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	1282	{
bogdanm	0:9b334a45a8ff	1283	/* NOTE: This function should not be modified, when the callback is needed,
bogdanm	0:9b334a45a8ff	1284	the HAL_UART_RxHalfCpltCallback can be implemented in the user file
bogdanm	0:9b334a45a8ff	1285	*/
bogdanm	0:9b334a45a8ff	1286	}
bogdanm	0:9b334a45a8ff	1287
bogdanm	0:9b334a45a8ff	1288	/**
bogdanm	0:9b334a45a8ff	1289	* @brief UART error callbacks
bogdanm	0:9b334a45a8ff	1290	* @param huart: uart handle
bogdanm	0:9b334a45a8ff	1291	* @retval None
bogdanm	0:9b334a45a8ff	1292	*/
bogdanm	0:9b334a45a8ff	1293	__weak void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	1294	{
bogdanm	0:9b334a45a8ff	1295	/* NOTE : This function should not be modified, when the callback is needed,
bogdanm	0:9b334a45a8ff	1296	the HAL_UART_ErrorCallback can be implemented in the user file
bogdanm	0:9b334a45a8ff	1297	*/
bogdanm	0:9b334a45a8ff	1298	}
bogdanm	0:9b334a45a8ff	1299
bogdanm	0:9b334a45a8ff	1300	/**
bogdanm	0:9b334a45a8ff	1301	* @brief UART wakeup from Stop mode callback
bogdanm	0:9b334a45a8ff	1302	* @param huart: uart handle
bogdanm	0:9b334a45a8ff	1303	* @retval None
bogdanm	0:9b334a45a8ff	1304	*/
bogdanm	0:9b334a45a8ff	1305	__weak void HAL_UART_WakeupCallback(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	1306	{
bogdanm	0:9b334a45a8ff	1307	/* NOTE : This function should not be modified, when the callback is needed,
bogdanm	0:9b334a45a8ff	1308	the HAL_UART_WakeupCallback can be implemented in the user file
bogdanm	0:9b334a45a8ff	1309	*/
bogdanm	0:9b334a45a8ff	1310	}
bogdanm	0:9b334a45a8ff	1311
bogdanm	0:9b334a45a8ff	1312	/**
bogdanm	0:9b334a45a8ff	1313	* @}
bogdanm	0:9b334a45a8ff	1314	*/
bogdanm	0:9b334a45a8ff	1315
bogdanm	0:9b334a45a8ff	1316	/** @defgroup UART_Exported_Functions_Group3 Peripheral Control functions
bogdanm	0:9b334a45a8ff	1317	* @brief UART control functions
bogdanm	0:9b334a45a8ff	1318	*
bogdanm	0:9b334a45a8ff	1319	@verbatim
bogdanm	0:9b334a45a8ff	1320	===============================================================================
bogdanm	0:9b334a45a8ff	1321	##### Peripheral Control functions #####
bogdanm	0:9b334a45a8ff	1322	===============================================================================
bogdanm	0:9b334a45a8ff	1323	[..]
bogdanm	0:9b334a45a8ff	1324	This subsection provides a set of functions allowing to control the UART.
bogdanm	0:9b334a45a8ff	1325	(+) HAL_MultiProcessor_EnableMuteMode() API enables mute mode
bogdanm	0:9b334a45a8ff	1326	(+) HAL_MultiProcessor_DisableMuteMode() API disables mute mode
bogdanm	0:9b334a45a8ff	1327	(+) HAL_MultiProcessor_EnterMuteMode() API enters mute mode
bogdanm	0:9b334a45a8ff	1328	(+) HAL_MultiProcessor_EnableMuteMode() API enables mute mode
bogdanm	0:9b334a45a8ff	1329	(+) UART_SetConfig() API configures the UART peripheral
bogdanm	0:9b334a45a8ff	1330	(+) UART_AdvFeatureConfig() API optionally configures the UART advanced features
bogdanm	0:9b334a45a8ff	1331	(+) UART_CheckIdleState() API ensures that TEACK and/or REACK are set after initialization
bogdanm	0:9b334a45a8ff	1332	(+) UART_Wakeup_AddressConfig() API configures the wake-up from stop mode parameters
bogdanm	0:9b334a45a8ff	1333	(+) HAL_HalfDuplex_EnableTransmitter() API disables receiver and enables transmitter
bogdanm	0:9b334a45a8ff	1334	(+) HAL_HalfDuplex_EnableReceiver() API disables transmitter and enables receiver
bogdanm	0:9b334a45a8ff	1335	(+) HAL_LIN_SendBreak() API transmits the break characters
bogdanm	0:9b334a45a8ff	1336	@endverbatim
bogdanm	0:9b334a45a8ff	1337	* @{
bogdanm	0:9b334a45a8ff	1338	*/
bogdanm	0:9b334a45a8ff	1339
bogdanm	0:9b334a45a8ff	1340	/**
bogdanm	0:9b334a45a8ff	1341	* @brief Enable UART in mute mode (doesn't mean UART enters mute mode;
bogdanm	0:9b334a45a8ff	1342	* to enter mute mode, HAL_MultiProcessor_EnterMuteMode() API must be called)
bogdanm	0:9b334a45a8ff	1343	* @param huart: UART handle
bogdanm	0:9b334a45a8ff	1344	* @retval HAL status
bogdanm	0:9b334a45a8ff	1345	*/
bogdanm	0:9b334a45a8ff	1346	HAL_StatusTypeDef HAL_MultiProcessor_EnableMuteMode(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	1347	{
bogdanm	0:9b334a45a8ff	1348	/* Process Locked */
bogdanm	0:9b334a45a8ff	1349	__HAL_LOCK(huart);
bogdanm	0:9b334a45a8ff	1350
bogdanm	0:9b334a45a8ff	1351	huart->State = HAL_UART_STATE_BUSY;
bogdanm	0:9b334a45a8ff	1352
bogdanm	0:9b334a45a8ff	1353	/* Enable USART mute mode by setting the MME bit in the CR1 register */
bogdanm	0:9b334a45a8ff	1354	huart->Instance->CR1 \|= USART_CR1_MME;
bogdanm	0:9b334a45a8ff	1355
bogdanm	0:9b334a45a8ff	1356	huart->State = HAL_UART_STATE_READY;
bogdanm	0:9b334a45a8ff	1357
bogdanm	0:9b334a45a8ff	1358	return (UART_CheckIdleState(huart));
bogdanm	0:9b334a45a8ff	1359	}
bogdanm	0:9b334a45a8ff	1360
bogdanm	0:9b334a45a8ff	1361	/**
bogdanm	0:9b334a45a8ff	1362	* @brief Disable UART mute mode (doesn't mean it actually wakes up the software,
bogdanm	0:9b334a45a8ff	1363	* as it may not have been in mute mode at this very moment).
bogdanm	0:9b334a45a8ff	1364	* @param huart: uart handle
bogdanm	0:9b334a45a8ff	1365	* @retval HAL status
bogdanm	0:9b334a45a8ff	1366	*/
bogdanm	0:9b334a45a8ff	1367	HAL_StatusTypeDef HAL_MultiProcessor_DisableMuteMode(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	1368	{
bogdanm	0:9b334a45a8ff	1369	/* Process Locked */
bogdanm	0:9b334a45a8ff	1370	__HAL_LOCK(huart);
bogdanm	0:9b334a45a8ff	1371
bogdanm	0:9b334a45a8ff	1372	huart->State = HAL_UART_STATE_BUSY;
bogdanm	0:9b334a45a8ff	1373
bogdanm	0:9b334a45a8ff	1374	/* Disable USART mute mode by clearing the MME bit in the CR1 register */
bogdanm	0:9b334a45a8ff	1375	huart->Instance->CR1 &= ~(USART_CR1_MME);
bogdanm	0:9b334a45a8ff	1376
bogdanm	0:9b334a45a8ff	1377	huart->State = HAL_UART_STATE_READY;
bogdanm	0:9b334a45a8ff	1378
bogdanm	0:9b334a45a8ff	1379	return (UART_CheckIdleState(huart));
bogdanm	0:9b334a45a8ff	1380	}
bogdanm	0:9b334a45a8ff	1381
bogdanm	0:9b334a45a8ff	1382	/**
bogdanm	0:9b334a45a8ff	1383	* @brief Enter UART mute mode (means UART actually enters mute mode).
bogdanm	0:9b334a45a8ff	1384	* To exit from mute mode, HAL_MultiProcessor_DisableMuteMode() API must be called.
bogdanm	0:9b334a45a8ff	1385	* @param huart: uart handle
bogdanm	0:9b334a45a8ff	1386	* @retval HAL status
bogdanm	0:9b334a45a8ff	1387	*/
bogdanm	0:9b334a45a8ff	1388	void HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	1389	{
bogdanm	0:9b334a45a8ff	1390	__HAL_UART_SEND_REQ(huart, UART_MUTE_MODE_REQUEST);
bogdanm	0:9b334a45a8ff	1391	}
bogdanm	0:9b334a45a8ff	1392
bogdanm	0:9b334a45a8ff	1393	/**
bogdanm	0:9b334a45a8ff	1394	* @brief Configure the UART peripheral
bogdanm	0:9b334a45a8ff	1395	* @param huart: uart handle
bogdanm	0:9b334a45a8ff	1396	* @retval None
bogdanm	0:9b334a45a8ff	1397	*/
bogdanm	0:9b334a45a8ff	1398	HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	1399	{
bogdanm	0:9b334a45a8ff	1400	uint32_t tmpreg = 0x00000000;
bogdanm	0:9b334a45a8ff	1401	UART_ClockSourceTypeDef clocksource = UART_CLOCKSOURCE_UNDEFINED;
bogdanm	0:9b334a45a8ff	1402	uint16_t brrtemp = 0x0000;
bogdanm	0:9b334a45a8ff	1403	uint16_t usartdiv = 0x0000;
bogdanm	0:9b334a45a8ff	1404	HAL_StatusTypeDef ret = HAL_OK;
bogdanm	0:9b334a45a8ff	1405
bogdanm	0:9b334a45a8ff	1406	/* Check the parameters */
bogdanm	0:9b334a45a8ff	1407	assert_param(IS_UART_BAUDRATE(huart->Init.BaudRate));
bogdanm	0:9b334a45a8ff	1408	assert_param(IS_UART_WORD_LENGTH(huart->Init.WordLength));
bogdanm	0:9b334a45a8ff	1409	assert_param(IS_UART_STOPBITS(huart->Init.StopBits));
bogdanm	0:9b334a45a8ff	1410	assert_param(IS_UART_PARITY(huart->Init.Parity));
bogdanm	0:9b334a45a8ff	1411	assert_param(IS_UART_MODE(huart->Init.Mode));
bogdanm	0:9b334a45a8ff	1412	assert_param(IS_UART_HARDWARE_FLOW_CONTROL(huart->Init.HwFlowCtl));
bogdanm	0:9b334a45a8ff	1413	assert_param(IS_UART_ONEBIT_SAMPLING(huart->Init.OneBitSampling));
bogdanm	0:9b334a45a8ff	1414	assert_param(IS_UART_OVERSAMPLING(huart->Init.OverSampling));
bogdanm	0:9b334a45a8ff	1415
bogdanm	0:9b334a45a8ff	1416
bogdanm	0:9b334a45a8ff	1417	/-------------------------- USART CR1 Configuration -----------------------/
bogdanm	0:9b334a45a8ff	1418	/* Clear M, PCE, PS, TE, RE and OVER8 bits and configure
bogdanm	0:9b334a45a8ff	1419	* the UART Word Length, Parity, Mode and oversampling:
bogdanm	0:9b334a45a8ff	1420	* set the M bits according to huart->Init.WordLength value
bogdanm	0:9b334a45a8ff	1421	* set PCE and PS bits according to huart->Init.Parity value
bogdanm	0:9b334a45a8ff	1422	* set TE and RE bits according to huart->Init.Mode value
bogdanm	0:9b334a45a8ff	1423	* set OVER8 bit according to huart->Init.OverSampling value */
bogdanm	0:9b334a45a8ff	1424	tmpreg = (uint32_t)huart->Init.WordLength \| huart->Init.Parity \| huart->Init.Mode \| huart->Init.OverSampling ;
bogdanm	0:9b334a45a8ff	1425	MODIFY_REG(huart->Instance->CR1, UART_CR1_FIELDS, tmpreg);
bogdanm	0:9b334a45a8ff	1426
bogdanm	0:9b334a45a8ff	1427	/-------------------------- USART CR2 Configuration -----------------------/
bogdanm	0:9b334a45a8ff	1428	/* Configure the UART Stop Bits: Set STOP[13:12] bits according
bogdanm	0:9b334a45a8ff	1429	* to huart->Init.StopBits value */
bogdanm	0:9b334a45a8ff	1430	MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits);
bogdanm	0:9b334a45a8ff	1431
bogdanm	0:9b334a45a8ff	1432	/-------------------------- USART CR3 Configuration -----------------------/
bogdanm	0:9b334a45a8ff	1433	/* Configure
bogdanm	0:9b334a45a8ff	1434	* - UART HardWare Flow Control: set CTSE and RTSE bits according
bogdanm	0:9b334a45a8ff	1435	* to huart->Init.HwFlowCtl value
bogdanm	0:9b334a45a8ff	1436	* - one-bit sampling method versus three samples' majority rule according
bogdanm	0:9b334a45a8ff	1437	* to huart->Init.OneBitSampling */
bogdanm	0:9b334a45a8ff	1438	tmpreg = (uint32_t)huart->Init.HwFlowCtl \| huart->Init.OneBitSampling ;
bogdanm	0:9b334a45a8ff	1439	MODIFY_REG(huart->Instance->CR3, (USART_CR3_RTSE \| USART_CR3_CTSE \| USART_CR3_ONEBIT), tmpreg);
bogdanm	0:9b334a45a8ff	1440
bogdanm	0:9b334a45a8ff	1441	/-------------------------- USART BRR Configuration -----------------------/
bogdanm	0:9b334a45a8ff	1442	__HAL_UART_GETCLOCKSOURCE(huart, clocksource);
bogdanm	0:9b334a45a8ff	1443
bogdanm	0:9b334a45a8ff	1444	/* Check the Over Sampling to set Baud Rate Register */
bogdanm	0:9b334a45a8ff	1445	if (huart->Init.OverSampling == UART_OVERSAMPLING_8)
bogdanm	0:9b334a45a8ff	1446	{
bogdanm	0:9b334a45a8ff	1447	switch (clocksource)
bogdanm	0:9b334a45a8ff	1448	{
bogdanm	0:9b334a45a8ff	1449	case UART_CLOCKSOURCE_PCLK1:
bogdanm	0:9b334a45a8ff	1450	usartdiv = (uint16_t)(__DIV_SAMPLING8(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate));
bogdanm	0:9b334a45a8ff	1451	break;
bogdanm	0:9b334a45a8ff	1452	case UART_CLOCKSOURCE_PCLK2:
bogdanm	0:9b334a45a8ff	1453	usartdiv = (uint16_t)(__DIV_SAMPLING8(HAL_RCC_GetPCLK2Freq(), huart->Init.BaudRate));
bogdanm	0:9b334a45a8ff	1454	break;
bogdanm	0:9b334a45a8ff	1455	case UART_CLOCKSOURCE_HSI:
bogdanm	0:9b334a45a8ff	1456	usartdiv = (uint16_t)(__DIV_SAMPLING8(HSI_VALUE, huart->Init.BaudRate));
bogdanm	0:9b334a45a8ff	1457	break;
bogdanm	0:9b334a45a8ff	1458	case UART_CLOCKSOURCE_SYSCLK:
bogdanm	0:9b334a45a8ff	1459	usartdiv = (uint16_t)(__DIV_SAMPLING8(HAL_RCC_GetSysClockFreq(), huart->Init.BaudRate));
bogdanm	0:9b334a45a8ff	1460	break;
bogdanm	0:9b334a45a8ff	1461	case UART_CLOCKSOURCE_LSE:
bogdanm	0:9b334a45a8ff	1462	usartdiv = (uint16_t)(__DIV_SAMPLING8(LSE_VALUE, huart->Init.BaudRate));
bogdanm	0:9b334a45a8ff	1463	break;
bogdanm	0:9b334a45a8ff	1464	case UART_CLOCKSOURCE_UNDEFINED:
bogdanm	0:9b334a45a8ff	1465	default:
bogdanm	0:9b334a45a8ff	1466	ret = HAL_ERROR;
bogdanm	0:9b334a45a8ff	1467	break;
bogdanm	0:9b334a45a8ff	1468	}
bogdanm	0:9b334a45a8ff	1469
bogdanm	0:9b334a45a8ff	1470	brrtemp = usartdiv & 0xFFF0;
bogdanm	0:9b334a45a8ff	1471	brrtemp \|= (uint16_t)((usartdiv & (uint16_t)0x000F) >> 1U);
bogdanm	0:9b334a45a8ff	1472	huart->Instance->BRR = brrtemp;
bogdanm	0:9b334a45a8ff	1473	}
bogdanm	0:9b334a45a8ff	1474	else
bogdanm	0:9b334a45a8ff	1475	{
bogdanm	0:9b334a45a8ff	1476	switch (clocksource)
bogdanm	0:9b334a45a8ff	1477	{
bogdanm	0:9b334a45a8ff	1478	case UART_CLOCKSOURCE_PCLK1:
bogdanm	0:9b334a45a8ff	1479	huart->Instance->BRR = (uint16_t)(__DIV_SAMPLING16(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate));
bogdanm	0:9b334a45a8ff	1480	break;
bogdanm	0:9b334a45a8ff	1481	case UART_CLOCKSOURCE_PCLK2:
bogdanm	0:9b334a45a8ff	1482	huart->Instance->BRR = (uint16_t)(__DIV_SAMPLING16(HAL_RCC_GetPCLK2Freq(), huart->Init.BaudRate));
bogdanm	0:9b334a45a8ff	1483	break;
bogdanm	0:9b334a45a8ff	1484	case UART_CLOCKSOURCE_HSI:
bogdanm	0:9b334a45a8ff	1485	huart->Instance->BRR = (uint16_t)(__DIV_SAMPLING16(HSI_VALUE, huart->Init.BaudRate));
bogdanm	0:9b334a45a8ff	1486	break;
bogdanm	0:9b334a45a8ff	1487	case UART_CLOCKSOURCE_SYSCLK:
bogdanm	0:9b334a45a8ff	1488	huart->Instance->BRR = (uint16_t)(__DIV_SAMPLING16(HAL_RCC_GetSysClockFreq(), huart->Init.BaudRate));
bogdanm	0:9b334a45a8ff	1489	break;
bogdanm	0:9b334a45a8ff	1490	case UART_CLOCKSOURCE_LSE:
bogdanm	0:9b334a45a8ff	1491	huart->Instance->BRR = (uint16_t)(__DIV_SAMPLING16(LSE_VALUE, huart->Init.BaudRate));
bogdanm	0:9b334a45a8ff	1492	break;
bogdanm	0:9b334a45a8ff	1493	case UART_CLOCKSOURCE_UNDEFINED:
bogdanm	0:9b334a45a8ff	1494	default:
bogdanm	0:9b334a45a8ff	1495	ret = HAL_ERROR;
bogdanm	0:9b334a45a8ff	1496	break;
bogdanm	0:9b334a45a8ff	1497	}
bogdanm	0:9b334a45a8ff	1498	}
bogdanm	0:9b334a45a8ff	1499
bogdanm	0:9b334a45a8ff	1500	return ret;
bogdanm	0:9b334a45a8ff	1501
bogdanm	0:9b334a45a8ff	1502	}
bogdanm	0:9b334a45a8ff	1503
bogdanm	0:9b334a45a8ff	1504
bogdanm	0:9b334a45a8ff	1505	/**
bogdanm	0:9b334a45a8ff	1506	* @brief Configure the UART peripheral advanced feautures
bogdanm	0:9b334a45a8ff	1507	* @param huart: uart handle
bogdanm	0:9b334a45a8ff	1508	* @retval None
bogdanm	0:9b334a45a8ff	1509	*/
bogdanm	0:9b334a45a8ff	1510	void UART_AdvFeatureConfig(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	1511	{
bogdanm	0:9b334a45a8ff	1512	/* Check whether the set of advanced features to configure is properly set */
bogdanm	0:9b334a45a8ff	1513	assert_param(IS_UART_ADVFEATURE_INIT(huart->AdvancedInit.AdvFeatureInit));
bogdanm	0:9b334a45a8ff	1514
bogdanm	0:9b334a45a8ff	1515	/* if required, configure TX pin active level inversion */
bogdanm	0:9b334a45a8ff	1516	if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_TXINVERT_INIT))
bogdanm	0:9b334a45a8ff	1517	{
bogdanm	0:9b334a45a8ff	1518	assert_param(IS_UART_ADVFEATURE_TXINV(huart->AdvancedInit.TxPinLevelInvert));
bogdanm	0:9b334a45a8ff	1519	MODIFY_REG(huart->Instance->CR2, USART_CR2_TXINV, huart->AdvancedInit.TxPinLevelInvert);
bogdanm	0:9b334a45a8ff	1520	}
bogdanm	0:9b334a45a8ff	1521
bogdanm	0:9b334a45a8ff	1522	/* if required, configure RX pin active level inversion */
bogdanm	0:9b334a45a8ff	1523	if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXINVERT_INIT))
bogdanm	0:9b334a45a8ff	1524	{
bogdanm	0:9b334a45a8ff	1525	assert_param(IS_UART_ADVFEATURE_RXINV(huart->AdvancedInit.RxPinLevelInvert));
bogdanm	0:9b334a45a8ff	1526	MODIFY_REG(huart->Instance->CR2, USART_CR2_RXINV, huart->AdvancedInit.RxPinLevelInvert);
bogdanm	0:9b334a45a8ff	1527	}
bogdanm	0:9b334a45a8ff	1528
bogdanm	0:9b334a45a8ff	1529	/* if required, configure data inversion */
bogdanm	0:9b334a45a8ff	1530	if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DATAINVERT_INIT))
bogdanm	0:9b334a45a8ff	1531	{
bogdanm	0:9b334a45a8ff	1532	assert_param(IS_UART_ADVFEATURE_DATAINV(huart->AdvancedInit.DataInvert));
bogdanm	0:9b334a45a8ff	1533	MODIFY_REG(huart->Instance->CR2, USART_CR2_DATAINV, huart->AdvancedInit.DataInvert);
bogdanm	0:9b334a45a8ff	1534	}
bogdanm	0:9b334a45a8ff	1535
bogdanm	0:9b334a45a8ff	1536	/* if required, configure RX/TX pins swap */
bogdanm	0:9b334a45a8ff	1537	if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_SWAP_INIT))
bogdanm	0:9b334a45a8ff	1538	{
bogdanm	0:9b334a45a8ff	1539	assert_param(IS_UART_ADVFEATURE_SWAP(huart->AdvancedInit.Swap));
bogdanm	0:9b334a45a8ff	1540	MODIFY_REG(huart->Instance->CR2, USART_CR2_SWAP, huart->AdvancedInit.Swap);
bogdanm	0:9b334a45a8ff	1541	}
bogdanm	0:9b334a45a8ff	1542
bogdanm	0:9b334a45a8ff	1543	/* if required, configure RX overrun detection disabling */
bogdanm	0:9b334a45a8ff	1544	if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXOVERRUNDISABLE_INIT))
bogdanm	0:9b334a45a8ff	1545	{
bogdanm	0:9b334a45a8ff	1546	assert_param(IS_UART_OVERRUN(huart->AdvancedInit.OverrunDisable));
bogdanm	0:9b334a45a8ff	1547	MODIFY_REG(huart->Instance->CR3, USART_CR3_OVRDIS, huart->AdvancedInit.OverrunDisable);
bogdanm	0:9b334a45a8ff	1548	}
bogdanm	0:9b334a45a8ff	1549
bogdanm	0:9b334a45a8ff	1550	/* if required, configure DMA disabling on reception error */
bogdanm	0:9b334a45a8ff	1551	if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DMADISABLEONERROR_INIT))
bogdanm	0:9b334a45a8ff	1552	{
bogdanm	0:9b334a45a8ff	1553	assert_param(IS_UART_ADVFEATURE_DMAONRXERROR(huart->AdvancedInit.DMADisableonRxError));
bogdanm	0:9b334a45a8ff	1554	MODIFY_REG(huart->Instance->CR3, USART_CR3_DDRE, huart->AdvancedInit.DMADisableonRxError);
bogdanm	0:9b334a45a8ff	1555	}
bogdanm	0:9b334a45a8ff	1556
bogdanm	0:9b334a45a8ff	1557	/* if required, configure auto Baud rate detection scheme */
bogdanm	0:9b334a45a8ff	1558	if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_AUTOBAUDRATE_INIT))
bogdanm	0:9b334a45a8ff	1559	{
bogdanm	0:9b334a45a8ff	1560	assert_param(IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(huart->Instance));
bogdanm	0:9b334a45a8ff	1561	assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATE(huart->AdvancedInit.AutoBaudRateEnable));
bogdanm	0:9b334a45a8ff	1562	MODIFY_REG(huart->Instance->CR2, USART_CR2_ABREN, huart->AdvancedInit.AutoBaudRateEnable);
bogdanm	0:9b334a45a8ff	1563	/* set auto Baudrate detection parameters if detection is enabled */
bogdanm	0:9b334a45a8ff	1564	if (huart->AdvancedInit.AutoBaudRateEnable == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE)
bogdanm	0:9b334a45a8ff	1565	{
bogdanm	0:9b334a45a8ff	1566	assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(huart->AdvancedInit.AutoBaudRateMode));
bogdanm	0:9b334a45a8ff	1567	MODIFY_REG(huart->Instance->CR2, USART_CR2_ABRMODE, huart->AdvancedInit.AutoBaudRateMode);
bogdanm	0:9b334a45a8ff	1568	}
bogdanm	0:9b334a45a8ff	1569	}
bogdanm	0:9b334a45a8ff	1570
bogdanm	0:9b334a45a8ff	1571	/* if required, configure MSB first on communication line */
bogdanm	0:9b334a45a8ff	1572	if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_MSBFIRST_INIT))
bogdanm	0:9b334a45a8ff	1573	{
bogdanm	0:9b334a45a8ff	1574	assert_param(IS_UART_ADVFEATURE_MSBFIRST(huart->AdvancedInit.MSBFirst));
bogdanm	0:9b334a45a8ff	1575	MODIFY_REG(huart->Instance->CR2, USART_CR2_MSBFIRST, huart->AdvancedInit.MSBFirst);
bogdanm	0:9b334a45a8ff	1576	}
bogdanm	0:9b334a45a8ff	1577	}
bogdanm	0:9b334a45a8ff	1578
bogdanm	0:9b334a45a8ff	1579
bogdanm	0:9b334a45a8ff	1580
bogdanm	0:9b334a45a8ff	1581	/**
bogdanm	0:9b334a45a8ff	1582	* @brief Check the UART Idle State
bogdanm	0:9b334a45a8ff	1583	* @param huart: uart handle
bogdanm	0:9b334a45a8ff	1584	* @retval HAL status
bogdanm	0:9b334a45a8ff	1585	*/
bogdanm	0:9b334a45a8ff	1586	HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	1587	{
bogdanm	0:9b334a45a8ff	1588	/* Initialize the UART ErrorCode */
bogdanm	0:9b334a45a8ff	1589	huart->ErrorCode = HAL_UART_ERROR_NONE;
bogdanm	0:9b334a45a8ff	1590
bogdanm	0:9b334a45a8ff	1591	/* Check if the Transmitter is enabled */
bogdanm	0:9b334a45a8ff	1592	if((huart->Instance->CR1 & USART_CR1_TE) == USART_CR1_TE)
bogdanm	0:9b334a45a8ff	1593	{
bogdanm	0:9b334a45a8ff	1594	/* Wait until TEACK flag is set */
bogdanm	0:9b334a45a8ff	1595	if(UART_WaitOnFlagUntilTimeout(huart, USART_ISR_TEACK, RESET, HAL_UART_TIMEOUT_VALUE) != HAL_OK)
bogdanm	0:9b334a45a8ff	1596	{
bogdanm	0:9b334a45a8ff	1597	/* Timeout Occured */
bogdanm	0:9b334a45a8ff	1598	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	1599	}
bogdanm	0:9b334a45a8ff	1600	}
bogdanm	0:9b334a45a8ff	1601	/* Check if the Receiver is enabled */
bogdanm	0:9b334a45a8ff	1602	if((huart->Instance->CR1 & USART_CR1_RE) == USART_CR1_RE)
bogdanm	0:9b334a45a8ff	1603	{
bogdanm	0:9b334a45a8ff	1604	/* Wait until REACK flag is set */
bogdanm	0:9b334a45a8ff	1605	if(UART_WaitOnFlagUntilTimeout(huart, USART_ISR_REACK, RESET, HAL_UART_TIMEOUT_VALUE) != HAL_OK)
bogdanm	0:9b334a45a8ff	1606	{
bogdanm	0:9b334a45a8ff	1607	/* Timeout Occured */
bogdanm	0:9b334a45a8ff	1608	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	1609	}
bogdanm	0:9b334a45a8ff	1610	}
bogdanm	0:9b334a45a8ff	1611
bogdanm	0:9b334a45a8ff	1612	/* Initialize the UART State */
bogdanm	0:9b334a45a8ff	1613	huart->State= HAL_UART_STATE_READY;
bogdanm	0:9b334a45a8ff	1614
bogdanm	0:9b334a45a8ff	1615	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1616	__HAL_UNLOCK(huart);
bogdanm	0:9b334a45a8ff	1617
bogdanm	0:9b334a45a8ff	1618	return HAL_OK;
bogdanm	0:9b334a45a8ff	1619	}
bogdanm	0:9b334a45a8ff	1620
bogdanm	0:9b334a45a8ff	1621
bogdanm	0:9b334a45a8ff	1622
bogdanm	0:9b334a45a8ff	1623
bogdanm	0:9b334a45a8ff	1624	/**
bogdanm	0:9b334a45a8ff	1625	* @brief Initializes the UART wake-up from stop mode parameters when triggered by address detection.
bogdanm	0:9b334a45a8ff	1626	* @param huart: uart handle
bogdanm	0:9b334a45a8ff	1627	* @param WakeUpSelection: UART wake up from stop mode parameters
bogdanm	0:9b334a45a8ff	1628	* @retval HAL status
bogdanm	0:9b334a45a8ff	1629	*/
bogdanm	0:9b334a45a8ff	1630	void UART_Wakeup_AddressConfig(UART_HandleTypeDef *huart, UART_WakeUpTypeDef WakeUpSelection)
bogdanm	0:9b334a45a8ff	1631	{
bogdanm	0:9b334a45a8ff	1632	assert_param(IS_UART_ADDRESSLENGTH_DETECT(WakeUpSelection.AddressLength));
bogdanm	0:9b334a45a8ff	1633
bogdanm	0:9b334a45a8ff	1634	/* Set the USART address length */
bogdanm	0:9b334a45a8ff	1635	MODIFY_REG(huart->Instance->CR2, USART_CR2_ADDM7, WakeUpSelection.AddressLength);
bogdanm	0:9b334a45a8ff	1636
bogdanm	0:9b334a45a8ff	1637	/* Set the USART address node */
bogdanm	0:9b334a45a8ff	1638	MODIFY_REG(huart->Instance->CR2, USART_CR2_ADD, ((uint32_t)WakeUpSelection.Address << UART_CR2_ADDRESS_LSB_POS));
bogdanm	0:9b334a45a8ff	1639	}
bogdanm	0:9b334a45a8ff	1640
bogdanm	0:9b334a45a8ff	1641	/**
bogdanm	0:9b334a45a8ff	1642	* @brief Enables the UART transmitter and disables the UART receiver.
bogdanm	0:9b334a45a8ff	1643	* @param huart: UART handle
bogdanm	0:9b334a45a8ff	1644	* @retval HAL status
bogdanm	0:9b334a45a8ff	1645	* @retval None
bogdanm	0:9b334a45a8ff	1646	*/
bogdanm	0:9b334a45a8ff	1647	HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	1648	{
bogdanm	0:9b334a45a8ff	1649	/* Process Locked */
bogdanm	0:9b334a45a8ff	1650	__HAL_LOCK(huart);
bogdanm	0:9b334a45a8ff	1651	huart->State = HAL_UART_STATE_BUSY;
bogdanm	0:9b334a45a8ff	1652
bogdanm	0:9b334a45a8ff	1653	/* Clear TE and RE bits */
bogdanm	0:9b334a45a8ff	1654	CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TE \| USART_CR1_RE));
bogdanm	0:9b334a45a8ff	1655	/* Enable the USART's transmit interface by setting the TE bit in the USART CR1 register */
bogdanm	0:9b334a45a8ff	1656	SET_BIT(huart->Instance->CR1, USART_CR1_TE);
bogdanm	0:9b334a45a8ff	1657
bogdanm	0:9b334a45a8ff	1658	huart->State = HAL_UART_STATE_READY;
bogdanm	0:9b334a45a8ff	1659	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1660	__HAL_UNLOCK(huart);
bogdanm	0:9b334a45a8ff	1661
bogdanm	0:9b334a45a8ff	1662	return HAL_OK;
bogdanm	0:9b334a45a8ff	1663	}
bogdanm	0:9b334a45a8ff	1664
bogdanm	0:9b334a45a8ff	1665	/**
bogdanm	0:9b334a45a8ff	1666	* @brief Enables the UART receiver and disables the UART transmitter.
bogdanm	0:9b334a45a8ff	1667	* @param huart: UART handle
bogdanm	0:9b334a45a8ff	1668	* @retval HAL status
bogdanm	0:9b334a45a8ff	1669	*/
bogdanm	0:9b334a45a8ff	1670	HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	1671	{
bogdanm	0:9b334a45a8ff	1672	/* Process Locked */
bogdanm	0:9b334a45a8ff	1673	__HAL_LOCK(huart);
bogdanm	0:9b334a45a8ff	1674	huart->State = HAL_UART_STATE_BUSY;
bogdanm	0:9b334a45a8ff	1675
bogdanm	0:9b334a45a8ff	1676	/* Clear TE and RE bits */
bogdanm	0:9b334a45a8ff	1677	CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TE \| USART_CR1_RE));
bogdanm	0:9b334a45a8ff	1678	/* Enable the USART's receive interface by setting the RE bit in the USART CR1 register */
bogdanm	0:9b334a45a8ff	1679	SET_BIT(huart->Instance->CR1, USART_CR1_RE);
bogdanm	0:9b334a45a8ff	1680
bogdanm	0:9b334a45a8ff	1681	huart->State = HAL_UART_STATE_READY;
bogdanm	0:9b334a45a8ff	1682	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1683	__HAL_UNLOCK(huart);
bogdanm	0:9b334a45a8ff	1684
bogdanm	0:9b334a45a8ff	1685	return HAL_OK;
bogdanm	0:9b334a45a8ff	1686	}
bogdanm	0:9b334a45a8ff	1687
bogdanm	0:9b334a45a8ff	1688
bogdanm	0:9b334a45a8ff	1689	/**
bogdanm	0:9b334a45a8ff	1690	* @brief Transmits break characters.
bogdanm	0:9b334a45a8ff	1691	* @param huart: UART handle
bogdanm	0:9b334a45a8ff	1692	* @retval HAL status
bogdanm	0:9b334a45a8ff	1693	*/
bogdanm	0:9b334a45a8ff	1694	HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	1695	{
bogdanm	0:9b334a45a8ff	1696	/* Check the parameters */
bogdanm	0:9b334a45a8ff	1697	assert_param(IS_UART_INSTANCE(huart->Instance));
bogdanm	0:9b334a45a8ff	1698
bogdanm	0:9b334a45a8ff	1699	/* Process Locked */
bogdanm	0:9b334a45a8ff	1700	__HAL_LOCK(huart);
bogdanm	0:9b334a45a8ff	1701
bogdanm	0:9b334a45a8ff	1702	huart->State = HAL_UART_STATE_BUSY;
bogdanm	0:9b334a45a8ff	1703
bogdanm	0:9b334a45a8ff	1704	/* Send break characters */
bogdanm	0:9b334a45a8ff	1705	huart->Instance->RQR \|= UART_SENDBREAK_REQUEST;
bogdanm	0:9b334a45a8ff	1706
bogdanm	0:9b334a45a8ff	1707	huart->State = HAL_UART_STATE_READY;
bogdanm	0:9b334a45a8ff	1708
bogdanm	0:9b334a45a8ff	1709	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1710	__HAL_UNLOCK(huart);
bogdanm	0:9b334a45a8ff	1711
bogdanm	0:9b334a45a8ff	1712	return HAL_OK;
bogdanm	0:9b334a45a8ff	1713	}
bogdanm	0:9b334a45a8ff	1714
bogdanm	0:9b334a45a8ff	1715
bogdanm	0:9b334a45a8ff	1716	/**
bogdanm	0:9b334a45a8ff	1717	* @}
bogdanm	0:9b334a45a8ff	1718	*/
bogdanm	0:9b334a45a8ff	1719
bogdanm	0:9b334a45a8ff	1720	/** @defgroup UART_Exported_Functions_Group4 Peripheral State and Error functions
bogdanm	0:9b334a45a8ff	1721	* @brief UART Peripheral State functions
bogdanm	0:9b334a45a8ff	1722	*
bogdanm	0:9b334a45a8ff	1723	@verbatim
bogdanm	0:9b334a45a8ff	1724	==============================================================================
bogdanm	0:9b334a45a8ff	1725	##### Peripheral State and Error functions #####
bogdanm	0:9b334a45a8ff	1726	==============================================================================
bogdanm	0:9b334a45a8ff	1727	[..]
bogdanm	0:9b334a45a8ff	1728	This subsection provides functions allowing to :
bogdanm	0:9b334a45a8ff	1729	(+) Returns the UART state.
bogdanm	0:9b334a45a8ff	1730	(+) Returns the UART error code
bogdanm	0:9b334a45a8ff	1731
bogdanm	0:9b334a45a8ff	1732	@endverbatim
bogdanm	0:9b334a45a8ff	1733	* @{
bogdanm	0:9b334a45a8ff	1734	*/
bogdanm	0:9b334a45a8ff	1735
bogdanm	0:9b334a45a8ff	1736	/**
bogdanm	0:9b334a45a8ff	1737	* @brief return the UART state
bogdanm	0:9b334a45a8ff	1738	* @param huart: uart handle
bogdanm	0:9b334a45a8ff	1739	* @retval HAL state
bogdanm	0:9b334a45a8ff	1740	*/
bogdanm	0:9b334a45a8ff	1741	HAL_UART_StateTypeDef HAL_UART_GetState(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	1742	{
bogdanm	0:9b334a45a8ff	1743	return huart->State;
bogdanm	0:9b334a45a8ff	1744	}
bogdanm	0:9b334a45a8ff	1745
bogdanm	0:9b334a45a8ff	1746	/**
bogdanm	0:9b334a45a8ff	1747	* @brief Return the UART error code
bogdanm	0:9b334a45a8ff	1748	* @param huart : pointer to a UART_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	1749	* the configuration information for the specified UART.
bogdanm	0:9b334a45a8ff	1750	* @retval UART Error Code
bogdanm	0:9b334a45a8ff	1751	*/
bogdanm	0:9b334a45a8ff	1752	uint32_t HAL_UART_GetError(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	1753	{
bogdanm	0:9b334a45a8ff	1754	return huart->ErrorCode;
bogdanm	0:9b334a45a8ff	1755	}
bogdanm	0:9b334a45a8ff	1756	/**
bogdanm	0:9b334a45a8ff	1757	* @}
bogdanm	0:9b334a45a8ff	1758	*/
bogdanm	0:9b334a45a8ff	1759
bogdanm	0:9b334a45a8ff	1760
bogdanm	0:9b334a45a8ff	1761	/**
bogdanm	0:9b334a45a8ff	1762	* @}
bogdanm	0:9b334a45a8ff	1763	*/
bogdanm	0:9b334a45a8ff	1764
bogdanm	0:9b334a45a8ff	1765	/** @defgroup UART_Private_Functions UART Private Functions
bogdanm	0:9b334a45a8ff	1766	* @{
bogdanm	0:9b334a45a8ff	1767	*/
bogdanm	0:9b334a45a8ff	1768	/**
bogdanm	0:9b334a45a8ff	1769	* @brief DMA UART transmit process complete callback
bogdanm	0:9b334a45a8ff	1770	* @param hdma: DMA handle
bogdanm	0:9b334a45a8ff	1771	* @retval None
bogdanm	0:9b334a45a8ff	1772	*/
bogdanm	0:9b334a45a8ff	1773	static void UART_DMATransmitCplt(DMA_HandleTypeDef *hdma)
bogdanm	0:9b334a45a8ff	1774	{
bogdanm	0:9b334a45a8ff	1775	UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
bogdanm	0:9b334a45a8ff	1776	huart->TxXferCount = 0;
bogdanm	0:9b334a45a8ff	1777
bogdanm	0:9b334a45a8ff	1778	/* Disable the DMA transfer for transmit request by setting the DMAT bit
bogdanm	0:9b334a45a8ff	1779	in the UART CR3 register */
bogdanm	0:9b334a45a8ff	1780	huart->Instance->CR3 &= (uint32_t)~((uint32_t)USART_CR3_DMAT);
bogdanm	0:9b334a45a8ff	1781
bogdanm	0:9b334a45a8ff	1782	/* Wait for UART TC Flag */
bogdanm	0:9b334a45a8ff	1783	if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, HAL_UART_TXDMA_TIMEOUTVALUE) != HAL_OK)
bogdanm	0:9b334a45a8ff	1784	{
bogdanm	0:9b334a45a8ff	1785	/* Timeout Occured */
bogdanm	0:9b334a45a8ff	1786	huart->State = HAL_UART_STATE_TIMEOUT;
bogdanm	0:9b334a45a8ff	1787	HAL_UART_ErrorCallback(huart);
bogdanm	0:9b334a45a8ff	1788	}
bogdanm	0:9b334a45a8ff	1789	else
bogdanm	0:9b334a45a8ff	1790	{
bogdanm	0:9b334a45a8ff	1791	/* No Timeout */
bogdanm	0:9b334a45a8ff	1792	/* Check if a receive process is ongoing or not */
bogdanm	0:9b334a45a8ff	1793	if(huart->State == HAL_UART_STATE_BUSY_TX_RX)
bogdanm	0:9b334a45a8ff	1794	{
bogdanm	0:9b334a45a8ff	1795	huart->State = HAL_UART_STATE_BUSY_RX;
bogdanm	0:9b334a45a8ff	1796	}
bogdanm	0:9b334a45a8ff	1797	else
bogdanm	0:9b334a45a8ff	1798	{
bogdanm	0:9b334a45a8ff	1799	huart->State = HAL_UART_STATE_READY;
bogdanm	0:9b334a45a8ff	1800	}
bogdanm	0:9b334a45a8ff	1801	HAL_UART_TxCpltCallback(huart);
bogdanm	0:9b334a45a8ff	1802	}
bogdanm	0:9b334a45a8ff	1803	}
bogdanm	0:9b334a45a8ff	1804
bogdanm	0:9b334a45a8ff	1805	/**
bogdanm	0:9b334a45a8ff	1806	* @brief DMA UART transmit process half complete callback
bogdanm	0:9b334a45a8ff	1807	* @param hdma : DMA handle
bogdanm	0:9b334a45a8ff	1808	* @retval None
bogdanm	0:9b334a45a8ff	1809	*/
bogdanm	0:9b334a45a8ff	1810	static void UART_DMATxHalfCplt(DMA_HandleTypeDef *hdma)
bogdanm	0:9b334a45a8ff	1811	{
bogdanm	0:9b334a45a8ff	1812	UART_HandleTypeDef* huart = (UART_HandleTypeDef)((DMA_HandleTypeDef)hdma)->Parent;
bogdanm	0:9b334a45a8ff	1813
bogdanm	0:9b334a45a8ff	1814	HAL_UART_TxHalfCpltCallback(huart);
bogdanm	0:9b334a45a8ff	1815	}
bogdanm	0:9b334a45a8ff	1816
bogdanm	0:9b334a45a8ff	1817	/**
bogdanm	0:9b334a45a8ff	1818	* @brief DMA UART receive process complete callback
bogdanm	0:9b334a45a8ff	1819	* @param hdma: DMA handle
bogdanm	0:9b334a45a8ff	1820	* @retval None
bogdanm	0:9b334a45a8ff	1821	*/
bogdanm	0:9b334a45a8ff	1822	static void UART_DMAReceiveCplt(DMA_HandleTypeDef *hdma)
bogdanm	0:9b334a45a8ff	1823	{
bogdanm	0:9b334a45a8ff	1824	UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
bogdanm	0:9b334a45a8ff	1825	huart->RxXferCount = 0;
bogdanm	0:9b334a45a8ff	1826
bogdanm	0:9b334a45a8ff	1827	/* Disable the DMA transfer for the receiver request by setting the DMAR bit
bogdanm	0:9b334a45a8ff	1828	in the UART CR3 register */
bogdanm	0:9b334a45a8ff	1829	huart->Instance->CR3 &= (uint32_t)~((uint32_t)USART_CR3_DMAR);
bogdanm	0:9b334a45a8ff	1830
bogdanm	0:9b334a45a8ff	1831	/* Check if a transmit Process is ongoing or not */
bogdanm	0:9b334a45a8ff	1832	if(huart->State == HAL_UART_STATE_BUSY_TX_RX)
bogdanm	0:9b334a45a8ff	1833	{
bogdanm	0:9b334a45a8ff	1834	huart->State = HAL_UART_STATE_BUSY_TX;
bogdanm	0:9b334a45a8ff	1835	}
bogdanm	0:9b334a45a8ff	1836	else
bogdanm	0:9b334a45a8ff	1837	{
bogdanm	0:9b334a45a8ff	1838	huart->State = HAL_UART_STATE_READY;
bogdanm	0:9b334a45a8ff	1839	}
bogdanm	0:9b334a45a8ff	1840	HAL_UART_RxCpltCallback(huart);
bogdanm	0:9b334a45a8ff	1841	}
bogdanm	0:9b334a45a8ff	1842
bogdanm	0:9b334a45a8ff	1843	/**
bogdanm	0:9b334a45a8ff	1844	* @brief DMA UART receive process half complete callback
bogdanm	0:9b334a45a8ff	1845	* @param hdma : DMA handle
bogdanm	0:9b334a45a8ff	1846	* @retval None
bogdanm	0:9b334a45a8ff	1847	*/
bogdanm	0:9b334a45a8ff	1848	static void UART_DMARxHalfCplt(DMA_HandleTypeDef *hdma)
bogdanm	0:9b334a45a8ff	1849	{
bogdanm	0:9b334a45a8ff	1850	UART_HandleTypeDef* huart = (UART_HandleTypeDef)((DMA_HandleTypeDef)hdma)->Parent;
bogdanm	0:9b334a45a8ff	1851
bogdanm	0:9b334a45a8ff	1852	HAL_UART_RxHalfCpltCallback(huart);
bogdanm	0:9b334a45a8ff	1853	}
bogdanm	0:9b334a45a8ff	1854
bogdanm	0:9b334a45a8ff	1855	/**
bogdanm	0:9b334a45a8ff	1856	* @brief DMA UART communication error callback
bogdanm	0:9b334a45a8ff	1857	* @param hdma: DMA handle
bogdanm	0:9b334a45a8ff	1858	* @retval None
bogdanm	0:9b334a45a8ff	1859	*/
bogdanm	0:9b334a45a8ff	1860	static void UART_DMAError(DMA_HandleTypeDef *hdma)
bogdanm	0:9b334a45a8ff	1861	{
bogdanm	0:9b334a45a8ff	1862	UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
bogdanm	0:9b334a45a8ff	1863	huart->RxXferCount = 0;
bogdanm	0:9b334a45a8ff	1864	huart->TxXferCount = 0;
bogdanm	0:9b334a45a8ff	1865	huart->State= HAL_UART_STATE_READY;
bogdanm	0:9b334a45a8ff	1866	huart->ErrorCode \|= HAL_UART_ERROR_DMA;
bogdanm	0:9b334a45a8ff	1867	HAL_UART_ErrorCallback(huart);
bogdanm	0:9b334a45a8ff	1868	}
bogdanm	0:9b334a45a8ff	1869
bogdanm	0:9b334a45a8ff	1870	/**
bogdanm	0:9b334a45a8ff	1871	* @brief Send an amount of data in interrupt mode
bogdanm	0:9b334a45a8ff	1872	* Function called under interruption only, once
bogdanm	0:9b334a45a8ff	1873	* interruptions have been enabled by HAL_UART_Transmit_IT()
bogdanm	0:9b334a45a8ff	1874	* @param huart: UART handle
bogdanm	0:9b334a45a8ff	1875	* @retval HAL status
bogdanm	0:9b334a45a8ff	1876	*/
bogdanm	0:9b334a45a8ff	1877	static HAL_StatusTypeDef UART_Transmit_IT(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	1878	{
bogdanm	0:9b334a45a8ff	1879	uint16_t* tmp;
bogdanm	0:9b334a45a8ff	1880
bogdanm	0:9b334a45a8ff	1881	if ((huart->State == HAL_UART_STATE_BUSY_TX) \|\| (huart->State == HAL_UART_STATE_BUSY_TX_RX))
bogdanm	0:9b334a45a8ff	1882	{
bogdanm	0:9b334a45a8ff	1883
bogdanm	0:9b334a45a8ff	1884	if(huart->TxXferCount == 0)
bogdanm	0:9b334a45a8ff	1885	{
bogdanm	0:9b334a45a8ff	1886	/* Disable the UART Transmit Data Register Empty Interrupt */
bogdanm	0:9b334a45a8ff	1887	__HAL_UART_DISABLE_IT(huart, UART_IT_TXE);
bogdanm	0:9b334a45a8ff	1888
bogdanm	0:9b334a45a8ff	1889	/* Enable the UART Transmit Complete Interrupt */
bogdanm	0:9b334a45a8ff	1890	__HAL_UART_ENABLE_IT(huart, UART_IT_TC);
bogdanm	0:9b334a45a8ff	1891
bogdanm	0:9b334a45a8ff	1892	return HAL_OK;
bogdanm	0:9b334a45a8ff	1893	}
bogdanm	0:9b334a45a8ff	1894	else
bogdanm	0:9b334a45a8ff	1895	{
bogdanm	0:9b334a45a8ff	1896	if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
bogdanm	0:9b334a45a8ff	1897	{
bogdanm	0:9b334a45a8ff	1898	tmp = (uint16_t*) huart->pTxBuffPtr;
bogdanm	0:9b334a45a8ff	1899	huart->Instance->TDR = (*tmp & (uint16_t)0x01FF);
bogdanm	0:9b334a45a8ff	1900	huart->pTxBuffPtr += 2;
bogdanm	0:9b334a45a8ff	1901	}
bogdanm	0:9b334a45a8ff	1902	else
bogdanm	0:9b334a45a8ff	1903	{
bogdanm	0:9b334a45a8ff	1904	huart->Instance->TDR = (uint8_t)(*huart->pTxBuffPtr++ & (uint8_t)0xFF);
bogdanm	0:9b334a45a8ff	1905	}
bogdanm	0:9b334a45a8ff	1906
bogdanm	0:9b334a45a8ff	1907	huart->TxXferCount--;
bogdanm	0:9b334a45a8ff	1908
bogdanm	0:9b334a45a8ff	1909	return HAL_OK;
bogdanm	0:9b334a45a8ff	1910	}
bogdanm	0:9b334a45a8ff	1911	}
bogdanm	0:9b334a45a8ff	1912	else
bogdanm	0:9b334a45a8ff	1913	{
bogdanm	0:9b334a45a8ff	1914	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	1915	}
bogdanm	0:9b334a45a8ff	1916	}
bogdanm	0:9b334a45a8ff	1917
bogdanm	0:9b334a45a8ff	1918
bogdanm	0:9b334a45a8ff	1919	/**
bogdanm	0:9b334a45a8ff	1920	* @brief Wraps up transmission in non blocking mode.
bogdanm	0:9b334a45a8ff	1921	* @param huart: pointer to a UART_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	1922	* the configuration information for the specified UART module.
bogdanm	0:9b334a45a8ff	1923	* @retval HAL status
bogdanm	0:9b334a45a8ff	1924	*/
bogdanm	0:9b334a45a8ff	1925	static HAL_StatusTypeDef UART_EndTransmit_IT(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	1926	{
bogdanm	0:9b334a45a8ff	1927	/* Disable the UART Transmit Complete Interrupt */
bogdanm	0:9b334a45a8ff	1928	__HAL_UART_DISABLE_IT(huart, UART_IT_TC);
bogdanm	0:9b334a45a8ff	1929
bogdanm	0:9b334a45a8ff	1930	/* Check if a receive process is ongoing or not */
bogdanm	0:9b334a45a8ff	1931	if(huart->State == HAL_UART_STATE_BUSY_TX_RX)
bogdanm	0:9b334a45a8ff	1932	{
bogdanm	0:9b334a45a8ff	1933	huart->State = HAL_UART_STATE_BUSY_RX;
bogdanm	0:9b334a45a8ff	1934	}
bogdanm	0:9b334a45a8ff	1935	else
bogdanm	0:9b334a45a8ff	1936	{
bogdanm	0:9b334a45a8ff	1937	/* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */
bogdanm	0:9b334a45a8ff	1938	__HAL_UART_DISABLE_IT(huart, UART_IT_ERR);
bogdanm	0:9b334a45a8ff	1939
bogdanm	0:9b334a45a8ff	1940	huart->State = HAL_UART_STATE_READY;
bogdanm	0:9b334a45a8ff	1941	}
bogdanm	0:9b334a45a8ff	1942
bogdanm	0:9b334a45a8ff	1943	HAL_UART_TxCpltCallback(huart);
bogdanm	0:9b334a45a8ff	1944
bogdanm	0:9b334a45a8ff	1945	return HAL_OK;
bogdanm	0:9b334a45a8ff	1946	}
bogdanm	0:9b334a45a8ff	1947
bogdanm	0:9b334a45a8ff	1948
bogdanm	0:9b334a45a8ff	1949	/**
bogdanm	0:9b334a45a8ff	1950	* @brief Receive an amount of data in interrupt mode
bogdanm	0:9b334a45a8ff	1951	* Function called under interruption only, once
bogdanm	0:9b334a45a8ff	1952	* interruptions have been enabled by HAL_UART_Receive_IT()
bogdanm	0:9b334a45a8ff	1953	* @param huart: UART handle
bogdanm	0:9b334a45a8ff	1954	* @retval HAL status
bogdanm	0:9b334a45a8ff	1955	*/
bogdanm	0:9b334a45a8ff	1956	static HAL_StatusTypeDef UART_Receive_IT(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	1957	{
bogdanm	0:9b334a45a8ff	1958	uint16_t* tmp;
bogdanm	0:9b334a45a8ff	1959	uint16_t uhMask = huart->Mask;
bogdanm	0:9b334a45a8ff	1960
bogdanm	0:9b334a45a8ff	1961	if((huart->State == HAL_UART_STATE_BUSY_RX) \|\| (huart->State == HAL_UART_STATE_BUSY_TX_RX))
bogdanm	0:9b334a45a8ff	1962	{
bogdanm	0:9b334a45a8ff	1963
bogdanm	0:9b334a45a8ff	1964	if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
bogdanm	0:9b334a45a8ff	1965	{
bogdanm	0:9b334a45a8ff	1966	tmp = (uint16_t*) huart->pRxBuffPtr ;
bogdanm	0:9b334a45a8ff	1967	*tmp = (uint16_t)(huart->Instance->RDR & uhMask);
bogdanm	0:9b334a45a8ff	1968	huart->pRxBuffPtr +=2;
bogdanm	0:9b334a45a8ff	1969	}
bogdanm	0:9b334a45a8ff	1970	else
bogdanm	0:9b334a45a8ff	1971	{
bogdanm	0:9b334a45a8ff	1972	*huart->pRxBuffPtr++ = (uint8_t)(huart->Instance->RDR & (uint8_t)uhMask);
bogdanm	0:9b334a45a8ff	1973	}
bogdanm	0:9b334a45a8ff	1974
bogdanm	0:9b334a45a8ff	1975	if(--huart->RxXferCount == 0)
bogdanm	0:9b334a45a8ff	1976	{
bogdanm	0:9b334a45a8ff	1977	__HAL_UART_DISABLE_IT(huart, UART_IT_RXNE);
bogdanm	0:9b334a45a8ff	1978
bogdanm	0:9b334a45a8ff	1979	/* Check if a transmit Process is ongoing or not */
bogdanm	0:9b334a45a8ff	1980	if(huart->State == HAL_UART_STATE_BUSY_TX_RX)
bogdanm	0:9b334a45a8ff	1981	{
bogdanm	0:9b334a45a8ff	1982	huart->State = HAL_UART_STATE_BUSY_TX;
bogdanm	0:9b334a45a8ff	1983	}
bogdanm	0:9b334a45a8ff	1984	else
bogdanm	0:9b334a45a8ff	1985	{
bogdanm	0:9b334a45a8ff	1986	/* Disable the UART Parity Error Interrupt */
bogdanm	0:9b334a45a8ff	1987	__HAL_UART_DISABLE_IT(huart, UART_IT_PE);
bogdanm	0:9b334a45a8ff	1988
bogdanm	0:9b334a45a8ff	1989	/* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */
bogdanm	0:9b334a45a8ff	1990	__HAL_UART_DISABLE_IT(huart, UART_IT_ERR);
bogdanm	0:9b334a45a8ff	1991
bogdanm	0:9b334a45a8ff	1992	huart->State = HAL_UART_STATE_READY;
bogdanm	0:9b334a45a8ff	1993	}
bogdanm	0:9b334a45a8ff	1994
bogdanm	0:9b334a45a8ff	1995	HAL_UART_RxCpltCallback(huart);
bogdanm	0:9b334a45a8ff	1996
bogdanm	0:9b334a45a8ff	1997	return HAL_OK;
bogdanm	0:9b334a45a8ff	1998	}
bogdanm	0:9b334a45a8ff	1999
bogdanm	0:9b334a45a8ff	2000	return HAL_OK;
bogdanm	0:9b334a45a8ff	2001	}
bogdanm	0:9b334a45a8ff	2002	else
bogdanm	0:9b334a45a8ff	2003	{
bogdanm	0:9b334a45a8ff	2004	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	2005	}
bogdanm	0:9b334a45a8ff	2006	}
bogdanm	0:9b334a45a8ff	2007
bogdanm	0:9b334a45a8ff	2008	/**
bogdanm	0:9b334a45a8ff	2009	* @}
bogdanm	0:9b334a45a8ff	2010	*/
bogdanm	0:9b334a45a8ff	2011
bogdanm	0:9b334a45a8ff	2012	#endif /* HAL_UART_MODULE_ENABLED */
bogdanm	0:9b334a45a8ff	2013	/**
bogdanm	0:9b334a45a8ff	2014	* @}
bogdanm	0:9b334a45a8ff	2015	*/
bogdanm	0:9b334a45a8ff	2016
bogdanm	0:9b334a45a8ff	2017	/**
bogdanm	0:9b334a45a8ff	2018	* @}
bogdanm	0:9b334a45a8ff	2019	*/
bogdanm	0:9b334a45a8ff	2020
bogdanm	0:9b334a45a8ff	2021	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/

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Type:	Library
Created:	16 May 2016
Imports:	1
Forks:	0
Commits:	130
Dependents:	1
Dependencies:	0
Followers:	1

targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_uart.c@0:9b334a45a8ff, 2015-10-01 (annotated)

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