en 129
fix LPC812 PWM
Fork of
mbed-dev
by 
mbed official
targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_sdadc.h@0:9b334a45a8ff, 2015-10-01 (annotated)
- Committer:
- bogdanm
- Date:
- Thu Oct 01 15:25:22 2015 +0300
- Revision:
- 0:9b334a45a8ff
Initial commit on mbed-dev
Replaces mbed-src (now inactive)
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| bogdanm | 0:9b334a45a8ff | 1 | /** |
| bogdanm | 0:9b334a45a8ff | 2 | ****************************************************************************** |
| bogdanm | 0:9b334a45a8ff | 3 | * @file stm32f3xx_hal_sdadc.h |
| bogdanm | 0:9b334a45a8ff | 4 | * @author MCD Application Team |
| bogdanm | 0:9b334a45a8ff | 5 | * @version V1.1.0 |
| bogdanm | 0:9b334a45a8ff | 6 | * @date 12-Sept-2014 |
| bogdanm | 0:9b334a45a8ff | 7 | * @brief This file contains all the functions prototypes for the SDADC |
| bogdanm | 0:9b334a45a8ff | 8 | * firmware library. |
| bogdanm | 0:9b334a45a8ff | 9 | ****************************************************************************** |
| bogdanm | 0:9b334a45a8ff | 10 | * @attention |
| bogdanm | 0:9b334a45a8ff | 11 | * |
| bogdanm | 0:9b334a45a8ff | 12 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
| bogdanm | 0:9b334a45a8ff | 13 | * |
| bogdanm | 0:9b334a45a8ff | 14 | * Redistribution and use in source and binary forms, with or without modification, |
| bogdanm | 0:9b334a45a8ff | 15 | * are permitted provided that the following conditions are met: |
| bogdanm | 0:9b334a45a8ff | 16 | * 1. Redistributions of source code must retain the above copyright notice, |
| bogdanm | 0:9b334a45a8ff | 17 | * this list of conditions and the following disclaimer. |
| bogdanm | 0:9b334a45a8ff | 18 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| bogdanm | 0:9b334a45a8ff | 19 | * this list of conditions and the following disclaimer in the documentation |
| bogdanm | 0:9b334a45a8ff | 20 | * and/or other materials provided with the distribution. |
| bogdanm | 0:9b334a45a8ff | 21 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| bogdanm | 0:9b334a45a8ff | 22 | * may be used to endorse or promote products derived from this software |
| bogdanm | 0:9b334a45a8ff | 23 | * without specific prior written permission. |
| bogdanm | 0:9b334a45a8ff | 24 | * |
| bogdanm | 0:9b334a45a8ff | 25 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| bogdanm | 0:9b334a45a8ff | 26 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| bogdanm | 0:9b334a45a8ff | 27 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| bogdanm | 0:9b334a45a8ff | 28 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| bogdanm | 0:9b334a45a8ff | 29 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| bogdanm | 0:9b334a45a8ff | 30 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| bogdanm | 0:9b334a45a8ff | 31 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| bogdanm | 0:9b334a45a8ff | 32 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| bogdanm | 0:9b334a45a8ff | 33 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| bogdanm | 0:9b334a45a8ff | 34 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| bogdanm | 0:9b334a45a8ff | 35 | * |
| bogdanm | 0:9b334a45a8ff | 36 | ****************************************************************************** |
| bogdanm | 0:9b334a45a8ff | 37 | */ |
| bogdanm | 0:9b334a45a8ff | 38 | |
| bogdanm | 0:9b334a45a8ff | 39 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 40 | #ifndef __STM32F3xx_SDADC_H |
| bogdanm | 0:9b334a45a8ff | 41 | #define __STM32F3xx_SDADC_H |
| bogdanm | 0:9b334a45a8ff | 42 | |
| bogdanm | 0:9b334a45a8ff | 43 | #ifdef __cplusplus |
| bogdanm | 0:9b334a45a8ff | 44 | extern "C" { |
| bogdanm | 0:9b334a45a8ff | 45 | #endif |
| bogdanm | 0:9b334a45a8ff | 46 | |
| bogdanm | 0:9b334a45a8ff | 47 | #if defined(STM32F373xC) || defined(STM32F378xx) |
| bogdanm | 0:9b334a45a8ff | 48 | |
| bogdanm | 0:9b334a45a8ff | 49 | /* Includes ------------------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 50 | #include "stm32f3xx_hal_def.h" |
| bogdanm | 0:9b334a45a8ff | 51 | |
| bogdanm | 0:9b334a45a8ff | 52 | /** @addtogroup STM32F3xx_HAL_Driver |
| bogdanm | 0:9b334a45a8ff | 53 | * @{ |
| bogdanm | 0:9b334a45a8ff | 54 | */ |
| bogdanm | 0:9b334a45a8ff | 55 | |
| bogdanm | 0:9b334a45a8ff | 56 | /** @addtogroup SDADC |
| bogdanm | 0:9b334a45a8ff | 57 | * @{ |
| bogdanm | 0:9b334a45a8ff | 58 | */ |
| bogdanm | 0:9b334a45a8ff | 59 | |
| bogdanm | 0:9b334a45a8ff | 60 | /* Exported types ------------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 61 | /** @defgroup SDADC_Exported_Types SDADC Exported Types |
| bogdanm | 0:9b334a45a8ff | 62 | * @{ |
| bogdanm | 0:9b334a45a8ff | 63 | */ |
| bogdanm | 0:9b334a45a8ff | 64 | |
| bogdanm | 0:9b334a45a8ff | 65 | |
| bogdanm | 0:9b334a45a8ff | 66 | /** |
| bogdanm | 0:9b334a45a8ff | 67 | * @brief HAL SDADC States definition |
| bogdanm | 0:9b334a45a8ff | 68 | */ |
| bogdanm | 0:9b334a45a8ff | 69 | typedef enum |
| bogdanm | 0:9b334a45a8ff | 70 | { |
| bogdanm | 0:9b334a45a8ff | 71 | HAL_SDADC_STATE_RESET = 0x00, /*!< SDADC not initialized */ |
| bogdanm | 0:9b334a45a8ff | 72 | HAL_SDADC_STATE_READY = 0x01, /*!< SDADC initialized and ready for use */ |
| bogdanm | 0:9b334a45a8ff | 73 | HAL_SDADC_STATE_CALIB = 0x02, /*!< SDADC calibration in progress */ |
| bogdanm | 0:9b334a45a8ff | 74 | HAL_SDADC_STATE_REG = 0x03, /*!< SDADC regular conversion in progress */ |
| bogdanm | 0:9b334a45a8ff | 75 | HAL_SDADC_STATE_INJ = 0x04, /*!< SDADC injected conversion in progress */ |
| bogdanm | 0:9b334a45a8ff | 76 | HAL_SDADC_STATE_REG_INJ = 0x05, /*!< SDADC regular and injected conversions in progress */ |
| bogdanm | 0:9b334a45a8ff | 77 | HAL_SDADC_STATE_ERROR = 0xFF, /*!< SDADC state error */ |
| bogdanm | 0:9b334a45a8ff | 78 | }HAL_SDADC_StateTypeDef; |
| bogdanm | 0:9b334a45a8ff | 79 | |
| bogdanm | 0:9b334a45a8ff | 80 | /** |
| bogdanm | 0:9b334a45a8ff | 81 | * @brief SDADC Init Structure definition |
| bogdanm | 0:9b334a45a8ff | 82 | */ |
| bogdanm | 0:9b334a45a8ff | 83 | typedef struct |
| bogdanm | 0:9b334a45a8ff | 84 | { |
| bogdanm | 0:9b334a45a8ff | 85 | uint32_t IdleLowPowerMode; /*!< Specifies if SDADC can enter in power down or standby when idle. |
| bogdanm | 0:9b334a45a8ff | 86 | This parameter can be a value of @ref SDADC_Idle_Low_Power_Mode */ |
| bogdanm | 0:9b334a45a8ff | 87 | uint32_t FastConversionMode; /*!< Specifies if Fast conversion mode is enabled or not. |
| bogdanm | 0:9b334a45a8ff | 88 | This parameter can be a value of @ref SDADC_Fast_Conv_Mode */ |
| bogdanm | 0:9b334a45a8ff | 89 | uint32_t SlowClockMode; /*!< Specifies if slow clock mode is enabled or not. |
| bogdanm | 0:9b334a45a8ff | 90 | This parameter can be a value of @ref SDADC_Slow_Clock_Mode */ |
| bogdanm | 0:9b334a45a8ff | 91 | uint32_t ReferenceVoltage; /*!< Specifies the reference voltage. |
| bogdanm | 0:9b334a45a8ff | 92 | This parameter can be a value of @ref SDADC_Reference_Voltage */ |
| bogdanm | 0:9b334a45a8ff | 93 | }SDADC_InitTypeDef; |
| bogdanm | 0:9b334a45a8ff | 94 | |
| bogdanm | 0:9b334a45a8ff | 95 | /** |
| bogdanm | 0:9b334a45a8ff | 96 | * @brief SDADC handle Structure definition |
| bogdanm | 0:9b334a45a8ff | 97 | */ |
| bogdanm | 0:9b334a45a8ff | 98 | typedef struct |
| bogdanm | 0:9b334a45a8ff | 99 | { |
| bogdanm | 0:9b334a45a8ff | 100 | SDADC_TypeDef *Instance; /*!< SDADC registers base address */ |
| bogdanm | 0:9b334a45a8ff | 101 | SDADC_InitTypeDef Init; /*!< SDADC init parameters */ |
| bogdanm | 0:9b334a45a8ff | 102 | DMA_HandleTypeDef *hdma; /*!< SDADC DMA Handle parameters */ |
| bogdanm | 0:9b334a45a8ff | 103 | uint32_t RegularContMode; /*!< Regular conversion continuous mode */ |
| bogdanm | 0:9b334a45a8ff | 104 | uint32_t InjectedContMode; /*!< Injected conversion continuous mode */ |
| bogdanm | 0:9b334a45a8ff | 105 | uint32_t InjectedChannelsNbr; /*!< Number of channels in injected sequence */ |
| bogdanm | 0:9b334a45a8ff | 106 | uint32_t InjConvRemaining; /*!< Injected conversion remaining */ |
| bogdanm | 0:9b334a45a8ff | 107 | uint32_t RegularTrigger; /*!< Current trigger used for regular conversion */ |
| bogdanm | 0:9b334a45a8ff | 108 | uint32_t InjectedTrigger; /*!< Current trigger used for injected conversion */ |
| bogdanm | 0:9b334a45a8ff | 109 | uint32_t ExtTriggerEdge; /*!< Rising, falling or both edges selected */ |
| bogdanm | 0:9b334a45a8ff | 110 | uint32_t RegularMultimode; /*!< current type of regular multimode */ |
| bogdanm | 0:9b334a45a8ff | 111 | uint32_t InjectedMultimode; /*!< Current type of injected multimode */ |
| bogdanm | 0:9b334a45a8ff | 112 | HAL_SDADC_StateTypeDef State; /*!< SDADC state */ |
| bogdanm | 0:9b334a45a8ff | 113 | uint32_t ErrorCode; /*!< SDADC Error code */ |
| bogdanm | 0:9b334a45a8ff | 114 | }SDADC_HandleTypeDef; |
| bogdanm | 0:9b334a45a8ff | 115 | |
| bogdanm | 0:9b334a45a8ff | 116 | /** |
| bogdanm | 0:9b334a45a8ff | 117 | * @brief SDADC Configuration Register Parameter Structure |
| bogdanm | 0:9b334a45a8ff | 118 | */ |
| bogdanm | 0:9b334a45a8ff | 119 | typedef struct |
| bogdanm | 0:9b334a45a8ff | 120 | { |
| bogdanm | 0:9b334a45a8ff | 121 | uint32_t InputMode; /*!< Specifies the input mode (single ended, differential...) |
| bogdanm | 0:9b334a45a8ff | 122 | This parameter can be any value of @ref SDADC_InputMode */ |
| bogdanm | 0:9b334a45a8ff | 123 | uint32_t Gain; /*!< Specifies the gain setting. |
| bogdanm | 0:9b334a45a8ff | 124 | This parameter can be any value of @ref SDADC_Gain */ |
| bogdanm | 0:9b334a45a8ff | 125 | uint32_t CommonMode; /*!< Specifies the common mode setting (VSSA, VDDA, VDDA/2). |
| bogdanm | 0:9b334a45a8ff | 126 | This parameter can be any value of @ref SDADC_CommonMode */ |
| bogdanm | 0:9b334a45a8ff | 127 | uint32_t Offset; /*!< Specifies the 12-bit offset value. |
| bogdanm | 0:9b334a45a8ff | 128 | This parameter can be any value lower or equal to 0x00000FFF */ |
| bogdanm | 0:9b334a45a8ff | 129 | }SDADC_ConfParamTypeDef; |
| bogdanm | 0:9b334a45a8ff | 130 | |
| bogdanm | 0:9b334a45a8ff | 131 | /** |
| bogdanm | 0:9b334a45a8ff | 132 | * @} |
| bogdanm | 0:9b334a45a8ff | 133 | */ |
| bogdanm | 0:9b334a45a8ff | 134 | |
| bogdanm | 0:9b334a45a8ff | 135 | /* Exported constants --------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 136 | |
| bogdanm | 0:9b334a45a8ff | 137 | /** @defgroup SDADC_Exported_Constants SDADC Exported Constants |
| bogdanm | 0:9b334a45a8ff | 138 | * @{ |
| bogdanm | 0:9b334a45a8ff | 139 | */ |
| bogdanm | 0:9b334a45a8ff | 140 | |
| bogdanm | 0:9b334a45a8ff | 141 | /** @defgroup SDADC_Idle_Low_Power_Mode SDADC Idle Low Power Mode |
| bogdanm | 0:9b334a45a8ff | 142 | * @{ |
| bogdanm | 0:9b334a45a8ff | 143 | */ |
| bogdanm | 0:9b334a45a8ff | 144 | #define SDADC_LOWPOWER_NONE ((uint32_t)0x00000000) |
| bogdanm | 0:9b334a45a8ff | 145 | #define SDADC_LOWPOWER_POWERDOWN SDADC_CR1_PDI |
| bogdanm | 0:9b334a45a8ff | 146 | #define SDADC_LOWPOWER_STANDBY SDADC_CR1_SBI |
| bogdanm | 0:9b334a45a8ff | 147 | #define IS_SDADC_LOWPOWER_MODE(LOWPOWER) (((LOWPOWER) == SDADC_LOWPOWER_NONE) || \ |
| bogdanm | 0:9b334a45a8ff | 148 | ((LOWPOWER) == SDADC_LOWPOWER_POWERDOWN) || \ |
| bogdanm | 0:9b334a45a8ff | 149 | ((LOWPOWER) == SDADC_LOWPOWER_STANDBY)) |
| bogdanm | 0:9b334a45a8ff | 150 | /** |
| bogdanm | 0:9b334a45a8ff | 151 | * @} |
| bogdanm | 0:9b334a45a8ff | 152 | */ |
| bogdanm | 0:9b334a45a8ff | 153 | |
| bogdanm | 0:9b334a45a8ff | 154 | /** @defgroup SDADC_Fast_Conv_Mode SDADC Fast Conversion Mode |
| bogdanm | 0:9b334a45a8ff | 155 | * @{ |
| bogdanm | 0:9b334a45a8ff | 156 | */ |
| bogdanm | 0:9b334a45a8ff | 157 | #define SDADC_FAST_CONV_DISABLE ((uint32_t)0x00000000) |
| bogdanm | 0:9b334a45a8ff | 158 | #define SDADC_FAST_CONV_ENABLE SDADC_CR2_FAST |
| bogdanm | 0:9b334a45a8ff | 159 | #define IS_SDADC_FAST_CONV_MODE(FAST) (((FAST) == SDADC_FAST_CONV_DISABLE) || \ |
| bogdanm | 0:9b334a45a8ff | 160 | ((FAST) == SDADC_FAST_CONV_ENABLE)) |
| bogdanm | 0:9b334a45a8ff | 161 | /** |
| bogdanm | 0:9b334a45a8ff | 162 | * @} |
| bogdanm | 0:9b334a45a8ff | 163 | */ |
| bogdanm | 0:9b334a45a8ff | 164 | |
| bogdanm | 0:9b334a45a8ff | 165 | /** @defgroup SDADC_Slow_Clock_Mode SDADC Slow Clock Mode |
| bogdanm | 0:9b334a45a8ff | 166 | * @{ |
| bogdanm | 0:9b334a45a8ff | 167 | */ |
| bogdanm | 0:9b334a45a8ff | 168 | #define SDADC_SLOW_CLOCK_DISABLE ((uint32_t)0x00000000) |
| bogdanm | 0:9b334a45a8ff | 169 | #define SDADC_SLOW_CLOCK_ENABLE SDADC_CR1_SLOWCK |
| bogdanm | 0:9b334a45a8ff | 170 | #define IS_SDADC_SLOW_CLOCK_MODE(MODE) (((MODE) == SDADC_SLOW_CLOCK_DISABLE) || \ |
| bogdanm | 0:9b334a45a8ff | 171 | ((MODE) == SDADC_SLOW_CLOCK_ENABLE)) |
| bogdanm | 0:9b334a45a8ff | 172 | /** |
| bogdanm | 0:9b334a45a8ff | 173 | * @} |
| bogdanm | 0:9b334a45a8ff | 174 | */ |
| bogdanm | 0:9b334a45a8ff | 175 | |
| bogdanm | 0:9b334a45a8ff | 176 | /** @defgroup SDADC_Reference_Voltage SDADC Reference Voltage |
| bogdanm | 0:9b334a45a8ff | 177 | * @{ |
| bogdanm | 0:9b334a45a8ff | 178 | */ |
| bogdanm | 0:9b334a45a8ff | 179 | #define SDADC_VREF_EXT ((uint32_t)0x00000000) /*!< The reference voltage is forced externally using VREF pin */ |
| bogdanm | 0:9b334a45a8ff | 180 | #define SDADC_VREF_VREFINT1 SDADC_CR1_REFV_0 /*!< The reference voltage is forced internally to 1.22V VREFINT */ |
| bogdanm | 0:9b334a45a8ff | 181 | #define SDADC_VREF_VREFINT2 SDADC_CR1_REFV_1 /*!< The reference voltage is forced internally to 1.8V VREFINT */ |
| bogdanm | 0:9b334a45a8ff | 182 | #define SDADC_VREF_VDDA SDADC_CR1_REFV /*!< The reference voltage is forced internally to VDDA */ |
| bogdanm | 0:9b334a45a8ff | 183 | #define IS_SDADC_VREF(VREF) (((VREF) == SDADC_VREF_EXT) || \ |
| bogdanm | 0:9b334a45a8ff | 184 | ((VREF) == SDADC_VREF_VREFINT1) || \ |
| bogdanm | 0:9b334a45a8ff | 185 | ((VREF) == SDADC_VREF_VREFINT2) || \ |
| bogdanm | 0:9b334a45a8ff | 186 | ((VREF) == SDADC_VREF_VDDA)) |
| bogdanm | 0:9b334a45a8ff | 187 | /** |
| bogdanm | 0:9b334a45a8ff | 188 | * @} |
| bogdanm | 0:9b334a45a8ff | 189 | */ |
| bogdanm | 0:9b334a45a8ff | 190 | |
| bogdanm | 0:9b334a45a8ff | 191 | /** @defgroup SDADC_ConfIndex SDADC Configuration Index |
| bogdanm | 0:9b334a45a8ff | 192 | * @{ |
| bogdanm | 0:9b334a45a8ff | 193 | */ |
| bogdanm | 0:9b334a45a8ff | 194 | |
| bogdanm | 0:9b334a45a8ff | 195 | #define SDADC_CONF_INDEX_0 ((uint32_t)0x00000000) /*!< Configuration 0 Register selected */ |
| bogdanm | 0:9b334a45a8ff | 196 | #define SDADC_CONF_INDEX_1 ((uint32_t)0x00000001) /*!< Configuration 1 Register selected */ |
| bogdanm | 0:9b334a45a8ff | 197 | #define SDADC_CONF_INDEX_2 ((uint32_t)0x00000002) /*!< Configuration 2 Register selected */ |
| bogdanm | 0:9b334a45a8ff | 198 | |
| bogdanm | 0:9b334a45a8ff | 199 | #define IS_SDADC_CONF_INDEX(CONF) (((CONF) == SDADC_CONF_INDEX_0) || \ |
| bogdanm | 0:9b334a45a8ff | 200 | ((CONF) == SDADC_CONF_INDEX_1) || \ |
| bogdanm | 0:9b334a45a8ff | 201 | ((CONF) == SDADC_CONF_INDEX_2)) |
| bogdanm | 0:9b334a45a8ff | 202 | /** |
| bogdanm | 0:9b334a45a8ff | 203 | * @} |
| bogdanm | 0:9b334a45a8ff | 204 | */ |
| bogdanm | 0:9b334a45a8ff | 205 | |
| bogdanm | 0:9b334a45a8ff | 206 | /** @defgroup SDADC_InputMode SDADC Input Mode |
| bogdanm | 0:9b334a45a8ff | 207 | * @{ |
| bogdanm | 0:9b334a45a8ff | 208 | */ |
| bogdanm | 0:9b334a45a8ff | 209 | #define SDADC_INPUT_MODE_DIFF ((uint32_t)0x00000000) /*!< Conversions are executed in differential mode */ |
| bogdanm | 0:9b334a45a8ff | 210 | #define SDADC_INPUT_MODE_SE_OFFSET SDADC_CONF0R_SE0_0 /*!< Conversions are executed in single ended offset mode */ |
| bogdanm | 0:9b334a45a8ff | 211 | #define SDADC_INPUT_MODE_SE_ZERO_REFERENCE SDADC_CONF0R_SE0 /*!< Conversions are executed in single ended zero-volt reference mode */ |
| bogdanm | 0:9b334a45a8ff | 212 | |
| bogdanm | 0:9b334a45a8ff | 213 | #define IS_SDADC_INPUT_MODE(MODE) (((MODE) == SDADC_INPUT_MODE_DIFF) || \ |
| bogdanm | 0:9b334a45a8ff | 214 | ((MODE) == SDADC_INPUT_MODE_SE_OFFSET) || \ |
| bogdanm | 0:9b334a45a8ff | 215 | ((MODE) == SDADC_INPUT_MODE_SE_ZERO_REFERENCE)) |
| bogdanm | 0:9b334a45a8ff | 216 | /** |
| bogdanm | 0:9b334a45a8ff | 217 | * @} |
| bogdanm | 0:9b334a45a8ff | 218 | */ |
| bogdanm | 0:9b334a45a8ff | 219 | |
| bogdanm | 0:9b334a45a8ff | 220 | /** @defgroup SDADC_Gain SDADC Gain |
| bogdanm | 0:9b334a45a8ff | 221 | * @{ |
| bogdanm | 0:9b334a45a8ff | 222 | */ |
| bogdanm | 0:9b334a45a8ff | 223 | #define SDADC_GAIN_1 ((uint32_t)0x00000000) /*!< Gain equal to 1 */ |
| bogdanm | 0:9b334a45a8ff | 224 | #define SDADC_GAIN_2 SDADC_CONF0R_GAIN0_0 /*!< Gain equal to 2 */ |
| bogdanm | 0:9b334a45a8ff | 225 | #define SDADC_GAIN_4 SDADC_CONF0R_GAIN0_1 /*!< Gain equal to 4 */ |
| bogdanm | 0:9b334a45a8ff | 226 | #define SDADC_GAIN_8 ((uint32_t)0x00300000) /*!< Gain equal to 8 */ |
| bogdanm | 0:9b334a45a8ff | 227 | #define SDADC_GAIN_16 SDADC_CONF0R_GAIN0_2 /*!< Gain equal to 16 */ |
| bogdanm | 0:9b334a45a8ff | 228 | #define SDADC_GAIN_32 ((uint32_t)0x00500000) /*!< Gain equal to 32 */ |
| bogdanm | 0:9b334a45a8ff | 229 | #define SDADC_GAIN_1_2 SDADC_CONF0R_GAIN0 /*!< Gain equal to 1/2 */ |
| bogdanm | 0:9b334a45a8ff | 230 | #define IS_SDADC_GAIN(GAIN) (((GAIN) == SDADC_GAIN_1) || \ |
| bogdanm | 0:9b334a45a8ff | 231 | ((GAIN) == SDADC_GAIN_2) || \ |
| bogdanm | 0:9b334a45a8ff | 232 | ((GAIN) == SDADC_GAIN_4) || \ |
| bogdanm | 0:9b334a45a8ff | 233 | ((GAIN) == SDADC_GAIN_8) || \ |
| bogdanm | 0:9b334a45a8ff | 234 | ((GAIN) == SDADC_GAIN_16) || \ |
| bogdanm | 0:9b334a45a8ff | 235 | ((GAIN) == SDADC_GAIN_32) || \ |
| bogdanm | 0:9b334a45a8ff | 236 | ((GAIN) == SDADC_GAIN_1_2)) |
| bogdanm | 0:9b334a45a8ff | 237 | /** |
| bogdanm | 0:9b334a45a8ff | 238 | * @} |
| bogdanm | 0:9b334a45a8ff | 239 | */ |
| bogdanm | 0:9b334a45a8ff | 240 | |
| bogdanm | 0:9b334a45a8ff | 241 | /** @defgroup SDADC_CommonMode SDADC Common Mode |
| bogdanm | 0:9b334a45a8ff | 242 | * @{ |
| bogdanm | 0:9b334a45a8ff | 243 | */ |
| bogdanm | 0:9b334a45a8ff | 244 | #define SDADC_COMMON_MODE_VSSA ((uint32_t)0x00000000) /*!< Select SDADC VSSA as common mode */ |
| bogdanm | 0:9b334a45a8ff | 245 | #define SDADC_COMMON_MODE_VDDA_2 SDADC_CONF0R_COMMON0_0 /*!< Select SDADC VDDA/2 as common mode */ |
| bogdanm | 0:9b334a45a8ff | 246 | #define SDADC_COMMON_MODE_VDDA SDADC_CONF0R_COMMON0_1 /*!< Select SDADC VDDA as common mode */ |
| bogdanm | 0:9b334a45a8ff | 247 | #define IS_SDADC_COMMON_MODE(MODE) (((MODE) == SDADC_COMMON_MODE_VSSA) || \ |
| bogdanm | 0:9b334a45a8ff | 248 | ((MODE) == SDADC_COMMON_MODE_VDDA_2) || \ |
| bogdanm | 0:9b334a45a8ff | 249 | ((MODE) == SDADC_COMMON_MODE_VDDA)) |
| bogdanm | 0:9b334a45a8ff | 250 | /** |
| bogdanm | 0:9b334a45a8ff | 251 | * @} |
| bogdanm | 0:9b334a45a8ff | 252 | */ |
| bogdanm | 0:9b334a45a8ff | 253 | |
| bogdanm | 0:9b334a45a8ff | 254 | /** @defgroup SDADC_Offset SDADC Offset |
| bogdanm | 0:9b334a45a8ff | 255 | * @{ |
| bogdanm | 0:9b334a45a8ff | 256 | */ |
| bogdanm | 0:9b334a45a8ff | 257 | #define IS_SDADC_OFFSET_VALUE(VALUE) ((VALUE) <= 0x00000FFF) |
| bogdanm | 0:9b334a45a8ff | 258 | /** |
| bogdanm | 0:9b334a45a8ff | 259 | * @} |
| bogdanm | 0:9b334a45a8ff | 260 | */ |
| bogdanm | 0:9b334a45a8ff | 261 | |
| bogdanm | 0:9b334a45a8ff | 262 | /** @defgroup SDADC_Channel_Selection SDADC Channel Selection |
| bogdanm | 0:9b334a45a8ff | 263 | * @{ |
| bogdanm | 0:9b334a45a8ff | 264 | */ |
| bogdanm | 0:9b334a45a8ff | 265 | |
| bogdanm | 0:9b334a45a8ff | 266 | /* SDADC Channels ------------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 267 | /* The SDADC channels are defined as follows: |
| bogdanm | 0:9b334a45a8ff | 268 | - in 16-bit LSB the channel mask is set |
| bogdanm | 0:9b334a45a8ff | 269 | - in 16-bit MSB the channel number is set |
| bogdanm | 0:9b334a45a8ff | 270 | e.g. for channel 5 definition: |
| bogdanm | 0:9b334a45a8ff | 271 | - the channel mask is 0x00000020 (bit 5 is set) |
| bogdanm | 0:9b334a45a8ff | 272 | - the channel number 5 is 0x00050000 |
| bogdanm | 0:9b334a45a8ff | 273 | --> Consequently, channel 5 definition is 0x00000020 | 0x00050000 = 0x00050020 */ |
| bogdanm | 0:9b334a45a8ff | 274 | #define SDADC_CHANNEL_0 ((uint32_t)0x00000001) |
| bogdanm | 0:9b334a45a8ff | 275 | #define SDADC_CHANNEL_1 ((uint32_t)0x00010002) |
| bogdanm | 0:9b334a45a8ff | 276 | #define SDADC_CHANNEL_2 ((uint32_t)0x00020004) |
| bogdanm | 0:9b334a45a8ff | 277 | #define SDADC_CHANNEL_3 ((uint32_t)0x00030008) |
| bogdanm | 0:9b334a45a8ff | 278 | #define SDADC_CHANNEL_4 ((uint32_t)0x00040010) |
| bogdanm | 0:9b334a45a8ff | 279 | #define SDADC_CHANNEL_5 ((uint32_t)0x00050020) |
| bogdanm | 0:9b334a45a8ff | 280 | #define SDADC_CHANNEL_6 ((uint32_t)0x00060040) |
| bogdanm | 0:9b334a45a8ff | 281 | #define SDADC_CHANNEL_7 ((uint32_t)0x00070080) |
| bogdanm | 0:9b334a45a8ff | 282 | #define SDADC_CHANNEL_8 ((uint32_t)0x00080100) |
| bogdanm | 0:9b334a45a8ff | 283 | |
| bogdanm | 0:9b334a45a8ff | 284 | /* Just one channel of the 9 channels can be selected for regular conversion */ |
| bogdanm | 0:9b334a45a8ff | 285 | #define IS_SDADC_REGULAR_CHANNEL(CHANNEL) (((CHANNEL) == SDADC_CHANNEL_0) || \ |
| bogdanm | 0:9b334a45a8ff | 286 | ((CHANNEL) == SDADC_CHANNEL_1) || \ |
| bogdanm | 0:9b334a45a8ff | 287 | ((CHANNEL) == SDADC_CHANNEL_2) || \ |
| bogdanm | 0:9b334a45a8ff | 288 | ((CHANNEL) == SDADC_CHANNEL_3) || \ |
| bogdanm | 0:9b334a45a8ff | 289 | ((CHANNEL) == SDADC_CHANNEL_4) || \ |
| bogdanm | 0:9b334a45a8ff | 290 | ((CHANNEL) == SDADC_CHANNEL_5) || \ |
| bogdanm | 0:9b334a45a8ff | 291 | ((CHANNEL) == SDADC_CHANNEL_6) || \ |
| bogdanm | 0:9b334a45a8ff | 292 | ((CHANNEL) == SDADC_CHANNEL_7) || \ |
| bogdanm | 0:9b334a45a8ff | 293 | ((CHANNEL) == SDADC_CHANNEL_8)) |
| bogdanm | 0:9b334a45a8ff | 294 | |
| bogdanm | 0:9b334a45a8ff | 295 | /* Any or all of the 9 channels can be selected for injected conversion */ |
| bogdanm | 0:9b334a45a8ff | 296 | #define IS_SDADC_INJECTED_CHANNEL(CHANNEL) (((CHANNEL) != 0) && ((CHANNEL) <= 0x000F01FF)) |
| bogdanm | 0:9b334a45a8ff | 297 | |
| bogdanm | 0:9b334a45a8ff | 298 | /** |
| bogdanm | 0:9b334a45a8ff | 299 | * @} |
| bogdanm | 0:9b334a45a8ff | 300 | */ |
| bogdanm | 0:9b334a45a8ff | 301 | |
| bogdanm | 0:9b334a45a8ff | 302 | /** @defgroup SDADC_CalibrationSequence SDADC Calibration Sequence |
| bogdanm | 0:9b334a45a8ff | 303 | * @{ |
| bogdanm | 0:9b334a45a8ff | 304 | */ |
| bogdanm | 0:9b334a45a8ff | 305 | #define SDADC_CALIBRATION_SEQ_1 ((uint32_t)0x00000000) /*!< One calibration sequence to calculate offset of conf0 (OFFSET0[11:0]) */ |
| bogdanm | 0:9b334a45a8ff | 306 | #define SDADC_CALIBRATION_SEQ_2 SDADC_CR2_CALIBCNT_0 /*!< Two calibration sequences to calculate offset of conf0 and conf1 (OFFSET0[11:0] and OFFSET1[11:0]) */ |
| bogdanm | 0:9b334a45a8ff | 307 | #define SDADC_CALIBRATION_SEQ_3 SDADC_CR2_CALIBCNT_1 /*!< Three calibration sequences to calculate offset of conf0, conf1 and conf2 (OFFSET0[11:0], OFFSET1[11:0], and OFFSET2[11:0]) */ |
| bogdanm | 0:9b334a45a8ff | 308 | |
| bogdanm | 0:9b334a45a8ff | 309 | #define IS_SDADC_CALIB_SEQUENCE(SEQUENCE) (((SEQUENCE) == SDADC_CALIBRATION_SEQ_1) || \ |
| bogdanm | 0:9b334a45a8ff | 310 | ((SEQUENCE) == SDADC_CALIBRATION_SEQ_2) || \ |
| bogdanm | 0:9b334a45a8ff | 311 | ((SEQUENCE) == SDADC_CALIBRATION_SEQ_3)) |
| bogdanm | 0:9b334a45a8ff | 312 | /** |
| bogdanm | 0:9b334a45a8ff | 313 | * @} |
| bogdanm | 0:9b334a45a8ff | 314 | */ |
| bogdanm | 0:9b334a45a8ff | 315 | |
| bogdanm | 0:9b334a45a8ff | 316 | /** @defgroup SDADC_ContinuousMode SDADC Continuous Mode |
| bogdanm | 0:9b334a45a8ff | 317 | * @{ |
| bogdanm | 0:9b334a45a8ff | 318 | */ |
| bogdanm | 0:9b334a45a8ff | 319 | #define SDADC_CONTINUOUS_CONV_OFF ((uint32_t)0x00000000) /*!< Conversion are not continuous */ |
| bogdanm | 0:9b334a45a8ff | 320 | #define SDADC_CONTINUOUS_CONV_ON ((uint32_t)0x00000001) /*!< Conversion are continuous */ |
| bogdanm | 0:9b334a45a8ff | 321 | |
| bogdanm | 0:9b334a45a8ff | 322 | #define IS_SDADC_CONTINUOUS_MODE(MODE) (((MODE) == SDADC_CONTINUOUS_CONV_OFF) || \ |
| bogdanm | 0:9b334a45a8ff | 323 | ((MODE) == SDADC_CONTINUOUS_CONV_ON)) |
| bogdanm | 0:9b334a45a8ff | 324 | /** |
| bogdanm | 0:9b334a45a8ff | 325 | * @} |
| bogdanm | 0:9b334a45a8ff | 326 | */ |
| bogdanm | 0:9b334a45a8ff | 327 | |
| bogdanm | 0:9b334a45a8ff | 328 | /** @defgroup SDADC_Trigger SDADC Trigger |
| bogdanm | 0:9b334a45a8ff | 329 | * @{ |
| bogdanm | 0:9b334a45a8ff | 330 | */ |
| bogdanm | 0:9b334a45a8ff | 331 | #define SDADC_SOFTWARE_TRIGGER ((uint32_t)0x00000000) /*!< Software trigger */ |
| bogdanm | 0:9b334a45a8ff | 332 | #define SDADC_SYNCHRONOUS_TRIGGER ((uint32_t)0x00000001) /*!< Synchronous with SDADC1 (only for SDADC2 and SDADC3) */ |
| bogdanm | 0:9b334a45a8ff | 333 | #define SDADC_EXTERNAL_TRIGGER ((uint32_t)0x00000002) /*!< External trigger */ |
| bogdanm | 0:9b334a45a8ff | 334 | |
| bogdanm | 0:9b334a45a8ff | 335 | #define IS_SDADC_REGULAR_TRIGGER(TRIGGER) (((TRIGGER) == SDADC_SOFTWARE_TRIGGER) || \ |
| bogdanm | 0:9b334a45a8ff | 336 | ((TRIGGER) == SDADC_SYNCHRONOUS_TRIGGER)) |
| bogdanm | 0:9b334a45a8ff | 337 | |
| bogdanm | 0:9b334a45a8ff | 338 | #define IS_SDADC_INJECTED_TRIGGER(TRIGGER) (((TRIGGER) == SDADC_SOFTWARE_TRIGGER) || \ |
| bogdanm | 0:9b334a45a8ff | 339 | ((TRIGGER) == SDADC_SYNCHRONOUS_TRIGGER) || \ |
| bogdanm | 0:9b334a45a8ff | 340 | ((TRIGGER) == SDADC_EXTERNAL_TRIGGER)) |
| bogdanm | 0:9b334a45a8ff | 341 | /** |
| bogdanm | 0:9b334a45a8ff | 342 | * @} |
| bogdanm | 0:9b334a45a8ff | 343 | */ |
| bogdanm | 0:9b334a45a8ff | 344 | |
| bogdanm | 0:9b334a45a8ff | 345 | /** @defgroup SDADC_InjectedExtTrigger SDADC Injected External Trigger |
| bogdanm | 0:9b334a45a8ff | 346 | * @{ |
| bogdanm | 0:9b334a45a8ff | 347 | */ |
| bogdanm | 0:9b334a45a8ff | 348 | #define SDADC_EXT_TRIG_TIM13_CC1 ((uint32_t)0x00000000) /*!< Trigger source for SDADC1 */ |
| bogdanm | 0:9b334a45a8ff | 349 | #define SDADC_EXT_TRIG_TIM14_CC1 ((uint32_t)0x00000100) /*!< Trigger source for SDADC1 */ |
| bogdanm | 0:9b334a45a8ff | 350 | #define SDADC_EXT_TRIG_TIM16_CC1 ((uint32_t)0x00000000) /*!< Trigger source for SDADC3 */ |
| bogdanm | 0:9b334a45a8ff | 351 | #define SDADC_EXT_TRIG_TIM17_CC1 ((uint32_t)0x00000000) /*!< Trigger source for SDADC2 */ |
| bogdanm | 0:9b334a45a8ff | 352 | #define SDADC_EXT_TRIG_TIM12_CC1 ((uint32_t)0x00000100) /*!< Trigger source for SDADC2 */ |
| bogdanm | 0:9b334a45a8ff | 353 | #define SDADC_EXT_TRIG_TIM12_CC2 ((uint32_t)0x00000100) /*!< Trigger source for SDADC3 */ |
| bogdanm | 0:9b334a45a8ff | 354 | #define SDADC_EXT_TRIG_TIM15_CC2 ((uint32_t)0x00000200) /*!< Trigger source for SDADC1 */ |
| bogdanm | 0:9b334a45a8ff | 355 | #define SDADC_EXT_TRIG_TIM2_CC3 ((uint32_t)0x00000200) /*!< Trigger source for SDADC2 */ |
| bogdanm | 0:9b334a45a8ff | 356 | #define SDADC_EXT_TRIG_TIM2_CC4 ((uint32_t)0x00000200) /*!< Trigger source for SDADC3 */ |
| bogdanm | 0:9b334a45a8ff | 357 | #define SDADC_EXT_TRIG_TIM3_CC1 ((uint32_t)0x00000300) /*!< Trigger source for SDADC1 */ |
| bogdanm | 0:9b334a45a8ff | 358 | #define SDADC_EXT_TRIG_TIM3_CC2 ((uint32_t)0x00000300) /*!< Trigger source for SDADC2 */ |
| bogdanm | 0:9b334a45a8ff | 359 | #define SDADC_EXT_TRIG_TIM3_CC3 ((uint32_t)0x00000300) /*!< Trigger source for SDADC3 */ |
| bogdanm | 0:9b334a45a8ff | 360 | #define SDADC_EXT_TRIG_TIM4_CC1 ((uint32_t)0x00000400) /*!< Trigger source for SDADC1 */ |
| bogdanm | 0:9b334a45a8ff | 361 | #define SDADC_EXT_TRIG_TIM4_CC2 ((uint32_t)0x00000400) /*!< Trigger source for SDADC2 */ |
| bogdanm | 0:9b334a45a8ff | 362 | #define SDADC_EXT_TRIG_TIM4_CC3 ((uint32_t)0x00000400) /*!< Trigger source for SDADC3 */ |
| bogdanm | 0:9b334a45a8ff | 363 | #define SDADC_EXT_TRIG_TIM19_CC2 ((uint32_t)0x00000500) /*!< Trigger source for SDADC1 */ |
| bogdanm | 0:9b334a45a8ff | 364 | #define SDADC_EXT_TRIG_TIM19_CC3 ((uint32_t)0x00000500) /*!< Trigger source for SDADC2 */ |
| bogdanm | 0:9b334a45a8ff | 365 | #define SDADC_EXT_TRIG_TIM19_CC4 ((uint32_t)0x00000500) /*!< Trigger source for SDADC3 */ |
| bogdanm | 0:9b334a45a8ff | 366 | #define SDADC_EXT_TRIG_EXTI11 ((uint32_t)0x00000700) /*!< Trigger source for SDADC1, SDADC2 and SDADC3 */ |
| bogdanm | 0:9b334a45a8ff | 367 | #define SDADC_EXT_TRIG_EXTI15 ((uint32_t)0x00000600) /*!< Trigger source for SDADC1, SDADC2 and SDADC3 */ |
| bogdanm | 0:9b334a45a8ff | 368 | |
| bogdanm | 0:9b334a45a8ff | 369 | #define IS_SDADC_EXT_INJEC_TRIG(INJTRIG) (((INJTRIG) == SDADC_EXT_TRIG_TIM13_CC1) || \ |
| bogdanm | 0:9b334a45a8ff | 370 | ((INJTRIG) == SDADC_EXT_TRIG_TIM14_CC1) || \ |
| bogdanm | 0:9b334a45a8ff | 371 | ((INJTRIG) == SDADC_EXT_TRIG_TIM16_CC1) || \ |
| bogdanm | 0:9b334a45a8ff | 372 | ((INJTRIG) == SDADC_EXT_TRIG_TIM17_CC1) || \ |
| bogdanm | 0:9b334a45a8ff | 373 | ((INJTRIG) == SDADC_EXT_TRIG_TIM12_CC1) || \ |
| bogdanm | 0:9b334a45a8ff | 374 | ((INJTRIG) == SDADC_EXT_TRIG_TIM12_CC2) || \ |
| bogdanm | 0:9b334a45a8ff | 375 | ((INJTRIG) == SDADC_EXT_TRIG_TIM15_CC2) || \ |
| bogdanm | 0:9b334a45a8ff | 376 | ((INJTRIG) == SDADC_EXT_TRIG_TIM2_CC3) || \ |
| bogdanm | 0:9b334a45a8ff | 377 | ((INJTRIG) == SDADC_EXT_TRIG_TIM2_CC4) || \ |
| bogdanm | 0:9b334a45a8ff | 378 | ((INJTRIG) == SDADC_EXT_TRIG_TIM3_CC1) || \ |
| bogdanm | 0:9b334a45a8ff | 379 | ((INJTRIG) == SDADC_EXT_TRIG_TIM3_CC2) || \ |
| bogdanm | 0:9b334a45a8ff | 380 | ((INJTRIG) == SDADC_EXT_TRIG_TIM3_CC3) || \ |
| bogdanm | 0:9b334a45a8ff | 381 | ((INJTRIG) == SDADC_EXT_TRIG_TIM4_CC1) || \ |
| bogdanm | 0:9b334a45a8ff | 382 | ((INJTRIG) == SDADC_EXT_TRIG_TIM4_CC2) || \ |
| bogdanm | 0:9b334a45a8ff | 383 | ((INJTRIG) == SDADC_EXT_TRIG_TIM4_CC3) || \ |
| bogdanm | 0:9b334a45a8ff | 384 | ((INJTRIG) == SDADC_EXT_TRIG_TIM19_CC2) || \ |
| bogdanm | 0:9b334a45a8ff | 385 | ((INJTRIG) == SDADC_EXT_TRIG_TIM19_CC3) || \ |
| bogdanm | 0:9b334a45a8ff | 386 | ((INJTRIG) == SDADC_EXT_TRIG_TIM19_CC4) || \ |
| bogdanm | 0:9b334a45a8ff | 387 | ((INJTRIG) == SDADC_EXT_TRIG_EXTI11) || \ |
| bogdanm | 0:9b334a45a8ff | 388 | ((INJTRIG) == SDADC_EXT_TRIG_EXTI15)) |
| bogdanm | 0:9b334a45a8ff | 389 | /** |
| bogdanm | 0:9b334a45a8ff | 390 | * @} |
| bogdanm | 0:9b334a45a8ff | 391 | */ |
| bogdanm | 0:9b334a45a8ff | 392 | |
| bogdanm | 0:9b334a45a8ff | 393 | /** @defgroup SDADC_ExtTriggerEdge SDADC External Trigger Edge |
| bogdanm | 0:9b334a45a8ff | 394 | * @{ |
| bogdanm | 0:9b334a45a8ff | 395 | */ |
| bogdanm | 0:9b334a45a8ff | 396 | #define SDADC_EXT_TRIG_RISING_EDGE SDADC_CR2_JEXTEN_0 /*!< External rising edge */ |
| bogdanm | 0:9b334a45a8ff | 397 | #define SDADC_EXT_TRIG_FALLING_EDGE SDADC_CR2_JEXTEN_1 /*!< External falling edge */ |
| bogdanm | 0:9b334a45a8ff | 398 | #define SDADC_EXT_TRIG_BOTH_EDGES SDADC_CR2_JEXTEN /*!< External rising and falling edges */ |
| bogdanm | 0:9b334a45a8ff | 399 | |
| bogdanm | 0:9b334a45a8ff | 400 | #define IS_SDADC_EXT_TRIG_EDGE(TRIGGER) (((TRIGGER) == SDADC_EXT_TRIG_RISING_EDGE) || \ |
| bogdanm | 0:9b334a45a8ff | 401 | ((TRIGGER) == SDADC_EXT_TRIG_FALLING_EDGE) || \ |
| bogdanm | 0:9b334a45a8ff | 402 | ((TRIGGER) == SDADC_EXT_TRIG_BOTH_EDGES)) |
| bogdanm | 0:9b334a45a8ff | 403 | /** |
| bogdanm | 0:9b334a45a8ff | 404 | * @} |
| bogdanm | 0:9b334a45a8ff | 405 | */ |
| bogdanm | 0:9b334a45a8ff | 406 | |
| bogdanm | 0:9b334a45a8ff | 407 | /** @defgroup SDADC_InjectedDelay SDADC Injected Conversion Delay |
| bogdanm | 0:9b334a45a8ff | 408 | * @{ |
| bogdanm | 0:9b334a45a8ff | 409 | */ |
| bogdanm | 0:9b334a45a8ff | 410 | #define SDADC_INJECTED_DELAY_NONE ((uint32_t)0x00000000) /*!< No delay on injected conversion */ |
| bogdanm | 0:9b334a45a8ff | 411 | #define SDADC_INJECTED_DELAY SDADC_CR2_JDS /*!< Delay on injected conversion */ |
| bogdanm | 0:9b334a45a8ff | 412 | |
| bogdanm | 0:9b334a45a8ff | 413 | #define IS_SDADC_INJECTED_DELAY(DELAY) (((DELAY) == SDADC_INJECTED_DELAY_NONE) || \ |
| bogdanm | 0:9b334a45a8ff | 414 | ((DELAY) == SDADC_INJECTED_DELAY)) |
| bogdanm | 0:9b334a45a8ff | 415 | /** |
| bogdanm | 0:9b334a45a8ff | 416 | * @} |
| bogdanm | 0:9b334a45a8ff | 417 | */ |
| bogdanm | 0:9b334a45a8ff | 418 | |
| bogdanm | 0:9b334a45a8ff | 419 | /** @defgroup SDADC_MultimodeType SDADC Multimode Type |
| bogdanm | 0:9b334a45a8ff | 420 | * @{ |
| bogdanm | 0:9b334a45a8ff | 421 | */ |
| bogdanm | 0:9b334a45a8ff | 422 | #define SDADC_MULTIMODE_SDADC1_SDADC2 ((uint32_t)0x00000000) /*!< Get conversion values for SDADC1 and SDADC2 */ |
| bogdanm | 0:9b334a45a8ff | 423 | #define SDADC_MULTIMODE_SDADC1_SDADC3 ((uint32_t)0x00000001) /*!< Get conversion values for SDADC1 and SDADC3 */ |
| bogdanm | 0:9b334a45a8ff | 424 | |
| bogdanm | 0:9b334a45a8ff | 425 | #define IS_SDADC_MULTIMODE_TYPE(TYPE) (((TYPE) == SDADC_MULTIMODE_SDADC1_SDADC2) || \ |
| bogdanm | 0:9b334a45a8ff | 426 | ((TYPE) == SDADC_MULTIMODE_SDADC1_SDADC3)) |
| bogdanm | 0:9b334a45a8ff | 427 | /** |
| bogdanm | 0:9b334a45a8ff | 428 | * @} |
| bogdanm | 0:9b334a45a8ff | 429 | */ |
| bogdanm | 0:9b334a45a8ff | 430 | |
| bogdanm | 0:9b334a45a8ff | 431 | /** @defgroup SDADC_ErrorCode SDADC Error Code |
| bogdanm | 0:9b334a45a8ff | 432 | * @{ |
| bogdanm | 0:9b334a45a8ff | 433 | */ |
| bogdanm | 0:9b334a45a8ff | 434 | #define SDADC_ERROR_NONE ((uint32_t)0x00000000) /*!< No error */ |
| bogdanm | 0:9b334a45a8ff | 435 | #define SDADC_ERROR_REGULAR_OVERRUN ((uint32_t)0x00000001) /*!< Overrun occurs during regular conversion */ |
| bogdanm | 0:9b334a45a8ff | 436 | #define SDADC_ERROR_INJECTED_OVERRUN ((uint32_t)0x00000002) /*!< Overrun occurs during injected conversion */ |
| bogdanm | 0:9b334a45a8ff | 437 | #define SDADC_ERROR_DMA ((uint32_t)0x00000003) /*!< DMA error occurs */ |
| bogdanm | 0:9b334a45a8ff | 438 | /** |
| bogdanm | 0:9b334a45a8ff | 439 | * @} |
| bogdanm | 0:9b334a45a8ff | 440 | */ |
| bogdanm | 0:9b334a45a8ff | 441 | |
| bogdanm | 0:9b334a45a8ff | 442 | /** |
| bogdanm | 0:9b334a45a8ff | 443 | * @} |
| bogdanm | 0:9b334a45a8ff | 444 | */ |
| bogdanm | 0:9b334a45a8ff | 445 | |
| bogdanm | 0:9b334a45a8ff | 446 | /* Exported macros -----------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 447 | /** @defgroup SDADC_Exported_Macros SDADC Exported Macros |
| bogdanm | 0:9b334a45a8ff | 448 | * @{ |
| bogdanm | 0:9b334a45a8ff | 449 | */ |
| bogdanm | 0:9b334a45a8ff | 450 | |
| bogdanm | 0:9b334a45a8ff | 451 | /** @brief Reset SDADC handle state |
| bogdanm | 0:9b334a45a8ff | 452 | * @param __HANDLE__: SDADC handle. |
| bogdanm | 0:9b334a45a8ff | 453 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 454 | */ |
| bogdanm | 0:9b334a45a8ff | 455 | #define __HAL_SDADC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SDADC_STATE_RESET) |
| bogdanm | 0:9b334a45a8ff | 456 | |
| bogdanm | 0:9b334a45a8ff | 457 | /** |
| bogdanm | 0:9b334a45a8ff | 458 | * @} |
| bogdanm | 0:9b334a45a8ff | 459 | */ |
| bogdanm | 0:9b334a45a8ff | 460 | |
| bogdanm | 0:9b334a45a8ff | 461 | |
| bogdanm | 0:9b334a45a8ff | 462 | /* Exported functions --------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 463 | /** @addtogroup SDADC_Exported_Functions SDADC Exported Functions |
| bogdanm | 0:9b334a45a8ff | 464 | * @{ |
| bogdanm | 0:9b334a45a8ff | 465 | */ |
| bogdanm | 0:9b334a45a8ff | 466 | |
| bogdanm | 0:9b334a45a8ff | 467 | /** @addtogroup SDADC_Exported_Functions_Group1 Initialization and de-initialization functions |
| bogdanm | 0:9b334a45a8ff | 468 | * @{ |
| bogdanm | 0:9b334a45a8ff | 469 | */ |
| bogdanm | 0:9b334a45a8ff | 470 | |
| bogdanm | 0:9b334a45a8ff | 471 | /* Initialization and de-initialization functions *****************************/ |
| bogdanm | 0:9b334a45a8ff | 472 | HAL_StatusTypeDef HAL_SDADC_Init(SDADC_HandleTypeDef *hsdadc); |
| bogdanm | 0:9b334a45a8ff | 473 | HAL_StatusTypeDef HAL_SDADC_DeInit(SDADC_HandleTypeDef *hsdadc); |
| bogdanm | 0:9b334a45a8ff | 474 | void HAL_SDADC_MspInit(SDADC_HandleTypeDef* hsdadc); |
| bogdanm | 0:9b334a45a8ff | 475 | void HAL_SDADC_MspDeInit(SDADC_HandleTypeDef* hsdadc); |
| bogdanm | 0:9b334a45a8ff | 476 | |
| bogdanm | 0:9b334a45a8ff | 477 | /** |
| bogdanm | 0:9b334a45a8ff | 478 | * @} |
| bogdanm | 0:9b334a45a8ff | 479 | */ |
| bogdanm | 0:9b334a45a8ff | 480 | |
| bogdanm | 0:9b334a45a8ff | 481 | /** @addtogroup SDADC_Exported_Functions_Group2 peripheral control functions |
| bogdanm | 0:9b334a45a8ff | 482 | * @{ |
| bogdanm | 0:9b334a45a8ff | 483 | */ |
| bogdanm | 0:9b334a45a8ff | 484 | |
| bogdanm | 0:9b334a45a8ff | 485 | /* Peripheral Control functions ***********************************************/ |
| bogdanm | 0:9b334a45a8ff | 486 | HAL_StatusTypeDef HAL_SDADC_PrepareChannelConfig(SDADC_HandleTypeDef *hsdadc, |
| bogdanm | 0:9b334a45a8ff | 487 | uint32_t ConfIndex, |
| bogdanm | 0:9b334a45a8ff | 488 | SDADC_ConfParamTypeDef* ConfParamStruct); |
| bogdanm | 0:9b334a45a8ff | 489 | HAL_StatusTypeDef HAL_SDADC_AssociateChannelConfig(SDADC_HandleTypeDef *hsdadc, |
| bogdanm | 0:9b334a45a8ff | 490 | uint32_t Channel, |
| bogdanm | 0:9b334a45a8ff | 491 | uint32_t ConfIndex); |
| bogdanm | 0:9b334a45a8ff | 492 | HAL_StatusTypeDef HAL_SDADC_ConfigChannel(SDADC_HandleTypeDef *hsdadc, |
| bogdanm | 0:9b334a45a8ff | 493 | uint32_t Channel, |
| bogdanm | 0:9b334a45a8ff | 494 | uint32_t ContinuousMode); |
| bogdanm | 0:9b334a45a8ff | 495 | HAL_StatusTypeDef HAL_SDADC_InjectedConfigChannel(SDADC_HandleTypeDef *hsdadc, |
| bogdanm | 0:9b334a45a8ff | 496 | uint32_t Channel, |
| bogdanm | 0:9b334a45a8ff | 497 | uint32_t ContinuousMode); |
| bogdanm | 0:9b334a45a8ff | 498 | HAL_StatusTypeDef HAL_SDADC_SelectInjectedExtTrigger(SDADC_HandleTypeDef *hsdadc, |
| bogdanm | 0:9b334a45a8ff | 499 | uint32_t InjectedExtTrigger, |
| bogdanm | 0:9b334a45a8ff | 500 | uint32_t ExtTriggerEdge); |
| bogdanm | 0:9b334a45a8ff | 501 | HAL_StatusTypeDef HAL_SDADC_SelectInjectedDelay(SDADC_HandleTypeDef *hsdadc, |
| bogdanm | 0:9b334a45a8ff | 502 | uint32_t InjectedDelay); |
| bogdanm | 0:9b334a45a8ff | 503 | HAL_StatusTypeDef HAL_SDADC_SelectRegularTrigger(SDADC_HandleTypeDef *hsdadc, uint32_t Trigger); |
| bogdanm | 0:9b334a45a8ff | 504 | HAL_StatusTypeDef HAL_SDADC_SelectInjectedTrigger(SDADC_HandleTypeDef *hsdadc, uint32_t Trigger); |
| bogdanm | 0:9b334a45a8ff | 505 | HAL_StatusTypeDef HAL_SDADC_MultiModeConfigChannel(SDADC_HandleTypeDef* hsdadc, uint32_t MultimodeType); |
| bogdanm | 0:9b334a45a8ff | 506 | HAL_StatusTypeDef HAL_SDADC_InjectedMultiModeConfigChannel(SDADC_HandleTypeDef* hsdadc, uint32_t MultimodeType); |
| bogdanm | 0:9b334a45a8ff | 507 | |
| bogdanm | 0:9b334a45a8ff | 508 | /** |
| bogdanm | 0:9b334a45a8ff | 509 | * @} |
| bogdanm | 0:9b334a45a8ff | 510 | */ |
| bogdanm | 0:9b334a45a8ff | 511 | |
| bogdanm | 0:9b334a45a8ff | 512 | /** @addtogroup SDADC_Exported_Functions_Group3 Input and Output operation functions |
| bogdanm | 0:9b334a45a8ff | 513 | * @{ |
| bogdanm | 0:9b334a45a8ff | 514 | */ |
| bogdanm | 0:9b334a45a8ff | 515 | |
| bogdanm | 0:9b334a45a8ff | 516 | /* IO operation functions *****************************************************/ |
| bogdanm | 0:9b334a45a8ff | 517 | HAL_StatusTypeDef HAL_SDADC_CalibrationStart(SDADC_HandleTypeDef *hsdadc, uint32_t CalibrationSequence); |
| bogdanm | 0:9b334a45a8ff | 518 | HAL_StatusTypeDef HAL_SDADC_CalibrationStart_IT(SDADC_HandleTypeDef *hsdadc, uint32_t CalibrationSequence); |
| bogdanm | 0:9b334a45a8ff | 519 | |
| bogdanm | 0:9b334a45a8ff | 520 | HAL_StatusTypeDef HAL_SDADC_Start(SDADC_HandleTypeDef *hsdadc); |
| bogdanm | 0:9b334a45a8ff | 521 | HAL_StatusTypeDef HAL_SDADC_Start_IT(SDADC_HandleTypeDef *hsdadc); |
| bogdanm | 0:9b334a45a8ff | 522 | HAL_StatusTypeDef HAL_SDADC_Start_DMA(SDADC_HandleTypeDef *hsdadc, uint32_t *pData, uint32_t Length); |
| bogdanm | 0:9b334a45a8ff | 523 | HAL_StatusTypeDef HAL_SDADC_Stop(SDADC_HandleTypeDef *hsdadc); |
| bogdanm | 0:9b334a45a8ff | 524 | HAL_StatusTypeDef HAL_SDADC_Stop_IT(SDADC_HandleTypeDef *hsdadc); |
| bogdanm | 0:9b334a45a8ff | 525 | HAL_StatusTypeDef HAL_SDADC_Stop_DMA(SDADC_HandleTypeDef *hsdadc); |
| bogdanm | 0:9b334a45a8ff | 526 | |
| bogdanm | 0:9b334a45a8ff | 527 | HAL_StatusTypeDef HAL_SDADC_InjectedStart(SDADC_HandleTypeDef *hsdadc); |
| bogdanm | 0:9b334a45a8ff | 528 | HAL_StatusTypeDef HAL_SDADC_InjectedStart_IT(SDADC_HandleTypeDef *hsdadc); |
| bogdanm | 0:9b334a45a8ff | 529 | HAL_StatusTypeDef HAL_SDADC_InjectedStart_DMA(SDADC_HandleTypeDef *hsdadc, uint32_t *pData, uint32_t Length); |
| bogdanm | 0:9b334a45a8ff | 530 | HAL_StatusTypeDef HAL_SDADC_InjectedStop(SDADC_HandleTypeDef *hsdadc); |
| bogdanm | 0:9b334a45a8ff | 531 | HAL_StatusTypeDef HAL_SDADC_InjectedStop_IT(SDADC_HandleTypeDef *hsdadc); |
| bogdanm | 0:9b334a45a8ff | 532 | HAL_StatusTypeDef HAL_SDADC_InjectedStop_DMA(SDADC_HandleTypeDef *hsdadc); |
| bogdanm | 0:9b334a45a8ff | 533 | |
| bogdanm | 0:9b334a45a8ff | 534 | HAL_StatusTypeDef HAL_SDADC_MultiModeStart_DMA(SDADC_HandleTypeDef* hsdadc, uint32_t* pData, uint32_t Length); |
| bogdanm | 0:9b334a45a8ff | 535 | HAL_StatusTypeDef HAL_SDADC_MultiModeStop_DMA(SDADC_HandleTypeDef* hsdadc); |
| bogdanm | 0:9b334a45a8ff | 536 | HAL_StatusTypeDef HAL_SDADC_InjectedMultiModeStart_DMA(SDADC_HandleTypeDef* hsdadc, uint32_t* pData, uint32_t Length); |
| bogdanm | 0:9b334a45a8ff | 537 | HAL_StatusTypeDef HAL_SDADC_InjectedMultiModeStop_DMA(SDADC_HandleTypeDef* hsdadc); |
| bogdanm | 0:9b334a45a8ff | 538 | |
| bogdanm | 0:9b334a45a8ff | 539 | uint32_t HAL_SDADC_GetValue(SDADC_HandleTypeDef *hsdadc); |
| bogdanm | 0:9b334a45a8ff | 540 | uint32_t HAL_SDADC_InjectedGetValue(SDADC_HandleTypeDef *hsdadc, uint32_t* Channel); |
| bogdanm | 0:9b334a45a8ff | 541 | uint32_t HAL_SDADC_MultiModeGetValue(SDADC_HandleTypeDef* hsdadc); |
| bogdanm | 0:9b334a45a8ff | 542 | uint32_t HAL_SDADC_InjectedMultiModeGetValue(SDADC_HandleTypeDef* hsdadc); |
| bogdanm | 0:9b334a45a8ff | 543 | |
| bogdanm | 0:9b334a45a8ff | 544 | void HAL_SDADC_IRQHandler(SDADC_HandleTypeDef* hsdadc); |
| bogdanm | 0:9b334a45a8ff | 545 | |
| bogdanm | 0:9b334a45a8ff | 546 | HAL_StatusTypeDef HAL_SDADC_PollForCalibEvent(SDADC_HandleTypeDef* hsdadc, uint32_t Timeout); |
| bogdanm | 0:9b334a45a8ff | 547 | HAL_StatusTypeDef HAL_SDADC_PollForConversion(SDADC_HandleTypeDef* hsdadc, uint32_t Timeout); |
| bogdanm | 0:9b334a45a8ff | 548 | HAL_StatusTypeDef HAL_SDADC_PollForInjectedConversion(SDADC_HandleTypeDef* hsdadc, uint32_t Timeout); |
| bogdanm | 0:9b334a45a8ff | 549 | |
| bogdanm | 0:9b334a45a8ff | 550 | void HAL_SDADC_CalibrationCpltCallback(SDADC_HandleTypeDef* hsdadc); |
| bogdanm | 0:9b334a45a8ff | 551 | void HAL_SDADC_ConvHalfCpltCallback(SDADC_HandleTypeDef* hsdadc); |
| bogdanm | 0:9b334a45a8ff | 552 | void HAL_SDADC_ConvCpltCallback(SDADC_HandleTypeDef* hsdadc); |
| bogdanm | 0:9b334a45a8ff | 553 | void HAL_SDADC_InjectedConvHalfCpltCallback(SDADC_HandleTypeDef* hsdadc); |
| bogdanm | 0:9b334a45a8ff | 554 | void HAL_SDADC_InjectedConvCpltCallback(SDADC_HandleTypeDef* hsdadc); |
| bogdanm | 0:9b334a45a8ff | 555 | void HAL_SDADC_ErrorCallback(SDADC_HandleTypeDef* hsdadc); |
| bogdanm | 0:9b334a45a8ff | 556 | |
| bogdanm | 0:9b334a45a8ff | 557 | /** |
| bogdanm | 0:9b334a45a8ff | 558 | * @} |
| bogdanm | 0:9b334a45a8ff | 559 | */ |
| bogdanm | 0:9b334a45a8ff | 560 | |
| bogdanm | 0:9b334a45a8ff | 561 | /** @defgroup SDADC_Exported_Functions_Group4 Peripheral State functions |
| bogdanm | 0:9b334a45a8ff | 562 | * @{ |
| bogdanm | 0:9b334a45a8ff | 563 | */ |
| bogdanm | 0:9b334a45a8ff | 564 | |
| bogdanm | 0:9b334a45a8ff | 565 | /* Peripheral State and Error functions ***************************************/ |
| bogdanm | 0:9b334a45a8ff | 566 | HAL_SDADC_StateTypeDef HAL_SDADC_GetState(SDADC_HandleTypeDef* hsdadc); |
| bogdanm | 0:9b334a45a8ff | 567 | uint32_t HAL_SDADC_GetError(SDADC_HandleTypeDef* hsdadc); |
| bogdanm | 0:9b334a45a8ff | 568 | |
| bogdanm | 0:9b334a45a8ff | 569 | /* Private functions ---------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 570 | |
| bogdanm | 0:9b334a45a8ff | 571 | /** |
| bogdanm | 0:9b334a45a8ff | 572 | * @} |
| bogdanm | 0:9b334a45a8ff | 573 | */ |
| bogdanm | 0:9b334a45a8ff | 574 | |
| bogdanm | 0:9b334a45a8ff | 575 | /** |
| bogdanm | 0:9b334a45a8ff | 576 | * @} |
| bogdanm | 0:9b334a45a8ff | 577 | */ |
| bogdanm | 0:9b334a45a8ff | 578 | |
| bogdanm | 0:9b334a45a8ff | 579 | /** |
| bogdanm | 0:9b334a45a8ff | 580 | * @} |
| bogdanm | 0:9b334a45a8ff | 581 | */ |
| bogdanm | 0:9b334a45a8ff | 582 | |
| bogdanm | 0:9b334a45a8ff | 583 | /** |
| bogdanm | 0:9b334a45a8ff | 584 | * @} |
| bogdanm | 0:9b334a45a8ff | 585 | */ |
| bogdanm | 0:9b334a45a8ff | 586 | |
| bogdanm | 0:9b334a45a8ff | 587 | #endif /* defined(STM32F373xC) || defined(STM32F378xx) */ |
| bogdanm | 0:9b334a45a8ff | 588 | |
| bogdanm | 0:9b334a45a8ff | 589 | #ifdef __cplusplus |
| bogdanm | 0:9b334a45a8ff | 590 | } |
| bogdanm | 0:9b334a45a8ff | 591 | #endif |
| bogdanm | 0:9b334a45a8ff | 592 | |
| bogdanm | 0:9b334a45a8ff | 593 | #endif /*__STM32F3xx_SDADC_H */ |
| bogdanm | 0:9b334a45a8ff | 594 | |
| bogdanm | 0:9b334a45a8ff | 595 | |
| bogdanm | 0:9b334a45a8ff | 596 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |