en 129 / mbed-dev

fix LPC812 PWM

Dependents:   IR_LED_Send

Fork of mbed-dev by mbed official

targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_pwr.h@0:9b334a45a8ff, 2015-10-01 (annotated)

Committer:
bogdanm
Date:
Thu Oct 01 15:25:22 2015 +0300
Revision:
0:9b334a45a8ff
Initial commit on mbed-dev



Replaces mbed-src (now inactive)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /**
bogdanm 0:9b334a45a8ff 2 ******************************************************************************
bogdanm 0:9b334a45a8ff 3 * @file stm32f3xx_hal_pwr.h
bogdanm 0:9b334a45a8ff 4 * @author MCD Application Team
bogdanm 0:9b334a45a8ff 5 * @version V1.1.0
bogdanm 0:9b334a45a8ff 6 * @date 12-Sept-2014
bogdanm 0:9b334a45a8ff 7 * @brief Header file of PWR HAL module.
bogdanm 0:9b334a45a8ff 8 ******************************************************************************
bogdanm 0:9b334a45a8ff 9 * @attention
bogdanm 0:9b334a45a8ff 10 *
bogdanm 0:9b334a45a8ff 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
bogdanm 0:9b334a45a8ff 12 *
bogdanm 0:9b334a45a8ff 13 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 0:9b334a45a8ff 14 * are permitted provided that the following conditions are met:
bogdanm 0:9b334a45a8ff 15 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 0:9b334a45a8ff 16 * this list of conditions and the following disclaimer.
bogdanm 0:9b334a45a8ff 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 0:9b334a45a8ff 18 * this list of conditions and the following disclaimer in the documentation
bogdanm 0:9b334a45a8ff 19 * and/or other materials provided with the distribution.
bogdanm 0:9b334a45a8ff 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 0:9b334a45a8ff 21 * may be used to endorse or promote products derived from this software
bogdanm 0:9b334a45a8ff 22 * without specific prior written permission.
bogdanm 0:9b334a45a8ff 23 *
bogdanm 0:9b334a45a8ff 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 0:9b334a45a8ff 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 0:9b334a45a8ff 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 0:9b334a45a8ff 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 0:9b334a45a8ff 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 0:9b334a45a8ff 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 0:9b334a45a8ff 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 0:9b334a45a8ff 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 0:9b334a45a8ff 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 0:9b334a45a8ff 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 0:9b334a45a8ff 34 *
bogdanm 0:9b334a45a8ff 35 ******************************************************************************
bogdanm 0:9b334a45a8ff 36 */
bogdanm 0:9b334a45a8ff 37
bogdanm 0:9b334a45a8ff 38 /* Define to prevent recursive inclusion -------------------------------------*/
bogdanm 0:9b334a45a8ff 39 #ifndef __STM32F3xx_HAL_PWR_H
bogdanm 0:9b334a45a8ff 40 #define __STM32F3xx_HAL_PWR_H
bogdanm 0:9b334a45a8ff 41
bogdanm 0:9b334a45a8ff 42 #ifdef __cplusplus
bogdanm 0:9b334a45a8ff 43 extern "C" {
bogdanm 0:9b334a45a8ff 44 #endif
bogdanm 0:9b334a45a8ff 45
bogdanm 0:9b334a45a8ff 46 /* Includes ------------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 47 #include "stm32f3xx_hal_def.h"
bogdanm 0:9b334a45a8ff 48
bogdanm 0:9b334a45a8ff 49 /** @addtogroup STM32F3xx_HAL_Driver
bogdanm 0:9b334a45a8ff 50 * @{
bogdanm 0:9b334a45a8ff 51 */
bogdanm 0:9b334a45a8ff 52
bogdanm 0:9b334a45a8ff 53 /** @addtogroup PWR PWR HAL Driver module
bogdanm 0:9b334a45a8ff 54 * @{
bogdanm 0:9b334a45a8ff 55 */
bogdanm 0:9b334a45a8ff 56
bogdanm 0:9b334a45a8ff 57 /* Exported types ------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 58 /* Exported constants --------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 59 /** @defgroup PWR_Alias_Exported_Constants PWR Alias Exported Constants
bogdanm 0:9b334a45a8ff 60 * @{
bogdanm 0:9b334a45a8ff 61 */
bogdanm 0:9b334a45a8ff 62 /* ------------- PWR registers bit address in the alias region ---------------*/
bogdanm 0:9b334a45a8ff 63 #define PWR_OFFSET (PWR_BASE - PERIPH_BASE)
bogdanm 0:9b334a45a8ff 64
bogdanm 0:9b334a45a8ff 65 /* --- CR Register ---*/
bogdanm 0:9b334a45a8ff 66 #define CR_OFFSET (PWR_OFFSET + 0x00)
bogdanm 0:9b334a45a8ff 67 /* Alias word address of DBP bit */
bogdanm 0:9b334a45a8ff 68 #define DBP_BitNumber POSITION_VAL(PWR_CR_DBP)
bogdanm 0:9b334a45a8ff 69 #define CR_DBP_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (DBP_BitNumber * 4))
bogdanm 0:9b334a45a8ff 70
bogdanm 0:9b334a45a8ff 71 /* Alias word address of PVDE bit */
bogdanm 0:9b334a45a8ff 72 #define PVDE_BitNumber POSITION_VAL(PWR_CR_PVDE)
bogdanm 0:9b334a45a8ff 73 #define CR_PVDE_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (PVDE_BitNumber * 4))
bogdanm 0:9b334a45a8ff 74
bogdanm 0:9b334a45a8ff 75 /* --- CSR Register ---*/
bogdanm 0:9b334a45a8ff 76 #define CSR_OFFSET (PWR_OFFSET + 0x04)
bogdanm 0:9b334a45a8ff 77 /* Alias word address of EWUP1 bit */
bogdanm 0:9b334a45a8ff 78 #define EWUP1_BitNumber POSITION_VAL(PWR_CSR_EWUP1)
bogdanm 0:9b334a45a8ff 79 #define CSR_EWUP1_BB (PERIPH_BB_BASE + (CSR_OFFSET * 32) + (EWUP1_BitNumber * 4))
bogdanm 0:9b334a45a8ff 80
bogdanm 0:9b334a45a8ff 81 /* Alias word address of EWUP2 bit */
bogdanm 0:9b334a45a8ff 82 #define EWUP2_BitNumber POSITION_VAL(PWR_CSR_EWUP2)
bogdanm 0:9b334a45a8ff 83 #define CSR_EWUP2_BB (PERIPH_BB_BASE + (CSR_OFFSET * 32) + (EWUP2_BitNumber * 4))
bogdanm 0:9b334a45a8ff 84
bogdanm 0:9b334a45a8ff 85 /* Alias word address of EWUP3 bit */
bogdanm 0:9b334a45a8ff 86 #define EWUP3_BitNumber POSITION_VAL(PWR_CSR_EWUP3)
bogdanm 0:9b334a45a8ff 87 #define CSR_EWUP3_BB (PERIPH_BB_BASE + (CSR_OFFSET * 32) + (EWUP3_BitNumber * 4))
bogdanm 0:9b334a45a8ff 88 /**
bogdanm 0:9b334a45a8ff 89 * @}
bogdanm 0:9b334a45a8ff 90 */
bogdanm 0:9b334a45a8ff 91
bogdanm 0:9b334a45a8ff 92 /** @defgroup PWR_Exported_Constants PWR Exported Constants
bogdanm 0:9b334a45a8ff 93 * @{
bogdanm 0:9b334a45a8ff 94 */
bogdanm 0:9b334a45a8ff 95
bogdanm 0:9b334a45a8ff 96 /** @defgroup PWR_WakeUp_Pins PWR WakeUp Pins
bogdanm 0:9b334a45a8ff 97 * @{
bogdanm 0:9b334a45a8ff 98 */
bogdanm 0:9b334a45a8ff 99
bogdanm 0:9b334a45a8ff 100 #define PWR_WAKEUP_PIN1 ((uint32_t)0x00)
bogdanm 0:9b334a45a8ff 101 #define PWR_WAKEUP_PIN2 ((uint32_t)0x01)
bogdanm 0:9b334a45a8ff 102 #define PWR_WAKEUP_PIN3 ((uint32_t)0x02)
bogdanm 0:9b334a45a8ff 103 #define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WAKEUP_PIN1) || \
bogdanm 0:9b334a45a8ff 104 ((PIN) == PWR_WAKEUP_PIN2) || \
bogdanm 0:9b334a45a8ff 105 ((PIN) == PWR_WAKEUP_PIN3))
bogdanm 0:9b334a45a8ff 106 /**
bogdanm 0:9b334a45a8ff 107 * @}
bogdanm 0:9b334a45a8ff 108 */
bogdanm 0:9b334a45a8ff 109
bogdanm 0:9b334a45a8ff 110 /** @defgroup PWR_Regulator_state_in_STOP_mode PWR Regulator state in STOP mode
bogdanm 0:9b334a45a8ff 111 * @{
bogdanm 0:9b334a45a8ff 112 */
bogdanm 0:9b334a45a8ff 113 #define PWR_MAINREGULATOR_ON ((uint32_t)0x00000000)
bogdanm 0:9b334a45a8ff 114 #define PWR_LOWPOWERREGULATOR_ON PWR_CR_LPDS
bogdanm 0:9b334a45a8ff 115
bogdanm 0:9b334a45a8ff 116 #define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_MAINREGULATOR_ON) || \
bogdanm 0:9b334a45a8ff 117 ((REGULATOR) == PWR_LOWPOWERREGULATOR_ON))
bogdanm 0:9b334a45a8ff 118 /**
bogdanm 0:9b334a45a8ff 119 * @}
bogdanm 0:9b334a45a8ff 120 */
bogdanm 0:9b334a45a8ff 121
bogdanm 0:9b334a45a8ff 122 /** @defgroup PWR_SLEEP_mode_entry PWR SLEEP mode entry
bogdanm 0:9b334a45a8ff 123 * @{
bogdanm 0:9b334a45a8ff 124 */
bogdanm 0:9b334a45a8ff 125 #define PWR_SLEEPENTRY_WFI ((uint8_t)0x01)
bogdanm 0:9b334a45a8ff 126 #define PWR_SLEEPENTRY_WFE ((uint8_t)0x02)
bogdanm 0:9b334a45a8ff 127 #define IS_PWR_SLEEP_ENTRY(ENTRY) (((ENTRY) == PWR_SLEEPENTRY_WFI) || ((ENTRY) == PWR_SLEEPENTRY_WFE))
bogdanm 0:9b334a45a8ff 128 /**
bogdanm 0:9b334a45a8ff 129 * @}
bogdanm 0:9b334a45a8ff 130 */
bogdanm 0:9b334a45a8ff 131
bogdanm 0:9b334a45a8ff 132 /** @defgroup PWR_STOP_mode_entry PWR STOP mode entry
bogdanm 0:9b334a45a8ff 133 * @{
bogdanm 0:9b334a45a8ff 134 */
bogdanm 0:9b334a45a8ff 135 #define PWR_STOPENTRY_WFI ((uint8_t)0x01)
bogdanm 0:9b334a45a8ff 136 #define PWR_STOPENTRY_WFE ((uint8_t)0x02)
bogdanm 0:9b334a45a8ff 137 #define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPENTRY_WFI) || ((ENTRY) == PWR_STOPENTRY_WFE))
bogdanm 0:9b334a45a8ff 138 /**
bogdanm 0:9b334a45a8ff 139 * @}
bogdanm 0:9b334a45a8ff 140 */
bogdanm 0:9b334a45a8ff 141
bogdanm 0:9b334a45a8ff 142 /** @defgroup PWR_Flag PWR Flag
bogdanm 0:9b334a45a8ff 143 * @{
bogdanm 0:9b334a45a8ff 144 */
bogdanm 0:9b334a45a8ff 145 #define PWR_FLAG_WU PWR_CSR_WUF
bogdanm 0:9b334a45a8ff 146 #define PWR_FLAG_SB PWR_CSR_SBF
bogdanm 0:9b334a45a8ff 147 #define PWR_FLAG_PVDO PWR_CSR_PVDO
bogdanm 0:9b334a45a8ff 148 #define PWR_FLAG_VREFINTRDY PWR_CSR_VREFINTRDYF
bogdanm 0:9b334a45a8ff 149 #define IS_PWR_GET_FLAG(FLAG) (((FLAG) == PWR_FLAG_WU) || ((FLAG) == PWR_FLAG_SB) || \
bogdanm 0:9b334a45a8ff 150 ((FLAG) == PWR_FLAG_PVDO) || ((FLAG) == PWR_FLAG_VREFINTRDY))
bogdanm 0:9b334a45a8ff 151
bogdanm 0:9b334a45a8ff 152
bogdanm 0:9b334a45a8ff 153 /**
bogdanm 0:9b334a45a8ff 154 * @}
bogdanm 0:9b334a45a8ff 155 */
bogdanm 0:9b334a45a8ff 156
bogdanm 0:9b334a45a8ff 157 /**
bogdanm 0:9b334a45a8ff 158 * @}
bogdanm 0:9b334a45a8ff 159 */
bogdanm 0:9b334a45a8ff 160
bogdanm 0:9b334a45a8ff 161 /* Exported macro ------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 162 /** @defgroup PWR_Exported_Macro PWR Exported Macro
bogdanm 0:9b334a45a8ff 163 * @{
bogdanm 0:9b334a45a8ff 164 */
bogdanm 0:9b334a45a8ff 165
bogdanm 0:9b334a45a8ff 166 /** @brief Check PWR flag is set or not.
bogdanm 0:9b334a45a8ff 167 * @param __FLAG__: specifies the flag to check.
bogdanm 0:9b334a45a8ff 168 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 169 * @arg PWR_FLAG_WU: Wake Up flag. This flag indicates that a wakeup event
bogdanm 0:9b334a45a8ff 170 * was received from the WKUP pin or from the RTC alarm (Alarm A
bogdanm 0:9b334a45a8ff 171 * or Alarm B), RTC Tamper event, RTC TimeStamp event or RTC Wakeup.
bogdanm 0:9b334a45a8ff 172 * An additional wakeup event is detected if the WKUP pin is enabled
bogdanm 0:9b334a45a8ff 173 * (by setting the EWUP bit) when the WKUP pin level is already high.
bogdanm 0:9b334a45a8ff 174 * @arg PWR_FLAG_SB: StandBy flag. This flag indicates that the system was
bogdanm 0:9b334a45a8ff 175 * resumed from StandBy mode.
bogdanm 0:9b334a45a8ff 176 * @arg PWR_FLAG_PVDO: PVD Output. This flag is valid only if PVD is enabled
bogdanm 0:9b334a45a8ff 177 * by the HAL_PWR_EnablePVD() function. The PVD is stopped by Standby mode
bogdanm 0:9b334a45a8ff 178 * For this reason, this bit is equal to 0 after Standby or reset
bogdanm 0:9b334a45a8ff 179 * until the PVDE bit is set.
bogdanm 0:9b334a45a8ff 180 * @arg PWR_FLAG_VREFINTRDY: This flag indicates that the internal reference
bogdanm 0:9b334a45a8ff 181 * voltage VREFINT is ready.
bogdanm 0:9b334a45a8ff 182 * @retval The new state of __FLAG__ (TRUE or FALSE).
bogdanm 0:9b334a45a8ff 183 */
bogdanm 0:9b334a45a8ff 184 #define __HAL_PWR_GET_FLAG(__FLAG__) ((PWR->CSR & (__FLAG__)) == (__FLAG__))
bogdanm 0:9b334a45a8ff 185
bogdanm 0:9b334a45a8ff 186 /** @brief Clear the PWR's pending flags.
bogdanm 0:9b334a45a8ff 187 * @param __FLAG__: specifies the flag to clear.
bogdanm 0:9b334a45a8ff 188 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 189 * @arg PWR_FLAG_WU: Wake Up flag
bogdanm 0:9b334a45a8ff 190 * @arg PWR_FLAG_SB: StandBy flag
bogdanm 0:9b334a45a8ff 191 */
bogdanm 0:9b334a45a8ff 192 #define __HAL_PWR_CLEAR_FLAG(__FLAG__) (PWR->CR |= (__FLAG__) << 2)
bogdanm 0:9b334a45a8ff 193
bogdanm 0:9b334a45a8ff 194 /**
bogdanm 0:9b334a45a8ff 195 * @}
bogdanm 0:9b334a45a8ff 196 */
bogdanm 0:9b334a45a8ff 197
bogdanm 0:9b334a45a8ff 198 /* Include PWR HAL Extended module */
bogdanm 0:9b334a45a8ff 199 #include "stm32f3xx_hal_pwr_ex.h"
bogdanm 0:9b334a45a8ff 200
bogdanm 0:9b334a45a8ff 201 /* Exported functions --------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 202
bogdanm 0:9b334a45a8ff 203 /** @addtogroup PWR_Exported_Functions PWR Exported Functions
bogdanm 0:9b334a45a8ff 204 * @{
bogdanm 0:9b334a45a8ff 205 */
bogdanm 0:9b334a45a8ff 206
bogdanm 0:9b334a45a8ff 207 /** @addtogroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions
bogdanm 0:9b334a45a8ff 208 * @{
bogdanm 0:9b334a45a8ff 209 */
bogdanm 0:9b334a45a8ff 210
bogdanm 0:9b334a45a8ff 211 /* Initialization and de-initialization functions *****************************/
bogdanm 0:9b334a45a8ff 212 void HAL_PWR_DeInit(void);
bogdanm 0:9b334a45a8ff 213
bogdanm 0:9b334a45a8ff 214 /**
bogdanm 0:9b334a45a8ff 215 * @}
bogdanm 0:9b334a45a8ff 216 */
bogdanm 0:9b334a45a8ff 217
bogdanm 0:9b334a45a8ff 218 /** @addtogroup PWR_Exported_Functions_Group2 Peripheral Control functions
bogdanm 0:9b334a45a8ff 219 * @{
bogdanm 0:9b334a45a8ff 220 */
bogdanm 0:9b334a45a8ff 221
bogdanm 0:9b334a45a8ff 222 /* Peripheral Control functions **********************************************/
bogdanm 0:9b334a45a8ff 223 void HAL_PWR_EnableBkUpAccess(void);
bogdanm 0:9b334a45a8ff 224 void HAL_PWR_DisableBkUpAccess(void);
bogdanm 0:9b334a45a8ff 225
bogdanm 0:9b334a45a8ff 226 /* WakeUp pins configuration functions ****************************************/
bogdanm 0:9b334a45a8ff 227 void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinx);
bogdanm 0:9b334a45a8ff 228 void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx);
bogdanm 0:9b334a45a8ff 229
bogdanm 0:9b334a45a8ff 230 /* Low Power modes configuration functions ************************************/
bogdanm 0:9b334a45a8ff 231 void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry);
bogdanm 0:9b334a45a8ff 232 void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry);
bogdanm 0:9b334a45a8ff 233 void HAL_PWR_EnterSTANDBYMode(void);
bogdanm 0:9b334a45a8ff 234
bogdanm 0:9b334a45a8ff 235 /**
bogdanm 0:9b334a45a8ff 236 * @}
bogdanm 0:9b334a45a8ff 237 */
bogdanm 0:9b334a45a8ff 238
bogdanm 0:9b334a45a8ff 239 /**
bogdanm 0:9b334a45a8ff 240 * @}
bogdanm 0:9b334a45a8ff 241 */
bogdanm 0:9b334a45a8ff 242
bogdanm 0:9b334a45a8ff 243 /**
bogdanm 0:9b334a45a8ff 244 * @}
bogdanm 0:9b334a45a8ff 245 */
bogdanm 0:9b334a45a8ff 246
bogdanm 0:9b334a45a8ff 247 /**
bogdanm 0:9b334a45a8ff 248 * @}
bogdanm 0:9b334a45a8ff 249 */
bogdanm 0:9b334a45a8ff 250
bogdanm 0:9b334a45a8ff 251 #ifdef __cplusplus
bogdanm 0:9b334a45a8ff 252 }
bogdanm 0:9b334a45a8ff 253 #endif
bogdanm 0:9b334a45a8ff 254
bogdanm 0:9b334a45a8ff 255
bogdanm 0:9b334a45a8ff 256 #endif /* __STM32F3xx_HAL_PWR_H */
bogdanm 0:9b334a45a8ff 257
bogdanm 0:9b334a45a8ff 258 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/