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fix LPC812 PWM
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targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_i2c.h@0:9b334a45a8ff, 2015-10-01 (annotated)
- Committer:
- bogdanm
- Date:
- Thu Oct 01 15:25:22 2015 +0300
- Revision:
- 0:9b334a45a8ff
Initial commit on mbed-dev
Replaces mbed-src (now inactive)
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| bogdanm | 0:9b334a45a8ff | 1 | /** |
| bogdanm | 0:9b334a45a8ff | 2 | ****************************************************************************** |
| bogdanm | 0:9b334a45a8ff | 3 | * @file stm32f3xx_hal_i2c.h |
| bogdanm | 0:9b334a45a8ff | 4 | * @author MCD Application Team |
| bogdanm | 0:9b334a45a8ff | 5 | * @version V1.1.0 |
| bogdanm | 0:9b334a45a8ff | 6 | * @date 12-Sept-2014 |
| bogdanm | 0:9b334a45a8ff | 7 | * @brief Header file of I2C HAL module. |
| bogdanm | 0:9b334a45a8ff | 8 | ****************************************************************************** |
| bogdanm | 0:9b334a45a8ff | 9 | * @attention |
| bogdanm | 0:9b334a45a8ff | 10 | * |
| bogdanm | 0:9b334a45a8ff | 11 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
| bogdanm | 0:9b334a45a8ff | 12 | * |
| bogdanm | 0:9b334a45a8ff | 13 | * Redistribution and use in source and binary forms, with or without modification, |
| bogdanm | 0:9b334a45a8ff | 14 | * are permitted provided that the following conditions are met: |
| bogdanm | 0:9b334a45a8ff | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
| bogdanm | 0:9b334a45a8ff | 16 | * this list of conditions and the following disclaimer. |
| bogdanm | 0:9b334a45a8ff | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| bogdanm | 0:9b334a45a8ff | 18 | * this list of conditions and the following disclaimer in the documentation |
| bogdanm | 0:9b334a45a8ff | 19 | * and/or other materials provided with the distribution. |
| bogdanm | 0:9b334a45a8ff | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| bogdanm | 0:9b334a45a8ff | 21 | * may be used to endorse or promote products derived from this software |
| bogdanm | 0:9b334a45a8ff | 22 | * without specific prior written permission. |
| bogdanm | 0:9b334a45a8ff | 23 | * |
| bogdanm | 0:9b334a45a8ff | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| bogdanm | 0:9b334a45a8ff | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| bogdanm | 0:9b334a45a8ff | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| bogdanm | 0:9b334a45a8ff | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| bogdanm | 0:9b334a45a8ff | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| bogdanm | 0:9b334a45a8ff | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| bogdanm | 0:9b334a45a8ff | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| bogdanm | 0:9b334a45a8ff | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| bogdanm | 0:9b334a45a8ff | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| bogdanm | 0:9b334a45a8ff | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| bogdanm | 0:9b334a45a8ff | 34 | * |
| bogdanm | 0:9b334a45a8ff | 35 | ****************************************************************************** |
| bogdanm | 0:9b334a45a8ff | 36 | */ |
| bogdanm | 0:9b334a45a8ff | 37 | |
| bogdanm | 0:9b334a45a8ff | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 39 | #ifndef __STM32F3xx_HAL_I2C_H |
| bogdanm | 0:9b334a45a8ff | 40 | #define __STM32F3xx_HAL_I2C_H |
| bogdanm | 0:9b334a45a8ff | 41 | |
| bogdanm | 0:9b334a45a8ff | 42 | #ifdef __cplusplus |
| bogdanm | 0:9b334a45a8ff | 43 | extern "C" { |
| bogdanm | 0:9b334a45a8ff | 44 | #endif |
| bogdanm | 0:9b334a45a8ff | 45 | |
| bogdanm | 0:9b334a45a8ff | 46 | /* Includes ------------------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 47 | #include "stm32f3xx_hal_def.h" |
| bogdanm | 0:9b334a45a8ff | 48 | |
| bogdanm | 0:9b334a45a8ff | 49 | /** @addtogroup STM32F3xx_HAL_Driver |
| bogdanm | 0:9b334a45a8ff | 50 | * @{ |
| bogdanm | 0:9b334a45a8ff | 51 | */ |
| bogdanm | 0:9b334a45a8ff | 52 | |
| bogdanm | 0:9b334a45a8ff | 53 | /** @addtogroup I2C |
| bogdanm | 0:9b334a45a8ff | 54 | * @{ |
| bogdanm | 0:9b334a45a8ff | 55 | */ |
| bogdanm | 0:9b334a45a8ff | 56 | |
| bogdanm | 0:9b334a45a8ff | 57 | /* Exported types ------------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 58 | /** @defgroup I2C_Exported_Types I2C Exported Types |
| bogdanm | 0:9b334a45a8ff | 59 | * @{ |
| bogdanm | 0:9b334a45a8ff | 60 | */ |
| bogdanm | 0:9b334a45a8ff | 61 | |
| bogdanm | 0:9b334a45a8ff | 62 | /** @defgroup I2C_Configuration_Structure_definition I2C Configuration Structure definition |
| bogdanm | 0:9b334a45a8ff | 63 | * @brief I2C Configuration Structure definition |
| bogdanm | 0:9b334a45a8ff | 64 | * @{ |
| bogdanm | 0:9b334a45a8ff | 65 | */ |
| bogdanm | 0:9b334a45a8ff | 66 | typedef struct |
| bogdanm | 0:9b334a45a8ff | 67 | { |
| bogdanm | 0:9b334a45a8ff | 68 | uint32_t Timing; /*!< Specifies the I2C_TIMINGR_register value. |
| bogdanm | 0:9b334a45a8ff | 69 | This parameter calculated by referring to I2C initialization |
| bogdanm | 0:9b334a45a8ff | 70 | section in Reference manual */ |
| bogdanm | 0:9b334a45a8ff | 71 | |
| bogdanm | 0:9b334a45a8ff | 72 | uint32_t OwnAddress1; /*!< Specifies the first device own address. |
| bogdanm | 0:9b334a45a8ff | 73 | This parameter can be a 7-bit or 10-bit address. */ |
| bogdanm | 0:9b334a45a8ff | 74 | |
| bogdanm | 0:9b334a45a8ff | 75 | uint32_t AddressingMode; /*!< Specifies if 7-bit or 10-bit addressing mode is selected. |
| bogdanm | 0:9b334a45a8ff | 76 | This parameter can be a value of @ref I2C_addressing_mode */ |
| bogdanm | 0:9b334a45a8ff | 77 | |
| bogdanm | 0:9b334a45a8ff | 78 | uint32_t DualAddressMode; /*!< Specifies if dual addressing mode is selected. |
| bogdanm | 0:9b334a45a8ff | 79 | This parameter can be a value of @ref I2C_dual_addressing_mode */ |
| bogdanm | 0:9b334a45a8ff | 80 | |
| bogdanm | 0:9b334a45a8ff | 81 | uint32_t OwnAddress2; /*!< Specifies the second device own address if dual addressing mode is selected |
| bogdanm | 0:9b334a45a8ff | 82 | This parameter can be a 7-bit address. */ |
| bogdanm | 0:9b334a45a8ff | 83 | |
| bogdanm | 0:9b334a45a8ff | 84 | uint32_t OwnAddress2Masks; /*!< Specifies the acknoledge mask address second device own address if dual addressing mode is selected |
| bogdanm | 0:9b334a45a8ff | 85 | This parameter can be a value of @ref I2C_own_address2_masks. */ |
| bogdanm | 0:9b334a45a8ff | 86 | |
| bogdanm | 0:9b334a45a8ff | 87 | uint32_t GeneralCallMode; /*!< Specifies if general call mode is selected. |
| bogdanm | 0:9b334a45a8ff | 88 | This parameter can be a value of @ref I2C_general_call_addressing_mode. */ |
| bogdanm | 0:9b334a45a8ff | 89 | |
| bogdanm | 0:9b334a45a8ff | 90 | uint32_t NoStretchMode; /*!< Specifies if nostretch mode is selected. |
| bogdanm | 0:9b334a45a8ff | 91 | This parameter can be a value of @ref I2C_nostretch_mode */ |
| bogdanm | 0:9b334a45a8ff | 92 | |
| bogdanm | 0:9b334a45a8ff | 93 | }I2C_InitTypeDef; |
| bogdanm | 0:9b334a45a8ff | 94 | |
| bogdanm | 0:9b334a45a8ff | 95 | /** |
| bogdanm | 0:9b334a45a8ff | 96 | * @} |
| bogdanm | 0:9b334a45a8ff | 97 | */ |
| bogdanm | 0:9b334a45a8ff | 98 | |
| bogdanm | 0:9b334a45a8ff | 99 | /** @defgroup HAL_state_structure_definition HAL state structure definition |
| bogdanm | 0:9b334a45a8ff | 100 | * @brief HAL State structure definition |
| bogdanm | 0:9b334a45a8ff | 101 | * @{ |
| bogdanm | 0:9b334a45a8ff | 102 | */ |
| bogdanm | 0:9b334a45a8ff | 103 | |
| bogdanm | 0:9b334a45a8ff | 104 | typedef enum |
| bogdanm | 0:9b334a45a8ff | 105 | { |
| bogdanm | 0:9b334a45a8ff | 106 | HAL_I2C_STATE_RESET = 0x00, /*!< I2C not yet initialized or disabled */ |
| bogdanm | 0:9b334a45a8ff | 107 | HAL_I2C_STATE_READY = 0x01, /*!< I2C initialized and ready for use */ |
| bogdanm | 0:9b334a45a8ff | 108 | HAL_I2C_STATE_BUSY = 0x02, /*!< I2C internal process is ongoing */ |
| bogdanm | 0:9b334a45a8ff | 109 | HAL_I2C_STATE_MASTER_BUSY_TX = 0x12, /*!< Master Data Transmission process is ongoing */ |
| bogdanm | 0:9b334a45a8ff | 110 | HAL_I2C_STATE_MASTER_BUSY_RX = 0x22, /*!< Master Data Reception process is ongoing */ |
| bogdanm | 0:9b334a45a8ff | 111 | HAL_I2C_STATE_SLAVE_BUSY_TX = 0x32, /*!< Slave Data Transmission process is ongoing */ |
| bogdanm | 0:9b334a45a8ff | 112 | HAL_I2C_STATE_SLAVE_BUSY_RX = 0x42, /*!< Slave Data Reception process is ongoing */ |
| bogdanm | 0:9b334a45a8ff | 113 | HAL_I2C_STATE_MEM_BUSY_TX = 0x52, /*!< Memory Data Transmission process is ongoing */ |
| bogdanm | 0:9b334a45a8ff | 114 | HAL_I2C_STATE_MEM_BUSY_RX = 0x62, /*!< Memory Data Reception process is ongoing */ |
| bogdanm | 0:9b334a45a8ff | 115 | HAL_I2C_STATE_TIMEOUT = 0x03, /*!< Timeout state */ |
| bogdanm | 0:9b334a45a8ff | 116 | HAL_I2C_STATE_ERROR = 0x04 /*!< Reception process is ongoing */ |
| bogdanm | 0:9b334a45a8ff | 117 | |
| bogdanm | 0:9b334a45a8ff | 118 | }HAL_I2C_StateTypeDef; |
| bogdanm | 0:9b334a45a8ff | 119 | |
| bogdanm | 0:9b334a45a8ff | 120 | /** |
| bogdanm | 0:9b334a45a8ff | 121 | * @} |
| bogdanm | 0:9b334a45a8ff | 122 | */ |
| bogdanm | 0:9b334a45a8ff | 123 | |
| bogdanm | 0:9b334a45a8ff | 124 | /** @defgroup I2C_Error_Code_structure_definition I2C Error Code structure definition |
| bogdanm | 0:9b334a45a8ff | 125 | * @brief I2C Error Code structure definition |
| bogdanm | 0:9b334a45a8ff | 126 | * @{ |
| bogdanm | 0:9b334a45a8ff | 127 | */ |
| bogdanm | 0:9b334a45a8ff | 128 | |
| bogdanm | 0:9b334a45a8ff | 129 | typedef enum |
| bogdanm | 0:9b334a45a8ff | 130 | { |
| bogdanm | 0:9b334a45a8ff | 131 | HAL_I2C_ERROR_NONE = 0x00, /*!< No error */ |
| bogdanm | 0:9b334a45a8ff | 132 | HAL_I2C_ERROR_BERR = 0x01, /*!< BERR error */ |
| bogdanm | 0:9b334a45a8ff | 133 | HAL_I2C_ERROR_ARLO = 0x02, /*!< ARLO error */ |
| bogdanm | 0:9b334a45a8ff | 134 | HAL_I2C_ERROR_AF = 0x04, /*!< AF error */ |
| bogdanm | 0:9b334a45a8ff | 135 | HAL_I2C_ERROR_OVR = 0x08, /*!< OVR error */ |
| bogdanm | 0:9b334a45a8ff | 136 | HAL_I2C_ERROR_DMA = 0x10, /*!< DMA transfer error */ |
| bogdanm | 0:9b334a45a8ff | 137 | HAL_I2C_ERROR_TIMEOUT = 0x20, /*!< Timeout error */ |
| bogdanm | 0:9b334a45a8ff | 138 | HAL_I2C_ERROR_SIZE = 0x40 /*!< Size Management error */ |
| bogdanm | 0:9b334a45a8ff | 139 | }HAL_I2C_ErrorTypeDef; |
| bogdanm | 0:9b334a45a8ff | 140 | |
| bogdanm | 0:9b334a45a8ff | 141 | /** |
| bogdanm | 0:9b334a45a8ff | 142 | * @} |
| bogdanm | 0:9b334a45a8ff | 143 | */ |
| bogdanm | 0:9b334a45a8ff | 144 | |
| bogdanm | 0:9b334a45a8ff | 145 | /** @defgroup I2C_handle_Structure_definition I2C handle Structure definition |
| bogdanm | 0:9b334a45a8ff | 146 | * @brief I2C handle Structure definition |
| bogdanm | 0:9b334a45a8ff | 147 | * @{ |
| bogdanm | 0:9b334a45a8ff | 148 | */ |
| bogdanm | 0:9b334a45a8ff | 149 | |
| bogdanm | 0:9b334a45a8ff | 150 | typedef struct |
| bogdanm | 0:9b334a45a8ff | 151 | { |
| bogdanm | 0:9b334a45a8ff | 152 | I2C_TypeDef *Instance; /*!< I2C registers base address */ |
| bogdanm | 0:9b334a45a8ff | 153 | |
| bogdanm | 0:9b334a45a8ff | 154 | I2C_InitTypeDef Init; /*!< I2C communication parameters */ |
| bogdanm | 0:9b334a45a8ff | 155 | |
| bogdanm | 0:9b334a45a8ff | 156 | uint8_t *pBuffPtr; /*!< Pointer to I2C transfer buffer */ |
| bogdanm | 0:9b334a45a8ff | 157 | |
| bogdanm | 0:9b334a45a8ff | 158 | uint16_t XferSize; /*!< I2C transfer size */ |
| bogdanm | 0:9b334a45a8ff | 159 | |
| bogdanm | 0:9b334a45a8ff | 160 | __IO uint16_t XferCount; /*!< I2C transfer counter */ |
| bogdanm | 0:9b334a45a8ff | 161 | |
| bogdanm | 0:9b334a45a8ff | 162 | DMA_HandleTypeDef *hdmatx; /*!< I2C Tx DMA handle parameters */ |
| bogdanm | 0:9b334a45a8ff | 163 | |
| bogdanm | 0:9b334a45a8ff | 164 | DMA_HandleTypeDef *hdmarx; /*!< I2C Rx DMA handle parameters */ |
| bogdanm | 0:9b334a45a8ff | 165 | |
| bogdanm | 0:9b334a45a8ff | 166 | HAL_LockTypeDef Lock; /*!< I2C locking object */ |
| bogdanm | 0:9b334a45a8ff | 167 | |
| bogdanm | 0:9b334a45a8ff | 168 | __IO HAL_I2C_StateTypeDef State; /*!< I2C communication state */ |
| bogdanm | 0:9b334a45a8ff | 169 | |
| bogdanm | 0:9b334a45a8ff | 170 | __IO HAL_I2C_ErrorTypeDef ErrorCode; /* I2C Error code */ |
| bogdanm | 0:9b334a45a8ff | 171 | |
| bogdanm | 0:9b334a45a8ff | 172 | }I2C_HandleTypeDef; |
| bogdanm | 0:9b334a45a8ff | 173 | /** |
| bogdanm | 0:9b334a45a8ff | 174 | * @} |
| bogdanm | 0:9b334a45a8ff | 175 | */ |
| bogdanm | 0:9b334a45a8ff | 176 | |
| bogdanm | 0:9b334a45a8ff | 177 | /** |
| bogdanm | 0:9b334a45a8ff | 178 | * @} |
| bogdanm | 0:9b334a45a8ff | 179 | */ |
| bogdanm | 0:9b334a45a8ff | 180 | /* Exported constants --------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 181 | |
| bogdanm | 0:9b334a45a8ff | 182 | /** @defgroup I2C_Exported_Constants I2C Exported Constants |
| bogdanm | 0:9b334a45a8ff | 183 | * @{ |
| bogdanm | 0:9b334a45a8ff | 184 | */ |
| bogdanm | 0:9b334a45a8ff | 185 | |
| bogdanm | 0:9b334a45a8ff | 186 | /** @defgroup I2C_addressing_mode I2C addressing mode |
| bogdanm | 0:9b334a45a8ff | 187 | * @{ |
| bogdanm | 0:9b334a45a8ff | 188 | */ |
| bogdanm | 0:9b334a45a8ff | 189 | #define I2C_ADDRESSINGMODE_7BIT ((uint32_t)0x00000001) |
| bogdanm | 0:9b334a45a8ff | 190 | #define I2C_ADDRESSINGMODE_10BIT ((uint32_t)0x00000002) |
| bogdanm | 0:9b334a45a8ff | 191 | |
| bogdanm | 0:9b334a45a8ff | 192 | #define IS_I2C_ADDRESSING_MODE(MODE) (((MODE) == I2C_ADDRESSINGMODE_7BIT) || \ |
| bogdanm | 0:9b334a45a8ff | 193 | ((MODE) == I2C_ADDRESSINGMODE_10BIT)) |
| bogdanm | 0:9b334a45a8ff | 194 | /** |
| bogdanm | 0:9b334a45a8ff | 195 | * @} |
| bogdanm | 0:9b334a45a8ff | 196 | */ |
| bogdanm | 0:9b334a45a8ff | 197 | |
| bogdanm | 0:9b334a45a8ff | 198 | /** @defgroup I2C_dual_addressing_mode I2C dual addressing mode |
| bogdanm | 0:9b334a45a8ff | 199 | * @{ |
| bogdanm | 0:9b334a45a8ff | 200 | */ |
| bogdanm | 0:9b334a45a8ff | 201 | |
| bogdanm | 0:9b334a45a8ff | 202 | #define I2C_DUALADDRESS_DISABLED ((uint32_t)0x00000000) |
| bogdanm | 0:9b334a45a8ff | 203 | #define I2C_DUALADDRESS_ENABLED I2C_OAR2_OA2EN |
| bogdanm | 0:9b334a45a8ff | 204 | |
| bogdanm | 0:9b334a45a8ff | 205 | #define IS_I2C_DUAL_ADDRESS(ADDRESS) (((ADDRESS) == I2C_DUALADDRESS_DISABLED) || \ |
| bogdanm | 0:9b334a45a8ff | 206 | ((ADDRESS) == I2C_DUALADDRESS_ENABLED)) |
| bogdanm | 0:9b334a45a8ff | 207 | /** |
| bogdanm | 0:9b334a45a8ff | 208 | * @} |
| bogdanm | 0:9b334a45a8ff | 209 | */ |
| bogdanm | 0:9b334a45a8ff | 210 | |
| bogdanm | 0:9b334a45a8ff | 211 | /** @defgroup I2C_own_address2_masks I2C own address2 masks |
| bogdanm | 0:9b334a45a8ff | 212 | * @{ |
| bogdanm | 0:9b334a45a8ff | 213 | */ |
| bogdanm | 0:9b334a45a8ff | 214 | |
| bogdanm | 0:9b334a45a8ff | 215 | #define I2C_OA2_NOMASK ((uint8_t)0x00) |
| bogdanm | 0:9b334a45a8ff | 216 | #define I2C_OA2_MASK01 ((uint8_t)0x01) |
| bogdanm | 0:9b334a45a8ff | 217 | #define I2C_OA2_MASK02 ((uint8_t)0x02) |
| bogdanm | 0:9b334a45a8ff | 218 | #define I2C_OA2_MASK03 ((uint8_t)0x03) |
| bogdanm | 0:9b334a45a8ff | 219 | #define I2C_OA2_MASK04 ((uint8_t)0x04) |
| bogdanm | 0:9b334a45a8ff | 220 | #define I2C_OA2_MASK05 ((uint8_t)0x05) |
| bogdanm | 0:9b334a45a8ff | 221 | #define I2C_OA2_MASK06 ((uint8_t)0x06) |
| bogdanm | 0:9b334a45a8ff | 222 | #define I2C_OA2_MASK07 ((uint8_t)0x07) |
| bogdanm | 0:9b334a45a8ff | 223 | |
| bogdanm | 0:9b334a45a8ff | 224 | #define IS_I2C_OWN_ADDRESS2_MASK(MASK) (((MASK) == I2C_OA2_NOMASK) || \ |
| bogdanm | 0:9b334a45a8ff | 225 | ((MASK) == I2C_OA2_MASK01) || \ |
| bogdanm | 0:9b334a45a8ff | 226 | ((MASK) == I2C_OA2_MASK02) || \ |
| bogdanm | 0:9b334a45a8ff | 227 | ((MASK) == I2C_OA2_MASK03) || \ |
| bogdanm | 0:9b334a45a8ff | 228 | ((MASK) == I2C_OA2_MASK04) || \ |
| bogdanm | 0:9b334a45a8ff | 229 | ((MASK) == I2C_OA2_MASK05) || \ |
| bogdanm | 0:9b334a45a8ff | 230 | ((MASK) == I2C_OA2_MASK06) || \ |
| bogdanm | 0:9b334a45a8ff | 231 | ((MASK) == I2C_OA2_MASK07)) |
| bogdanm | 0:9b334a45a8ff | 232 | /** |
| bogdanm | 0:9b334a45a8ff | 233 | * @} |
| bogdanm | 0:9b334a45a8ff | 234 | */ |
| bogdanm | 0:9b334a45a8ff | 235 | |
| bogdanm | 0:9b334a45a8ff | 236 | /** @defgroup I2C_general_call_addressing_mode I2C general call addressing mode |
| bogdanm | 0:9b334a45a8ff | 237 | * @{ |
| bogdanm | 0:9b334a45a8ff | 238 | */ |
| bogdanm | 0:9b334a45a8ff | 239 | #define I2C_GENERALCALL_DISABLED ((uint32_t)0x00000000) |
| bogdanm | 0:9b334a45a8ff | 240 | #define I2C_GENERALCALL_ENABLED I2C_CR1_GCEN |
| bogdanm | 0:9b334a45a8ff | 241 | |
| bogdanm | 0:9b334a45a8ff | 242 | #define IS_I2C_GENERAL_CALL(CALL) (((CALL) == I2C_GENERALCALL_DISABLED) || \ |
| bogdanm | 0:9b334a45a8ff | 243 | ((CALL) == I2C_GENERALCALL_ENABLED)) |
| bogdanm | 0:9b334a45a8ff | 244 | /** |
| bogdanm | 0:9b334a45a8ff | 245 | * @} |
| bogdanm | 0:9b334a45a8ff | 246 | */ |
| bogdanm | 0:9b334a45a8ff | 247 | |
| bogdanm | 0:9b334a45a8ff | 248 | /** @defgroup I2C_nostretch_mode I2C nostretch mode |
| bogdanm | 0:9b334a45a8ff | 249 | * @{ |
| bogdanm | 0:9b334a45a8ff | 250 | */ |
| bogdanm | 0:9b334a45a8ff | 251 | #define I2C_NOSTRETCH_DISABLED ((uint32_t)0x00000000) |
| bogdanm | 0:9b334a45a8ff | 252 | #define I2C_NOSTRETCH_ENABLED I2C_CR1_NOSTRETCH |
| bogdanm | 0:9b334a45a8ff | 253 | |
| bogdanm | 0:9b334a45a8ff | 254 | #define IS_I2C_NO_STRETCH(STRETCH) (((STRETCH) == I2C_NOSTRETCH_DISABLED) || \ |
| bogdanm | 0:9b334a45a8ff | 255 | ((STRETCH) == I2C_NOSTRETCH_ENABLED)) |
| bogdanm | 0:9b334a45a8ff | 256 | /** |
| bogdanm | 0:9b334a45a8ff | 257 | * @} |
| bogdanm | 0:9b334a45a8ff | 258 | */ |
| bogdanm | 0:9b334a45a8ff | 259 | |
| bogdanm | 0:9b334a45a8ff | 260 | /** @defgroup I2C_Memory_Address_Size I2C Memory Address Size |
| bogdanm | 0:9b334a45a8ff | 261 | * @{ |
| bogdanm | 0:9b334a45a8ff | 262 | */ |
| bogdanm | 0:9b334a45a8ff | 263 | #define I2C_MEMADD_SIZE_8BIT ((uint32_t)0x00000001) |
| bogdanm | 0:9b334a45a8ff | 264 | #define I2C_MEMADD_SIZE_16BIT ((uint32_t)0x00000002) |
| bogdanm | 0:9b334a45a8ff | 265 | |
| bogdanm | 0:9b334a45a8ff | 266 | #define IS_I2C_MEMADD_SIZE(SIZE) (((SIZE) == I2C_MEMADD_SIZE_8BIT) || \ |
| bogdanm | 0:9b334a45a8ff | 267 | ((SIZE) == I2C_MEMADD_SIZE_16BIT)) |
| bogdanm | 0:9b334a45a8ff | 268 | /** |
| bogdanm | 0:9b334a45a8ff | 269 | * @} |
| bogdanm | 0:9b334a45a8ff | 270 | */ |
| bogdanm | 0:9b334a45a8ff | 271 | |
| bogdanm | 0:9b334a45a8ff | 272 | /** @defgroup I2C_ReloadEndMode_definition I2C ReloadEndMode definition |
| bogdanm | 0:9b334a45a8ff | 273 | * @{ |
| bogdanm | 0:9b334a45a8ff | 274 | */ |
| bogdanm | 0:9b334a45a8ff | 275 | |
| bogdanm | 0:9b334a45a8ff | 276 | #define I2C_RELOAD_MODE I2C_CR2_RELOAD |
| bogdanm | 0:9b334a45a8ff | 277 | #define I2C_AUTOEND_MODE I2C_CR2_AUTOEND |
| bogdanm | 0:9b334a45a8ff | 278 | #define I2C_SOFTEND_MODE ((uint32_t)0x00000000) |
| bogdanm | 0:9b334a45a8ff | 279 | |
| bogdanm | 0:9b334a45a8ff | 280 | #define IS_TRANSFER_MODE(MODE) (((MODE) == I2C_RELOAD_MODE) || \ |
| bogdanm | 0:9b334a45a8ff | 281 | ((MODE) == I2C_AUTOEND_MODE) || \ |
| bogdanm | 0:9b334a45a8ff | 282 | ((MODE) == I2C_SOFTEND_MODE)) |
| bogdanm | 0:9b334a45a8ff | 283 | /** |
| bogdanm | 0:9b334a45a8ff | 284 | * @} |
| bogdanm | 0:9b334a45a8ff | 285 | */ |
| bogdanm | 0:9b334a45a8ff | 286 | |
| bogdanm | 0:9b334a45a8ff | 287 | /** @defgroup I2C_StartStopMode_definition I2C StartStopMode definition |
| bogdanm | 0:9b334a45a8ff | 288 | * @{ |
| bogdanm | 0:9b334a45a8ff | 289 | */ |
| bogdanm | 0:9b334a45a8ff | 290 | |
| bogdanm | 0:9b334a45a8ff | 291 | #define I2C_NO_STARTSTOP ((uint32_t)0x00000000) |
| bogdanm | 0:9b334a45a8ff | 292 | #define I2C_GENERATE_STOP I2C_CR2_STOP |
| bogdanm | 0:9b334a45a8ff | 293 | #define I2C_GENERATE_START_READ (uint32_t)(I2C_CR2_START | I2C_CR2_RD_WRN) |
| bogdanm | 0:9b334a45a8ff | 294 | #define I2C_GENERATE_START_WRITE I2C_CR2_START |
| bogdanm | 0:9b334a45a8ff | 295 | |
| bogdanm | 0:9b334a45a8ff | 296 | #define IS_TRANSFER_REQUEST(REQUEST) (((REQUEST) == I2C_GENERATE_STOP) || \ |
| bogdanm | 0:9b334a45a8ff | 297 | ((REQUEST) == I2C_GENERATE_START_READ) || \ |
| bogdanm | 0:9b334a45a8ff | 298 | ((REQUEST) == I2C_GENERATE_START_WRITE) || \ |
| bogdanm | 0:9b334a45a8ff | 299 | ((REQUEST) == I2C_NO_STARTSTOP)) |
| bogdanm | 0:9b334a45a8ff | 300 | |
| bogdanm | 0:9b334a45a8ff | 301 | /** |
| bogdanm | 0:9b334a45a8ff | 302 | * @} |
| bogdanm | 0:9b334a45a8ff | 303 | */ |
| bogdanm | 0:9b334a45a8ff | 304 | |
| bogdanm | 0:9b334a45a8ff | 305 | /** @defgroup I2C_Interrupt_configuration_definition I2C Interrupt configuration definition |
| bogdanm | 0:9b334a45a8ff | 306 | * @brief I2C Interrupt definition |
| bogdanm | 0:9b334a45a8ff | 307 | * Elements values convention: 0xXXXXXXXX |
| bogdanm | 0:9b334a45a8ff | 308 | * - XXXXXXXX : Interrupt control mask |
| bogdanm | 0:9b334a45a8ff | 309 | * @{ |
| bogdanm | 0:9b334a45a8ff | 310 | */ |
| bogdanm | 0:9b334a45a8ff | 311 | #define I2C_IT_ERRI I2C_CR1_ERRIE |
| bogdanm | 0:9b334a45a8ff | 312 | #define I2C_IT_TCI I2C_CR1_TCIE |
| bogdanm | 0:9b334a45a8ff | 313 | #define I2C_IT_STOPI I2C_CR1_STOPIE |
| bogdanm | 0:9b334a45a8ff | 314 | #define I2C_IT_NACKI I2C_CR1_NACKIE |
| bogdanm | 0:9b334a45a8ff | 315 | #define I2C_IT_ADDRI I2C_CR1_ADDRIE |
| bogdanm | 0:9b334a45a8ff | 316 | #define I2C_IT_RXI I2C_CR1_RXIE |
| bogdanm | 0:9b334a45a8ff | 317 | #define I2C_IT_TXI I2C_CR1_TXIE |
| bogdanm | 0:9b334a45a8ff | 318 | |
| bogdanm | 0:9b334a45a8ff | 319 | /** |
| bogdanm | 0:9b334a45a8ff | 320 | * @} |
| bogdanm | 0:9b334a45a8ff | 321 | */ |
| bogdanm | 0:9b334a45a8ff | 322 | |
| bogdanm | 0:9b334a45a8ff | 323 | |
| bogdanm | 0:9b334a45a8ff | 324 | /** @defgroup I2C_Flag_definition I2C Flag definition |
| bogdanm | 0:9b334a45a8ff | 325 | * @{ |
| bogdanm | 0:9b334a45a8ff | 326 | */ |
| bogdanm | 0:9b334a45a8ff | 327 | |
| bogdanm | 0:9b334a45a8ff | 328 | #define I2C_FLAG_TXE I2C_ISR_TXE |
| bogdanm | 0:9b334a45a8ff | 329 | #define I2C_FLAG_TXIS I2C_ISR_TXIS |
| bogdanm | 0:9b334a45a8ff | 330 | #define I2C_FLAG_RXNE I2C_ISR_RXNE |
| bogdanm | 0:9b334a45a8ff | 331 | #define I2C_FLAG_ADDR I2C_ISR_ADDR |
| bogdanm | 0:9b334a45a8ff | 332 | #define I2C_FLAG_AF I2C_ISR_NACKF |
| bogdanm | 0:9b334a45a8ff | 333 | #define I2C_FLAG_STOPF I2C_ISR_STOPF |
| bogdanm | 0:9b334a45a8ff | 334 | #define I2C_FLAG_TC I2C_ISR_TC |
| bogdanm | 0:9b334a45a8ff | 335 | #define I2C_FLAG_TCR I2C_ISR_TCR |
| bogdanm | 0:9b334a45a8ff | 336 | #define I2C_FLAG_BERR I2C_ISR_BERR |
| bogdanm | 0:9b334a45a8ff | 337 | #define I2C_FLAG_ARLO I2C_ISR_ARLO |
| bogdanm | 0:9b334a45a8ff | 338 | #define I2C_FLAG_OVR I2C_ISR_OVR |
| bogdanm | 0:9b334a45a8ff | 339 | #define I2C_FLAG_PECERR I2C_ISR_PECERR |
| bogdanm | 0:9b334a45a8ff | 340 | #define I2C_FLAG_TIMEOUT I2C_ISR_TIMEOUT |
| bogdanm | 0:9b334a45a8ff | 341 | #define I2C_FLAG_ALERT I2C_ISR_ALERT |
| bogdanm | 0:9b334a45a8ff | 342 | #define I2C_FLAG_BUSY I2C_ISR_BUSY |
| bogdanm | 0:9b334a45a8ff | 343 | #define I2C_FLAG_DIR I2C_ISR_DIR |
| bogdanm | 0:9b334a45a8ff | 344 | /** |
| bogdanm | 0:9b334a45a8ff | 345 | * @} |
| bogdanm | 0:9b334a45a8ff | 346 | */ |
| bogdanm | 0:9b334a45a8ff | 347 | |
| bogdanm | 0:9b334a45a8ff | 348 | /** |
| bogdanm | 0:9b334a45a8ff | 349 | * @} |
| bogdanm | 0:9b334a45a8ff | 350 | */ |
| bogdanm | 0:9b334a45a8ff | 351 | |
| bogdanm | 0:9b334a45a8ff | 352 | /* Exported macros -----------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 353 | |
| bogdanm | 0:9b334a45a8ff | 354 | /** @defgroup I2C_Exported_Macros I2C Exported Macros |
| bogdanm | 0:9b334a45a8ff | 355 | * @{ |
| bogdanm | 0:9b334a45a8ff | 356 | */ |
| bogdanm | 0:9b334a45a8ff | 357 | |
| bogdanm | 0:9b334a45a8ff | 358 | /** @brief Reset I2C handle state |
| bogdanm | 0:9b334a45a8ff | 359 | * @param __HANDLE__: I2C handle. |
| bogdanm | 0:9b334a45a8ff | 360 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 361 | */ |
| bogdanm | 0:9b334a45a8ff | 362 | #define __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2C_STATE_RESET) |
| bogdanm | 0:9b334a45a8ff | 363 | |
| bogdanm | 0:9b334a45a8ff | 364 | /** @brief Enables or disables the specified I2C interrupts. |
| bogdanm | 0:9b334a45a8ff | 365 | * @param __HANDLE__: specifies the I2C Handle. |
| bogdanm | 0:9b334a45a8ff | 366 | * This parameter can be I2Cx where x: 1, 2, or 3 to select the I2C peripheral. |
| bogdanm | 0:9b334a45a8ff | 367 | * @param __INTERRUPT__: specifies the interrupt source to enable or disable. |
| bogdanm | 0:9b334a45a8ff | 368 | * This parameter can be one of the following values: |
| bogdanm | 0:9b334a45a8ff | 369 | * @arg I2C_IT_ERRI: Errors interrupt enable |
| bogdanm | 0:9b334a45a8ff | 370 | * @arg I2C_IT_TCI: Transfer complete interrupt enable |
| bogdanm | 0:9b334a45a8ff | 371 | * @arg I2C_IT_STOPI: STOP detection interrupt enable |
| bogdanm | 0:9b334a45a8ff | 372 | * @arg I2C_IT_NACKI: NACK received interrupt enable |
| bogdanm | 0:9b334a45a8ff | 373 | * @arg I2C_IT_ADDRI: Address match interrupt enable |
| bogdanm | 0:9b334a45a8ff | 374 | * @arg I2C_IT_RXI: RX interrupt enable |
| bogdanm | 0:9b334a45a8ff | 375 | * @arg I2C_IT_TXI: TX interrupt enable |
| bogdanm | 0:9b334a45a8ff | 376 | * |
| bogdanm | 0:9b334a45a8ff | 377 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 378 | */ |
| bogdanm | 0:9b334a45a8ff | 379 | |
| bogdanm | 0:9b334a45a8ff | 380 | #define __HAL_I2C_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 |= (__INTERRUPT__)) |
| bogdanm | 0:9b334a45a8ff | 381 | #define __HAL_I2C_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 &= (~(__INTERRUPT__))) |
| bogdanm | 0:9b334a45a8ff | 382 | |
| bogdanm | 0:9b334a45a8ff | 383 | /** @brief Checks if the specified I2C interrupt source is enabled or disabled. |
| bogdanm | 0:9b334a45a8ff | 384 | * @param __HANDLE__: specifies the I2C Handle. |
| bogdanm | 0:9b334a45a8ff | 385 | * This parameter can be I2Cx where x: 1, 2, or 3 to select the I2C peripheral. |
| bogdanm | 0:9b334a45a8ff | 386 | * @param __INTERRUPT__: specifies the I2C interrupt source to check. |
| bogdanm | 0:9b334a45a8ff | 387 | * This parameter can be one of the following values: |
| bogdanm | 0:9b334a45a8ff | 388 | * @arg I2C_IT_ERRI: Errors interrupt enable |
| bogdanm | 0:9b334a45a8ff | 389 | * @arg I2C_IT_TCI: Transfer complete interrupt enable |
| bogdanm | 0:9b334a45a8ff | 390 | * @arg I2C_IT_STOPI: STOP detection interrupt enable |
| bogdanm | 0:9b334a45a8ff | 391 | * @arg I2C_IT_NACKI: NACK received interrupt enable |
| bogdanm | 0:9b334a45a8ff | 392 | * @arg I2C_IT_ADDRI: Address match interrupt enable |
| bogdanm | 0:9b334a45a8ff | 393 | * @arg I2C_IT_RXI: RX interrupt enable |
| bogdanm | 0:9b334a45a8ff | 394 | * @arg I2C_IT_TXI: TX interrupt enable |
| bogdanm | 0:9b334a45a8ff | 395 | * |
| bogdanm | 0:9b334a45a8ff | 396 | * @retval The new state of __IT__ (TRUE or FALSE). |
| bogdanm | 0:9b334a45a8ff | 397 | */ |
| bogdanm | 0:9b334a45a8ff | 398 | #define __HAL_I2C_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR1 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) |
| bogdanm | 0:9b334a45a8ff | 399 | |
| bogdanm | 0:9b334a45a8ff | 400 | /** @brief Checks whether the specified I2C flag is set or not. |
| bogdanm | 0:9b334a45a8ff | 401 | * @param __HANDLE__: specifies the I2C Handle. |
| bogdanm | 0:9b334a45a8ff | 402 | * This parameter can be I2Cx where x: 1, 2, or 3 to select the I2C peripheral. |
| bogdanm | 0:9b334a45a8ff | 403 | * @param __FLAG__: specifies the flag to check. |
| bogdanm | 0:9b334a45a8ff | 404 | * This parameter can be one of the following values: |
| bogdanm | 0:9b334a45a8ff | 405 | * @arg I2C_FLAG_TXE: Transmit data register empty |
| bogdanm | 0:9b334a45a8ff | 406 | * @arg I2C_FLAG_TXIS: Transmit interrupt status |
| bogdanm | 0:9b334a45a8ff | 407 | * @arg I2C_FLAG_RXNE: Receive data register not empty |
| bogdanm | 0:9b334a45a8ff | 408 | * @arg I2C_FLAG_ADDR: Address matched (slave mode) |
| bogdanm | 0:9b334a45a8ff | 409 | * @arg I2C_FLAG_AF: Acknowledge failure received flag |
| bogdanm | 0:9b334a45a8ff | 410 | * @arg I2C_FLAG_STOPF: STOP detection flag |
| bogdanm | 0:9b334a45a8ff | 411 | * @arg I2C_FLAG_TC: Transfer complete (master mode) |
| bogdanm | 0:9b334a45a8ff | 412 | * @arg I2C_FLAG_TCR: Transfer complete reload |
| bogdanm | 0:9b334a45a8ff | 413 | * @arg I2C_FLAG_BERR: Bus error |
| bogdanm | 0:9b334a45a8ff | 414 | * @arg I2C_FLAG_ARLO: Arbitration lost |
| bogdanm | 0:9b334a45a8ff | 415 | * @arg I2C_FLAG_OVR: Overrun/Underrun |
| bogdanm | 0:9b334a45a8ff | 416 | * @arg I2C_FLAG_PECERR: PEC error in reception |
| bogdanm | 0:9b334a45a8ff | 417 | * @arg I2C_FLAG_TIMEOUT: Timeout or Tlow detection flag |
| bogdanm | 0:9b334a45a8ff | 418 | * @arg I2C_FLAG_ALERT: SMBus alert |
| bogdanm | 0:9b334a45a8ff | 419 | * @arg I2C_FLAG_BUSY: Bus busy |
| bogdanm | 0:9b334a45a8ff | 420 | * @arg I2C_FLAG_DIR: Transfer direction (slave mode) |
| bogdanm | 0:9b334a45a8ff | 421 | * |
| bogdanm | 0:9b334a45a8ff | 422 | * @retval The new state of __FLAG__ (TRUE or FALSE). |
| bogdanm | 0:9b334a45a8ff | 423 | */ |
| bogdanm | 0:9b334a45a8ff | 424 | #define __HAL_I2C_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->ISR) & (__FLAG__)) == (__FLAG__)) |
| bogdanm | 0:9b334a45a8ff | 425 | |
| bogdanm | 0:9b334a45a8ff | 426 | /** @brief Clears the I2C pending flags which are cleared by writing 1 in a specific bit. |
| bogdanm | 0:9b334a45a8ff | 427 | * @param __HANDLE__: specifies the I2C Handle. |
| bogdanm | 0:9b334a45a8ff | 428 | * This parameter can be I2Cx where x: 1, 2, or 3 to select the I2C peripheral. |
| bogdanm | 0:9b334a45a8ff | 429 | * @param __FLAG__: specifies the flag to clear. |
| bogdanm | 0:9b334a45a8ff | 430 | * This parameter can be any combination of the following values: |
| bogdanm | 0:9b334a45a8ff | 431 | * @arg I2C_FLAG_ADDR: Address matched (slave mode) |
| bogdanm | 0:9b334a45a8ff | 432 | * @arg I2C_FLAG_AF: Acknowledge failure flag |
| bogdanm | 0:9b334a45a8ff | 433 | * @arg I2C_FLAG_STOPF: STOP detection flag |
| bogdanm | 0:9b334a45a8ff | 434 | * @arg I2C_FLAG_BERR: Bus error |
| bogdanm | 0:9b334a45a8ff | 435 | * @arg I2C_FLAG_ARLO: Arbitration lost |
| bogdanm | 0:9b334a45a8ff | 436 | * @arg I2C_FLAG_OVR: Overrun/Underrun |
| bogdanm | 0:9b334a45a8ff | 437 | * @arg I2C_FLAG_PECERR: PEC error in reception |
| bogdanm | 0:9b334a45a8ff | 438 | * @arg I2C_FLAG_TIMEOUT: Timeout or Tlow detection flag |
| bogdanm | 0:9b334a45a8ff | 439 | * @arg I2C_FLAG_ALERT: SMBus alert |
| bogdanm | 0:9b334a45a8ff | 440 | * |
| bogdanm | 0:9b334a45a8ff | 441 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 442 | */ |
| bogdanm | 0:9b334a45a8ff | 443 | #define __HAL_I2C_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__)) |
| bogdanm | 0:9b334a45a8ff | 444 | |
| bogdanm | 0:9b334a45a8ff | 445 | |
| bogdanm | 0:9b334a45a8ff | 446 | #define __HAL_I2C_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= I2C_CR1_PE) |
| bogdanm | 0:9b334a45a8ff | 447 | #define __HAL_I2C_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~I2C_CR1_PE) |
| bogdanm | 0:9b334a45a8ff | 448 | |
| bogdanm | 0:9b334a45a8ff | 449 | #define __HAL_I2C_RESET_CR2(__HANDLE__) ((__HANDLE__)->Instance->CR2 &= (uint32_t)~((uint32_t)(I2C_CR2_SADD | I2C_CR2_HEAD10R | I2C_CR2_NBYTES | I2C_CR2_RELOAD | I2C_CR2_RD_WRN))) |
| bogdanm | 0:9b334a45a8ff | 450 | |
| bogdanm | 0:9b334a45a8ff | 451 | #define __HAL_I2C_MEM_ADD_MSB(__ADDRESS__) ((uint8_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)(0xFF00))) >> 8))) |
| bogdanm | 0:9b334a45a8ff | 452 | #define __HAL_I2C_MEM_ADD_LSB(__ADDRESS__) ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)(0x00FF)))) |
| bogdanm | 0:9b334a45a8ff | 453 | |
| bogdanm | 0:9b334a45a8ff | 454 | #define __HAL_I2C_GENERATE_START(__ADDMODE__,__ADDRESS__) (((__ADDMODE__) == I2C_ADDRESSINGMODE_7BIT) ? (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | (I2C_CR2_START) | (I2C_CR2_AUTOEND)) & (~I2C_CR2_RD_WRN)) : \ |
| bogdanm | 0:9b334a45a8ff | 455 | (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | (I2C_CR2_ADD10) | (I2C_CR2_START)) & (~I2C_CR2_RD_WRN))) |
| bogdanm | 0:9b334a45a8ff | 456 | |
| bogdanm | 0:9b334a45a8ff | 457 | #define IS_I2C_OWN_ADDRESS1(ADDRESS1) ((ADDRESS1) <= (uint32_t)0x000003FF) |
| bogdanm | 0:9b334a45a8ff | 458 | #define IS_I2C_OWN_ADDRESS2(ADDRESS2) ((ADDRESS2) <= (uint16_t)0x00FF) |
| bogdanm | 0:9b334a45a8ff | 459 | /** |
| bogdanm | 0:9b334a45a8ff | 460 | * @} |
| bogdanm | 0:9b334a45a8ff | 461 | */ |
| bogdanm | 0:9b334a45a8ff | 462 | |
| bogdanm | 0:9b334a45a8ff | 463 | /* Include I2C HAL Extended module */ |
| bogdanm | 0:9b334a45a8ff | 464 | #include "stm32f3xx_hal_i2c_ex.h" |
| bogdanm | 0:9b334a45a8ff | 465 | |
| bogdanm | 0:9b334a45a8ff | 466 | /* Exported functions --------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 467 | /** @addtogroup I2C_Exported_Functions |
| bogdanm | 0:9b334a45a8ff | 468 | * @{ |
| bogdanm | 0:9b334a45a8ff | 469 | */ |
| bogdanm | 0:9b334a45a8ff | 470 | |
| bogdanm | 0:9b334a45a8ff | 471 | /** @addtogroup I2C_Exported_Functions_Group1 Initialization and de-initialization functions |
| bogdanm | 0:9b334a45a8ff | 472 | * @{ |
| bogdanm | 0:9b334a45a8ff | 473 | */ |
| bogdanm | 0:9b334a45a8ff | 474 | |
| bogdanm | 0:9b334a45a8ff | 475 | /* Initialization/de-initialization functions **********************************/ |
| bogdanm | 0:9b334a45a8ff | 476 | HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c); |
| bogdanm | 0:9b334a45a8ff | 477 | HAL_StatusTypeDef HAL_I2C_DeInit (I2C_HandleTypeDef *hi2c); |
| bogdanm | 0:9b334a45a8ff | 478 | void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c); |
| bogdanm | 0:9b334a45a8ff | 479 | void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c); |
| bogdanm | 0:9b334a45a8ff | 480 | |
| bogdanm | 0:9b334a45a8ff | 481 | /** |
| bogdanm | 0:9b334a45a8ff | 482 | * @} |
| bogdanm | 0:9b334a45a8ff | 483 | */ |
| bogdanm | 0:9b334a45a8ff | 484 | |
| bogdanm | 0:9b334a45a8ff | 485 | /** @addtogroup I2C_Exported_Functions_Group2 Input and Output operation functions |
| bogdanm | 0:9b334a45a8ff | 486 | * @{ |
| bogdanm | 0:9b334a45a8ff | 487 | */ |
| bogdanm | 0:9b334a45a8ff | 488 | |
| bogdanm | 0:9b334a45a8ff | 489 | /* IO operation functions *****************************************************/ |
| bogdanm | 0:9b334a45a8ff | 490 | |
| bogdanm | 0:9b334a45a8ff | 491 | /** @addtogroup Blocking_mode_Polling Blocking mode Polling |
| bogdanm | 0:9b334a45a8ff | 492 | * @{ |
| bogdanm | 0:9b334a45a8ff | 493 | */ |
| bogdanm | 0:9b334a45a8ff | 494 | |
| bogdanm | 0:9b334a45a8ff | 495 | /******* Blocking mode: Polling */ |
| bogdanm | 0:9b334a45a8ff | 496 | HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
| bogdanm | 0:9b334a45a8ff | 497 | HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
| bogdanm | 0:9b334a45a8ff | 498 | HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
| bogdanm | 0:9b334a45a8ff | 499 | HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
| bogdanm | 0:9b334a45a8ff | 500 | HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
| bogdanm | 0:9b334a45a8ff | 501 | HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
| bogdanm | 0:9b334a45a8ff | 502 | HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout); |
| bogdanm | 0:9b334a45a8ff | 503 | |
| bogdanm | 0:9b334a45a8ff | 504 | /** |
| bogdanm | 0:9b334a45a8ff | 505 | * @} |
| bogdanm | 0:9b334a45a8ff | 506 | */ |
| bogdanm | 0:9b334a45a8ff | 507 | |
| bogdanm | 0:9b334a45a8ff | 508 | /** @addtogroup Non_Blocking_mode_Interrupt Non Blocking mode Interrupt |
| bogdanm | 0:9b334a45a8ff | 509 | * @{ |
| bogdanm | 0:9b334a45a8ff | 510 | */ |
| bogdanm | 0:9b334a45a8ff | 511 | |
| bogdanm | 0:9b334a45a8ff | 512 | /******* Non-Blocking mode: Interrupt */ |
| bogdanm | 0:9b334a45a8ff | 513 | HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size); |
| bogdanm | 0:9b334a45a8ff | 514 | HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size); |
| bogdanm | 0:9b334a45a8ff | 515 | HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size); |
| bogdanm | 0:9b334a45a8ff | 516 | HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size); |
| bogdanm | 0:9b334a45a8ff | 517 | HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size); |
| bogdanm | 0:9b334a45a8ff | 518 | HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size); |
| bogdanm | 0:9b334a45a8ff | 519 | |
| bogdanm | 0:9b334a45a8ff | 520 | /** |
| bogdanm | 0:9b334a45a8ff | 521 | * @} |
| bogdanm | 0:9b334a45a8ff | 522 | */ |
| bogdanm | 0:9b334a45a8ff | 523 | |
| bogdanm | 0:9b334a45a8ff | 524 | /** @addtogroup Non_Blocking_mode_DMA Non Blocking mode DMA |
| bogdanm | 0:9b334a45a8ff | 525 | * @{ |
| bogdanm | 0:9b334a45a8ff | 526 | */ |
| bogdanm | 0:9b334a45a8ff | 527 | /******* Non-Blocking mode: DMA */ |
| bogdanm | 0:9b334a45a8ff | 528 | HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size); |
| bogdanm | 0:9b334a45a8ff | 529 | HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size); |
| bogdanm | 0:9b334a45a8ff | 530 | HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size); |
| bogdanm | 0:9b334a45a8ff | 531 | HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size); |
| bogdanm | 0:9b334a45a8ff | 532 | HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size); |
| bogdanm | 0:9b334a45a8ff | 533 | HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size); |
| bogdanm | 0:9b334a45a8ff | 534 | /** |
| bogdanm | 0:9b334a45a8ff | 535 | * @} |
| bogdanm | 0:9b334a45a8ff | 536 | */ |
| bogdanm | 0:9b334a45a8ff | 537 | |
| bogdanm | 0:9b334a45a8ff | 538 | /** @addtogroup IRQ_Handler_and_Callbacks IRQ Handler and Callbacks |
| bogdanm | 0:9b334a45a8ff | 539 | * @{ |
| bogdanm | 0:9b334a45a8ff | 540 | */ |
| bogdanm | 0:9b334a45a8ff | 541 | /******* I2C IRQHandler and Callbacks used in non blocking modes (Interrupt and DMA) */ |
| bogdanm | 0:9b334a45a8ff | 542 | void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c); |
| bogdanm | 0:9b334a45a8ff | 543 | void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c); |
| bogdanm | 0:9b334a45a8ff | 544 | void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c); |
| bogdanm | 0:9b334a45a8ff | 545 | void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c); |
| bogdanm | 0:9b334a45a8ff | 546 | void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c); |
| bogdanm | 0:9b334a45a8ff | 547 | void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c); |
| bogdanm | 0:9b334a45a8ff | 548 | void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c); |
| bogdanm | 0:9b334a45a8ff | 549 | void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c); |
| bogdanm | 0:9b334a45a8ff | 550 | void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c); |
| bogdanm | 0:9b334a45a8ff | 551 | |
| bogdanm | 0:9b334a45a8ff | 552 | /** |
| bogdanm | 0:9b334a45a8ff | 553 | * @} |
| bogdanm | 0:9b334a45a8ff | 554 | */ |
| bogdanm | 0:9b334a45a8ff | 555 | |
| bogdanm | 0:9b334a45a8ff | 556 | /** |
| bogdanm | 0:9b334a45a8ff | 557 | * @} |
| bogdanm | 0:9b334a45a8ff | 558 | */ |
| bogdanm | 0:9b334a45a8ff | 559 | |
| bogdanm | 0:9b334a45a8ff | 560 | /** @addtogroup I2C_Exported_Functions_Group3 Peripheral State and Errors functions |
| bogdanm | 0:9b334a45a8ff | 561 | * @{ |
| bogdanm | 0:9b334a45a8ff | 562 | */ |
| bogdanm | 0:9b334a45a8ff | 563 | |
| bogdanm | 0:9b334a45a8ff | 564 | /* Peripheral State and Errors functions **************************************/ |
| bogdanm | 0:9b334a45a8ff | 565 | HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c); |
| bogdanm | 0:9b334a45a8ff | 566 | uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c); |
| bogdanm | 0:9b334a45a8ff | 567 | |
| bogdanm | 0:9b334a45a8ff | 568 | /** |
| bogdanm | 0:9b334a45a8ff | 569 | * @} |
| bogdanm | 0:9b334a45a8ff | 570 | */ |
| bogdanm | 0:9b334a45a8ff | 571 | |
| bogdanm | 0:9b334a45a8ff | 572 | /** |
| bogdanm | 0:9b334a45a8ff | 573 | * @} |
| bogdanm | 0:9b334a45a8ff | 574 | */ |
| bogdanm | 0:9b334a45a8ff | 575 | |
| bogdanm | 0:9b334a45a8ff | 576 | /** |
| bogdanm | 0:9b334a45a8ff | 577 | * @} |
| bogdanm | 0:9b334a45a8ff | 578 | */ |
| bogdanm | 0:9b334a45a8ff | 579 | |
| bogdanm | 0:9b334a45a8ff | 580 | /** |
| bogdanm | 0:9b334a45a8ff | 581 | * @} |
| bogdanm | 0:9b334a45a8ff | 582 | */ |
| bogdanm | 0:9b334a45a8ff | 583 | |
| bogdanm | 0:9b334a45a8ff | 584 | #ifdef __cplusplus |
| bogdanm | 0:9b334a45a8ff | 585 | } |
| bogdanm | 0:9b334a45a8ff | 586 | #endif |
| bogdanm | 0:9b334a45a8ff | 587 | |
| bogdanm | 0:9b334a45a8ff | 588 | |
| bogdanm | 0:9b334a45a8ff | 589 | #endif /* __STM32F3xx_HAL_I2C_H */ |
| bogdanm | 0:9b334a45a8ff | 590 | |
| bogdanm | 0:9b334a45a8ff | 591 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |