mbed-dev - fix LPC812 PWM

Users » nameless129 » Code » mbed-dev

fix LPC812 PWM

targets/cmsis/TARGET_STM/TARGET_STM32F1/stm32f1xx_ll_usb.c@0:9b334a45a8ff, 2015-10-01 (annotated)

Committer:: bogdanm
Date:: Thu Oct 01 15:25:22 2015 +0300
Revision:: 0:9b334a45a8ff
Child:: 124:6a4a5b7d7324

Initial commit on mbed-dev



Replaces mbed-src (now inactive)

Who changed what in which revision?

User	Revision	Line number	New contents of line
bogdanm	0:9b334a45a8ff	1	/**
bogdanm	0:9b334a45a8ff	2	******************************************************************************
bogdanm	0:9b334a45a8ff	3	* @file stm32f1xx_ll_usb.c
bogdanm	0:9b334a45a8ff	4	* @author MCD Application Team
bogdanm	0:9b334a45a8ff	5	* @version V1.0.0
bogdanm	0:9b334a45a8ff	6	* @date 15-December-2014
bogdanm	0:9b334a45a8ff	7	* @brief USB Low Layer HAL module driver.
bogdanm	0:9b334a45a8ff	8	*
bogdanm	0:9b334a45a8ff	9	* This file provides firmware functions to manage the following
bogdanm	0:9b334a45a8ff	10	* functionalities of the USB Peripheral Controller:
bogdanm	0:9b334a45a8ff	11	* + Initialization/de-initialization functions
bogdanm	0:9b334a45a8ff	12	* + I/O operation functions
bogdanm	0:9b334a45a8ff	13	* + Peripheral Control functions
bogdanm	0:9b334a45a8ff	14	* + Peripheral State functions
bogdanm	0:9b334a45a8ff	15	*
bogdanm	0:9b334a45a8ff	16	@verbatim
bogdanm	0:9b334a45a8ff	17	==============================================================================
bogdanm	0:9b334a45a8ff	18	##### How to use this driver #####
bogdanm	0:9b334a45a8ff	19	==============================================================================
bogdanm	0:9b334a45a8ff	20	[..]
bogdanm	0:9b334a45a8ff	21	(#) Fill parameters of Init structure in USB_OTG_CfgTypeDef structure.
bogdanm	0:9b334a45a8ff	22
bogdanm	0:9b334a45a8ff	23	(#) Call USB_CoreInit() API to initialize the USB Core peripheral.
bogdanm	0:9b334a45a8ff	24
bogdanm	0:9b334a45a8ff	25	(#) The upper HAL HCD/PCD driver will call the right routines for its internal processes.
bogdanm	0:9b334a45a8ff	26
bogdanm	0:9b334a45a8ff	27	@endverbatim
bogdanm	0:9b334a45a8ff	28	******************************************************************************
bogdanm	0:9b334a45a8ff	29	* @attention
bogdanm	0:9b334a45a8ff	30	*
bogdanm	0:9b334a45a8ff	31	* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
bogdanm	0:9b334a45a8ff	32	*
bogdanm	0:9b334a45a8ff	33	* Redistribution and use in source and binary forms, with or without modification,
bogdanm	0:9b334a45a8ff	34	* are permitted provided that the following conditions are met:
bogdanm	0:9b334a45a8ff	35	* 1. Redistributions of source code must retain the above copyright notice,
bogdanm	0:9b334a45a8ff	36	* this list of conditions and the following disclaimer.
bogdanm	0:9b334a45a8ff	37	* 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm	0:9b334a45a8ff	38	* this list of conditions and the following disclaimer in the documentation
bogdanm	0:9b334a45a8ff	39	* and/or other materials provided with the distribution.
bogdanm	0:9b334a45a8ff	40	* 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm	0:9b334a45a8ff	41	* may be used to endorse or promote products derived from this software
bogdanm	0:9b334a45a8ff	42	* without specific prior written permission.
bogdanm	0:9b334a45a8ff	43	*
bogdanm	0:9b334a45a8ff	44	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm	0:9b334a45a8ff	45	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm	0:9b334a45a8ff	46	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm	0:9b334a45a8ff	47	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm	0:9b334a45a8ff	48	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm	0:9b334a45a8ff	49	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm	0:9b334a45a8ff	50	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm	0:9b334a45a8ff	51	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm	0:9b334a45a8ff	52	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm	0:9b334a45a8ff	53	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm	0:9b334a45a8ff	54	*
bogdanm	0:9b334a45a8ff	55	******************************************************************************
bogdanm	0:9b334a45a8ff	56	*/
bogdanm	0:9b334a45a8ff	57
bogdanm	0:9b334a45a8ff	58	/* Includes ------------------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	59	#include "stm32f1xx_hal.h"
bogdanm	0:9b334a45a8ff	60
bogdanm	0:9b334a45a8ff	61	/** @addtogroup STM32F1xx_HAL_Driver
bogdanm	0:9b334a45a8ff	62	* @{
bogdanm	0:9b334a45a8ff	63	*/
bogdanm	0:9b334a45a8ff	64
bogdanm	0:9b334a45a8ff	65	/** @defgroup USB_LL USB Low Layer
bogdanm	0:9b334a45a8ff	66	* @brief Low layer module for USB_FS and USB_OTG_FS drivers
bogdanm	0:9b334a45a8ff	67	* @{
bogdanm	0:9b334a45a8ff	68	*/
bogdanm	0:9b334a45a8ff	69
bogdanm	0:9b334a45a8ff	70	#if defined (HAL_PCD_MODULE_ENABLED) \|\| defined (HAL_HCD_MODULE_ENABLED)
bogdanm	0:9b334a45a8ff	71
bogdanm	0:9b334a45a8ff	72	#if defined(STM32F102x6) \|\| defined(STM32F102xB) \|\| \
bogdanm	0:9b334a45a8ff	73	defined(STM32F103x6) \|\| defined(STM32F103xB) \|\| \
bogdanm	0:9b334a45a8ff	74	defined(STM32F103xE) \|\| defined(STM32F103xG) \|\| \
bogdanm	0:9b334a45a8ff	75	defined(STM32F105xC) \|\| defined(STM32F107xC)
bogdanm	0:9b334a45a8ff	76
bogdanm	0:9b334a45a8ff	77	/* Private types -------------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	78	/* Private variables ---------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	79	/* Private constants ---------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	80	/* Private macros ------------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	81	/* Private functions ---------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	82	#if defined (USB_OTG_FS)
bogdanm	0:9b334a45a8ff	83	/** @defgroup USB_LL_Private_Functions USB Low Layer Private Functions
bogdanm	0:9b334a45a8ff	84	* @{
bogdanm	0:9b334a45a8ff	85	*/
bogdanm	0:9b334a45a8ff	86	static HAL_StatusTypeDef USB_CoreReset(USB_OTG_GlobalTypeDef *USBx);
bogdanm	0:9b334a45a8ff	87	/**
bogdanm	0:9b334a45a8ff	88	* @}
bogdanm	0:9b334a45a8ff	89	*/
bogdanm	0:9b334a45a8ff	90	#endif /* USB_OTG_FS */
bogdanm	0:9b334a45a8ff	91
bogdanm	0:9b334a45a8ff	92	/* Exported functions --------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	93	/** @defgroup USB_LL_Exported_Functions USB Low Layer Exported Functions
bogdanm	0:9b334a45a8ff	94	* @{
bogdanm	0:9b334a45a8ff	95	*/
bogdanm	0:9b334a45a8ff	96
bogdanm	0:9b334a45a8ff	97	/** @defgroup USB_LL_Exported_Functions_Group1 Peripheral Control functions
bogdanm	0:9b334a45a8ff	98	* @brief management functions
bogdanm	0:9b334a45a8ff	99	*
bogdanm	0:9b334a45a8ff	100	@verbatim
bogdanm	0:9b334a45a8ff	101	===============================================================================
bogdanm	0:9b334a45a8ff	102	##### Peripheral Control functions #####
bogdanm	0:9b334a45a8ff	103	===============================================================================
bogdanm	0:9b334a45a8ff	104	[..]
bogdanm	0:9b334a45a8ff	105	This subsection provides a set of functions allowing to control the PCD data
bogdanm	0:9b334a45a8ff	106	transfers.
bogdanm	0:9b334a45a8ff	107
bogdanm	0:9b334a45a8ff	108	@endverbatim
bogdanm	0:9b334a45a8ff	109	* @{
bogdanm	0:9b334a45a8ff	110	*/
bogdanm	0:9b334a45a8ff	111
bogdanm	0:9b334a45a8ff	112	/*==============================================================================
bogdanm	0:9b334a45a8ff	113	USB OTG FS peripheral available on STM32F105xx and STM32F107xx devices
bogdanm	0:9b334a45a8ff	114	==============================================================================*/
bogdanm	0:9b334a45a8ff	115	#if defined (USB_OTG_FS)
bogdanm	0:9b334a45a8ff	116
bogdanm	0:9b334a45a8ff	117	/**
bogdanm	0:9b334a45a8ff	118	* @brief Initializes the USB Core
bogdanm	0:9b334a45a8ff	119	* @param USBx: USB Instance
bogdanm	0:9b334a45a8ff	120	* @param cfg : pointer to a USB_OTG_CfgTypeDef structure that contains
bogdanm	0:9b334a45a8ff	121	* the configuration information for the specified USBx peripheral.
bogdanm	0:9b334a45a8ff	122	* @retval HAL status
bogdanm	0:9b334a45a8ff	123	*/
bogdanm	0:9b334a45a8ff	124	HAL_StatusTypeDef USB_CoreInit(USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef cfg)
bogdanm	0:9b334a45a8ff	125	{
bogdanm	0:9b334a45a8ff	126	/* Select FS Embedded PHY */
bogdanm	0:9b334a45a8ff	127	USBx->GUSBCFG \|= USB_OTG_GUSBCFG_PHYSEL;
bogdanm	0:9b334a45a8ff	128
bogdanm	0:9b334a45a8ff	129	/* Reset after a PHY select and set Host mode */
bogdanm	0:9b334a45a8ff	130	USB_CoreReset(USBx);
bogdanm	0:9b334a45a8ff	131
bogdanm	0:9b334a45a8ff	132	/* Deactivate the power down*/
bogdanm	0:9b334a45a8ff	133	USBx->GCCFG = USB_OTG_GCCFG_PWRDWN;
bogdanm	0:9b334a45a8ff	134
bogdanm	0:9b334a45a8ff	135	return HAL_OK;
bogdanm	0:9b334a45a8ff	136	}
bogdanm	0:9b334a45a8ff	137
bogdanm	0:9b334a45a8ff	138	/**
bogdanm	0:9b334a45a8ff	139	* @brief USB_EnableGlobalInt
bogdanm	0:9b334a45a8ff	140	* Enables the controller's Global Int in the AHB Config reg
bogdanm	0:9b334a45a8ff	141	* @param USBx : Selected device
bogdanm	0:9b334a45a8ff	142	* @retval HAL status
bogdanm	0:9b334a45a8ff	143	*/
bogdanm	0:9b334a45a8ff	144	HAL_StatusTypeDef USB_EnableGlobalInt(USB_OTG_GlobalTypeDef *USBx)
bogdanm	0:9b334a45a8ff	145	{
bogdanm	0:9b334a45a8ff	146	USBx->GAHBCFG \|= USB_OTG_GAHBCFG_GINT;
bogdanm	0:9b334a45a8ff	147	return HAL_OK;
bogdanm	0:9b334a45a8ff	148	}
bogdanm	0:9b334a45a8ff	149
bogdanm	0:9b334a45a8ff	150	/**
bogdanm	0:9b334a45a8ff	151	* @brief USB_DisableGlobalInt
bogdanm	0:9b334a45a8ff	152	* Disable the controller's Global Int in the AHB Config reg
bogdanm	0:9b334a45a8ff	153	* @param USBx : Selected device
bogdanm	0:9b334a45a8ff	154	* @retval HAL status
bogdanm	0:9b334a45a8ff	155	*/
bogdanm	0:9b334a45a8ff	156	HAL_StatusTypeDef USB_DisableGlobalInt(USB_OTG_GlobalTypeDef *USBx)
bogdanm	0:9b334a45a8ff	157	{
bogdanm	0:9b334a45a8ff	158	USBx->GAHBCFG &= ~USB_OTG_GAHBCFG_GINT;
bogdanm	0:9b334a45a8ff	159	return HAL_OK;
bogdanm	0:9b334a45a8ff	160	}
bogdanm	0:9b334a45a8ff	161
bogdanm	0:9b334a45a8ff	162	/**
bogdanm	0:9b334a45a8ff	163	* @brief USB_SetCurrentMode : Set functional mode
bogdanm	0:9b334a45a8ff	164	* @param USBx : Selected device
bogdanm	0:9b334a45a8ff	165	* @param mode : current core mode
bogdanm	0:9b334a45a8ff	166	* This parameter can be one of the these values:
bogdanm	0:9b334a45a8ff	167	* @arg USB_DEVICE_MODE: Peripheral mode mode
bogdanm	0:9b334a45a8ff	168	* @arg USB_HOST_MODE: Host mode
bogdanm	0:9b334a45a8ff	169	* @arg USB_DRD_MODE: Dual Role Device mode
bogdanm	0:9b334a45a8ff	170	* @retval HAL status
bogdanm	0:9b334a45a8ff	171	*/
bogdanm	0:9b334a45a8ff	172	HAL_StatusTypeDef USB_SetCurrentMode(USB_OTG_GlobalTypeDef *USBx , USB_ModeTypeDef mode)
bogdanm	0:9b334a45a8ff	173	{
bogdanm	0:9b334a45a8ff	174	USBx->GUSBCFG &= ~(USB_OTG_GUSBCFG_FHMOD \| USB_OTG_GUSBCFG_FDMOD);
bogdanm	0:9b334a45a8ff	175
bogdanm	0:9b334a45a8ff	176	if ( mode == USB_HOST_MODE)
bogdanm	0:9b334a45a8ff	177	{
bogdanm	0:9b334a45a8ff	178	USBx->GUSBCFG \|= USB_OTG_GUSBCFG_FHMOD;
bogdanm	0:9b334a45a8ff	179	}
bogdanm	0:9b334a45a8ff	180	else if ( mode == USB_DEVICE_MODE)
bogdanm	0:9b334a45a8ff	181	{
bogdanm	0:9b334a45a8ff	182	USBx->GUSBCFG \|= USB_OTG_GUSBCFG_FDMOD;
bogdanm	0:9b334a45a8ff	183	}
bogdanm	0:9b334a45a8ff	184	HAL_Delay(50);
bogdanm	0:9b334a45a8ff	185
bogdanm	0:9b334a45a8ff	186	return HAL_OK;
bogdanm	0:9b334a45a8ff	187	}
bogdanm	0:9b334a45a8ff	188
bogdanm	0:9b334a45a8ff	189	/**
bogdanm	0:9b334a45a8ff	190	* @brief USB_DevInit : Initializes the USB_OTG controller registers
bogdanm	0:9b334a45a8ff	191	* for device mode
bogdanm	0:9b334a45a8ff	192	* @param USBx : Selected device
bogdanm	0:9b334a45a8ff	193	* @param cfg : pointer to a USB_OTG_CfgTypeDef structure that contains
bogdanm	0:9b334a45a8ff	194	* the configuration information for the specified USBx peripheral.
bogdanm	0:9b334a45a8ff	195	* @retval HAL status
bogdanm	0:9b334a45a8ff	196	*/
bogdanm	0:9b334a45a8ff	197	HAL_StatusTypeDef USB_DevInit (USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef cfg)
bogdanm	0:9b334a45a8ff	198	{
bogdanm	0:9b334a45a8ff	199	uint32_t index = 0;
bogdanm	0:9b334a45a8ff	200
bogdanm	0:9b334a45a8ff	201	for (index = 0; index < 15 ; index++)
bogdanm	0:9b334a45a8ff	202	{
bogdanm	0:9b334a45a8ff	203	USBx->DIEPTXF[index] = 0;
bogdanm	0:9b334a45a8ff	204	}
bogdanm	0:9b334a45a8ff	205
bogdanm	0:9b334a45a8ff	206	/Activate VBUS Sensing B /
bogdanm	0:9b334a45a8ff	207	USBx->GCCFG \|= USB_OTG_GCCFG_VBUSBSEN;
bogdanm	0:9b334a45a8ff	208
bogdanm	0:9b334a45a8ff	209	if (cfg.vbus_sensing_enable == 0)
bogdanm	0:9b334a45a8ff	210	{
bogdanm	0:9b334a45a8ff	211	USBx->GCCFG \|= USB_OTG_GCCFG_NOVBUSSENS;
bogdanm	0:9b334a45a8ff	212	}
bogdanm	0:9b334a45a8ff	213
bogdanm	0:9b334a45a8ff	214	/* Restart the Phy Clock */
bogdanm	0:9b334a45a8ff	215	USBx_PCGCCTL = 0;
bogdanm	0:9b334a45a8ff	216
bogdanm	0:9b334a45a8ff	217	/* Device mode configuration */
bogdanm	0:9b334a45a8ff	218	USBx_DEVICE->DCFG \|= DCFG_FRAME_INTERVAL_80;
bogdanm	0:9b334a45a8ff	219
bogdanm	0:9b334a45a8ff	220	/* Set Full speed phy */
bogdanm	0:9b334a45a8ff	221	USB_SetDevSpeed (USBx , USB_OTG_SPEED_FULL);
bogdanm	0:9b334a45a8ff	222
bogdanm	0:9b334a45a8ff	223	/* Flush the FIFOs */
bogdanm	0:9b334a45a8ff	224	USB_FlushTxFifo(USBx , 0x10); /* all Tx FIFOs */
bogdanm	0:9b334a45a8ff	225	USB_FlushRxFifo(USBx);
bogdanm	0:9b334a45a8ff	226
bogdanm	0:9b334a45a8ff	227	/* Clear all pending Device Interrupts */
bogdanm	0:9b334a45a8ff	228	USBx_DEVICE->DIEPMSK = 0;
bogdanm	0:9b334a45a8ff	229	USBx_DEVICE->DOEPMSK = 0;
bogdanm	0:9b334a45a8ff	230	USBx_DEVICE->DAINT = 0xFFFFFFFF;
bogdanm	0:9b334a45a8ff	231	USBx_DEVICE->DAINTMSK = 0;
bogdanm	0:9b334a45a8ff	232
bogdanm	0:9b334a45a8ff	233	for (index = 0; index < cfg.dev_endpoints; index++)
bogdanm	0:9b334a45a8ff	234	{
bogdanm	0:9b334a45a8ff	235	if ((USBx_INEP(index)->DIEPCTL & USB_OTG_DIEPCTL_EPENA) == USB_OTG_DIEPCTL_EPENA)
bogdanm	0:9b334a45a8ff	236	{
bogdanm	0:9b334a45a8ff	237	USBx_INEP(index)->DIEPCTL = (USB_OTG_DIEPCTL_EPDIS \| USB_OTG_DIEPCTL_SNAK);
bogdanm	0:9b334a45a8ff	238	}
bogdanm	0:9b334a45a8ff	239	else
bogdanm	0:9b334a45a8ff	240	{
bogdanm	0:9b334a45a8ff	241	USBx_INEP(index)->DIEPCTL = 0;
bogdanm	0:9b334a45a8ff	242	}
bogdanm	0:9b334a45a8ff	243
bogdanm	0:9b334a45a8ff	244	USBx_INEP(index)->DIEPTSIZ = 0;
bogdanm	0:9b334a45a8ff	245	USBx_INEP(index)->DIEPINT = 0xFF;
bogdanm	0:9b334a45a8ff	246	}
bogdanm	0:9b334a45a8ff	247
bogdanm	0:9b334a45a8ff	248	for (index = 0; index < cfg.dev_endpoints; index++)
bogdanm	0:9b334a45a8ff	249	{
bogdanm	0:9b334a45a8ff	250	if ((USBx_OUTEP(index)->DOEPCTL & USB_OTG_DOEPCTL_EPENA) == USB_OTG_DOEPCTL_EPENA)
bogdanm	0:9b334a45a8ff	251	{
bogdanm	0:9b334a45a8ff	252	USBx_OUTEP(index)->DOEPCTL = (USB_OTG_DOEPCTL_EPDIS \| USB_OTG_DOEPCTL_SNAK);
bogdanm	0:9b334a45a8ff	253	}
bogdanm	0:9b334a45a8ff	254	else
bogdanm	0:9b334a45a8ff	255	{
bogdanm	0:9b334a45a8ff	256	USBx_OUTEP(index)->DOEPCTL = 0;
bogdanm	0:9b334a45a8ff	257	}
bogdanm	0:9b334a45a8ff	258
bogdanm	0:9b334a45a8ff	259	USBx_OUTEP(index)->DOEPTSIZ = 0;
bogdanm	0:9b334a45a8ff	260	USBx_OUTEP(index)->DOEPINT = 0xFF;
bogdanm	0:9b334a45a8ff	261	}
bogdanm	0:9b334a45a8ff	262
bogdanm	0:9b334a45a8ff	263	USBx_DEVICE->DIEPMSK &= ~(USB_OTG_DIEPMSK_TXFURM);
bogdanm	0:9b334a45a8ff	264
bogdanm	0:9b334a45a8ff	265	/* Disable all interrupts. */
bogdanm	0:9b334a45a8ff	266	USBx->GINTMSK = 0;
bogdanm	0:9b334a45a8ff	267
bogdanm	0:9b334a45a8ff	268	/* Clear any pending interrupts */
bogdanm	0:9b334a45a8ff	269	USBx->GINTSTS = 0xBFFFFFFF;
bogdanm	0:9b334a45a8ff	270
bogdanm	0:9b334a45a8ff	271	/* Enable the common interrupts */
bogdanm	0:9b334a45a8ff	272	USBx->GINTMSK \|= USB_OTG_GINTMSK_RXFLVLM;
bogdanm	0:9b334a45a8ff	273
bogdanm	0:9b334a45a8ff	274	/* Enable interrupts matching to the Device mode ONLY */
bogdanm	0:9b334a45a8ff	275	USBx->GINTMSK \|= (USB_OTG_GINTMSK_USBSUSPM \| USB_OTG_GINTMSK_USBRST \|\
bogdanm	0:9b334a45a8ff	276	USB_OTG_GINTMSK_ENUMDNEM \| USB_OTG_GINTMSK_IEPINT \|\
bogdanm	0:9b334a45a8ff	277	USB_OTG_GINTMSK_OEPINT \| USB_OTG_GINTMSK_IISOIXFRM\|\
bogdanm	0:9b334a45a8ff	278	USB_OTG_GINTMSK_PXFRM_IISOOXFRM \| USB_OTG_GINTMSK_WUIM);
bogdanm	0:9b334a45a8ff	279
bogdanm	0:9b334a45a8ff	280	if(cfg.Sof_enable)
bogdanm	0:9b334a45a8ff	281	{
bogdanm	0:9b334a45a8ff	282	USBx->GINTMSK \|= USB_OTG_GINTMSK_SOFM;
bogdanm	0:9b334a45a8ff	283	}
bogdanm	0:9b334a45a8ff	284
bogdanm	0:9b334a45a8ff	285	if (cfg.vbus_sensing_enable == ENABLE)
bogdanm	0:9b334a45a8ff	286	{
bogdanm	0:9b334a45a8ff	287	USBx->GINTMSK \|= (USB_OTG_GINTMSK_SRQIM \| USB_OTG_GINTMSK_OTGINT);
bogdanm	0:9b334a45a8ff	288	}
bogdanm	0:9b334a45a8ff	289
bogdanm	0:9b334a45a8ff	290	return HAL_OK;
bogdanm	0:9b334a45a8ff	291	}
bogdanm	0:9b334a45a8ff	292
bogdanm	0:9b334a45a8ff	293	/**
bogdanm	0:9b334a45a8ff	294	* @brief USB_OTG_FlushTxFifo : Flush a Tx FIFO
bogdanm	0:9b334a45a8ff	295	* @param USBx : Selected device
bogdanm	0:9b334a45a8ff	296	* @param num : FIFO number
bogdanm	0:9b334a45a8ff	297	* This parameter can be a value from 1 to 15
bogdanm	0:9b334a45a8ff	298	15 means Flush all Tx FIFOs
bogdanm	0:9b334a45a8ff	299	* @retval HAL status
bogdanm	0:9b334a45a8ff	300	*/
bogdanm	0:9b334a45a8ff	301	HAL_StatusTypeDef USB_FlushTxFifo (USB_OTG_GlobalTypeDef *USBx, uint32_t num )
bogdanm	0:9b334a45a8ff	302	{
bogdanm	0:9b334a45a8ff	303	uint32_t count = 0;
bogdanm	0:9b334a45a8ff	304
bogdanm	0:9b334a45a8ff	305	USBx->GRSTCTL = ( USB_OTG_GRSTCTL_TXFFLSH \|(uint32_t)( num << 5 ));
bogdanm	0:9b334a45a8ff	306
bogdanm	0:9b334a45a8ff	307	do
bogdanm	0:9b334a45a8ff	308	{
bogdanm	0:9b334a45a8ff	309	if (++count > 200000)
bogdanm	0:9b334a45a8ff	310	{
bogdanm	0:9b334a45a8ff	311	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	312	}
bogdanm	0:9b334a45a8ff	313	}
bogdanm	0:9b334a45a8ff	314	while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_TXFFLSH) == USB_OTG_GRSTCTL_TXFFLSH);
bogdanm	0:9b334a45a8ff	315
bogdanm	0:9b334a45a8ff	316	return HAL_OK;
bogdanm	0:9b334a45a8ff	317	}
bogdanm	0:9b334a45a8ff	318
bogdanm	0:9b334a45a8ff	319	/**
bogdanm	0:9b334a45a8ff	320	* @brief USB_FlushRxFifo : Flush Rx FIFO
bogdanm	0:9b334a45a8ff	321	* @param USBx : Selected device
bogdanm	0:9b334a45a8ff	322	* @retval HAL status
bogdanm	0:9b334a45a8ff	323	*/
bogdanm	0:9b334a45a8ff	324	HAL_StatusTypeDef USB_FlushRxFifo(USB_OTG_GlobalTypeDef *USBx)
bogdanm	0:9b334a45a8ff	325	{
bogdanm	0:9b334a45a8ff	326	uint32_t count = 0;
bogdanm	0:9b334a45a8ff	327
bogdanm	0:9b334a45a8ff	328	USBx->GRSTCTL = USB_OTG_GRSTCTL_RXFFLSH;
bogdanm	0:9b334a45a8ff	329
bogdanm	0:9b334a45a8ff	330	do
bogdanm	0:9b334a45a8ff	331	{
bogdanm	0:9b334a45a8ff	332	if (++count > 200000)
bogdanm	0:9b334a45a8ff	333	{
bogdanm	0:9b334a45a8ff	334	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	335	}
bogdanm	0:9b334a45a8ff	336	}
bogdanm	0:9b334a45a8ff	337	while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_RXFFLSH) == USB_OTG_GRSTCTL_RXFFLSH);
bogdanm	0:9b334a45a8ff	338
bogdanm	0:9b334a45a8ff	339	return HAL_OK;
bogdanm	0:9b334a45a8ff	340	}
bogdanm	0:9b334a45a8ff	341
bogdanm	0:9b334a45a8ff	342	/**
bogdanm	0:9b334a45a8ff	343	* @brief USB_SetDevSpeed :Initializes the DevSpd field of DCFG register
bogdanm	0:9b334a45a8ff	344	* depending the PHY type and the enumeration speed of the device.
bogdanm	0:9b334a45a8ff	345	* @param USBx : Selected device
bogdanm	0:9b334a45a8ff	346	* @param speed : device speed
bogdanm	0:9b334a45a8ff	347	* This parameter can be one of the these values:
bogdanm	0:9b334a45a8ff	348	* @arg USB_OTG_SPEED_FULL: Full speed mode
bogdanm	0:9b334a45a8ff	349	* @arg USB_OTG_SPEED_LOW: Low speed mode
bogdanm	0:9b334a45a8ff	350	* @retval Hal status
bogdanm	0:9b334a45a8ff	351	*/
bogdanm	0:9b334a45a8ff	352	HAL_StatusTypeDef USB_SetDevSpeed(USB_OTG_GlobalTypeDef *USBx , uint8_t speed)
bogdanm	0:9b334a45a8ff	353	{
bogdanm	0:9b334a45a8ff	354	USBx_DEVICE->DCFG \|= speed;
bogdanm	0:9b334a45a8ff	355	return HAL_OK;
bogdanm	0:9b334a45a8ff	356	}
bogdanm	0:9b334a45a8ff	357
bogdanm	0:9b334a45a8ff	358	/**
bogdanm	0:9b334a45a8ff	359	* @brief USB_GetDevSpeed :Return the Dev Speed
bogdanm	0:9b334a45a8ff	360	* @param USBx : Selected device
bogdanm	0:9b334a45a8ff	361	* @retval speed : device speed
bogdanm	0:9b334a45a8ff	362	* This parameter can be one of the these values:
bogdanm	0:9b334a45a8ff	363	* @arg USB_OTG_SPEED_FULL: Full speed mode
bogdanm	0:9b334a45a8ff	364	* @arg USB_OTG_SPEED_LOW: Low speed mode
bogdanm	0:9b334a45a8ff	365	*/
bogdanm	0:9b334a45a8ff	366	uint8_t USB_GetDevSpeed(USB_OTG_GlobalTypeDef *USBx)
bogdanm	0:9b334a45a8ff	367	{
bogdanm	0:9b334a45a8ff	368	uint8_t speed = 0;
bogdanm	0:9b334a45a8ff	369
bogdanm	0:9b334a45a8ff	370	if (((USBx_DEVICE->DSTS & USB_OTG_DSTS_ENUMSPD) == DSTS_ENUMSPD_FS_PHY_30MHZ_OR_60MHZ)\|\|
bogdanm	0:9b334a45a8ff	371	((USBx_DEVICE->DSTS & USB_OTG_DSTS_ENUMSPD) == DSTS_ENUMSPD_FS_PHY_48MHZ))
bogdanm	0:9b334a45a8ff	372	{
bogdanm	0:9b334a45a8ff	373	speed = USB_OTG_SPEED_FULL;
bogdanm	0:9b334a45a8ff	374	}
bogdanm	0:9b334a45a8ff	375	else if((USBx_DEVICE->DSTS & USB_OTG_DSTS_ENUMSPD) == DSTS_ENUMSPD_LS_PHY_6MHZ)
bogdanm	0:9b334a45a8ff	376	{
bogdanm	0:9b334a45a8ff	377	speed = USB_OTG_SPEED_LOW;
bogdanm	0:9b334a45a8ff	378	}
bogdanm	0:9b334a45a8ff	379
bogdanm	0:9b334a45a8ff	380	return speed;
bogdanm	0:9b334a45a8ff	381	}
bogdanm	0:9b334a45a8ff	382
bogdanm	0:9b334a45a8ff	383	/**
bogdanm	0:9b334a45a8ff	384	* @brief Activate and configure an endpoint
bogdanm	0:9b334a45a8ff	385	* @param USBx : Selected device
bogdanm	0:9b334a45a8ff	386	* @param ep: pointer to endpoint structure
bogdanm	0:9b334a45a8ff	387	* @retval HAL status
bogdanm	0:9b334a45a8ff	388	*/
bogdanm	0:9b334a45a8ff	389	HAL_StatusTypeDef USB_ActivateEndpoint(USB_OTG_GlobalTypeDef USBx, USB_OTG_EPTypeDef ep)
bogdanm	0:9b334a45a8ff	390	{
bogdanm	0:9b334a45a8ff	391	if (ep->is_in)
bogdanm	0:9b334a45a8ff	392	{
bogdanm	0:9b334a45a8ff	393	/* Assign a Tx FIFO */
bogdanm	0:9b334a45a8ff	394	ep->tx_fifo_num = ep->num;
bogdanm	0:9b334a45a8ff	395	}
bogdanm	0:9b334a45a8ff	396	/* Set initial data PID. */
bogdanm	0:9b334a45a8ff	397	if (ep->type == EP_TYPE_BULK )
bogdanm	0:9b334a45a8ff	398	{
bogdanm	0:9b334a45a8ff	399	ep->data_pid_start = 0;
bogdanm	0:9b334a45a8ff	400	}
bogdanm	0:9b334a45a8ff	401
bogdanm	0:9b334a45a8ff	402	if (ep->is_in == 1)
bogdanm	0:9b334a45a8ff	403	{
bogdanm	0:9b334a45a8ff	404	USBx_DEVICE->DAINTMSK \|= USB_OTG_DAINTMSK_IEPM & ((1 << (ep->num)));
bogdanm	0:9b334a45a8ff	405
bogdanm	0:9b334a45a8ff	406	if (((USBx_INEP(ep->num)->DIEPCTL) & USB_OTG_DIEPCTL_USBAEP) == 0)
bogdanm	0:9b334a45a8ff	407	{
bogdanm	0:9b334a45a8ff	408	USBx_INEP(ep->num)->DIEPCTL \|= ((ep->maxpacket & USB_OTG_DIEPCTL_MPSIZ ) \| (ep->type << 18 ) \|\
bogdanm	0:9b334a45a8ff	409	((ep->num) << 22 ) \| (USB_OTG_DIEPCTL_SD0PID_SEVNFRM) \| (USB_OTG_DIEPCTL_USBAEP));
bogdanm	0:9b334a45a8ff	410	}
bogdanm	0:9b334a45a8ff	411	}
bogdanm	0:9b334a45a8ff	412	else
bogdanm	0:9b334a45a8ff	413	{
bogdanm	0:9b334a45a8ff	414	USBx_DEVICE->DAINTMSK \|= USB_OTG_DAINTMSK_OEPM & ((1 << (ep->num)) << 16);
bogdanm	0:9b334a45a8ff	415
bogdanm	0:9b334a45a8ff	416	if (((USBx_OUTEP(ep->num)->DOEPCTL) & USB_OTG_DOEPCTL_USBAEP) == 0)
bogdanm	0:9b334a45a8ff	417	{
bogdanm	0:9b334a45a8ff	418	USBx_OUTEP(ep->num)->DOEPCTL \|= ((ep->maxpacket & USB_OTG_DOEPCTL_MPSIZ ) \| (ep->type << 18 ) \|\
bogdanm	0:9b334a45a8ff	419	(USB_OTG_DIEPCTL_SD0PID_SEVNFRM)\| (USB_OTG_DOEPCTL_USBAEP));
bogdanm	0:9b334a45a8ff	420	}
bogdanm	0:9b334a45a8ff	421	}
bogdanm	0:9b334a45a8ff	422
bogdanm	0:9b334a45a8ff	423	return HAL_OK;
bogdanm	0:9b334a45a8ff	424	}
bogdanm	0:9b334a45a8ff	425
bogdanm	0:9b334a45a8ff	426	/**
bogdanm	0:9b334a45a8ff	427	* @brief De-activate and de-initialize an endpoint
bogdanm	0:9b334a45a8ff	428	* @param USBx : Selected device
bogdanm	0:9b334a45a8ff	429	* @param ep: pointer to endpoint structure
bogdanm	0:9b334a45a8ff	430	* @retval HAL status
bogdanm	0:9b334a45a8ff	431	*/
bogdanm	0:9b334a45a8ff	432	HAL_StatusTypeDef USB_DeactivateEndpoint(USB_OTG_GlobalTypeDef USBx, USB_OTG_EPTypeDef ep)
bogdanm	0:9b334a45a8ff	433	{
bogdanm	0:9b334a45a8ff	434	/* Read DEPCTLn register */
bogdanm	0:9b334a45a8ff	435	if (ep->is_in == 1)
bogdanm	0:9b334a45a8ff	436	{
bogdanm	0:9b334a45a8ff	437	USBx_DEVICE->DEACHMSK &= ~(USB_OTG_DAINTMSK_IEPM & ((1 << (ep->num))));
bogdanm	0:9b334a45a8ff	438	USBx_DEVICE->DAINTMSK &= ~(USB_OTG_DAINTMSK_IEPM & ((1 << (ep->num))));
bogdanm	0:9b334a45a8ff	439	USBx_INEP(ep->num)->DIEPCTL &= ~ USB_OTG_DIEPCTL_USBAEP;
bogdanm	0:9b334a45a8ff	440	}
bogdanm	0:9b334a45a8ff	441	else
bogdanm	0:9b334a45a8ff	442	{
bogdanm	0:9b334a45a8ff	443	USBx_DEVICE->DEACHMSK &= ~(USB_OTG_DAINTMSK_OEPM & ((1 << (ep->num)) << 16));
bogdanm	0:9b334a45a8ff	444	USBx_DEVICE->DAINTMSK &= ~(USB_OTG_DAINTMSK_OEPM & ((1 << (ep->num)) << 16));
bogdanm	0:9b334a45a8ff	445	USBx_OUTEP(ep->num)->DOEPCTL &= ~USB_OTG_DOEPCTL_USBAEP;
bogdanm	0:9b334a45a8ff	446	}
bogdanm	0:9b334a45a8ff	447	return HAL_OK;
bogdanm	0:9b334a45a8ff	448	}
bogdanm	0:9b334a45a8ff	449
bogdanm	0:9b334a45a8ff	450	/**
bogdanm	0:9b334a45a8ff	451	* @brief USB_EPStartXfer : setup and starts a transfer over an EP
bogdanm	0:9b334a45a8ff	452	* @param USBx : Selected device
bogdanm	0:9b334a45a8ff	453	* @param ep: pointer to endpoint structure
bogdanm	0:9b334a45a8ff	454	* @retval HAL status
bogdanm	0:9b334a45a8ff	455	*/
bogdanm	0:9b334a45a8ff	456	HAL_StatusTypeDef USB_EPStartXfer(USB_OTG_GlobalTypeDef USBx , USB_OTG_EPTypeDef ep)
bogdanm	0:9b334a45a8ff	457	{
bogdanm	0:9b334a45a8ff	458	uint16_t pktcnt = 0;
bogdanm	0:9b334a45a8ff	459
bogdanm	0:9b334a45a8ff	460	/* IN endpoint */
bogdanm	0:9b334a45a8ff	461	if (ep->is_in == 1)
bogdanm	0:9b334a45a8ff	462	{
bogdanm	0:9b334a45a8ff	463	/* Zero Length Packet? */
bogdanm	0:9b334a45a8ff	464	if (ep->xfer_len == 0)
bogdanm	0:9b334a45a8ff	465	{
bogdanm	0:9b334a45a8ff	466	USBx_INEP(ep->num)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_PKTCNT);
bogdanm	0:9b334a45a8ff	467	USBx_INEP(ep->num)->DIEPTSIZ \|= (USB_OTG_DIEPTSIZ_PKTCNT & (1 << 19)) ;
bogdanm	0:9b334a45a8ff	468	USBx_INEP(ep->num)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_XFRSIZ);
bogdanm	0:9b334a45a8ff	469	}
bogdanm	0:9b334a45a8ff	470	else
bogdanm	0:9b334a45a8ff	471	{
bogdanm	0:9b334a45a8ff	472	/* Program the transfer size and packet count
bogdanm	0:9b334a45a8ff	473	* as follows: xfersize = N * maxpacket +
bogdanm	0:9b334a45a8ff	474	* short_packet pktcnt = N + (short_packet
bogdanm	0:9b334a45a8ff	475	* exist ? 1 : 0)
bogdanm	0:9b334a45a8ff	476	*/
bogdanm	0:9b334a45a8ff	477	USBx_INEP(ep->num)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_XFRSIZ);
bogdanm	0:9b334a45a8ff	478	USBx_INEP(ep->num)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_PKTCNT);
bogdanm	0:9b334a45a8ff	479	USBx_INEP(ep->num)->DIEPTSIZ \|= (USB_OTG_DIEPTSIZ_PKTCNT & (((ep->xfer_len + ep->maxpacket -1)/ ep->maxpacket) << 19)) ;
bogdanm	0:9b334a45a8ff	480	USBx_INEP(ep->num)->DIEPTSIZ \|= (USB_OTG_DIEPTSIZ_XFRSIZ & ep->xfer_len);
bogdanm	0:9b334a45a8ff	481
bogdanm	0:9b334a45a8ff	482	if (ep->type == EP_TYPE_ISOC)
bogdanm	0:9b334a45a8ff	483	{
bogdanm	0:9b334a45a8ff	484	USBx_INEP(ep->num)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_MULCNT);
bogdanm	0:9b334a45a8ff	485	USBx_INEP(ep->num)->DIEPTSIZ \|= (USB_OTG_DIEPTSIZ_MULCNT & (1 << 29));
bogdanm	0:9b334a45a8ff	486	}
bogdanm	0:9b334a45a8ff	487	}
bogdanm	0:9b334a45a8ff	488
bogdanm	0:9b334a45a8ff	489	if (ep->type != EP_TYPE_ISOC)
bogdanm	0:9b334a45a8ff	490	{
bogdanm	0:9b334a45a8ff	491	/* Enable the Tx FIFO Empty Interrupt for this EP */
bogdanm	0:9b334a45a8ff	492	if (ep->xfer_len > 0)
bogdanm	0:9b334a45a8ff	493	{
bogdanm	0:9b334a45a8ff	494	USBx_DEVICE->DIEPEMPMSK \|= 1 << ep->num;
bogdanm	0:9b334a45a8ff	495	}
bogdanm	0:9b334a45a8ff	496	}
bogdanm	0:9b334a45a8ff	497
bogdanm	0:9b334a45a8ff	498	if (ep->type == EP_TYPE_ISOC)
bogdanm	0:9b334a45a8ff	499	{
bogdanm	0:9b334a45a8ff	500	if ((USBx_DEVICE->DSTS & ( 1 << 8 )) == 0)
bogdanm	0:9b334a45a8ff	501	{
bogdanm	0:9b334a45a8ff	502	USBx_INEP(ep->num)->DIEPCTL \|= USB_OTG_DIEPCTL_SODDFRM;
bogdanm	0:9b334a45a8ff	503	}
bogdanm	0:9b334a45a8ff	504	else
bogdanm	0:9b334a45a8ff	505	{
bogdanm	0:9b334a45a8ff	506	USBx_INEP(ep->num)->DIEPCTL \|= USB_OTG_DIEPCTL_SD0PID_SEVNFRM;
bogdanm	0:9b334a45a8ff	507	}
bogdanm	0:9b334a45a8ff	508	}
bogdanm	0:9b334a45a8ff	509
bogdanm	0:9b334a45a8ff	510	/* EP enable, IN data in FIFO */
bogdanm	0:9b334a45a8ff	511	USBx_INEP(ep->num)->DIEPCTL \|= (USB_OTG_DIEPCTL_CNAK \| USB_OTG_DIEPCTL_EPENA);
bogdanm	0:9b334a45a8ff	512
bogdanm	0:9b334a45a8ff	513	if (ep->type == EP_TYPE_ISOC)
bogdanm	0:9b334a45a8ff	514	{
bogdanm	0:9b334a45a8ff	515	USB_WritePacket(USBx, ep->xfer_buff, ep->num, ep->xfer_len);
bogdanm	0:9b334a45a8ff	516	}
bogdanm	0:9b334a45a8ff	517	}
bogdanm	0:9b334a45a8ff	518	else /* OUT endpoint */
bogdanm	0:9b334a45a8ff	519	{
bogdanm	0:9b334a45a8ff	520	/* Program the transfer size and packet count as follows:
bogdanm	0:9b334a45a8ff	521	* pktcnt = N
bogdanm	0:9b334a45a8ff	522	* xfersize = N * maxpacket
bogdanm	0:9b334a45a8ff	523	*/
bogdanm	0:9b334a45a8ff	524	USBx_OUTEP(ep->num)->DOEPTSIZ &= ~(USB_OTG_DOEPTSIZ_XFRSIZ);
bogdanm	0:9b334a45a8ff	525	USBx_OUTEP(ep->num)->DOEPTSIZ &= ~(USB_OTG_DOEPTSIZ_PKTCNT);
bogdanm	0:9b334a45a8ff	526
bogdanm	0:9b334a45a8ff	527	if (ep->xfer_len == 0)
bogdanm	0:9b334a45a8ff	528	{
bogdanm	0:9b334a45a8ff	529	USBx_OUTEP(ep->num)->DOEPTSIZ \|= (USB_OTG_DOEPTSIZ_XFRSIZ & ep->maxpacket);
bogdanm	0:9b334a45a8ff	530	USBx_OUTEP(ep->num)->DOEPTSIZ \|= (USB_OTG_DOEPTSIZ_PKTCNT & (1 << 19));
bogdanm	0:9b334a45a8ff	531	}
bogdanm	0:9b334a45a8ff	532	else
bogdanm	0:9b334a45a8ff	533	{
bogdanm	0:9b334a45a8ff	534	pktcnt = (ep->xfer_len + ep->maxpacket -1)/ ep->maxpacket;
bogdanm	0:9b334a45a8ff	535	USBx_OUTEP(ep->num)->DOEPTSIZ \|= (USB_OTG_DOEPTSIZ_PKTCNT & (pktcnt << 19));
bogdanm	0:9b334a45a8ff	536	USBx_OUTEP(ep->num)->DOEPTSIZ \|= (USB_OTG_DOEPTSIZ_XFRSIZ & (ep->maxpacket * pktcnt));
bogdanm	0:9b334a45a8ff	537	}
bogdanm	0:9b334a45a8ff	538
bogdanm	0:9b334a45a8ff	539	if (ep->type == EP_TYPE_ISOC)
bogdanm	0:9b334a45a8ff	540	{
bogdanm	0:9b334a45a8ff	541	if ((USBx_DEVICE->DSTS & ( 1 << 8 )) == 0)
bogdanm	0:9b334a45a8ff	542	{
bogdanm	0:9b334a45a8ff	543	USBx_OUTEP(ep->num)->DOEPCTL \|= USB_OTG_DOEPCTL_SODDFRM;
bogdanm	0:9b334a45a8ff	544	}
bogdanm	0:9b334a45a8ff	545	else
bogdanm	0:9b334a45a8ff	546	{
bogdanm	0:9b334a45a8ff	547	USBx_OUTEP(ep->num)->DOEPCTL \|= USB_OTG_DOEPCTL_SD0PID_SEVNFRM;
bogdanm	0:9b334a45a8ff	548	}
bogdanm	0:9b334a45a8ff	549	}
bogdanm	0:9b334a45a8ff	550	/* EP enable */
bogdanm	0:9b334a45a8ff	551	USBx_OUTEP(ep->num)->DOEPCTL \|= (USB_OTG_DOEPCTL_CNAK \| USB_OTG_DOEPCTL_EPENA);
bogdanm	0:9b334a45a8ff	552	}
bogdanm	0:9b334a45a8ff	553
bogdanm	0:9b334a45a8ff	554	return HAL_OK;
bogdanm	0:9b334a45a8ff	555	}
bogdanm	0:9b334a45a8ff	556
bogdanm	0:9b334a45a8ff	557	/**
bogdanm	0:9b334a45a8ff	558	* @brief USB_EP0StartXfer : setup and starts a transfer over the EP 0
bogdanm	0:9b334a45a8ff	559	* @param USBx : Selected device
bogdanm	0:9b334a45a8ff	560	* @param ep: pointer to endpoint structure
bogdanm	0:9b334a45a8ff	561	* @retval HAL status
bogdanm	0:9b334a45a8ff	562	*/
bogdanm	0:9b334a45a8ff	563	HAL_StatusTypeDef USB_EP0StartXfer(USB_OTG_GlobalTypeDef USBx , USB_OTG_EPTypeDef ep)
bogdanm	0:9b334a45a8ff	564	{
bogdanm	0:9b334a45a8ff	565	/* IN endpoint */
bogdanm	0:9b334a45a8ff	566	if (ep->is_in == 1)
bogdanm	0:9b334a45a8ff	567	{
bogdanm	0:9b334a45a8ff	568	/* Zero Length Packet? */
bogdanm	0:9b334a45a8ff	569	if (ep->xfer_len == 0)
bogdanm	0:9b334a45a8ff	570	{
bogdanm	0:9b334a45a8ff	571	USBx_INEP(ep->num)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_PKTCNT);
bogdanm	0:9b334a45a8ff	572	USBx_INEP(ep->num)->DIEPTSIZ \|= (USB_OTG_DIEPTSIZ_PKTCNT & (1 << 19));
bogdanm	0:9b334a45a8ff	573	USBx_INEP(ep->num)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_XFRSIZ);
bogdanm	0:9b334a45a8ff	574	}
bogdanm	0:9b334a45a8ff	575	else
bogdanm	0:9b334a45a8ff	576	{
bogdanm	0:9b334a45a8ff	577	/* Program the transfer size and packet count
bogdanm	0:9b334a45a8ff	578	* as follows: xfersize = N * maxpacket +
bogdanm	0:9b334a45a8ff	579	* short_packet pktcnt = N + (short_packet
bogdanm	0:9b334a45a8ff	580	* exist ? 1 : 0)
bogdanm	0:9b334a45a8ff	581	*/
bogdanm	0:9b334a45a8ff	582	USBx_INEP(ep->num)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_XFRSIZ);
bogdanm	0:9b334a45a8ff	583	USBx_INEP(ep->num)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_PKTCNT);
bogdanm	0:9b334a45a8ff	584
bogdanm	0:9b334a45a8ff	585	if(ep->xfer_len > ep->maxpacket)
bogdanm	0:9b334a45a8ff	586	{
bogdanm	0:9b334a45a8ff	587	ep->xfer_len = ep->maxpacket;
bogdanm	0:9b334a45a8ff	588	}
bogdanm	0:9b334a45a8ff	589	USBx_INEP(ep->num)->DIEPTSIZ \|= (USB_OTG_DIEPTSIZ_PKTCNT & (1 << 19));
bogdanm	0:9b334a45a8ff	590	USBx_INEP(ep->num)->DIEPTSIZ \|= (USB_OTG_DIEPTSIZ_XFRSIZ & ep->xfer_len);
bogdanm	0:9b334a45a8ff	591	}
bogdanm	0:9b334a45a8ff	592
bogdanm	0:9b334a45a8ff	593	/* Enable the Tx FIFO Empty Interrupt for this EP */
bogdanm	0:9b334a45a8ff	594	if (ep->xfer_len > 0)
bogdanm	0:9b334a45a8ff	595	{
bogdanm	0:9b334a45a8ff	596	USBx_DEVICE->DIEPEMPMSK \|= 1 << (ep->num);
bogdanm	0:9b334a45a8ff	597	}
bogdanm	0:9b334a45a8ff	598
bogdanm	0:9b334a45a8ff	599	/* EP enable, IN data in FIFO */
bogdanm	0:9b334a45a8ff	600	USBx_INEP(ep->num)->DIEPCTL \|= (USB_OTG_DIEPCTL_CNAK \| USB_OTG_DIEPCTL_EPENA);
bogdanm	0:9b334a45a8ff	601	}
bogdanm	0:9b334a45a8ff	602	else /* OUT endpoint */
bogdanm	0:9b334a45a8ff	603	{
bogdanm	0:9b334a45a8ff	604	/* Program the transfer size and packet count as follows:
bogdanm	0:9b334a45a8ff	605	* pktcnt = N
bogdanm	0:9b334a45a8ff	606	* xfersize = N * maxpacket
bogdanm	0:9b334a45a8ff	607	*/
bogdanm	0:9b334a45a8ff	608	USBx_OUTEP(ep->num)->DOEPTSIZ &= ~(USB_OTG_DOEPTSIZ_XFRSIZ);
bogdanm	0:9b334a45a8ff	609	USBx_OUTEP(ep->num)->DOEPTSIZ &= ~(USB_OTG_DOEPTSIZ_PKTCNT);
bogdanm	0:9b334a45a8ff	610
bogdanm	0:9b334a45a8ff	611	if (ep->xfer_len > 0)
bogdanm	0:9b334a45a8ff	612	{
bogdanm	0:9b334a45a8ff	613	ep->xfer_len = ep->maxpacket;
bogdanm	0:9b334a45a8ff	614	}
bogdanm	0:9b334a45a8ff	615
bogdanm	0:9b334a45a8ff	616	USBx_OUTEP(ep->num)->DOEPTSIZ \|= (USB_OTG_DOEPTSIZ_PKTCNT & (1 << 19));
bogdanm	0:9b334a45a8ff	617	USBx_OUTEP(ep->num)->DOEPTSIZ \|= (USB_OTG_DOEPTSIZ_XFRSIZ & (ep->maxpacket));
bogdanm	0:9b334a45a8ff	618
bogdanm	0:9b334a45a8ff	619	/* EP enable */
bogdanm	0:9b334a45a8ff	620	USBx_OUTEP(ep->num)->DOEPCTL \|= (USB_OTG_DOEPCTL_CNAK \| USB_OTG_DOEPCTL_EPENA);
bogdanm	0:9b334a45a8ff	621	}
bogdanm	0:9b334a45a8ff	622
bogdanm	0:9b334a45a8ff	623	return HAL_OK;
bogdanm	0:9b334a45a8ff	624	}
bogdanm	0:9b334a45a8ff	625
bogdanm	0:9b334a45a8ff	626	/**
bogdanm	0:9b334a45a8ff	627	* @brief USB_WritePacket : Writes a packet into the Tx FIFO associated
bogdanm	0:9b334a45a8ff	628	* with the EP/channel
bogdanm	0:9b334a45a8ff	629	* @param USBx : Selected device
bogdanm	0:9b334a45a8ff	630	* @param src : pointer to source buffer
bogdanm	0:9b334a45a8ff	631	* @param ch_ep_num : endpoint or host channel number
bogdanm	0:9b334a45a8ff	632	* @param len : Number of bytes to write
bogdanm	0:9b334a45a8ff	633	* @retval HAL status
bogdanm	0:9b334a45a8ff	634	*/
bogdanm	0:9b334a45a8ff	635	HAL_StatusTypeDef USB_WritePacket(USB_OTG_GlobalTypeDef USBx, uint8_t src, uint8_t ch_ep_num, uint16_t len)
bogdanm	0:9b334a45a8ff	636	{
bogdanm	0:9b334a45a8ff	637	uint32_t count32b = 0 , index = 0;
bogdanm	0:9b334a45a8ff	638
bogdanm	0:9b334a45a8ff	639	count32b = (len + 3) / 4;
bogdanm	0:9b334a45a8ff	640	for (index = 0; index < count32b; index++, src += 4)
bogdanm	0:9b334a45a8ff	641	{
bogdanm	0:9b334a45a8ff	642	USBx_DFIFO(ch_ep_num) = ((__packed uint32_t )src);
bogdanm	0:9b334a45a8ff	643	}
bogdanm	0:9b334a45a8ff	644	return HAL_OK;
bogdanm	0:9b334a45a8ff	645	}
bogdanm	0:9b334a45a8ff	646
bogdanm	0:9b334a45a8ff	647	/**
bogdanm	0:9b334a45a8ff	648	* @brief USB_ReadPacket : read a packet from the Tx FIFO associated
bogdanm	0:9b334a45a8ff	649	* with the EP/channel
bogdanm	0:9b334a45a8ff	650	* @param USBx : Selected device
bogdanm	0:9b334a45a8ff	651	* @param dest : destination pointer
bogdanm	0:9b334a45a8ff	652	* @param len : Number of bytes to read
bogdanm	0:9b334a45a8ff	653	* @retval pointer to destination buffer
bogdanm	0:9b334a45a8ff	654	*/
bogdanm	0:9b334a45a8ff	655	void USB_ReadPacket(USB_OTG_GlobalTypeDef USBx, uint8_t *dest, uint16_t len)
bogdanm	0:9b334a45a8ff	656	{
bogdanm	0:9b334a45a8ff	657	uint32_t index = 0;
bogdanm	0:9b334a45a8ff	658	uint32_t count32b = (len + 3) / 4;
bogdanm	0:9b334a45a8ff	659
bogdanm	0:9b334a45a8ff	660	for ( index = 0; index < count32b; index++, dest += 4 )
bogdanm	0:9b334a45a8ff	661	{
bogdanm	0:9b334a45a8ff	662	(__packed uint32_t )dest = USBx_DFIFO(0);
bogdanm	0:9b334a45a8ff	663
bogdanm	0:9b334a45a8ff	664	}
bogdanm	0:9b334a45a8ff	665	return ((void *)dest);
bogdanm	0:9b334a45a8ff	666	}
bogdanm	0:9b334a45a8ff	667
bogdanm	0:9b334a45a8ff	668	/**
bogdanm	0:9b334a45a8ff	669	* @brief USB_EPSetStall : set a stall condition over an EP
bogdanm	0:9b334a45a8ff	670	* @param USBx : Selected device
bogdanm	0:9b334a45a8ff	671	* @param ep: pointer to endpoint structure
bogdanm	0:9b334a45a8ff	672	* @retval HAL status
bogdanm	0:9b334a45a8ff	673	*/
bogdanm	0:9b334a45a8ff	674	HAL_StatusTypeDef USB_EPSetStall(USB_OTG_GlobalTypeDef USBx , USB_OTG_EPTypeDef ep)
bogdanm	0:9b334a45a8ff	675	{
bogdanm	0:9b334a45a8ff	676	if (ep->is_in == 1)
bogdanm	0:9b334a45a8ff	677	{
bogdanm	0:9b334a45a8ff	678	if (((USBx_INEP(ep->num)->DIEPCTL) & USB_OTG_DIEPCTL_EPENA) == 0)
bogdanm	0:9b334a45a8ff	679	{
bogdanm	0:9b334a45a8ff	680	USBx_INEP(ep->num)->DIEPCTL &= ~(USB_OTG_DIEPCTL_EPDIS);
bogdanm	0:9b334a45a8ff	681	}
bogdanm	0:9b334a45a8ff	682	USBx_INEP(ep->num)->DIEPCTL \|= USB_OTG_DIEPCTL_STALL;
bogdanm	0:9b334a45a8ff	683	}
bogdanm	0:9b334a45a8ff	684	else
bogdanm	0:9b334a45a8ff	685	{
bogdanm	0:9b334a45a8ff	686	if (((USBx_OUTEP(ep->num)->DOEPCTL) & USB_OTG_DOEPCTL_EPENA) == 0)
bogdanm	0:9b334a45a8ff	687	{
bogdanm	0:9b334a45a8ff	688	USBx_OUTEP(ep->num)->DOEPCTL &= ~(USB_OTG_DOEPCTL_EPDIS);
bogdanm	0:9b334a45a8ff	689	}
bogdanm	0:9b334a45a8ff	690	USBx_OUTEP(ep->num)->DOEPCTL \|= USB_OTG_DOEPCTL_STALL;
bogdanm	0:9b334a45a8ff	691	}
bogdanm	0:9b334a45a8ff	692	return HAL_OK;
bogdanm	0:9b334a45a8ff	693	}
bogdanm	0:9b334a45a8ff	694
bogdanm	0:9b334a45a8ff	695	/**
bogdanm	0:9b334a45a8ff	696	* @brief USB_EPClearStall : Clear a stall condition over an EP
bogdanm	0:9b334a45a8ff	697	* @param USBx : Selected device
bogdanm	0:9b334a45a8ff	698	* @param ep: pointer to endpoint structure
bogdanm	0:9b334a45a8ff	699	* @retval HAL status
bogdanm	0:9b334a45a8ff	700	*/
bogdanm	0:9b334a45a8ff	701	HAL_StatusTypeDef USB_EPClearStall(USB_OTG_GlobalTypeDef USBx, USB_OTG_EPTypeDef ep)
bogdanm	0:9b334a45a8ff	702	{
bogdanm	0:9b334a45a8ff	703	if (ep->is_in == 1)
bogdanm	0:9b334a45a8ff	704	{
bogdanm	0:9b334a45a8ff	705	USBx_INEP(ep->num)->DIEPCTL &= ~USB_OTG_DIEPCTL_STALL;
bogdanm	0:9b334a45a8ff	706	if (ep->type == EP_TYPE_INTR \|\| ep->type == EP_TYPE_BULK)
bogdanm	0:9b334a45a8ff	707	{
bogdanm	0:9b334a45a8ff	708	USBx_INEP(ep->num)->DIEPCTL \|= USB_OTG_DIEPCTL_SD0PID_SEVNFRM; /* DATA0 */
bogdanm	0:9b334a45a8ff	709	}
bogdanm	0:9b334a45a8ff	710	}
bogdanm	0:9b334a45a8ff	711	else
bogdanm	0:9b334a45a8ff	712	{
bogdanm	0:9b334a45a8ff	713	USBx_OUTEP(ep->num)->DOEPCTL &= ~USB_OTG_DOEPCTL_STALL;
bogdanm	0:9b334a45a8ff	714	if (ep->type == EP_TYPE_INTR \|\| ep->type == EP_TYPE_BULK)
bogdanm	0:9b334a45a8ff	715	{
bogdanm	0:9b334a45a8ff	716	USBx_OUTEP(ep->num)->DOEPCTL \|= USB_OTG_DOEPCTL_SD0PID_SEVNFRM; /* DATA0 */
bogdanm	0:9b334a45a8ff	717	}
bogdanm	0:9b334a45a8ff	718	}
bogdanm	0:9b334a45a8ff	719	return HAL_OK;
bogdanm	0:9b334a45a8ff	720	}
bogdanm	0:9b334a45a8ff	721
bogdanm	0:9b334a45a8ff	722	/**
bogdanm	0:9b334a45a8ff	723	* @brief USB_StopDevice : Stop the usb device mode
bogdanm	0:9b334a45a8ff	724	* @param USBx : Selected device
bogdanm	0:9b334a45a8ff	725	* @retval HAL status
bogdanm	0:9b334a45a8ff	726	*/
bogdanm	0:9b334a45a8ff	727	HAL_StatusTypeDef USB_StopDevice(USB_OTG_GlobalTypeDef *USBx)
bogdanm	0:9b334a45a8ff	728	{
bogdanm	0:9b334a45a8ff	729	uint32_t index = 0;
bogdanm	0:9b334a45a8ff	730
bogdanm	0:9b334a45a8ff	731	/* Clear Pending interrupt */
bogdanm	0:9b334a45a8ff	732	for (index = 0; index < 15 ; index++)
bogdanm	0:9b334a45a8ff	733	{
bogdanm	0:9b334a45a8ff	734	USBx_INEP(index)->DIEPINT = 0xFF;
bogdanm	0:9b334a45a8ff	735	USBx_OUTEP(index)->DOEPINT = 0xFF;
bogdanm	0:9b334a45a8ff	736	}
bogdanm	0:9b334a45a8ff	737	USBx_DEVICE->DAINT = 0xFFFFFFFF;
bogdanm	0:9b334a45a8ff	738
bogdanm	0:9b334a45a8ff	739	/* Clear interrupt masks */
bogdanm	0:9b334a45a8ff	740	USBx_DEVICE->DIEPMSK = 0;
bogdanm	0:9b334a45a8ff	741	USBx_DEVICE->DOEPMSK = 0;
bogdanm	0:9b334a45a8ff	742	USBx_DEVICE->DAINTMSK = 0;
bogdanm	0:9b334a45a8ff	743
bogdanm	0:9b334a45a8ff	744	/* Flush the FIFO */
bogdanm	0:9b334a45a8ff	745	USB_FlushRxFifo(USBx);
bogdanm	0:9b334a45a8ff	746	USB_FlushTxFifo(USBx , 0x10 );
bogdanm	0:9b334a45a8ff	747
bogdanm	0:9b334a45a8ff	748	return HAL_OK;
bogdanm	0:9b334a45a8ff	749	}
bogdanm	0:9b334a45a8ff	750
bogdanm	0:9b334a45a8ff	751	/**
bogdanm	0:9b334a45a8ff	752	* @brief USB_SetDevAddress : Stop the usb device mode
bogdanm	0:9b334a45a8ff	753	* @param USBx : Selected device
bogdanm	0:9b334a45a8ff	754	* @param address : new device address to be assigned
bogdanm	0:9b334a45a8ff	755	* This parameter can be a value from 0 to 255
bogdanm	0:9b334a45a8ff	756	* @retval HAL status
bogdanm	0:9b334a45a8ff	757	*/
bogdanm	0:9b334a45a8ff	758	HAL_StatusTypeDef USB_SetDevAddress (USB_OTG_GlobalTypeDef *USBx, uint8_t address)
bogdanm	0:9b334a45a8ff	759	{
bogdanm	0:9b334a45a8ff	760	USBx_DEVICE->DCFG &= ~ (USB_OTG_DCFG_DAD);
bogdanm	0:9b334a45a8ff	761	USBx_DEVICE->DCFG \|= (address << 4) & USB_OTG_DCFG_DAD;
bogdanm	0:9b334a45a8ff	762
bogdanm	0:9b334a45a8ff	763	return HAL_OK;
bogdanm	0:9b334a45a8ff	764	}
bogdanm	0:9b334a45a8ff	765
bogdanm	0:9b334a45a8ff	766	/**
bogdanm	0:9b334a45a8ff	767	* @brief USB_DevConnect : Connect the USB device by enabling the pull-up/pull-down
bogdanm	0:9b334a45a8ff	768	* @param USBx : Selected device
bogdanm	0:9b334a45a8ff	769	* @retval HAL status
bogdanm	0:9b334a45a8ff	770	*/
bogdanm	0:9b334a45a8ff	771	HAL_StatusTypeDef USB_DevConnect (USB_OTG_GlobalTypeDef *USBx)
bogdanm	0:9b334a45a8ff	772	{
bogdanm	0:9b334a45a8ff	773	USBx_DEVICE->DCTL &= ~USB_OTG_DCTL_SDIS ;
bogdanm	0:9b334a45a8ff	774	HAL_Delay(3);
bogdanm	0:9b334a45a8ff	775
bogdanm	0:9b334a45a8ff	776	return HAL_OK;
bogdanm	0:9b334a45a8ff	777	}
bogdanm	0:9b334a45a8ff	778
bogdanm	0:9b334a45a8ff	779	/**
bogdanm	0:9b334a45a8ff	780	* @brief USB_DevDisconnect : Disconnect the USB device by disabling the pull-up/pull-down
bogdanm	0:9b334a45a8ff	781	* @param USBx : Selected device
bogdanm	0:9b334a45a8ff	782	* @retval HAL status
bogdanm	0:9b334a45a8ff	783	*/
bogdanm	0:9b334a45a8ff	784	HAL_StatusTypeDef USB_DevDisconnect (USB_OTG_GlobalTypeDef *USBx)
bogdanm	0:9b334a45a8ff	785	{
bogdanm	0:9b334a45a8ff	786	USBx_DEVICE->DCTL \|= USB_OTG_DCTL_SDIS;
bogdanm	0:9b334a45a8ff	787	HAL_Delay(3);
bogdanm	0:9b334a45a8ff	788
bogdanm	0:9b334a45a8ff	789	return HAL_OK;
bogdanm	0:9b334a45a8ff	790	}
bogdanm	0:9b334a45a8ff	791
bogdanm	0:9b334a45a8ff	792	/**
bogdanm	0:9b334a45a8ff	793	* @brief USB_ReadInterrupts: return the global USB interrupt status
bogdanm	0:9b334a45a8ff	794	* @param USBx : Selected device
bogdanm	0:9b334a45a8ff	795	* @retval HAL status
bogdanm	0:9b334a45a8ff	796	*/
bogdanm	0:9b334a45a8ff	797	uint32_t USB_ReadInterrupts (USB_OTG_GlobalTypeDef *USBx)
bogdanm	0:9b334a45a8ff	798	{
bogdanm	0:9b334a45a8ff	799	uint32_t tmpreg = 0;
bogdanm	0:9b334a45a8ff	800
bogdanm	0:9b334a45a8ff	801	tmpreg = USBx->GINTSTS;
bogdanm	0:9b334a45a8ff	802	tmpreg &= USBx->GINTMSK;
bogdanm	0:9b334a45a8ff	803	return tmpreg;
bogdanm	0:9b334a45a8ff	804	}
bogdanm	0:9b334a45a8ff	805
bogdanm	0:9b334a45a8ff	806	/**
bogdanm	0:9b334a45a8ff	807	* @brief USB_ReadDevAllOutEpInterrupt: return the USB device OUT endpoints interrupt status
bogdanm	0:9b334a45a8ff	808	* @param USBx : Selected device
bogdanm	0:9b334a45a8ff	809	* @retval HAL status
bogdanm	0:9b334a45a8ff	810	*/
bogdanm	0:9b334a45a8ff	811	uint32_t USB_ReadDevAllOutEpInterrupt (USB_OTG_GlobalTypeDef *USBx)
bogdanm	0:9b334a45a8ff	812	{
bogdanm	0:9b334a45a8ff	813	uint32_t tmpreg = 0;
bogdanm	0:9b334a45a8ff	814	tmpreg = USBx_DEVICE->DAINT;
bogdanm	0:9b334a45a8ff	815	tmpreg &= USBx_DEVICE->DAINTMSK;
bogdanm	0:9b334a45a8ff	816	return ((tmpreg & 0xffff0000) >> 16);
bogdanm	0:9b334a45a8ff	817	}
bogdanm	0:9b334a45a8ff	818
bogdanm	0:9b334a45a8ff	819	/**
bogdanm	0:9b334a45a8ff	820	* @brief USB_ReadDevAllInEpInterrupt: return the USB device IN endpoints interrupt status
bogdanm	0:9b334a45a8ff	821	* @param USBx : Selected device
bogdanm	0:9b334a45a8ff	822	* @retval HAL status
bogdanm	0:9b334a45a8ff	823	*/
bogdanm	0:9b334a45a8ff	824	uint32_t USB_ReadDevAllInEpInterrupt (USB_OTG_GlobalTypeDef *USBx)
bogdanm	0:9b334a45a8ff	825	{
bogdanm	0:9b334a45a8ff	826	uint32_t tmpreg = 0;
bogdanm	0:9b334a45a8ff	827	tmpreg = USBx_DEVICE->DAINT;
bogdanm	0:9b334a45a8ff	828	tmpreg &= USBx_DEVICE->DAINTMSK;
bogdanm	0:9b334a45a8ff	829	return ((tmpreg & 0xFFFF));
bogdanm	0:9b334a45a8ff	830	}
bogdanm	0:9b334a45a8ff	831
bogdanm	0:9b334a45a8ff	832	/**
bogdanm	0:9b334a45a8ff	833	* @brief Returns Device OUT EP Interrupt register
bogdanm	0:9b334a45a8ff	834	* @param USBx : Selected device
bogdanm	0:9b334a45a8ff	835	* @param epnum : endpoint number
bogdanm	0:9b334a45a8ff	836	* This parameter can be a value from 0 to 15
bogdanm	0:9b334a45a8ff	837	* @retval Device OUT EP Interrupt register
bogdanm	0:9b334a45a8ff	838	*/
bogdanm	0:9b334a45a8ff	839	uint32_t USB_ReadDevOutEPInterrupt (USB_OTG_GlobalTypeDef *USBx , uint8_t epnum)
bogdanm	0:9b334a45a8ff	840	{
bogdanm	0:9b334a45a8ff	841	uint32_t tmpreg = 0;
bogdanm	0:9b334a45a8ff	842	tmpreg = USBx_OUTEP(epnum)->DOEPINT;
bogdanm	0:9b334a45a8ff	843	tmpreg &= USBx_DEVICE->DOEPMSK;
bogdanm	0:9b334a45a8ff	844	return tmpreg;
bogdanm	0:9b334a45a8ff	845	}
bogdanm	0:9b334a45a8ff	846
bogdanm	0:9b334a45a8ff	847	/**
bogdanm	0:9b334a45a8ff	848	* @brief Returns Device IN EP Interrupt register
bogdanm	0:9b334a45a8ff	849	* @param USBx : Selected device
bogdanm	0:9b334a45a8ff	850	* @param epnum : endpoint number
bogdanm	0:9b334a45a8ff	851	* This parameter can be a value from 0 to 15
bogdanm	0:9b334a45a8ff	852	* @retval Device IN EP Interrupt register
bogdanm	0:9b334a45a8ff	853	*/
bogdanm	0:9b334a45a8ff	854	uint32_t USB_ReadDevInEPInterrupt (USB_OTG_GlobalTypeDef *USBx , uint8_t epnum)
bogdanm	0:9b334a45a8ff	855	{
bogdanm	0:9b334a45a8ff	856	uint32_t tmpreg = 0, msk = 0, emp = 0;
bogdanm	0:9b334a45a8ff	857
bogdanm	0:9b334a45a8ff	858	msk = USBx_DEVICE->DIEPMSK;
bogdanm	0:9b334a45a8ff	859	emp = USBx_DEVICE->DIEPEMPMSK;
bogdanm	0:9b334a45a8ff	860	msk \|= ((emp >> epnum) & 0x1) << 7;
bogdanm	0:9b334a45a8ff	861	tmpreg = USBx_INEP(epnum)->DIEPINT & msk;
bogdanm	0:9b334a45a8ff	862	return tmpreg;
bogdanm	0:9b334a45a8ff	863	}
bogdanm	0:9b334a45a8ff	864
bogdanm	0:9b334a45a8ff	865	/**
bogdanm	0:9b334a45a8ff	866	* @brief USB_ClearInterrupts: clear a USB interrupt
bogdanm	0:9b334a45a8ff	867	* @param USBx : Selected device
bogdanm	0:9b334a45a8ff	868	* @param interrupt : interrupt flag
bogdanm	0:9b334a45a8ff	869	* @retval None
bogdanm	0:9b334a45a8ff	870	*/
bogdanm	0:9b334a45a8ff	871	void USB_ClearInterrupts (USB_OTG_GlobalTypeDef *USBx, uint32_t interrupt)
bogdanm	0:9b334a45a8ff	872	{
bogdanm	0:9b334a45a8ff	873	USBx->GINTSTS \|= interrupt;
bogdanm	0:9b334a45a8ff	874	}
bogdanm	0:9b334a45a8ff	875
bogdanm	0:9b334a45a8ff	876	/**
bogdanm	0:9b334a45a8ff	877	* @brief Returns USB core mode
bogdanm	0:9b334a45a8ff	878	* @param USBx : Selected device
bogdanm	0:9b334a45a8ff	879	* @retval return core mode : Host or Device
bogdanm	0:9b334a45a8ff	880	* This parameter can be one of the these values:
bogdanm	0:9b334a45a8ff	881	* 0 : Host
bogdanm	0:9b334a45a8ff	882	* 1 : Device
bogdanm	0:9b334a45a8ff	883	*/
bogdanm	0:9b334a45a8ff	884	uint32_t USB_GetMode(USB_OTG_GlobalTypeDef *USBx)
bogdanm	0:9b334a45a8ff	885	{
bogdanm	0:9b334a45a8ff	886	return ((USBx->GINTSTS ) & 0x1);
bogdanm	0:9b334a45a8ff	887	}
bogdanm	0:9b334a45a8ff	888
bogdanm	0:9b334a45a8ff	889	/**
bogdanm	0:9b334a45a8ff	890	* @brief Activate EP0 for Setup transactions
bogdanm	0:9b334a45a8ff	891	* @param USBx : Selected device
bogdanm	0:9b334a45a8ff	892	* @retval HAL status
bogdanm	0:9b334a45a8ff	893	*/
bogdanm	0:9b334a45a8ff	894	HAL_StatusTypeDef USB_ActivateSetup (USB_OTG_GlobalTypeDef *USBx)
bogdanm	0:9b334a45a8ff	895	{
bogdanm	0:9b334a45a8ff	896	/* Set the MPS of the IN EP based on the enumeration speed */
bogdanm	0:9b334a45a8ff	897	USBx_INEP(0)->DIEPCTL &= ~USB_OTG_DIEPCTL_MPSIZ;
bogdanm	0:9b334a45a8ff	898
bogdanm	0:9b334a45a8ff	899	if((USBx_DEVICE->DSTS & USB_OTG_DSTS_ENUMSPD) == DSTS_ENUMSPD_LS_PHY_6MHZ)
bogdanm	0:9b334a45a8ff	900	{
bogdanm	0:9b334a45a8ff	901	USBx_INEP(0)->DIEPCTL \|= 3;
bogdanm	0:9b334a45a8ff	902	}
bogdanm	0:9b334a45a8ff	903	USBx_DEVICE->DCTL \|= USB_OTG_DCTL_CGINAK;
bogdanm	0:9b334a45a8ff	904
bogdanm	0:9b334a45a8ff	905	return HAL_OK;
bogdanm	0:9b334a45a8ff	906	}
bogdanm	0:9b334a45a8ff	907
bogdanm	0:9b334a45a8ff	908	/**
bogdanm	0:9b334a45a8ff	909	* @brief Prepare the EP0 to start the first control setup
bogdanm	0:9b334a45a8ff	910	* @param USBx : Selected device
bogdanm	0:9b334a45a8ff	911	* @param psetup : pointer to setup packet
bogdanm	0:9b334a45a8ff	912	* @retval HAL status
bogdanm	0:9b334a45a8ff	913	*/
bogdanm	0:9b334a45a8ff	914	HAL_StatusTypeDef USB_EP0_OutStart(USB_OTG_GlobalTypeDef USBx, uint8_t psetup)
bogdanm	0:9b334a45a8ff	915	{
bogdanm	0:9b334a45a8ff	916	USBx_OUTEP(0)->DOEPTSIZ = 0;
bogdanm	0:9b334a45a8ff	917	USBx_OUTEP(0)->DOEPTSIZ \|= (USB_OTG_DOEPTSIZ_PKTCNT & (1 << 19));
bogdanm	0:9b334a45a8ff	918	USBx_OUTEP(0)->DOEPTSIZ \|= (3 * 8);
bogdanm	0:9b334a45a8ff	919	USBx_OUTEP(0)->DOEPTSIZ \|= USB_OTG_DOEPTSIZ_STUPCNT;
bogdanm	0:9b334a45a8ff	920
bogdanm	0:9b334a45a8ff	921	return HAL_OK;
bogdanm	0:9b334a45a8ff	922	}
bogdanm	0:9b334a45a8ff	923
bogdanm	0:9b334a45a8ff	924	/**
bogdanm	0:9b334a45a8ff	925	* @brief USB_HostInit : Initializes the USB OTG controller registers
bogdanm	0:9b334a45a8ff	926	* for Host mode
bogdanm	0:9b334a45a8ff	927	* @param USBx : Selected device
bogdanm	0:9b334a45a8ff	928	* @param cfg : pointer to a USB_OTG_CfgTypeDef structure that contains
bogdanm	0:9b334a45a8ff	929	* the configuration information for the specified USBx peripheral.
bogdanm	0:9b334a45a8ff	930	* @retval HAL status
bogdanm	0:9b334a45a8ff	931	*/
bogdanm	0:9b334a45a8ff	932	HAL_StatusTypeDef USB_HostInit (USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef cfg)
bogdanm	0:9b334a45a8ff	933	{
bogdanm	0:9b334a45a8ff	934	uint32_t index = 0;
bogdanm	0:9b334a45a8ff	935
bogdanm	0:9b334a45a8ff	936	/* Restart the Phy Clock */
bogdanm	0:9b334a45a8ff	937	USBx_PCGCCTL = 0;
bogdanm	0:9b334a45a8ff	938
bogdanm	0:9b334a45a8ff	939	/* no VBUS sensing*/
bogdanm	0:9b334a45a8ff	940	USBx->GCCFG &=~ (USB_OTG_GCCFG_VBUSASEN);
bogdanm	0:9b334a45a8ff	941	USBx->GCCFG &=~ (USB_OTG_GCCFG_VBUSBSEN);
bogdanm	0:9b334a45a8ff	942	USBx->GCCFG \|= USB_OTG_GCCFG_NOVBUSSENS;
bogdanm	0:9b334a45a8ff	943
bogdanm	0:9b334a45a8ff	944	/* Disable the FS/LS support mode only */
bogdanm	0:9b334a45a8ff	945	if((cfg.speed == USB_OTG_SPEED_FULL)&&
bogdanm	0:9b334a45a8ff	946	(USBx != USB_OTG_FS))
bogdanm	0:9b334a45a8ff	947	{
bogdanm	0:9b334a45a8ff	948	USBx_HOST->HCFG \|= USB_OTG_HCFG_FSLSS;
bogdanm	0:9b334a45a8ff	949	}
bogdanm	0:9b334a45a8ff	950	else
bogdanm	0:9b334a45a8ff	951	{
bogdanm	0:9b334a45a8ff	952	USBx_HOST->HCFG &= ~(USB_OTG_HCFG_FSLSS);
bogdanm	0:9b334a45a8ff	953	}
bogdanm	0:9b334a45a8ff	954
bogdanm	0:9b334a45a8ff	955	/* Make sure the FIFOs are flushed. */
bogdanm	0:9b334a45a8ff	956	USB_FlushTxFifo(USBx, 0x10 ); /* all Tx FIFOs */
bogdanm	0:9b334a45a8ff	957	USB_FlushRxFifo(USBx);
bogdanm	0:9b334a45a8ff	958
bogdanm	0:9b334a45a8ff	959	/* Clear all pending HC Interrupts */
bogdanm	0:9b334a45a8ff	960	for (index = 0; index < cfg.Host_channels; index++)
bogdanm	0:9b334a45a8ff	961	{
bogdanm	0:9b334a45a8ff	962	USBx_HC(index)->HCINT = 0xFFFFFFFF;
bogdanm	0:9b334a45a8ff	963	USBx_HC(index)->HCINTMSK = 0;
bogdanm	0:9b334a45a8ff	964	}
bogdanm	0:9b334a45a8ff	965
bogdanm	0:9b334a45a8ff	966	/* Enable VBUS driving */
bogdanm	0:9b334a45a8ff	967	USB_DriveVbus(USBx, 1);
bogdanm	0:9b334a45a8ff	968
bogdanm	0:9b334a45a8ff	969	HAL_Delay(200);
bogdanm	0:9b334a45a8ff	970
bogdanm	0:9b334a45a8ff	971	/* Disable all interrupts. */
bogdanm	0:9b334a45a8ff	972	USBx->GINTMSK = 0;
bogdanm	0:9b334a45a8ff	973
bogdanm	0:9b334a45a8ff	974	/* Clear any pending interrupts */
bogdanm	0:9b334a45a8ff	975	USBx->GINTSTS = 0xFFFFFFFF;
bogdanm	0:9b334a45a8ff	976
bogdanm	0:9b334a45a8ff	977	if(USBx == USB_OTG_FS)
bogdanm	0:9b334a45a8ff	978	{
bogdanm	0:9b334a45a8ff	979	/* set Rx FIFO size */
bogdanm	0:9b334a45a8ff	980	USBx->GRXFSIZ = (uint32_t )0x80;
bogdanm	0:9b334a45a8ff	981	USBx->DIEPTXF0_HNPTXFSIZ = (uint32_t )(((0x60 << 16)& USB_OTG_NPTXFD) \| 0x80);
bogdanm	0:9b334a45a8ff	982	USBx->HPTXFSIZ = (uint32_t )(((0x40 << 16)& USB_OTG_HPTXFSIZ_PTXFD) \| 0xE0);
bogdanm	0:9b334a45a8ff	983	}
bogdanm	0:9b334a45a8ff	984
bogdanm	0:9b334a45a8ff	985	/* Enable the common interrupts */
bogdanm	0:9b334a45a8ff	986	USBx->GINTMSK \|= USB_OTG_GINTMSK_RXFLVLM;
bogdanm	0:9b334a45a8ff	987
bogdanm	0:9b334a45a8ff	988	/* Enable interrupts matching to the Host mode ONLY */
bogdanm	0:9b334a45a8ff	989	USBx->GINTMSK \|= (USB_OTG_GINTMSK_PRTIM \| USB_OTG_GINTMSK_HCIM \|\
bogdanm	0:9b334a45a8ff	990	USB_OTG_GINTMSK_SOFM \|USB_OTG_GINTSTS_DISCINT\|\
bogdanm	0:9b334a45a8ff	991	USB_OTG_GINTMSK_PXFRM_IISOOXFRM \| USB_OTG_GINTMSK_WUIM);
bogdanm	0:9b334a45a8ff	992
bogdanm	0:9b334a45a8ff	993	return HAL_OK;
bogdanm	0:9b334a45a8ff	994	}
bogdanm	0:9b334a45a8ff	995
bogdanm	0:9b334a45a8ff	996	/**
bogdanm	0:9b334a45a8ff	997	* @brief USB_InitFSLSPClkSel : Initializes the FSLSPClkSel field of the
bogdanm	0:9b334a45a8ff	998	* HCFG register on the PHY type and set the right frame interval
bogdanm	0:9b334a45a8ff	999	* @param USBx : Selected device
bogdanm	0:9b334a45a8ff	1000	* @param freq : clock frequency
bogdanm	0:9b334a45a8ff	1001	* This parameter can be one of the these values:
bogdanm	0:9b334a45a8ff	1002	* HCFG_48_MHZ : Full Speed 48 MHz Clock
bogdanm	0:9b334a45a8ff	1003	* HCFG_6_MHZ : Low Speed 6 MHz Clock
bogdanm	0:9b334a45a8ff	1004	* @retval HAL status
bogdanm	0:9b334a45a8ff	1005	*/
bogdanm	0:9b334a45a8ff	1006	HAL_StatusTypeDef USB_InitFSLSPClkSel(USB_OTG_GlobalTypeDef *USBx , uint8_t freq)
bogdanm	0:9b334a45a8ff	1007	{
bogdanm	0:9b334a45a8ff	1008	USBx_HOST->HCFG &= ~(USB_OTG_HCFG_FSLSPCS);
bogdanm	0:9b334a45a8ff	1009	USBx_HOST->HCFG \|= (freq & USB_OTG_HCFG_FSLSPCS);
bogdanm	0:9b334a45a8ff	1010
bogdanm	0:9b334a45a8ff	1011	if (freq == HCFG_48_MHZ)
bogdanm	0:9b334a45a8ff	1012	{
bogdanm	0:9b334a45a8ff	1013	USBx_HOST->HFIR = (uint32_t)48000;
bogdanm	0:9b334a45a8ff	1014	}
bogdanm	0:9b334a45a8ff	1015	else if (freq == HCFG_6_MHZ)
bogdanm	0:9b334a45a8ff	1016	{
bogdanm	0:9b334a45a8ff	1017	USBx_HOST->HFIR = (uint32_t)6000;
bogdanm	0:9b334a45a8ff	1018	}
bogdanm	0:9b334a45a8ff	1019	return HAL_OK;
bogdanm	0:9b334a45a8ff	1020	}
bogdanm	0:9b334a45a8ff	1021
bogdanm	0:9b334a45a8ff	1022	/**
bogdanm	0:9b334a45a8ff	1023	* @brief USB_OTG_ResetPort : Reset Host Port
bogdanm	0:9b334a45a8ff	1024	* @param USBx : Selected device
bogdanm	0:9b334a45a8ff	1025	* @retval HAL status
bogdanm	0:9b334a45a8ff	1026	* @note : (1)The application must wait at least 10 ms
bogdanm	0:9b334a45a8ff	1027	* before clearing the reset bit.
bogdanm	0:9b334a45a8ff	1028	*/
bogdanm	0:9b334a45a8ff	1029	HAL_StatusTypeDef USB_ResetPort(USB_OTG_GlobalTypeDef *USBx)
bogdanm	0:9b334a45a8ff	1030	{
bogdanm	0:9b334a45a8ff	1031	__IO uint32_t hprt0 = 0;
bogdanm	0:9b334a45a8ff	1032
bogdanm	0:9b334a45a8ff	1033	hprt0 = USBx_HPRT0;
bogdanm	0:9b334a45a8ff	1034
bogdanm	0:9b334a45a8ff	1035	hprt0 &= ~(USB_OTG_HPRT_PENA \| USB_OTG_HPRT_PCDET \|\
bogdanm	0:9b334a45a8ff	1036	USB_OTG_HPRT_PENCHNG \| USB_OTG_HPRT_POCCHNG );
bogdanm	0:9b334a45a8ff	1037
bogdanm	0:9b334a45a8ff	1038	USBx_HPRT0 = (USB_OTG_HPRT_PRST \| hprt0);
bogdanm	0:9b334a45a8ff	1039	HAL_Delay (10); /* See Note #1 */
bogdanm	0:9b334a45a8ff	1040	USBx_HPRT0 = ((~USB_OTG_HPRT_PRST) & hprt0);
bogdanm	0:9b334a45a8ff	1041	return HAL_OK;
bogdanm	0:9b334a45a8ff	1042	}
bogdanm	0:9b334a45a8ff	1043
bogdanm	0:9b334a45a8ff	1044	/**
bogdanm	0:9b334a45a8ff	1045	* @brief USB_DriveVbus : activate or de-activate vbus
bogdanm	0:9b334a45a8ff	1046	* @param state : VBUS state
bogdanm	0:9b334a45a8ff	1047	* This parameter can be one of the these values:
bogdanm	0:9b334a45a8ff	1048	* 0 : VBUS Active
bogdanm	0:9b334a45a8ff	1049	* 1 : VBUS Inactive
bogdanm	0:9b334a45a8ff	1050	* @retval HAL status
bogdanm	0:9b334a45a8ff	1051	*/
bogdanm	0:9b334a45a8ff	1052	HAL_StatusTypeDef USB_DriveVbus (USB_OTG_GlobalTypeDef *USBx, uint8_t state)
bogdanm	0:9b334a45a8ff	1053	{
bogdanm	0:9b334a45a8ff	1054	__IO uint32_t hprt0 = 0;
bogdanm	0:9b334a45a8ff	1055
bogdanm	0:9b334a45a8ff	1056	hprt0 = USBx_HPRT0;
bogdanm	0:9b334a45a8ff	1057	hprt0 &= ~(USB_OTG_HPRT_PENA \| USB_OTG_HPRT_PCDET \|\
bogdanm	0:9b334a45a8ff	1058	USB_OTG_HPRT_PENCHNG \| USB_OTG_HPRT_POCCHNG );
bogdanm	0:9b334a45a8ff	1059
bogdanm	0:9b334a45a8ff	1060	if (((hprt0 & USB_OTG_HPRT_PPWR) == 0 ) && (state == 1 ))
bogdanm	0:9b334a45a8ff	1061	{
bogdanm	0:9b334a45a8ff	1062	USBx_HPRT0 = (USB_OTG_HPRT_PPWR \| hprt0);
bogdanm	0:9b334a45a8ff	1063	}
bogdanm	0:9b334a45a8ff	1064	if (((hprt0 & USB_OTG_HPRT_PPWR) == USB_OTG_HPRT_PPWR) && (state == 0 ))
bogdanm	0:9b334a45a8ff	1065	{
bogdanm	0:9b334a45a8ff	1066	USBx_HPRT0 = ((~USB_OTG_HPRT_PPWR) & hprt0);
bogdanm	0:9b334a45a8ff	1067	}
bogdanm	0:9b334a45a8ff	1068	return HAL_OK;
bogdanm	0:9b334a45a8ff	1069	}
bogdanm	0:9b334a45a8ff	1070
bogdanm	0:9b334a45a8ff	1071	/**
bogdanm	0:9b334a45a8ff	1072	* @brief Return Host Core speed
bogdanm	0:9b334a45a8ff	1073	* @param USBx : Selected device
bogdanm	0:9b334a45a8ff	1074	* @retval speed : Host speed
bogdanm	0:9b334a45a8ff	1075	* This parameter can be one of the these values:
bogdanm	0:9b334a45a8ff	1076	* @arg USB_OTG_SPEED_FULL: Full speed mode
bogdanm	0:9b334a45a8ff	1077	* @arg USB_OTG_SPEED_LOW: Low speed mode
bogdanm	0:9b334a45a8ff	1078	*/
bogdanm	0:9b334a45a8ff	1079	uint32_t USB_GetHostSpeed (USB_OTG_GlobalTypeDef *USBx)
bogdanm	0:9b334a45a8ff	1080	{
bogdanm	0:9b334a45a8ff	1081	__IO uint32_t hprt0 = 0;
bogdanm	0:9b334a45a8ff	1082
bogdanm	0:9b334a45a8ff	1083	hprt0 = USBx_HPRT0;
bogdanm	0:9b334a45a8ff	1084	return ((hprt0 & USB_OTG_HPRT_PSPD) >> 17);
bogdanm	0:9b334a45a8ff	1085	}
bogdanm	0:9b334a45a8ff	1086
bogdanm	0:9b334a45a8ff	1087	/**
bogdanm	0:9b334a45a8ff	1088	* @brief Return Host Current Frame number
bogdanm	0:9b334a45a8ff	1089	* @param USBx : Selected device
bogdanm	0:9b334a45a8ff	1090	* @retval current frame number
bogdanm	0:9b334a45a8ff	1091	*/
bogdanm	0:9b334a45a8ff	1092	uint32_t USB_GetCurrentFrame (USB_OTG_GlobalTypeDef *USBx)
bogdanm	0:9b334a45a8ff	1093	{
bogdanm	0:9b334a45a8ff	1094	return (USBx_HOST->HFNUM & USB_OTG_HFNUM_FRNUM);
bogdanm	0:9b334a45a8ff	1095	}
bogdanm	0:9b334a45a8ff	1096
bogdanm	0:9b334a45a8ff	1097	/**
bogdanm	0:9b334a45a8ff	1098	* @brief Initialize a host channel
bogdanm	0:9b334a45a8ff	1099	* @param USBx : Selected device
bogdanm	0:9b334a45a8ff	1100	* @param ch_num : Channel number
bogdanm	0:9b334a45a8ff	1101	* This parameter can be a value from 1 to 15
bogdanm	0:9b334a45a8ff	1102	* @param epnum : Endpoint number
bogdanm	0:9b334a45a8ff	1103	* This parameter can be a value from 1 to 15
bogdanm	0:9b334a45a8ff	1104	* @param dev_address : Current device address
bogdanm	0:9b334a45a8ff	1105	* This parameter can be a value from 0 to 255
bogdanm	0:9b334a45a8ff	1106	* @param speed : Current device speed
bogdanm	0:9b334a45a8ff	1107	* This parameter can be one of the these values:
bogdanm	0:9b334a45a8ff	1108	* @arg USB_OTG_SPEED_FULL: Full speed mode
bogdanm	0:9b334a45a8ff	1109	* @arg USB_OTG_SPEED_LOW: Low speed mode
bogdanm	0:9b334a45a8ff	1110	* @param ep_type : Endpoint Type
bogdanm	0:9b334a45a8ff	1111	* This parameter can be one of the these values:
bogdanm	0:9b334a45a8ff	1112	* @arg EP_TYPE_CTRL: Control type
bogdanm	0:9b334a45a8ff	1113	* @arg EP_TYPE_ISOC: Isochronous type
bogdanm	0:9b334a45a8ff	1114	* @arg EP_TYPE_BULK: Bulk type
bogdanm	0:9b334a45a8ff	1115	* @arg EP_TYPE_INTR: Interrupt type
bogdanm	0:9b334a45a8ff	1116	* @param mps : Max Packet Size
bogdanm	0:9b334a45a8ff	1117	* This parameter can be a value from 0 to32K
bogdanm	0:9b334a45a8ff	1118	* @retval HAL state
bogdanm	0:9b334a45a8ff	1119	*/
bogdanm	0:9b334a45a8ff	1120	HAL_StatusTypeDef USB_HC_Init(USB_OTG_GlobalTypeDef *USBx,
bogdanm	0:9b334a45a8ff	1121	uint8_t ch_num,
bogdanm	0:9b334a45a8ff	1122	uint8_t epnum,
bogdanm	0:9b334a45a8ff	1123	uint8_t dev_address,
bogdanm	0:9b334a45a8ff	1124	uint8_t speed,
bogdanm	0:9b334a45a8ff	1125	uint8_t ep_type,
bogdanm	0:9b334a45a8ff	1126	uint16_t mps)
bogdanm	0:9b334a45a8ff	1127	{
bogdanm	0:9b334a45a8ff	1128	/* Clear old interrupt conditions for this host channel. */
bogdanm	0:9b334a45a8ff	1129	USBx_HC(ch_num)->HCINT = 0xFFFFFFFF;
bogdanm	0:9b334a45a8ff	1130
bogdanm	0:9b334a45a8ff	1131	/* Enable channel interrupts required for this transfer. */
bogdanm	0:9b334a45a8ff	1132	switch (ep_type)
bogdanm	0:9b334a45a8ff	1133	{
bogdanm	0:9b334a45a8ff	1134	case EP_TYPE_CTRL:
bogdanm	0:9b334a45a8ff	1135	case EP_TYPE_BULK:
bogdanm	0:9b334a45a8ff	1136	USBx_HC(ch_num)->HCINTMSK = USB_OTG_HCINTMSK_XFRCM \|\
bogdanm	0:9b334a45a8ff	1137	USB_OTG_HCINTMSK_STALLM \|\
bogdanm	0:9b334a45a8ff	1138	USB_OTG_HCINTMSK_TXERRM \|\
bogdanm	0:9b334a45a8ff	1139	USB_OTG_HCINTMSK_DTERRM \|\
bogdanm	0:9b334a45a8ff	1140	USB_OTG_HCINTMSK_AHBERR \|\
bogdanm	0:9b334a45a8ff	1141	USB_OTG_HCINTMSK_NAKM ;
bogdanm	0:9b334a45a8ff	1142
bogdanm	0:9b334a45a8ff	1143	if (epnum & 0x80)
bogdanm	0:9b334a45a8ff	1144	{
bogdanm	0:9b334a45a8ff	1145	USBx_HC(ch_num)->HCINTMSK \|= USB_OTG_HCINTMSK_BBERRM;
bogdanm	0:9b334a45a8ff	1146	}
bogdanm	0:9b334a45a8ff	1147	break;
bogdanm	0:9b334a45a8ff	1148
bogdanm	0:9b334a45a8ff	1149	case EP_TYPE_INTR:
bogdanm	0:9b334a45a8ff	1150	USBx_HC(ch_num)->HCINTMSK = USB_OTG_HCINTMSK_XFRCM \|\
bogdanm	0:9b334a45a8ff	1151	USB_OTG_HCINTMSK_STALLM \|\
bogdanm	0:9b334a45a8ff	1152	USB_OTG_HCINTMSK_TXERRM \|\
bogdanm	0:9b334a45a8ff	1153	USB_OTG_HCINTMSK_DTERRM \|\
bogdanm	0:9b334a45a8ff	1154	USB_OTG_HCINTMSK_NAKM \|\
bogdanm	0:9b334a45a8ff	1155	USB_OTG_HCINTMSK_AHBERR \|\
bogdanm	0:9b334a45a8ff	1156	USB_OTG_HCINTMSK_FRMORM ;
bogdanm	0:9b334a45a8ff	1157
bogdanm	0:9b334a45a8ff	1158	if (epnum & 0x80)
bogdanm	0:9b334a45a8ff	1159	{
bogdanm	0:9b334a45a8ff	1160	USBx_HC(ch_num)->HCINTMSK \|= USB_OTG_HCINTMSK_BBERRM;
bogdanm	0:9b334a45a8ff	1161	}
bogdanm	0:9b334a45a8ff	1162
bogdanm	0:9b334a45a8ff	1163	break;
bogdanm	0:9b334a45a8ff	1164
bogdanm	0:9b334a45a8ff	1165	case EP_TYPE_ISOC:
bogdanm	0:9b334a45a8ff	1166	USBx_HC(ch_num)->HCINTMSK = USB_OTG_HCINTMSK_XFRCM \|\
bogdanm	0:9b334a45a8ff	1167	USB_OTG_HCINTMSK_ACKM \|\
bogdanm	0:9b334a45a8ff	1168	USB_OTG_HCINTMSK_AHBERR \|\
bogdanm	0:9b334a45a8ff	1169	USB_OTG_HCINTMSK_FRMORM ;
bogdanm	0:9b334a45a8ff	1170
bogdanm	0:9b334a45a8ff	1171	if (epnum & 0x80)
bogdanm	0:9b334a45a8ff	1172	{
bogdanm	0:9b334a45a8ff	1173	USBx_HC(ch_num)->HCINTMSK \|= (USB_OTG_HCINTMSK_TXERRM \| USB_OTG_HCINTMSK_BBERRM);
bogdanm	0:9b334a45a8ff	1174	}
bogdanm	0:9b334a45a8ff	1175	break;
bogdanm	0:9b334a45a8ff	1176	}
bogdanm	0:9b334a45a8ff	1177
bogdanm	0:9b334a45a8ff	1178	/* Enable the top level host channel interrupt. */
bogdanm	0:9b334a45a8ff	1179	USBx_HOST->HAINTMSK \|= (1 << ch_num);
bogdanm	0:9b334a45a8ff	1180
bogdanm	0:9b334a45a8ff	1181	/* Make sure host channel interrupts are enabled. */
bogdanm	0:9b334a45a8ff	1182	USBx->GINTMSK \|= USB_OTG_GINTMSK_HCIM;
bogdanm	0:9b334a45a8ff	1183
bogdanm	0:9b334a45a8ff	1184	/* Program the HCCHAR register */
bogdanm	0:9b334a45a8ff	1185	USBx_HC(ch_num)->HCCHAR = (((dev_address << 22) & USB_OTG_HCCHAR_DAD) \|\
bogdanm	0:9b334a45a8ff	1186	(((epnum & 0x7F)<< 11) & USB_OTG_HCCHAR_EPNUM)\|\
bogdanm	0:9b334a45a8ff	1187	((((epnum & 0x80) == 0x80)<< 15) & USB_OTG_HCCHAR_EPDIR)\|\
bogdanm	0:9b334a45a8ff	1188	(((speed == HPRT0_PRTSPD_LOW_SPEED)<< 17) & USB_OTG_HCCHAR_LSDEV)\|\
bogdanm	0:9b334a45a8ff	1189	((ep_type << 18) & USB_OTG_HCCHAR_EPTYP)\|\
bogdanm	0:9b334a45a8ff	1190	(mps & USB_OTG_HCCHAR_MPSIZ));
bogdanm	0:9b334a45a8ff	1191
bogdanm	0:9b334a45a8ff	1192	if (ep_type == EP_TYPE_INTR)
bogdanm	0:9b334a45a8ff	1193	{
bogdanm	0:9b334a45a8ff	1194	USBx_HC(ch_num)->HCCHAR \|= USB_OTG_HCCHAR_ODDFRM ;
bogdanm	0:9b334a45a8ff	1195	}
bogdanm	0:9b334a45a8ff	1196
bogdanm	0:9b334a45a8ff	1197	return HAL_OK;
bogdanm	0:9b334a45a8ff	1198	}
bogdanm	0:9b334a45a8ff	1199
bogdanm	0:9b334a45a8ff	1200	/**
bogdanm	0:9b334a45a8ff	1201	* @brief Start a transfer over a host channel
bogdanm	0:9b334a45a8ff	1202	* @param USBx : Selected device
bogdanm	0:9b334a45a8ff	1203	* @param hc : pointer to host channel structure
bogdanm	0:9b334a45a8ff	1204	* @retval HAL state
bogdanm	0:9b334a45a8ff	1205	*/
bogdanm	0:9b334a45a8ff	1206	#if defined (__CC_ARM) /!< ARM Compiler /
bogdanm	0:9b334a45a8ff	1207	#pragma O0
bogdanm	0:9b334a45a8ff	1208	#elif defined (__GNUC__) /!< GNU Compiler /
bogdanm	0:9b334a45a8ff	1209	#pragma GCC optimize ("O0")
bogdanm	0:9b334a45a8ff	1210	#endif /* __CC_ARM */
bogdanm	0:9b334a45a8ff	1211	HAL_StatusTypeDef USB_HC_StartXfer(USB_OTG_GlobalTypeDef USBx, USB_OTG_HCTypeDef hc)
bogdanm	0:9b334a45a8ff	1212	{
bogdanm	0:9b334a45a8ff	1213	uint8_t is_oddframe = 0;
bogdanm	0:9b334a45a8ff	1214	uint16_t len_words = 0;
bogdanm	0:9b334a45a8ff	1215	uint16_t num_packets = 0;
bogdanm	0:9b334a45a8ff	1216	uint16_t max_hc_pkt_count = 256;
bogdanm	0:9b334a45a8ff	1217
bogdanm	0:9b334a45a8ff	1218	/* Compute the expected number of packets associated to the transfer */
bogdanm	0:9b334a45a8ff	1219	if (hc->xfer_len > 0)
bogdanm	0:9b334a45a8ff	1220	{
bogdanm	0:9b334a45a8ff	1221	num_packets = (hc->xfer_len + hc->max_packet - 1) / hc->max_packet;
bogdanm	0:9b334a45a8ff	1222
bogdanm	0:9b334a45a8ff	1223	if (num_packets > max_hc_pkt_count)
bogdanm	0:9b334a45a8ff	1224	{
bogdanm	0:9b334a45a8ff	1225	num_packets = max_hc_pkt_count;
bogdanm	0:9b334a45a8ff	1226	hc->xfer_len = num_packets * hc->max_packet;
bogdanm	0:9b334a45a8ff	1227	}
bogdanm	0:9b334a45a8ff	1228	}
bogdanm	0:9b334a45a8ff	1229	else
bogdanm	0:9b334a45a8ff	1230	{
bogdanm	0:9b334a45a8ff	1231	num_packets = 1;
bogdanm	0:9b334a45a8ff	1232	}
bogdanm	0:9b334a45a8ff	1233	if (hc->ep_is_in)
bogdanm	0:9b334a45a8ff	1234	{
bogdanm	0:9b334a45a8ff	1235	hc->xfer_len = num_packets * hc->max_packet;
bogdanm	0:9b334a45a8ff	1236	}
bogdanm	0:9b334a45a8ff	1237
bogdanm	0:9b334a45a8ff	1238	/* Initialize the HCTSIZn register */
bogdanm	0:9b334a45a8ff	1239	USBx_HC(hc->ch_num)->HCTSIZ = (((hc->xfer_len) & USB_OTG_HCTSIZ_XFRSIZ)) \|\
bogdanm	0:9b334a45a8ff	1240	((num_packets << 19) & USB_OTG_HCTSIZ_PKTCNT) \|\
bogdanm	0:9b334a45a8ff	1241	(((hc->data_pid) << 29) & USB_OTG_HCTSIZ_DPID);
bogdanm	0:9b334a45a8ff	1242
bogdanm	0:9b334a45a8ff	1243	is_oddframe = (USBx_HOST->HFNUM & 0x01) ? 0 : 1;
bogdanm	0:9b334a45a8ff	1244	USBx_HC(hc->ch_num)->HCCHAR &= ~USB_OTG_HCCHAR_ODDFRM;
bogdanm	0:9b334a45a8ff	1245	USBx_HC(hc->ch_num)->HCCHAR \|= (is_oddframe << 29);
bogdanm	0:9b334a45a8ff	1246
bogdanm	0:9b334a45a8ff	1247	/* Set host channel enable */
bogdanm	0:9b334a45a8ff	1248	USBx_HC(hc->ch_num)->HCCHAR &= ~USB_OTG_HCCHAR_CHDIS;
bogdanm	0:9b334a45a8ff	1249	USBx_HC(hc->ch_num)->HCCHAR \|= USB_OTG_HCCHAR_CHENA;
bogdanm	0:9b334a45a8ff	1250
bogdanm	0:9b334a45a8ff	1251	if((hc->ep_is_in == 0) && (hc->xfer_len > 0))
bogdanm	0:9b334a45a8ff	1252	{
bogdanm	0:9b334a45a8ff	1253	switch(hc->ep_type)
bogdanm	0:9b334a45a8ff	1254	{
bogdanm	0:9b334a45a8ff	1255	/* Non periodic transfer */
bogdanm	0:9b334a45a8ff	1256	case EP_TYPE_CTRL:
bogdanm	0:9b334a45a8ff	1257	case EP_TYPE_BULK:
bogdanm	0:9b334a45a8ff	1258	len_words = (hc->xfer_len + 3) / 4;
bogdanm	0:9b334a45a8ff	1259
bogdanm	0:9b334a45a8ff	1260	/* check if there is enough space in FIFO space */
bogdanm	0:9b334a45a8ff	1261	if(len_words > (USBx->HNPTXSTS & 0xFFFF))
bogdanm	0:9b334a45a8ff	1262	{
bogdanm	0:9b334a45a8ff	1263	/* need to process data in nptxfempty interrupt */
bogdanm	0:9b334a45a8ff	1264	USBx->GINTMSK \|= USB_OTG_GINTMSK_NPTXFEM;
bogdanm	0:9b334a45a8ff	1265	}
bogdanm	0:9b334a45a8ff	1266	break;
bogdanm	0:9b334a45a8ff	1267
bogdanm	0:9b334a45a8ff	1268	/* Periodic transfer */
bogdanm	0:9b334a45a8ff	1269	case EP_TYPE_INTR:
bogdanm	0:9b334a45a8ff	1270	case EP_TYPE_ISOC:
bogdanm	0:9b334a45a8ff	1271	len_words = (hc->xfer_len + 3) / 4;
bogdanm	0:9b334a45a8ff	1272	/* check if there is enough space in FIFO space */
bogdanm	0:9b334a45a8ff	1273	if(len_words > (USBx_HOST->HPTXSTS & 0xFFFF)) /* split the transfer */
bogdanm	0:9b334a45a8ff	1274	{
bogdanm	0:9b334a45a8ff	1275	/* need to process data in ptxfempty interrupt */
bogdanm	0:9b334a45a8ff	1276	USBx->GINTMSK \|= USB_OTG_GINTMSK_PTXFEM;
bogdanm	0:9b334a45a8ff	1277	}
bogdanm	0:9b334a45a8ff	1278	break;
bogdanm	0:9b334a45a8ff	1279
bogdanm	0:9b334a45a8ff	1280	default:
bogdanm	0:9b334a45a8ff	1281	break;
bogdanm	0:9b334a45a8ff	1282	}
bogdanm	0:9b334a45a8ff	1283
bogdanm	0:9b334a45a8ff	1284	/* Write packet into the Tx FIFO. */
bogdanm	0:9b334a45a8ff	1285	USB_WritePacket(USBx, hc->xfer_buff, hc->ch_num, hc->xfer_len);
bogdanm	0:9b334a45a8ff	1286	}
bogdanm	0:9b334a45a8ff	1287
bogdanm	0:9b334a45a8ff	1288	return HAL_OK;
bogdanm	0:9b334a45a8ff	1289	}
bogdanm	0:9b334a45a8ff	1290
bogdanm	0:9b334a45a8ff	1291	/**
bogdanm	0:9b334a45a8ff	1292	* @brief Read all host channel interrupts status
bogdanm	0:9b334a45a8ff	1293	* @param USBx : Selected device
bogdanm	0:9b334a45a8ff	1294	* @retval HAL state
bogdanm	0:9b334a45a8ff	1295	*/
bogdanm	0:9b334a45a8ff	1296	uint32_t USB_HC_ReadInterrupt (USB_OTG_GlobalTypeDef *USBx)
bogdanm	0:9b334a45a8ff	1297	{
bogdanm	0:9b334a45a8ff	1298	return ((USBx_HOST->HAINT) & 0xFFFF);
bogdanm	0:9b334a45a8ff	1299	}
bogdanm	0:9b334a45a8ff	1300
bogdanm	0:9b334a45a8ff	1301	/**
bogdanm	0:9b334a45a8ff	1302	* @brief Halt a host channel
bogdanm	0:9b334a45a8ff	1303	* @param USBx : Selected device
bogdanm	0:9b334a45a8ff	1304	* @param hc_num : Host Channel number
bogdanm	0:9b334a45a8ff	1305	* This parameter can be a value from 1 to 15
bogdanm	0:9b334a45a8ff	1306	* @retval HAL state
bogdanm	0:9b334a45a8ff	1307	*/
bogdanm	0:9b334a45a8ff	1308	HAL_StatusTypeDef USB_HC_Halt(USB_OTG_GlobalTypeDef *USBx , uint8_t hc_num)
bogdanm	0:9b334a45a8ff	1309	{
bogdanm	0:9b334a45a8ff	1310	uint32_t count = 0;
bogdanm	0:9b334a45a8ff	1311
bogdanm	0:9b334a45a8ff	1312	/* Check for space in the request queue to issue the halt. */
bogdanm	0:9b334a45a8ff	1313	if (((USBx_HC(hc_num)->HCCHAR) & (HCCHAR_CTRL << 18)) \|\| ((USBx_HC(hc_num)->HCCHAR) & (HCCHAR_BULK << 18)))
bogdanm	0:9b334a45a8ff	1314	{
bogdanm	0:9b334a45a8ff	1315	USBx_HC(hc_num)->HCCHAR \|= USB_OTG_HCCHAR_CHDIS;
bogdanm	0:9b334a45a8ff	1316
bogdanm	0:9b334a45a8ff	1317	if ((USBx->HNPTXSTS & 0xFFFF) == 0)
bogdanm	0:9b334a45a8ff	1318	{
bogdanm	0:9b334a45a8ff	1319	USBx_HC(hc_num)->HCCHAR &= ~USB_OTG_HCCHAR_CHENA;
bogdanm	0:9b334a45a8ff	1320	USBx_HC(hc_num)->HCCHAR \|= USB_OTG_HCCHAR_CHENA;
bogdanm	0:9b334a45a8ff	1321	USBx_HC(hc_num)->HCCHAR &= ~USB_OTG_HCCHAR_EPDIR;
bogdanm	0:9b334a45a8ff	1322	do
bogdanm	0:9b334a45a8ff	1323	{
bogdanm	0:9b334a45a8ff	1324	if (++count > 1000)
bogdanm	0:9b334a45a8ff	1325	{
bogdanm	0:9b334a45a8ff	1326	break;
bogdanm	0:9b334a45a8ff	1327	}
bogdanm	0:9b334a45a8ff	1328	}
bogdanm	0:9b334a45a8ff	1329	while ((USBx_HC(hc_num)->HCCHAR & USB_OTG_HCCHAR_CHENA) == USB_OTG_HCCHAR_CHENA);
bogdanm	0:9b334a45a8ff	1330	}
bogdanm	0:9b334a45a8ff	1331	else
bogdanm	0:9b334a45a8ff	1332	{
bogdanm	0:9b334a45a8ff	1333	USBx_HC(hc_num)->HCCHAR \|= USB_OTG_HCCHAR_CHENA;
bogdanm	0:9b334a45a8ff	1334	}
bogdanm	0:9b334a45a8ff	1335	}
bogdanm	0:9b334a45a8ff	1336	else
bogdanm	0:9b334a45a8ff	1337	{
bogdanm	0:9b334a45a8ff	1338	USBx_HC(hc_num)->HCCHAR \|= USB_OTG_HCCHAR_CHDIS;
bogdanm	0:9b334a45a8ff	1339
bogdanm	0:9b334a45a8ff	1340	if ((USBx_HOST->HPTXSTS & 0xFFFF) == 0)
bogdanm	0:9b334a45a8ff	1341	{
bogdanm	0:9b334a45a8ff	1342	USBx_HC(hc_num)->HCCHAR &= ~USB_OTG_HCCHAR_CHENA;
bogdanm	0:9b334a45a8ff	1343	USBx_HC(hc_num)->HCCHAR \|= USB_OTG_HCCHAR_CHENA;
bogdanm	0:9b334a45a8ff	1344	USBx_HC(hc_num)->HCCHAR &= ~USB_OTG_HCCHAR_EPDIR;
bogdanm	0:9b334a45a8ff	1345	do
bogdanm	0:9b334a45a8ff	1346	{
bogdanm	0:9b334a45a8ff	1347	if (++count > 1000)
bogdanm	0:9b334a45a8ff	1348	{
bogdanm	0:9b334a45a8ff	1349	break;
bogdanm	0:9b334a45a8ff	1350	}
bogdanm	0:9b334a45a8ff	1351	}
bogdanm	0:9b334a45a8ff	1352	while ((USBx_HC(hc_num)->HCCHAR & USB_OTG_HCCHAR_CHENA) == USB_OTG_HCCHAR_CHENA);
bogdanm	0:9b334a45a8ff	1353	}
bogdanm	0:9b334a45a8ff	1354	else
bogdanm	0:9b334a45a8ff	1355	{
bogdanm	0:9b334a45a8ff	1356	USBx_HC(hc_num)->HCCHAR \|= USB_OTG_HCCHAR_CHENA;
bogdanm	0:9b334a45a8ff	1357	}
bogdanm	0:9b334a45a8ff	1358	}
bogdanm	0:9b334a45a8ff	1359
bogdanm	0:9b334a45a8ff	1360	return HAL_OK;
bogdanm	0:9b334a45a8ff	1361	}
bogdanm	0:9b334a45a8ff	1362
bogdanm	0:9b334a45a8ff	1363	/**
bogdanm	0:9b334a45a8ff	1364	* @brief Initiate Do Ping protocol
bogdanm	0:9b334a45a8ff	1365	* @param USBx : Selected device
bogdanm	0:9b334a45a8ff	1366	* @param hc_num : Host Channel number
bogdanm	0:9b334a45a8ff	1367	* This parameter can be a value from 1 to 15
bogdanm	0:9b334a45a8ff	1368	* @retval HAL state
bogdanm	0:9b334a45a8ff	1369	*/
bogdanm	0:9b334a45a8ff	1370	HAL_StatusTypeDef USB_DoPing(USB_OTG_GlobalTypeDef *USBx , uint8_t ch_num)
bogdanm	0:9b334a45a8ff	1371	{
bogdanm	0:9b334a45a8ff	1372	uint8_t num_packets = 1;
bogdanm	0:9b334a45a8ff	1373
bogdanm	0:9b334a45a8ff	1374	USBx_HC(ch_num)->HCTSIZ = ((num_packets << 19) & USB_OTG_HCTSIZ_PKTCNT) \|\
bogdanm	0:9b334a45a8ff	1375	USB_OTG_HCTSIZ_DOPING;
bogdanm	0:9b334a45a8ff	1376
bogdanm	0:9b334a45a8ff	1377	/* Set host channel enable */
bogdanm	0:9b334a45a8ff	1378	USBx_HC(ch_num)->HCCHAR &= ~USB_OTG_HCCHAR_CHDIS;
bogdanm	0:9b334a45a8ff	1379	USBx_HC(ch_num)->HCCHAR \|= USB_OTG_HCCHAR_CHENA;
bogdanm	0:9b334a45a8ff	1380
bogdanm	0:9b334a45a8ff	1381	return HAL_OK;
bogdanm	0:9b334a45a8ff	1382	}
bogdanm	0:9b334a45a8ff	1383
bogdanm	0:9b334a45a8ff	1384	/**
bogdanm	0:9b334a45a8ff	1385	* @brief Stop Host Core
bogdanm	0:9b334a45a8ff	1386	* @param USBx : Selected device
bogdanm	0:9b334a45a8ff	1387	* @retval HAL state
bogdanm	0:9b334a45a8ff	1388	*/
bogdanm	0:9b334a45a8ff	1389	HAL_StatusTypeDef USB_StopHost(USB_OTG_GlobalTypeDef *USBx)
bogdanm	0:9b334a45a8ff	1390	{
bogdanm	0:9b334a45a8ff	1391	uint8_t index;
bogdanm	0:9b334a45a8ff	1392	uint32_t count = 0;
bogdanm	0:9b334a45a8ff	1393	uint32_t value = 0;
bogdanm	0:9b334a45a8ff	1394
bogdanm	0:9b334a45a8ff	1395	USB_DisableGlobalInt(USBx);
bogdanm	0:9b334a45a8ff	1396
bogdanm	0:9b334a45a8ff	1397	/* Flush FIFO */
bogdanm	0:9b334a45a8ff	1398	USB_FlushTxFifo(USBx, 0x10);
bogdanm	0:9b334a45a8ff	1399	USB_FlushRxFifo(USBx);
bogdanm	0:9b334a45a8ff	1400
bogdanm	0:9b334a45a8ff	1401	/* Flush out any leftover queued requests. */
bogdanm	0:9b334a45a8ff	1402	for (index = 0; index <= 15; index++)
bogdanm	0:9b334a45a8ff	1403	{
bogdanm	0:9b334a45a8ff	1404	value = USBx_HC(index)->HCCHAR;
bogdanm	0:9b334a45a8ff	1405	value \|= USB_OTG_HCCHAR_CHDIS;
bogdanm	0:9b334a45a8ff	1406	value &= ~USB_OTG_HCCHAR_CHENA;
bogdanm	0:9b334a45a8ff	1407	value &= ~USB_OTG_HCCHAR_EPDIR;
bogdanm	0:9b334a45a8ff	1408	USBx_HC(index)->HCCHAR = value;
bogdanm	0:9b334a45a8ff	1409	}
bogdanm	0:9b334a45a8ff	1410
bogdanm	0:9b334a45a8ff	1411	/* Halt all channels to put them into a known state. */
bogdanm	0:9b334a45a8ff	1412	for (index = 0; index <= 15; index++)
bogdanm	0:9b334a45a8ff	1413	{
bogdanm	0:9b334a45a8ff	1414	value = USBx_HC(index)->HCCHAR ;
bogdanm	0:9b334a45a8ff	1415	value \|= USB_OTG_HCCHAR_CHDIS;
bogdanm	0:9b334a45a8ff	1416	value \|= USB_OTG_HCCHAR_CHENA;
bogdanm	0:9b334a45a8ff	1417	value &= ~USB_OTG_HCCHAR_EPDIR;
bogdanm	0:9b334a45a8ff	1418	USBx_HC(index)->HCCHAR = value;
bogdanm	0:9b334a45a8ff	1419
bogdanm	0:9b334a45a8ff	1420	do
bogdanm	0:9b334a45a8ff	1421	{
bogdanm	0:9b334a45a8ff	1422	if (++count > 1000)
bogdanm	0:9b334a45a8ff	1423	{
bogdanm	0:9b334a45a8ff	1424	break;
bogdanm	0:9b334a45a8ff	1425	}
bogdanm	0:9b334a45a8ff	1426	}
bogdanm	0:9b334a45a8ff	1427	while ((USBx_HC(index)->HCCHAR & USB_OTG_HCCHAR_CHENA) == USB_OTG_HCCHAR_CHENA);
bogdanm	0:9b334a45a8ff	1428	}
bogdanm	0:9b334a45a8ff	1429
bogdanm	0:9b334a45a8ff	1430	/* Clear any pending Host interrupts */
bogdanm	0:9b334a45a8ff	1431	USBx_HOST->HAINT = 0xFFFFFFFF;
bogdanm	0:9b334a45a8ff	1432	USBx->GINTSTS = 0xFFFFFFFF;
bogdanm	0:9b334a45a8ff	1433	USB_EnableGlobalInt(USBx);
bogdanm	0:9b334a45a8ff	1434
bogdanm	0:9b334a45a8ff	1435	return HAL_OK;
bogdanm	0:9b334a45a8ff	1436	}
bogdanm	0:9b334a45a8ff	1437
bogdanm	0:9b334a45a8ff	1438	/**
bogdanm	0:9b334a45a8ff	1439	* @brief USB_ActivateRemoteWakeup : active remote wakeup signalling
bogdanm	0:9b334a45a8ff	1440	* @param USBx : Selected device
bogdanm	0:9b334a45a8ff	1441	* @retval HAL status
bogdanm	0:9b334a45a8ff	1442	*/
bogdanm	0:9b334a45a8ff	1443	HAL_StatusTypeDef USB_ActivateRemoteWakeup(USB_OTG_GlobalTypeDef *USBx)
bogdanm	0:9b334a45a8ff	1444	{
bogdanm	0:9b334a45a8ff	1445	if((USBx_DEVICE->DSTS & USB_OTG_DSTS_SUSPSTS) == USB_OTG_DSTS_SUSPSTS)
bogdanm	0:9b334a45a8ff	1446	{
bogdanm	0:9b334a45a8ff	1447	/* active Remote wakeup signalling */
bogdanm	0:9b334a45a8ff	1448	USBx_DEVICE->DCTL \|= USB_OTG_DCTL_RWUSIG;
bogdanm	0:9b334a45a8ff	1449	}
bogdanm	0:9b334a45a8ff	1450	return HAL_OK;
bogdanm	0:9b334a45a8ff	1451	}
bogdanm	0:9b334a45a8ff	1452
bogdanm	0:9b334a45a8ff	1453	/**
bogdanm	0:9b334a45a8ff	1454	* @brief USB_DeActivateRemoteWakeup : de-active remote wakeup signalling
bogdanm	0:9b334a45a8ff	1455	* @param USBx : Selected device
bogdanm	0:9b334a45a8ff	1456	* @retval HAL status
bogdanm	0:9b334a45a8ff	1457	*/
bogdanm	0:9b334a45a8ff	1458	HAL_StatusTypeDef USB_DeActivateRemoteWakeup(USB_OTG_GlobalTypeDef *USBx)
bogdanm	0:9b334a45a8ff	1459	{
bogdanm	0:9b334a45a8ff	1460	/* active Remote wakeup signalling */
bogdanm	0:9b334a45a8ff	1461	USBx_DEVICE->DCTL &= ~(USB_OTG_DCTL_RWUSIG);
bogdanm	0:9b334a45a8ff	1462	return HAL_OK;
bogdanm	0:9b334a45a8ff	1463	}
bogdanm	0:9b334a45a8ff	1464
bogdanm	0:9b334a45a8ff	1465	#endif /* USB_OTG_FS */
bogdanm	0:9b334a45a8ff	1466
bogdanm	0:9b334a45a8ff	1467	/*==============================================================================
bogdanm	0:9b334a45a8ff	1468	USB Device FS peripheral available on STM32F102xx and STM32F103xx devices
bogdanm	0:9b334a45a8ff	1469	==============================================================================*/
bogdanm	0:9b334a45a8ff	1470	#if defined (USB)
bogdanm	0:9b334a45a8ff	1471	/**
bogdanm	0:9b334a45a8ff	1472	* @brief Initializes the USB Core
bogdanm	0:9b334a45a8ff	1473	* @param USBx: USB Instance
bogdanm	0:9b334a45a8ff	1474	* @param cfg : pointer to a USB_CfgTypeDef structure that contains
bogdanm	0:9b334a45a8ff	1475	* the configuration information for the specified USBx peripheral.
bogdanm	0:9b334a45a8ff	1476	* @retval HAL status
bogdanm	0:9b334a45a8ff	1477	*/
bogdanm	0:9b334a45a8ff	1478	HAL_StatusTypeDef USB_CoreInit(USB_TypeDef *USBx, USB_CfgTypeDef cfg)
bogdanm	0:9b334a45a8ff	1479	{
bogdanm	0:9b334a45a8ff	1480	/* NOTE : - This function is not required by USB Device FS peripheral, it is used
bogdanm	0:9b334a45a8ff	1481	only by USB OTG FS peripheral.
bogdanm	0:9b334a45a8ff	1482	- This function is added to ensure compatibility across platforms.
bogdanm	0:9b334a45a8ff	1483	*/
bogdanm	0:9b334a45a8ff	1484	return HAL_OK;
bogdanm	0:9b334a45a8ff	1485	}
bogdanm	0:9b334a45a8ff	1486
bogdanm	0:9b334a45a8ff	1487	/**
bogdanm	0:9b334a45a8ff	1488	* @brief USB_EnableGlobalInt
bogdanm	0:9b334a45a8ff	1489	* Enables the controller's Global Int in the AHB Config reg
bogdanm	0:9b334a45a8ff	1490	* @param USBx : Selected device
bogdanm	0:9b334a45a8ff	1491	* @retval HAL status
bogdanm	0:9b334a45a8ff	1492	*/
bogdanm	0:9b334a45a8ff	1493	HAL_StatusTypeDef USB_EnableGlobalInt(USB_TypeDef *USBx)
bogdanm	0:9b334a45a8ff	1494	{
bogdanm	0:9b334a45a8ff	1495	uint32_t winterruptmask = 0;
bogdanm	0:9b334a45a8ff	1496
bogdanm	0:9b334a45a8ff	1497	/* Set winterruptmask variable */
bogdanm	0:9b334a45a8ff	1498	winterruptmask = USB_CNTR_CTRM \| USB_CNTR_WKUPM \| USB_CNTR_SUSPM \| USB_CNTR_ERRM \
bogdanm	0:9b334a45a8ff	1499	\| USB_CNTR_ESOFM \| USB_CNTR_RESETM;
bogdanm	0:9b334a45a8ff	1500
bogdanm	0:9b334a45a8ff	1501	/* Set interrupt mask */
bogdanm	0:9b334a45a8ff	1502	USBx->CNTR \|= winterruptmask;
bogdanm	0:9b334a45a8ff	1503
bogdanm	0:9b334a45a8ff	1504	return HAL_OK;
bogdanm	0:9b334a45a8ff	1505	}
bogdanm	0:9b334a45a8ff	1506
bogdanm	0:9b334a45a8ff	1507	/**
bogdanm	0:9b334a45a8ff	1508	* @brief USB_DisableGlobalInt
bogdanm	0:9b334a45a8ff	1509	* Disable the controller's Global Int in the AHB Config reg
bogdanm	0:9b334a45a8ff	1510	* @param USBx : Selected device
bogdanm	0:9b334a45a8ff	1511	* @retval HAL status
bogdanm	0:9b334a45a8ff	1512	*/
bogdanm	0:9b334a45a8ff	1513	HAL_StatusTypeDef USB_DisableGlobalInt(USB_TypeDef *USBx)
bogdanm	0:9b334a45a8ff	1514	{
bogdanm	0:9b334a45a8ff	1515	uint32_t winterruptmask = 0;
bogdanm	0:9b334a45a8ff	1516
bogdanm	0:9b334a45a8ff	1517	/* Set winterruptmask variable */
bogdanm	0:9b334a45a8ff	1518	winterruptmask = USB_CNTR_CTRM \| USB_CNTR_WKUPM \| USB_CNTR_SUSPM \| USB_CNTR_ERRM \
bogdanm	0:9b334a45a8ff	1519	\| USB_CNTR_ESOFM \| USB_CNTR_RESETM;
bogdanm	0:9b334a45a8ff	1520
bogdanm	0:9b334a45a8ff	1521	/* Clear interrupt mask */
bogdanm	0:9b334a45a8ff	1522	USBx->CNTR &= ~winterruptmask;
bogdanm	0:9b334a45a8ff	1523
bogdanm	0:9b334a45a8ff	1524	return HAL_OK;
bogdanm	0:9b334a45a8ff	1525	}
bogdanm	0:9b334a45a8ff	1526
bogdanm	0:9b334a45a8ff	1527	/**
bogdanm	0:9b334a45a8ff	1528	* @brief USB_SetCurrentMode : Set functional mode
bogdanm	0:9b334a45a8ff	1529	* @param USBx : Selected device
bogdanm	0:9b334a45a8ff	1530	* @param mode : current core mode
bogdanm	0:9b334a45a8ff	1531	* This parameter can be one of the these values:
bogdanm	0:9b334a45a8ff	1532	* @arg USB_DEVICE_MODE: Peripheral mode mode
bogdanm	0:9b334a45a8ff	1533	* @retval HAL status
bogdanm	0:9b334a45a8ff	1534	*/
bogdanm	0:9b334a45a8ff	1535	HAL_StatusTypeDef USB_SetCurrentMode(USB_TypeDef *USBx , USB_ModeTypeDef mode)
bogdanm	0:9b334a45a8ff	1536	{
bogdanm	0:9b334a45a8ff	1537	/* NOTE : - This function is not required by USB Device FS peripheral, it is used
bogdanm	0:9b334a45a8ff	1538	only by USB OTG FS peripheral.
bogdanm	0:9b334a45a8ff	1539	- This function is added to ensure compatibility across platforms.
bogdanm	0:9b334a45a8ff	1540	*/
bogdanm	0:9b334a45a8ff	1541	return HAL_OK;
bogdanm	0:9b334a45a8ff	1542	}
bogdanm	0:9b334a45a8ff	1543
bogdanm	0:9b334a45a8ff	1544	/**
bogdanm	0:9b334a45a8ff	1545	* @brief USB_DevInit : Initializes the USB controller registers
bogdanm	0:9b334a45a8ff	1546	* for device mode
bogdanm	0:9b334a45a8ff	1547	* @param USBx : Selected device
bogdanm	0:9b334a45a8ff	1548	* @param cfg : pointer to a USB_CfgTypeDef structure that contains
bogdanm	0:9b334a45a8ff	1549	* the configuration information for the specified USBx peripheral.
bogdanm	0:9b334a45a8ff	1550	* @retval HAL status
bogdanm	0:9b334a45a8ff	1551	*/
bogdanm	0:9b334a45a8ff	1552	HAL_StatusTypeDef USB_DevInit (USB_TypeDef *USBx, USB_CfgTypeDef cfg)
bogdanm	0:9b334a45a8ff	1553	{
bogdanm	0:9b334a45a8ff	1554	/* Init Device */
bogdanm	0:9b334a45a8ff	1555	/CNTR_FRES = 1/
bogdanm	0:9b334a45a8ff	1556	USBx->CNTR = USB_CNTR_FRES;
bogdanm	0:9b334a45a8ff	1557
bogdanm	0:9b334a45a8ff	1558	/CNTR_FRES = 0/
bogdanm	0:9b334a45a8ff	1559	USBx->CNTR = 0;
bogdanm	0:9b334a45a8ff	1560
bogdanm	0:9b334a45a8ff	1561	/Clear pending interrupts/
bogdanm	0:9b334a45a8ff	1562	USBx->ISTR = 0;
bogdanm	0:9b334a45a8ff	1563
bogdanm	0:9b334a45a8ff	1564	/Set Btable Address/
bogdanm	0:9b334a45a8ff	1565	USBx->BTABLE = BTABLE_ADDRESS;
bogdanm	0:9b334a45a8ff	1566
bogdanm	0:9b334a45a8ff	1567	return HAL_OK;
bogdanm	0:9b334a45a8ff	1568	}
bogdanm	0:9b334a45a8ff	1569
bogdanm	0:9b334a45a8ff	1570	/**
bogdanm	0:9b334a45a8ff	1571	* @brief USB_FlushTxFifo : Flush a Tx FIFO
bogdanm	0:9b334a45a8ff	1572	* @param USBx : Selected device
bogdanm	0:9b334a45a8ff	1573	* @param num : FIFO number
bogdanm	0:9b334a45a8ff	1574	* This parameter can be a value from 1 to 15
bogdanm	0:9b334a45a8ff	1575	15 means Flush all Tx FIFOs
bogdanm	0:9b334a45a8ff	1576	* @retval HAL status
bogdanm	0:9b334a45a8ff	1577	*/
bogdanm	0:9b334a45a8ff	1578	HAL_StatusTypeDef USB_FlushTxFifo (USB_TypeDef *USBx, uint32_t num )
bogdanm	0:9b334a45a8ff	1579	{
bogdanm	0:9b334a45a8ff	1580	/* NOTE : - This function is not required by USB Device FS peripheral, it is used
bogdanm	0:9b334a45a8ff	1581	only by USB OTG FS peripheral.
bogdanm	0:9b334a45a8ff	1582	- This function is added to ensure compatibility across platforms.
bogdanm	0:9b334a45a8ff	1583	*/
bogdanm	0:9b334a45a8ff	1584	return HAL_OK;
bogdanm	0:9b334a45a8ff	1585	}
bogdanm	0:9b334a45a8ff	1586
bogdanm	0:9b334a45a8ff	1587	/**
bogdanm	0:9b334a45a8ff	1588	* @brief USB_FlushRxFifo : Flush Rx FIFO
bogdanm	0:9b334a45a8ff	1589	* @param USBx : Selected device
bogdanm	0:9b334a45a8ff	1590	* @retval HAL status
bogdanm	0:9b334a45a8ff	1591	*/
bogdanm	0:9b334a45a8ff	1592	HAL_StatusTypeDef USB_FlushRxFifo(USB_TypeDef *USBx)
bogdanm	0:9b334a45a8ff	1593	{
bogdanm	0:9b334a45a8ff	1594	/* NOTE : - This function is not required by USB Device FS peripheral, it is used
bogdanm	0:9b334a45a8ff	1595	only by USB OTG FS peripheral.
bogdanm	0:9b334a45a8ff	1596	- This function is added to ensure compatibility across platforms.
bogdanm	0:9b334a45a8ff	1597	*/
bogdanm	0:9b334a45a8ff	1598	return HAL_OK;
bogdanm	0:9b334a45a8ff	1599	}
bogdanm	0:9b334a45a8ff	1600
bogdanm	0:9b334a45a8ff	1601	/**
bogdanm	0:9b334a45a8ff	1602	* @brief Activate and configure an endpoint
bogdanm	0:9b334a45a8ff	1603	* @param USBx : Selected device
bogdanm	0:9b334a45a8ff	1604	* @param ep: pointer to endpoint structure
bogdanm	0:9b334a45a8ff	1605	* @retval HAL status
bogdanm	0:9b334a45a8ff	1606	*/
bogdanm	0:9b334a45a8ff	1607	HAL_StatusTypeDef USB_ActivateEndpoint(USB_TypeDef USBx, USB_EPTypeDef ep)
bogdanm	0:9b334a45a8ff	1608	{
bogdanm	0:9b334a45a8ff	1609	/* initialize Endpoint */
bogdanm	0:9b334a45a8ff	1610	switch (ep->type)
bogdanm	0:9b334a45a8ff	1611	{
bogdanm	0:9b334a45a8ff	1612	case EP_TYPE_CTRL:
bogdanm	0:9b334a45a8ff	1613	PCD_SET_EPTYPE(USBx, ep->num, USB_EP_CONTROL);
bogdanm	0:9b334a45a8ff	1614	break;
bogdanm	0:9b334a45a8ff	1615	case EP_TYPE_BULK:
bogdanm	0:9b334a45a8ff	1616	PCD_SET_EPTYPE(USBx, ep->num, USB_EP_BULK);
bogdanm	0:9b334a45a8ff	1617	break;
bogdanm	0:9b334a45a8ff	1618	case EP_TYPE_INTR:
bogdanm	0:9b334a45a8ff	1619	PCD_SET_EPTYPE(USBx, ep->num, USB_EP_INTERRUPT);
bogdanm	0:9b334a45a8ff	1620	break;
bogdanm	0:9b334a45a8ff	1621	case EP_TYPE_ISOC:
bogdanm	0:9b334a45a8ff	1622	PCD_SET_EPTYPE(USBx, ep->num, USB_EP_ISOCHRONOUS);
bogdanm	0:9b334a45a8ff	1623	break;
bogdanm	0:9b334a45a8ff	1624	default:
bogdanm	0:9b334a45a8ff	1625	break;
bogdanm	0:9b334a45a8ff	1626	}
bogdanm	0:9b334a45a8ff	1627
bogdanm	0:9b334a45a8ff	1628	PCD_SET_EP_ADDRESS(USBx, ep->num, ep->num);
bogdanm	0:9b334a45a8ff	1629
bogdanm	0:9b334a45a8ff	1630	if (ep->doublebuffer == 0)
bogdanm	0:9b334a45a8ff	1631	{
bogdanm	0:9b334a45a8ff	1632	if (ep->is_in)
bogdanm	0:9b334a45a8ff	1633	{
bogdanm	0:9b334a45a8ff	1634	/Set the endpoint Transmit buffer address /
bogdanm	0:9b334a45a8ff	1635	PCD_SET_EP_TX_ADDRESS(USBx, ep->num, ep->pmaadress);
bogdanm	0:9b334a45a8ff	1636	PCD_CLEAR_TX_DTOG(USBx, ep->num);
bogdanm	0:9b334a45a8ff	1637	/* Configure NAK status for the Endpoint*/
bogdanm	0:9b334a45a8ff	1638	PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK);
bogdanm	0:9b334a45a8ff	1639	}
bogdanm	0:9b334a45a8ff	1640	else
bogdanm	0:9b334a45a8ff	1641	{
bogdanm	0:9b334a45a8ff	1642	/Set the endpoint Receive buffer address /
bogdanm	0:9b334a45a8ff	1643	PCD_SET_EP_RX_ADDRESS(USBx, ep->num, ep->pmaadress);
bogdanm	0:9b334a45a8ff	1644	/Set the endpoint Receive buffer counter/
bogdanm	0:9b334a45a8ff	1645	PCD_SET_EP_RX_CNT(USBx, ep->num, ep->maxpacket);
bogdanm	0:9b334a45a8ff	1646	PCD_CLEAR_RX_DTOG(USBx, ep->num);
bogdanm	0:9b334a45a8ff	1647	/* Configure VALID status for the Endpoint*/
bogdanm	0:9b334a45a8ff	1648	PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
bogdanm	0:9b334a45a8ff	1649	}
bogdanm	0:9b334a45a8ff	1650	}
bogdanm	0:9b334a45a8ff	1651	/Double Buffer/
bogdanm	0:9b334a45a8ff	1652	else
bogdanm	0:9b334a45a8ff	1653	{
bogdanm	0:9b334a45a8ff	1654	/Set the endpoint as double buffered/
bogdanm	0:9b334a45a8ff	1655	PCD_SET_EP_DBUF(USBx, ep->num);
bogdanm	0:9b334a45a8ff	1656	/Set buffer address for double buffered mode/
bogdanm	0:9b334a45a8ff	1657	PCD_SET_EP_DBUF_ADDR(USBx, ep->num,ep->pmaaddr0, ep->pmaaddr1);
bogdanm	0:9b334a45a8ff	1658
bogdanm	0:9b334a45a8ff	1659	if (ep->is_in==0)
bogdanm	0:9b334a45a8ff	1660	{
bogdanm	0:9b334a45a8ff	1661	/* Clear the data toggle bits for the endpoint IN/OUT*/
bogdanm	0:9b334a45a8ff	1662	PCD_CLEAR_RX_DTOG(USBx, ep->num);
bogdanm	0:9b334a45a8ff	1663	PCD_CLEAR_TX_DTOG(USBx, ep->num);
bogdanm	0:9b334a45a8ff	1664
bogdanm	0:9b334a45a8ff	1665	/* Reset value of the data toggle bits for the endpoint out*/
bogdanm	0:9b334a45a8ff	1666	PCD_TX_DTOG(USBx, ep->num);
bogdanm	0:9b334a45a8ff	1667
bogdanm	0:9b334a45a8ff	1668	PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
bogdanm	0:9b334a45a8ff	1669	PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
bogdanm	0:9b334a45a8ff	1670	}
bogdanm	0:9b334a45a8ff	1671	else
bogdanm	0:9b334a45a8ff	1672	{
bogdanm	0:9b334a45a8ff	1673	/* Clear the data toggle bits for the endpoint IN/OUT*/
bogdanm	0:9b334a45a8ff	1674	PCD_CLEAR_RX_DTOG(USBx, ep->num);
bogdanm	0:9b334a45a8ff	1675	PCD_CLEAR_TX_DTOG(USBx, ep->num);
bogdanm	0:9b334a45a8ff	1676	PCD_RX_DTOG(USBx, ep->num);
bogdanm	0:9b334a45a8ff	1677	/* Configure DISABLE status for the Endpoint*/
bogdanm	0:9b334a45a8ff	1678	PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
bogdanm	0:9b334a45a8ff	1679	PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
bogdanm	0:9b334a45a8ff	1680	}
bogdanm	0:9b334a45a8ff	1681	}
bogdanm	0:9b334a45a8ff	1682
bogdanm	0:9b334a45a8ff	1683	return HAL_OK;
bogdanm	0:9b334a45a8ff	1684	}
bogdanm	0:9b334a45a8ff	1685
bogdanm	0:9b334a45a8ff	1686	/**
bogdanm	0:9b334a45a8ff	1687	* @brief De-activate and de-initialize an endpoint
bogdanm	0:9b334a45a8ff	1688	* @param USBx : Selected device
bogdanm	0:9b334a45a8ff	1689	* @param ep: pointer to endpoint structure
bogdanm	0:9b334a45a8ff	1690	* @retval HAL status
bogdanm	0:9b334a45a8ff	1691	*/
bogdanm	0:9b334a45a8ff	1692	HAL_StatusTypeDef USB_DeactivateEndpoint(USB_TypeDef USBx, USB_EPTypeDef ep)
bogdanm	0:9b334a45a8ff	1693	{
bogdanm	0:9b334a45a8ff	1694	if (ep->doublebuffer == 0)
bogdanm	0:9b334a45a8ff	1695	{
bogdanm	0:9b334a45a8ff	1696	if (ep->is_in)
bogdanm	0:9b334a45a8ff	1697	{
bogdanm	0:9b334a45a8ff	1698	PCD_CLEAR_TX_DTOG(USBx, ep->num);
bogdanm	0:9b334a45a8ff	1699	/* Configure DISABLE status for the Endpoint*/
bogdanm	0:9b334a45a8ff	1700	PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
bogdanm	0:9b334a45a8ff	1701	}
bogdanm	0:9b334a45a8ff	1702	else
bogdanm	0:9b334a45a8ff	1703	{
bogdanm	0:9b334a45a8ff	1704	PCD_CLEAR_RX_DTOG(USBx, ep->num);
bogdanm	0:9b334a45a8ff	1705	/* Configure DISABLE status for the Endpoint*/
bogdanm	0:9b334a45a8ff	1706	PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
bogdanm	0:9b334a45a8ff	1707	}
bogdanm	0:9b334a45a8ff	1708	}
bogdanm	0:9b334a45a8ff	1709	/Double Buffer/
bogdanm	0:9b334a45a8ff	1710	else
bogdanm	0:9b334a45a8ff	1711	{
bogdanm	0:9b334a45a8ff	1712	if (ep->is_in==0)
bogdanm	0:9b334a45a8ff	1713	{
bogdanm	0:9b334a45a8ff	1714	/* Clear the data toggle bits for the endpoint IN/OUT*/
bogdanm	0:9b334a45a8ff	1715	PCD_CLEAR_RX_DTOG(USBx, ep->num);
bogdanm	0:9b334a45a8ff	1716	PCD_CLEAR_TX_DTOG(USBx, ep->num);
bogdanm	0:9b334a45a8ff	1717
bogdanm	0:9b334a45a8ff	1718	/* Reset value of the data toggle bits for the endpoint out*/
bogdanm	0:9b334a45a8ff	1719	PCD_TX_DTOG(USBx, ep->num);
bogdanm	0:9b334a45a8ff	1720
bogdanm	0:9b334a45a8ff	1721	PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
bogdanm	0:9b334a45a8ff	1722	PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
bogdanm	0:9b334a45a8ff	1723	}
bogdanm	0:9b334a45a8ff	1724	else
bogdanm	0:9b334a45a8ff	1725	{
bogdanm	0:9b334a45a8ff	1726	/* Clear the data toggle bits for the endpoint IN/OUT*/
bogdanm	0:9b334a45a8ff	1727	PCD_CLEAR_RX_DTOG(USBx, ep->num);
bogdanm	0:9b334a45a8ff	1728	PCD_CLEAR_TX_DTOG(USBx, ep->num);
bogdanm	0:9b334a45a8ff	1729	PCD_RX_DTOG(USBx, ep->num);
bogdanm	0:9b334a45a8ff	1730	/* Configure DISABLE status for the Endpoint*/
bogdanm	0:9b334a45a8ff	1731	PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
bogdanm	0:9b334a45a8ff	1732	PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
bogdanm	0:9b334a45a8ff	1733	}
bogdanm	0:9b334a45a8ff	1734	}
bogdanm	0:9b334a45a8ff	1735
bogdanm	0:9b334a45a8ff	1736	return HAL_OK;
bogdanm	0:9b334a45a8ff	1737	}
bogdanm	0:9b334a45a8ff	1738
bogdanm	0:9b334a45a8ff	1739	/**
bogdanm	0:9b334a45a8ff	1740	* @brief USB_EPStartXfer : setup and starts a transfer over an EP
bogdanm	0:9b334a45a8ff	1741	* @param USBx : Selected device
bogdanm	0:9b334a45a8ff	1742	* @param ep: pointer to endpoint structure
bogdanm	0:9b334a45a8ff	1743	* @retval HAL status
bogdanm	0:9b334a45a8ff	1744	*/
bogdanm	0:9b334a45a8ff	1745	HAL_StatusTypeDef USB_EPStartXfer(USB_TypeDef USBx , USB_EPTypeDef ep)
bogdanm	0:9b334a45a8ff	1746	{
bogdanm	0:9b334a45a8ff	1747	uint16_t pmabuffer = 0;
bogdanm	0:9b334a45a8ff	1748	uint32_t len = ep->xfer_len;
bogdanm	0:9b334a45a8ff	1749
bogdanm	0:9b334a45a8ff	1750	/* IN endpoint */
bogdanm	0:9b334a45a8ff	1751	if (ep->is_in == 1)
bogdanm	0:9b334a45a8ff	1752	{
bogdanm	0:9b334a45a8ff	1753	/Multi packet transfer/
bogdanm	0:9b334a45a8ff	1754	if (ep->xfer_len > ep->maxpacket)
bogdanm	0:9b334a45a8ff	1755	{
bogdanm	0:9b334a45a8ff	1756	len=ep->maxpacket;
bogdanm	0:9b334a45a8ff	1757	ep->xfer_len-=len;
bogdanm	0:9b334a45a8ff	1758	}
bogdanm	0:9b334a45a8ff	1759	else
bogdanm	0:9b334a45a8ff	1760	{
bogdanm	0:9b334a45a8ff	1761	len=ep->xfer_len;
bogdanm	0:9b334a45a8ff	1762	ep->xfer_len =0;
bogdanm	0:9b334a45a8ff	1763	}
bogdanm	0:9b334a45a8ff	1764
bogdanm	0:9b334a45a8ff	1765	/* configure and validate Tx endpoint */
bogdanm	0:9b334a45a8ff	1766	if (ep->doublebuffer == 0)
bogdanm	0:9b334a45a8ff	1767	{
bogdanm	0:9b334a45a8ff	1768	USB_WritePMA(USBx, ep->xfer_buff, ep->pmaadress, len);
bogdanm	0:9b334a45a8ff	1769	PCD_SET_EP_TX_CNT(USBx, ep->num, len);
bogdanm	0:9b334a45a8ff	1770	}
bogdanm	0:9b334a45a8ff	1771	else
bogdanm	0:9b334a45a8ff	1772	{
bogdanm	0:9b334a45a8ff	1773	/Set the Double buffer counter/
bogdanm	0:9b334a45a8ff	1774	PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len);
bogdanm	0:9b334a45a8ff	1775
bogdanm	0:9b334a45a8ff	1776	/Write the data to the USB endpoint/
bogdanm	0:9b334a45a8ff	1777	if (PCD_GET_ENDPOINT(USBx, ep->num)& USB_EP_DTOG_TX)
bogdanm	0:9b334a45a8ff	1778	{
bogdanm	0:9b334a45a8ff	1779	pmabuffer = ep->pmaaddr1;
bogdanm	0:9b334a45a8ff	1780	}
bogdanm	0:9b334a45a8ff	1781	else
bogdanm	0:9b334a45a8ff	1782	{
bogdanm	0:9b334a45a8ff	1783	pmabuffer = ep->pmaaddr0;
bogdanm	0:9b334a45a8ff	1784	}
bogdanm	0:9b334a45a8ff	1785	USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, len);
bogdanm	0:9b334a45a8ff	1786	PCD_FreeUserBuffer(USBx, ep->num, ep->is_in);
bogdanm	0:9b334a45a8ff	1787	}
bogdanm	0:9b334a45a8ff	1788
bogdanm	0:9b334a45a8ff	1789	PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_VALID);
bogdanm	0:9b334a45a8ff	1790	}
bogdanm	0:9b334a45a8ff	1791	else /* OUT endpoint */
bogdanm	0:9b334a45a8ff	1792	{
bogdanm	0:9b334a45a8ff	1793	/* Multi packet transfer*/
bogdanm	0:9b334a45a8ff	1794	if (ep->xfer_len > ep->maxpacket)
bogdanm	0:9b334a45a8ff	1795	{
bogdanm	0:9b334a45a8ff	1796	len=ep->maxpacket;
bogdanm	0:9b334a45a8ff	1797	ep->xfer_len-=len;
bogdanm	0:9b334a45a8ff	1798	}
bogdanm	0:9b334a45a8ff	1799	else
bogdanm	0:9b334a45a8ff	1800	{
bogdanm	0:9b334a45a8ff	1801	len=ep->xfer_len;
bogdanm	0:9b334a45a8ff	1802	ep->xfer_len =0;
bogdanm	0:9b334a45a8ff	1803	}
bogdanm	0:9b334a45a8ff	1804
bogdanm	0:9b334a45a8ff	1805	/* configure and validate Rx endpoint */
bogdanm	0:9b334a45a8ff	1806	if (ep->doublebuffer == 0)
bogdanm	0:9b334a45a8ff	1807	{
bogdanm	0:9b334a45a8ff	1808	/Set RX buffer count/
bogdanm	0:9b334a45a8ff	1809	PCD_SET_EP_RX_CNT(USBx, ep->num, len);
bogdanm	0:9b334a45a8ff	1810	}
bogdanm	0:9b334a45a8ff	1811	else
bogdanm	0:9b334a45a8ff	1812	{
bogdanm	0:9b334a45a8ff	1813	/Set the Double buffer counter/
bogdanm	0:9b334a45a8ff	1814	PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len);
bogdanm	0:9b334a45a8ff	1815	}
bogdanm	0:9b334a45a8ff	1816
bogdanm	0:9b334a45a8ff	1817	PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
bogdanm	0:9b334a45a8ff	1818	}
bogdanm	0:9b334a45a8ff	1819
bogdanm	0:9b334a45a8ff	1820	return HAL_OK;
bogdanm	0:9b334a45a8ff	1821	}
bogdanm	0:9b334a45a8ff	1822
bogdanm	0:9b334a45a8ff	1823	/**
bogdanm	0:9b334a45a8ff	1824	* @brief USB_WritePacket : Writes a packet into the Tx FIFO associated
bogdanm	0:9b334a45a8ff	1825	* with the EP/channel
bogdanm	0:9b334a45a8ff	1826	* @param USBx : Selected device
bogdanm	0:9b334a45a8ff	1827	* @param src : pointer to source buffer
bogdanm	0:9b334a45a8ff	1828	* @param ch_ep_num : endpoint or host channel number
bogdanm	0:9b334a45a8ff	1829	* @param len : Number of bytes to write
bogdanm	0:9b334a45a8ff	1830	* @retval HAL status
bogdanm	0:9b334a45a8ff	1831	*/
bogdanm	0:9b334a45a8ff	1832	HAL_StatusTypeDef USB_WritePacket(USB_TypeDef USBx, uint8_t src, uint8_t ch_ep_num, uint16_t len)
bogdanm	0:9b334a45a8ff	1833	{
bogdanm	0:9b334a45a8ff	1834	/* NOTE : - This function is not required by USB Device FS peripheral, it is used
bogdanm	0:9b334a45a8ff	1835	only by USB OTG FS peripheral.
bogdanm	0:9b334a45a8ff	1836	- This function is added to ensure compatibility across platforms.
bogdanm	0:9b334a45a8ff	1837	*/
bogdanm	0:9b334a45a8ff	1838	return HAL_OK;
bogdanm	0:9b334a45a8ff	1839	}
bogdanm	0:9b334a45a8ff	1840
bogdanm	0:9b334a45a8ff	1841	/**
bogdanm	0:9b334a45a8ff	1842	* @brief USB_ReadPacket : read a packet from the Tx FIFO associated
bogdanm	0:9b334a45a8ff	1843	* with the EP/channel
bogdanm	0:9b334a45a8ff	1844	* @param USBx : Selected device
bogdanm	0:9b334a45a8ff	1845	* @param dest : destination pointer
bogdanm	0:9b334a45a8ff	1846	* @param len : Number of bytes to read
bogdanm	0:9b334a45a8ff	1847	* @retval pointer to destination buffer
bogdanm	0:9b334a45a8ff	1848	*/
bogdanm	0:9b334a45a8ff	1849	void USB_ReadPacket(USB_TypeDef USBx, uint8_t *dest, uint16_t len)
bogdanm	0:9b334a45a8ff	1850	{
bogdanm	0:9b334a45a8ff	1851	/* NOTE : - This function is not required by USB Device FS peripheral, it is used
bogdanm	0:9b334a45a8ff	1852	only by USB OTG FS peripheral.
bogdanm	0:9b334a45a8ff	1853	- This function is added to ensure compatibility across platforms.
bogdanm	0:9b334a45a8ff	1854	*/
bogdanm	0:9b334a45a8ff	1855	return ((void *)NULL);
bogdanm	0:9b334a45a8ff	1856	}
bogdanm	0:9b334a45a8ff	1857
bogdanm	0:9b334a45a8ff	1858	/**
bogdanm	0:9b334a45a8ff	1859	* @brief USB_EPSetStall : set a stall condition over an EP
bogdanm	0:9b334a45a8ff	1860	* @param USBx : Selected device
bogdanm	0:9b334a45a8ff	1861	* @param ep: pointer to endpoint structure
bogdanm	0:9b334a45a8ff	1862	* @retval HAL status
bogdanm	0:9b334a45a8ff	1863	*/
bogdanm	0:9b334a45a8ff	1864	HAL_StatusTypeDef USB_EPSetStall(USB_TypeDef USBx , USB_EPTypeDef ep)
bogdanm	0:9b334a45a8ff	1865	{
bogdanm	0:9b334a45a8ff	1866	if (ep->num == 0)
bogdanm	0:9b334a45a8ff	1867	{
bogdanm	0:9b334a45a8ff	1868	/* This macro sets STALL status for RX & TX*/
bogdanm	0:9b334a45a8ff	1869	PCD_SET_EP_TXRX_STATUS(USBx, ep->num, USB_EP_RX_STALL, USB_EP_TX_STALL);
bogdanm	0:9b334a45a8ff	1870	}
bogdanm	0:9b334a45a8ff	1871	else
bogdanm	0:9b334a45a8ff	1872	{
bogdanm	0:9b334a45a8ff	1873	if (ep->is_in)
bogdanm	0:9b334a45a8ff	1874	{
bogdanm	0:9b334a45a8ff	1875	PCD_SET_EP_TX_STATUS(USBx, ep->num , USB_EP_TX_STALL);
bogdanm	0:9b334a45a8ff	1876	}
bogdanm	0:9b334a45a8ff	1877	else
bogdanm	0:9b334a45a8ff	1878	{
bogdanm	0:9b334a45a8ff	1879	PCD_SET_EP_RX_STATUS(USBx, ep->num , USB_EP_RX_STALL);
bogdanm	0:9b334a45a8ff	1880	}
bogdanm	0:9b334a45a8ff	1881	}
bogdanm	0:9b334a45a8ff	1882	return HAL_OK;
bogdanm	0:9b334a45a8ff	1883	}
bogdanm	0:9b334a45a8ff	1884
bogdanm	0:9b334a45a8ff	1885	/**
bogdanm	0:9b334a45a8ff	1886	* @brief USB_EPClearStall : Clear a stall condition over an EP
bogdanm	0:9b334a45a8ff	1887	* @param USBx : Selected device
bogdanm	0:9b334a45a8ff	1888	* @param ep: pointer to endpoint structure
bogdanm	0:9b334a45a8ff	1889	* @retval HAL status
bogdanm	0:9b334a45a8ff	1890	*/
bogdanm	0:9b334a45a8ff	1891	HAL_StatusTypeDef USB_EPClearStall(USB_TypeDef USBx, USB_EPTypeDef ep)
bogdanm	0:9b334a45a8ff	1892	{
bogdanm	0:9b334a45a8ff	1893	if (ep->is_in)
bogdanm	0:9b334a45a8ff	1894	{
bogdanm	0:9b334a45a8ff	1895	PCD_CLEAR_TX_DTOG(USBx, ep->num);
bogdanm	0:9b334a45a8ff	1896	PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_VALID);
bogdanm	0:9b334a45a8ff	1897	}
bogdanm	0:9b334a45a8ff	1898	else
bogdanm	0:9b334a45a8ff	1899	{
bogdanm	0:9b334a45a8ff	1900	PCD_CLEAR_RX_DTOG(USBx, ep->num);
bogdanm	0:9b334a45a8ff	1901	PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
bogdanm	0:9b334a45a8ff	1902	}
bogdanm	0:9b334a45a8ff	1903	return HAL_OK;
bogdanm	0:9b334a45a8ff	1904	}
bogdanm	0:9b334a45a8ff	1905
bogdanm	0:9b334a45a8ff	1906	/**
bogdanm	0:9b334a45a8ff	1907	* @brief USB_StopDevice : Stop the usb device mode
bogdanm	0:9b334a45a8ff	1908	* @param USBx : Selected device
bogdanm	0:9b334a45a8ff	1909	* @retval HAL status
bogdanm	0:9b334a45a8ff	1910	*/
bogdanm	0:9b334a45a8ff	1911	HAL_StatusTypeDef USB_StopDevice(USB_TypeDef *USBx)
bogdanm	0:9b334a45a8ff	1912	{
bogdanm	0:9b334a45a8ff	1913	/* disable all interrupts and force USB reset */
bogdanm	0:9b334a45a8ff	1914	USBx->CNTR = USB_CNTR_FRES;
bogdanm	0:9b334a45a8ff	1915
bogdanm	0:9b334a45a8ff	1916	/* clear interrupt status register */
bogdanm	0:9b334a45a8ff	1917	USBx->ISTR = 0;
bogdanm	0:9b334a45a8ff	1918
bogdanm	0:9b334a45a8ff	1919	/* switch-off device */
bogdanm	0:9b334a45a8ff	1920	USBx->CNTR = (USB_CNTR_FRES \| USB_CNTR_PDWN);
bogdanm	0:9b334a45a8ff	1921
bogdanm	0:9b334a45a8ff	1922	return HAL_OK;
bogdanm	0:9b334a45a8ff	1923	}
bogdanm	0:9b334a45a8ff	1924
bogdanm	0:9b334a45a8ff	1925	/**
bogdanm	0:9b334a45a8ff	1926	* @brief USB_SetDevAddress : Stop the usb device mode
bogdanm	0:9b334a45a8ff	1927	* @param USBx : Selected device
bogdanm	0:9b334a45a8ff	1928	* @param address : new device address to be assigned
bogdanm	0:9b334a45a8ff	1929	* This parameter can be a value from 0 to 255
bogdanm	0:9b334a45a8ff	1930	* @retval HAL status
bogdanm	0:9b334a45a8ff	1931	*/
bogdanm	0:9b334a45a8ff	1932	HAL_StatusTypeDef USB_SetDevAddress (USB_TypeDef *USBx, uint8_t address)
bogdanm	0:9b334a45a8ff	1933	{
bogdanm	0:9b334a45a8ff	1934	if(address == 0)
bogdanm	0:9b334a45a8ff	1935	{
bogdanm	0:9b334a45a8ff	1936	/* set device address and enable function */
bogdanm	0:9b334a45a8ff	1937	USBx->DADDR = USB_DADDR_EF;
bogdanm	0:9b334a45a8ff	1938	}
bogdanm	0:9b334a45a8ff	1939
bogdanm	0:9b334a45a8ff	1940	return HAL_OK;
bogdanm	0:9b334a45a8ff	1941	}
bogdanm	0:9b334a45a8ff	1942
bogdanm	0:9b334a45a8ff	1943	/**
bogdanm	0:9b334a45a8ff	1944	* @brief USB_DevConnect : Connect the USB device by enabling the pull-up/pull-down
bogdanm	0:9b334a45a8ff	1945	* @param USBx : Selected device
bogdanm	0:9b334a45a8ff	1946	* @retval HAL status
bogdanm	0:9b334a45a8ff	1947	*/
bogdanm	0:9b334a45a8ff	1948	HAL_StatusTypeDef USB_DevConnect (USB_TypeDef *USBx)
bogdanm	0:9b334a45a8ff	1949	{
bogdanm	0:9b334a45a8ff	1950	/* NOTE : - This function is not required by USB Device FS peripheral, it is used
bogdanm	0:9b334a45a8ff	1951	only by USB OTG FS peripheral.
bogdanm	0:9b334a45a8ff	1952	- This function is added to ensure compatibility across platforms.
bogdanm	0:9b334a45a8ff	1953	*/
bogdanm	0:9b334a45a8ff	1954	return HAL_OK;
bogdanm	0:9b334a45a8ff	1955	}
bogdanm	0:9b334a45a8ff	1956
bogdanm	0:9b334a45a8ff	1957	/**
bogdanm	0:9b334a45a8ff	1958	* @brief USB_DevDisconnect : Disconnect the USB device by disabling the pull-up/pull-down
bogdanm	0:9b334a45a8ff	1959	* @param USBx : Selected device
bogdanm	0:9b334a45a8ff	1960	* @retval HAL status
bogdanm	0:9b334a45a8ff	1961	*/
bogdanm	0:9b334a45a8ff	1962	HAL_StatusTypeDef USB_DevDisconnect (USB_TypeDef *USBx)
bogdanm	0:9b334a45a8ff	1963	{
bogdanm	0:9b334a45a8ff	1964	/* NOTE : - This function is not required by USB Device FS peripheral, it is used
bogdanm	0:9b334a45a8ff	1965	only by USB OTG FS peripheral.
bogdanm	0:9b334a45a8ff	1966	- This function is added to ensure compatibility across platforms.
bogdanm	0:9b334a45a8ff	1967	*/
bogdanm	0:9b334a45a8ff	1968	return HAL_OK;
bogdanm	0:9b334a45a8ff	1969	}
bogdanm	0:9b334a45a8ff	1970
bogdanm	0:9b334a45a8ff	1971	/**
bogdanm	0:9b334a45a8ff	1972	* @brief USB_ReadInterrupts: return the global USB interrupt status
bogdanm	0:9b334a45a8ff	1973	* @param USBx : Selected device
bogdanm	0:9b334a45a8ff	1974	* @retval HAL status
bogdanm	0:9b334a45a8ff	1975	*/
bogdanm	0:9b334a45a8ff	1976	uint32_t USB_ReadInterrupts (USB_TypeDef *USBx)
bogdanm	0:9b334a45a8ff	1977	{
bogdanm	0:9b334a45a8ff	1978	uint32_t tmpreg = 0;
bogdanm	0:9b334a45a8ff	1979
bogdanm	0:9b334a45a8ff	1980	tmpreg = USBx->ISTR;
bogdanm	0:9b334a45a8ff	1981	return tmpreg;
bogdanm	0:9b334a45a8ff	1982	}
bogdanm	0:9b334a45a8ff	1983
bogdanm	0:9b334a45a8ff	1984	/**
bogdanm	0:9b334a45a8ff	1985	* @brief USB_ReadDevAllOutEpInterrupt: return the USB device OUT endpoints interrupt status
bogdanm	0:9b334a45a8ff	1986	* @param USBx : Selected device
bogdanm	0:9b334a45a8ff	1987	* @retval HAL status
bogdanm	0:9b334a45a8ff	1988	*/
bogdanm	0:9b334a45a8ff	1989	uint32_t USB_ReadDevAllOutEpInterrupt (USB_TypeDef *USBx)
bogdanm	0:9b334a45a8ff	1990	{
bogdanm	0:9b334a45a8ff	1991	/* NOTE : - This function is not required by USB Device FS peripheral, it is used
bogdanm	0:9b334a45a8ff	1992	only by USB OTG FS peripheral.
bogdanm	0:9b334a45a8ff	1993	- This function is added to ensure compatibility across platforms.
bogdanm	0:9b334a45a8ff	1994	*/
bogdanm	0:9b334a45a8ff	1995	return (0);
bogdanm	0:9b334a45a8ff	1996	}
bogdanm	0:9b334a45a8ff	1997
bogdanm	0:9b334a45a8ff	1998	/**
bogdanm	0:9b334a45a8ff	1999	* @brief USB_ReadDevAllInEpInterrupt: return the USB device IN endpoints interrupt status
bogdanm	0:9b334a45a8ff	2000	* @param USBx : Selected device
bogdanm	0:9b334a45a8ff	2001	* @retval HAL status
bogdanm	0:9b334a45a8ff	2002	*/
bogdanm	0:9b334a45a8ff	2003	uint32_t USB_ReadDevAllInEpInterrupt (USB_TypeDef *USBx)
bogdanm	0:9b334a45a8ff	2004	{
bogdanm	0:9b334a45a8ff	2005	/* NOTE : - This function is not required by USB Device FS peripheral, it is used
bogdanm	0:9b334a45a8ff	2006	only by USB OTG FS peripheral.
bogdanm	0:9b334a45a8ff	2007	- This function is added to ensure compatibility across platforms.
bogdanm	0:9b334a45a8ff	2008	*/
bogdanm	0:9b334a45a8ff	2009	return (0);
bogdanm	0:9b334a45a8ff	2010	}
bogdanm	0:9b334a45a8ff	2011
bogdanm	0:9b334a45a8ff	2012	/**
bogdanm	0:9b334a45a8ff	2013	* @brief Returns Device OUT EP Interrupt register
bogdanm	0:9b334a45a8ff	2014	* @param USBx : Selected device
bogdanm	0:9b334a45a8ff	2015	* @param epnum : endpoint number
bogdanm	0:9b334a45a8ff	2016	* This parameter can be a value from 0 to 15
bogdanm	0:9b334a45a8ff	2017	* @retval Device OUT EP Interrupt register
bogdanm	0:9b334a45a8ff	2018	*/
bogdanm	0:9b334a45a8ff	2019	uint32_t USB_ReadDevOutEPInterrupt (USB_TypeDef *USBx , uint8_t epnum)
bogdanm	0:9b334a45a8ff	2020	{
bogdanm	0:9b334a45a8ff	2021	/* NOTE : - This function is not required by USB Device FS peripheral, it is used
bogdanm	0:9b334a45a8ff	2022	only by USB OTG FS peripheral.
bogdanm	0:9b334a45a8ff	2023	- This function is added to ensure compatibility across platforms.
bogdanm	0:9b334a45a8ff	2024	*/
bogdanm	0:9b334a45a8ff	2025	return (0);
bogdanm	0:9b334a45a8ff	2026	}
bogdanm	0:9b334a45a8ff	2027
bogdanm	0:9b334a45a8ff	2028	/**
bogdanm	0:9b334a45a8ff	2029	* @brief Returns Device IN EP Interrupt register
bogdanm	0:9b334a45a8ff	2030	* @param USBx : Selected device
bogdanm	0:9b334a45a8ff	2031	* @param epnum : endpoint number
bogdanm	0:9b334a45a8ff	2032	* This parameter can be a value from 0 to 15
bogdanm	0:9b334a45a8ff	2033	* @retval Device IN EP Interrupt register
bogdanm	0:9b334a45a8ff	2034	*/
bogdanm	0:9b334a45a8ff	2035	uint32_t USB_ReadDevInEPInterrupt (USB_TypeDef *USBx , uint8_t epnum)
bogdanm	0:9b334a45a8ff	2036	{
bogdanm	0:9b334a45a8ff	2037	/* NOTE : - This function is not required by USB Device FS peripheral, it is used
bogdanm	0:9b334a45a8ff	2038	only by USB OTG FS peripheral.
bogdanm	0:9b334a45a8ff	2039	- This function is added to ensure compatibility across platforms.
bogdanm	0:9b334a45a8ff	2040	*/
bogdanm	0:9b334a45a8ff	2041	return (0);
bogdanm	0:9b334a45a8ff	2042	}
bogdanm	0:9b334a45a8ff	2043
bogdanm	0:9b334a45a8ff	2044	/**
bogdanm	0:9b334a45a8ff	2045	* @brief USB_ClearInterrupts: clear a USB interrupt
bogdanm	0:9b334a45a8ff	2046	* @param USBx : Selected device
bogdanm	0:9b334a45a8ff	2047	* @param interrupt : interrupt flag
bogdanm	0:9b334a45a8ff	2048	* @retval None
bogdanm	0:9b334a45a8ff	2049	*/
bogdanm	0:9b334a45a8ff	2050	void USB_ClearInterrupts (USB_TypeDef *USBx, uint32_t interrupt)
bogdanm	0:9b334a45a8ff	2051	{
bogdanm	0:9b334a45a8ff	2052	/* NOTE : - This function is not required by USB Device FS peripheral, it is used
bogdanm	0:9b334a45a8ff	2053	only by USB OTG FS peripheral.
bogdanm	0:9b334a45a8ff	2054	- This function is added to ensure compatibility across platforms.
bogdanm	0:9b334a45a8ff	2055	*/
bogdanm	0:9b334a45a8ff	2056	}
bogdanm	0:9b334a45a8ff	2057
bogdanm	0:9b334a45a8ff	2058	/**
bogdanm	0:9b334a45a8ff	2059	* @brief Prepare the EP0 to start the first control setup
bogdanm	0:9b334a45a8ff	2060	* @param USBx : Selected device
bogdanm	0:9b334a45a8ff	2061	* @param psetup : pointer to setup packet
bogdanm	0:9b334a45a8ff	2062	* @retval HAL status
bogdanm	0:9b334a45a8ff	2063	*/
bogdanm	0:9b334a45a8ff	2064	HAL_StatusTypeDef USB_EP0_OutStart(USB_TypeDef USBx, uint8_t psetup)
bogdanm	0:9b334a45a8ff	2065	{
bogdanm	0:9b334a45a8ff	2066	/* NOTE : - This function is not required by USB Device FS peripheral, it is used
bogdanm	0:9b334a45a8ff	2067	only by USB OTG FS peripheral.
bogdanm	0:9b334a45a8ff	2068	- This function is added to ensure compatibility across platforms.
bogdanm	0:9b334a45a8ff	2069	*/
bogdanm	0:9b334a45a8ff	2070	return HAL_OK;
bogdanm	0:9b334a45a8ff	2071	}
bogdanm	0:9b334a45a8ff	2072
bogdanm	0:9b334a45a8ff	2073	/**
bogdanm	0:9b334a45a8ff	2074	* @brief USB_ActivateRemoteWakeup : active remote wakeup signalling
bogdanm	0:9b334a45a8ff	2075	* @param USBx : Selected device
bogdanm	0:9b334a45a8ff	2076	* @retval HAL status
bogdanm	0:9b334a45a8ff	2077	*/
bogdanm	0:9b334a45a8ff	2078	HAL_StatusTypeDef USB_ActivateRemoteWakeup(USB_TypeDef *USBx)
bogdanm	0:9b334a45a8ff	2079	{
bogdanm	0:9b334a45a8ff	2080	USBx->CNTR \|= USB_CNTR_RESUME;
bogdanm	0:9b334a45a8ff	2081
bogdanm	0:9b334a45a8ff	2082	return HAL_OK;
bogdanm	0:9b334a45a8ff	2083	}
bogdanm	0:9b334a45a8ff	2084
bogdanm	0:9b334a45a8ff	2085	/**
bogdanm	0:9b334a45a8ff	2086	* @brief USB_DeActivateRemoteWakeup : de-active remote wakeup signalling
bogdanm	0:9b334a45a8ff	2087	* @param USBx : Selected device
bogdanm	0:9b334a45a8ff	2088	* @retval HAL status
bogdanm	0:9b334a45a8ff	2089	*/
bogdanm	0:9b334a45a8ff	2090	HAL_StatusTypeDef USB_DeActivateRemoteWakeup(USB_TypeDef *USBx)
bogdanm	0:9b334a45a8ff	2091	{
bogdanm	0:9b334a45a8ff	2092	USBx->CNTR &= ~(USB_CNTR_RESUME);
bogdanm	0:9b334a45a8ff	2093	return HAL_OK;
bogdanm	0:9b334a45a8ff	2094	}
bogdanm	0:9b334a45a8ff	2095
bogdanm	0:9b334a45a8ff	2096	/**
bogdanm	0:9b334a45a8ff	2097	* @brief Copy a buffer from user memory area to packet memory area (PMA)
bogdanm	0:9b334a45a8ff	2098	* @param USBx : pointer to USB register.
bogdanm	0:9b334a45a8ff	2099	* @param pbUsrBuf : pointer to user memory area.
bogdanm	0:9b334a45a8ff	2100	* @param wPMABufAddr : address into PMA.
bogdanm	0:9b334a45a8ff	2101	* @param wNBytes : number of bytes to be copied.
bogdanm	0:9b334a45a8ff	2102	* @retval None
bogdanm	0:9b334a45a8ff	2103	*/
bogdanm	0:9b334a45a8ff	2104	void USB_WritePMA(USB_TypeDef USBx, uint8_t pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes)
bogdanm	0:9b334a45a8ff	2105	{
bogdanm	0:9b334a45a8ff	2106	uint32_t nbytes = (wNBytes + 1) >> 1; /* nbytes = (wNBytes + 1) / 2 */
bogdanm	0:9b334a45a8ff	2107	uint32_t index = 0, temp1 = 0, temp2 = 0;
bogdanm	0:9b334a45a8ff	2108	uint16_t *pdwVal = NULL;
bogdanm	0:9b334a45a8ff	2109
bogdanm	0:9b334a45a8ff	2110	pdwVal = (uint16_t )(wPMABufAddr 2 + (uint32_t)USBx + 0x400);
bogdanm	0:9b334a45a8ff	2111	for (index = nbytes; index != 0; index--)
bogdanm	0:9b334a45a8ff	2112	{
bogdanm	0:9b334a45a8ff	2113	temp1 = (uint16_t) * pbUsrBuf;
bogdanm	0:9b334a45a8ff	2114	pbUsrBuf++;
bogdanm	0:9b334a45a8ff	2115	temp2 = temp1 \| (uint16_t) * pbUsrBuf << 8;
bogdanm	0:9b334a45a8ff	2116	*pdwVal++ = temp2;
bogdanm	0:9b334a45a8ff	2117	pdwVal++;
bogdanm	0:9b334a45a8ff	2118	pbUsrBuf++;
bogdanm	0:9b334a45a8ff	2119	}
bogdanm	0:9b334a45a8ff	2120	}
bogdanm	0:9b334a45a8ff	2121
bogdanm	0:9b334a45a8ff	2122	/**
bogdanm	0:9b334a45a8ff	2123	* @brief Copy a buffer from user memory area to packet memory area (PMA)
bogdanm	0:9b334a45a8ff	2124	* @param USBx : pointer to USB register.
bogdanm	0:9b334a45a8ff	2125	* @param pbUsrBuf : pointer to user memory area.
bogdanm	0:9b334a45a8ff	2126	* @param wPMABufAddr : address into PMA.
bogdanm	0:9b334a45a8ff	2127	* @param wNBytes : number of bytes to be copied.
bogdanm	0:9b334a45a8ff	2128	* @retval None
bogdanm	0:9b334a45a8ff	2129	*/
bogdanm	0:9b334a45a8ff	2130	void USB_ReadPMA(USB_TypeDef USBx, uint8_t pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes)
bogdanm	0:9b334a45a8ff	2131	{
bogdanm	0:9b334a45a8ff	2132	uint32_t nbytes = (wNBytes + 1) >> 1;/* /2*/
bogdanm	0:9b334a45a8ff	2133	uint32_t index = 0;
bogdanm	0:9b334a45a8ff	2134	uint32_t *pdwVal = NULL;
bogdanm	0:9b334a45a8ff	2135
bogdanm	0:9b334a45a8ff	2136	pdwVal = (uint32_t )(wPMABufAddr 2 + (uint32_t)USBx + 0x400);
bogdanm	0:9b334a45a8ff	2137	for (index = nbytes; index != 0; index--)
bogdanm	0:9b334a45a8ff	2138	{
bogdanm	0:9b334a45a8ff	2139	(uint16_t)pbUsrBuf++ = *pdwVal++;
bogdanm	0:9b334a45a8ff	2140	pbUsrBuf++;
bogdanm	0:9b334a45a8ff	2141	}
bogdanm	0:9b334a45a8ff	2142	}
bogdanm	0:9b334a45a8ff	2143
bogdanm	0:9b334a45a8ff	2144	#endif /* USB */
bogdanm	0:9b334a45a8ff	2145
bogdanm	0:9b334a45a8ff	2146	/**
bogdanm	0:9b334a45a8ff	2147	* @}
bogdanm	0:9b334a45a8ff	2148	*/
bogdanm	0:9b334a45a8ff	2149	/**
bogdanm	0:9b334a45a8ff	2150	* @}
bogdanm	0:9b334a45a8ff	2151	*/
bogdanm	0:9b334a45a8ff	2152
bogdanm	0:9b334a45a8ff	2153	#if defined (USB_OTG_FS)
bogdanm	0:9b334a45a8ff	2154	/** @addtogroup USB_LL_Private_Functions
bogdanm	0:9b334a45a8ff	2155	* @{
bogdanm	0:9b334a45a8ff	2156	*/
bogdanm	0:9b334a45a8ff	2157	/**
bogdanm	0:9b334a45a8ff	2158	* @brief Reset the USB Core (needed after USB clock settings change)
bogdanm	0:9b334a45a8ff	2159	* @param USBx : Selected device
bogdanm	0:9b334a45a8ff	2160	* @retval HAL status
bogdanm	0:9b334a45a8ff	2161	*/
bogdanm	0:9b334a45a8ff	2162	static HAL_StatusTypeDef USB_CoreReset(USB_OTG_GlobalTypeDef *USBx)
bogdanm	0:9b334a45a8ff	2163	{
bogdanm	0:9b334a45a8ff	2164	uint32_t count = 0;
bogdanm	0:9b334a45a8ff	2165
bogdanm	0:9b334a45a8ff	2166	/* Wait for AHB master IDLE state. */
bogdanm	0:9b334a45a8ff	2167	do
bogdanm	0:9b334a45a8ff	2168	{
bogdanm	0:9b334a45a8ff	2169	if (++count > 200000)
bogdanm	0:9b334a45a8ff	2170	{
bogdanm	0:9b334a45a8ff	2171	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	2172	}
bogdanm	0:9b334a45a8ff	2173	}
bogdanm	0:9b334a45a8ff	2174	while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_AHBIDL) == 0);
bogdanm	0:9b334a45a8ff	2175
bogdanm	0:9b334a45a8ff	2176	/* Core Soft Reset */
bogdanm	0:9b334a45a8ff	2177	count = 0;
bogdanm	0:9b334a45a8ff	2178	USBx->GRSTCTL \|= USB_OTG_GRSTCTL_CSRST;
bogdanm	0:9b334a45a8ff	2179
bogdanm	0:9b334a45a8ff	2180	do
bogdanm	0:9b334a45a8ff	2181	{
bogdanm	0:9b334a45a8ff	2182	if (++count > 200000)
bogdanm	0:9b334a45a8ff	2183	{
bogdanm	0:9b334a45a8ff	2184	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	2185	}
bogdanm	0:9b334a45a8ff	2186	}
bogdanm	0:9b334a45a8ff	2187	while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_CSRST) == USB_OTG_GRSTCTL_CSRST);
bogdanm	0:9b334a45a8ff	2188
bogdanm	0:9b334a45a8ff	2189	return HAL_OK;
bogdanm	0:9b334a45a8ff	2190	}
bogdanm	0:9b334a45a8ff	2191	/**
bogdanm	0:9b334a45a8ff	2192	* @}
bogdanm	0:9b334a45a8ff	2193	*/
bogdanm	0:9b334a45a8ff	2194	#endif /* USB_OTG_FS */
bogdanm	0:9b334a45a8ff	2195
bogdanm	0:9b334a45a8ff	2196	#endif /* STM32F102x6 \|\| STM32F102xB \|\| */
bogdanm	0:9b334a45a8ff	2197	/* STM32F103x6 \|\| STM32F103xB \|\| */
bogdanm	0:9b334a45a8ff	2198	/* STM32F103xE \|\| STM32F103xG \|\| */
bogdanm	0:9b334a45a8ff	2199	/* STM32F105xC \|\| STM32F107xC */
bogdanm	0:9b334a45a8ff	2200
bogdanm	0:9b334a45a8ff	2201	#endif /* defined (HAL_PCD_MODULE_ENABLED) \|\| defined (HAL_HCD_MODULE_ENABLED) */
bogdanm	0:9b334a45a8ff	2202
bogdanm	0:9b334a45a8ff	2203	/**
bogdanm	0:9b334a45a8ff	2204	* @}
bogdanm	0:9b334a45a8ff	2205	*/
bogdanm	0:9b334a45a8ff	2206
bogdanm	0:9b334a45a8ff	2207	/**
bogdanm	0:9b334a45a8ff	2208	* @}
bogdanm	0:9b334a45a8ff	2209	*/
bogdanm	0:9b334a45a8ff	2210	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/

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Type:	Library
Created:	16 May 2016
Imports:	1
Forks:	0
Commits:	130
Dependents:	1
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targets/cmsis/TARGET_STM/TARGET_STM32F1/stm32f1xx_ll_usb.c@0:9b334a45a8ff, 2015-10-01 (annotated)

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