en 129 / mbed-dev

fix LPC812 PWM

Dependents:   IR_LED_Send

Fork of mbed-dev by mbed official

targets/cmsis/TARGET_STM/TARGET_STM32F1/stm32f1xx_ll_sdmmc.c@0:9b334a45a8ff, 2015-10-01 (annotated)

Committer:
bogdanm
Date:
Thu Oct 01 15:25:22 2015 +0300
Revision:
0:9b334a45a8ff
Child:
124:6a4a5b7d7324
Initial commit on mbed-dev



Replaces mbed-src (now inactive)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /**
bogdanm 0:9b334a45a8ff 2 ******************************************************************************
bogdanm 0:9b334a45a8ff 3 * @file stm32f1xx_ll_sdmmc.c
bogdanm 0:9b334a45a8ff 4 * @author MCD Application Team
bogdanm 0:9b334a45a8ff 5 * @version V1.0.0
bogdanm 0:9b334a45a8ff 6 * @date 15-December-2014
bogdanm 0:9b334a45a8ff 7 * @brief SDMMC Low Layer HAL module driver.
bogdanm 0:9b334a45a8ff 8 *
bogdanm 0:9b334a45a8ff 9 * This file provides firmware functions to manage the following
bogdanm 0:9b334a45a8ff 10 * functionalities of the SDMMC peripheral:
bogdanm 0:9b334a45a8ff 11 * + Initialization/de-initialization functions
bogdanm 0:9b334a45a8ff 12 * + I/O operation functions
bogdanm 0:9b334a45a8ff 13 * + Peripheral Control functions
bogdanm 0:9b334a45a8ff 14 * + Peripheral State functions
bogdanm 0:9b334a45a8ff 15 *
bogdanm 0:9b334a45a8ff 16 @verbatim
bogdanm 0:9b334a45a8ff 17 ==============================================================================
bogdanm 0:9b334a45a8ff 18 ##### SDMMC peripheral features #####
bogdanm 0:9b334a45a8ff 19 ==============================================================================
bogdanm 0:9b334a45a8ff 20 [..] The SD/SDIO MMC card host interface (SDIO) provides an interface between the APB2
bogdanm 0:9b334a45a8ff 21 peripheral bus and MultiMedia cards (MMCs), SD memory cards, SDIO cards and CE-ATA
bogdanm 0:9b334a45a8ff 22 devices.
bogdanm 0:9b334a45a8ff 23
bogdanm 0:9b334a45a8ff 24 [..] The SDIO features include the following:
bogdanm 0:9b334a45a8ff 25 (+) Full compliance with MultiMedia Card System Specification Version 4.2. Card support
bogdanm 0:9b334a45a8ff 26 for three different databus modes: 1-bit (default), 4-bit and 8-bit
bogdanm 0:9b334a45a8ff 27 (+) Full compatibility with previous versions of MultiMedia Cards (forward compatibility)
bogdanm 0:9b334a45a8ff 28 (+) Full compliance with SD Memory Card Specifications Version 2.0
bogdanm 0:9b334a45a8ff 29 (+) Full compliance with SD I/O Card Specification Version 2.0: card support for two
bogdanm 0:9b334a45a8ff 30 different data bus modes: 1-bit (default) and 4-bit
bogdanm 0:9b334a45a8ff 31 (+) Full support of the CE-ATA features (full compliance with CE-ATA digital protocol
bogdanm 0:9b334a45a8ff 32 Rev1.1)
bogdanm 0:9b334a45a8ff 33 (+) Data transfer up to 48 MHz for the 8 bit mode
bogdanm 0:9b334a45a8ff 34 (+) Data and command output enable signals to control external bidirectional drivers.
bogdanm 0:9b334a45a8ff 35
bogdanm 0:9b334a45a8ff 36
bogdanm 0:9b334a45a8ff 37 ##### How to use this driver #####
bogdanm 0:9b334a45a8ff 38 ==============================================================================
bogdanm 0:9b334a45a8ff 39 [..]
bogdanm 0:9b334a45a8ff 40 This driver is a considered as a driver of service for external devices drivers
bogdanm 0:9b334a45a8ff 41 that interfaces with the SDIO peripheral.
bogdanm 0:9b334a45a8ff 42 According to the device used (SD card/ MMC card / SDIO card ...), a set of APIs
bogdanm 0:9b334a45a8ff 43 is used in the device's driver to perform SDIO operations and functionalities.
bogdanm 0:9b334a45a8ff 44
bogdanm 0:9b334a45a8ff 45 This driver is almost transparent for the final user, it is only used to implement other
bogdanm 0:9b334a45a8ff 46 functionalities of the external device.
bogdanm 0:9b334a45a8ff 47
bogdanm 0:9b334a45a8ff 48 [..]
bogdanm 0:9b334a45a8ff 49 (+) The SDIO peripheral uses two clock signals:
bogdanm 0:9b334a45a8ff 50 (++) SDIO adapter clock (SDIOCLK = HCLK)
bogdanm 0:9b334a45a8ff 51 (++) AHB bus clock (HCLK/2)
bogdanm 0:9b334a45a8ff 52
bogdanm 0:9b334a45a8ff 53 -@@- PCLK2 and SDIO_CK clock frequencies must respect the following condition:
bogdanm 0:9b334a45a8ff 54 Frequency(PCLK2) >= (3 / 8 x Frequency(SDIO_CK))
bogdanm 0:9b334a45a8ff 55
bogdanm 0:9b334a45a8ff 56 (+) Enable/Disable peripheral clock using RCC peripheral macros related to SDIO
bogdanm 0:9b334a45a8ff 57 peripheral.
bogdanm 0:9b334a45a8ff 58
bogdanm 0:9b334a45a8ff 59 (+) Enable the Power ON State using the SDIO_PowerState_ON(SDIOx)
bogdanm 0:9b334a45a8ff 60 function and disable it using the function SDIO_PowerState_OFF(SDIOx).
bogdanm 0:9b334a45a8ff 61
bogdanm 0:9b334a45a8ff 62 (+) Enable/Disable the clock using the __SDIO_ENABLE()/__SDIO_DISABLE() macros.
bogdanm 0:9b334a45a8ff 63
bogdanm 0:9b334a45a8ff 64 (+) Enable/Disable the peripheral interrupts using the macros __SDIO_ENABLE_IT(hsdio, IT)
bogdanm 0:9b334a45a8ff 65 and __SDIO_DISABLE_IT(hsdio, IT) if you need to use interrupt mode.
bogdanm 0:9b334a45a8ff 66
bogdanm 0:9b334a45a8ff 67 (+) When using the DMA mode
bogdanm 0:9b334a45a8ff 68 (++) Configure the DMA in the MSP layer of the external device
bogdanm 0:9b334a45a8ff 69 (++) Active the needed channel Request
bogdanm 0:9b334a45a8ff 70 (++) Enable the DMA using __SDIO_DMA_ENABLE() macro or Disable it using the macro
bogdanm 0:9b334a45a8ff 71 __SDIO_DMA_DISABLE().
bogdanm 0:9b334a45a8ff 72
bogdanm 0:9b334a45a8ff 73 (+) To control the CPSM (Command Path State Machine) and send
bogdanm 0:9b334a45a8ff 74 commands to the card use the SDIO_SendCommand(),
bogdanm 0:9b334a45a8ff 75 SDIO_GetCommandResponse() and SDIO_GetResponse() functions. First, user has
bogdanm 0:9b334a45a8ff 76 to fill the command structure (pointer to SDIO_CmdInitTypeDef) according
bogdanm 0:9b334a45a8ff 77 to the selected command to be sent.
bogdanm 0:9b334a45a8ff 78 The parameters that should be filled are:
bogdanm 0:9b334a45a8ff 79 (++) Command Argument
bogdanm 0:9b334a45a8ff 80 (++) Command Index
bogdanm 0:9b334a45a8ff 81 (++) Command Response type
bogdanm 0:9b334a45a8ff 82 (++) Command Wait
bogdanm 0:9b334a45a8ff 83 (++) CPSM Status (Enable or Disable).
bogdanm 0:9b334a45a8ff 84
bogdanm 0:9b334a45a8ff 85 -@@- To check if the command is well received, read the SDIO_CMDRESP
bogdanm 0:9b334a45a8ff 86 register using the SDIO_GetCommandResponse().
bogdanm 0:9b334a45a8ff 87 The SDIO responses registers (SDIO_RESP1 to SDIO_RESP2), use the
bogdanm 0:9b334a45a8ff 88 SDIO_GetResponse() function.
bogdanm 0:9b334a45a8ff 89
bogdanm 0:9b334a45a8ff 90 (+) To control the DPSM (Data Path State Machine) and send/receive
bogdanm 0:9b334a45a8ff 91 data to/from the card use the SDIO_DataConfig(), SDIO_GetDataCounter(),
bogdanm 0:9b334a45a8ff 92 SDIO_ReadFIFO(), SDIO_WriteFIFO() and SDIO_GetFIFOCount() functions.
bogdanm 0:9b334a45a8ff 93
bogdanm 0:9b334a45a8ff 94 *** Read Operations ***
bogdanm 0:9b334a45a8ff 95 =======================
bogdanm 0:9b334a45a8ff 96 [..]
bogdanm 0:9b334a45a8ff 97 (#) First, user has to fill the data structure (pointer to
bogdanm 0:9b334a45a8ff 98 SDIO_DataInitTypeDef) according to the selected data type to be received.
bogdanm 0:9b334a45a8ff 99 The parameters that should be filled are:
bogdanm 0:9b334a45a8ff 100 (++) Data TimeOut
bogdanm 0:9b334a45a8ff 101 (++) Data Length
bogdanm 0:9b334a45a8ff 102 (++) Data Block size
bogdanm 0:9b334a45a8ff 103 (++) Data Transfer direction: should be from card (To SDIO)
bogdanm 0:9b334a45a8ff 104 (++) Data Transfer mode
bogdanm 0:9b334a45a8ff 105 (++) DPSM Status (Enable or Disable)
bogdanm 0:9b334a45a8ff 106
bogdanm 0:9b334a45a8ff 107 (#) Configure the SDIO resources to receive the data from the card
bogdanm 0:9b334a45a8ff 108 according to selected transfer mode.
bogdanm 0:9b334a45a8ff 109
bogdanm 0:9b334a45a8ff 110 (#) Send the selected Read command.
bogdanm 0:9b334a45a8ff 111
bogdanm 0:9b334a45a8ff 112 (#) Use the SDIO flags/interrupts to check the transfer status.
bogdanm 0:9b334a45a8ff 113
bogdanm 0:9b334a45a8ff 114 *** Write Operations ***
bogdanm 0:9b334a45a8ff 115 ========================
bogdanm 0:9b334a45a8ff 116 [..]
bogdanm 0:9b334a45a8ff 117 (#) First, user has to fill the data structure (pointer to
bogdanm 0:9b334a45a8ff 118 SDIO_DataInitTypeDef) according to the selected data type to be received.
bogdanm 0:9b334a45a8ff 119 The parameters that should be filled are:
bogdanm 0:9b334a45a8ff 120 (++) Data TimeOut
bogdanm 0:9b334a45a8ff 121 (++) Data Length
bogdanm 0:9b334a45a8ff 122 (++) Data Block size
bogdanm 0:9b334a45a8ff 123 (++) Data Transfer direction: should be to card (To CARD)
bogdanm 0:9b334a45a8ff 124 (++) Data Transfer mode
bogdanm 0:9b334a45a8ff 125 (++) DPSM Status (Enable or Disable)
bogdanm 0:9b334a45a8ff 126
bogdanm 0:9b334a45a8ff 127 (#) Configure the SDIO resources to send the data to the card according to
bogdanm 0:9b334a45a8ff 128 selected transfer mode.
bogdanm 0:9b334a45a8ff 129
bogdanm 0:9b334a45a8ff 130 (#) Send the selected Write command.
bogdanm 0:9b334a45a8ff 131
bogdanm 0:9b334a45a8ff 132 (#) Use the SDIO flags/interrupts to check the transfer status.
bogdanm 0:9b334a45a8ff 133
bogdanm 0:9b334a45a8ff 134 @endverbatim
bogdanm 0:9b334a45a8ff 135 ******************************************************************************
bogdanm 0:9b334a45a8ff 136 * @attention
bogdanm 0:9b334a45a8ff 137 *
bogdanm 0:9b334a45a8ff 138 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
bogdanm 0:9b334a45a8ff 139 *
bogdanm 0:9b334a45a8ff 140 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 0:9b334a45a8ff 141 * are permitted provided that the following conditions are met:
bogdanm 0:9b334a45a8ff 142 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 0:9b334a45a8ff 143 * this list of conditions and the following disclaimer.
bogdanm 0:9b334a45a8ff 144 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 0:9b334a45a8ff 145 * this list of conditions and the following disclaimer in the documentation
bogdanm 0:9b334a45a8ff 146 * and/or other materials provided with the distribution.
bogdanm 0:9b334a45a8ff 147 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 0:9b334a45a8ff 148 * may be used to endorse or promote products derived from this software
bogdanm 0:9b334a45a8ff 149 * without specific prior written permission.
bogdanm 0:9b334a45a8ff 150 *
bogdanm 0:9b334a45a8ff 151 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 0:9b334a45a8ff 152 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 0:9b334a45a8ff 153 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 0:9b334a45a8ff 154 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 0:9b334a45a8ff 155 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 0:9b334a45a8ff 156 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 0:9b334a45a8ff 157 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 0:9b334a45a8ff 158 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 0:9b334a45a8ff 159 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 0:9b334a45a8ff 160 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 0:9b334a45a8ff 161 *
bogdanm 0:9b334a45a8ff 162 ******************************************************************************
bogdanm 0:9b334a45a8ff 163 */
bogdanm 0:9b334a45a8ff 164
bogdanm 0:9b334a45a8ff 165 /* Includes ------------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 166 #include "stm32f1xx_hal.h"
bogdanm 0:9b334a45a8ff 167
bogdanm 0:9b334a45a8ff 168 #if defined (HAL_SD_MODULE_ENABLED) || defined(HAL_MMC_MODULE_ENABLED)
bogdanm 0:9b334a45a8ff 169
bogdanm 0:9b334a45a8ff 170 #if defined(STM32F103xE) || defined(STM32F103xG)
bogdanm 0:9b334a45a8ff 171
bogdanm 0:9b334a45a8ff 172 /** @addtogroup STM32F1xx_HAL_Driver
bogdanm 0:9b334a45a8ff 173 * @{
bogdanm 0:9b334a45a8ff 174 */
bogdanm 0:9b334a45a8ff 175
bogdanm 0:9b334a45a8ff 176 /** @defgroup SDMMC_LL SDMMC Low Layer
bogdanm 0:9b334a45a8ff 177 * @brief Low layer module for SD and MMC driver
bogdanm 0:9b334a45a8ff 178 * @{
bogdanm 0:9b334a45a8ff 179 */
bogdanm 0:9b334a45a8ff 180
bogdanm 0:9b334a45a8ff 181 /* Private typedef -----------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 182 /* Private define ------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 183 /* Private macro -------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 184 /* Private variables ---------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 185 /* Private function prototypes -----------------------------------------------*/
bogdanm 0:9b334a45a8ff 186 /* Private functions ---------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 187
bogdanm 0:9b334a45a8ff 188 /** @defgroup SDMMC_LL_Exported_Functions SDMMC_LL Exported Functions
bogdanm 0:9b334a45a8ff 189 * @{
bogdanm 0:9b334a45a8ff 190 */
bogdanm 0:9b334a45a8ff 191
bogdanm 0:9b334a45a8ff 192 /** @defgroup HAL_SDMMC_LL_Group1 Initialization and de-initialization functions
bogdanm 0:9b334a45a8ff 193 * @brief Initialization and Configuration functions
bogdanm 0:9b334a45a8ff 194 *
bogdanm 0:9b334a45a8ff 195 @verbatim
bogdanm 0:9b334a45a8ff 196 ===============================================================================
bogdanm 0:9b334a45a8ff 197 ##### Initialization/de-initialization functions #####
bogdanm 0:9b334a45a8ff 198 ===============================================================================
bogdanm 0:9b334a45a8ff 199 [..] This section provides functions allowing to:
bogdanm 0:9b334a45a8ff 200
bogdanm 0:9b334a45a8ff 201 @endverbatim
bogdanm 0:9b334a45a8ff 202 * @{
bogdanm 0:9b334a45a8ff 203 */
bogdanm 0:9b334a45a8ff 204
bogdanm 0:9b334a45a8ff 205 /**
bogdanm 0:9b334a45a8ff 206 * @brief Initializes the SDIO according to the specified
bogdanm 0:9b334a45a8ff 207 * parameters in the SDIO_InitTypeDef and create the associated handle.
bogdanm 0:9b334a45a8ff 208 * @param SDIOx: Pointer to SDIO register base
bogdanm 0:9b334a45a8ff 209 * @param Init: SDIO initialization structure
bogdanm 0:9b334a45a8ff 210 * @retval HAL status
bogdanm 0:9b334a45a8ff 211 */
bogdanm 0:9b334a45a8ff 212 HAL_StatusTypeDef SDIO_Init(SDIO_TypeDef *SDIOx, SDIO_InitTypeDef Init)
bogdanm 0:9b334a45a8ff 213 {
bogdanm 0:9b334a45a8ff 214 /* Check the parameters */
bogdanm 0:9b334a45a8ff 215 assert_param(IS_SDIO_ALL_INSTANCE(SDIOx));
bogdanm 0:9b334a45a8ff 216 assert_param(IS_SDIO_CLOCK_EDGE(Init.ClockEdge));
bogdanm 0:9b334a45a8ff 217 assert_param(IS_SDIO_CLOCK_BYPASS(Init.ClockBypass));
bogdanm 0:9b334a45a8ff 218 assert_param(IS_SDIO_CLOCK_POWER_SAVE(Init.ClockPowerSave));
bogdanm 0:9b334a45a8ff 219 assert_param(IS_SDIO_BUS_WIDE(Init.BusWide));
bogdanm 0:9b334a45a8ff 220 assert_param(IS_SDIO_HARDWARE_FLOW_CONTROL(Init.HardwareFlowControl));
bogdanm 0:9b334a45a8ff 221 assert_param(IS_SDIO_CLKDIV(Init.ClockDiv));
bogdanm 0:9b334a45a8ff 222
bogdanm 0:9b334a45a8ff 223 /* Set SDIO configuration parameters */
bogdanm 0:9b334a45a8ff 224 /* Write to SDIO CLKCR */
bogdanm 0:9b334a45a8ff 225 MODIFY_REG(SDIOx->CLKCR, CLKCR_CLEAR_MASK, Init.ClockEdge |\
bogdanm 0:9b334a45a8ff 226 Init.ClockBypass |\
bogdanm 0:9b334a45a8ff 227 Init.ClockPowerSave |\
bogdanm 0:9b334a45a8ff 228 Init.BusWide |\
bogdanm 0:9b334a45a8ff 229 Init.HardwareFlowControl |\
bogdanm 0:9b334a45a8ff 230 Init.ClockDiv);
bogdanm 0:9b334a45a8ff 231
bogdanm 0:9b334a45a8ff 232 return HAL_OK;
bogdanm 0:9b334a45a8ff 233 }
bogdanm 0:9b334a45a8ff 234
bogdanm 0:9b334a45a8ff 235 /**
bogdanm 0:9b334a45a8ff 236 * @}
bogdanm 0:9b334a45a8ff 237 */
bogdanm 0:9b334a45a8ff 238
bogdanm 0:9b334a45a8ff 239 /** @defgroup HAL_SDMMC_LL_Group2 IO operation functions
bogdanm 0:9b334a45a8ff 240 * @brief Data transfers functions
bogdanm 0:9b334a45a8ff 241 *
bogdanm 0:9b334a45a8ff 242 @verbatim
bogdanm 0:9b334a45a8ff 243 ===============================================================================
bogdanm 0:9b334a45a8ff 244 ##### IO operation functions #####
bogdanm 0:9b334a45a8ff 245 ===============================================================================
bogdanm 0:9b334a45a8ff 246 [..]
bogdanm 0:9b334a45a8ff 247 This subsection provides a set of functions allowing to manage the SDIO data
bogdanm 0:9b334a45a8ff 248 transfers.
bogdanm 0:9b334a45a8ff 249
bogdanm 0:9b334a45a8ff 250 @endverbatim
bogdanm 0:9b334a45a8ff 251 * @{
bogdanm 0:9b334a45a8ff 252 */
bogdanm 0:9b334a45a8ff 253
bogdanm 0:9b334a45a8ff 254 /**
bogdanm 0:9b334a45a8ff 255 * @brief Read data (word) from Rx FIFO in blocking mode (polling)
bogdanm 0:9b334a45a8ff 256 * @param SDIOx: Pointer to SDIO register base
bogdanm 0:9b334a45a8ff 257 * @retval HAL status
bogdanm 0:9b334a45a8ff 258 */
bogdanm 0:9b334a45a8ff 259 uint32_t SDIO_ReadFIFO(SDIO_TypeDef *SDIOx)
bogdanm 0:9b334a45a8ff 260 {
bogdanm 0:9b334a45a8ff 261 /* Read data from Rx FIFO */
bogdanm 0:9b334a45a8ff 262 return (SDIOx->FIFO);
bogdanm 0:9b334a45a8ff 263 }
bogdanm 0:9b334a45a8ff 264
bogdanm 0:9b334a45a8ff 265 /**
bogdanm 0:9b334a45a8ff 266 * @brief Write data (word) to Tx FIFO in blocking mode (polling)
bogdanm 0:9b334a45a8ff 267 * @param SDIOx: Pointer to SDIO register base
bogdanm 0:9b334a45a8ff 268 * @param pWriteData: pointer to data to write
bogdanm 0:9b334a45a8ff 269 * @retval HAL status
bogdanm 0:9b334a45a8ff 270 */
bogdanm 0:9b334a45a8ff 271 HAL_StatusTypeDef SDIO_WriteFIFO(SDIO_TypeDef *SDIOx, uint32_t *pWriteData)
bogdanm 0:9b334a45a8ff 272 {
bogdanm 0:9b334a45a8ff 273 /* Write data to FIFO */
bogdanm 0:9b334a45a8ff 274 SDIOx->FIFO = *pWriteData;
bogdanm 0:9b334a45a8ff 275
bogdanm 0:9b334a45a8ff 276 return HAL_OK;
bogdanm 0:9b334a45a8ff 277 }
bogdanm 0:9b334a45a8ff 278
bogdanm 0:9b334a45a8ff 279 /**
bogdanm 0:9b334a45a8ff 280 * @}
bogdanm 0:9b334a45a8ff 281 */
bogdanm 0:9b334a45a8ff 282
bogdanm 0:9b334a45a8ff 283 /** @defgroup HAL_SDMMC_LL_Group3 Peripheral Control functions
bogdanm 0:9b334a45a8ff 284 * @brief management functions
bogdanm 0:9b334a45a8ff 285 *
bogdanm 0:9b334a45a8ff 286 @verbatim
bogdanm 0:9b334a45a8ff 287 ===============================================================================
bogdanm 0:9b334a45a8ff 288 ##### Peripheral Control functions #####
bogdanm 0:9b334a45a8ff 289 ===============================================================================
bogdanm 0:9b334a45a8ff 290 [..]
bogdanm 0:9b334a45a8ff 291 This subsection provides a set of functions allowing to control the SDIO data
bogdanm 0:9b334a45a8ff 292 transfers.
bogdanm 0:9b334a45a8ff 293
bogdanm 0:9b334a45a8ff 294 @endverbatim
bogdanm 0:9b334a45a8ff 295 * @{
bogdanm 0:9b334a45a8ff 296 */
bogdanm 0:9b334a45a8ff 297
bogdanm 0:9b334a45a8ff 298 /**
bogdanm 0:9b334a45a8ff 299 * @brief Set SDIO Power state to ON.
bogdanm 0:9b334a45a8ff 300 * @param SDIOx: Pointer to SDIO register base
bogdanm 0:9b334a45a8ff 301 * @retval HAL status
bogdanm 0:9b334a45a8ff 302 */
bogdanm 0:9b334a45a8ff 303 HAL_StatusTypeDef SDIO_PowerState_ON(SDIO_TypeDef *SDIOx)
bogdanm 0:9b334a45a8ff 304 {
bogdanm 0:9b334a45a8ff 305 /* Set power state to ON */
bogdanm 0:9b334a45a8ff 306 SDIOx->POWER = SDIO_POWER_PWRCTRL;
bogdanm 0:9b334a45a8ff 307
bogdanm 0:9b334a45a8ff 308 return HAL_OK;
bogdanm 0:9b334a45a8ff 309 }
bogdanm 0:9b334a45a8ff 310
bogdanm 0:9b334a45a8ff 311 /**
bogdanm 0:9b334a45a8ff 312 * @brief Set SDIO Power state to OFF.
bogdanm 0:9b334a45a8ff 313 * @param SDIOx: Pointer to SDIO register base
bogdanm 0:9b334a45a8ff 314 * @retval HAL status
bogdanm 0:9b334a45a8ff 315 */
bogdanm 0:9b334a45a8ff 316 HAL_StatusTypeDef SDIO_PowerState_OFF(SDIO_TypeDef *SDIOx)
bogdanm 0:9b334a45a8ff 317 {
bogdanm 0:9b334a45a8ff 318 /* Set power state to OFF */
bogdanm 0:9b334a45a8ff 319 SDIOx->POWER = (uint32_t)0x00000000;
bogdanm 0:9b334a45a8ff 320
bogdanm 0:9b334a45a8ff 321 return HAL_OK;
bogdanm 0:9b334a45a8ff 322 }
bogdanm 0:9b334a45a8ff 323
bogdanm 0:9b334a45a8ff 324 /**
bogdanm 0:9b334a45a8ff 325 * @brief Get SDIO Power state.
bogdanm 0:9b334a45a8ff 326 * @param SDIOx: Pointer to SDIO register base
bogdanm 0:9b334a45a8ff 327 * @retval Power status of the controller. The returned value can be one of the
bogdanm 0:9b334a45a8ff 328 * following values:
bogdanm 0:9b334a45a8ff 329 * - 0x00: Power OFF
bogdanm 0:9b334a45a8ff 330 * - 0x02: Power UP
bogdanm 0:9b334a45a8ff 331 * - 0x03: Power ON
bogdanm 0:9b334a45a8ff 332 */
bogdanm 0:9b334a45a8ff 333 uint32_t SDIO_GetPowerState(SDIO_TypeDef *SDIOx)
bogdanm 0:9b334a45a8ff 334 {
bogdanm 0:9b334a45a8ff 335 return (SDIOx->POWER & SDIO_POWER_PWRCTRL);
bogdanm 0:9b334a45a8ff 336 }
bogdanm 0:9b334a45a8ff 337
bogdanm 0:9b334a45a8ff 338 /**
bogdanm 0:9b334a45a8ff 339 * @brief Configure the SDIO command path according to the specified parameters in
bogdanm 0:9b334a45a8ff 340 * SDIO_CmdInitTypeDef structure and send the command
bogdanm 0:9b334a45a8ff 341 * @param SDIOx: Pointer to SDIO register base
bogdanm 0:9b334a45a8ff 342 * @param Command: pointer to a SDIO_CmdInitTypeDef structure that contains
bogdanm 0:9b334a45a8ff 343 * the configuration information for the SDIO command
bogdanm 0:9b334a45a8ff 344 * @retval HAL status
bogdanm 0:9b334a45a8ff 345 */
bogdanm 0:9b334a45a8ff 346 HAL_StatusTypeDef SDIO_SendCommand(SDIO_TypeDef *SDIOx, SDIO_CmdInitTypeDef *Command)
bogdanm 0:9b334a45a8ff 347 {
bogdanm 0:9b334a45a8ff 348 /* Check the parameters */
bogdanm 0:9b334a45a8ff 349 assert_param(IS_SDIO_CMD_INDEX(Command->CmdIndex));
bogdanm 0:9b334a45a8ff 350 assert_param(IS_SDIO_RESPONSE(Command->Response));
bogdanm 0:9b334a45a8ff 351 assert_param(IS_SDIO_WAIT(Command->WaitForInterrupt));
bogdanm 0:9b334a45a8ff 352 assert_param(IS_SDIO_CPSM(Command->CPSM));
bogdanm 0:9b334a45a8ff 353
bogdanm 0:9b334a45a8ff 354 /* Set the SDIO Argument value */
bogdanm 0:9b334a45a8ff 355 SDIOx->ARG = Command->Argument;
bogdanm 0:9b334a45a8ff 356
bogdanm 0:9b334a45a8ff 357 /* Set SDIO command parameters */
bogdanm 0:9b334a45a8ff 358 /* Write to SDIO CMD register */
bogdanm 0:9b334a45a8ff 359 MODIFY_REG(SDIOx->CMD, CMD_CLEAR_MASK, Command->CmdIndex |\
bogdanm 0:9b334a45a8ff 360 Command->Response |\
bogdanm 0:9b334a45a8ff 361 Command->WaitForInterrupt |\
bogdanm 0:9b334a45a8ff 362 Command->CPSM);
bogdanm 0:9b334a45a8ff 363
bogdanm 0:9b334a45a8ff 364 return HAL_OK;
bogdanm 0:9b334a45a8ff 365 }
bogdanm 0:9b334a45a8ff 366
bogdanm 0:9b334a45a8ff 367 /**
bogdanm 0:9b334a45a8ff 368 * @brief Return the command index of last command for which response received
bogdanm 0:9b334a45a8ff 369 * @param SDIOx: Pointer to SDIO register base
bogdanm 0:9b334a45a8ff 370 * @retval Command index of the last command response received
bogdanm 0:9b334a45a8ff 371 */
bogdanm 0:9b334a45a8ff 372 uint8_t SDIO_GetCommandResponse(SDIO_TypeDef *SDIOx)
bogdanm 0:9b334a45a8ff 373 {
bogdanm 0:9b334a45a8ff 374 return (uint8_t)(SDIOx->RESPCMD);
bogdanm 0:9b334a45a8ff 375 }
bogdanm 0:9b334a45a8ff 376
bogdanm 0:9b334a45a8ff 377
bogdanm 0:9b334a45a8ff 378 /**
bogdanm 0:9b334a45a8ff 379 * @brief Return the response received from the card for the last command
bogdanm 0:9b334a45a8ff 380 * @param SDIO_RESP: Specifies the SDIO response register.
bogdanm 0:9b334a45a8ff 381 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 382 * @arg SDIO_RESP1: Response Register 1
bogdanm 0:9b334a45a8ff 383 * @arg SDIO_RESP2: Response Register 2
bogdanm 0:9b334a45a8ff 384 * @arg SDIO_RESP3: Response Register 3
bogdanm 0:9b334a45a8ff 385 * @arg SDIO_RESP4: Response Register 4
bogdanm 0:9b334a45a8ff 386 * @retval The Corresponding response register value
bogdanm 0:9b334a45a8ff 387 */
bogdanm 0:9b334a45a8ff 388 uint32_t SDIO_GetResponse(SDIO_TypeDef *SDIOx, uint32_t Response)
bogdanm 0:9b334a45a8ff 389 {
bogdanm 0:9b334a45a8ff 390 __IO uint32_t tmp = 0;
bogdanm 0:9b334a45a8ff 391
bogdanm 0:9b334a45a8ff 392 /* Check the parameters */
bogdanm 0:9b334a45a8ff 393 assert_param(IS_SDIO_RESP(Response));
bogdanm 0:9b334a45a8ff 394
bogdanm 0:9b334a45a8ff 395 /* Get the response */
bogdanm 0:9b334a45a8ff 396 tmp = SDIO_RESP_ADDR + Response;
bogdanm 0:9b334a45a8ff 397
bogdanm 0:9b334a45a8ff 398 return (*(__IO uint32_t *) tmp);
bogdanm 0:9b334a45a8ff 399 }
bogdanm 0:9b334a45a8ff 400
bogdanm 0:9b334a45a8ff 401 /**
bogdanm 0:9b334a45a8ff 402 * @brief Configure the SDIO data path according to the specified
bogdanm 0:9b334a45a8ff 403 * parameters in the SDIO_DataInitTypeDef.
bogdanm 0:9b334a45a8ff 404 * @param SDIOx: Pointer to SDIO register base
bogdanm 0:9b334a45a8ff 405 * @param Data : pointer to a SDIO_DataInitTypeDef structure
bogdanm 0:9b334a45a8ff 406 * that contains the configuration information for the SDIO data.
bogdanm 0:9b334a45a8ff 407 * @retval HAL status
bogdanm 0:9b334a45a8ff 408 */
bogdanm 0:9b334a45a8ff 409 HAL_StatusTypeDef SDIO_DataConfig(SDIO_TypeDef *SDIOx, SDIO_DataInitTypeDef* Data)
bogdanm 0:9b334a45a8ff 410 {
bogdanm 0:9b334a45a8ff 411 /* Check the parameters */
bogdanm 0:9b334a45a8ff 412 assert_param(IS_SDIO_DATA_LENGTH(Data->DataLength));
bogdanm 0:9b334a45a8ff 413 assert_param(IS_SDIO_BLOCK_SIZE(Data->DataBlockSize));
bogdanm 0:9b334a45a8ff 414 assert_param(IS_SDIO_TRANSFER_DIR(Data->TransferDir));
bogdanm 0:9b334a45a8ff 415 assert_param(IS_SDIO_TRANSFER_MODE(Data->TransferMode));
bogdanm 0:9b334a45a8ff 416 assert_param(IS_SDIO_DPSM(Data->DPSM));
bogdanm 0:9b334a45a8ff 417
bogdanm 0:9b334a45a8ff 418 /* Set the SDIO Data TimeOut value */
bogdanm 0:9b334a45a8ff 419 SDIOx->DTIMER = Data->DataTimeOut;
bogdanm 0:9b334a45a8ff 420
bogdanm 0:9b334a45a8ff 421 /* Set the SDIO DataLength value */
bogdanm 0:9b334a45a8ff 422 SDIOx->DLEN = Data->DataLength;
bogdanm 0:9b334a45a8ff 423
bogdanm 0:9b334a45a8ff 424 /* Set the SDIO data configuration parameters */
bogdanm 0:9b334a45a8ff 425 /* Write to SDIO DCTRL */
bogdanm 0:9b334a45a8ff 426 MODIFY_REG(SDIOx->DCTRL, DCTRL_CLEAR_MASK, Data->DataBlockSize |\
bogdanm 0:9b334a45a8ff 427 Data->TransferDir |\
bogdanm 0:9b334a45a8ff 428 Data->TransferMode |\
bogdanm 0:9b334a45a8ff 429 Data->DPSM);
bogdanm 0:9b334a45a8ff 430
bogdanm 0:9b334a45a8ff 431 return HAL_OK;
bogdanm 0:9b334a45a8ff 432
bogdanm 0:9b334a45a8ff 433 }
bogdanm 0:9b334a45a8ff 434
bogdanm 0:9b334a45a8ff 435 /**
bogdanm 0:9b334a45a8ff 436 * @brief Returns number of remaining data bytes to be transferred.
bogdanm 0:9b334a45a8ff 437 * @param SDIOx: Pointer to SDIO register base
bogdanm 0:9b334a45a8ff 438 * @retval Number of remaining data bytes to be transferred
bogdanm 0:9b334a45a8ff 439 */
bogdanm 0:9b334a45a8ff 440 uint32_t SDIO_GetDataCounter(SDIO_TypeDef *SDIOx)
bogdanm 0:9b334a45a8ff 441 {
bogdanm 0:9b334a45a8ff 442 return (SDIOx->DCOUNT);
bogdanm 0:9b334a45a8ff 443 }
bogdanm 0:9b334a45a8ff 444
bogdanm 0:9b334a45a8ff 445 /**
bogdanm 0:9b334a45a8ff 446 * @brief Get the FIFO data
bogdanm 0:9b334a45a8ff 447 * @param SDIOx: Pointer to SDIO register base
bogdanm 0:9b334a45a8ff 448 * @retval Data received
bogdanm 0:9b334a45a8ff 449 */
bogdanm 0:9b334a45a8ff 450 uint32_t SDIO_GetFIFOCount(SDIO_TypeDef *SDIOx)
bogdanm 0:9b334a45a8ff 451 {
bogdanm 0:9b334a45a8ff 452 return (SDIOx->FIFO);
bogdanm 0:9b334a45a8ff 453 }
bogdanm 0:9b334a45a8ff 454
bogdanm 0:9b334a45a8ff 455
bogdanm 0:9b334a45a8ff 456 /**
bogdanm 0:9b334a45a8ff 457 * @brief Sets one of the two options of inserting read wait interval.
bogdanm 0:9b334a45a8ff 458 * @param SDIO_ReadWaitMode: SD I/O Read Wait operation mode.
bogdanm 0:9b334a45a8ff 459 * This parameter can be:
bogdanm 0:9b334a45a8ff 460 * @arg SDIO_READ_WAIT_MODE_CLK: Read Wait control by stopping SDIOCLK
bogdanm 0:9b334a45a8ff 461 * @arg SDIO_READ_WAIT_MODE_DATA2: Read Wait control using SDIO_DATA2
bogdanm 0:9b334a45a8ff 462 * @retval None
bogdanm 0:9b334a45a8ff 463 */
bogdanm 0:9b334a45a8ff 464 HAL_StatusTypeDef SDIO_SetSDIOReadWaitMode(SDIO_TypeDef *SDIOx, uint32_t SDIO_ReadWaitMode)
bogdanm 0:9b334a45a8ff 465 {
bogdanm 0:9b334a45a8ff 466 /* Check the parameters */
bogdanm 0:9b334a45a8ff 467 assert_param(IS_SDIO_READWAIT_MODE(SDIO_ReadWaitMode));
bogdanm 0:9b334a45a8ff 468
bogdanm 0:9b334a45a8ff 469 /* Set SDIO read wait mode */
bogdanm 0:9b334a45a8ff 470 MODIFY_REG(SDIO->DCTRL, SDIO_DCTRL_RWMOD, SDIO_ReadWaitMode);
bogdanm 0:9b334a45a8ff 471
bogdanm 0:9b334a45a8ff 472 return HAL_OK;
bogdanm 0:9b334a45a8ff 473 }
bogdanm 0:9b334a45a8ff 474
bogdanm 0:9b334a45a8ff 475
bogdanm 0:9b334a45a8ff 476 /**
bogdanm 0:9b334a45a8ff 477 * @}
bogdanm 0:9b334a45a8ff 478 */
bogdanm 0:9b334a45a8ff 479
bogdanm 0:9b334a45a8ff 480 /**
bogdanm 0:9b334a45a8ff 481 * @}
bogdanm 0:9b334a45a8ff 482 */
bogdanm 0:9b334a45a8ff 483
bogdanm 0:9b334a45a8ff 484 #endif /* STM32F103xE || STM32F103xG */
bogdanm 0:9b334a45a8ff 485
bogdanm 0:9b334a45a8ff 486 #endif /* (HAL_SD_MODULE_ENABLED) || (HAL_MMC_MODULE_ENABLED) */
bogdanm 0:9b334a45a8ff 487
bogdanm 0:9b334a45a8ff 488 /**
bogdanm 0:9b334a45a8ff 489 * @}
bogdanm 0:9b334a45a8ff 490 */
bogdanm 0:9b334a45a8ff 491
bogdanm 0:9b334a45a8ff 492 /**
bogdanm 0:9b334a45a8ff 493 * @}
bogdanm 0:9b334a45a8ff 494 */
bogdanm 0:9b334a45a8ff 495
bogdanm 0:9b334a45a8ff 496 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/