mbed-dev - fix LPC812 PWM

Users » nameless129 » Code » mbed-dev

fix LPC812 PWM

targets/cmsis/TARGET_STM/TARGET_STM32F1/stm32f1xx_hal_uart.c@0:9b334a45a8ff, 2015-10-01 (annotated)

Committer:: bogdanm
Date:: Thu Oct 01 15:25:22 2015 +0300
Revision:: 0:9b334a45a8ff
Child:: 124:6a4a5b7d7324

Initial commit on mbed-dev



Replaces mbed-src (now inactive)

Who changed what in which revision?

User	Revision	Line number	New contents of line
bogdanm	0:9b334a45a8ff	1	/**
bogdanm	0:9b334a45a8ff	2	******************************************************************************
bogdanm	0:9b334a45a8ff	3	* @file stm32f1xx_hal_uart.c
bogdanm	0:9b334a45a8ff	4	* @author MCD Application Team
bogdanm	0:9b334a45a8ff	5	* @version V1.0.0
bogdanm	0:9b334a45a8ff	6	* @date 15-December-2014
bogdanm	0:9b334a45a8ff	7	* @brief UART HAL module driver.
bogdanm	0:9b334a45a8ff	8	* This file provides firmware functions to manage the following
bogdanm	0:9b334a45a8ff	9	* functionalities of the Universal Asynchronous Receiver Transmitter (UART) peripheral:
bogdanm	0:9b334a45a8ff	10	* + Initialization and de-initialization functions
bogdanm	0:9b334a45a8ff	11	* + IO operation functions
bogdanm	0:9b334a45a8ff	12	* + Peripheral Control functions
bogdanm	0:9b334a45a8ff	13	* + Peripheral State and Errors functions
bogdanm	0:9b334a45a8ff	14	@verbatim
bogdanm	0:9b334a45a8ff	15	==============================================================================
bogdanm	0:9b334a45a8ff	16	##### How to use this driver #####
bogdanm	0:9b334a45a8ff	17	==============================================================================
bogdanm	0:9b334a45a8ff	18	[..]
bogdanm	0:9b334a45a8ff	19	The UART HAL driver can be used as follows:
bogdanm	0:9b334a45a8ff	20
bogdanm	0:9b334a45a8ff	21	(#) Declare a UART_HandleTypeDef handle structure.
bogdanm	0:9b334a45a8ff	22
bogdanm	0:9b334a45a8ff	23	(#) Initialize the UART low level resources by implementing the HAL_UART_MspInit() API:
bogdanm	0:9b334a45a8ff	24	(##) Enable the USARTx interface clock.
bogdanm	0:9b334a45a8ff	25	(##) UART pins configuration:
bogdanm	0:9b334a45a8ff	26	(+++) Enable the clock for the UART GPIOs.
bogdanm	0:9b334a45a8ff	27	(+++) Configure the USART pins (TX as alternate function pull-up, RX as alternate function Input).
bogdanm	0:9b334a45a8ff	28	(##) NVIC configuration if you need to use interrupt process (HAL_UART_Transmit_IT()
bogdanm	0:9b334a45a8ff	29	and HAL_UART_Receive_IT() APIs):
bogdanm	0:9b334a45a8ff	30	(+++) Configure the USARTx interrupt priority.
bogdanm	0:9b334a45a8ff	31	(+++) Enable the NVIC USART IRQ handle.
bogdanm	0:9b334a45a8ff	32	(##) DMA Configuration if you need to use DMA process (HAL_UART_Transmit_DMA()
bogdanm	0:9b334a45a8ff	33	and HAL_UART_Receive_DMA() APIs):
bogdanm	0:9b334a45a8ff	34	(+++) Declare a DMA handle structure for the Tx/Rx channel.
bogdanm	0:9b334a45a8ff	35	(+++) Enable the DMAx interface clock.
bogdanm	0:9b334a45a8ff	36	(+++) Configure the declared DMA handle structure with the required
bogdanm	0:9b334a45a8ff	37	Tx/Rx parameters.
bogdanm	0:9b334a45a8ff	38	(+++) Configure the DMA Tx/Rx channel.
bogdanm	0:9b334a45a8ff	39	(+++) Associate the initialized DMA handle to the UART DMA Tx/Rx handle.
bogdanm	0:9b334a45a8ff	40	(+++) Configure the priority and enable the NVIC for the transfer complete
bogdanm	0:9b334a45a8ff	41	interrupt on the DMA Tx/Rx channel.
bogdanm	0:9b334a45a8ff	42	(+++) Configure the USARTx interrupt priority and enable the NVIC USART IRQ handle
bogdanm	0:9b334a45a8ff	43	(used for last byte sending completion detection in DMA non circular mode)
bogdanm	0:9b334a45a8ff	44
bogdanm	0:9b334a45a8ff	45	(#) Program the Baud Rate, Word Length, Stop Bit, Parity, Hardware
bogdanm	0:9b334a45a8ff	46	flow control and Mode(Receiver/Transmitter) in the huart Init structure.
bogdanm	0:9b334a45a8ff	47
bogdanm	0:9b334a45a8ff	48	(#) For the UART asynchronous mode, initialize the UART registers by calling
bogdanm	0:9b334a45a8ff	49	the HAL_UART_Init() API.
bogdanm	0:9b334a45a8ff	50
bogdanm	0:9b334a45a8ff	51	(#) For the UART Half duplex mode, initialize the UART registers by calling
bogdanm	0:9b334a45a8ff	52	the HAL_HalfDuplex_Init() API.
bogdanm	0:9b334a45a8ff	53
bogdanm	0:9b334a45a8ff	54	(#) For the LIN mode, initialize the UART registers by calling the HAL_LIN_Init() API.
bogdanm	0:9b334a45a8ff	55
bogdanm	0:9b334a45a8ff	56	(#) For the Multi-Processor mode, initialize the UART registers by calling
bogdanm	0:9b334a45a8ff	57	the HAL_MultiProcessor_Init() API.
bogdanm	0:9b334a45a8ff	58
bogdanm	0:9b334a45a8ff	59	[..]
bogdanm	0:9b334a45a8ff	60	(@) The specific UART interrupts (Transmission complete interrupt,
bogdanm	0:9b334a45a8ff	61	RXNE interrupt and Error Interrupts) will be managed using the macros
bogdanm	0:9b334a45a8ff	62	__HAL_UART_ENABLE_IT() and __HAL_UART_DISABLE_IT() inside the transmit
bogdanm	0:9b334a45a8ff	63	and receive process.
bogdanm	0:9b334a45a8ff	64
bogdanm	0:9b334a45a8ff	65	[..]
bogdanm	0:9b334a45a8ff	66	(@) These APIs (HAL_UART_Init() and HAL_HalfDuplex_Init()) configure also the
bogdanm	0:9b334a45a8ff	67	low level Hardware GPIO, CLOCK, CORTEX...etc) by calling the customed
bogdanm	0:9b334a45a8ff	68	HAL_UART_MspInit() API.
bogdanm	0:9b334a45a8ff	69
bogdanm	0:9b334a45a8ff	70	[..]
bogdanm	0:9b334a45a8ff	71	Three operation modes are available within this driver :
bogdanm	0:9b334a45a8ff	72
bogdanm	0:9b334a45a8ff	73	* Polling mode IO operation *
bogdanm	0:9b334a45a8ff	74	=================================
bogdanm	0:9b334a45a8ff	75	[..]
bogdanm	0:9b334a45a8ff	76	(+) Send an amount of data in blocking mode using HAL_UART_Transmit()
bogdanm	0:9b334a45a8ff	77	(+) Receive an amount of data in blocking mode using HAL_UART_Receive()
bogdanm	0:9b334a45a8ff	78
bogdanm	0:9b334a45a8ff	79	* Interrupt mode IO operation *
bogdanm	0:9b334a45a8ff	80	===================================
bogdanm	0:9b334a45a8ff	81	[..]
bogdanm	0:9b334a45a8ff	82	(+) Send an amount of data in non blocking mode using HAL_UART_Transmit_IT()
bogdanm	0:9b334a45a8ff	83	(+) At transmission end of transfer HAL_UART_TxCpltCallback is executed and user can
bogdanm	0:9b334a45a8ff	84	add his own code by customization of function pointer HAL_UART_TxCpltCallback
bogdanm	0:9b334a45a8ff	85	(+) Receive an amount of data in non blocking mode using HAL_UART_Receive_IT()
bogdanm	0:9b334a45a8ff	86	(+) At reception end of transfer HAL_UART_RxCpltCallback is executed and user can
bogdanm	0:9b334a45a8ff	87	add his own code by customization of function pointer HAL_UART_RxCpltCallback
bogdanm	0:9b334a45a8ff	88	(+) In case of transfer Error, HAL_UART_ErrorCallback() function is executed and user can
bogdanm	0:9b334a45a8ff	89	add his own code by customization of function pointer HAL_UART_ErrorCallback
bogdanm	0:9b334a45a8ff	90
bogdanm	0:9b334a45a8ff	91	* DMA mode IO operation *
bogdanm	0:9b334a45a8ff	92	==============================
bogdanm	0:9b334a45a8ff	93	[..]
bogdanm	0:9b334a45a8ff	94	(+) Send an amount of data in non blocking mode (DMA) using HAL_UART_Transmit_DMA()
bogdanm	0:9b334a45a8ff	95	(+) At transmission end of half transfer HAL_UART_TxHalfCpltCallback is executed and user can
bogdanm	0:9b334a45a8ff	96	add his own code by customization of function pointer HAL_UART_TxHalfCpltCallback
bogdanm	0:9b334a45a8ff	97	(+) At transmission end of transfer HAL_UART_TxCpltCallback is executed and user can
bogdanm	0:9b334a45a8ff	98	add his own code by customization of function pointer HAL_UART_TxCpltCallback
bogdanm	0:9b334a45a8ff	99	(+) Receive an amount of data in non blocking mode (DMA) using HAL_UART_Receive_DMA()
bogdanm	0:9b334a45a8ff	100	(+) At reception end of half transfer HAL_UART_RxHalfCpltCallback is executed and user can
bogdanm	0:9b334a45a8ff	101	add his own code by customization of function pointer HAL_UART_RxHalfCpltCallback
bogdanm	0:9b334a45a8ff	102	(+) At reception end of transfer HAL_UART_RxCpltCallback is executed and user can
bogdanm	0:9b334a45a8ff	103	add his own code by customization of function pointer HAL_UART_RxCpltCallback
bogdanm	0:9b334a45a8ff	104	(+) In case of transfer Error, HAL_UART_ErrorCallback() function is executed and user can
bogdanm	0:9b334a45a8ff	105	add his own code by customization of function pointer HAL_UART_ErrorCallback
bogdanm	0:9b334a45a8ff	106	(+) Pause the DMA Transfer using HAL_UART_DMAPause()
bogdanm	0:9b334a45a8ff	107	(+) Resume the DMA Transfer using HAL_UART_DMAResume()
bogdanm	0:9b334a45a8ff	108	(+) Stop the DMA Transfer using HAL_UART_DMAStop()
bogdanm	0:9b334a45a8ff	109
bogdanm	0:9b334a45a8ff	110	* UART HAL driver macros list *
bogdanm	0:9b334a45a8ff	111	=============================================
bogdanm	0:9b334a45a8ff	112	[..]
bogdanm	0:9b334a45a8ff	113	Below the list of most used macros in UART HAL driver.
bogdanm	0:9b334a45a8ff	114
bogdanm	0:9b334a45a8ff	115	(+) __HAL_UART_ENABLE: Enable the UART peripheral
bogdanm	0:9b334a45a8ff	116	(+) __HAL_UART_DISABLE: Disable the UART peripheral
bogdanm	0:9b334a45a8ff	117	(+) __HAL_UART_GET_FLAG : Check whether the specified UART flag is set or not
bogdanm	0:9b334a45a8ff	118	(+) __HAL_UART_CLEAR_FLAG : Clear the specified UART pending flag
bogdanm	0:9b334a45a8ff	119	(+) __HAL_UART_ENABLE_IT: Enable the specified UART interrupt
bogdanm	0:9b334a45a8ff	120	(+) __HAL_UART_DISABLE_IT: Disable the specified UART interrupt
bogdanm	0:9b334a45a8ff	121	(+) __HAL_UART_GET_IT_SOURCE: Check whether the specified UART interrupt has occurred or not
bogdanm	0:9b334a45a8ff	122
bogdanm	0:9b334a45a8ff	123	[..]
bogdanm	0:9b334a45a8ff	124	(@) You can refer to the UART HAL driver header file for more useful macros
bogdanm	0:9b334a45a8ff	125
bogdanm	0:9b334a45a8ff	126	@endverbatim
bogdanm	0:9b334a45a8ff	127	******************************************************************************
bogdanm	0:9b334a45a8ff	128	* @attention
bogdanm	0:9b334a45a8ff	129	*
bogdanm	0:9b334a45a8ff	130	* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
bogdanm	0:9b334a45a8ff	131	*
bogdanm	0:9b334a45a8ff	132	* Redistribution and use in source and binary forms, with or without modification,
bogdanm	0:9b334a45a8ff	133	* are permitted provided that the following conditions are met:
bogdanm	0:9b334a45a8ff	134	* 1. Redistributions of source code must retain the above copyright notice,
bogdanm	0:9b334a45a8ff	135	* this list of conditions and the following disclaimer.
bogdanm	0:9b334a45a8ff	136	* 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm	0:9b334a45a8ff	137	* this list of conditions and the following disclaimer in the documentation
bogdanm	0:9b334a45a8ff	138	* and/or other materials provided with the distribution.
bogdanm	0:9b334a45a8ff	139	* 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm	0:9b334a45a8ff	140	* may be used to endorse or promote products derived from this software
bogdanm	0:9b334a45a8ff	141	* without specific prior written permission.
bogdanm	0:9b334a45a8ff	142	*
bogdanm	0:9b334a45a8ff	143	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm	0:9b334a45a8ff	144	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm	0:9b334a45a8ff	145	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm	0:9b334a45a8ff	146	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm	0:9b334a45a8ff	147	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm	0:9b334a45a8ff	148	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm	0:9b334a45a8ff	149	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm	0:9b334a45a8ff	150	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm	0:9b334a45a8ff	151	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm	0:9b334a45a8ff	152	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm	0:9b334a45a8ff	153	*
bogdanm	0:9b334a45a8ff	154	******************************************************************************
bogdanm	0:9b334a45a8ff	155	*/
bogdanm	0:9b334a45a8ff	156
bogdanm	0:9b334a45a8ff	157	/* Includes ------------------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	158	#include "stm32f1xx_hal.h"
bogdanm	0:9b334a45a8ff	159
bogdanm	0:9b334a45a8ff	160	/** @addtogroup STM32F1xx_HAL_Driver
bogdanm	0:9b334a45a8ff	161	* @{
bogdanm	0:9b334a45a8ff	162	*/
bogdanm	0:9b334a45a8ff	163
bogdanm	0:9b334a45a8ff	164	/** @defgroup UART UART
bogdanm	0:9b334a45a8ff	165	* @brief HAL UART module driver
bogdanm	0:9b334a45a8ff	166	* @{
bogdanm	0:9b334a45a8ff	167	*/
bogdanm	0:9b334a45a8ff	168	#ifdef HAL_UART_MODULE_ENABLED
bogdanm	0:9b334a45a8ff	169
bogdanm	0:9b334a45a8ff	170	/* Private typedef -----------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	171	/* Private define ------------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	172	/* Private macros ------------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	173	/* Private variables ---------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	174	/* Private function prototypes -----------------------------------------------*/
bogdanm	0:9b334a45a8ff	175	/** @addtogroup UART_Private_Functions UART Private Functions
bogdanm	0:9b334a45a8ff	176	* @{
bogdanm	0:9b334a45a8ff	177	*/
bogdanm	0:9b334a45a8ff	178	static void UART_SetConfig (UART_HandleTypeDef *huart);
bogdanm	0:9b334a45a8ff	179	static HAL_StatusTypeDef UART_Transmit_IT(UART_HandleTypeDef *huart);
bogdanm	0:9b334a45a8ff	180	static HAL_StatusTypeDef UART_EndTransmit_IT(UART_HandleTypeDef *huart);
bogdanm	0:9b334a45a8ff	181	static HAL_StatusTypeDef UART_Receive_IT(UART_HandleTypeDef *huart);
bogdanm	0:9b334a45a8ff	182	static void UART_DMATransmitCplt(DMA_HandleTypeDef *hdma);
bogdanm	0:9b334a45a8ff	183	static void UART_DMATxHalfCplt(DMA_HandleTypeDef *hdma);
bogdanm	0:9b334a45a8ff	184	static void UART_DMAReceiveCplt(DMA_HandleTypeDef *hdma);
bogdanm	0:9b334a45a8ff	185	static void UART_DMARxHalfCplt(DMA_HandleTypeDef *hdma);
bogdanm	0:9b334a45a8ff	186	static void UART_DMAError(DMA_HandleTypeDef *hdma);
bogdanm	0:9b334a45a8ff	187	static HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Timeout);
bogdanm	0:9b334a45a8ff	188	/**
bogdanm	0:9b334a45a8ff	189	* @}
bogdanm	0:9b334a45a8ff	190	*/
bogdanm	0:9b334a45a8ff	191
bogdanm	0:9b334a45a8ff	192	/* Exported functions ---------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	193
bogdanm	0:9b334a45a8ff	194	/** @defgroup UART_Exported_Functions UART Exported Functions
bogdanm	0:9b334a45a8ff	195	* @{
bogdanm	0:9b334a45a8ff	196	*/
bogdanm	0:9b334a45a8ff	197
bogdanm	0:9b334a45a8ff	198	/** @defgroup UART_Exported_Functions_Group1 Initialization and de-initialization functions
bogdanm	0:9b334a45a8ff	199	* @brief Initialization and Configuration functions
bogdanm	0:9b334a45a8ff	200	*
bogdanm	0:9b334a45a8ff	201	@verbatim
bogdanm	0:9b334a45a8ff	202	===============================================================================
bogdanm	0:9b334a45a8ff	203	##### Initialization and Configuration functions #####
bogdanm	0:9b334a45a8ff	204	===============================================================================
bogdanm	0:9b334a45a8ff	205	[..]
bogdanm	0:9b334a45a8ff	206	This subsection provides a set of functions allowing to initialize the USARTx or the UARTy
bogdanm	0:9b334a45a8ff	207	in asynchronous mode.
bogdanm	0:9b334a45a8ff	208	(+) For the asynchronous mode only these parameters can be configured:
bogdanm	0:9b334a45a8ff	209	(++) Baud Rate
bogdanm	0:9b334a45a8ff	210	(++) Word Length
bogdanm	0:9b334a45a8ff	211	(++) Stop Bit
bogdanm	0:9b334a45a8ff	212	(++) Parity: If the parity is enabled, then the MSB bit of the data written
bogdanm	0:9b334a45a8ff	213	in the data register is transmitted but is changed by the parity bit.
bogdanm	0:9b334a45a8ff	214	Depending on the frame length defined by the M bit (8-bits or 9-bits),
bogdanm	0:9b334a45a8ff	215	the possible UART frame formats are as listed in the following table:
bogdanm	0:9b334a45a8ff	216	(+++) +-------------------------------------------------------------+
bogdanm	0:9b334a45a8ff	217	(+++) \| M bit \| PCE bit \| UART frame \|
bogdanm	0:9b334a45a8ff	218	(+++) \|---------------------\|---------------------------------------\|
bogdanm	0:9b334a45a8ff	219	(+++) \| 0 \| 0 \| \| SB \| 8 bit data \| STB \| \|
bogdanm	0:9b334a45a8ff	220	(+++) \|---------\|-----------\|---------------------------------------\|
bogdanm	0:9b334a45a8ff	221	(+++) \| 0 \| 1 \| \| SB \| 7 bit data \| PB \| STB \| \|
bogdanm	0:9b334a45a8ff	222	(+++) \|---------\|-----------\|---------------------------------------\|
bogdanm	0:9b334a45a8ff	223	(+++) \| 1 \| 0 \| \| SB \| 9 bit data \| STB \| \|
bogdanm	0:9b334a45a8ff	224	(+++) \|---------\|-----------\|---------------------------------------\|
bogdanm	0:9b334a45a8ff	225	(+++) \| 1 \| 1 \| \| SB \| 8 bit data \| PB \| STB \| \|
bogdanm	0:9b334a45a8ff	226	(+++) +-------------------------------------------------------------+
bogdanm	0:9b334a45a8ff	227	(++) Hardware flow control
bogdanm	0:9b334a45a8ff	228	(++) Receiver/transmitter modes
bogdanm	0:9b334a45a8ff	229	[..]
bogdanm	0:9b334a45a8ff	230	The HAL_UART_Init(), HAL_HalfDuplex_Init(), HAL_LIN_Init() and HAL_MultiProcessor_Init() APIs
bogdanm	0:9b334a45a8ff	231	follow respectively the UART asynchronous, UART Half duplex, LIN and Multi-Processor
bogdanm	0:9b334a45a8ff	232	configuration procedures (details for the procedures are available in reference manuals
bogdanm	0:9b334a45a8ff	233	(RM0008 for STM32F10Xxx MCUs and RM0041 for STM32F100xx MCUs)).
bogdanm	0:9b334a45a8ff	234
bogdanm	0:9b334a45a8ff	235
bogdanm	0:9b334a45a8ff	236	@endverbatim
bogdanm	0:9b334a45a8ff	237	* @{
bogdanm	0:9b334a45a8ff	238	*/
bogdanm	0:9b334a45a8ff	239
bogdanm	0:9b334a45a8ff	240	/**
bogdanm	0:9b334a45a8ff	241	* @brief Initializes the UART mode according to the specified parameters in
bogdanm	0:9b334a45a8ff	242	* the UART_InitTypeDef and create the associated handle.
bogdanm	0:9b334a45a8ff	243	* @param huart: Pointer to a UART_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	244	* the configuration information for the specified UART module.
bogdanm	0:9b334a45a8ff	245	* @retval HAL status
bogdanm	0:9b334a45a8ff	246	*/
bogdanm	0:9b334a45a8ff	247	HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	248	{
bogdanm	0:9b334a45a8ff	249	/* Check the UART handle allocation */
bogdanm	0:9b334a45a8ff	250	if(huart == NULL)
bogdanm	0:9b334a45a8ff	251	{
bogdanm	0:9b334a45a8ff	252	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	253	}
bogdanm	0:9b334a45a8ff	254
bogdanm	0:9b334a45a8ff	255	/* Check the parameters */
bogdanm	0:9b334a45a8ff	256	if(huart->Init.HwFlowCtl != UART_HWCONTROL_NONE)
bogdanm	0:9b334a45a8ff	257	{
bogdanm	0:9b334a45a8ff	258	/* The hardware flow control is available only for USART1, USART2, USART3 */
bogdanm	0:9b334a45a8ff	259	assert_param(IS_UART_HWFLOW_INSTANCE(huart->Instance));
bogdanm	0:9b334a45a8ff	260	assert_param(IS_UART_HARDWARE_FLOW_CONTROL(huart->Init.HwFlowCtl));
bogdanm	0:9b334a45a8ff	261	}
bogdanm	0:9b334a45a8ff	262	else
bogdanm	0:9b334a45a8ff	263	{
bogdanm	0:9b334a45a8ff	264	assert_param(IS_UART_INSTANCE(huart->Instance));
bogdanm	0:9b334a45a8ff	265	}
bogdanm	0:9b334a45a8ff	266	assert_param(IS_UART_WORD_LENGTH(huart->Init.WordLength));
bogdanm	0:9b334a45a8ff	267	assert_param(IS_UART_OVERSAMPLING(huart->Init.OverSampling));
bogdanm	0:9b334a45a8ff	268
bogdanm	0:9b334a45a8ff	269	if(huart->State == HAL_UART_STATE_RESET)
bogdanm	0:9b334a45a8ff	270	{
bogdanm	0:9b334a45a8ff	271	/* Allocate lock resource and initialize it */
bogdanm	0:9b334a45a8ff	272	huart-> Lock = HAL_UNLOCKED;
bogdanm	0:9b334a45a8ff	273
bogdanm	0:9b334a45a8ff	274	/* Init the low level hardware */
bogdanm	0:9b334a45a8ff	275	HAL_UART_MspInit(huart);
bogdanm	0:9b334a45a8ff	276	}
bogdanm	0:9b334a45a8ff	277
bogdanm	0:9b334a45a8ff	278	huart->State = HAL_UART_STATE_BUSY;
bogdanm	0:9b334a45a8ff	279
bogdanm	0:9b334a45a8ff	280	/* Disable the peripheral */
bogdanm	0:9b334a45a8ff	281	__HAL_UART_DISABLE(huart);
bogdanm	0:9b334a45a8ff	282
bogdanm	0:9b334a45a8ff	283	/* Set the UART Communication parameters */
bogdanm	0:9b334a45a8ff	284	UART_SetConfig(huart);
bogdanm	0:9b334a45a8ff	285
bogdanm	0:9b334a45a8ff	286	/* In asynchronous mode, the following bits must be kept cleared:
bogdanm	0:9b334a45a8ff	287	- LINEN and CLKEN bits in the USART_CR2 register,
bogdanm	0:9b334a45a8ff	288	- SCEN, HDSEL and IREN bits in the USART_CR3 register.*/
bogdanm	0:9b334a45a8ff	289	CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN \| USART_CR2_CLKEN));
bogdanm	0:9b334a45a8ff	290	CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN \| USART_CR3_HDSEL \| USART_CR3_IREN));
bogdanm	0:9b334a45a8ff	291
bogdanm	0:9b334a45a8ff	292	/* Enable the peripheral */
bogdanm	0:9b334a45a8ff	293	__HAL_UART_ENABLE(huart);
bogdanm	0:9b334a45a8ff	294
bogdanm	0:9b334a45a8ff	295	/* Initialize the UART state */
bogdanm	0:9b334a45a8ff	296	huart->ErrorCode = HAL_UART_ERROR_NONE;
bogdanm	0:9b334a45a8ff	297	huart->State= HAL_UART_STATE_READY;
bogdanm	0:9b334a45a8ff	298
bogdanm	0:9b334a45a8ff	299	return HAL_OK;
bogdanm	0:9b334a45a8ff	300	}
bogdanm	0:9b334a45a8ff	301
bogdanm	0:9b334a45a8ff	302	/**
bogdanm	0:9b334a45a8ff	303	* @brief Initializes the half-duplex mode according to the specified
bogdanm	0:9b334a45a8ff	304	* parameters in the UART_InitTypeDef and create the associated handle.
bogdanm	0:9b334a45a8ff	305	* @param huart: Pointer to a UART_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	306	* the configuration information for the specified UART module.
bogdanm	0:9b334a45a8ff	307	* @retval HAL status
bogdanm	0:9b334a45a8ff	308	*/
bogdanm	0:9b334a45a8ff	309	HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	310	{
bogdanm	0:9b334a45a8ff	311	/* Check the UART handle allocation */
bogdanm	0:9b334a45a8ff	312	if(huart == NULL)
bogdanm	0:9b334a45a8ff	313	{
bogdanm	0:9b334a45a8ff	314	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	315	}
bogdanm	0:9b334a45a8ff	316
bogdanm	0:9b334a45a8ff	317	/* Check UART instance */
bogdanm	0:9b334a45a8ff	318	assert_param(IS_UART_HALFDUPLEX_INSTANCE(huart->Instance));
bogdanm	0:9b334a45a8ff	319	assert_param(IS_UART_WORD_LENGTH(huart->Init.WordLength));
bogdanm	0:9b334a45a8ff	320	assert_param(IS_UART_OVERSAMPLING(huart->Init.OverSampling));
bogdanm	0:9b334a45a8ff	321
bogdanm	0:9b334a45a8ff	322	if(huart->State == HAL_UART_STATE_RESET)
bogdanm	0:9b334a45a8ff	323	{
bogdanm	0:9b334a45a8ff	324	/* Init the low level hardware */
bogdanm	0:9b334a45a8ff	325	HAL_UART_MspInit(huart);
bogdanm	0:9b334a45a8ff	326	}
bogdanm	0:9b334a45a8ff	327
bogdanm	0:9b334a45a8ff	328	huart->State = HAL_UART_STATE_BUSY;
bogdanm	0:9b334a45a8ff	329
bogdanm	0:9b334a45a8ff	330	/* Disable the peripheral */
bogdanm	0:9b334a45a8ff	331	__HAL_UART_DISABLE(huart);
bogdanm	0:9b334a45a8ff	332
bogdanm	0:9b334a45a8ff	333	/* Set the UART Communication parameters */
bogdanm	0:9b334a45a8ff	334	UART_SetConfig(huart);
bogdanm	0:9b334a45a8ff	335
bogdanm	0:9b334a45a8ff	336	/* In half-duplex mode, the following bits must be kept cleared:
bogdanm	0:9b334a45a8ff	337	- LINEN and CLKEN bits in the USART_CR2 register,
bogdanm	0:9b334a45a8ff	338	- SCEN and IREN bits in the USART_CR3 register.*/
bogdanm	0:9b334a45a8ff	339	CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN \| USART_CR2_CLKEN));
bogdanm	0:9b334a45a8ff	340	CLEAR_BIT(huart->Instance->CR3, (USART_CR3_IREN \| USART_CR3_SCEN));
bogdanm	0:9b334a45a8ff	341
bogdanm	0:9b334a45a8ff	342	/* Enable the Half-Duplex mode by setting the HDSEL bit in the CR3 register */
bogdanm	0:9b334a45a8ff	343	SET_BIT(huart->Instance->CR3, USART_CR3_HDSEL);
bogdanm	0:9b334a45a8ff	344
bogdanm	0:9b334a45a8ff	345	/* Enable the peripheral */
bogdanm	0:9b334a45a8ff	346	__HAL_UART_ENABLE(huart);
bogdanm	0:9b334a45a8ff	347
bogdanm	0:9b334a45a8ff	348	/* Initialize the UART state*/
bogdanm	0:9b334a45a8ff	349	huart->ErrorCode = HAL_UART_ERROR_NONE;
bogdanm	0:9b334a45a8ff	350	huart->State= HAL_UART_STATE_READY;
bogdanm	0:9b334a45a8ff	351
bogdanm	0:9b334a45a8ff	352	return HAL_OK;
bogdanm	0:9b334a45a8ff	353	}
bogdanm	0:9b334a45a8ff	354
bogdanm	0:9b334a45a8ff	355	/**
bogdanm	0:9b334a45a8ff	356	* @brief Initializes the LIN mode according to the specified
bogdanm	0:9b334a45a8ff	357	* parameters in the UART_InitTypeDef and create the associated handle.
bogdanm	0:9b334a45a8ff	358	* @param huart: Pointer to a UART_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	359	* the configuration information for the specified UART module.
bogdanm	0:9b334a45a8ff	360	* @param BreakDetectLength: Specifies the LIN break detection length.
bogdanm	0:9b334a45a8ff	361	* This parameter can be one of the following values:
bogdanm	0:9b334a45a8ff	362	* @arg UART_LINBREAKDETECTLENGTH_10B: 10-bit break detection
bogdanm	0:9b334a45a8ff	363	* @arg UART_LINBREAKDETECTLENGTH_11B: 11-bit break detection
bogdanm	0:9b334a45a8ff	364	* @retval HAL status
bogdanm	0:9b334a45a8ff	365	*/
bogdanm	0:9b334a45a8ff	366	HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength)
bogdanm	0:9b334a45a8ff	367	{
bogdanm	0:9b334a45a8ff	368	/* Check the UART handle allocation */
bogdanm	0:9b334a45a8ff	369	if(huart == NULL)
bogdanm	0:9b334a45a8ff	370	{
bogdanm	0:9b334a45a8ff	371	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	372	}
bogdanm	0:9b334a45a8ff	373
bogdanm	0:9b334a45a8ff	374	/* Check the LIN UART instance */
bogdanm	0:9b334a45a8ff	375	assert_param(IS_UART_LIN_INSTANCE(huart->Instance));
bogdanm	0:9b334a45a8ff	376	/* Check the Break detection length parameter */
bogdanm	0:9b334a45a8ff	377	assert_param(IS_UART_LIN_BREAK_DETECT_LENGTH(BreakDetectLength));
bogdanm	0:9b334a45a8ff	378	assert_param(IS_UART_LIN_WORD_LENGTH(huart->Init.WordLength));
bogdanm	0:9b334a45a8ff	379	assert_param(IS_UART_LIN_OVERSAMPLING(huart->Init.OverSampling));
bogdanm	0:9b334a45a8ff	380
bogdanm	0:9b334a45a8ff	381	if(huart->State == HAL_UART_STATE_RESET)
bogdanm	0:9b334a45a8ff	382	{
bogdanm	0:9b334a45a8ff	383	/* Init the low level hardware */
bogdanm	0:9b334a45a8ff	384	HAL_UART_MspInit(huart);
bogdanm	0:9b334a45a8ff	385	}
bogdanm	0:9b334a45a8ff	386
bogdanm	0:9b334a45a8ff	387	huart->State = HAL_UART_STATE_BUSY;
bogdanm	0:9b334a45a8ff	388
bogdanm	0:9b334a45a8ff	389	/* Disable the peripheral */
bogdanm	0:9b334a45a8ff	390	__HAL_UART_DISABLE(huart);
bogdanm	0:9b334a45a8ff	391
bogdanm	0:9b334a45a8ff	392	/* Set the UART Communication parameters */
bogdanm	0:9b334a45a8ff	393	UART_SetConfig(huart);
bogdanm	0:9b334a45a8ff	394
bogdanm	0:9b334a45a8ff	395	/* In LIN mode, the following bits must be kept cleared:
bogdanm	0:9b334a45a8ff	396	- CLKEN bits in the USART_CR2 register,
bogdanm	0:9b334a45a8ff	397	- SCEN and IREN bits in the USART_CR3 register.*/
bogdanm	0:9b334a45a8ff	398	CLEAR_BIT(huart->Instance->CR2, USART_CR2_CLKEN);
bogdanm	0:9b334a45a8ff	399	CLEAR_BIT(huart->Instance->CR3, (USART_CR3_HDSEL \| USART_CR3_IREN \| USART_CR3_SCEN));
bogdanm	0:9b334a45a8ff	400
bogdanm	0:9b334a45a8ff	401	/* Enable the LIN mode by setting the LINEN bit in the CR2 register */
bogdanm	0:9b334a45a8ff	402	SET_BIT(huart->Instance->CR2, USART_CR2_LINEN);
bogdanm	0:9b334a45a8ff	403
bogdanm	0:9b334a45a8ff	404	/* Set the USART LIN Break detection length. */
bogdanm	0:9b334a45a8ff	405	MODIFY_REG(huart->Instance->CR2, USART_CR2_LBDL, BreakDetectLength);
bogdanm	0:9b334a45a8ff	406
bogdanm	0:9b334a45a8ff	407	/* Enable the peripheral */
bogdanm	0:9b334a45a8ff	408	__HAL_UART_ENABLE(huart);
bogdanm	0:9b334a45a8ff	409
bogdanm	0:9b334a45a8ff	410	/* Initialize the UART state*/
bogdanm	0:9b334a45a8ff	411	huart->ErrorCode = HAL_UART_ERROR_NONE;
bogdanm	0:9b334a45a8ff	412	huart->State= HAL_UART_STATE_READY;
bogdanm	0:9b334a45a8ff	413
bogdanm	0:9b334a45a8ff	414	return HAL_OK;
bogdanm	0:9b334a45a8ff	415	}
bogdanm	0:9b334a45a8ff	416
bogdanm	0:9b334a45a8ff	417	/**
bogdanm	0:9b334a45a8ff	418	* @brief Initializes the Multi-Processor mode according to the specified
bogdanm	0:9b334a45a8ff	419	* parameters in the UART_InitTypeDef and create the associated handle.
bogdanm	0:9b334a45a8ff	420	* @param huart: Pointer to a UART_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	421	* the configuration information for the specified UART module.
bogdanm	0:9b334a45a8ff	422	* @param Address: UART node address
bogdanm	0:9b334a45a8ff	423	* @param WakeUpMethod: specifies the UART wakeup method.
bogdanm	0:9b334a45a8ff	424	* This parameter can be one of the following values:
bogdanm	0:9b334a45a8ff	425	* @arg UART_WAKEUPMETHOD_IDLELINE: Wakeup by an idle line detection
bogdanm	0:9b334a45a8ff	426	* @arg UART_WAKEUPMETHOD_ADDRESSMARK: Wakeup by an address mark
bogdanm	0:9b334a45a8ff	427	* @retval HAL status
bogdanm	0:9b334a45a8ff	428	*/
bogdanm	0:9b334a45a8ff	429	HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod)
bogdanm	0:9b334a45a8ff	430	{
bogdanm	0:9b334a45a8ff	431	/* Check the UART handle allocation */
bogdanm	0:9b334a45a8ff	432	if(huart == NULL)
bogdanm	0:9b334a45a8ff	433	{
bogdanm	0:9b334a45a8ff	434	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	435	}
bogdanm	0:9b334a45a8ff	436
bogdanm	0:9b334a45a8ff	437	/* Check UART instance capabilities */
bogdanm	0:9b334a45a8ff	438	assert_param(IS_UART_MULTIPROCESSOR_INSTANCE(huart->Instance));
bogdanm	0:9b334a45a8ff	439
bogdanm	0:9b334a45a8ff	440	/* Check the Address & wake up method parameters */
bogdanm	0:9b334a45a8ff	441	assert_param(IS_UART_WAKEUPMETHOD(WakeUpMethod));
bogdanm	0:9b334a45a8ff	442	assert_param(IS_UART_ADDRESS(Address));
bogdanm	0:9b334a45a8ff	443	assert_param(IS_UART_WORD_LENGTH(huart->Init.WordLength));
bogdanm	0:9b334a45a8ff	444	assert_param(IS_UART_OVERSAMPLING(huart->Init.OverSampling));
bogdanm	0:9b334a45a8ff	445
bogdanm	0:9b334a45a8ff	446	if(huart->State == HAL_UART_STATE_RESET)
bogdanm	0:9b334a45a8ff	447	{
bogdanm	0:9b334a45a8ff	448	/* Init the low level hardware */
bogdanm	0:9b334a45a8ff	449	HAL_UART_MspInit(huart);
bogdanm	0:9b334a45a8ff	450	}
bogdanm	0:9b334a45a8ff	451
bogdanm	0:9b334a45a8ff	452	huart->State = HAL_UART_STATE_BUSY;
bogdanm	0:9b334a45a8ff	453
bogdanm	0:9b334a45a8ff	454	/* Disable the peripheral */
bogdanm	0:9b334a45a8ff	455	__HAL_UART_DISABLE(huart);
bogdanm	0:9b334a45a8ff	456
bogdanm	0:9b334a45a8ff	457	/* Set the UART Communication parameters */
bogdanm	0:9b334a45a8ff	458	UART_SetConfig(huart);
bogdanm	0:9b334a45a8ff	459
bogdanm	0:9b334a45a8ff	460	/* In Multi-Processor mode, the following bits must be kept cleared:
bogdanm	0:9b334a45a8ff	461	- LINEN and CLKEN bits in the USART_CR2 register,
bogdanm	0:9b334a45a8ff	462	- SCEN, HDSEL and IREN bits in the USART_CR3 register */
bogdanm	0:9b334a45a8ff	463	CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN \| USART_CR2_CLKEN));
bogdanm	0:9b334a45a8ff	464	CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN \| USART_CR3_HDSEL \| USART_CR3_IREN));
bogdanm	0:9b334a45a8ff	465
bogdanm	0:9b334a45a8ff	466	/* Set the USART address node */
bogdanm	0:9b334a45a8ff	467	MODIFY_REG(huart->Instance->CR2, USART_CR2_ADD, Address);
bogdanm	0:9b334a45a8ff	468
bogdanm	0:9b334a45a8ff	469	/* Set the wake up method by setting the WAKE bit in the CR1 register */
bogdanm	0:9b334a45a8ff	470	MODIFY_REG(huart->Instance->CR1, USART_CR1_WAKE, WakeUpMethod);
bogdanm	0:9b334a45a8ff	471
bogdanm	0:9b334a45a8ff	472	/* Enable the peripheral */
bogdanm	0:9b334a45a8ff	473	__HAL_UART_ENABLE(huart);
bogdanm	0:9b334a45a8ff	474
bogdanm	0:9b334a45a8ff	475	/* Initialize the UART state */
bogdanm	0:9b334a45a8ff	476	huart->ErrorCode = HAL_UART_ERROR_NONE;
bogdanm	0:9b334a45a8ff	477	huart->State= HAL_UART_STATE_READY;
bogdanm	0:9b334a45a8ff	478
bogdanm	0:9b334a45a8ff	479	return HAL_OK;
bogdanm	0:9b334a45a8ff	480	}
bogdanm	0:9b334a45a8ff	481
bogdanm	0:9b334a45a8ff	482	/**
bogdanm	0:9b334a45a8ff	483	* @brief DeInitializes the UART peripheral.
bogdanm	0:9b334a45a8ff	484	* @param huart: Pointer to a UART_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	485	* the configuration information for the specified UART module.
bogdanm	0:9b334a45a8ff	486	* @retval HAL status
bogdanm	0:9b334a45a8ff	487	*/
bogdanm	0:9b334a45a8ff	488	HAL_StatusTypeDef HAL_UART_DeInit(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	489	{
bogdanm	0:9b334a45a8ff	490	/* Check the UART handle allocation */
bogdanm	0:9b334a45a8ff	491	if(huart == NULL)
bogdanm	0:9b334a45a8ff	492	{
bogdanm	0:9b334a45a8ff	493	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	494	}
bogdanm	0:9b334a45a8ff	495
bogdanm	0:9b334a45a8ff	496	/* Check the parameters */
bogdanm	0:9b334a45a8ff	497	assert_param(IS_UART_INSTANCE(huart->Instance));
bogdanm	0:9b334a45a8ff	498
bogdanm	0:9b334a45a8ff	499	huart->State = HAL_UART_STATE_BUSY;
bogdanm	0:9b334a45a8ff	500
bogdanm	0:9b334a45a8ff	501	/* Disable the Peripheral */
bogdanm	0:9b334a45a8ff	502	__HAL_UART_DISABLE(huart);
bogdanm	0:9b334a45a8ff	503
bogdanm	0:9b334a45a8ff	504	huart->Instance->CR1 = 0x0;
bogdanm	0:9b334a45a8ff	505	huart->Instance->CR2 = 0x0;
bogdanm	0:9b334a45a8ff	506	huart->Instance->CR3 = 0x0;
bogdanm	0:9b334a45a8ff	507
bogdanm	0:9b334a45a8ff	508	/* DeInit the low level hardware */
bogdanm	0:9b334a45a8ff	509	HAL_UART_MspDeInit(huart);
bogdanm	0:9b334a45a8ff	510
bogdanm	0:9b334a45a8ff	511	huart->ErrorCode = HAL_UART_ERROR_NONE;
bogdanm	0:9b334a45a8ff	512	huart->State = HAL_UART_STATE_RESET;
bogdanm	0:9b334a45a8ff	513
bogdanm	0:9b334a45a8ff	514	/* Process Unlock */
bogdanm	0:9b334a45a8ff	515	__HAL_UNLOCK(huart);
bogdanm	0:9b334a45a8ff	516
bogdanm	0:9b334a45a8ff	517	return HAL_OK;
bogdanm	0:9b334a45a8ff	518	}
bogdanm	0:9b334a45a8ff	519
bogdanm	0:9b334a45a8ff	520	/**
bogdanm	0:9b334a45a8ff	521	* @brief UART MSP Init.
bogdanm	0:9b334a45a8ff	522	* @param huart: Pointer to a UART_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	523	* the configuration information for the specified UART module.
bogdanm	0:9b334a45a8ff	524	* @retval None
bogdanm	0:9b334a45a8ff	525	*/
bogdanm	0:9b334a45a8ff	526	__weak void HAL_UART_MspInit(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	527	{
bogdanm	0:9b334a45a8ff	528	/* NOTE: This function should not be modified, when the callback is needed,
bogdanm	0:9b334a45a8ff	529	the HAL_UART_MspInit can be implemented in the user file
bogdanm	0:9b334a45a8ff	530	*/
bogdanm	0:9b334a45a8ff	531	}
bogdanm	0:9b334a45a8ff	532
bogdanm	0:9b334a45a8ff	533	/**
bogdanm	0:9b334a45a8ff	534	* @brief UART MSP DeInit.
bogdanm	0:9b334a45a8ff	535	* @param huart: Pointer to a UART_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	536	* the configuration information for the specified UART module.
bogdanm	0:9b334a45a8ff	537	* @retval None
bogdanm	0:9b334a45a8ff	538	*/
bogdanm	0:9b334a45a8ff	539	__weak void HAL_UART_MspDeInit(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	540	{
bogdanm	0:9b334a45a8ff	541	/* NOTE: This function should not be modified, when the callback is needed,
bogdanm	0:9b334a45a8ff	542	the HAL_UART_MspDeInit can be implemented in the user file
bogdanm	0:9b334a45a8ff	543	*/
bogdanm	0:9b334a45a8ff	544	}
bogdanm	0:9b334a45a8ff	545
bogdanm	0:9b334a45a8ff	546	/**
bogdanm	0:9b334a45a8ff	547	* @}
bogdanm	0:9b334a45a8ff	548	*/
bogdanm	0:9b334a45a8ff	549
bogdanm	0:9b334a45a8ff	550	/** @defgroup UART_Exported_Functions_Group2 IO operation functions
bogdanm	0:9b334a45a8ff	551	* @brief UART Transmit and Receive functions
bogdanm	0:9b334a45a8ff	552	*
bogdanm	0:9b334a45a8ff	553	@verbatim
bogdanm	0:9b334a45a8ff	554	==============================================================================
bogdanm	0:9b334a45a8ff	555	##### IO operation functions #####
bogdanm	0:9b334a45a8ff	556	==============================================================================
bogdanm	0:9b334a45a8ff	557	[..]
bogdanm	0:9b334a45a8ff	558	This subsection provides a set of functions allowing to manage the UART asynchronous
bogdanm	0:9b334a45a8ff	559	and Half duplex data transfers.
bogdanm	0:9b334a45a8ff	560
bogdanm	0:9b334a45a8ff	561	(#) There are two modes of transfer:
bogdanm	0:9b334a45a8ff	562	(++) Blocking mode: The communication is performed in polling mode.
bogdanm	0:9b334a45a8ff	563	The HAL status of all data processing is returned by the same function
bogdanm	0:9b334a45a8ff	564	after finishing transfer.
bogdanm	0:9b334a45a8ff	565	(++) Non blocking mode: The communication is performed using Interrupts
bogdanm	0:9b334a45a8ff	566	or DMA, these APIs return the HAL status.
bogdanm	0:9b334a45a8ff	567	The end of the data processing will be indicated through the
bogdanm	0:9b334a45a8ff	568	dedicated UART IRQ when using Interrupt mode or the DMA IRQ when
bogdanm	0:9b334a45a8ff	569	using DMA mode.
bogdanm	0:9b334a45a8ff	570	The HAL_UART_TxCpltCallback(), HAL_UART_RxCpltCallback() user callbacks
bogdanm	0:9b334a45a8ff	571	will be executed respectively at the end of the transmit or receive process.
bogdanm	0:9b334a45a8ff	572	The HAL_UART_ErrorCallback() user callback will be executed when
bogdanm	0:9b334a45a8ff	573	a communication error is detected.
bogdanm	0:9b334a45a8ff	574
bogdanm	0:9b334a45a8ff	575	(#) Blocking mode APIs are:
bogdanm	0:9b334a45a8ff	576	(++) HAL_UART_Transmit()
bogdanm	0:9b334a45a8ff	577	(++) HAL_UART_Receive()
bogdanm	0:9b334a45a8ff	578
bogdanm	0:9b334a45a8ff	579	(#) Non Blocking mode APIs with Interrupt are:
bogdanm	0:9b334a45a8ff	580	(++) HAL_UART_Transmit_IT()
bogdanm	0:9b334a45a8ff	581	(++) HAL_UART_Receive_IT()
bogdanm	0:9b334a45a8ff	582	(++) HAL_UART_IRQHandler()
bogdanm	0:9b334a45a8ff	583
bogdanm	0:9b334a45a8ff	584	(#) Non Blocking mode functions with DMA are:
bogdanm	0:9b334a45a8ff	585	(++) HAL_UART_Transmit_DMA()
bogdanm	0:9b334a45a8ff	586	(++) HAL_UART_Receive_DMA()
bogdanm	0:9b334a45a8ff	587	(++) HAL_UART_DMAPause()
bogdanm	0:9b334a45a8ff	588	(++) HAL_UART_DMAResume()
bogdanm	0:9b334a45a8ff	589	(++) HAL_UART_DMAStop()
bogdanm	0:9b334a45a8ff	590
bogdanm	0:9b334a45a8ff	591	(#) A set of Transfer Complete Callbacks are provided in non blocking mode:
bogdanm	0:9b334a45a8ff	592	(++) HAL_UART_TxHalfCpltCallback()
bogdanm	0:9b334a45a8ff	593	(++) HAL_UART_TxCpltCallback()
bogdanm	0:9b334a45a8ff	594	(++) HAL_UART_RxHalfCpltCallback()
bogdanm	0:9b334a45a8ff	595	(++) HAL_UART_RxCpltCallback()
bogdanm	0:9b334a45a8ff	596	(++) HAL_UART_ErrorCallback()
bogdanm	0:9b334a45a8ff	597
bogdanm	0:9b334a45a8ff	598	[..]
bogdanm	0:9b334a45a8ff	599	(@) In the Half duplex communication, it is forbidden to run the transmit
bogdanm	0:9b334a45a8ff	600	and receive process in parallel, the UART state HAL_UART_STATE_BUSY_TX_RX
bogdanm	0:9b334a45a8ff	601	can't be useful.
bogdanm	0:9b334a45a8ff	602
bogdanm	0:9b334a45a8ff	603	@endverbatim
bogdanm	0:9b334a45a8ff	604	* @{
bogdanm	0:9b334a45a8ff	605	*/
bogdanm	0:9b334a45a8ff	606
bogdanm	0:9b334a45a8ff	607	/**
bogdanm	0:9b334a45a8ff	608	* @brief Sends an amount of data in blocking mode.
bogdanm	0:9b334a45a8ff	609	* @param huart: Pointer to a UART_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	610	* the configuration information for the specified UART module.
bogdanm	0:9b334a45a8ff	611	* @param pData: Pointer to data buffer
bogdanm	0:9b334a45a8ff	612	* @param Size: Amount of data to be sent
bogdanm	0:9b334a45a8ff	613	* @param Timeout: Timeout duration
bogdanm	0:9b334a45a8ff	614	* @retval HAL status
bogdanm	0:9b334a45a8ff	615	*/
bogdanm	0:9b334a45a8ff	616	HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef huart, uint8_t pData, uint16_t Size, uint32_t Timeout)
bogdanm	0:9b334a45a8ff	617	{
bogdanm	0:9b334a45a8ff	618	uint16_t* tmp;
bogdanm	0:9b334a45a8ff	619	uint32_t tmp_state = 0;
bogdanm	0:9b334a45a8ff	620
bogdanm	0:9b334a45a8ff	621	tmp_state = huart->State;
bogdanm	0:9b334a45a8ff	622	if((tmp_state == HAL_UART_STATE_READY) \|\| (tmp_state == HAL_UART_STATE_BUSY_RX))
bogdanm	0:9b334a45a8ff	623	{
bogdanm	0:9b334a45a8ff	624	if((pData == NULL) \|\| (Size == 0))
bogdanm	0:9b334a45a8ff	625	{
bogdanm	0:9b334a45a8ff	626	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	627	}
bogdanm	0:9b334a45a8ff	628
bogdanm	0:9b334a45a8ff	629	/* Process Locked */
bogdanm	0:9b334a45a8ff	630	__HAL_LOCK(huart);
bogdanm	0:9b334a45a8ff	631
bogdanm	0:9b334a45a8ff	632	huart->ErrorCode = HAL_UART_ERROR_NONE;
bogdanm	0:9b334a45a8ff	633	/* Check if a non-blocking receive process is ongoing or not */
bogdanm	0:9b334a45a8ff	634	if(huart->State == HAL_UART_STATE_BUSY_RX)
bogdanm	0:9b334a45a8ff	635	{
bogdanm	0:9b334a45a8ff	636	huart->State = HAL_UART_STATE_BUSY_TX_RX;
bogdanm	0:9b334a45a8ff	637	}
bogdanm	0:9b334a45a8ff	638	else
bogdanm	0:9b334a45a8ff	639	{
bogdanm	0:9b334a45a8ff	640	huart->State = HAL_UART_STATE_BUSY_TX;
bogdanm	0:9b334a45a8ff	641	}
bogdanm	0:9b334a45a8ff	642
bogdanm	0:9b334a45a8ff	643	huart->TxXferSize = Size;
bogdanm	0:9b334a45a8ff	644	huart->TxXferCount = Size;
bogdanm	0:9b334a45a8ff	645	while(huart->TxXferCount > 0)
bogdanm	0:9b334a45a8ff	646	{
bogdanm	0:9b334a45a8ff	647	huart->TxXferCount--;
bogdanm	0:9b334a45a8ff	648	if(huart->Init.WordLength == UART_WORDLENGTH_9B)
bogdanm	0:9b334a45a8ff	649	{
bogdanm	0:9b334a45a8ff	650	if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	651	{
bogdanm	0:9b334a45a8ff	652	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	653	}
bogdanm	0:9b334a45a8ff	654	tmp = (uint16_t*) pData;
bogdanm	0:9b334a45a8ff	655	huart->Instance->DR = (*tmp & (uint16_t)0x01FF);
bogdanm	0:9b334a45a8ff	656	if(huart->Init.Parity == UART_PARITY_NONE)
bogdanm	0:9b334a45a8ff	657	{
bogdanm	0:9b334a45a8ff	658	pData +=2;
bogdanm	0:9b334a45a8ff	659	}
bogdanm	0:9b334a45a8ff	660	else
bogdanm	0:9b334a45a8ff	661	{
bogdanm	0:9b334a45a8ff	662	pData +=1;
bogdanm	0:9b334a45a8ff	663	}
bogdanm	0:9b334a45a8ff	664	}
bogdanm	0:9b334a45a8ff	665	else
bogdanm	0:9b334a45a8ff	666	{
bogdanm	0:9b334a45a8ff	667	if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	668	{
bogdanm	0:9b334a45a8ff	669	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	670	}
bogdanm	0:9b334a45a8ff	671	huart->Instance->DR = (*pData++ & (uint8_t)0xFF);
bogdanm	0:9b334a45a8ff	672	}
bogdanm	0:9b334a45a8ff	673	}
bogdanm	0:9b334a45a8ff	674
bogdanm	0:9b334a45a8ff	675	if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	676	{
bogdanm	0:9b334a45a8ff	677	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	678	}
bogdanm	0:9b334a45a8ff	679
bogdanm	0:9b334a45a8ff	680	/* Check if a non-blocking receive process is ongoing or not */
bogdanm	0:9b334a45a8ff	681	if(huart->State == HAL_UART_STATE_BUSY_TX_RX)
bogdanm	0:9b334a45a8ff	682	{
bogdanm	0:9b334a45a8ff	683	huart->State = HAL_UART_STATE_BUSY_RX;
bogdanm	0:9b334a45a8ff	684	}
bogdanm	0:9b334a45a8ff	685	else
bogdanm	0:9b334a45a8ff	686	{
bogdanm	0:9b334a45a8ff	687	huart->State = HAL_UART_STATE_READY;
bogdanm	0:9b334a45a8ff	688	}
bogdanm	0:9b334a45a8ff	689
bogdanm	0:9b334a45a8ff	690	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	691	__HAL_UNLOCK(huart);
bogdanm	0:9b334a45a8ff	692
bogdanm	0:9b334a45a8ff	693	return HAL_OK;
bogdanm	0:9b334a45a8ff	694	}
bogdanm	0:9b334a45a8ff	695	else
bogdanm	0:9b334a45a8ff	696	{
bogdanm	0:9b334a45a8ff	697	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	698	}
bogdanm	0:9b334a45a8ff	699	}
bogdanm	0:9b334a45a8ff	700
bogdanm	0:9b334a45a8ff	701	/**
bogdanm	0:9b334a45a8ff	702	* @brief Receives an amount of data in blocking mode.
bogdanm	0:9b334a45a8ff	703	* @param huart: Pointer to a UART_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	704	* the configuration information for the specified UART module.
bogdanm	0:9b334a45a8ff	705	* @param pData: Pointer to data buffer
bogdanm	0:9b334a45a8ff	706	* @param Size: Amount of data to be received
bogdanm	0:9b334a45a8ff	707	* @param Timeout: Timeout duration
bogdanm	0:9b334a45a8ff	708	* @retval HAL status
bogdanm	0:9b334a45a8ff	709	*/
bogdanm	0:9b334a45a8ff	710	HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef huart, uint8_t pData, uint16_t Size, uint32_t Timeout)
bogdanm	0:9b334a45a8ff	711	{
bogdanm	0:9b334a45a8ff	712	uint16_t* tmp;
bogdanm	0:9b334a45a8ff	713	uint32_t tmp_state = 0;
bogdanm	0:9b334a45a8ff	714
bogdanm	0:9b334a45a8ff	715	tmp_state = huart->State;
bogdanm	0:9b334a45a8ff	716	if((tmp_state == HAL_UART_STATE_READY) \|\| (tmp_state == HAL_UART_STATE_BUSY_TX))
bogdanm	0:9b334a45a8ff	717	{
bogdanm	0:9b334a45a8ff	718	if((pData == NULL ) \|\| (Size == 0))
bogdanm	0:9b334a45a8ff	719	{
bogdanm	0:9b334a45a8ff	720	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	721	}
bogdanm	0:9b334a45a8ff	722
bogdanm	0:9b334a45a8ff	723	/* Process Locked */
bogdanm	0:9b334a45a8ff	724	__HAL_LOCK(huart);
bogdanm	0:9b334a45a8ff	725
bogdanm	0:9b334a45a8ff	726	huart->ErrorCode = HAL_UART_ERROR_NONE;
bogdanm	0:9b334a45a8ff	727	/* Check if a non-blocking transmit process is ongoing or not */
bogdanm	0:9b334a45a8ff	728	if(huart->State == HAL_UART_STATE_BUSY_TX)
bogdanm	0:9b334a45a8ff	729	{
bogdanm	0:9b334a45a8ff	730	huart->State = HAL_UART_STATE_BUSY_TX_RX;
bogdanm	0:9b334a45a8ff	731	}
bogdanm	0:9b334a45a8ff	732	else
bogdanm	0:9b334a45a8ff	733	{
bogdanm	0:9b334a45a8ff	734	huart->State = HAL_UART_STATE_BUSY_RX;
bogdanm	0:9b334a45a8ff	735	}
bogdanm	0:9b334a45a8ff	736
bogdanm	0:9b334a45a8ff	737	huart->RxXferSize = Size;
bogdanm	0:9b334a45a8ff	738	huart->RxXferCount = Size;
bogdanm	0:9b334a45a8ff	739
bogdanm	0:9b334a45a8ff	740	/* Check the remain data to be received */
bogdanm	0:9b334a45a8ff	741	while(huart->RxXferCount > 0)
bogdanm	0:9b334a45a8ff	742	{
bogdanm	0:9b334a45a8ff	743	huart->RxXferCount--;
bogdanm	0:9b334a45a8ff	744	if(huart->Init.WordLength == UART_WORDLENGTH_9B)
bogdanm	0:9b334a45a8ff	745	{
bogdanm	0:9b334a45a8ff	746	if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_RXNE, RESET, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	747	{
bogdanm	0:9b334a45a8ff	748	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	749	}
bogdanm	0:9b334a45a8ff	750	tmp = (uint16_t*) pData ;
bogdanm	0:9b334a45a8ff	751	if(huart->Init.Parity == UART_PARITY_NONE)
bogdanm	0:9b334a45a8ff	752	{
bogdanm	0:9b334a45a8ff	753	*tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x01FF);
bogdanm	0:9b334a45a8ff	754	pData +=2;
bogdanm	0:9b334a45a8ff	755	}
bogdanm	0:9b334a45a8ff	756	else
bogdanm	0:9b334a45a8ff	757	{
bogdanm	0:9b334a45a8ff	758	*tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x00FF);
bogdanm	0:9b334a45a8ff	759	pData +=1;
bogdanm	0:9b334a45a8ff	760	}
bogdanm	0:9b334a45a8ff	761
bogdanm	0:9b334a45a8ff	762	}
bogdanm	0:9b334a45a8ff	763	else
bogdanm	0:9b334a45a8ff	764	{
bogdanm	0:9b334a45a8ff	765	if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_RXNE, RESET, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	766	{
bogdanm	0:9b334a45a8ff	767	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	768	}
bogdanm	0:9b334a45a8ff	769	if(huart->Init.Parity == UART_PARITY_NONE)
bogdanm	0:9b334a45a8ff	770	{
bogdanm	0:9b334a45a8ff	771	*pData++ = (uint8_t)(huart->Instance->DR & (uint8_t)0x00FF);
bogdanm	0:9b334a45a8ff	772	}
bogdanm	0:9b334a45a8ff	773	else
bogdanm	0:9b334a45a8ff	774	{
bogdanm	0:9b334a45a8ff	775	*pData++ = (uint8_t)(huart->Instance->DR & (uint8_t)0x007F);
bogdanm	0:9b334a45a8ff	776	}
bogdanm	0:9b334a45a8ff	777
bogdanm	0:9b334a45a8ff	778	}
bogdanm	0:9b334a45a8ff	779	}
bogdanm	0:9b334a45a8ff	780
bogdanm	0:9b334a45a8ff	781	/* Check if a non-blocking transmit process is ongoing or not */
bogdanm	0:9b334a45a8ff	782	if(huart->State == HAL_UART_STATE_BUSY_TX_RX)
bogdanm	0:9b334a45a8ff	783	{
bogdanm	0:9b334a45a8ff	784	huart->State = HAL_UART_STATE_BUSY_TX;
bogdanm	0:9b334a45a8ff	785	}
bogdanm	0:9b334a45a8ff	786	else
bogdanm	0:9b334a45a8ff	787	{
bogdanm	0:9b334a45a8ff	788	huart->State = HAL_UART_STATE_READY;
bogdanm	0:9b334a45a8ff	789	}
bogdanm	0:9b334a45a8ff	790	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	791	__HAL_UNLOCK(huart);
bogdanm	0:9b334a45a8ff	792
bogdanm	0:9b334a45a8ff	793	return HAL_OK;
bogdanm	0:9b334a45a8ff	794	}
bogdanm	0:9b334a45a8ff	795	else
bogdanm	0:9b334a45a8ff	796	{
bogdanm	0:9b334a45a8ff	797	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	798	}
bogdanm	0:9b334a45a8ff	799	}
bogdanm	0:9b334a45a8ff	800
bogdanm	0:9b334a45a8ff	801	/**
bogdanm	0:9b334a45a8ff	802	* @brief Sends an amount of data in non blocking mode.
bogdanm	0:9b334a45a8ff	803	* @param huart: Pointer to a UART_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	804	* the configuration information for the specified UART module.
bogdanm	0:9b334a45a8ff	805	* @param pData: Pointer to data buffer
bogdanm	0:9b334a45a8ff	806	* @param Size: Amount of data to be sent
bogdanm	0:9b334a45a8ff	807	* @retval HAL status
bogdanm	0:9b334a45a8ff	808	*/
bogdanm	0:9b334a45a8ff	809	HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef huart, uint8_t pData, uint16_t Size)
bogdanm	0:9b334a45a8ff	810	{
bogdanm	0:9b334a45a8ff	811	uint32_t tmp_state = 0;
bogdanm	0:9b334a45a8ff	812
bogdanm	0:9b334a45a8ff	813	tmp_state = huart->State;
bogdanm	0:9b334a45a8ff	814	if((tmp_state == HAL_UART_STATE_READY) \|\| (tmp_state == HAL_UART_STATE_BUSY_RX))
bogdanm	0:9b334a45a8ff	815	{
bogdanm	0:9b334a45a8ff	816	if((pData == NULL ) \|\| (Size == 0))
bogdanm	0:9b334a45a8ff	817	{
bogdanm	0:9b334a45a8ff	818	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	819	}
bogdanm	0:9b334a45a8ff	820
bogdanm	0:9b334a45a8ff	821	/* Process Locked */
bogdanm	0:9b334a45a8ff	822	__HAL_LOCK(huart);
bogdanm	0:9b334a45a8ff	823
bogdanm	0:9b334a45a8ff	824	huart->pTxBuffPtr = pData;
bogdanm	0:9b334a45a8ff	825	huart->TxXferSize = Size;
bogdanm	0:9b334a45a8ff	826	huart->TxXferCount = Size;
bogdanm	0:9b334a45a8ff	827
bogdanm	0:9b334a45a8ff	828	huart->ErrorCode = HAL_UART_ERROR_NONE;
bogdanm	0:9b334a45a8ff	829	/* Check if a receive process is ongoing or not */
bogdanm	0:9b334a45a8ff	830	if(huart->State == HAL_UART_STATE_BUSY_RX)
bogdanm	0:9b334a45a8ff	831	{
bogdanm	0:9b334a45a8ff	832	huart->State = HAL_UART_STATE_BUSY_TX_RX;
bogdanm	0:9b334a45a8ff	833	}
bogdanm	0:9b334a45a8ff	834	else
bogdanm	0:9b334a45a8ff	835	{
bogdanm	0:9b334a45a8ff	836	huart->State = HAL_UART_STATE_BUSY_TX;
bogdanm	0:9b334a45a8ff	837	}
bogdanm	0:9b334a45a8ff	838
bogdanm	0:9b334a45a8ff	839	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	840	__HAL_UNLOCK(huart);
bogdanm	0:9b334a45a8ff	841
bogdanm	0:9b334a45a8ff	842	/* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */
bogdanm	0:9b334a45a8ff	843	__HAL_UART_ENABLE_IT(huart, UART_IT_ERR);
bogdanm	0:9b334a45a8ff	844
bogdanm	0:9b334a45a8ff	845	/* Enable the UART Transmit data register empty Interrupt */
bogdanm	0:9b334a45a8ff	846	__HAL_UART_ENABLE_IT(huart, UART_IT_TXE);
bogdanm	0:9b334a45a8ff	847
bogdanm	0:9b334a45a8ff	848	return HAL_OK;
bogdanm	0:9b334a45a8ff	849	}
bogdanm	0:9b334a45a8ff	850	else
bogdanm	0:9b334a45a8ff	851	{
bogdanm	0:9b334a45a8ff	852	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	853	}
bogdanm	0:9b334a45a8ff	854	}
bogdanm	0:9b334a45a8ff	855
bogdanm	0:9b334a45a8ff	856	/**
bogdanm	0:9b334a45a8ff	857	* @brief Receives an amount of data in non blocking mode
bogdanm	0:9b334a45a8ff	858	* @param huart: Pointer to a UART_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	859	* the configuration information for the specified UART module.
bogdanm	0:9b334a45a8ff	860	* @param pData: Pointer to data buffer
bogdanm	0:9b334a45a8ff	861	* @param Size: Amount of data to be received
bogdanm	0:9b334a45a8ff	862	* @retval HAL status
bogdanm	0:9b334a45a8ff	863	*/
bogdanm	0:9b334a45a8ff	864	HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef huart, uint8_t pData, uint16_t Size)
bogdanm	0:9b334a45a8ff	865	{
bogdanm	0:9b334a45a8ff	866	uint32_t tmp_state = 0;
bogdanm	0:9b334a45a8ff	867
bogdanm	0:9b334a45a8ff	868	tmp_state = huart->State;
bogdanm	0:9b334a45a8ff	869	if((tmp_state == HAL_UART_STATE_READY) \|\| (tmp_state == HAL_UART_STATE_BUSY_TX))
bogdanm	0:9b334a45a8ff	870	{
bogdanm	0:9b334a45a8ff	871	if((pData == NULL ) \|\| (Size == 0))
bogdanm	0:9b334a45a8ff	872	{
bogdanm	0:9b334a45a8ff	873	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	874	}
bogdanm	0:9b334a45a8ff	875
bogdanm	0:9b334a45a8ff	876	/* Process Locked */
bogdanm	0:9b334a45a8ff	877	__HAL_LOCK(huart);
bogdanm	0:9b334a45a8ff	878
bogdanm	0:9b334a45a8ff	879	huart->pRxBuffPtr = pData;
bogdanm	0:9b334a45a8ff	880	huart->RxXferSize = Size;
bogdanm	0:9b334a45a8ff	881	huart->RxXferCount = Size;
bogdanm	0:9b334a45a8ff	882
bogdanm	0:9b334a45a8ff	883	huart->ErrorCode = HAL_UART_ERROR_NONE;
bogdanm	0:9b334a45a8ff	884	/* Check if a transmit process is ongoing or not */
bogdanm	0:9b334a45a8ff	885	if(huart->State == HAL_UART_STATE_BUSY_TX)
bogdanm	0:9b334a45a8ff	886	{
bogdanm	0:9b334a45a8ff	887	huart->State = HAL_UART_STATE_BUSY_TX_RX;
bogdanm	0:9b334a45a8ff	888	}
bogdanm	0:9b334a45a8ff	889	else
bogdanm	0:9b334a45a8ff	890	{
bogdanm	0:9b334a45a8ff	891	huart->State = HAL_UART_STATE_BUSY_RX;
bogdanm	0:9b334a45a8ff	892	}
bogdanm	0:9b334a45a8ff	893
bogdanm	0:9b334a45a8ff	894	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	895	__HAL_UNLOCK(huart);
bogdanm	0:9b334a45a8ff	896
bogdanm	0:9b334a45a8ff	897	/* Enable the UART Parity Error Interrupt */
bogdanm	0:9b334a45a8ff	898	__HAL_UART_ENABLE_IT(huart, UART_IT_PE);
bogdanm	0:9b334a45a8ff	899
bogdanm	0:9b334a45a8ff	900	/* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */
bogdanm	0:9b334a45a8ff	901	__HAL_UART_ENABLE_IT(huart, UART_IT_ERR);
bogdanm	0:9b334a45a8ff	902
bogdanm	0:9b334a45a8ff	903	/* Enable the UART Data Register not empty Interrupt */
bogdanm	0:9b334a45a8ff	904	__HAL_UART_ENABLE_IT(huart, UART_IT_RXNE);
bogdanm	0:9b334a45a8ff	905
bogdanm	0:9b334a45a8ff	906	return HAL_OK;
bogdanm	0:9b334a45a8ff	907	}
bogdanm	0:9b334a45a8ff	908	else
bogdanm	0:9b334a45a8ff	909	{
bogdanm	0:9b334a45a8ff	910	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	911	}
bogdanm	0:9b334a45a8ff	912	}
bogdanm	0:9b334a45a8ff	913
bogdanm	0:9b334a45a8ff	914	/**
bogdanm	0:9b334a45a8ff	915	* @brief Sends an amount of data in non blocking mode.
bogdanm	0:9b334a45a8ff	916	* @param huart: Pointer to a UART_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	917	* the configuration information for the specified UART module.
bogdanm	0:9b334a45a8ff	918	* @param pData: Pointer to data buffer
bogdanm	0:9b334a45a8ff	919	* @param Size: Amount of data to be sent
bogdanm	0:9b334a45a8ff	920	* @retval HAL status
bogdanm	0:9b334a45a8ff	921	*/
bogdanm	0:9b334a45a8ff	922	HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef huart, uint8_t pData, uint16_t Size)
bogdanm	0:9b334a45a8ff	923	{
bogdanm	0:9b334a45a8ff	924	uint32_t *tmp;
bogdanm	0:9b334a45a8ff	925	uint32_t tmp_state = 0;
bogdanm	0:9b334a45a8ff	926
bogdanm	0:9b334a45a8ff	927	tmp_state = huart->State;
bogdanm	0:9b334a45a8ff	928	if((tmp_state == HAL_UART_STATE_READY) \|\| (tmp_state == HAL_UART_STATE_BUSY_RX))
bogdanm	0:9b334a45a8ff	929	{
bogdanm	0:9b334a45a8ff	930	if((pData == NULL ) \|\| (Size == 0))
bogdanm	0:9b334a45a8ff	931	{
bogdanm	0:9b334a45a8ff	932	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	933	}
bogdanm	0:9b334a45a8ff	934
bogdanm	0:9b334a45a8ff	935	/* Process Locked */
bogdanm	0:9b334a45a8ff	936	__HAL_LOCK(huart);
bogdanm	0:9b334a45a8ff	937
bogdanm	0:9b334a45a8ff	938	huart->pTxBuffPtr = pData;
bogdanm	0:9b334a45a8ff	939	huart->TxXferSize = Size;
bogdanm	0:9b334a45a8ff	940	huart->TxXferCount = Size;
bogdanm	0:9b334a45a8ff	941
bogdanm	0:9b334a45a8ff	942	huart->ErrorCode = HAL_UART_ERROR_NONE;
bogdanm	0:9b334a45a8ff	943	/* Check if a receive process is ongoing or not */
bogdanm	0:9b334a45a8ff	944	if(huart->State == HAL_UART_STATE_BUSY_RX)
bogdanm	0:9b334a45a8ff	945	{
bogdanm	0:9b334a45a8ff	946	huart->State = HAL_UART_STATE_BUSY_TX_RX;
bogdanm	0:9b334a45a8ff	947	}
bogdanm	0:9b334a45a8ff	948	else
bogdanm	0:9b334a45a8ff	949	{
bogdanm	0:9b334a45a8ff	950	huart->State = HAL_UART_STATE_BUSY_TX;
bogdanm	0:9b334a45a8ff	951	}
bogdanm	0:9b334a45a8ff	952
bogdanm	0:9b334a45a8ff	953	/* Set the UART DMA transfer complete callback */
bogdanm	0:9b334a45a8ff	954	huart->hdmatx->XferCpltCallback = UART_DMATransmitCplt;
bogdanm	0:9b334a45a8ff	955
bogdanm	0:9b334a45a8ff	956	/* Set the UART DMA Half transfer complete callback */
bogdanm	0:9b334a45a8ff	957	huart->hdmatx->XferHalfCpltCallback = UART_DMATxHalfCplt;
bogdanm	0:9b334a45a8ff	958
bogdanm	0:9b334a45a8ff	959	/* Set the DMA error callback */
bogdanm	0:9b334a45a8ff	960	huart->hdmatx->XferErrorCallback = UART_DMAError;
bogdanm	0:9b334a45a8ff	961
bogdanm	0:9b334a45a8ff	962	/* Enable the UART transmit DMA channel */
bogdanm	0:9b334a45a8ff	963	tmp = (uint32_t*)&pData;
bogdanm	0:9b334a45a8ff	964	HAL_DMA_Start_IT(huart->hdmatx, (uint32_t)tmp, (uint32_t)&huart->Instance->DR, Size);
bogdanm	0:9b334a45a8ff	965
bogdanm	0:9b334a45a8ff	966	/* Clear the TC flag in the SR register by writing 0 to it */
bogdanm	0:9b334a45a8ff	967	__HAL_UART_CLEAR_FLAG(huart, UART_FLAG_TC);
bogdanm	0:9b334a45a8ff	968
bogdanm	0:9b334a45a8ff	969	/* Enable the DMA transfer for transmit request by setting the DMAT bit
bogdanm	0:9b334a45a8ff	970	in the UART CR3 register */
bogdanm	0:9b334a45a8ff	971	SET_BIT(huart->Instance->CR3, USART_CR3_DMAT);
bogdanm	0:9b334a45a8ff	972
bogdanm	0:9b334a45a8ff	973	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	974	__HAL_UNLOCK(huart);
bogdanm	0:9b334a45a8ff	975
bogdanm	0:9b334a45a8ff	976	return HAL_OK;
bogdanm	0:9b334a45a8ff	977	}
bogdanm	0:9b334a45a8ff	978	else
bogdanm	0:9b334a45a8ff	979	{
bogdanm	0:9b334a45a8ff	980	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	981	}
bogdanm	0:9b334a45a8ff	982	}
bogdanm	0:9b334a45a8ff	983
bogdanm	0:9b334a45a8ff	984	/**
bogdanm	0:9b334a45a8ff	985	* @brief Receives an amount of data in non blocking mode.
bogdanm	0:9b334a45a8ff	986	* @param huart: Pointer to a UART_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	987	* the configuration information for the specified UART module.
bogdanm	0:9b334a45a8ff	988	* @param pData: Pointer to data buffer
bogdanm	0:9b334a45a8ff	989	* @param Size: Amount of data to be received
bogdanm	0:9b334a45a8ff	990	* @note When the UART parity is enabled (PCE = 1), the received data contain
bogdanm	0:9b334a45a8ff	991	* the parity bit (MSB position)
bogdanm	0:9b334a45a8ff	992	* @retval HAL status
bogdanm	0:9b334a45a8ff	993	*/
bogdanm	0:9b334a45a8ff	994	HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef huart, uint8_t pData, uint16_t Size)
bogdanm	0:9b334a45a8ff	995	{
bogdanm	0:9b334a45a8ff	996	uint32_t *tmp;
bogdanm	0:9b334a45a8ff	997	uint32_t tmp_state = 0;
bogdanm	0:9b334a45a8ff	998
bogdanm	0:9b334a45a8ff	999	tmp_state = huart->State;
bogdanm	0:9b334a45a8ff	1000	if((tmp_state == HAL_UART_STATE_READY) \|\| (tmp_state == HAL_UART_STATE_BUSY_TX))
bogdanm	0:9b334a45a8ff	1001	{
bogdanm	0:9b334a45a8ff	1002	if((pData == NULL ) \|\| (Size == 0))
bogdanm	0:9b334a45a8ff	1003	{
bogdanm	0:9b334a45a8ff	1004	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	1005	}
bogdanm	0:9b334a45a8ff	1006
bogdanm	0:9b334a45a8ff	1007	/* Process Locked */
bogdanm	0:9b334a45a8ff	1008	__HAL_LOCK(huart);
bogdanm	0:9b334a45a8ff	1009
bogdanm	0:9b334a45a8ff	1010	huart->pRxBuffPtr = pData;
bogdanm	0:9b334a45a8ff	1011	huart->RxXferSize = Size;
bogdanm	0:9b334a45a8ff	1012
bogdanm	0:9b334a45a8ff	1013	huart->ErrorCode = HAL_UART_ERROR_NONE;
bogdanm	0:9b334a45a8ff	1014	/* Check if a transmit process is ongoing or not */
bogdanm	0:9b334a45a8ff	1015	if(huart->State == HAL_UART_STATE_BUSY_TX)
bogdanm	0:9b334a45a8ff	1016	{
bogdanm	0:9b334a45a8ff	1017	huart->State = HAL_UART_STATE_BUSY_TX_RX;
bogdanm	0:9b334a45a8ff	1018	}
bogdanm	0:9b334a45a8ff	1019	else
bogdanm	0:9b334a45a8ff	1020	{
bogdanm	0:9b334a45a8ff	1021	huart->State = HAL_UART_STATE_BUSY_RX;
bogdanm	0:9b334a45a8ff	1022	}
bogdanm	0:9b334a45a8ff	1023
bogdanm	0:9b334a45a8ff	1024	/* Set the UART DMA transfer complete callback */
bogdanm	0:9b334a45a8ff	1025	huart->hdmarx->XferCpltCallback = UART_DMAReceiveCplt;
bogdanm	0:9b334a45a8ff	1026
bogdanm	0:9b334a45a8ff	1027	/* Set the UART DMA Half transfer complete callback */
bogdanm	0:9b334a45a8ff	1028	huart->hdmarx->XferHalfCpltCallback = UART_DMARxHalfCplt;
bogdanm	0:9b334a45a8ff	1029
bogdanm	0:9b334a45a8ff	1030	/* Set the DMA error callback */
bogdanm	0:9b334a45a8ff	1031	huart->hdmarx->XferErrorCallback = UART_DMAError;
bogdanm	0:9b334a45a8ff	1032
bogdanm	0:9b334a45a8ff	1033	/* Enable the DMA channel */
bogdanm	0:9b334a45a8ff	1034	tmp = (uint32_t*)&pData;
bogdanm	0:9b334a45a8ff	1035	HAL_DMA_Start_IT(huart->hdmarx, (uint32_t)&huart->Instance->DR, (uint32_t)tmp, Size);
bogdanm	0:9b334a45a8ff	1036
bogdanm	0:9b334a45a8ff	1037	/* Enable the DMA transfer for the receiver request by setting the DMAR bit
bogdanm	0:9b334a45a8ff	1038	in the UART CR3 register */
bogdanm	0:9b334a45a8ff	1039	SET_BIT(huart->Instance->CR3, USART_CR3_DMAR);
bogdanm	0:9b334a45a8ff	1040
bogdanm	0:9b334a45a8ff	1041	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1042	__HAL_UNLOCK(huart);
bogdanm	0:9b334a45a8ff	1043
bogdanm	0:9b334a45a8ff	1044	return HAL_OK;
bogdanm	0:9b334a45a8ff	1045	}
bogdanm	0:9b334a45a8ff	1046	else
bogdanm	0:9b334a45a8ff	1047	{
bogdanm	0:9b334a45a8ff	1048	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	1049	}
bogdanm	0:9b334a45a8ff	1050	}
bogdanm	0:9b334a45a8ff	1051
bogdanm	0:9b334a45a8ff	1052	/**
bogdanm	0:9b334a45a8ff	1053	* @brief Pauses the DMA Transfer.
bogdanm	0:9b334a45a8ff	1054	* @param huart: Pointer to a UART_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	1055	* the configuration information for the specified UART module.
bogdanm	0:9b334a45a8ff	1056	* @retval HAL status
bogdanm	0:9b334a45a8ff	1057	*/
bogdanm	0:9b334a45a8ff	1058	HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	1059	{
bogdanm	0:9b334a45a8ff	1060	/* Process Locked */
bogdanm	0:9b334a45a8ff	1061	__HAL_LOCK(huart);
bogdanm	0:9b334a45a8ff	1062
bogdanm	0:9b334a45a8ff	1063	if(huart->State == HAL_UART_STATE_BUSY_TX)
bogdanm	0:9b334a45a8ff	1064	{
bogdanm	0:9b334a45a8ff	1065	/* Disable the UART DMA Tx request */
bogdanm	0:9b334a45a8ff	1066	CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
bogdanm	0:9b334a45a8ff	1067	}
bogdanm	0:9b334a45a8ff	1068	else if(huart->State == HAL_UART_STATE_BUSY_RX)
bogdanm	0:9b334a45a8ff	1069	{
bogdanm	0:9b334a45a8ff	1070	/* Disable the UART DMA Rx request */
bogdanm	0:9b334a45a8ff	1071	CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
bogdanm	0:9b334a45a8ff	1072	}
bogdanm	0:9b334a45a8ff	1073	else if (huart->State == HAL_UART_STATE_BUSY_TX_RX)
bogdanm	0:9b334a45a8ff	1074	{
bogdanm	0:9b334a45a8ff	1075	/* Disable the UART DMA Tx & Rx requests */
bogdanm	0:9b334a45a8ff	1076	CLEAR_BIT(huart->Instance->CR3, (USART_CR3_DMAT \| USART_CR3_DMAR));
bogdanm	0:9b334a45a8ff	1077	}
bogdanm	0:9b334a45a8ff	1078	else
bogdanm	0:9b334a45a8ff	1079	{
bogdanm	0:9b334a45a8ff	1080	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1081	__HAL_UNLOCK(huart);
bogdanm	0:9b334a45a8ff	1082
bogdanm	0:9b334a45a8ff	1083	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	1084	}
bogdanm	0:9b334a45a8ff	1085
bogdanm	0:9b334a45a8ff	1086	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1087	__HAL_UNLOCK(huart);
bogdanm	0:9b334a45a8ff	1088
bogdanm	0:9b334a45a8ff	1089	return HAL_OK;
bogdanm	0:9b334a45a8ff	1090	}
bogdanm	0:9b334a45a8ff	1091
bogdanm	0:9b334a45a8ff	1092	/**
bogdanm	0:9b334a45a8ff	1093	* @brief Resumes the DMA Transfer.
bogdanm	0:9b334a45a8ff	1094	* @param huart: Pointer to a UART_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	1095	* the configuration information for the specified UART module.
bogdanm	0:9b334a45a8ff	1096	* @retval HAL status
bogdanm	0:9b334a45a8ff	1097	*/
bogdanm	0:9b334a45a8ff	1098	HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	1099	{
bogdanm	0:9b334a45a8ff	1100	/* Process Locked */
bogdanm	0:9b334a45a8ff	1101	__HAL_LOCK(huart);
bogdanm	0:9b334a45a8ff	1102
bogdanm	0:9b334a45a8ff	1103	if(huart->State == HAL_UART_STATE_BUSY_TX)
bogdanm	0:9b334a45a8ff	1104	{
bogdanm	0:9b334a45a8ff	1105	/* Enable the UART DMA Tx request */
bogdanm	0:9b334a45a8ff	1106	SET_BIT(huart->Instance->CR3, USART_CR3_DMAT);
bogdanm	0:9b334a45a8ff	1107	}
bogdanm	0:9b334a45a8ff	1108	else if(huart->State == HAL_UART_STATE_BUSY_RX)
bogdanm	0:9b334a45a8ff	1109	{
bogdanm	0:9b334a45a8ff	1110	/* Clear the Overrun flag before resumming the Rx transfer*/
bogdanm	0:9b334a45a8ff	1111	__HAL_UART_CLEAR_OREFLAG(huart);
bogdanm	0:9b334a45a8ff	1112	/* Enable the UART DMA Rx request */
bogdanm	0:9b334a45a8ff	1113	SET_BIT(huart->Instance->CR3, USART_CR3_DMAR);
bogdanm	0:9b334a45a8ff	1114	}
bogdanm	0:9b334a45a8ff	1115	else if(huart->State == HAL_UART_STATE_BUSY_TX_RX)
bogdanm	0:9b334a45a8ff	1116	{
bogdanm	0:9b334a45a8ff	1117	/* Clear the Overrun flag before resumming the Rx transfer*/
bogdanm	0:9b334a45a8ff	1118	__HAL_UART_CLEAR_OREFLAG(huart);
bogdanm	0:9b334a45a8ff	1119	/* Enable the UART DMA Tx & Rx request */
bogdanm	0:9b334a45a8ff	1120	SET_BIT(huart->Instance->CR3, (USART_CR3_DMAT \| USART_CR3_DMAR));
bogdanm	0:9b334a45a8ff	1121	}
bogdanm	0:9b334a45a8ff	1122	else
bogdanm	0:9b334a45a8ff	1123	{
bogdanm	0:9b334a45a8ff	1124	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1125	__HAL_UNLOCK(huart);
bogdanm	0:9b334a45a8ff	1126
bogdanm	0:9b334a45a8ff	1127	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	1128	}
bogdanm	0:9b334a45a8ff	1129
bogdanm	0:9b334a45a8ff	1130	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1131	__HAL_UNLOCK(huart);
bogdanm	0:9b334a45a8ff	1132
bogdanm	0:9b334a45a8ff	1133	return HAL_OK;
bogdanm	0:9b334a45a8ff	1134	}
bogdanm	0:9b334a45a8ff	1135
bogdanm	0:9b334a45a8ff	1136	/**
bogdanm	0:9b334a45a8ff	1137	* @brief Stops the DMA Transfer.
bogdanm	0:9b334a45a8ff	1138	* @param huart: Pointer to a UART_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	1139	* the configuration information for the specified UART module.
bogdanm	0:9b334a45a8ff	1140	* @retval HAL status
bogdanm	0:9b334a45a8ff	1141	*/
bogdanm	0:9b334a45a8ff	1142	HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	1143	{
bogdanm	0:9b334a45a8ff	1144	/* The Lock is not implemented on this API to allow the user application
bogdanm	0:9b334a45a8ff	1145	to call the HAL UART API under callbacks HAL_UART_TxCpltCallback() / HAL_UART_RxCpltCallback():
bogdanm	0:9b334a45a8ff	1146	when calling HAL_DMA_Abort() API the DMA TX/RX Transfer complete interrupt is generated
bogdanm	0:9b334a45a8ff	1147	and the correspond call back is executed HAL_UART_TxCpltCallback() / HAL_UART_RxCpltCallback()
bogdanm	0:9b334a45a8ff	1148	*/
bogdanm	0:9b334a45a8ff	1149
bogdanm	0:9b334a45a8ff	1150	/* Disable the UART Tx/Rx DMA requests */
bogdanm	0:9b334a45a8ff	1151	CLEAR_BIT(huart->Instance->CR3, (USART_CR3_DMAT \| USART_CR3_DMAR));
bogdanm	0:9b334a45a8ff	1152
bogdanm	0:9b334a45a8ff	1153	/* Abort the UART DMA tx channel */
bogdanm	0:9b334a45a8ff	1154	if(huart->hdmatx != NULL)
bogdanm	0:9b334a45a8ff	1155	{
bogdanm	0:9b334a45a8ff	1156	HAL_DMA_Abort(huart->hdmatx);
bogdanm	0:9b334a45a8ff	1157	}
bogdanm	0:9b334a45a8ff	1158	/* Abort the UART DMA rx channel */
bogdanm	0:9b334a45a8ff	1159	if(huart->hdmarx != NULL)
bogdanm	0:9b334a45a8ff	1160	{
bogdanm	0:9b334a45a8ff	1161	HAL_DMA_Abort(huart->hdmarx);
bogdanm	0:9b334a45a8ff	1162	}
bogdanm	0:9b334a45a8ff	1163
bogdanm	0:9b334a45a8ff	1164	huart->State = HAL_UART_STATE_READY;
bogdanm	0:9b334a45a8ff	1165
bogdanm	0:9b334a45a8ff	1166	return HAL_OK;
bogdanm	0:9b334a45a8ff	1167	}
bogdanm	0:9b334a45a8ff	1168
bogdanm	0:9b334a45a8ff	1169	/**
bogdanm	0:9b334a45a8ff	1170	* @brief This function handles UART interrupt request.
bogdanm	0:9b334a45a8ff	1171	* @param huart: Pointer to a UART_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	1172	* the configuration information for the specified UART module.
bogdanm	0:9b334a45a8ff	1173	* @retval None
bogdanm	0:9b334a45a8ff	1174	*/
bogdanm	0:9b334a45a8ff	1175	void HAL_UART_IRQHandler(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	1176	{
bogdanm	0:9b334a45a8ff	1177	uint32_t tmp_flag = 0, tmp_it_source = 0;
bogdanm	0:9b334a45a8ff	1178
bogdanm	0:9b334a45a8ff	1179	tmp_flag = __HAL_UART_GET_FLAG(huart, UART_FLAG_PE);
bogdanm	0:9b334a45a8ff	1180	tmp_it_source = __HAL_UART_GET_IT_SOURCE(huart, UART_IT_PE);
bogdanm	0:9b334a45a8ff	1181	/* UART parity error interrupt occurred ------------------------------------*/
bogdanm	0:9b334a45a8ff	1182	if((tmp_flag != RESET) && (tmp_it_source != RESET))
bogdanm	0:9b334a45a8ff	1183	{
bogdanm	0:9b334a45a8ff	1184	__HAL_UART_CLEAR_PEFLAG(huart);
bogdanm	0:9b334a45a8ff	1185
bogdanm	0:9b334a45a8ff	1186	huart->ErrorCode \|= HAL_UART_ERROR_PE;
bogdanm	0:9b334a45a8ff	1187	}
bogdanm	0:9b334a45a8ff	1188
bogdanm	0:9b334a45a8ff	1189	tmp_flag = __HAL_UART_GET_FLAG(huart, UART_FLAG_FE);
bogdanm	0:9b334a45a8ff	1190	tmp_it_source = __HAL_UART_GET_IT_SOURCE(huart, UART_IT_ERR);
bogdanm	0:9b334a45a8ff	1191	/* UART frame error interrupt occurred -------------------------------------*/
bogdanm	0:9b334a45a8ff	1192	if((tmp_flag != RESET) && (tmp_it_source != RESET))
bogdanm	0:9b334a45a8ff	1193	{
bogdanm	0:9b334a45a8ff	1194	__HAL_UART_CLEAR_FEFLAG(huart);
bogdanm	0:9b334a45a8ff	1195
bogdanm	0:9b334a45a8ff	1196	huart->ErrorCode \|= HAL_UART_ERROR_FE;
bogdanm	0:9b334a45a8ff	1197	}
bogdanm	0:9b334a45a8ff	1198
bogdanm	0:9b334a45a8ff	1199	tmp_flag = __HAL_UART_GET_FLAG(huart, UART_FLAG_NE);
bogdanm	0:9b334a45a8ff	1200	/* UART noise error interrupt occurred -------------------------------------*/
bogdanm	0:9b334a45a8ff	1201	if((tmp_flag != RESET) && (tmp_it_source != RESET))
bogdanm	0:9b334a45a8ff	1202	{
bogdanm	0:9b334a45a8ff	1203	__HAL_UART_CLEAR_NEFLAG(huart);
bogdanm	0:9b334a45a8ff	1204
bogdanm	0:9b334a45a8ff	1205	huart->ErrorCode \|= HAL_UART_ERROR_NE;
bogdanm	0:9b334a45a8ff	1206	}
bogdanm	0:9b334a45a8ff	1207
bogdanm	0:9b334a45a8ff	1208	tmp_flag = __HAL_UART_GET_FLAG(huart, UART_FLAG_ORE);
bogdanm	0:9b334a45a8ff	1209	/* UART Over-Run interrupt occurred ----------------------------------------*/
bogdanm	0:9b334a45a8ff	1210	if((tmp_flag != RESET) && (tmp_it_source != RESET))
bogdanm	0:9b334a45a8ff	1211	{
bogdanm	0:9b334a45a8ff	1212	__HAL_UART_CLEAR_OREFLAG(huart);
bogdanm	0:9b334a45a8ff	1213
bogdanm	0:9b334a45a8ff	1214	huart->ErrorCode \|= HAL_UART_ERROR_ORE;
bogdanm	0:9b334a45a8ff	1215	}
bogdanm	0:9b334a45a8ff	1216
bogdanm	0:9b334a45a8ff	1217	tmp_flag = __HAL_UART_GET_FLAG(huart, UART_FLAG_RXNE);
bogdanm	0:9b334a45a8ff	1218	tmp_it_source = __HAL_UART_GET_IT_SOURCE(huart, UART_IT_RXNE);
bogdanm	0:9b334a45a8ff	1219	/* UART in mode Receiver ---------------------------------------------------*/
bogdanm	0:9b334a45a8ff	1220	if((tmp_flag != RESET) && (tmp_it_source != RESET))
bogdanm	0:9b334a45a8ff	1221	{
bogdanm	0:9b334a45a8ff	1222	UART_Receive_IT(huart);
bogdanm	0:9b334a45a8ff	1223	}
bogdanm	0:9b334a45a8ff	1224
bogdanm	0:9b334a45a8ff	1225	tmp_flag = __HAL_UART_GET_FLAG(huart, UART_FLAG_TXE);
bogdanm	0:9b334a45a8ff	1226	tmp_it_source = __HAL_UART_GET_IT_SOURCE(huart, UART_IT_TXE);
bogdanm	0:9b334a45a8ff	1227	/* UART in mode Transmitter ------------------------------------------------*/
bogdanm	0:9b334a45a8ff	1228	if((tmp_flag != RESET) && (tmp_it_source != RESET))
bogdanm	0:9b334a45a8ff	1229	{
bogdanm	0:9b334a45a8ff	1230	UART_Transmit_IT(huart);
bogdanm	0:9b334a45a8ff	1231	}
bogdanm	0:9b334a45a8ff	1232
bogdanm	0:9b334a45a8ff	1233	tmp_flag = __HAL_UART_GET_FLAG(huart, UART_FLAG_TC);
bogdanm	0:9b334a45a8ff	1234	tmp_it_source = __HAL_UART_GET_IT_SOURCE(huart, UART_IT_TC);
bogdanm	0:9b334a45a8ff	1235	/* UART in mode Transmitter end --------------------------------------------*/
bogdanm	0:9b334a45a8ff	1236	if((tmp_flag != RESET) && (tmp_it_source != RESET))
bogdanm	0:9b334a45a8ff	1237	{
bogdanm	0:9b334a45a8ff	1238	UART_EndTransmit_IT(huart);
bogdanm	0:9b334a45a8ff	1239	}
bogdanm	0:9b334a45a8ff	1240
bogdanm	0:9b334a45a8ff	1241	if(huart->ErrorCode != HAL_UART_ERROR_NONE)
bogdanm	0:9b334a45a8ff	1242	{
bogdanm	0:9b334a45a8ff	1243	/* Set the UART state ready to be able to start again the process */
bogdanm	0:9b334a45a8ff	1244	huart->State = HAL_UART_STATE_READY;
bogdanm	0:9b334a45a8ff	1245
bogdanm	0:9b334a45a8ff	1246	HAL_UART_ErrorCallback(huart);
bogdanm	0:9b334a45a8ff	1247	}
bogdanm	0:9b334a45a8ff	1248	}
bogdanm	0:9b334a45a8ff	1249
bogdanm	0:9b334a45a8ff	1250	/**
bogdanm	0:9b334a45a8ff	1251	* @brief Tx Transfer completed callbacks.
bogdanm	0:9b334a45a8ff	1252	* @param huart: Pointer to a UART_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	1253	* the configuration information for the specified UART module.
bogdanm	0:9b334a45a8ff	1254	* @retval None
bogdanm	0:9b334a45a8ff	1255	*/
bogdanm	0:9b334a45a8ff	1256	__weak void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	1257	{
bogdanm	0:9b334a45a8ff	1258	/* NOTE: This function should not be modified, when the callback is needed,
bogdanm	0:9b334a45a8ff	1259	the HAL_UART_TxCpltCallback can be implemented in the user file
bogdanm	0:9b334a45a8ff	1260	*/
bogdanm	0:9b334a45a8ff	1261	}
bogdanm	0:9b334a45a8ff	1262
bogdanm	0:9b334a45a8ff	1263	/**
bogdanm	0:9b334a45a8ff	1264	* @brief Tx Half Transfer completed callbacks.
bogdanm	0:9b334a45a8ff	1265	* @param huart: Pointer to a UART_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	1266	* the configuration information for the specified UART module.
bogdanm	0:9b334a45a8ff	1267	* @retval None
bogdanm	0:9b334a45a8ff	1268	*/
bogdanm	0:9b334a45a8ff	1269	__weak void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	1270	{
bogdanm	0:9b334a45a8ff	1271	/* NOTE: This function should not be modified, when the callback is needed,
bogdanm	0:9b334a45a8ff	1272	the HAL_UART_TxHalfCpltCallback can be implemented in the user file
bogdanm	0:9b334a45a8ff	1273	*/
bogdanm	0:9b334a45a8ff	1274	}
bogdanm	0:9b334a45a8ff	1275
bogdanm	0:9b334a45a8ff	1276	/**
bogdanm	0:9b334a45a8ff	1277	* @brief Rx Transfer completed callbacks.
bogdanm	0:9b334a45a8ff	1278	* @param huart: Pointer to a UART_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	1279	* the configuration information for the specified UART module.
bogdanm	0:9b334a45a8ff	1280	* @retval None
bogdanm	0:9b334a45a8ff	1281	*/
bogdanm	0:9b334a45a8ff	1282	__weak void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	1283	{
bogdanm	0:9b334a45a8ff	1284	/* NOTE: This function should not be modified, when the callback is needed,
bogdanm	0:9b334a45a8ff	1285	the HAL_UART_RxCpltCallback can be implemented in the user file
bogdanm	0:9b334a45a8ff	1286	*/
bogdanm	0:9b334a45a8ff	1287	}
bogdanm	0:9b334a45a8ff	1288
bogdanm	0:9b334a45a8ff	1289	/**
bogdanm	0:9b334a45a8ff	1290	* @brief Rx Half Transfer completed callbacks.
bogdanm	0:9b334a45a8ff	1291	* @param huart: Pointer to a UART_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	1292	* the configuration information for the specified UART module.
bogdanm	0:9b334a45a8ff	1293	* @retval None
bogdanm	0:9b334a45a8ff	1294	*/
bogdanm	0:9b334a45a8ff	1295	__weak void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	1296	{
bogdanm	0:9b334a45a8ff	1297	/* NOTE: This function should not be modified, when the callback is needed,
bogdanm	0:9b334a45a8ff	1298	the HAL_UART_RxHalfCpltCallback can be implemented in the user file
bogdanm	0:9b334a45a8ff	1299	*/
bogdanm	0:9b334a45a8ff	1300	}
bogdanm	0:9b334a45a8ff	1301
bogdanm	0:9b334a45a8ff	1302	/**
bogdanm	0:9b334a45a8ff	1303	* @brief UART error callbacks.
bogdanm	0:9b334a45a8ff	1304	* @param huart: Pointer to a UART_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	1305	* the configuration information for the specified UART module.
bogdanm	0:9b334a45a8ff	1306	* @retval None
bogdanm	0:9b334a45a8ff	1307	*/
bogdanm	0:9b334a45a8ff	1308	__weak void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	1309	{
bogdanm	0:9b334a45a8ff	1310	/* NOTE: This function should not be modified, when the callback is needed,
bogdanm	0:9b334a45a8ff	1311	the HAL_UART_ErrorCallback can be implemented in the user file
bogdanm	0:9b334a45a8ff	1312	*/
bogdanm	0:9b334a45a8ff	1313	}
bogdanm	0:9b334a45a8ff	1314
bogdanm	0:9b334a45a8ff	1315	/**
bogdanm	0:9b334a45a8ff	1316	* @}
bogdanm	0:9b334a45a8ff	1317	*/
bogdanm	0:9b334a45a8ff	1318
bogdanm	0:9b334a45a8ff	1319	/** @defgroup UART_Exported_Functions_Group3 Peripheral Control functions
bogdanm	0:9b334a45a8ff	1320	* @brief UART control functions
bogdanm	0:9b334a45a8ff	1321	*
bogdanm	0:9b334a45a8ff	1322	@verbatim
bogdanm	0:9b334a45a8ff	1323	==============================================================================
bogdanm	0:9b334a45a8ff	1324	##### Peripheral Control functions #####
bogdanm	0:9b334a45a8ff	1325	==============================================================================
bogdanm	0:9b334a45a8ff	1326	[..]
bogdanm	0:9b334a45a8ff	1327	This subsection provides a set of functions allowing to control the UART:
bogdanm	0:9b334a45a8ff	1328	(+) HAL_LIN_SendBreak() API can be helpful to transmit the break character.
bogdanm	0:9b334a45a8ff	1329	(+) HAL_MultiProcessor_EnterMuteMode() API can be helpful to enter the UART in mute mode.
bogdanm	0:9b334a45a8ff	1330	(+) HAL_MultiProcessor_ExitMuteMode() API can be helpful to exit the UART mute mode by software.
bogdanm	0:9b334a45a8ff	1331	(+) HAL_HalfDuplex_EnableTransmitter() API to enable the UART transmitter and disables the UART receiver in Half Duplex mode
bogdanm	0:9b334a45a8ff	1332	(+) HAL_HalfDuplex_EnableReceiver() API to enable the UART receiver and disables the UART transmitter in Half Duplex mode
bogdanm	0:9b334a45a8ff	1333
bogdanm	0:9b334a45a8ff	1334	@endverbatim
bogdanm	0:9b334a45a8ff	1335	* @{
bogdanm	0:9b334a45a8ff	1336	*/
bogdanm	0:9b334a45a8ff	1337
bogdanm	0:9b334a45a8ff	1338	/**
bogdanm	0:9b334a45a8ff	1339	* @brief Transmits break characters.
bogdanm	0:9b334a45a8ff	1340	* @param huart: Pointer to a UART_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	1341	* the configuration information for the specified UART module.
bogdanm	0:9b334a45a8ff	1342	* @retval HAL status
bogdanm	0:9b334a45a8ff	1343	*/
bogdanm	0:9b334a45a8ff	1344	HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	1345	{
bogdanm	0:9b334a45a8ff	1346	/* Check the parameters */
bogdanm	0:9b334a45a8ff	1347	assert_param(IS_UART_INSTANCE(huart->Instance));
bogdanm	0:9b334a45a8ff	1348
bogdanm	0:9b334a45a8ff	1349	/* Process Locked */
bogdanm	0:9b334a45a8ff	1350	__HAL_LOCK(huart);
bogdanm	0:9b334a45a8ff	1351
bogdanm	0:9b334a45a8ff	1352	huart->State = HAL_UART_STATE_BUSY;
bogdanm	0:9b334a45a8ff	1353
bogdanm	0:9b334a45a8ff	1354	/* Send break characters */
bogdanm	0:9b334a45a8ff	1355	SET_BIT(huart->Instance->CR1, USART_CR1_SBK);
bogdanm	0:9b334a45a8ff	1356
bogdanm	0:9b334a45a8ff	1357	huart->State = HAL_UART_STATE_READY;
bogdanm	0:9b334a45a8ff	1358
bogdanm	0:9b334a45a8ff	1359	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1360	__HAL_UNLOCK(huart);
bogdanm	0:9b334a45a8ff	1361
bogdanm	0:9b334a45a8ff	1362	return HAL_OK;
bogdanm	0:9b334a45a8ff	1363	}
bogdanm	0:9b334a45a8ff	1364
bogdanm	0:9b334a45a8ff	1365	/**
bogdanm	0:9b334a45a8ff	1366	* @brief Enters the UART in mute mode.
bogdanm	0:9b334a45a8ff	1367	* @param huart: Pointer to a UART_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	1368	* the configuration information for the specified UART module.
bogdanm	0:9b334a45a8ff	1369	* @retval HAL status
bogdanm	0:9b334a45a8ff	1370	*/
bogdanm	0:9b334a45a8ff	1371	HAL_StatusTypeDef HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	1372	{
bogdanm	0:9b334a45a8ff	1373	/* Check the parameters */
bogdanm	0:9b334a45a8ff	1374	assert_param(IS_UART_INSTANCE(huart->Instance));
bogdanm	0:9b334a45a8ff	1375
bogdanm	0:9b334a45a8ff	1376	/* Process Locked */
bogdanm	0:9b334a45a8ff	1377	__HAL_LOCK(huart);
bogdanm	0:9b334a45a8ff	1378
bogdanm	0:9b334a45a8ff	1379	huart->State = HAL_UART_STATE_BUSY;
bogdanm	0:9b334a45a8ff	1380
bogdanm	0:9b334a45a8ff	1381	/* Enable the USART mute mode by setting the RWU bit in the CR1 register */
bogdanm	0:9b334a45a8ff	1382	SET_BIT(huart->Instance->CR1, USART_CR1_RWU);
bogdanm	0:9b334a45a8ff	1383
bogdanm	0:9b334a45a8ff	1384	huart->State = HAL_UART_STATE_READY;
bogdanm	0:9b334a45a8ff	1385
bogdanm	0:9b334a45a8ff	1386	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1387	__HAL_UNLOCK(huart);
bogdanm	0:9b334a45a8ff	1388
bogdanm	0:9b334a45a8ff	1389	return HAL_OK;
bogdanm	0:9b334a45a8ff	1390	}
bogdanm	0:9b334a45a8ff	1391
bogdanm	0:9b334a45a8ff	1392	/**
bogdanm	0:9b334a45a8ff	1393	* @brief Exits the UART mute mode: wake up software.
bogdanm	0:9b334a45a8ff	1394	* @param huart: Pointer to a UART_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	1395	* the configuration information for the specified UART module.
bogdanm	0:9b334a45a8ff	1396	* @retval HAL status
bogdanm	0:9b334a45a8ff	1397	*/
bogdanm	0:9b334a45a8ff	1398	HAL_StatusTypeDef HAL_MultiProcessor_ExitMuteMode(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	1399	{
bogdanm	0:9b334a45a8ff	1400	/* Check the parameters */
bogdanm	0:9b334a45a8ff	1401	assert_param(IS_UART_INSTANCE(huart->Instance));
bogdanm	0:9b334a45a8ff	1402
bogdanm	0:9b334a45a8ff	1403	/* Process Locked */
bogdanm	0:9b334a45a8ff	1404	__HAL_LOCK(huart);
bogdanm	0:9b334a45a8ff	1405
bogdanm	0:9b334a45a8ff	1406	huart->State = HAL_UART_STATE_BUSY;
bogdanm	0:9b334a45a8ff	1407
bogdanm	0:9b334a45a8ff	1408	/* Disable the USART mute mode by clearing the RWU bit in the CR1 register */
bogdanm	0:9b334a45a8ff	1409	CLEAR_BIT(huart->Instance->CR1, USART_CR1_RWU);
bogdanm	0:9b334a45a8ff	1410
bogdanm	0:9b334a45a8ff	1411	huart->State = HAL_UART_STATE_READY;
bogdanm	0:9b334a45a8ff	1412
bogdanm	0:9b334a45a8ff	1413	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1414	__HAL_UNLOCK(huart);
bogdanm	0:9b334a45a8ff	1415
bogdanm	0:9b334a45a8ff	1416	return HAL_OK;
bogdanm	0:9b334a45a8ff	1417	}
bogdanm	0:9b334a45a8ff	1418
bogdanm	0:9b334a45a8ff	1419	/**
bogdanm	0:9b334a45a8ff	1420	* @brief Enables the UART transmitter and disables the UART receiver.
bogdanm	0:9b334a45a8ff	1421	* @param huart: Pointer to a UART_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	1422	* the configuration information for the specified UART module.
bogdanm	0:9b334a45a8ff	1423	* @retval HAL status
bogdanm	0:9b334a45a8ff	1424	*/
bogdanm	0:9b334a45a8ff	1425	HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	1426	{
bogdanm	0:9b334a45a8ff	1427	/* Process Locked */
bogdanm	0:9b334a45a8ff	1428	__HAL_LOCK(huart);
bogdanm	0:9b334a45a8ff	1429
bogdanm	0:9b334a45a8ff	1430	huart->State = HAL_UART_STATE_BUSY;
bogdanm	0:9b334a45a8ff	1431
bogdanm	0:9b334a45a8ff	1432	/-------------------------- USART CR1 Configuration -----------------------/
bogdanm	0:9b334a45a8ff	1433	/* Clear TE and RE bits */
bogdanm	0:9b334a45a8ff	1434	/* Enable the USART's transmit interface by setting the TE bit in the USART CR1 register */
bogdanm	0:9b334a45a8ff	1435	MODIFY_REG(huart->Instance->CR1, (uint32_t)(USART_CR1_TE \| USART_CR1_RE), USART_CR1_TE);
bogdanm	0:9b334a45a8ff	1436
bogdanm	0:9b334a45a8ff	1437	huart->State = HAL_UART_STATE_READY;
bogdanm	0:9b334a45a8ff	1438
bogdanm	0:9b334a45a8ff	1439	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1440	__HAL_UNLOCK(huart);
bogdanm	0:9b334a45a8ff	1441
bogdanm	0:9b334a45a8ff	1442	return HAL_OK;
bogdanm	0:9b334a45a8ff	1443	}
bogdanm	0:9b334a45a8ff	1444
bogdanm	0:9b334a45a8ff	1445	/**
bogdanm	0:9b334a45a8ff	1446	* @brief Enables the UART receiver and disables the UART transmitter.
bogdanm	0:9b334a45a8ff	1447	* @param huart: Pointer to a UART_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	1448	* the configuration information for the specified UART module.
bogdanm	0:9b334a45a8ff	1449	* @retval HAL status
bogdanm	0:9b334a45a8ff	1450	*/
bogdanm	0:9b334a45a8ff	1451	HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	1452	{
bogdanm	0:9b334a45a8ff	1453	/* Process Locked */
bogdanm	0:9b334a45a8ff	1454	__HAL_LOCK(huart);
bogdanm	0:9b334a45a8ff	1455
bogdanm	0:9b334a45a8ff	1456	huart->State = HAL_UART_STATE_BUSY;
bogdanm	0:9b334a45a8ff	1457
bogdanm	0:9b334a45a8ff	1458	/-------------------------- USART CR1 Configuration -----------------------/
bogdanm	0:9b334a45a8ff	1459	/* Clear TE and RE bits */
bogdanm	0:9b334a45a8ff	1460	/* Enable the USART's receive interface by setting the RE bit in the USART CR1 register */
bogdanm	0:9b334a45a8ff	1461	MODIFY_REG(huart->Instance->CR1, (uint32_t)(USART_CR1_TE \| USART_CR1_RE), USART_CR1_RE);
bogdanm	0:9b334a45a8ff	1462
bogdanm	0:9b334a45a8ff	1463	huart->State = HAL_UART_STATE_READY;
bogdanm	0:9b334a45a8ff	1464
bogdanm	0:9b334a45a8ff	1465	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1466	__HAL_UNLOCK(huart);
bogdanm	0:9b334a45a8ff	1467
bogdanm	0:9b334a45a8ff	1468	return HAL_OK;
bogdanm	0:9b334a45a8ff	1469	}
bogdanm	0:9b334a45a8ff	1470
bogdanm	0:9b334a45a8ff	1471	/**
bogdanm	0:9b334a45a8ff	1472	* @}
bogdanm	0:9b334a45a8ff	1473	*/
bogdanm	0:9b334a45a8ff	1474
bogdanm	0:9b334a45a8ff	1475	/** @defgroup UART_Exported_Functions_Group4 Peripheral State and Errors functions
bogdanm	0:9b334a45a8ff	1476	* @brief UART State and Errors functions
bogdanm	0:9b334a45a8ff	1477	*
bogdanm	0:9b334a45a8ff	1478	@verbatim
bogdanm	0:9b334a45a8ff	1479	==============================================================================
bogdanm	0:9b334a45a8ff	1480	##### Peripheral State and Errors functions #####
bogdanm	0:9b334a45a8ff	1481	==============================================================================
bogdanm	0:9b334a45a8ff	1482	[..]
bogdanm	0:9b334a45a8ff	1483	This subsection provides a set of functions allowing to return the State of
bogdanm	0:9b334a45a8ff	1484	UART communication process, return Peripheral Errors occurred during communication
bogdanm	0:9b334a45a8ff	1485	process
bogdanm	0:9b334a45a8ff	1486	(+) HAL_UART_GetState() API can be helpful to check in run-time the state of the UART peripheral.
bogdanm	0:9b334a45a8ff	1487	(+) HAL_UART_GetError() check in run-time errors that could be occurred during communication.
bogdanm	0:9b334a45a8ff	1488
bogdanm	0:9b334a45a8ff	1489	@endverbatim
bogdanm	0:9b334a45a8ff	1490	* @{
bogdanm	0:9b334a45a8ff	1491	*/
bogdanm	0:9b334a45a8ff	1492
bogdanm	0:9b334a45a8ff	1493	/**
bogdanm	0:9b334a45a8ff	1494	* @brief Returns the UART state.
bogdanm	0:9b334a45a8ff	1495	* @param huart: Pointer to a UART_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	1496	* the configuration information for the specified UART module.
bogdanm	0:9b334a45a8ff	1497	* @retval HAL state
bogdanm	0:9b334a45a8ff	1498	*/
bogdanm	0:9b334a45a8ff	1499	HAL_UART_StateTypeDef HAL_UART_GetState(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	1500	{
bogdanm	0:9b334a45a8ff	1501	return huart->State;
bogdanm	0:9b334a45a8ff	1502	}
bogdanm	0:9b334a45a8ff	1503
bogdanm	0:9b334a45a8ff	1504	/**
bogdanm	0:9b334a45a8ff	1505	* @brief Return the UART error code
bogdanm	0:9b334a45a8ff	1506	* @param huart: Pointer to a UART_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	1507	* the configuration information for the specified UART.
bogdanm	0:9b334a45a8ff	1508	* @retval UART Error Code
bogdanm	0:9b334a45a8ff	1509	*/
bogdanm	0:9b334a45a8ff	1510	uint32_t HAL_UART_GetError(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	1511	{
bogdanm	0:9b334a45a8ff	1512	return huart->ErrorCode;
bogdanm	0:9b334a45a8ff	1513	}
bogdanm	0:9b334a45a8ff	1514
bogdanm	0:9b334a45a8ff	1515	/**
bogdanm	0:9b334a45a8ff	1516	* @}
bogdanm	0:9b334a45a8ff	1517	*/
bogdanm	0:9b334a45a8ff	1518
bogdanm	0:9b334a45a8ff	1519	/**
bogdanm	0:9b334a45a8ff	1520	* @}
bogdanm	0:9b334a45a8ff	1521	*/
bogdanm	0:9b334a45a8ff	1522
bogdanm	0:9b334a45a8ff	1523	/** @defgroup UART_Private_Functions UART Private Functions
bogdanm	0:9b334a45a8ff	1524	* @brief UART Private functions
bogdanm	0:9b334a45a8ff	1525	* @{
bogdanm	0:9b334a45a8ff	1526	*/
bogdanm	0:9b334a45a8ff	1527	/**
bogdanm	0:9b334a45a8ff	1528	* @brief DMA UART transmit process complete callback.
bogdanm	0:9b334a45a8ff	1529	* @param hdma: Pointer to a DMA_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	1530	* the configuration information for the specified DMA module.
bogdanm	0:9b334a45a8ff	1531	* @retval None
bogdanm	0:9b334a45a8ff	1532	*/
bogdanm	0:9b334a45a8ff	1533	static void UART_DMATransmitCplt(DMA_HandleTypeDef *hdma)
bogdanm	0:9b334a45a8ff	1534	{
bogdanm	0:9b334a45a8ff	1535	UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
bogdanm	0:9b334a45a8ff	1536	/* DMA Normal mode*/
bogdanm	0:9b334a45a8ff	1537	if ( HAL_IS_BIT_CLR(hdma->Instance->CCR, DMA_CCR_CIRC) )
bogdanm	0:9b334a45a8ff	1538	{
bogdanm	0:9b334a45a8ff	1539	huart->TxXferCount = 0;
bogdanm	0:9b334a45a8ff	1540
bogdanm	0:9b334a45a8ff	1541	/* Disable the DMA transfer for transmit request by setting the DMAT bit
bogdanm	0:9b334a45a8ff	1542	in the UART CR3 register */
bogdanm	0:9b334a45a8ff	1543	CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
bogdanm	0:9b334a45a8ff	1544
bogdanm	0:9b334a45a8ff	1545	/* Enable the UART Transmit Complete Interrupt */
bogdanm	0:9b334a45a8ff	1546	__HAL_UART_ENABLE_IT(huart, UART_IT_TC);
bogdanm	0:9b334a45a8ff	1547	}
bogdanm	0:9b334a45a8ff	1548	/* DMA Circular mode */
bogdanm	0:9b334a45a8ff	1549	else
bogdanm	0:9b334a45a8ff	1550	{
bogdanm	0:9b334a45a8ff	1551	HAL_UART_TxCpltCallback(huart);
bogdanm	0:9b334a45a8ff	1552	}
bogdanm	0:9b334a45a8ff	1553	}
bogdanm	0:9b334a45a8ff	1554
bogdanm	0:9b334a45a8ff	1555	/**
bogdanm	0:9b334a45a8ff	1556	* @brief DMA UART transmit process half complete callback
bogdanm	0:9b334a45a8ff	1557	* @param hdma: Pointer to a DMA_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	1558	* the configuration information for the specified DMA module.
bogdanm	0:9b334a45a8ff	1559	* @retval None
bogdanm	0:9b334a45a8ff	1560	*/
bogdanm	0:9b334a45a8ff	1561	static void UART_DMATxHalfCplt(DMA_HandleTypeDef *hdma)
bogdanm	0:9b334a45a8ff	1562	{
bogdanm	0:9b334a45a8ff	1563	UART_HandleTypeDef* huart = (UART_HandleTypeDef)((DMA_HandleTypeDef)hdma)->Parent;
bogdanm	0:9b334a45a8ff	1564
bogdanm	0:9b334a45a8ff	1565	HAL_UART_TxHalfCpltCallback(huart);
bogdanm	0:9b334a45a8ff	1566	}
bogdanm	0:9b334a45a8ff	1567
bogdanm	0:9b334a45a8ff	1568	/**
bogdanm	0:9b334a45a8ff	1569	* @brief DMA UART receive process complete callback.
bogdanm	0:9b334a45a8ff	1570	* @param hdma: Pointer to a DMA_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	1571	* the configuration information for the specified DMA module.
bogdanm	0:9b334a45a8ff	1572	* @retval None
bogdanm	0:9b334a45a8ff	1573	*/
bogdanm	0:9b334a45a8ff	1574	static void UART_DMAReceiveCplt(DMA_HandleTypeDef *hdma)
bogdanm	0:9b334a45a8ff	1575	{
bogdanm	0:9b334a45a8ff	1576	UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
bogdanm	0:9b334a45a8ff	1577	/* DMA Normal mode*/
bogdanm	0:9b334a45a8ff	1578	if ( HAL_IS_BIT_CLR(hdma->Instance->CCR, DMA_CCR_CIRC) )
bogdanm	0:9b334a45a8ff	1579	{
bogdanm	0:9b334a45a8ff	1580	huart->RxXferCount = 0;
bogdanm	0:9b334a45a8ff	1581
bogdanm	0:9b334a45a8ff	1582	/* Disable the DMA transfer for the receiver request by setting the DMAR bit
bogdanm	0:9b334a45a8ff	1583	in the UART CR3 register */
bogdanm	0:9b334a45a8ff	1584	CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
bogdanm	0:9b334a45a8ff	1585
bogdanm	0:9b334a45a8ff	1586	/* Check if a transmit process is ongoing or not */
bogdanm	0:9b334a45a8ff	1587	if(huart->State == HAL_UART_STATE_BUSY_TX_RX)
bogdanm	0:9b334a45a8ff	1588	{
bogdanm	0:9b334a45a8ff	1589	huart->State = HAL_UART_STATE_BUSY_TX;
bogdanm	0:9b334a45a8ff	1590	}
bogdanm	0:9b334a45a8ff	1591	else
bogdanm	0:9b334a45a8ff	1592	{
bogdanm	0:9b334a45a8ff	1593	huart->State = HAL_UART_STATE_READY;
bogdanm	0:9b334a45a8ff	1594	}
bogdanm	0:9b334a45a8ff	1595	}
bogdanm	0:9b334a45a8ff	1596	HAL_UART_RxCpltCallback(huart);
bogdanm	0:9b334a45a8ff	1597	}
bogdanm	0:9b334a45a8ff	1598
bogdanm	0:9b334a45a8ff	1599	/**
bogdanm	0:9b334a45a8ff	1600	* @brief DMA UART receive process half complete callback
bogdanm	0:9b334a45a8ff	1601	* @param hdma: Pointer to a DMA_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	1602	* the configuration information for the specified DMA module.
bogdanm	0:9b334a45a8ff	1603	* @retval None
bogdanm	0:9b334a45a8ff	1604	*/
bogdanm	0:9b334a45a8ff	1605	static void UART_DMARxHalfCplt(DMA_HandleTypeDef *hdma)
bogdanm	0:9b334a45a8ff	1606	{
bogdanm	0:9b334a45a8ff	1607	UART_HandleTypeDef* huart = (UART_HandleTypeDef)((DMA_HandleTypeDef)hdma)->Parent;
bogdanm	0:9b334a45a8ff	1608
bogdanm	0:9b334a45a8ff	1609	HAL_UART_RxHalfCpltCallback(huart);
bogdanm	0:9b334a45a8ff	1610	}
bogdanm	0:9b334a45a8ff	1611
bogdanm	0:9b334a45a8ff	1612	/**
bogdanm	0:9b334a45a8ff	1613	* @brief DMA UART communication error callback.
bogdanm	0:9b334a45a8ff	1614	* @param hdma: Pointer to a DMA_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	1615	* the configuration information for the specified DMA module.
bogdanm	0:9b334a45a8ff	1616	* @retval None
bogdanm	0:9b334a45a8ff	1617	*/
bogdanm	0:9b334a45a8ff	1618	static void UART_DMAError(DMA_HandleTypeDef *hdma)
bogdanm	0:9b334a45a8ff	1619	{
bogdanm	0:9b334a45a8ff	1620	UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
bogdanm	0:9b334a45a8ff	1621	huart->RxXferCount = 0;
bogdanm	0:9b334a45a8ff	1622	huart->TxXferCount = 0;
bogdanm	0:9b334a45a8ff	1623	huart->State= HAL_UART_STATE_READY;
bogdanm	0:9b334a45a8ff	1624	huart->ErrorCode \|= HAL_UART_ERROR_DMA;
bogdanm	0:9b334a45a8ff	1625	HAL_UART_ErrorCallback(huart);
bogdanm	0:9b334a45a8ff	1626	}
bogdanm	0:9b334a45a8ff	1627
bogdanm	0:9b334a45a8ff	1628	/**
bogdanm	0:9b334a45a8ff	1629	* @brief This function handles UART Communication Timeout.
bogdanm	0:9b334a45a8ff	1630	* @param huart: Pointer to a UART_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	1631	* the configuration information for the specified UART module.
bogdanm	0:9b334a45a8ff	1632	* @param Flag: specifies the UART flag to check.
bogdanm	0:9b334a45a8ff	1633	* @param Status: The new Flag status (SET or RESET).
bogdanm	0:9b334a45a8ff	1634	* @param Timeout: Timeout duration
bogdanm	0:9b334a45a8ff	1635	* @retval HAL status
bogdanm	0:9b334a45a8ff	1636	*/
bogdanm	0:9b334a45a8ff	1637	static HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Timeout)
bogdanm	0:9b334a45a8ff	1638	{
bogdanm	0:9b334a45a8ff	1639	uint32_t tickstart = 0;
bogdanm	0:9b334a45a8ff	1640
bogdanm	0:9b334a45a8ff	1641	/* Get tick */
bogdanm	0:9b334a45a8ff	1642	tickstart = HAL_GetTick();
bogdanm	0:9b334a45a8ff	1643
bogdanm	0:9b334a45a8ff	1644	/* Wait until flag is set */
bogdanm	0:9b334a45a8ff	1645	if(Status == RESET)
bogdanm	0:9b334a45a8ff	1646	{
bogdanm	0:9b334a45a8ff	1647	while(__HAL_UART_GET_FLAG(huart, Flag) == RESET)
bogdanm	0:9b334a45a8ff	1648	{
bogdanm	0:9b334a45a8ff	1649	/* Check for the Timeout */
bogdanm	0:9b334a45a8ff	1650	if(Timeout != HAL_MAX_DELAY)
bogdanm	0:9b334a45a8ff	1651	{
bogdanm	0:9b334a45a8ff	1652	if((Timeout == 0)\|\|((HAL_GetTick() - tickstart ) > Timeout))
bogdanm	0:9b334a45a8ff	1653	{
bogdanm	0:9b334a45a8ff	1654	/* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
bogdanm	0:9b334a45a8ff	1655	__HAL_UART_DISABLE_IT(huart, UART_IT_TXE);
bogdanm	0:9b334a45a8ff	1656	__HAL_UART_DISABLE_IT(huart, UART_IT_RXNE);
bogdanm	0:9b334a45a8ff	1657	__HAL_UART_DISABLE_IT(huart, UART_IT_PE);
bogdanm	0:9b334a45a8ff	1658	__HAL_UART_DISABLE_IT(huart, UART_IT_ERR);
bogdanm	0:9b334a45a8ff	1659
bogdanm	0:9b334a45a8ff	1660	huart->State= HAL_UART_STATE_READY;
bogdanm	0:9b334a45a8ff	1661
bogdanm	0:9b334a45a8ff	1662	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1663	__HAL_UNLOCK(huart);
bogdanm	0:9b334a45a8ff	1664
bogdanm	0:9b334a45a8ff	1665	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	1666	}
bogdanm	0:9b334a45a8ff	1667	}
bogdanm	0:9b334a45a8ff	1668	}
bogdanm	0:9b334a45a8ff	1669	}
bogdanm	0:9b334a45a8ff	1670	else
bogdanm	0:9b334a45a8ff	1671	{
bogdanm	0:9b334a45a8ff	1672	while(__HAL_UART_GET_FLAG(huart, Flag) != RESET)
bogdanm	0:9b334a45a8ff	1673	{
bogdanm	0:9b334a45a8ff	1674	/* Check for the Timeout */
bogdanm	0:9b334a45a8ff	1675	if(Timeout != HAL_MAX_DELAY)
bogdanm	0:9b334a45a8ff	1676	{
bogdanm	0:9b334a45a8ff	1677	if((Timeout == 0)\|\|((HAL_GetTick() - tickstart ) > Timeout))
bogdanm	0:9b334a45a8ff	1678	{
bogdanm	0:9b334a45a8ff	1679	/* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
bogdanm	0:9b334a45a8ff	1680	__HAL_UART_DISABLE_IT(huart, UART_IT_TXE);
bogdanm	0:9b334a45a8ff	1681	__HAL_UART_DISABLE_IT(huart, UART_IT_RXNE);
bogdanm	0:9b334a45a8ff	1682	__HAL_UART_DISABLE_IT(huart, UART_IT_PE);
bogdanm	0:9b334a45a8ff	1683	__HAL_UART_DISABLE_IT(huart, UART_IT_ERR);
bogdanm	0:9b334a45a8ff	1684
bogdanm	0:9b334a45a8ff	1685	huart->State= HAL_UART_STATE_READY;
bogdanm	0:9b334a45a8ff	1686
bogdanm	0:9b334a45a8ff	1687	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1688	__HAL_UNLOCK(huart);
bogdanm	0:9b334a45a8ff	1689
bogdanm	0:9b334a45a8ff	1690	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	1691	}
bogdanm	0:9b334a45a8ff	1692	}
bogdanm	0:9b334a45a8ff	1693	}
bogdanm	0:9b334a45a8ff	1694	}
bogdanm	0:9b334a45a8ff	1695	return HAL_OK;
bogdanm	0:9b334a45a8ff	1696	}
bogdanm	0:9b334a45a8ff	1697
bogdanm	0:9b334a45a8ff	1698	/**
bogdanm	0:9b334a45a8ff	1699	* @brief Sends an amount of data in non blocking mode.
bogdanm	0:9b334a45a8ff	1700	* @param huart: Pointer to a UART_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	1701	* the configuration information for the specified UART module.
bogdanm	0:9b334a45a8ff	1702	* @retval HAL status
bogdanm	0:9b334a45a8ff	1703	*/
bogdanm	0:9b334a45a8ff	1704	static HAL_StatusTypeDef UART_Transmit_IT(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	1705	{
bogdanm	0:9b334a45a8ff	1706	uint16_t* tmp;
bogdanm	0:9b334a45a8ff	1707	uint32_t tmp_state = 0;
bogdanm	0:9b334a45a8ff	1708
bogdanm	0:9b334a45a8ff	1709	tmp_state = huart->State;
bogdanm	0:9b334a45a8ff	1710	if((tmp_state == HAL_UART_STATE_BUSY_TX) \|\| (tmp_state == HAL_UART_STATE_BUSY_TX_RX))
bogdanm	0:9b334a45a8ff	1711	{
bogdanm	0:9b334a45a8ff	1712	if(huart->Init.WordLength == UART_WORDLENGTH_9B)
bogdanm	0:9b334a45a8ff	1713	{
bogdanm	0:9b334a45a8ff	1714	tmp = (uint16_t*) huart->pTxBuffPtr;
bogdanm	0:9b334a45a8ff	1715	huart->Instance->DR = (uint16_t)(*tmp & (uint16_t)0x01FF);
bogdanm	0:9b334a45a8ff	1716	if(huart->Init.Parity == UART_PARITY_NONE)
bogdanm	0:9b334a45a8ff	1717	{
bogdanm	0:9b334a45a8ff	1718	huart->pTxBuffPtr += 2;
bogdanm	0:9b334a45a8ff	1719	}
bogdanm	0:9b334a45a8ff	1720	else
bogdanm	0:9b334a45a8ff	1721	{
bogdanm	0:9b334a45a8ff	1722	huart->pTxBuffPtr += 1;
bogdanm	0:9b334a45a8ff	1723	}
bogdanm	0:9b334a45a8ff	1724	}
bogdanm	0:9b334a45a8ff	1725	else
bogdanm	0:9b334a45a8ff	1726	{
bogdanm	0:9b334a45a8ff	1727	huart->Instance->DR = (uint8_t)(*huart->pTxBuffPtr++ & (uint8_t)0x00FF);
bogdanm	0:9b334a45a8ff	1728	}
bogdanm	0:9b334a45a8ff	1729
bogdanm	0:9b334a45a8ff	1730	if(--huart->TxXferCount == 0)
bogdanm	0:9b334a45a8ff	1731	{
bogdanm	0:9b334a45a8ff	1732	/* Disable the UART Transmit Complete Interrupt */
bogdanm	0:9b334a45a8ff	1733	__HAL_UART_DISABLE_IT(huart, UART_IT_TXE);
bogdanm	0:9b334a45a8ff	1734
bogdanm	0:9b334a45a8ff	1735	/* Enable the UART Transmit Complete Interrupt */
bogdanm	0:9b334a45a8ff	1736	__HAL_UART_ENABLE_IT(huart, UART_IT_TC);
bogdanm	0:9b334a45a8ff	1737	}
bogdanm	0:9b334a45a8ff	1738	return HAL_OK;
bogdanm	0:9b334a45a8ff	1739	}
bogdanm	0:9b334a45a8ff	1740	else
bogdanm	0:9b334a45a8ff	1741	{
bogdanm	0:9b334a45a8ff	1742	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	1743	}
bogdanm	0:9b334a45a8ff	1744	}
bogdanm	0:9b334a45a8ff	1745
bogdanm	0:9b334a45a8ff	1746
bogdanm	0:9b334a45a8ff	1747	/**
bogdanm	0:9b334a45a8ff	1748	* @brief Wraps up transmission in non blocking mode.
bogdanm	0:9b334a45a8ff	1749	* @param huart: pointer to a UART_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	1750	* the configuration information for the specified UART module.
bogdanm	0:9b334a45a8ff	1751	* @retval HAL status
bogdanm	0:9b334a45a8ff	1752	*/
bogdanm	0:9b334a45a8ff	1753	static HAL_StatusTypeDef UART_EndTransmit_IT(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	1754	{
bogdanm	0:9b334a45a8ff	1755	/* Disable the UART Transmit Complete Interrupt */
bogdanm	0:9b334a45a8ff	1756	__HAL_UART_DISABLE_IT(huart, UART_IT_TC);
bogdanm	0:9b334a45a8ff	1757
bogdanm	0:9b334a45a8ff	1758	/* Check if a receive process is ongoing or not */
bogdanm	0:9b334a45a8ff	1759	if(huart->State == HAL_UART_STATE_BUSY_TX_RX)
bogdanm	0:9b334a45a8ff	1760	{
bogdanm	0:9b334a45a8ff	1761	huart->State = HAL_UART_STATE_BUSY_RX;
bogdanm	0:9b334a45a8ff	1762	}
bogdanm	0:9b334a45a8ff	1763	else
bogdanm	0:9b334a45a8ff	1764	{
bogdanm	0:9b334a45a8ff	1765	/* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */
bogdanm	0:9b334a45a8ff	1766	__HAL_UART_DISABLE_IT(huart, UART_IT_ERR);
bogdanm	0:9b334a45a8ff	1767
bogdanm	0:9b334a45a8ff	1768	huart->State = HAL_UART_STATE_READY;
bogdanm	0:9b334a45a8ff	1769	}
bogdanm	0:9b334a45a8ff	1770
bogdanm	0:9b334a45a8ff	1771	HAL_UART_TxCpltCallback(huart);
bogdanm	0:9b334a45a8ff	1772
bogdanm	0:9b334a45a8ff	1773	return HAL_OK;
bogdanm	0:9b334a45a8ff	1774	}
bogdanm	0:9b334a45a8ff	1775
bogdanm	0:9b334a45a8ff	1776	/**
bogdanm	0:9b334a45a8ff	1777	* @brief Receives an amount of data in non blocking mode
bogdanm	0:9b334a45a8ff	1778	* @param huart: Pointer to a UART_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	1779	* the configuration information for the specified UART module.
bogdanm	0:9b334a45a8ff	1780	* @retval HAL status
bogdanm	0:9b334a45a8ff	1781	*/
bogdanm	0:9b334a45a8ff	1782	static HAL_StatusTypeDef UART_Receive_IT(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	1783	{
bogdanm	0:9b334a45a8ff	1784	uint16_t* tmp;
bogdanm	0:9b334a45a8ff	1785	uint32_t tmp_state = 0;
bogdanm	0:9b334a45a8ff	1786
bogdanm	0:9b334a45a8ff	1787	tmp_state = huart->State;
bogdanm	0:9b334a45a8ff	1788	if((tmp_state == HAL_UART_STATE_BUSY_RX) \|\| (tmp_state == HAL_UART_STATE_BUSY_TX_RX))
bogdanm	0:9b334a45a8ff	1789	{
bogdanm	0:9b334a45a8ff	1790	if(huart->Init.WordLength == UART_WORDLENGTH_9B)
bogdanm	0:9b334a45a8ff	1791	{
bogdanm	0:9b334a45a8ff	1792	tmp = (uint16_t*) huart->pRxBuffPtr;
bogdanm	0:9b334a45a8ff	1793	if(huart->Init.Parity == UART_PARITY_NONE)
bogdanm	0:9b334a45a8ff	1794	{
bogdanm	0:9b334a45a8ff	1795	*tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x01FF);
bogdanm	0:9b334a45a8ff	1796	huart->pRxBuffPtr += 2;
bogdanm	0:9b334a45a8ff	1797	}
bogdanm	0:9b334a45a8ff	1798	else
bogdanm	0:9b334a45a8ff	1799	{
bogdanm	0:9b334a45a8ff	1800	*tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x00FF);
bogdanm	0:9b334a45a8ff	1801	huart->pRxBuffPtr += 1;
bogdanm	0:9b334a45a8ff	1802	}
bogdanm	0:9b334a45a8ff	1803	}
bogdanm	0:9b334a45a8ff	1804	else
bogdanm	0:9b334a45a8ff	1805	{
bogdanm	0:9b334a45a8ff	1806	if(huart->Init.Parity == UART_PARITY_NONE)
bogdanm	0:9b334a45a8ff	1807	{
bogdanm	0:9b334a45a8ff	1808	*huart->pRxBuffPtr++ = (uint8_t)(huart->Instance->DR & (uint8_t)0x00FF);
bogdanm	0:9b334a45a8ff	1809	}
bogdanm	0:9b334a45a8ff	1810	else
bogdanm	0:9b334a45a8ff	1811	{
bogdanm	0:9b334a45a8ff	1812	*huart->pRxBuffPtr++ = (uint8_t)(huart->Instance->DR & (uint8_t)0x007F);
bogdanm	0:9b334a45a8ff	1813	}
bogdanm	0:9b334a45a8ff	1814	}
bogdanm	0:9b334a45a8ff	1815
bogdanm	0:9b334a45a8ff	1816	if(--huart->RxXferCount == 0)
bogdanm	0:9b334a45a8ff	1817	{
bogdanm	0:9b334a45a8ff	1818	__HAL_UART_DISABLE_IT(huart, UART_IT_RXNE);
bogdanm	0:9b334a45a8ff	1819
bogdanm	0:9b334a45a8ff	1820	/* Check if a transmit process is ongoing or not */
bogdanm	0:9b334a45a8ff	1821	if(huart->State == HAL_UART_STATE_BUSY_TX_RX)
bogdanm	0:9b334a45a8ff	1822	{
bogdanm	0:9b334a45a8ff	1823	huart->State = HAL_UART_STATE_BUSY_TX;
bogdanm	0:9b334a45a8ff	1824	}
bogdanm	0:9b334a45a8ff	1825	else
bogdanm	0:9b334a45a8ff	1826	{
bogdanm	0:9b334a45a8ff	1827	/* Disable the UART Parity Error Interrupt */
bogdanm	0:9b334a45a8ff	1828	__HAL_UART_DISABLE_IT(huart, UART_IT_PE);
bogdanm	0:9b334a45a8ff	1829
bogdanm	0:9b334a45a8ff	1830	/* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */
bogdanm	0:9b334a45a8ff	1831	__HAL_UART_DISABLE_IT(huart, UART_IT_ERR);
bogdanm	0:9b334a45a8ff	1832
bogdanm	0:9b334a45a8ff	1833	huart->State = HAL_UART_STATE_READY;
bogdanm	0:9b334a45a8ff	1834	}
bogdanm	0:9b334a45a8ff	1835	HAL_UART_RxCpltCallback(huart);
bogdanm	0:9b334a45a8ff	1836
bogdanm	0:9b334a45a8ff	1837	return HAL_OK;
bogdanm	0:9b334a45a8ff	1838	}
bogdanm	0:9b334a45a8ff	1839	return HAL_OK;
bogdanm	0:9b334a45a8ff	1840	}
bogdanm	0:9b334a45a8ff	1841	else
bogdanm	0:9b334a45a8ff	1842	{
bogdanm	0:9b334a45a8ff	1843	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	1844	}
bogdanm	0:9b334a45a8ff	1845	}
bogdanm	0:9b334a45a8ff	1846
bogdanm	0:9b334a45a8ff	1847	/**
bogdanm	0:9b334a45a8ff	1848	* @brief Configures the UART peripheral.
bogdanm	0:9b334a45a8ff	1849	* @param huart: Pointer to a UART_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	1850	* the configuration information for the specified UART module.
bogdanm	0:9b334a45a8ff	1851	* @retval None
bogdanm	0:9b334a45a8ff	1852	*/
bogdanm	0:9b334a45a8ff	1853	static void UART_SetConfig(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	1854	{
bogdanm	0:9b334a45a8ff	1855	uint32_t tmpreg = 0x00;
bogdanm	0:9b334a45a8ff	1856
bogdanm	0:9b334a45a8ff	1857	/* Check the parameters */
bogdanm	0:9b334a45a8ff	1858	assert_param(IS_UART_BAUDRATE(huart->Init.BaudRate));
bogdanm	0:9b334a45a8ff	1859	assert_param(IS_UART_STOPBITS(huart->Init.StopBits));
bogdanm	0:9b334a45a8ff	1860	assert_param(IS_UART_PARITY(huart->Init.Parity));
bogdanm	0:9b334a45a8ff	1861	assert_param(IS_UART_MODE(huart->Init.Mode));
bogdanm	0:9b334a45a8ff	1862
bogdanm	0:9b334a45a8ff	1863	/------- UART-associated USART registers setting : CR2 Configuration ------/
bogdanm	0:9b334a45a8ff	1864	/* Configure the UART Stop Bits: Set STOP[13:12] bits according
bogdanm	0:9b334a45a8ff	1865	* to huart->Init.StopBits value */
bogdanm	0:9b334a45a8ff	1866	MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits);
bogdanm	0:9b334a45a8ff	1867
bogdanm	0:9b334a45a8ff	1868	/------- UART-associated USART registers setting : CR1 Configuration ------/
bogdanm	0:9b334a45a8ff	1869	/* Configure the UART Word Length, Parity and mode:
bogdanm	0:9b334a45a8ff	1870	Set the M bits according to huart->Init.WordLength value
bogdanm	0:9b334a45a8ff	1871	Set PCE and PS bits according to huart->Init.Parity value
bogdanm	0:9b334a45a8ff	1872	Set TE and RE bits according to huart->Init.Mode value */
bogdanm	0:9b334a45a8ff	1873	tmpreg = (uint32_t)huart->Init.WordLength \| huart->Init.Parity \| huart->Init.Mode ;
bogdanm	0:9b334a45a8ff	1874	MODIFY_REG(huart->Instance->CR1,
bogdanm	0:9b334a45a8ff	1875	(uint32_t)(USART_CR1_M \| USART_CR1_PCE \| USART_CR1_PS \| USART_CR1_TE \| USART_CR1_RE),
bogdanm	0:9b334a45a8ff	1876	tmpreg);
bogdanm	0:9b334a45a8ff	1877
bogdanm	0:9b334a45a8ff	1878	/------- UART-associated USART registers setting : CR3 Configuration ------/
bogdanm	0:9b334a45a8ff	1879	/* Configure the UART HFC: Set CTSE and RTSE bits according to huart->Init.HwFlowCtl value */
bogdanm	0:9b334a45a8ff	1880	MODIFY_REG(huart->Instance->CR3, (USART_CR3_RTSE \| USART_CR3_CTSE), huart->Init.HwFlowCtl);
bogdanm	0:9b334a45a8ff	1881
bogdanm	0:9b334a45a8ff	1882	/------- UART-associated USART registers setting : BRR Configuration ------/
bogdanm	0:9b334a45a8ff	1883	if((huart->Instance == USART1))
bogdanm	0:9b334a45a8ff	1884	{
bogdanm	0:9b334a45a8ff	1885	huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK2Freq(), huart->Init.BaudRate);
bogdanm	0:9b334a45a8ff	1886	}
bogdanm	0:9b334a45a8ff	1887	else
bogdanm	0:9b334a45a8ff	1888	{
bogdanm	0:9b334a45a8ff	1889	huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate);
bogdanm	0:9b334a45a8ff	1890	}
bogdanm	0:9b334a45a8ff	1891	}
bogdanm	0:9b334a45a8ff	1892	/**
bogdanm	0:9b334a45a8ff	1893	* @}
bogdanm	0:9b334a45a8ff	1894	*/
bogdanm	0:9b334a45a8ff	1895
bogdanm	0:9b334a45a8ff	1896	#endif /* HAL_UART_MODULE_ENABLED */
bogdanm	0:9b334a45a8ff	1897	/**
bogdanm	0:9b334a45a8ff	1898	* @}
bogdanm	0:9b334a45a8ff	1899	*/
bogdanm	0:9b334a45a8ff	1900
bogdanm	0:9b334a45a8ff	1901	/**
bogdanm	0:9b334a45a8ff	1902	* @}
bogdanm	0:9b334a45a8ff	1903	*/
bogdanm	0:9b334a45a8ff	1904
bogdanm	0:9b334a45a8ff	1905	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/

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Type:	Library
Created:	16 May 2016
Imports:	1
Forks:	0
Commits:	130
Dependents:	1
Dependencies:	0
Followers:	1

targets/cmsis/TARGET_STM/TARGET_STM32F1/stm32f1xx_hal_uart.c@0:9b334a45a8ff, 2015-10-01 (annotated)

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