fix LPC812 PWM
Fork of mbed-dev by
targets/cmsis/TARGET_STM/TARGET_STM32F1/stm32f1xx_hal_sram.h@0:9b334a45a8ff, 2015-10-01 (annotated)
- Committer:
- bogdanm
- Date:
- Thu Oct 01 15:25:22 2015 +0300
- Revision:
- 0:9b334a45a8ff
- Child:
- 124:6a4a5b7d7324
Initial commit on mbed-dev
Replaces mbed-src (now inactive)
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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bogdanm | 0:9b334a45a8ff | 1 | /** |
bogdanm | 0:9b334a45a8ff | 2 | ****************************************************************************** |
bogdanm | 0:9b334a45a8ff | 3 | * @file stm32f1xx_hal_sram.h |
bogdanm | 0:9b334a45a8ff | 4 | * @author MCD Application Team |
bogdanm | 0:9b334a45a8ff | 5 | * @version V1.0.0 |
bogdanm | 0:9b334a45a8ff | 6 | * @date 15-December-2014 |
bogdanm | 0:9b334a45a8ff | 7 | * @brief Header file of SRAM HAL module. |
bogdanm | 0:9b334a45a8ff | 8 | ****************************************************************************** |
bogdanm | 0:9b334a45a8ff | 9 | * @attention |
bogdanm | 0:9b334a45a8ff | 10 | * |
bogdanm | 0:9b334a45a8ff | 11 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
bogdanm | 0:9b334a45a8ff | 12 | * |
bogdanm | 0:9b334a45a8ff | 13 | * Redistribution and use in source and binary forms, with or without modification, |
bogdanm | 0:9b334a45a8ff | 14 | * are permitted provided that the following conditions are met: |
bogdanm | 0:9b334a45a8ff | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
bogdanm | 0:9b334a45a8ff | 16 | * this list of conditions and the following disclaimer. |
bogdanm | 0:9b334a45a8ff | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
bogdanm | 0:9b334a45a8ff | 18 | * this list of conditions and the following disclaimer in the documentation |
bogdanm | 0:9b334a45a8ff | 19 | * and/or other materials provided with the distribution. |
bogdanm | 0:9b334a45a8ff | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
bogdanm | 0:9b334a45a8ff | 21 | * may be used to endorse or promote products derived from this software |
bogdanm | 0:9b334a45a8ff | 22 | * without specific prior written permission. |
bogdanm | 0:9b334a45a8ff | 23 | * |
bogdanm | 0:9b334a45a8ff | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
bogdanm | 0:9b334a45a8ff | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
bogdanm | 0:9b334a45a8ff | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
bogdanm | 0:9b334a45a8ff | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
bogdanm | 0:9b334a45a8ff | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
bogdanm | 0:9b334a45a8ff | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
bogdanm | 0:9b334a45a8ff | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
bogdanm | 0:9b334a45a8ff | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
bogdanm | 0:9b334a45a8ff | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
bogdanm | 0:9b334a45a8ff | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
bogdanm | 0:9b334a45a8ff | 34 | * |
bogdanm | 0:9b334a45a8ff | 35 | ****************************************************************************** |
bogdanm | 0:9b334a45a8ff | 36 | */ |
bogdanm | 0:9b334a45a8ff | 37 | |
bogdanm | 0:9b334a45a8ff | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 39 | #ifndef __STM32F1xx_HAL_SRAM_H |
bogdanm | 0:9b334a45a8ff | 40 | #define __STM32F1xx_HAL_SRAM_H |
bogdanm | 0:9b334a45a8ff | 41 | |
bogdanm | 0:9b334a45a8ff | 42 | #ifdef __cplusplus |
bogdanm | 0:9b334a45a8ff | 43 | extern "C" { |
bogdanm | 0:9b334a45a8ff | 44 | #endif |
bogdanm | 0:9b334a45a8ff | 45 | |
bogdanm | 0:9b334a45a8ff | 46 | /* Includes ------------------------------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 47 | #include "stm32f1xx_ll_fsmc.h" |
bogdanm | 0:9b334a45a8ff | 48 | |
bogdanm | 0:9b334a45a8ff | 49 | /** @addtogroup STM32F1xx_HAL_Driver |
bogdanm | 0:9b334a45a8ff | 50 | * @{ |
bogdanm | 0:9b334a45a8ff | 51 | */ |
bogdanm | 0:9b334a45a8ff | 52 | |
bogdanm | 0:9b334a45a8ff | 53 | #if defined (STM32F101xE) || defined(STM32F103xE) || defined(STM32F101xG) || defined(STM32F103xG) || defined(STM32F100xE) |
bogdanm | 0:9b334a45a8ff | 54 | |
bogdanm | 0:9b334a45a8ff | 55 | /** @addtogroup SRAM |
bogdanm | 0:9b334a45a8ff | 56 | * @{ |
bogdanm | 0:9b334a45a8ff | 57 | */ |
bogdanm | 0:9b334a45a8ff | 58 | |
bogdanm | 0:9b334a45a8ff | 59 | /* Exported typedef ----------------------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 60 | |
bogdanm | 0:9b334a45a8ff | 61 | /** @defgroup SRAM_Exported_Types SRAM Exported Types |
bogdanm | 0:9b334a45a8ff | 62 | * @{ |
bogdanm | 0:9b334a45a8ff | 63 | */ |
bogdanm | 0:9b334a45a8ff | 64 | /** |
bogdanm | 0:9b334a45a8ff | 65 | * @brief HAL SRAM State structures definition |
bogdanm | 0:9b334a45a8ff | 66 | */ |
bogdanm | 0:9b334a45a8ff | 67 | typedef enum |
bogdanm | 0:9b334a45a8ff | 68 | { |
bogdanm | 0:9b334a45a8ff | 69 | HAL_SRAM_STATE_RESET = 0x00, /*!< SRAM not yet initialized or disabled */ |
bogdanm | 0:9b334a45a8ff | 70 | HAL_SRAM_STATE_READY = 0x01, /*!< SRAM initialized and ready for use */ |
bogdanm | 0:9b334a45a8ff | 71 | HAL_SRAM_STATE_BUSY = 0x02, /*!< SRAM internal process is ongoing */ |
bogdanm | 0:9b334a45a8ff | 72 | HAL_SRAM_STATE_ERROR = 0x03, /*!< SRAM error state */ |
bogdanm | 0:9b334a45a8ff | 73 | HAL_SRAM_STATE_PROTECTED = 0x04 /*!< SRAM peripheral NORSRAM device write protected */ |
bogdanm | 0:9b334a45a8ff | 74 | |
bogdanm | 0:9b334a45a8ff | 75 | }HAL_SRAM_StateTypeDef; |
bogdanm | 0:9b334a45a8ff | 76 | |
bogdanm | 0:9b334a45a8ff | 77 | /** |
bogdanm | 0:9b334a45a8ff | 78 | * @brief SRAM handle Structure definition |
bogdanm | 0:9b334a45a8ff | 79 | */ |
bogdanm | 0:9b334a45a8ff | 80 | typedef struct |
bogdanm | 0:9b334a45a8ff | 81 | { |
bogdanm | 0:9b334a45a8ff | 82 | FSMC_NORSRAM_TypeDef *Instance; /*!< Register base address */ |
bogdanm | 0:9b334a45a8ff | 83 | |
bogdanm | 0:9b334a45a8ff | 84 | FSMC_NORSRAM_EXTENDED_TypeDef *Extended; /*!< Extended mode register base address */ |
bogdanm | 0:9b334a45a8ff | 85 | |
bogdanm | 0:9b334a45a8ff | 86 | FSMC_NORSRAM_InitTypeDef Init; /*!< SRAM device control configuration parameters */ |
bogdanm | 0:9b334a45a8ff | 87 | |
bogdanm | 0:9b334a45a8ff | 88 | HAL_LockTypeDef Lock; /*!< SRAM locking object */ |
bogdanm | 0:9b334a45a8ff | 89 | |
bogdanm | 0:9b334a45a8ff | 90 | __IO HAL_SRAM_StateTypeDef State; /*!< SRAM device access state */ |
bogdanm | 0:9b334a45a8ff | 91 | |
bogdanm | 0:9b334a45a8ff | 92 | DMA_HandleTypeDef *hdma; /*!< Pointer DMA handler */ |
bogdanm | 0:9b334a45a8ff | 93 | |
bogdanm | 0:9b334a45a8ff | 94 | }SRAM_HandleTypeDef; |
bogdanm | 0:9b334a45a8ff | 95 | |
bogdanm | 0:9b334a45a8ff | 96 | /** |
bogdanm | 0:9b334a45a8ff | 97 | * @} |
bogdanm | 0:9b334a45a8ff | 98 | */ |
bogdanm | 0:9b334a45a8ff | 99 | |
bogdanm | 0:9b334a45a8ff | 100 | /* Exported constants --------------------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 101 | /* Exported macro ------------------------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 102 | |
bogdanm | 0:9b334a45a8ff | 103 | /** @defgroup SRAM_Exported_Macros SRAM Exported Macros |
bogdanm | 0:9b334a45a8ff | 104 | * @{ |
bogdanm | 0:9b334a45a8ff | 105 | */ |
bogdanm | 0:9b334a45a8ff | 106 | |
bogdanm | 0:9b334a45a8ff | 107 | /** @brief Reset SRAM handle state |
bogdanm | 0:9b334a45a8ff | 108 | * @param __HANDLE__: SRAM handle |
bogdanm | 0:9b334a45a8ff | 109 | * @retval None |
bogdanm | 0:9b334a45a8ff | 110 | */ |
bogdanm | 0:9b334a45a8ff | 111 | #define __HAL_SRAM_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SRAM_STATE_RESET) |
bogdanm | 0:9b334a45a8ff | 112 | |
bogdanm | 0:9b334a45a8ff | 113 | /** |
bogdanm | 0:9b334a45a8ff | 114 | * @} |
bogdanm | 0:9b334a45a8ff | 115 | */ |
bogdanm | 0:9b334a45a8ff | 116 | |
bogdanm | 0:9b334a45a8ff | 117 | /* Exported functions --------------------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 118 | |
bogdanm | 0:9b334a45a8ff | 119 | /** @addtogroup SRAM_Exported_Functions |
bogdanm | 0:9b334a45a8ff | 120 | * @{ |
bogdanm | 0:9b334a45a8ff | 121 | */ |
bogdanm | 0:9b334a45a8ff | 122 | |
bogdanm | 0:9b334a45a8ff | 123 | /** @addtogroup SRAM_Exported_Functions_Group1 |
bogdanm | 0:9b334a45a8ff | 124 | * @{ |
bogdanm | 0:9b334a45a8ff | 125 | */ |
bogdanm | 0:9b334a45a8ff | 126 | |
bogdanm | 0:9b334a45a8ff | 127 | /* Initialization/de-initialization functions **********************************/ |
bogdanm | 0:9b334a45a8ff | 128 | HAL_StatusTypeDef HAL_SRAM_Init(SRAM_HandleTypeDef *hsram, FSMC_NORSRAM_TimingTypeDef *Timing, FSMC_NORSRAM_TimingTypeDef *ExtTiming); |
bogdanm | 0:9b334a45a8ff | 129 | HAL_StatusTypeDef HAL_SRAM_DeInit(SRAM_HandleTypeDef *hsram); |
bogdanm | 0:9b334a45a8ff | 130 | void HAL_SRAM_MspInit(SRAM_HandleTypeDef *hsram); |
bogdanm | 0:9b334a45a8ff | 131 | void HAL_SRAM_MspDeInit(SRAM_HandleTypeDef *hsram); |
bogdanm | 0:9b334a45a8ff | 132 | |
bogdanm | 0:9b334a45a8ff | 133 | void HAL_SRAM_DMA_XferCpltCallback(DMA_HandleTypeDef *hdma); |
bogdanm | 0:9b334a45a8ff | 134 | void HAL_SRAM_DMA_XferErrorCallback(DMA_HandleTypeDef *hdma); |
bogdanm | 0:9b334a45a8ff | 135 | |
bogdanm | 0:9b334a45a8ff | 136 | /** |
bogdanm | 0:9b334a45a8ff | 137 | * @} |
bogdanm | 0:9b334a45a8ff | 138 | */ |
bogdanm | 0:9b334a45a8ff | 139 | |
bogdanm | 0:9b334a45a8ff | 140 | /** @addtogroup SRAM_Exported_Functions_Group2 |
bogdanm | 0:9b334a45a8ff | 141 | * @{ |
bogdanm | 0:9b334a45a8ff | 142 | */ |
bogdanm | 0:9b334a45a8ff | 143 | |
bogdanm | 0:9b334a45a8ff | 144 | /* I/O operation functions *****************************************************/ |
bogdanm | 0:9b334a45a8ff | 145 | HAL_StatusTypeDef HAL_SRAM_Read_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pDstBuffer, uint32_t BufferSize); |
bogdanm | 0:9b334a45a8ff | 146 | HAL_StatusTypeDef HAL_SRAM_Write_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pSrcBuffer, uint32_t BufferSize); |
bogdanm | 0:9b334a45a8ff | 147 | HAL_StatusTypeDef HAL_SRAM_Read_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pDstBuffer, uint32_t BufferSize); |
bogdanm | 0:9b334a45a8ff | 148 | HAL_StatusTypeDef HAL_SRAM_Write_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pSrcBuffer, uint32_t BufferSize); |
bogdanm | 0:9b334a45a8ff | 149 | HAL_StatusTypeDef HAL_SRAM_Read_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize); |
bogdanm | 0:9b334a45a8ff | 150 | HAL_StatusTypeDef HAL_SRAM_Write_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize); |
bogdanm | 0:9b334a45a8ff | 151 | HAL_StatusTypeDef HAL_SRAM_Read_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize); |
bogdanm | 0:9b334a45a8ff | 152 | HAL_StatusTypeDef HAL_SRAM_Write_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize); |
bogdanm | 0:9b334a45a8ff | 153 | |
bogdanm | 0:9b334a45a8ff | 154 | /** |
bogdanm | 0:9b334a45a8ff | 155 | * @} |
bogdanm | 0:9b334a45a8ff | 156 | */ |
bogdanm | 0:9b334a45a8ff | 157 | |
bogdanm | 0:9b334a45a8ff | 158 | /** @addtogroup SRAM_Exported_Functions_Group3 |
bogdanm | 0:9b334a45a8ff | 159 | * @{ |
bogdanm | 0:9b334a45a8ff | 160 | */ |
bogdanm | 0:9b334a45a8ff | 161 | |
bogdanm | 0:9b334a45a8ff | 162 | /* SRAM Control functions ******************************************************/ |
bogdanm | 0:9b334a45a8ff | 163 | HAL_StatusTypeDef HAL_SRAM_WriteOperation_Enable(SRAM_HandleTypeDef *hsram); |
bogdanm | 0:9b334a45a8ff | 164 | HAL_StatusTypeDef HAL_SRAM_WriteOperation_Disable(SRAM_HandleTypeDef *hsram); |
bogdanm | 0:9b334a45a8ff | 165 | |
bogdanm | 0:9b334a45a8ff | 166 | /** |
bogdanm | 0:9b334a45a8ff | 167 | * @} |
bogdanm | 0:9b334a45a8ff | 168 | */ |
bogdanm | 0:9b334a45a8ff | 169 | |
bogdanm | 0:9b334a45a8ff | 170 | /** @addtogroup SRAM_Exported_Functions_Group4 |
bogdanm | 0:9b334a45a8ff | 171 | * @{ |
bogdanm | 0:9b334a45a8ff | 172 | */ |
bogdanm | 0:9b334a45a8ff | 173 | |
bogdanm | 0:9b334a45a8ff | 174 | /* SRAM State functions *********************************************************/ |
bogdanm | 0:9b334a45a8ff | 175 | HAL_SRAM_StateTypeDef HAL_SRAM_GetState(SRAM_HandleTypeDef *hsram); |
bogdanm | 0:9b334a45a8ff | 176 | |
bogdanm | 0:9b334a45a8ff | 177 | /** |
bogdanm | 0:9b334a45a8ff | 178 | * @} |
bogdanm | 0:9b334a45a8ff | 179 | */ |
bogdanm | 0:9b334a45a8ff | 180 | |
bogdanm | 0:9b334a45a8ff | 181 | /** |
bogdanm | 0:9b334a45a8ff | 182 | * @} |
bogdanm | 0:9b334a45a8ff | 183 | */ |
bogdanm | 0:9b334a45a8ff | 184 | |
bogdanm | 0:9b334a45a8ff | 185 | /** |
bogdanm | 0:9b334a45a8ff | 186 | * @} |
bogdanm | 0:9b334a45a8ff | 187 | */ |
bogdanm | 0:9b334a45a8ff | 188 | |
bogdanm | 0:9b334a45a8ff | 189 | #endif /* STM32F101xE || STM32F103xE || STM32F101xG || STM32F103xG || STM32F100xE */ |
bogdanm | 0:9b334a45a8ff | 190 | |
bogdanm | 0:9b334a45a8ff | 191 | /** |
bogdanm | 0:9b334a45a8ff | 192 | * @} |
bogdanm | 0:9b334a45a8ff | 193 | */ |
bogdanm | 0:9b334a45a8ff | 194 | |
bogdanm | 0:9b334a45a8ff | 195 | #ifdef __cplusplus |
bogdanm | 0:9b334a45a8ff | 196 | } |
bogdanm | 0:9b334a45a8ff | 197 | #endif |
bogdanm | 0:9b334a45a8ff | 198 | |
bogdanm | 0:9b334a45a8ff | 199 | #endif /* __STM32F1xx_HAL_SRAM_H */ |
bogdanm | 0:9b334a45a8ff | 200 | |
bogdanm | 0:9b334a45a8ff | 201 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |