mbed-dev - fix LPC812 PWM

Users » nameless129 » Code » mbed-dev

fix LPC812 PWM

targets/cmsis/TARGET_STM/TARGET_STM32F1/stm32f1xx_hal_flash_ex.c@0:9b334a45a8ff, 2015-10-01 (annotated)

Committer:: bogdanm
Date:: Thu Oct 01 15:25:22 2015 +0300
Revision:: 0:9b334a45a8ff
Child:: 124:6a4a5b7d7324

Initial commit on mbed-dev



Replaces mbed-src (now inactive)

Who changed what in which revision?

User	Revision	Line number	New contents of line
bogdanm	0:9b334a45a8ff	1	/**
bogdanm	0:9b334a45a8ff	2	******************************************************************************
bogdanm	0:9b334a45a8ff	3	* @file stm32f1xx_hal_flash_ex.c
bogdanm	0:9b334a45a8ff	4	* @author MCD Application Team
bogdanm	0:9b334a45a8ff	5	* @version V1.0.0
bogdanm	0:9b334a45a8ff	6	* @date 15-December-2014
bogdanm	0:9b334a45a8ff	7	* @brief Extended FLASH HAL module driver.
bogdanm	0:9b334a45a8ff	8	*
bogdanm	0:9b334a45a8ff	9	* This file provides firmware functions to manage the following
bogdanm	0:9b334a45a8ff	10	* functionalities of the FLASH peripheral:
bogdanm	0:9b334a45a8ff	11	* + Extended Initialization/de-initialization functions
bogdanm	0:9b334a45a8ff	12	* + Extended I/O operation functions
bogdanm	0:9b334a45a8ff	13	* + Extended Peripheral Control functions
bogdanm	0:9b334a45a8ff	14	*
bogdanm	0:9b334a45a8ff	15	@verbatim
bogdanm	0:9b334a45a8ff	16	==============================================================================
bogdanm	0:9b334a45a8ff	17	##### Flash peripheral extended features #####
bogdanm	0:9b334a45a8ff	18	==============================================================================
bogdanm	0:9b334a45a8ff	19
bogdanm	0:9b334a45a8ff	20	##### How to use this driver #####
bogdanm	0:9b334a45a8ff	21	==============================================================================
bogdanm	0:9b334a45a8ff	22	[..] This driver provides functions to configure and program the FLASH memory
bogdanm	0:9b334a45a8ff	23	of all STM32F1xxx devices. It includes
bogdanm	0:9b334a45a8ff	24
bogdanm	0:9b334a45a8ff	25	(++) Set/Reset the write protection
bogdanm	0:9b334a45a8ff	26	(++) Program the user Option Bytes
bogdanm	0:9b334a45a8ff	27	(++) Get the Read protection Level
bogdanm	0:9b334a45a8ff	28
bogdanm	0:9b334a45a8ff	29	@endverbatim
bogdanm	0:9b334a45a8ff	30	******************************************************************************
bogdanm	0:9b334a45a8ff	31	* @attention
bogdanm	0:9b334a45a8ff	32	*
bogdanm	0:9b334a45a8ff	33	* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
bogdanm	0:9b334a45a8ff	34	*
bogdanm	0:9b334a45a8ff	35	* Redistribution and use in source and binary forms, with or without modification,
bogdanm	0:9b334a45a8ff	36	* are permitted provided that the following conditions are met:
bogdanm	0:9b334a45a8ff	37	* 1. Redistributions of source code must retain the above copyright notice,
bogdanm	0:9b334a45a8ff	38	* this list of conditions and the following disclaimer.
bogdanm	0:9b334a45a8ff	39	* 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm	0:9b334a45a8ff	40	* this list of conditions and the following disclaimer in the documentation
bogdanm	0:9b334a45a8ff	41	* and/or other materials provided with the distribution.
bogdanm	0:9b334a45a8ff	42	* 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm	0:9b334a45a8ff	43	* may be used to endorse or promote products derived from this software
bogdanm	0:9b334a45a8ff	44	* without specific prior written permission.
bogdanm	0:9b334a45a8ff	45	*
bogdanm	0:9b334a45a8ff	46	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm	0:9b334a45a8ff	47	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm	0:9b334a45a8ff	48	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm	0:9b334a45a8ff	49	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm	0:9b334a45a8ff	50	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm	0:9b334a45a8ff	51	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm	0:9b334a45a8ff	52	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm	0:9b334a45a8ff	53	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm	0:9b334a45a8ff	54	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm	0:9b334a45a8ff	55	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm	0:9b334a45a8ff	56	*
bogdanm	0:9b334a45a8ff	57	******************************************************************************
bogdanm	0:9b334a45a8ff	58	*/
bogdanm	0:9b334a45a8ff	59
bogdanm	0:9b334a45a8ff	60	/* Includes ------------------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	61	#include "stm32f1xx_hal.h"
bogdanm	0:9b334a45a8ff	62
bogdanm	0:9b334a45a8ff	63	/** @addtogroup STM32F1xx_HAL_Driver
bogdanm	0:9b334a45a8ff	64	* @{
bogdanm	0:9b334a45a8ff	65	*/
bogdanm	0:9b334a45a8ff	66	#ifdef HAL_FLASH_MODULE_ENABLED
bogdanm	0:9b334a45a8ff	67
bogdanm	0:9b334a45a8ff	68	/** @addtogroup FLASH
bogdanm	0:9b334a45a8ff	69	* @{
bogdanm	0:9b334a45a8ff	70	*/
bogdanm	0:9b334a45a8ff	71	/** @addtogroup FLASH_Private_Variables
bogdanm	0:9b334a45a8ff	72	* @{
bogdanm	0:9b334a45a8ff	73	*/
bogdanm	0:9b334a45a8ff	74	/* Variables used for Erase pages under interruption*/
bogdanm	0:9b334a45a8ff	75	extern FLASH_ProcessTypeDef pFlash;
bogdanm	0:9b334a45a8ff	76	/**
bogdanm	0:9b334a45a8ff	77	* @}
bogdanm	0:9b334a45a8ff	78	*/
bogdanm	0:9b334a45a8ff	79
bogdanm	0:9b334a45a8ff	80	/**
bogdanm	0:9b334a45a8ff	81	* @}
bogdanm	0:9b334a45a8ff	82	*/
bogdanm	0:9b334a45a8ff	83
bogdanm	0:9b334a45a8ff	84	/** @defgroup FLASHEx FLASHEx
bogdanm	0:9b334a45a8ff	85	* @brief FLASH Extended HAL module driver
bogdanm	0:9b334a45a8ff	86	* @{
bogdanm	0:9b334a45a8ff	87	*/
bogdanm	0:9b334a45a8ff	88
bogdanm	0:9b334a45a8ff	89	/* Private typedef -----------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	90	/* Private define ------------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	91	/** @defgroup FLASHEx_Private_Constants FLASHEx Private Constants
bogdanm	0:9b334a45a8ff	92	* @{
bogdanm	0:9b334a45a8ff	93	*/
bogdanm	0:9b334a45a8ff	94	/**
bogdanm	0:9b334a45a8ff	95	* @}
bogdanm	0:9b334a45a8ff	96	*/
bogdanm	0:9b334a45a8ff	97
bogdanm	0:9b334a45a8ff	98	/* Private macro -------------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	99	/** @defgroup FLASHEx_Private_Macros FLASHEx Private Macros
bogdanm	0:9b334a45a8ff	100	* @{
bogdanm	0:9b334a45a8ff	101	*/
bogdanm	0:9b334a45a8ff	102	/**
bogdanm	0:9b334a45a8ff	103	* @}
bogdanm	0:9b334a45a8ff	104	*/
bogdanm	0:9b334a45a8ff	105
bogdanm	0:9b334a45a8ff	106	/* Private variables ---------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	107	/* Private function prototypes -----------------------------------------------*/
bogdanm	0:9b334a45a8ff	108	/** @defgroup FLASHEx_Private_Functions FLASHEx Private Functions
bogdanm	0:9b334a45a8ff	109	* @{
bogdanm	0:9b334a45a8ff	110	*/
bogdanm	0:9b334a45a8ff	111	/* Erase operations */
bogdanm	0:9b334a45a8ff	112	static void FLASH_MassErase(uint32_t Banks);
bogdanm	0:9b334a45a8ff	113
bogdanm	0:9b334a45a8ff	114	/* Option bytes control */
bogdanm	0:9b334a45a8ff	115	static HAL_StatusTypeDef FLASH_OB_EnableWRP(uint32_t WriteProtectPage);
bogdanm	0:9b334a45a8ff	116	static HAL_StatusTypeDef FLASH_OB_DisableWRP(uint32_t WriteProtectPage);
bogdanm	0:9b334a45a8ff	117	static HAL_StatusTypeDef FLASH_OB_RDP_LevelConfig(uint8_t ReadProtectLevel);
bogdanm	0:9b334a45a8ff	118	static HAL_StatusTypeDef FLASH_OB_UserConfig(uint8_t UserConfig);
bogdanm	0:9b334a45a8ff	119	static HAL_StatusTypeDef FLASH_OB_ProgramData(uint32_t Address, uint8_t Data);
bogdanm	0:9b334a45a8ff	120	static uint32_t FLASH_OB_GetWRP(void);
bogdanm	0:9b334a45a8ff	121	static FlagStatus FLASH_OB_GetRDP(void);
bogdanm	0:9b334a45a8ff	122	static uint8_t FLASH_OB_GetUser(void);
bogdanm	0:9b334a45a8ff	123
bogdanm	0:9b334a45a8ff	124	#if defined(STM32F101xG) \|\| defined(STM32F103xG)
bogdanm	0:9b334a45a8ff	125	/* State operations */
bogdanm	0:9b334a45a8ff	126	static HAL_StatusTypeDef FLASH_WaitForLastOperationBank2(uint32_t Timeout);
bogdanm	0:9b334a45a8ff	127	#endif
bogdanm	0:9b334a45a8ff	128	/**
bogdanm	0:9b334a45a8ff	129	* @}
bogdanm	0:9b334a45a8ff	130	*/
bogdanm	0:9b334a45a8ff	131
bogdanm	0:9b334a45a8ff	132	/* Exported functions ---------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	133	/** @defgroup FLASHEx_Exported_Functions FLASHEx Exported Functions
bogdanm	0:9b334a45a8ff	134	* @{
bogdanm	0:9b334a45a8ff	135	*/
bogdanm	0:9b334a45a8ff	136
bogdanm	0:9b334a45a8ff	137	/** @defgroup FLASHEx_Exported_Functions_Group1 Extended Input and Output operation functions
bogdanm	0:9b334a45a8ff	138	* @brief I/O operation functions
bogdanm	0:9b334a45a8ff	139	*
bogdanm	0:9b334a45a8ff	140	@verbatim
bogdanm	0:9b334a45a8ff	141	===============================================================================
bogdanm	0:9b334a45a8ff	142	##### IO operation functions #####
bogdanm	0:9b334a45a8ff	143	===============================================================================
bogdanm	0:9b334a45a8ff	144
bogdanm	0:9b334a45a8ff	145	@endverbatim
bogdanm	0:9b334a45a8ff	146	* @{
bogdanm	0:9b334a45a8ff	147	*/
bogdanm	0:9b334a45a8ff	148
bogdanm	0:9b334a45a8ff	149
bogdanm	0:9b334a45a8ff	150	/**
bogdanm	0:9b334a45a8ff	151	* @brief Perform a mass erase or erase the specified FLASH memory pages
bogdanm	0:9b334a45a8ff	152	* @note The function HAL_FLASH_Unlock() should be called before to unlock the FLASH interface
bogdanm	0:9b334a45a8ff	153	* The function HAL_FLASH_Lock() should be called after to lock the FLASH interface
bogdanm	0:9b334a45a8ff	154	* @param[in] pEraseInit: pointer to an FLASH_EraseInitTypeDef structure that
bogdanm	0:9b334a45a8ff	155	* contains the configuration information for the erasing.
bogdanm	0:9b334a45a8ff	156	*
bogdanm	0:9b334a45a8ff	157	* @param[out] PageError: pointer to variable that
bogdanm	0:9b334a45a8ff	158	* contains the configuration information on faulty page in case of error
bogdanm	0:9b334a45a8ff	159	* (0xFFFFFFFF means that all the pages have been correctly erased)
bogdanm	0:9b334a45a8ff	160	*
bogdanm	0:9b334a45a8ff	161	* @retval HAL_StatusTypeDef HAL Status
bogdanm	0:9b334a45a8ff	162	*/
bogdanm	0:9b334a45a8ff	163	HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef pEraseInit, uint32_t PageError)
bogdanm	0:9b334a45a8ff	164	{
bogdanm	0:9b334a45a8ff	165	HAL_StatusTypeDef status = HAL_ERROR;
bogdanm	0:9b334a45a8ff	166	uint32_t address = 0;
bogdanm	0:9b334a45a8ff	167
bogdanm	0:9b334a45a8ff	168	/* Process Locked */
bogdanm	0:9b334a45a8ff	169	__HAL_LOCK(&pFlash);
bogdanm	0:9b334a45a8ff	170
bogdanm	0:9b334a45a8ff	171	/* Check the parameters */
bogdanm	0:9b334a45a8ff	172	assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase));
bogdanm	0:9b334a45a8ff	173
bogdanm	0:9b334a45a8ff	174	if (pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE)
bogdanm	0:9b334a45a8ff	175	{
bogdanm	0:9b334a45a8ff	176	#if defined(STM32F101xG) \|\| defined(STM32F103xG)
bogdanm	0:9b334a45a8ff	177	if (pEraseInit->Banks == FLASH_BANK_BOTH)
bogdanm	0:9b334a45a8ff	178	{
bogdanm	0:9b334a45a8ff	179	/* Mass Erase requested for Bank1 and Bank2 */
bogdanm	0:9b334a45a8ff	180	/* Wait for last operation to be completed */
bogdanm	0:9b334a45a8ff	181	if ((FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK) && \
bogdanm	0:9b334a45a8ff	182	(FLASH_WaitForLastOperationBank2((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK))
bogdanm	0:9b334a45a8ff	183	{
bogdanm	0:9b334a45a8ff	184	/Mass erase to be done/
bogdanm	0:9b334a45a8ff	185	FLASH_MassErase(FLASH_BANK_BOTH);
bogdanm	0:9b334a45a8ff	186
bogdanm	0:9b334a45a8ff	187	/* Wait for last operation to be completed */
bogdanm	0:9b334a45a8ff	188	if ((FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK) && \
bogdanm	0:9b334a45a8ff	189	(FLASH_WaitForLastOperationBank2((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK))
bogdanm	0:9b334a45a8ff	190	{
bogdanm	0:9b334a45a8ff	191	status = HAL_OK;
bogdanm	0:9b334a45a8ff	192	}
bogdanm	0:9b334a45a8ff	193
bogdanm	0:9b334a45a8ff	194	/* If the erase operation is completed, disable the MER Bit */
bogdanm	0:9b334a45a8ff	195	CLEAR_BIT(FLASH->CR, FLASH_CR_MER);
bogdanm	0:9b334a45a8ff	196	CLEAR_BIT(FLASH->CR2, FLASH_CR2_MER);
bogdanm	0:9b334a45a8ff	197	}
bogdanm	0:9b334a45a8ff	198	}
bogdanm	0:9b334a45a8ff	199	else if (pEraseInit->Banks == FLASH_BANK_2)
bogdanm	0:9b334a45a8ff	200	{
bogdanm	0:9b334a45a8ff	201	/* Mass Erase requested for Bank2 */
bogdanm	0:9b334a45a8ff	202	/* Wait for last operation to be completed */
bogdanm	0:9b334a45a8ff	203	if (FLASH_WaitForLastOperationBank2((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK)
bogdanm	0:9b334a45a8ff	204	{
bogdanm	0:9b334a45a8ff	205	/Mass erase to be done/
bogdanm	0:9b334a45a8ff	206	FLASH_MassErase(FLASH_BANK_2);
bogdanm	0:9b334a45a8ff	207
bogdanm	0:9b334a45a8ff	208	/* Wait for last operation to be completed */
bogdanm	0:9b334a45a8ff	209	status = FLASH_WaitForLastOperationBank2((uint32_t)FLASH_TIMEOUT_VALUE);
bogdanm	0:9b334a45a8ff	210
bogdanm	0:9b334a45a8ff	211	/* If the erase operation is completed, disable the MER Bit */
bogdanm	0:9b334a45a8ff	212	CLEAR_BIT(FLASH->CR2, FLASH_CR2_MER);
bogdanm	0:9b334a45a8ff	213	}
bogdanm	0:9b334a45a8ff	214	}
bogdanm	0:9b334a45a8ff	215	else
bogdanm	0:9b334a45a8ff	216	#endif /* STM32F101xG \|\| STM32F103xG */
bogdanm	0:9b334a45a8ff	217	{
bogdanm	0:9b334a45a8ff	218	/* Mass Erase requested for Bank1 */
bogdanm	0:9b334a45a8ff	219	/* Wait for last operation to be completed */
bogdanm	0:9b334a45a8ff	220	if (FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK)
bogdanm	0:9b334a45a8ff	221	{
bogdanm	0:9b334a45a8ff	222	/Mass erase to be done/
bogdanm	0:9b334a45a8ff	223	FLASH_MassErase(FLASH_BANK_1);
bogdanm	0:9b334a45a8ff	224
bogdanm	0:9b334a45a8ff	225	/* Wait for last operation to be completed */
bogdanm	0:9b334a45a8ff	226	status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
bogdanm	0:9b334a45a8ff	227
bogdanm	0:9b334a45a8ff	228	/* If the erase operation is completed, disable the MER Bit */
bogdanm	0:9b334a45a8ff	229	CLEAR_BIT(FLASH->CR, FLASH_CR_MER);
bogdanm	0:9b334a45a8ff	230	}
bogdanm	0:9b334a45a8ff	231	}
bogdanm	0:9b334a45a8ff	232	}
bogdanm	0:9b334a45a8ff	233	else
bogdanm	0:9b334a45a8ff	234	{
bogdanm	0:9b334a45a8ff	235	/* Page Erase is requested */
bogdanm	0:9b334a45a8ff	236	/* Check the parameters */
bogdanm	0:9b334a45a8ff	237	assert_param(IS_FLASH_PROGRAM_ADDRESS(pEraseInit->PageAddress));
bogdanm	0:9b334a45a8ff	238	assert_param(IS_FLASH_NB_PAGES(pEraseInit->PageAddress, pEraseInit->NbPages));
bogdanm	0:9b334a45a8ff	239
bogdanm	0:9b334a45a8ff	240	#if defined(STM32F101xG) \|\| defined(STM32F103xG)
bogdanm	0:9b334a45a8ff	241	/* Page Erase requested on address located on bank2 */
bogdanm	0:9b334a45a8ff	242	if(pEraseInit->PageAddress > FLASH_BANK1_END)
bogdanm	0:9b334a45a8ff	243	{
bogdanm	0:9b334a45a8ff	244	/* Wait for last operation to be completed */
bogdanm	0:9b334a45a8ff	245	if (FLASH_WaitForLastOperationBank2((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK)
bogdanm	0:9b334a45a8ff	246	{
bogdanm	0:9b334a45a8ff	247	/Initialization of PageError variable/
bogdanm	0:9b334a45a8ff	248	*PageError = 0xFFFFFFFF;
bogdanm	0:9b334a45a8ff	249
bogdanm	0:9b334a45a8ff	250	/* Erase by page by page to be done*/
bogdanm	0:9b334a45a8ff	251	for(address = pEraseInit->PageAddress;
bogdanm	0:9b334a45a8ff	252	address < (pEraseInit->PageAddress + (pEraseInit->NbPages)*FLASH_PAGE_SIZE);
bogdanm	0:9b334a45a8ff	253	address += FLASH_PAGE_SIZE)
bogdanm	0:9b334a45a8ff	254	{
bogdanm	0:9b334a45a8ff	255	FLASH_PageErase(address);
bogdanm	0:9b334a45a8ff	256
bogdanm	0:9b334a45a8ff	257	/* Wait for last operation to be completed */
bogdanm	0:9b334a45a8ff	258	status = FLASH_WaitForLastOperationBank2((uint32_t)FLASH_TIMEOUT_VALUE);
bogdanm	0:9b334a45a8ff	259
bogdanm	0:9b334a45a8ff	260	/* If the erase operation is completed, disable the PER Bit */
bogdanm	0:9b334a45a8ff	261	CLEAR_BIT(FLASH->CR2, FLASH_CR2_PER);
bogdanm	0:9b334a45a8ff	262
bogdanm	0:9b334a45a8ff	263	if (status != HAL_OK)
bogdanm	0:9b334a45a8ff	264	{
bogdanm	0:9b334a45a8ff	265	/* In case of error, stop erase procedure and return the faulty address */
bogdanm	0:9b334a45a8ff	266	*PageError = address;
bogdanm	0:9b334a45a8ff	267	break;
bogdanm	0:9b334a45a8ff	268	}
bogdanm	0:9b334a45a8ff	269	}
bogdanm	0:9b334a45a8ff	270	}
bogdanm	0:9b334a45a8ff	271	}
bogdanm	0:9b334a45a8ff	272	else
bogdanm	0:9b334a45a8ff	273	#endif /* STM32F101xG \|\| STM32F103xG */
bogdanm	0:9b334a45a8ff	274	{
bogdanm	0:9b334a45a8ff	275	/* Page Erase requested on address located on bank1 */
bogdanm	0:9b334a45a8ff	276	/* Wait for last operation to be completed */
bogdanm	0:9b334a45a8ff	277	if (FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK)
bogdanm	0:9b334a45a8ff	278	{
bogdanm	0:9b334a45a8ff	279	if (pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE)
bogdanm	0:9b334a45a8ff	280	{
bogdanm	0:9b334a45a8ff	281	/Mass erase to be done/
bogdanm	0:9b334a45a8ff	282	FLASH_MassErase(pEraseInit->Banks);
bogdanm	0:9b334a45a8ff	283
bogdanm	0:9b334a45a8ff	284	/* Wait for last operation to be completed */
bogdanm	0:9b334a45a8ff	285	status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
bogdanm	0:9b334a45a8ff	286
bogdanm	0:9b334a45a8ff	287	/* If the erase operation is completed, disable the MER Bit */
bogdanm	0:9b334a45a8ff	288	CLEAR_BIT(FLASH->CR, FLASH_CR_MER);
bogdanm	0:9b334a45a8ff	289	}
bogdanm	0:9b334a45a8ff	290	else
bogdanm	0:9b334a45a8ff	291	{
bogdanm	0:9b334a45a8ff	292	/Initialization of PageError variable/
bogdanm	0:9b334a45a8ff	293	*PageError = 0xFFFFFFFF;
bogdanm	0:9b334a45a8ff	294
bogdanm	0:9b334a45a8ff	295	/* Erase by page by page to be done*/
bogdanm	0:9b334a45a8ff	296	for(address = pEraseInit->PageAddress;
bogdanm	0:9b334a45a8ff	297	address < (pEraseInit->PageAddress + (pEraseInit->NbPages)*FLASH_PAGE_SIZE);
bogdanm	0:9b334a45a8ff	298	address += FLASH_PAGE_SIZE)
bogdanm	0:9b334a45a8ff	299	{
bogdanm	0:9b334a45a8ff	300	FLASH_PageErase(address);
bogdanm	0:9b334a45a8ff	301
bogdanm	0:9b334a45a8ff	302	/* Wait for last operation to be completed */
bogdanm	0:9b334a45a8ff	303	status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
bogdanm	0:9b334a45a8ff	304
bogdanm	0:9b334a45a8ff	305	/* If the erase operation is completed, disable the PER Bit */
bogdanm	0:9b334a45a8ff	306	CLEAR_BIT(FLASH->CR, FLASH_CR_PER);
bogdanm	0:9b334a45a8ff	307
bogdanm	0:9b334a45a8ff	308	if (status != HAL_OK)
bogdanm	0:9b334a45a8ff	309	{
bogdanm	0:9b334a45a8ff	310	/* In case of error, stop erase procedure and return the faulty address */
bogdanm	0:9b334a45a8ff	311	*PageError = address;
bogdanm	0:9b334a45a8ff	312	break;
bogdanm	0:9b334a45a8ff	313	}
bogdanm	0:9b334a45a8ff	314	}
bogdanm	0:9b334a45a8ff	315	}
bogdanm	0:9b334a45a8ff	316	}
bogdanm	0:9b334a45a8ff	317	}
bogdanm	0:9b334a45a8ff	318	}
bogdanm	0:9b334a45a8ff	319
bogdanm	0:9b334a45a8ff	320	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	321	__HAL_UNLOCK(&pFlash);
bogdanm	0:9b334a45a8ff	322
bogdanm	0:9b334a45a8ff	323	return status;
bogdanm	0:9b334a45a8ff	324	}
bogdanm	0:9b334a45a8ff	325
bogdanm	0:9b334a45a8ff	326	/**
bogdanm	0:9b334a45a8ff	327	* @brief Perform a mass erase or erase the specified FLASH memory sectors with interrupt enabled
bogdanm	0:9b334a45a8ff	328	* @note The function HAL_FLASH_Unlock() should be called before to unlock the FLASH interface
bogdanm	0:9b334a45a8ff	329	* The function HAL_FLASH_Lock() should be called after to lock the FLASH interface
bogdanm	0:9b334a45a8ff	330	* @param pEraseInit: pointer to an FLASH_EraseInitTypeDef structure that
bogdanm	0:9b334a45a8ff	331	* contains the configuration information for the erasing.
bogdanm	0:9b334a45a8ff	332	*
bogdanm	0:9b334a45a8ff	333	* @retval HAL_StatusTypeDef HAL Status
bogdanm	0:9b334a45a8ff	334	*/
bogdanm	0:9b334a45a8ff	335	HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit)
bogdanm	0:9b334a45a8ff	336	{
bogdanm	0:9b334a45a8ff	337	HAL_StatusTypeDef status = HAL_OK;
bogdanm	0:9b334a45a8ff	338
bogdanm	0:9b334a45a8ff	339	/* Process Locked */
bogdanm	0:9b334a45a8ff	340	__HAL_LOCK(&pFlash);
bogdanm	0:9b334a45a8ff	341
bogdanm	0:9b334a45a8ff	342	/* If procedure already ongoing, reject the next one */
bogdanm	0:9b334a45a8ff	343	if (pFlash.ProcedureOnGoing != FLASH_PROC_NONE)
bogdanm	0:9b334a45a8ff	344	{
bogdanm	0:9b334a45a8ff	345	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	346	}
bogdanm	0:9b334a45a8ff	347
bogdanm	0:9b334a45a8ff	348	/* Check the parameters */
bogdanm	0:9b334a45a8ff	349	assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase));
bogdanm	0:9b334a45a8ff	350
bogdanm	0:9b334a45a8ff	351	/* Enable End of FLASH Operation and Error source interrupts */
bogdanm	0:9b334a45a8ff	352	__HAL_FLASH_ENABLE_IT((FLASH_IT_EOP \| FLASH_IT_ERR));
bogdanm	0:9b334a45a8ff	353
bogdanm	0:9b334a45a8ff	354	#if defined(STM32F101xG) \|\| defined(STM32F103xG)
bogdanm	0:9b334a45a8ff	355	/* Enable End of FLASH Operation and Error source interrupts */
bogdanm	0:9b334a45a8ff	356	__HAL_FLASH_ENABLE_IT((FLASH_IT_EOP_BANK2 \| FLASH_IT_ERR_BANK2));
bogdanm	0:9b334a45a8ff	357	#endif
bogdanm	0:9b334a45a8ff	358
bogdanm	0:9b334a45a8ff	359	if (pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE)
bogdanm	0:9b334a45a8ff	360	{
bogdanm	0:9b334a45a8ff	361	/Mass erase to be done/
bogdanm	0:9b334a45a8ff	362	pFlash.ProcedureOnGoing = FLASH_PROC_MASSERASE;
bogdanm	0:9b334a45a8ff	363	FLASH_MassErase(pEraseInit->Banks);
bogdanm	0:9b334a45a8ff	364	}
bogdanm	0:9b334a45a8ff	365	else
bogdanm	0:9b334a45a8ff	366	{
bogdanm	0:9b334a45a8ff	367	/* Erase by page to be done*/
bogdanm	0:9b334a45a8ff	368
bogdanm	0:9b334a45a8ff	369	/* Check the parameters */
bogdanm	0:9b334a45a8ff	370	assert_param(IS_FLASH_PROGRAM_ADDRESS(pEraseInit->PageAddress));
bogdanm	0:9b334a45a8ff	371	assert_param(IS_FLASH_NB_PAGES(pEraseInit->PageAddress, pEraseInit->NbPages));
bogdanm	0:9b334a45a8ff	372
bogdanm	0:9b334a45a8ff	373	pFlash.ProcedureOnGoing = FLASH_PROC_PAGEERASE;
bogdanm	0:9b334a45a8ff	374	pFlash.DataRemaining = pEraseInit->NbPages;
bogdanm	0:9b334a45a8ff	375	pFlash.Address = pEraseInit->PageAddress;
bogdanm	0:9b334a45a8ff	376
bogdanm	0:9b334a45a8ff	377	/Erase 1st page and wait for IT/
bogdanm	0:9b334a45a8ff	378	FLASH_PageErase(pEraseInit->PageAddress);
bogdanm	0:9b334a45a8ff	379	}
bogdanm	0:9b334a45a8ff	380
bogdanm	0:9b334a45a8ff	381	return status;
bogdanm	0:9b334a45a8ff	382	}
bogdanm	0:9b334a45a8ff	383
bogdanm	0:9b334a45a8ff	384	/**
bogdanm	0:9b334a45a8ff	385	* @}
bogdanm	0:9b334a45a8ff	386	*/
bogdanm	0:9b334a45a8ff	387
bogdanm	0:9b334a45a8ff	388	/** @defgroup FLASHEx_Exported_Functions_Group2 Extended Peripheral Control functions
bogdanm	0:9b334a45a8ff	389	* @brief Peripheral Control functions
bogdanm	0:9b334a45a8ff	390	*
bogdanm	0:9b334a45a8ff	391	@verbatim
bogdanm	0:9b334a45a8ff	392	===============================================================================
bogdanm	0:9b334a45a8ff	393	##### Peripheral Control functions #####
bogdanm	0:9b334a45a8ff	394	===============================================================================
bogdanm	0:9b334a45a8ff	395	[..]
bogdanm	0:9b334a45a8ff	396	This subsection provides a set of functions allowing to control the FLASH
bogdanm	0:9b334a45a8ff	397	memory operations.
bogdanm	0:9b334a45a8ff	398
bogdanm	0:9b334a45a8ff	399	@endverbatim
bogdanm	0:9b334a45a8ff	400	* @{
bogdanm	0:9b334a45a8ff	401	*/
bogdanm	0:9b334a45a8ff	402
bogdanm	0:9b334a45a8ff	403	/**
bogdanm	0:9b334a45a8ff	404	* @brief Erases the FLASH option bytes.
bogdanm	0:9b334a45a8ff	405	* @note This functions erases all option bytes except the Read protection (RDP).
bogdanm	0:9b334a45a8ff	406	* The function HAL_FLASH_Unlock() should be called before to unlock the FLASH interface
bogdanm	0:9b334a45a8ff	407	* The function HAL_FLASH_OB_Unlock() should be called before to unlock the options bytes
bogdanm	0:9b334a45a8ff	408	* The function HAL_FLASH_OB_Launch() should be called after to force the reload of the options bytes
bogdanm	0:9b334a45a8ff	409	* (system reset will occur)
bogdanm	0:9b334a45a8ff	410	* @retval HAL status
bogdanm	0:9b334a45a8ff	411	*/
bogdanm	0:9b334a45a8ff	412
bogdanm	0:9b334a45a8ff	413	HAL_StatusTypeDef HAL_FLASHEx_OBErase(void)
bogdanm	0:9b334a45a8ff	414	{
bogdanm	0:9b334a45a8ff	415	uint8_t rdptmp = OB_RDP_LEVEL_0;
bogdanm	0:9b334a45a8ff	416	HAL_StatusTypeDef status = HAL_ERROR;
bogdanm	0:9b334a45a8ff	417
bogdanm	0:9b334a45a8ff	418	/* Get the actual read protection Option Byte value */
bogdanm	0:9b334a45a8ff	419	if(FLASH_OB_GetRDP() != RESET)
bogdanm	0:9b334a45a8ff	420	{
bogdanm	0:9b334a45a8ff	421	rdptmp = OB_RDP_LEVEL_1;
bogdanm	0:9b334a45a8ff	422	}
bogdanm	0:9b334a45a8ff	423
bogdanm	0:9b334a45a8ff	424	/* Wait for last operation to be completed */
bogdanm	0:9b334a45a8ff	425	status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
bogdanm	0:9b334a45a8ff	426
bogdanm	0:9b334a45a8ff	427	if(status == HAL_OK)
bogdanm	0:9b334a45a8ff	428	{
bogdanm	0:9b334a45a8ff	429	/* Clean the error context */
bogdanm	0:9b334a45a8ff	430	pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
bogdanm	0:9b334a45a8ff	431
bogdanm	0:9b334a45a8ff	432	/* If the previous operation is completed, proceed to erase the option bytes */
bogdanm	0:9b334a45a8ff	433	SET_BIT(FLASH->CR, FLASH_CR_OPTER);
bogdanm	0:9b334a45a8ff	434	SET_BIT(FLASH->CR, FLASH_CR_STRT);
bogdanm	0:9b334a45a8ff	435
bogdanm	0:9b334a45a8ff	436	/* Wait for last operation to be completed */
bogdanm	0:9b334a45a8ff	437	status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
bogdanm	0:9b334a45a8ff	438
bogdanm	0:9b334a45a8ff	439	/* If the erase operation is completed, disable the OPTER Bit */
bogdanm	0:9b334a45a8ff	440	CLEAR_BIT(FLASH->CR, FLASH_CR_OPTER);
bogdanm	0:9b334a45a8ff	441
bogdanm	0:9b334a45a8ff	442	if(status == HAL_OK)
bogdanm	0:9b334a45a8ff	443	{
bogdanm	0:9b334a45a8ff	444	/* Restore the last read protection Option Byte value */
bogdanm	0:9b334a45a8ff	445	status = FLASH_OB_RDP_LevelConfig(rdptmp);
bogdanm	0:9b334a45a8ff	446	}
bogdanm	0:9b334a45a8ff	447	}
bogdanm	0:9b334a45a8ff	448
bogdanm	0:9b334a45a8ff	449	/* Return the erase status */
bogdanm	0:9b334a45a8ff	450	return status;
bogdanm	0:9b334a45a8ff	451	}
bogdanm	0:9b334a45a8ff	452
bogdanm	0:9b334a45a8ff	453	/**
bogdanm	0:9b334a45a8ff	454	* @brief Program option bytes
bogdanm	0:9b334a45a8ff	455	* @note The function HAL_FLASH_Unlock() should be called before to unlock the FLASH interface
bogdanm	0:9b334a45a8ff	456	* The function HAL_FLASH_OB_Unlock() should be called before to unlock the options bytes
bogdanm	0:9b334a45a8ff	457	* The function HAL_FLASH_OB_Launch() should be called after to force the reload of the options bytes
bogdanm	0:9b334a45a8ff	458	* (system reset will occur)
bogdanm	0:9b334a45a8ff	459	*
bogdanm	0:9b334a45a8ff	460	* @param pOBInit: pointer to an FLASH_OBInitStruct structure that
bogdanm	0:9b334a45a8ff	461	* contains the configuration information for the programming.
bogdanm	0:9b334a45a8ff	462	*
bogdanm	0:9b334a45a8ff	463	* @retval HAL_StatusTypeDef HAL Status
bogdanm	0:9b334a45a8ff	464	*/
bogdanm	0:9b334a45a8ff	465	HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit)
bogdanm	0:9b334a45a8ff	466	{
bogdanm	0:9b334a45a8ff	467	HAL_StatusTypeDef status = HAL_ERROR;
bogdanm	0:9b334a45a8ff	468
bogdanm	0:9b334a45a8ff	469	/* Check the parameters */
bogdanm	0:9b334a45a8ff	470	assert_param(IS_OPTIONBYTE(pOBInit->OptionType));
bogdanm	0:9b334a45a8ff	471
bogdanm	0:9b334a45a8ff	472	/* Write protection configuration */
bogdanm	0:9b334a45a8ff	473	if((pOBInit->OptionType & OPTIONBYTE_WRP) == OPTIONBYTE_WRP)
bogdanm	0:9b334a45a8ff	474	{
bogdanm	0:9b334a45a8ff	475	assert_param(IS_WRPSTATE(pOBInit->WRPState));
bogdanm	0:9b334a45a8ff	476	if (pOBInit->WRPState == OB_WRPSTATE_ENABLE)
bogdanm	0:9b334a45a8ff	477	{
bogdanm	0:9b334a45a8ff	478	/* Enable of Write protection on the selected page */
bogdanm	0:9b334a45a8ff	479	status = FLASH_OB_EnableWRP(pOBInit->WRPPage);
bogdanm	0:9b334a45a8ff	480	}
bogdanm	0:9b334a45a8ff	481	else
bogdanm	0:9b334a45a8ff	482	{
bogdanm	0:9b334a45a8ff	483	/* Disable of Write protection on the selected page */
bogdanm	0:9b334a45a8ff	484	status = FLASH_OB_DisableWRP(pOBInit->WRPPage);
bogdanm	0:9b334a45a8ff	485	}
bogdanm	0:9b334a45a8ff	486	}
bogdanm	0:9b334a45a8ff	487
bogdanm	0:9b334a45a8ff	488	/* Read protection configuration */
bogdanm	0:9b334a45a8ff	489	if((pOBInit->OptionType & OPTIONBYTE_RDP) == OPTIONBYTE_RDP)
bogdanm	0:9b334a45a8ff	490	{
bogdanm	0:9b334a45a8ff	491	status = FLASH_OB_RDP_LevelConfig(pOBInit->RDPLevel);
bogdanm	0:9b334a45a8ff	492	}
bogdanm	0:9b334a45a8ff	493
bogdanm	0:9b334a45a8ff	494	/* USER configuration */
bogdanm	0:9b334a45a8ff	495	if((pOBInit->OptionType & OPTIONBYTE_USER) == OPTIONBYTE_USER)
bogdanm	0:9b334a45a8ff	496	{
bogdanm	0:9b334a45a8ff	497	status = FLASH_OB_UserConfig(pOBInit->USERConfig);
bogdanm	0:9b334a45a8ff	498	}
bogdanm	0:9b334a45a8ff	499
bogdanm	0:9b334a45a8ff	500	/* DATA configuration*/
bogdanm	0:9b334a45a8ff	501	if((pOBInit->OptionType & OPTIONBYTE_DATA) == OPTIONBYTE_DATA)
bogdanm	0:9b334a45a8ff	502	{
bogdanm	0:9b334a45a8ff	503	status = FLASH_OB_ProgramData(pOBInit->DATAAddress, pOBInit->DATAData);
bogdanm	0:9b334a45a8ff	504	}
bogdanm	0:9b334a45a8ff	505
bogdanm	0:9b334a45a8ff	506	return status;
bogdanm	0:9b334a45a8ff	507	}
bogdanm	0:9b334a45a8ff	508
bogdanm	0:9b334a45a8ff	509	/**
bogdanm	0:9b334a45a8ff	510	* @brief Get the Option byte configuration
bogdanm	0:9b334a45a8ff	511	* @param pOBInit: pointer to an FLASH_OBInitStruct structure that
bogdanm	0:9b334a45a8ff	512	* contains the configuration information for the programming.
bogdanm	0:9b334a45a8ff	513	*
bogdanm	0:9b334a45a8ff	514	* @retval None
bogdanm	0:9b334a45a8ff	515	*/
bogdanm	0:9b334a45a8ff	516	void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit)
bogdanm	0:9b334a45a8ff	517	{
bogdanm	0:9b334a45a8ff	518	pOBInit->OptionType = OPTIONBYTE_WRP \| OPTIONBYTE_RDP \| OPTIONBYTE_USER;
bogdanm	0:9b334a45a8ff	519
bogdanm	0:9b334a45a8ff	520	/Get WRP/
bogdanm	0:9b334a45a8ff	521	pOBInit->WRPPage = FLASH_OB_GetWRP();
bogdanm	0:9b334a45a8ff	522
bogdanm	0:9b334a45a8ff	523	/Get RDP Level/
bogdanm	0:9b334a45a8ff	524	pOBInit->RDPLevel = FLASH_OB_GetRDP();
bogdanm	0:9b334a45a8ff	525
bogdanm	0:9b334a45a8ff	526	/Get USER/
bogdanm	0:9b334a45a8ff	527	pOBInit->USERConfig = FLASH_OB_GetUser();
bogdanm	0:9b334a45a8ff	528	}
bogdanm	0:9b334a45a8ff	529
bogdanm	0:9b334a45a8ff	530	/**
bogdanm	0:9b334a45a8ff	531	* @}
bogdanm	0:9b334a45a8ff	532	*/
bogdanm	0:9b334a45a8ff	533
bogdanm	0:9b334a45a8ff	534	/**
bogdanm	0:9b334a45a8ff	535	* @}
bogdanm	0:9b334a45a8ff	536	*/
bogdanm	0:9b334a45a8ff	537
bogdanm	0:9b334a45a8ff	538	/** @addtogroup FLASHEx_Private_Functions
bogdanm	0:9b334a45a8ff	539	* @{
bogdanm	0:9b334a45a8ff	540	*/
bogdanm	0:9b334a45a8ff	541
bogdanm	0:9b334a45a8ff	542	/**
bogdanm	0:9b334a45a8ff	543	* @brief Full erase of FLASH memory Bank
bogdanm	0:9b334a45a8ff	544	* @param Banks: Banks to be erased
bogdanm	0:9b334a45a8ff	545	* This parameter can be one of the following values:
bogdanm	0:9b334a45a8ff	546	* @arg FLASH_BANK_1: Bank1 to be erased
bogdanm	0:9b334a45a8ff	547	* @arg FLASH_BANK_2: Bank2 to be erased
bogdanm	0:9b334a45a8ff	548	* @arg FLASH_BANK_BOTH: Bank1 and Bank2 to be erased
bogdanm	0:9b334a45a8ff	549	*
bogdanm	0:9b334a45a8ff	550	* @retval HAL Status
bogdanm	0:9b334a45a8ff	551	*/
bogdanm	0:9b334a45a8ff	552	static void FLASH_MassErase(uint32_t Banks)
bogdanm	0:9b334a45a8ff	553	{
bogdanm	0:9b334a45a8ff	554	/* Check the parameters */
bogdanm	0:9b334a45a8ff	555	assert_param(IS_FLASH_BANK(Banks));
bogdanm	0:9b334a45a8ff	556
bogdanm	0:9b334a45a8ff	557	/* Clean the error context */
bogdanm	0:9b334a45a8ff	558	pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
bogdanm	0:9b334a45a8ff	559
bogdanm	0:9b334a45a8ff	560	#if defined(STM32F101xG) \|\| defined(STM32F103xG)
bogdanm	0:9b334a45a8ff	561	if(Banks == FLASH_BANK_BOTH)
bogdanm	0:9b334a45a8ff	562	{
bogdanm	0:9b334a45a8ff	563	/* bank1 & bank2 will be erased*/
bogdanm	0:9b334a45a8ff	564	SET_BIT(FLASH->CR, FLASH_CR_MER);
bogdanm	0:9b334a45a8ff	565	SET_BIT(FLASH->CR2, FLASH_CR2_MER);
bogdanm	0:9b334a45a8ff	566	SET_BIT(FLASH->CR, FLASH_CR_STRT);
bogdanm	0:9b334a45a8ff	567	SET_BIT(FLASH->CR2, FLASH_CR2_STRT);
bogdanm	0:9b334a45a8ff	568	}
bogdanm	0:9b334a45a8ff	569	else if(Banks == FLASH_BANK_2)
bogdanm	0:9b334a45a8ff	570	{
bogdanm	0:9b334a45a8ff	571	/Only bank2 will be erased/
bogdanm	0:9b334a45a8ff	572	SET_BIT(FLASH->CR2, FLASH_CR2_MER);
bogdanm	0:9b334a45a8ff	573	SET_BIT(FLASH->CR2, FLASH_CR2_STRT);
bogdanm	0:9b334a45a8ff	574	}
bogdanm	0:9b334a45a8ff	575	else
bogdanm	0:9b334a45a8ff	576	{
bogdanm	0:9b334a45a8ff	577	#endif /* STM32F101xG \|\| STM32F103xG */
bogdanm	0:9b334a45a8ff	578	/Only bank1 will be erased/
bogdanm	0:9b334a45a8ff	579	SET_BIT(FLASH->CR, FLASH_CR_MER);
bogdanm	0:9b334a45a8ff	580	SET_BIT(FLASH->CR, FLASH_CR_STRT);
bogdanm	0:9b334a45a8ff	581	#if defined(STM32F101xG) \|\| defined(STM32F103xG)
bogdanm	0:9b334a45a8ff	582	}
bogdanm	0:9b334a45a8ff	583	#endif /* STM32F101xG \|\| STM32F103xG */
bogdanm	0:9b334a45a8ff	584	}
bogdanm	0:9b334a45a8ff	585
bogdanm	0:9b334a45a8ff	586	/**
bogdanm	0:9b334a45a8ff	587	* @brief Enable the write protection of the desired pages
bogdanm	0:9b334a45a8ff	588	* @note When the memory read protection level is selected (RDP level = 1),
bogdanm	0:9b334a45a8ff	589	* it is not possible to program or erase the flash page i if CortexM4
bogdanm	0:9b334a45a8ff	590	* debug features are connected or boot code is executed in RAM, even if nWRPi = 1
bogdanm	0:9b334a45a8ff	591	*
bogdanm	0:9b334a45a8ff	592	* @param WriteProtectPage: specifies the page(s) to be write protected.
bogdanm	0:9b334a45a8ff	593	* The value of this parameter depend on device used within the same series
bogdanm	0:9b334a45a8ff	594	* @retval HAL status
bogdanm	0:9b334a45a8ff	595	*/
bogdanm	0:9b334a45a8ff	596	static HAL_StatusTypeDef FLASH_OB_EnableWRP(uint32_t WriteProtectPage)
bogdanm	0:9b334a45a8ff	597	{
bogdanm	0:9b334a45a8ff	598	HAL_StatusTypeDef status = HAL_OK;
bogdanm	0:9b334a45a8ff	599	uint16_t WRP0_Data = 0xFFFF;
bogdanm	0:9b334a45a8ff	600	#if defined(STM32F100xB) \|\| defined(STM32F101xB) \|\| defined(STM32F102xB) \|\| defined(STM32F103xB) \|\| \
bogdanm	0:9b334a45a8ff	601	defined(STM32F100xE) \|\| defined(STM32F101xE) \|\| defined(STM32F103xE) \|\| \
bogdanm	0:9b334a45a8ff	602	defined(STM32F101xG) \|\| defined(STM32F103xG) \|\| \
bogdanm	0:9b334a45a8ff	603	defined(STM32F105xC) \|\| defined(STM32F107xC)
bogdanm	0:9b334a45a8ff	604	uint16_t WRP1_Data = 0xFFFF, WRP2_Data = 0xFFFF, WRP3_Data = 0xFFFF;
bogdanm	0:9b334a45a8ff	605	#endif /* STM32F100xB \|\| STM32F101xB \|\| STM32F102xB \|\| STM32F103xB \|\| */
bogdanm	0:9b334a45a8ff	606	/* STM32F100xE \|\| STM32F101xE \|\| STM32F103xE \|\| */
bogdanm	0:9b334a45a8ff	607	/* STM32F101xG \|\| STM32F103xG \|\| */
bogdanm	0:9b334a45a8ff	608	/* STM32F105xC \|\| STM32F107xC */
bogdanm	0:9b334a45a8ff	609
bogdanm	0:9b334a45a8ff	610	/* Check the parameters */
bogdanm	0:9b334a45a8ff	611	assert_param(IS_OB_WRP(WriteProtectPage));
bogdanm	0:9b334a45a8ff	612
bogdanm	0:9b334a45a8ff	613	WriteProtectPage = (uint32_t)(~WriteProtectPage);
bogdanm	0:9b334a45a8ff	614
bogdanm	0:9b334a45a8ff	615	/* Low Density and Medium Density */
bogdanm	0:9b334a45a8ff	616	#if defined(STM32F101x6) \|\| defined(STM32F102x6) \|\| defined(STM32F103x6) \|\| \
bogdanm	0:9b334a45a8ff	617	defined(STM32F100xB) \|\| defined(STM32F101xB) \|\| defined(STM32F102xB) \|\| defined(STM32F103xB)
bogdanm	0:9b334a45a8ff	618	WRP0_Data = (uint16_t)(WriteProtectPage & OB_WRP_PAGES0TO31MASK);
bogdanm	0:9b334a45a8ff	619	#endif /* STM32F101x6 \|\| STM32F102x6 \|\| STM32F103x6 \|\| */
bogdanm	0:9b334a45a8ff	620	/* STM32F100xB \|\| STM32F101xB \|\| STM32F102xB \|\| STM32F103xB */
bogdanm	0:9b334a45a8ff	621
bogdanm	0:9b334a45a8ff	622	/* Medium Density */
bogdanm	0:9b334a45a8ff	623	#if defined(STM32F100xB) \|\| defined(STM32F101xB) \|\| defined(STM32F102xB) \|\| defined(STM32F103xB)
bogdanm	0:9b334a45a8ff	624	WRP1_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES32TO63MASK) >> 8);
bogdanm	0:9b334a45a8ff	625	WRP2_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES64TO95MASK) >> 16);
bogdanm	0:9b334a45a8ff	626	WRP3_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES96TO127MASK) >> 24);
bogdanm	0:9b334a45a8ff	627	#endif /* STM32F100xB \|\| STM32F101xB \|\| STM32F102xB \|\| STM32F103xB */
bogdanm	0:9b334a45a8ff	628
bogdanm	0:9b334a45a8ff	629	/* High Density, XL Density and Connectivity line devices*/
bogdanm	0:9b334a45a8ff	630	#if defined(STM32F100xE) \|\| defined(STM32F101xE) \|\| defined(STM32F103xE) \|\| \
bogdanm	0:9b334a45a8ff	631	defined(STM32F101xG) \|\| defined(STM32F103xG) \|\| \
bogdanm	0:9b334a45a8ff	632	defined(STM32F105xC) \|\| defined(STM32F107xC)
bogdanm	0:9b334a45a8ff	633	WRP0_Data = (uint16_t)(WriteProtectPage & OB_WRP_PAGES0TO15MASK);
bogdanm	0:9b334a45a8ff	634	WRP1_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES16TO31MASK) >> 8);
bogdanm	0:9b334a45a8ff	635	WRP2_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES32TO47MASK) >> 16);
bogdanm	0:9b334a45a8ff	636	#endif /* STM32F100xE \|\| STM32F101xE \|\| STM32F103xE */
bogdanm	0:9b334a45a8ff	637	/* STM32F101xG \|\| STM32F103xG */
bogdanm	0:9b334a45a8ff	638	/* STM32F105xC \|\| STM32F107xC */
bogdanm	0:9b334a45a8ff	639
bogdanm	0:9b334a45a8ff	640	/* High Density */
bogdanm	0:9b334a45a8ff	641	#if defined(STM32F100xE) \|\| defined(STM32F101xE) \|\| defined(STM32F103xE)
bogdanm	0:9b334a45a8ff	642	WRP3_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES48TO255MASK) >> 24);
bogdanm	0:9b334a45a8ff	643	#endif /* STM32F100xE \|\| STM32F101xE \|\| STM32F103xE */
bogdanm	0:9b334a45a8ff	644
bogdanm	0:9b334a45a8ff	645	/* XL Density */
bogdanm	0:9b334a45a8ff	646	#if defined(STM32F101xG) \|\| defined(STM32F103xG)
bogdanm	0:9b334a45a8ff	647	WRP3_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES48TO511MASK) >> 24);
bogdanm	0:9b334a45a8ff	648	#endif /* STM32F101xG \|\| STM32F103xG */
bogdanm	0:9b334a45a8ff	649
bogdanm	0:9b334a45a8ff	650	/* Connectivity line devices */
bogdanm	0:9b334a45a8ff	651	#if defined(STM32F105xC) \|\| defined(STM32F107xC)
bogdanm	0:9b334a45a8ff	652	WRP3_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES48TO127MASK) >> 24);
bogdanm	0:9b334a45a8ff	653	#endif /* STM32F105xC \|\| STM32F107xC */
bogdanm	0:9b334a45a8ff	654
bogdanm	0:9b334a45a8ff	655	/* Wait for last operation to be completed */
bogdanm	0:9b334a45a8ff	656	status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
bogdanm	0:9b334a45a8ff	657
bogdanm	0:9b334a45a8ff	658	if(status == HAL_OK)
bogdanm	0:9b334a45a8ff	659	{
bogdanm	0:9b334a45a8ff	660	/* Clean the error context */
bogdanm	0:9b334a45a8ff	661	pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
bogdanm	0:9b334a45a8ff	662
bogdanm	0:9b334a45a8ff	663	SET_BIT(FLASH->CR, FLASH_CR_OPTPG);
bogdanm	0:9b334a45a8ff	664
bogdanm	0:9b334a45a8ff	665	if(WRP0_Data != 0xFF)
bogdanm	0:9b334a45a8ff	666	{
bogdanm	0:9b334a45a8ff	667	OB->WRP0 &= WRP0_Data;
bogdanm	0:9b334a45a8ff	668
bogdanm	0:9b334a45a8ff	669	/* Wait for last operation to be completed */
bogdanm	0:9b334a45a8ff	670	status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
bogdanm	0:9b334a45a8ff	671	}
bogdanm	0:9b334a45a8ff	672
bogdanm	0:9b334a45a8ff	673	#if defined(STM32F100xB) \|\| defined(STM32F101xB) \|\| defined(STM32F102xB) \|\| defined(STM32F103xB) \|\| \
bogdanm	0:9b334a45a8ff	674	defined(STM32F100xE) \|\| defined(STM32F101xE) \|\| defined(STM32F103xE) \|\| \
bogdanm	0:9b334a45a8ff	675	defined(STM32F101xG) \|\| defined(STM32F103xG) \|\| \
bogdanm	0:9b334a45a8ff	676	defined(STM32F105xC) \|\| defined(STM32F107xC)
bogdanm	0:9b334a45a8ff	677
bogdanm	0:9b334a45a8ff	678	if((status == HAL_OK) && (WRP1_Data != 0xFF))
bogdanm	0:9b334a45a8ff	679	{
bogdanm	0:9b334a45a8ff	680	OB->WRP1 &= WRP1_Data;
bogdanm	0:9b334a45a8ff	681
bogdanm	0:9b334a45a8ff	682	/* Wait for last operation to be completed */
bogdanm	0:9b334a45a8ff	683	status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
bogdanm	0:9b334a45a8ff	684	}
bogdanm	0:9b334a45a8ff	685
bogdanm	0:9b334a45a8ff	686	if((status == HAL_OK) && (WRP2_Data != 0xFF))
bogdanm	0:9b334a45a8ff	687	{
bogdanm	0:9b334a45a8ff	688	OB->WRP2 &= WRP2_Data;
bogdanm	0:9b334a45a8ff	689
bogdanm	0:9b334a45a8ff	690	/* Wait for last operation to be completed */
bogdanm	0:9b334a45a8ff	691	status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
bogdanm	0:9b334a45a8ff	692	}
bogdanm	0:9b334a45a8ff	693
bogdanm	0:9b334a45a8ff	694	if((status == HAL_OK) && (WRP3_Data != 0xFF))
bogdanm	0:9b334a45a8ff	695	{
bogdanm	0:9b334a45a8ff	696	OB->WRP3 &= WRP3_Data;
bogdanm	0:9b334a45a8ff	697
bogdanm	0:9b334a45a8ff	698	/* Wait for last operation to be completed */
bogdanm	0:9b334a45a8ff	699	status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
bogdanm	0:9b334a45a8ff	700	}
bogdanm	0:9b334a45a8ff	701	#endif /* STM32F100xB \|\| STM32F101xB \|\| STM32F102xB \|\| STM32F103xB \|\| */
bogdanm	0:9b334a45a8ff	702	/* STM32F100xE \|\| STM32F101xE \|\| STM32F103xE \|\| */
bogdanm	0:9b334a45a8ff	703	/* STM32F101xG \|\| STM32F103xG \|\| */
bogdanm	0:9b334a45a8ff	704	/* STM32F105xC \|\| STM32F107xC */
bogdanm	0:9b334a45a8ff	705
bogdanm	0:9b334a45a8ff	706	/* if the program operation is completed, disable the OPTPG Bit */
bogdanm	0:9b334a45a8ff	707	CLEAR_BIT(FLASH->CR, FLASH_CR_OPTPG);
bogdanm	0:9b334a45a8ff	708	}
bogdanm	0:9b334a45a8ff	709
bogdanm	0:9b334a45a8ff	710	return status;
bogdanm	0:9b334a45a8ff	711	}
bogdanm	0:9b334a45a8ff	712
bogdanm	0:9b334a45a8ff	713	/**
bogdanm	0:9b334a45a8ff	714	* @brief Disable the write protection of the desired pages
bogdanm	0:9b334a45a8ff	715	* @note When the memory read protection level is selected (RDP level = 1),
bogdanm	0:9b334a45a8ff	716	* it is not possible to program or erase the flash page i if CortexM4
bogdanm	0:9b334a45a8ff	717	* debug features are connected or boot code is executed in RAM, even if nWRPi = 1
bogdanm	0:9b334a45a8ff	718	*
bogdanm	0:9b334a45a8ff	719	* @param WriteProtectPage: specifies the page(s) to be write unprotected.
bogdanm	0:9b334a45a8ff	720	* The value of this parameter depend on device used within the same series
bogdanm	0:9b334a45a8ff	721	* @retval HAL status
bogdanm	0:9b334a45a8ff	722	*/
bogdanm	0:9b334a45a8ff	723	static HAL_StatusTypeDef FLASH_OB_DisableWRP(uint32_t WriteProtectPage)
bogdanm	0:9b334a45a8ff	724	{
bogdanm	0:9b334a45a8ff	725	HAL_StatusTypeDef status = HAL_OK;
bogdanm	0:9b334a45a8ff	726	uint16_t WRP0_Data = 0xFFFF;
bogdanm	0:9b334a45a8ff	727	#if defined(STM32F100xB) \|\| defined(STM32F101xB) \|\| defined(STM32F102xB) \|\| defined(STM32F103xB) \|\| \
bogdanm	0:9b334a45a8ff	728	defined(STM32F100xE) \|\| defined(STM32F101xE) \|\| defined(STM32F103xE) \|\| \
bogdanm	0:9b334a45a8ff	729	defined(STM32F101xG) \|\| defined(STM32F103xG) \|\| \
bogdanm	0:9b334a45a8ff	730	defined(STM32F105xC) \|\| defined(STM32F107xC)
bogdanm	0:9b334a45a8ff	731	uint16_t WRP1_Data = 0xFFFF, WRP2_Data = 0xFFFF, WRP3_Data = 0xFFFF;
bogdanm	0:9b334a45a8ff	732	#endif /* STM32F100xB \|\| STM32F101xB \|\| STM32F102xB \|\| STM32F103xB \|\| */
bogdanm	0:9b334a45a8ff	733	/* STM32F100xE \|\| STM32F101xE \|\| STM32F103xE \|\| */
bogdanm	0:9b334a45a8ff	734	/* STM32F101xG \|\| STM32F103xG \|\| */
bogdanm	0:9b334a45a8ff	735	/* STM32F105xC \|\| STM32F107xC */
bogdanm	0:9b334a45a8ff	736
bogdanm	0:9b334a45a8ff	737	/* Check the parameters */
bogdanm	0:9b334a45a8ff	738	assert_param(IS_OB_WRP(WriteProtectPage));
bogdanm	0:9b334a45a8ff	739
bogdanm	0:9b334a45a8ff	740	/* Low Density and Medium Density */
bogdanm	0:9b334a45a8ff	741	#if defined(STM32F101x6) \|\| defined(STM32F102x6) \|\| defined(STM32F103x6) \|\| \
bogdanm	0:9b334a45a8ff	742	defined(STM32F100xB) \|\| defined(STM32F101xB) \|\| defined(STM32F102xB) \|\| defined(STM32F103xB)
bogdanm	0:9b334a45a8ff	743	WRP0_Data = (uint16_t)(WriteProtectPage & OB_WRP_PAGES0TO31MASK);
bogdanm	0:9b334a45a8ff	744	#endif /* STM32F101x6 \|\| STM32F102x6 \|\| STM32F103x6 \|\| */
bogdanm	0:9b334a45a8ff	745	/* STM32F100xB \|\| STM32F101xB \|\| STM32F102xB \|\| STM32F103xB */
bogdanm	0:9b334a45a8ff	746
bogdanm	0:9b334a45a8ff	747	/* Medium Density */
bogdanm	0:9b334a45a8ff	748	#if defined(STM32F100xB) \|\| defined(STM32F101xB) \|\| defined(STM32F102xB) \|\| defined(STM32F103xB)
bogdanm	0:9b334a45a8ff	749	WRP1_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES32TO63MASK) >> 8);
bogdanm	0:9b334a45a8ff	750	WRP2_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES64TO95MASK) >> 16);
bogdanm	0:9b334a45a8ff	751	WRP3_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES96TO127MASK) >> 24);
bogdanm	0:9b334a45a8ff	752	#endif /* STM32F100xB \|\| STM32F101xB \|\| STM32F102xB \|\| STM32F103xB */
bogdanm	0:9b334a45a8ff	753
bogdanm	0:9b334a45a8ff	754	/* High Density, XL Density and Connectivity line devices*/
bogdanm	0:9b334a45a8ff	755	#if defined(STM32F100xE) \|\| defined(STM32F101xE) \|\| defined(STM32F103xE) \|\| \
bogdanm	0:9b334a45a8ff	756	defined(STM32F101xG) \|\| defined(STM32F103xG) \|\| \
bogdanm	0:9b334a45a8ff	757	defined(STM32F105xC) \|\| defined(STM32F107xC)
bogdanm	0:9b334a45a8ff	758	WRP0_Data = (uint16_t)(WriteProtectPage & OB_WRP_PAGES0TO15MASK);
bogdanm	0:9b334a45a8ff	759	WRP1_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES16TO31MASK) >> 8);
bogdanm	0:9b334a45a8ff	760	WRP2_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES32TO47MASK) >> 16);
bogdanm	0:9b334a45a8ff	761	#endif /* STM32F100xE \|\| STM32F101xE \|\| STM32F103xE */
bogdanm	0:9b334a45a8ff	762	/* STM32F101xG \|\| STM32F103xG */
bogdanm	0:9b334a45a8ff	763	/* STM32F105xC \|\| STM32F107xC */
bogdanm	0:9b334a45a8ff	764
bogdanm	0:9b334a45a8ff	765	/* High Density */
bogdanm	0:9b334a45a8ff	766	#if defined(STM32F100xE) \|\| defined(STM32F101xE) \|\| defined(STM32F103xE)
bogdanm	0:9b334a45a8ff	767	WRP3_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES48TO255MASK) >> 24);
bogdanm	0:9b334a45a8ff	768	#endif /* STM32F100xE \|\| STM32F101xE \|\| STM32F103xE */
bogdanm	0:9b334a45a8ff	769
bogdanm	0:9b334a45a8ff	770	/* XL Density */
bogdanm	0:9b334a45a8ff	771	#if defined(STM32F101xG) \|\| defined(STM32F103xG)
bogdanm	0:9b334a45a8ff	772	WRP3_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES48TO511MASK) >> 24);
bogdanm	0:9b334a45a8ff	773	#endif /* STM32F101xG \|\| STM32F103xG */
bogdanm	0:9b334a45a8ff	774
bogdanm	0:9b334a45a8ff	775	/* Connectivity line devices */
bogdanm	0:9b334a45a8ff	776	#if defined(STM32F105xC) \|\| defined(STM32F107xC)
bogdanm	0:9b334a45a8ff	777	WRP3_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES48TO127MASK) >> 24);
bogdanm	0:9b334a45a8ff	778	#endif /* STM32F105xC \|\| STM32F107xC */
bogdanm	0:9b334a45a8ff	779
bogdanm	0:9b334a45a8ff	780	/* Wait for last operation to be completed */
bogdanm	0:9b334a45a8ff	781	status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
bogdanm	0:9b334a45a8ff	782
bogdanm	0:9b334a45a8ff	783	if(status == HAL_OK)
bogdanm	0:9b334a45a8ff	784	{
bogdanm	0:9b334a45a8ff	785	/* Clean the error context */
bogdanm	0:9b334a45a8ff	786	pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
bogdanm	0:9b334a45a8ff	787
bogdanm	0:9b334a45a8ff	788	SET_BIT(FLASH->CR, FLASH_CR_OPTPG);
bogdanm	0:9b334a45a8ff	789
bogdanm	0:9b334a45a8ff	790	if(WRP0_Data != 0xFF)
bogdanm	0:9b334a45a8ff	791	{
bogdanm	0:9b334a45a8ff	792	OB->WRP0 \|= WRP0_Data;
bogdanm	0:9b334a45a8ff	793
bogdanm	0:9b334a45a8ff	794	/* Wait for last operation to be completed */
bogdanm	0:9b334a45a8ff	795	status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
bogdanm	0:9b334a45a8ff	796	}
bogdanm	0:9b334a45a8ff	797	#if defined(STM32F100xB) \|\| defined(STM32F101xB) \|\| defined(STM32F102xB) \|\| defined(STM32F103xB) \|\| \
bogdanm	0:9b334a45a8ff	798	defined(STM32F100xE) \|\| defined(STM32F101xE) \|\| defined(STM32F103xE) \|\| \
bogdanm	0:9b334a45a8ff	799	defined(STM32F101xG) \|\| defined(STM32F103xG) \|\| \
bogdanm	0:9b334a45a8ff	800	defined(STM32F105xC) \|\| defined(STM32F107xC)
bogdanm	0:9b334a45a8ff	801
bogdanm	0:9b334a45a8ff	802	if((status == HAL_OK) && (WRP1_Data != 0xFF))
bogdanm	0:9b334a45a8ff	803	{
bogdanm	0:9b334a45a8ff	804	OB->WRP1 \|= WRP1_Data;
bogdanm	0:9b334a45a8ff	805
bogdanm	0:9b334a45a8ff	806	/* Wait for last operation to be completed */
bogdanm	0:9b334a45a8ff	807	status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
bogdanm	0:9b334a45a8ff	808	}
bogdanm	0:9b334a45a8ff	809
bogdanm	0:9b334a45a8ff	810	if((status == HAL_OK) && (WRP2_Data != 0xFF))
bogdanm	0:9b334a45a8ff	811	{
bogdanm	0:9b334a45a8ff	812	OB->WRP2 \|= WRP2_Data;
bogdanm	0:9b334a45a8ff	813
bogdanm	0:9b334a45a8ff	814	/* Wait for last operation to be completed */
bogdanm	0:9b334a45a8ff	815	status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
bogdanm	0:9b334a45a8ff	816	}
bogdanm	0:9b334a45a8ff	817
bogdanm	0:9b334a45a8ff	818	if((status == HAL_OK) && (WRP3_Data != 0xFF))
bogdanm	0:9b334a45a8ff	819	{
bogdanm	0:9b334a45a8ff	820	OB->WRP3 \|= WRP3_Data;
bogdanm	0:9b334a45a8ff	821
bogdanm	0:9b334a45a8ff	822	/* Wait for last operation to be completed */
bogdanm	0:9b334a45a8ff	823	status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
bogdanm	0:9b334a45a8ff	824	}
bogdanm	0:9b334a45a8ff	825	#endif /* STM32F100xB \|\| STM32F101xB \|\| STM32F102xB \|\| STM32F103xB \|\|*/
bogdanm	0:9b334a45a8ff	826	/* STM32F100xE \|\| STM32F101xE \|\| STM32F103xE \|\|*/
bogdanm	0:9b334a45a8ff	827	/* STM32F101xG \|\| STM32F103xG \|\|*/
bogdanm	0:9b334a45a8ff	828	/* STM32F105xC \|\| STM32F107xC */
bogdanm	0:9b334a45a8ff	829
bogdanm	0:9b334a45a8ff	830	/* if the program operation is completed, disable the OPTPG Bit */
bogdanm	0:9b334a45a8ff	831	CLEAR_BIT(FLASH->CR, FLASH_CR_OPTPG);
bogdanm	0:9b334a45a8ff	832	}
bogdanm	0:9b334a45a8ff	833	return status;
bogdanm	0:9b334a45a8ff	834	}
bogdanm	0:9b334a45a8ff	835
bogdanm	0:9b334a45a8ff	836	/**
bogdanm	0:9b334a45a8ff	837	* @brief Set the read protection level.
bogdanm	0:9b334a45a8ff	838	* @param ReadProtectLevel: specifies the read protection level.
bogdanm	0:9b334a45a8ff	839	* This parameter can be one of the following values:
bogdanm	0:9b334a45a8ff	840	* @arg OB_RDP_LEVEL_0: No protection
bogdanm	0:9b334a45a8ff	841	* @arg OB_RDP_LEVEL_1: Read protection of the memory
bogdanm	0:9b334a45a8ff	842	*
bogdanm	0:9b334a45a8ff	843	* @retval HAL status
bogdanm	0:9b334a45a8ff	844	*/
bogdanm	0:9b334a45a8ff	845	static HAL_StatusTypeDef FLASH_OB_RDP_LevelConfig(uint8_t ReadProtectLevel)
bogdanm	0:9b334a45a8ff	846	{
bogdanm	0:9b334a45a8ff	847	HAL_StatusTypeDef status = HAL_OK;
bogdanm	0:9b334a45a8ff	848
bogdanm	0:9b334a45a8ff	849	/* Check the parameters */
bogdanm	0:9b334a45a8ff	850	assert_param(IS_OB_RDP_LEVEL(ReadProtectLevel));
bogdanm	0:9b334a45a8ff	851
bogdanm	0:9b334a45a8ff	852	/* Wait for last operation to be completed */
bogdanm	0:9b334a45a8ff	853	status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
bogdanm	0:9b334a45a8ff	854
bogdanm	0:9b334a45a8ff	855	if(status == HAL_OK)
bogdanm	0:9b334a45a8ff	856	{
bogdanm	0:9b334a45a8ff	857	/* Clean the error context */
bogdanm	0:9b334a45a8ff	858	pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
bogdanm	0:9b334a45a8ff	859
bogdanm	0:9b334a45a8ff	860	/* Enable the Option Bytes Programming operation */
bogdanm	0:9b334a45a8ff	861	SET_BIT(FLASH->CR, FLASH_CR_OPTPG);
bogdanm	0:9b334a45a8ff	862
bogdanm	0:9b334a45a8ff	863	WRITE_REG(OB->RDP, ReadProtectLevel);
bogdanm	0:9b334a45a8ff	864
bogdanm	0:9b334a45a8ff	865	/* Wait for last operation to be completed */
bogdanm	0:9b334a45a8ff	866	status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
bogdanm	0:9b334a45a8ff	867
bogdanm	0:9b334a45a8ff	868	/* if the program operation is completed, disable the OPTPG Bit */
bogdanm	0:9b334a45a8ff	869	CLEAR_BIT(FLASH->CR, FLASH_CR_OPTPG);
bogdanm	0:9b334a45a8ff	870	}
bogdanm	0:9b334a45a8ff	871
bogdanm	0:9b334a45a8ff	872	return status;
bogdanm	0:9b334a45a8ff	873	}
bogdanm	0:9b334a45a8ff	874
bogdanm	0:9b334a45a8ff	875	/**
bogdanm	0:9b334a45a8ff	876	* @brief Program the FLASH User Option Byte.
bogdanm	0:9b334a45a8ff	877	* @note Programming of the OB should be performed only after an erase (otherwise PGERR occurs)
bogdanm	0:9b334a45a8ff	878	* @param UserConfig: The FLASH User Option Bytes values: FLASH_OBR_IWDG_SW(Bit2),
bogdanm	0:9b334a45a8ff	879	* FLASH_OBR_nRST_STOP(Bit3),FLASH_OBR_nRST_STDBY(Bit4).
bogdanm	0:9b334a45a8ff	880	* And BFBF2(Bit5) for STM32F101xG and STM32F103xG .
bogdanm	0:9b334a45a8ff	881	* @retval HAL status
bogdanm	0:9b334a45a8ff	882	*/
bogdanm	0:9b334a45a8ff	883	static HAL_StatusTypeDef FLASH_OB_UserConfig(uint8_t UserConfig)
bogdanm	0:9b334a45a8ff	884	{
bogdanm	0:9b334a45a8ff	885	HAL_StatusTypeDef status = HAL_OK;
bogdanm	0:9b334a45a8ff	886
bogdanm	0:9b334a45a8ff	887	/* Check the parameters */
bogdanm	0:9b334a45a8ff	888	assert_param(IS_OB_IWDG_SOURCE((UserConfig&OB_IWDG_SW)));
bogdanm	0:9b334a45a8ff	889	assert_param(IS_OB_STOP_SOURCE((UserConfig&OB_STOP_NO_RST)));
bogdanm	0:9b334a45a8ff	890	assert_param(IS_OB_STDBY_SOURCE((UserConfig&OB_STDBY_NO_RST)));
bogdanm	0:9b334a45a8ff	891	#if defined(STM32F101xG) \|\| defined(STM32F103xG)
bogdanm	0:9b334a45a8ff	892	assert_param(IS_OB_BOOT1((UserConfig&OB_BOOT1_SET)));
bogdanm	0:9b334a45a8ff	893	#endif /* STM32F101xG \|\| STM32F103xG */
bogdanm	0:9b334a45a8ff	894
bogdanm	0:9b334a45a8ff	895	/* Wait for last operation to be completed */
bogdanm	0:9b334a45a8ff	896	status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
bogdanm	0:9b334a45a8ff	897
bogdanm	0:9b334a45a8ff	898	if(status == HAL_OK)
bogdanm	0:9b334a45a8ff	899	{
bogdanm	0:9b334a45a8ff	900	/* Clean the error context */
bogdanm	0:9b334a45a8ff	901	pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
bogdanm	0:9b334a45a8ff	902
bogdanm	0:9b334a45a8ff	903	/* Enable the Option Bytes Programming operation */
bogdanm	0:9b334a45a8ff	904	SET_BIT(FLASH->CR, FLASH_CR_OPTPG);
bogdanm	0:9b334a45a8ff	905
bogdanm	0:9b334a45a8ff	906	#if defined(STM32F101xG) \|\| defined(STM32F103xG)
bogdanm	0:9b334a45a8ff	907	OB->USER = (UserConfig \| 0xF0);
bogdanm	0:9b334a45a8ff	908	#else
bogdanm	0:9b334a45a8ff	909	OB->USER = (UserConfig \| 0xF8);
bogdanm	0:9b334a45a8ff	910	#endif /* STM32F101xG \|\| STM32F103xG */
bogdanm	0:9b334a45a8ff	911
bogdanm	0:9b334a45a8ff	912	/* Wait for last operation to be completed */
bogdanm	0:9b334a45a8ff	913	status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
bogdanm	0:9b334a45a8ff	914
bogdanm	0:9b334a45a8ff	915	/* if the program operation is completed, disable the OPTPG Bit */
bogdanm	0:9b334a45a8ff	916	CLEAR_BIT(FLASH->CR, FLASH_CR_OPTPG);
bogdanm	0:9b334a45a8ff	917	}
bogdanm	0:9b334a45a8ff	918
bogdanm	0:9b334a45a8ff	919	return status;
bogdanm	0:9b334a45a8ff	920	}
bogdanm	0:9b334a45a8ff	921
bogdanm	0:9b334a45a8ff	922	/**
bogdanm	0:9b334a45a8ff	923	* @brief Programs a half word at a specified Option Byte Data address.
bogdanm	0:9b334a45a8ff	924	* @note The function HAL_FLASH_Unlock() should be called before to unlock the FLASH interface
bogdanm	0:9b334a45a8ff	925	* The function HAL_FLASH_OB_Unlock() should be called before to unlock the options bytes
bogdanm	0:9b334a45a8ff	926	* The function HAL_FLASH_OB_Launch() should be called after to force the reload of the options bytes
bogdanm	0:9b334a45a8ff	927	* (system reset will occur)
bogdanm	0:9b334a45a8ff	928	* Programming of the OB should be performed only after an erase (otherwise PGERR occurs)
bogdanm	0:9b334a45a8ff	929	* @param Address: specifies the address to be programmed.
bogdanm	0:9b334a45a8ff	930	* This parameter can be 0x1FFFF804 or 0x1FFFF806.
bogdanm	0:9b334a45a8ff	931	* @param Data: specifies the data to be programmed.
bogdanm	0:9b334a45a8ff	932	* @retval HAL status
bogdanm	0:9b334a45a8ff	933	*/
bogdanm	0:9b334a45a8ff	934	static HAL_StatusTypeDef FLASH_OB_ProgramData(uint32_t Address, uint8_t Data)
bogdanm	0:9b334a45a8ff	935	{
bogdanm	0:9b334a45a8ff	936	HAL_StatusTypeDef status = HAL_ERROR;
bogdanm	0:9b334a45a8ff	937
bogdanm	0:9b334a45a8ff	938	/* Check the parameters */
bogdanm	0:9b334a45a8ff	939	assert_param(IS_OB_DATA_ADDRESS(Address));
bogdanm	0:9b334a45a8ff	940
bogdanm	0:9b334a45a8ff	941	/* Wait for last operation to be completed */
bogdanm	0:9b334a45a8ff	942	status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
bogdanm	0:9b334a45a8ff	943
bogdanm	0:9b334a45a8ff	944	if(status == HAL_OK)
bogdanm	0:9b334a45a8ff	945	{
bogdanm	0:9b334a45a8ff	946	/* Clean the error context */
bogdanm	0:9b334a45a8ff	947	pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
bogdanm	0:9b334a45a8ff	948
bogdanm	0:9b334a45a8ff	949	/* Enables the Option Bytes Programming operation */
bogdanm	0:9b334a45a8ff	950	SET_BIT(FLASH->CR, FLASH_CR_OPTPG);
bogdanm	0:9b334a45a8ff	951	(__IO uint16_t)Address = Data;
bogdanm	0:9b334a45a8ff	952
bogdanm	0:9b334a45a8ff	953	/* Wait for last operation to be completed */
bogdanm	0:9b334a45a8ff	954	status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
bogdanm	0:9b334a45a8ff	955
bogdanm	0:9b334a45a8ff	956	/* If the program operation is completed, disable the OPTPG Bit */
bogdanm	0:9b334a45a8ff	957	CLEAR_BIT(FLASH->CR, FLASH_CR_OPTPG);
bogdanm	0:9b334a45a8ff	958	}
bogdanm	0:9b334a45a8ff	959	/* Return the Option Byte Data Program Status */
bogdanm	0:9b334a45a8ff	960	return status;
bogdanm	0:9b334a45a8ff	961	}
bogdanm	0:9b334a45a8ff	962
bogdanm	0:9b334a45a8ff	963	/**
bogdanm	0:9b334a45a8ff	964	* @brief Return the FLASH Write Protection Option Bytes value.
bogdanm	0:9b334a45a8ff	965	* @retval The FLASH Write Protection Option Bytes value
bogdanm	0:9b334a45a8ff	966	*/
bogdanm	0:9b334a45a8ff	967	static uint32_t FLASH_OB_GetWRP(void)
bogdanm	0:9b334a45a8ff	968	{
bogdanm	0:9b334a45a8ff	969	/* Return the FLASH write protection Register value */
bogdanm	0:9b334a45a8ff	970	return (uint32_t)(READ_REG(FLASH->WRPR));
bogdanm	0:9b334a45a8ff	971	}
bogdanm	0:9b334a45a8ff	972
bogdanm	0:9b334a45a8ff	973	/**
bogdanm	0:9b334a45a8ff	974	* @brief Returns the FLASH Read Protection level.
bogdanm	0:9b334a45a8ff	975	* @retval FLASH ReadOut Protection Status:
bogdanm	0:9b334a45a8ff	976	* - SET, when OB_RDP_LEVEL_1 is set
bogdanm	0:9b334a45a8ff	977	* - RESET, when OB_RDP_LEVEL_0 is set
bogdanm	0:9b334a45a8ff	978	*/
bogdanm	0:9b334a45a8ff	979	static FlagStatus FLASH_OB_GetRDP(void)
bogdanm	0:9b334a45a8ff	980	{
bogdanm	0:9b334a45a8ff	981	FlagStatus readstatus = RESET;
bogdanm	0:9b334a45a8ff	982
bogdanm	0:9b334a45a8ff	983	if (HAL_IS_BIT_SET(FLASH->OBR, FLASH_OBR_RDPRT))
bogdanm	0:9b334a45a8ff	984	{
bogdanm	0:9b334a45a8ff	985	readstatus = SET;
bogdanm	0:9b334a45a8ff	986	}
bogdanm	0:9b334a45a8ff	987	else
bogdanm	0:9b334a45a8ff	988	{
bogdanm	0:9b334a45a8ff	989	readstatus = RESET;
bogdanm	0:9b334a45a8ff	990	}
bogdanm	0:9b334a45a8ff	991	return readstatus;
bogdanm	0:9b334a45a8ff	992	}
bogdanm	0:9b334a45a8ff	993
bogdanm	0:9b334a45a8ff	994	/**
bogdanm	0:9b334a45a8ff	995	* @brief Return the FLASH User Option Byte value.
bogdanm	0:9b334a45a8ff	996	* @retval The FLASH User Option Bytes values: FLASH_OBR_IWDG_SW(Bit2),
bogdanm	0:9b334a45a8ff	997	* FLASH_OBR_nRST_STOP(Bit3),FLASH_OBR_nRST_STDBY(Bit4).
bogdanm	0:9b334a45a8ff	998	* And FLASH_OBR_BFB2(Bit5) for STM32F101xG and STM32F103xG .
bogdanm	0:9b334a45a8ff	999	*/
bogdanm	0:9b334a45a8ff	1000	static uint8_t FLASH_OB_GetUser(void)
bogdanm	0:9b334a45a8ff	1001	{
bogdanm	0:9b334a45a8ff	1002	/* Return the User Option Byte */
bogdanm	0:9b334a45a8ff	1003	return (uint8_t)((READ_REG(FLASH->OBR) & FLASH_OBR_USER) >> 2);
bogdanm	0:9b334a45a8ff	1004	}
bogdanm	0:9b334a45a8ff	1005
bogdanm	0:9b334a45a8ff	1006	#if defined(STM32F101xG) \|\| defined(STM32F103xG)
bogdanm	0:9b334a45a8ff	1007	/**
bogdanm	0:9b334a45a8ff	1008	* @brief Wait for a FLASH BANK2 operation to complete.
bogdanm	0:9b334a45a8ff	1009	* @param Timeout: maximum flash operationtimeout
bogdanm	0:9b334a45a8ff	1010	* @retval HAL_StatusTypeDef HAL Status
bogdanm	0:9b334a45a8ff	1011	*/
bogdanm	0:9b334a45a8ff	1012	static HAL_StatusTypeDef FLASH_WaitForLastOperationBank2(uint32_t Timeout)
bogdanm	0:9b334a45a8ff	1013	{
bogdanm	0:9b334a45a8ff	1014	/* Wait for the FLASH BANK2 operation to complete by polling on BUSY flag to be reset.
bogdanm	0:9b334a45a8ff	1015	Even if the FLASH BANK2 operation fails, the BUSY flag will be reset and an error
bogdanm	0:9b334a45a8ff	1016	flag will be set */
bogdanm	0:9b334a45a8ff	1017
bogdanm	0:9b334a45a8ff	1018	uint32_t tickstart = HAL_GetTick();
bogdanm	0:9b334a45a8ff	1019
bogdanm	0:9b334a45a8ff	1020	while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY_BANK2))
bogdanm	0:9b334a45a8ff	1021	{
bogdanm	0:9b334a45a8ff	1022	if (Timeout != HAL_MAX_DELAY)
bogdanm	0:9b334a45a8ff	1023	{
bogdanm	0:9b334a45a8ff	1024	if((Timeout == 0) \|\| ((HAL_GetTick()-tickstart) > Timeout))
bogdanm	0:9b334a45a8ff	1025	{
bogdanm	0:9b334a45a8ff	1026	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	1027	}
bogdanm	0:9b334a45a8ff	1028	}
bogdanm	0:9b334a45a8ff	1029	}
bogdanm	0:9b334a45a8ff	1030
bogdanm	0:9b334a45a8ff	1031	/* Check FLASH End of Operation flag */
bogdanm	0:9b334a45a8ff	1032	if (__HAL_FLASH_GET_FLAG(FLASH_FLAG_EOP_BANK2))
bogdanm	0:9b334a45a8ff	1033	{
bogdanm	0:9b334a45a8ff	1034	/* Clear FLASH End of Operation pending bit */
bogdanm	0:9b334a45a8ff	1035	__HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP_BANK2);
bogdanm	0:9b334a45a8ff	1036	}
bogdanm	0:9b334a45a8ff	1037
bogdanm	0:9b334a45a8ff	1038	if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR_BANK2) \|\| __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR_BANK2))
bogdanm	0:9b334a45a8ff	1039	{
bogdanm	0:9b334a45a8ff	1040	/Save the error code/
bogdanm	0:9b334a45a8ff	1041	FLASH_SetErrorCode();
bogdanm	0:9b334a45a8ff	1042	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	1043	}
bogdanm	0:9b334a45a8ff	1044
bogdanm	0:9b334a45a8ff	1045	/* If there is an error flag set */
bogdanm	0:9b334a45a8ff	1046	return HAL_OK;
bogdanm	0:9b334a45a8ff	1047
bogdanm	0:9b334a45a8ff	1048	}
bogdanm	0:9b334a45a8ff	1049	#endif /* STM32F101xG \|\| STM32F103xG */
bogdanm	0:9b334a45a8ff	1050
bogdanm	0:9b334a45a8ff	1051	/**
bogdanm	0:9b334a45a8ff	1052	* @}
bogdanm	0:9b334a45a8ff	1053	*/
bogdanm	0:9b334a45a8ff	1054
bogdanm	0:9b334a45a8ff	1055	/**
bogdanm	0:9b334a45a8ff	1056	* @}
bogdanm	0:9b334a45a8ff	1057	*/
bogdanm	0:9b334a45a8ff	1058
bogdanm	0:9b334a45a8ff	1059	/** @addtogroup FLASH
bogdanm	0:9b334a45a8ff	1060	* @{
bogdanm	0:9b334a45a8ff	1061	*/
bogdanm	0:9b334a45a8ff	1062
bogdanm	0:9b334a45a8ff	1063	#if defined(STM32F101xG) \|\| defined(STM32F103xG)
bogdanm	0:9b334a45a8ff	1064	/** @addtogroup FLASH_Exported_Functions
bogdanm	0:9b334a45a8ff	1065	* @{
bogdanm	0:9b334a45a8ff	1066	*/
bogdanm	0:9b334a45a8ff	1067
bogdanm	0:9b334a45a8ff	1068	/** @addtogroup FLASH_Exported_Functions_Group2
bogdanm	0:9b334a45a8ff	1069	* @{
bogdanm	0:9b334a45a8ff	1070	*/
bogdanm	0:9b334a45a8ff	1071
bogdanm	0:9b334a45a8ff	1072	/**
bogdanm	0:9b334a45a8ff	1073	* @brief Unlock the FLASH control register access
bogdanm	0:9b334a45a8ff	1074	* @retval HAL Status
bogdanm	0:9b334a45a8ff	1075	*/
bogdanm	0:9b334a45a8ff	1076	HAL_StatusTypeDef HAL_FLASH_Unlock(void)
bogdanm	0:9b334a45a8ff	1077	{
bogdanm	0:9b334a45a8ff	1078	if (HAL_IS_BIT_SET(FLASH->CR, FLASH_CR_LOCK))
bogdanm	0:9b334a45a8ff	1079	{
bogdanm	0:9b334a45a8ff	1080	/* Authorize the FLASH BANK1 Registers access */
bogdanm	0:9b334a45a8ff	1081	WRITE_REG(FLASH->KEYR, FLASH_KEY1);
bogdanm	0:9b334a45a8ff	1082	WRITE_REG(FLASH->KEYR, FLASH_KEY2);
bogdanm	0:9b334a45a8ff	1083	}
bogdanm	0:9b334a45a8ff	1084	else
bogdanm	0:9b334a45a8ff	1085	{
bogdanm	0:9b334a45a8ff	1086	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	1087	}
bogdanm	0:9b334a45a8ff	1088
bogdanm	0:9b334a45a8ff	1089
bogdanm	0:9b334a45a8ff	1090	if (HAL_IS_BIT_SET(FLASH->CR2, FLASH_CR2_LOCK))
bogdanm	0:9b334a45a8ff	1091	{
bogdanm	0:9b334a45a8ff	1092	/* Authorize the FLASH BANK2 Registers access */
bogdanm	0:9b334a45a8ff	1093	WRITE_REG(FLASH->KEYR2, FLASH_KEY1);
bogdanm	0:9b334a45a8ff	1094	WRITE_REG(FLASH->KEYR2, FLASH_KEY2);
bogdanm	0:9b334a45a8ff	1095	}
bogdanm	0:9b334a45a8ff	1096	else
bogdanm	0:9b334a45a8ff	1097	{
bogdanm	0:9b334a45a8ff	1098	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	1099	}
bogdanm	0:9b334a45a8ff	1100
bogdanm	0:9b334a45a8ff	1101	return HAL_OK;
bogdanm	0:9b334a45a8ff	1102	}
bogdanm	0:9b334a45a8ff	1103
bogdanm	0:9b334a45a8ff	1104	/**
bogdanm	0:9b334a45a8ff	1105	* @brief Locks the FLASH control register access
bogdanm	0:9b334a45a8ff	1106	* @retval HAL Status
bogdanm	0:9b334a45a8ff	1107	*/
bogdanm	0:9b334a45a8ff	1108	HAL_StatusTypeDef HAL_FLASH_Lock(void)
bogdanm	0:9b334a45a8ff	1109	{
bogdanm	0:9b334a45a8ff	1110	/* Set the LOCK Bit to lock the FLASH BANK1 Registers access */
bogdanm	0:9b334a45a8ff	1111	SET_BIT(FLASH->CR, FLASH_CR_LOCK);
bogdanm	0:9b334a45a8ff	1112
bogdanm	0:9b334a45a8ff	1113	/* Set the LOCK Bit to lock the FLASH BANK2 Registers access */
bogdanm	0:9b334a45a8ff	1114	SET_BIT(FLASH->CR2, FLASH_CR2_LOCK);
bogdanm	0:9b334a45a8ff	1115
bogdanm	0:9b334a45a8ff	1116	return HAL_OK;
bogdanm	0:9b334a45a8ff	1117	}
bogdanm	0:9b334a45a8ff	1118	/**
bogdanm	0:9b334a45a8ff	1119	* @}
bogdanm	0:9b334a45a8ff	1120	*/
bogdanm	0:9b334a45a8ff	1121
bogdanm	0:9b334a45a8ff	1122	/** @addtogroup FLASH_Exported_Functions_Group1
bogdanm	0:9b334a45a8ff	1123	* @{
bogdanm	0:9b334a45a8ff	1124	*/
bogdanm	0:9b334a45a8ff	1125
bogdanm	0:9b334a45a8ff	1126	/**
bogdanm	0:9b334a45a8ff	1127	* @brief Program halfword, word or double word at a specified address
bogdanm	0:9b334a45a8ff	1128	* @note The function HAL_FLASH_Unlock() should be called before to unlock the FLASH interface
bogdanm	0:9b334a45a8ff	1129	* The function HAL_FLASH_Lock() should be called after to lock the FLASH interface
bogdanm	0:9b334a45a8ff	1130	*
bogdanm	0:9b334a45a8ff	1131	* @note If an erase and a program operations are requested simultaneously,
bogdanm	0:9b334a45a8ff	1132	* the erase operation is performed before the program one.
bogdanm	0:9b334a45a8ff	1133	*
bogdanm	0:9b334a45a8ff	1134	* @note FLASH should be previously erased before new programmation (only exception to this
bogdanm	0:9b334a45a8ff	1135	* is when 0x0000 is programmed)
bogdanm	0:9b334a45a8ff	1136	*
bogdanm	0:9b334a45a8ff	1137	* @param TypeProgram: Indicate the way to program at a specified address.
bogdanm	0:9b334a45a8ff	1138	* This parameter can be a value of @ref FLASH_Type_Program
bogdanm	0:9b334a45a8ff	1139	* @param Address: Specifies the address to be programmed.
bogdanm	0:9b334a45a8ff	1140	* @param Data: Specifies the data to be programmed
bogdanm	0:9b334a45a8ff	1141	*
bogdanm	0:9b334a45a8ff	1142	* @retval HAL_StatusTypeDef HAL Status
bogdanm	0:9b334a45a8ff	1143	*/
bogdanm	0:9b334a45a8ff	1144	HAL_StatusTypeDef HAL_FLASH_Program(uint32_t TypeProgram, uint32_t Address, uint64_t Data)
bogdanm	0:9b334a45a8ff	1145	{
bogdanm	0:9b334a45a8ff	1146	HAL_StatusTypeDef status = HAL_ERROR;
bogdanm	0:9b334a45a8ff	1147	uint8_t index = 0;
bogdanm	0:9b334a45a8ff	1148	uint8_t nbiterations = 0;
bogdanm	0:9b334a45a8ff	1149
bogdanm	0:9b334a45a8ff	1150	/* Process Locked */
bogdanm	0:9b334a45a8ff	1151	__HAL_LOCK(&pFlash);
bogdanm	0:9b334a45a8ff	1152
bogdanm	0:9b334a45a8ff	1153	/* Check the parameters */
bogdanm	0:9b334a45a8ff	1154	assert_param(IS_FLASH_TYPEPROGRAM(TypeProgram));
bogdanm	0:9b334a45a8ff	1155	assert_param(IS_FLASH_PROGRAM_ADDRESS(Address));
bogdanm	0:9b334a45a8ff	1156
bogdanm	0:9b334a45a8ff	1157	if(Address <= FLASH_BANK1_END)
bogdanm	0:9b334a45a8ff	1158	{
bogdanm	0:9b334a45a8ff	1159	/* Wait for last operation to be completed */
bogdanm	0:9b334a45a8ff	1160	status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
bogdanm	0:9b334a45a8ff	1161	}
bogdanm	0:9b334a45a8ff	1162	else
bogdanm	0:9b334a45a8ff	1163	{
bogdanm	0:9b334a45a8ff	1164	/* Wait for last operation to be completed */
bogdanm	0:9b334a45a8ff	1165	status = FLASH_WaitForLastOperationBank2((uint32_t)FLASH_TIMEOUT_VALUE);
bogdanm	0:9b334a45a8ff	1166	}
bogdanm	0:9b334a45a8ff	1167
bogdanm	0:9b334a45a8ff	1168	if(status == HAL_OK)
bogdanm	0:9b334a45a8ff	1169	{
bogdanm	0:9b334a45a8ff	1170	if(TypeProgram == FLASH_TYPEPROGRAM_HALFWORD)
bogdanm	0:9b334a45a8ff	1171	{
bogdanm	0:9b334a45a8ff	1172	/* Program halfword (16-bit) at a specified address. */
bogdanm	0:9b334a45a8ff	1173	nbiterations = 1;
bogdanm	0:9b334a45a8ff	1174	}
bogdanm	0:9b334a45a8ff	1175	else if(TypeProgram == FLASH_TYPEPROGRAM_WORD)
bogdanm	0:9b334a45a8ff	1176	{
bogdanm	0:9b334a45a8ff	1177	/* Program word (32-bit = 216-bit) at a specified address. /
bogdanm	0:9b334a45a8ff	1178	nbiterations = 2;
bogdanm	0:9b334a45a8ff	1179	}
bogdanm	0:9b334a45a8ff	1180	else
bogdanm	0:9b334a45a8ff	1181	{
bogdanm	0:9b334a45a8ff	1182	/* Program double word (64-bit = 416-bit) at a specified address. /
bogdanm	0:9b334a45a8ff	1183	nbiterations = 4;
bogdanm	0:9b334a45a8ff	1184	}
bogdanm	0:9b334a45a8ff	1185
bogdanm	0:9b334a45a8ff	1186	for (index = 0; index < nbiterations; index++)
bogdanm	0:9b334a45a8ff	1187	{
bogdanm	0:9b334a45a8ff	1188	FLASH_Program_HalfWord((Address + (2index)), (uint16_t)(Data >> (16index)));
bogdanm	0:9b334a45a8ff	1189
bogdanm	0:9b334a45a8ff	1190	if(Address <= FLASH_BANK1_END)
bogdanm	0:9b334a45a8ff	1191	{
bogdanm	0:9b334a45a8ff	1192	/* Wait for last operation to be completed */
bogdanm	0:9b334a45a8ff	1193	status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
bogdanm	0:9b334a45a8ff	1194
bogdanm	0:9b334a45a8ff	1195	/* If the program operation is completed, disable the PG Bit */
bogdanm	0:9b334a45a8ff	1196	CLEAR_BIT(FLASH->CR, FLASH_CR_PG);
bogdanm	0:9b334a45a8ff	1197	}
bogdanm	0:9b334a45a8ff	1198	else
bogdanm	0:9b334a45a8ff	1199	{
bogdanm	0:9b334a45a8ff	1200	/* Wait for last operation to be completed */
bogdanm	0:9b334a45a8ff	1201	status = FLASH_WaitForLastOperationBank2((uint32_t)FLASH_TIMEOUT_VALUE);
bogdanm	0:9b334a45a8ff	1202
bogdanm	0:9b334a45a8ff	1203	/* If the program operation is completed, disable the PG Bit */
bogdanm	0:9b334a45a8ff	1204	CLEAR_BIT(FLASH->CR2, FLASH_CR2_PG);
bogdanm	0:9b334a45a8ff	1205	}
bogdanm	0:9b334a45a8ff	1206	/* In case of error, stop programation procedure */
bogdanm	0:9b334a45a8ff	1207	if (status != HAL_OK)
bogdanm	0:9b334a45a8ff	1208	{
bogdanm	0:9b334a45a8ff	1209	break;
bogdanm	0:9b334a45a8ff	1210	}
bogdanm	0:9b334a45a8ff	1211	}
bogdanm	0:9b334a45a8ff	1212	}
bogdanm	0:9b334a45a8ff	1213
bogdanm	0:9b334a45a8ff	1214	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1215	__HAL_UNLOCK(&pFlash);
bogdanm	0:9b334a45a8ff	1216
bogdanm	0:9b334a45a8ff	1217	return status;
bogdanm	0:9b334a45a8ff	1218	}
bogdanm	0:9b334a45a8ff	1219
bogdanm	0:9b334a45a8ff	1220	/**
bogdanm	0:9b334a45a8ff	1221	* @brief Program halfword, word or double word at a specified address with interrupt enabled.
bogdanm	0:9b334a45a8ff	1222	* @note The function HAL_FLASH_Unlock() should be called before to unlock the FLASH interface
bogdanm	0:9b334a45a8ff	1223	* The function HAL_FLASH_Lock() should be called after to lock the FLASH interface
bogdanm	0:9b334a45a8ff	1224	*
bogdanm	0:9b334a45a8ff	1225	* @note If an erase and a program operations are requested simultaneously,
bogdanm	0:9b334a45a8ff	1226	* the erase operation is performed before the program one.
bogdanm	0:9b334a45a8ff	1227	*
bogdanm	0:9b334a45a8ff	1228	* @param TypeProgram: Indicate the way to program at a specified address.
bogdanm	0:9b334a45a8ff	1229	* This parameter can be a value of @ref FLASH_Type_Program
bogdanm	0:9b334a45a8ff	1230	* @param Address: Specifies the address to be programmed.
bogdanm	0:9b334a45a8ff	1231	* @param Data: Specifies the data to be programmed
bogdanm	0:9b334a45a8ff	1232	*
bogdanm	0:9b334a45a8ff	1233	* @retval HAL_StatusTypeDef HAL Status
bogdanm	0:9b334a45a8ff	1234	*/
bogdanm	0:9b334a45a8ff	1235	HAL_StatusTypeDef HAL_FLASH_Program_IT(uint32_t TypeProgram, uint32_t Address, uint64_t Data)
bogdanm	0:9b334a45a8ff	1236	{
bogdanm	0:9b334a45a8ff	1237	HAL_StatusTypeDef status = HAL_OK;
bogdanm	0:9b334a45a8ff	1238
bogdanm	0:9b334a45a8ff	1239	/* Process Locked */
bogdanm	0:9b334a45a8ff	1240	__HAL_LOCK(&pFlash);
bogdanm	0:9b334a45a8ff	1241
bogdanm	0:9b334a45a8ff	1242	/* If procedure already ongoing, reject the next one */
bogdanm	0:9b334a45a8ff	1243	if (pFlash.ProcedureOnGoing != FLASH_PROC_NONE)
bogdanm	0:9b334a45a8ff	1244	{
bogdanm	0:9b334a45a8ff	1245	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	1246	}
bogdanm	0:9b334a45a8ff	1247
bogdanm	0:9b334a45a8ff	1248	/* Check the parameters */
bogdanm	0:9b334a45a8ff	1249	assert_param(IS_FLASH_TYPEPROGRAM(TypeProgram));
bogdanm	0:9b334a45a8ff	1250	assert_param(IS_FLASH_PROGRAM_ADDRESS(Address));
bogdanm	0:9b334a45a8ff	1251
bogdanm	0:9b334a45a8ff	1252	if(Address <= FLASH_BANK1_END)
bogdanm	0:9b334a45a8ff	1253	{
bogdanm	0:9b334a45a8ff	1254	/* Enable End of FLASH Operation and Error source interrupts */
bogdanm	0:9b334a45a8ff	1255	__HAL_FLASH_ENABLE_IT((FLASH_IT_EOP_BANK1 \| FLASH_IT_ERR_BANK1));
bogdanm	0:9b334a45a8ff	1256	}else
bogdanm	0:9b334a45a8ff	1257	{
bogdanm	0:9b334a45a8ff	1258	/* Enable End of FLASH Operation and Error source interrupts */
bogdanm	0:9b334a45a8ff	1259	__HAL_FLASH_ENABLE_IT((FLASH_IT_EOP_BANK2 \| FLASH_IT_ERR_BANK2));
bogdanm	0:9b334a45a8ff	1260	}
bogdanm	0:9b334a45a8ff	1261
bogdanm	0:9b334a45a8ff	1262	pFlash.Address = Address;
bogdanm	0:9b334a45a8ff	1263	pFlash.Data = Data;
bogdanm	0:9b334a45a8ff	1264
bogdanm	0:9b334a45a8ff	1265	if(TypeProgram == FLASH_TYPEPROGRAM_HALFWORD)
bogdanm	0:9b334a45a8ff	1266	{
bogdanm	0:9b334a45a8ff	1267	pFlash.ProcedureOnGoing = FLASH_PROC_PROGRAMHALFWORD;
bogdanm	0:9b334a45a8ff	1268	/Program halfword (16-bit) at a specified address./
bogdanm	0:9b334a45a8ff	1269	pFlash.DataRemaining = 1;
bogdanm	0:9b334a45a8ff	1270	}
bogdanm	0:9b334a45a8ff	1271	else if(TypeProgram == FLASH_TYPEPROGRAM_WORD)
bogdanm	0:9b334a45a8ff	1272	{
bogdanm	0:9b334a45a8ff	1273	pFlash.ProcedureOnGoing = FLASH_PROC_PROGRAMWORD;
bogdanm	0:9b334a45a8ff	1274	/Program word (32-bit : 216-bit) at a specified address.*/
bogdanm	0:9b334a45a8ff	1275	pFlash.DataRemaining = 2;
bogdanm	0:9b334a45a8ff	1276	}
bogdanm	0:9b334a45a8ff	1277	else
bogdanm	0:9b334a45a8ff	1278	{
bogdanm	0:9b334a45a8ff	1279	pFlash.ProcedureOnGoing = FLASH_PROC_PROGRAMDOUBLEWORD;
bogdanm	0:9b334a45a8ff	1280	/Program double word (64-bit : 416-bit) at a specified address.*/
bogdanm	0:9b334a45a8ff	1281	pFlash.DataRemaining = 4;
bogdanm	0:9b334a45a8ff	1282	}
bogdanm	0:9b334a45a8ff	1283
bogdanm	0:9b334a45a8ff	1284	/Program halfword (16-bit) at a specified address./
bogdanm	0:9b334a45a8ff	1285	FLASH_Program_HalfWord(Address, (uint16_t)Data);
bogdanm	0:9b334a45a8ff	1286
bogdanm	0:9b334a45a8ff	1287	return status;
bogdanm	0:9b334a45a8ff	1288	}
bogdanm	0:9b334a45a8ff	1289
bogdanm	0:9b334a45a8ff	1290	/**
bogdanm	0:9b334a45a8ff	1291	* @brief This function handles FLASH interrupt request.
bogdanm	0:9b334a45a8ff	1292	* @retval None
bogdanm	0:9b334a45a8ff	1293	*/
bogdanm	0:9b334a45a8ff	1294	void HAL_FLASH_IRQHandler(void)
bogdanm	0:9b334a45a8ff	1295	{
bogdanm	0:9b334a45a8ff	1296	uint32_t addresstmp = 0;
bogdanm	0:9b334a45a8ff	1297
bogdanm	0:9b334a45a8ff	1298	/* Check FLASH operation error flags */
bogdanm	0:9b334a45a8ff	1299	if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR_BANK1) \|\| __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR_BANK1) \|\| \
bogdanm	0:9b334a45a8ff	1300	(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR_BANK2) \|\| __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR_BANK2)))
bogdanm	0:9b334a45a8ff	1301	{
bogdanm	0:9b334a45a8ff	1302	/Save the Error code/
bogdanm	0:9b334a45a8ff	1303	FLASH_SetErrorCode();
bogdanm	0:9b334a45a8ff	1304
bogdanm	0:9b334a45a8ff	1305	/* FLASH error interrupt user callback */
bogdanm	0:9b334a45a8ff	1306	HAL_FLASH_OperationErrorCallback(pFlash.Address);
bogdanm	0:9b334a45a8ff	1307
bogdanm	0:9b334a45a8ff	1308	/* Reset address and stop the procedure ongoing*/
bogdanm	0:9b334a45a8ff	1309	pFlash.Address = 0xFFFFFFFF;
bogdanm	0:9b334a45a8ff	1310	pFlash.ProcedureOnGoing = FLASH_PROC_NONE;
bogdanm	0:9b334a45a8ff	1311	}
bogdanm	0:9b334a45a8ff	1312
bogdanm	0:9b334a45a8ff	1313	/* Check FLASH End of Operation flag */
bogdanm	0:9b334a45a8ff	1314	if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_EOP_BANK1))
bogdanm	0:9b334a45a8ff	1315	{
bogdanm	0:9b334a45a8ff	1316	/* Clear FLASH End of Operation pending bit */
bogdanm	0:9b334a45a8ff	1317	__HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP_BANK1);
bogdanm	0:9b334a45a8ff	1318
bogdanm	0:9b334a45a8ff	1319	/* Process can continue only if no error detected */
bogdanm	0:9b334a45a8ff	1320	if(pFlash.ProcedureOnGoing != FLASH_PROC_NONE)
bogdanm	0:9b334a45a8ff	1321	{
bogdanm	0:9b334a45a8ff	1322	if(pFlash.ProcedureOnGoing == FLASH_PROC_PAGEERASE)
bogdanm	0:9b334a45a8ff	1323	{
bogdanm	0:9b334a45a8ff	1324	/* Nb of pages to erased can be decreased */
bogdanm	0:9b334a45a8ff	1325	pFlash.DataRemaining--;
bogdanm	0:9b334a45a8ff	1326
bogdanm	0:9b334a45a8ff	1327	/* Indicate user which page address has been erased*/
bogdanm	0:9b334a45a8ff	1328	HAL_FLASH_EndOfOperationCallback(pFlash.Address);
bogdanm	0:9b334a45a8ff	1329
bogdanm	0:9b334a45a8ff	1330	/* Check if there are still pages to erase*/
bogdanm	0:9b334a45a8ff	1331	if(pFlash.DataRemaining != 0)
bogdanm	0:9b334a45a8ff	1332	{
bogdanm	0:9b334a45a8ff	1333	/* Increment page address to next page */
bogdanm	0:9b334a45a8ff	1334	pFlash.Address += FLASH_PAGE_SIZE;
bogdanm	0:9b334a45a8ff	1335	addresstmp = pFlash.Address;
bogdanm	0:9b334a45a8ff	1336
bogdanm	0:9b334a45a8ff	1337	/* Operation is completed, disable the PER Bit */
bogdanm	0:9b334a45a8ff	1338	CLEAR_BIT(FLASH->CR, FLASH_CR_PER);
bogdanm	0:9b334a45a8ff	1339
bogdanm	0:9b334a45a8ff	1340	FLASH_PageErase(addresstmp);
bogdanm	0:9b334a45a8ff	1341	}
bogdanm	0:9b334a45a8ff	1342	else
bogdanm	0:9b334a45a8ff	1343	{
bogdanm	0:9b334a45a8ff	1344	/No more pages to Erase/
bogdanm	0:9b334a45a8ff	1345
bogdanm	0:9b334a45a8ff	1346	/Reset Address and stop Erase pages procedure/
bogdanm	0:9b334a45a8ff	1347	pFlash.Address = 0xFFFFFFFF;
bogdanm	0:9b334a45a8ff	1348	pFlash.ProcedureOnGoing = FLASH_PROC_NONE;
bogdanm	0:9b334a45a8ff	1349	}
bogdanm	0:9b334a45a8ff	1350	}
bogdanm	0:9b334a45a8ff	1351	else if(pFlash.ProcedureOnGoing == FLASH_PROC_MASSERASE)
bogdanm	0:9b334a45a8ff	1352	{
bogdanm	0:9b334a45a8ff	1353	/* Operation is completed, disable the MER Bit */
bogdanm	0:9b334a45a8ff	1354	CLEAR_BIT(FLASH->CR, FLASH_CR_MER);
bogdanm	0:9b334a45a8ff	1355
bogdanm	0:9b334a45a8ff	1356	/* Stop Mass Erase procedure if no pending mass erase on other bank */
bogdanm	0:9b334a45a8ff	1357	if (HAL_IS_BIT_CLR(FLASH->CR2, FLASH_CR2_MER))
bogdanm	0:9b334a45a8ff	1358	{
bogdanm	0:9b334a45a8ff	1359	/* MassErase ended. Return the selected bank*/
bogdanm	0:9b334a45a8ff	1360	/* FLASH EOP interrupt user callback */
bogdanm	0:9b334a45a8ff	1361	HAL_FLASH_EndOfOperationCallback(0);
bogdanm	0:9b334a45a8ff	1362
bogdanm	0:9b334a45a8ff	1363	pFlash.ProcedureOnGoing = FLASH_PROC_NONE;
bogdanm	0:9b334a45a8ff	1364	}
bogdanm	0:9b334a45a8ff	1365	}
bogdanm	0:9b334a45a8ff	1366	else
bogdanm	0:9b334a45a8ff	1367	{
bogdanm	0:9b334a45a8ff	1368	/* Nb of 16-bit data to program can be decreased */
bogdanm	0:9b334a45a8ff	1369	pFlash.DataRemaining--;
bogdanm	0:9b334a45a8ff	1370
bogdanm	0:9b334a45a8ff	1371	/* Check if there are still 16-bit data to program */
bogdanm	0:9b334a45a8ff	1372	if(pFlash.DataRemaining != 0)
bogdanm	0:9b334a45a8ff	1373	{
bogdanm	0:9b334a45a8ff	1374	/* Increment address to 16-bit */
bogdanm	0:9b334a45a8ff	1375	pFlash.Address += 2;
bogdanm	0:9b334a45a8ff	1376	addresstmp = pFlash.Address;
bogdanm	0:9b334a45a8ff	1377
bogdanm	0:9b334a45a8ff	1378	/* Shift to have next 16-bit data */
bogdanm	0:9b334a45a8ff	1379	pFlash.Data = (pFlash.Data >> 16);
bogdanm	0:9b334a45a8ff	1380
bogdanm	0:9b334a45a8ff	1381	/* Operation is completed, disable the PG Bit */
bogdanm	0:9b334a45a8ff	1382	CLEAR_BIT(FLASH->CR, FLASH_CR_PG);
bogdanm	0:9b334a45a8ff	1383
bogdanm	0:9b334a45a8ff	1384	/Program halfword (16-bit) at a specified address./
bogdanm	0:9b334a45a8ff	1385	FLASH_Program_HalfWord(addresstmp, (uint16_t)pFlash.Data);
bogdanm	0:9b334a45a8ff	1386	}
bogdanm	0:9b334a45a8ff	1387	else
bogdanm	0:9b334a45a8ff	1388	{
bogdanm	0:9b334a45a8ff	1389	/Program ended. Return the selected address/
bogdanm	0:9b334a45a8ff	1390	/* FLASH EOP interrupt user callback */
bogdanm	0:9b334a45a8ff	1391	if (pFlash.ProcedureOnGoing == FLASH_PROC_PROGRAMHALFWORD)
bogdanm	0:9b334a45a8ff	1392	{
bogdanm	0:9b334a45a8ff	1393	HAL_FLASH_EndOfOperationCallback(pFlash.Address);
bogdanm	0:9b334a45a8ff	1394	}
bogdanm	0:9b334a45a8ff	1395	else if (pFlash.ProcedureOnGoing == FLASH_PROC_PROGRAMWORD)
bogdanm	0:9b334a45a8ff	1396	{
bogdanm	0:9b334a45a8ff	1397	HAL_FLASH_EndOfOperationCallback(pFlash.Address - 2);
bogdanm	0:9b334a45a8ff	1398	}
bogdanm	0:9b334a45a8ff	1399	else
bogdanm	0:9b334a45a8ff	1400	{
bogdanm	0:9b334a45a8ff	1401	HAL_FLASH_EndOfOperationCallback(pFlash.Address - 6);
bogdanm	0:9b334a45a8ff	1402	}
bogdanm	0:9b334a45a8ff	1403
bogdanm	0:9b334a45a8ff	1404	/* Reset Address and stop Program procedure*/
bogdanm	0:9b334a45a8ff	1405	pFlash.Address = 0xFFFFFFFF;
bogdanm	0:9b334a45a8ff	1406	pFlash.ProcedureOnGoing = FLASH_PROC_NONE;
bogdanm	0:9b334a45a8ff	1407	}
bogdanm	0:9b334a45a8ff	1408	}
bogdanm	0:9b334a45a8ff	1409	}
bogdanm	0:9b334a45a8ff	1410	}
bogdanm	0:9b334a45a8ff	1411
bogdanm	0:9b334a45a8ff	1412	/* Check FLASH End of Operation flag */
bogdanm	0:9b334a45a8ff	1413	if(__HAL_FLASH_GET_FLAG( FLASH_FLAG_EOP_BANK2))
bogdanm	0:9b334a45a8ff	1414	{
bogdanm	0:9b334a45a8ff	1415	/* Clear FLASH End of Operation pending bit */
bogdanm	0:9b334a45a8ff	1416	__HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP_BANK2);
bogdanm	0:9b334a45a8ff	1417
bogdanm	0:9b334a45a8ff	1418	/* Process can continue only if no error detected */
bogdanm	0:9b334a45a8ff	1419	if(pFlash.ProcedureOnGoing != FLASH_PROC_NONE)
bogdanm	0:9b334a45a8ff	1420	{
bogdanm	0:9b334a45a8ff	1421	if(pFlash.ProcedureOnGoing == FLASH_PROC_PAGEERASE)
bogdanm	0:9b334a45a8ff	1422	{
bogdanm	0:9b334a45a8ff	1423	/* Nb of pages to erased can be decreased */
bogdanm	0:9b334a45a8ff	1424	pFlash.DataRemaining--;
bogdanm	0:9b334a45a8ff	1425
bogdanm	0:9b334a45a8ff	1426	/* Indicate user which page address has been erased*/
bogdanm	0:9b334a45a8ff	1427	HAL_FLASH_EndOfOperationCallback(pFlash.Address);
bogdanm	0:9b334a45a8ff	1428
bogdanm	0:9b334a45a8ff	1429	/* Check if there are still pages to erase*/
bogdanm	0:9b334a45a8ff	1430	if(pFlash.DataRemaining != 0)
bogdanm	0:9b334a45a8ff	1431	{
bogdanm	0:9b334a45a8ff	1432	/* Increment page address to next page */
bogdanm	0:9b334a45a8ff	1433	pFlash.Address += FLASH_PAGE_SIZE;
bogdanm	0:9b334a45a8ff	1434	addresstmp = pFlash.Address;
bogdanm	0:9b334a45a8ff	1435
bogdanm	0:9b334a45a8ff	1436	/* Operation is completed, disable the PER Bit */
bogdanm	0:9b334a45a8ff	1437	CLEAR_BIT(FLASH->CR2, FLASH_CR2_PER);
bogdanm	0:9b334a45a8ff	1438
bogdanm	0:9b334a45a8ff	1439	FLASH_PageErase(addresstmp);
bogdanm	0:9b334a45a8ff	1440	}
bogdanm	0:9b334a45a8ff	1441	else
bogdanm	0:9b334a45a8ff	1442	{
bogdanm	0:9b334a45a8ff	1443	/No more pages to Erase/
bogdanm	0:9b334a45a8ff	1444
bogdanm	0:9b334a45a8ff	1445	/Reset Address and stop Erase pages procedure/
bogdanm	0:9b334a45a8ff	1446	pFlash.Address = 0xFFFFFFFF;
bogdanm	0:9b334a45a8ff	1447	pFlash.ProcedureOnGoing = FLASH_PROC_NONE;
bogdanm	0:9b334a45a8ff	1448	}
bogdanm	0:9b334a45a8ff	1449	}
bogdanm	0:9b334a45a8ff	1450	else if(pFlash.ProcedureOnGoing == FLASH_PROC_MASSERASE)
bogdanm	0:9b334a45a8ff	1451	{
bogdanm	0:9b334a45a8ff	1452	/* Operation is completed, disable the MER Bit */
bogdanm	0:9b334a45a8ff	1453	CLEAR_BIT(FLASH->CR2, FLASH_CR2_MER);
bogdanm	0:9b334a45a8ff	1454
bogdanm	0:9b334a45a8ff	1455	if (HAL_IS_BIT_CLR(FLASH->CR, FLASH_CR_MER))
bogdanm	0:9b334a45a8ff	1456	{
bogdanm	0:9b334a45a8ff	1457	/* MassErase ended. Return the selected bank*/
bogdanm	0:9b334a45a8ff	1458	/* FLASH EOP interrupt user callback */
bogdanm	0:9b334a45a8ff	1459	HAL_FLASH_EndOfOperationCallback(0);
bogdanm	0:9b334a45a8ff	1460
bogdanm	0:9b334a45a8ff	1461	pFlash.ProcedureOnGoing = FLASH_PROC_NONE;
bogdanm	0:9b334a45a8ff	1462	}
bogdanm	0:9b334a45a8ff	1463	}
bogdanm	0:9b334a45a8ff	1464	else
bogdanm	0:9b334a45a8ff	1465	{
bogdanm	0:9b334a45a8ff	1466	/* Nb of 16-bit data to program can be decreased */
bogdanm	0:9b334a45a8ff	1467	pFlash.DataRemaining--;
bogdanm	0:9b334a45a8ff	1468
bogdanm	0:9b334a45a8ff	1469	/* Check if there are still 16-bit data to program */
bogdanm	0:9b334a45a8ff	1470	if(pFlash.DataRemaining != 0)
bogdanm	0:9b334a45a8ff	1471	{
bogdanm	0:9b334a45a8ff	1472	/* Increment address to 16-bit */
bogdanm	0:9b334a45a8ff	1473	pFlash.Address += 2;
bogdanm	0:9b334a45a8ff	1474	addresstmp = pFlash.Address;
bogdanm	0:9b334a45a8ff	1475
bogdanm	0:9b334a45a8ff	1476	/* Shift to have next 16-bit data */
bogdanm	0:9b334a45a8ff	1477	pFlash.Data = (pFlash.Data >> 16);
bogdanm	0:9b334a45a8ff	1478
bogdanm	0:9b334a45a8ff	1479	/* Operation is completed, disable the PG Bit */
bogdanm	0:9b334a45a8ff	1480	CLEAR_BIT(FLASH->CR2, FLASH_CR2_PG);
bogdanm	0:9b334a45a8ff	1481
bogdanm	0:9b334a45a8ff	1482	/Program halfword (16-bit) at a specified address./
bogdanm	0:9b334a45a8ff	1483	FLASH_Program_HalfWord(addresstmp, (uint16_t)pFlash.Data);
bogdanm	0:9b334a45a8ff	1484	}
bogdanm	0:9b334a45a8ff	1485	else
bogdanm	0:9b334a45a8ff	1486	{
bogdanm	0:9b334a45a8ff	1487	/Program ended. Return the selected address/
bogdanm	0:9b334a45a8ff	1488	/* FLASH EOP interrupt user callback */
bogdanm	0:9b334a45a8ff	1489	if (pFlash.ProcedureOnGoing == FLASH_PROC_PROGRAMHALFWORD)
bogdanm	0:9b334a45a8ff	1490	{
bogdanm	0:9b334a45a8ff	1491	HAL_FLASH_EndOfOperationCallback(pFlash.Address);
bogdanm	0:9b334a45a8ff	1492	}
bogdanm	0:9b334a45a8ff	1493	else if (pFlash.ProcedureOnGoing == FLASH_PROC_PROGRAMWORD)
bogdanm	0:9b334a45a8ff	1494	{
bogdanm	0:9b334a45a8ff	1495	HAL_FLASH_EndOfOperationCallback(pFlash.Address-2);
bogdanm	0:9b334a45a8ff	1496	}
bogdanm	0:9b334a45a8ff	1497	else
bogdanm	0:9b334a45a8ff	1498	{
bogdanm	0:9b334a45a8ff	1499	HAL_FLASH_EndOfOperationCallback(pFlash.Address-6);
bogdanm	0:9b334a45a8ff	1500	}
bogdanm	0:9b334a45a8ff	1501
bogdanm	0:9b334a45a8ff	1502	/* Reset Address and stop Program procedure*/
bogdanm	0:9b334a45a8ff	1503	pFlash.Address = 0xFFFFFFFF;
bogdanm	0:9b334a45a8ff	1504	pFlash.ProcedureOnGoing = FLASH_PROC_NONE;
bogdanm	0:9b334a45a8ff	1505	}
bogdanm	0:9b334a45a8ff	1506	}
bogdanm	0:9b334a45a8ff	1507	}
bogdanm	0:9b334a45a8ff	1508	}
bogdanm	0:9b334a45a8ff	1509
bogdanm	0:9b334a45a8ff	1510	if(pFlash.ProcedureOnGoing == FLASH_PROC_NONE)
bogdanm	0:9b334a45a8ff	1511	{
bogdanm	0:9b334a45a8ff	1512	/* Operation is completed, disable the PG, PER and MER Bits for both bank */
bogdanm	0:9b334a45a8ff	1513	CLEAR_BIT(FLASH->CR, (FLASH_CR_PG \| FLASH_CR_PER \| FLASH_CR_MER));
bogdanm	0:9b334a45a8ff	1514	CLEAR_BIT(FLASH->CR2, (FLASH_CR2_PG \| FLASH_CR2_PER \| FLASH_CR2_MER));
bogdanm	0:9b334a45a8ff	1515
bogdanm	0:9b334a45a8ff	1516	/* Disable End of FLASH Operation and Error source interrupts for both banks */
bogdanm	0:9b334a45a8ff	1517	__HAL_FLASH_DISABLE_IT(FLASH_IT_EOP_BANK1 \| FLASH_IT_ERR_BANK1 \| FLASH_IT_EOP_BANK2 \| FLASH_IT_ERR_BANK2);
bogdanm	0:9b334a45a8ff	1518
bogdanm	0:9b334a45a8ff	1519	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1520	__HAL_UNLOCK(&pFlash);
bogdanm	0:9b334a45a8ff	1521	}
bogdanm	0:9b334a45a8ff	1522	}
bogdanm	0:9b334a45a8ff	1523	/**
bogdanm	0:9b334a45a8ff	1524	* @}
bogdanm	0:9b334a45a8ff	1525	*/
bogdanm	0:9b334a45a8ff	1526
bogdanm	0:9b334a45a8ff	1527	/**
bogdanm	0:9b334a45a8ff	1528	* @}
bogdanm	0:9b334a45a8ff	1529	*/
bogdanm	0:9b334a45a8ff	1530	#endif /* STM32F101xG \|\| STM32F103xG */
bogdanm	0:9b334a45a8ff	1531
bogdanm	0:9b334a45a8ff	1532	/** @addtogroup FLASH_Private_Functions
bogdanm	0:9b334a45a8ff	1533	* @{
bogdanm	0:9b334a45a8ff	1534	*/
bogdanm	0:9b334a45a8ff	1535
bogdanm	0:9b334a45a8ff	1536	/**
bogdanm	0:9b334a45a8ff	1537	* @brief Program a half-word (16-bit) at a specified address.
bogdanm	0:9b334a45a8ff	1538	* @param Address: specifies the address to be programmed.
bogdanm	0:9b334a45a8ff	1539	* @param Data: specifies the data to be programmed.
bogdanm	0:9b334a45a8ff	1540	* @retval None
bogdanm	0:9b334a45a8ff	1541	*/
bogdanm	0:9b334a45a8ff	1542	void FLASH_Program_HalfWord(uint32_t Address, uint16_t Data)
bogdanm	0:9b334a45a8ff	1543	{
bogdanm	0:9b334a45a8ff	1544	/* Clean the error context */
bogdanm	0:9b334a45a8ff	1545	pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
bogdanm	0:9b334a45a8ff	1546
bogdanm	0:9b334a45a8ff	1547	#if defined(STM32F101xG) \|\| defined(STM32F103xG)
bogdanm	0:9b334a45a8ff	1548	if(Address <= FLASH_BANK1_END)
bogdanm	0:9b334a45a8ff	1549	{
bogdanm	0:9b334a45a8ff	1550	#endif /* STM32F101xG \|\| STM32F103xG */
bogdanm	0:9b334a45a8ff	1551	/* Proceed to program the new data */
bogdanm	0:9b334a45a8ff	1552	SET_BIT(FLASH->CR, FLASH_CR_PG);
bogdanm	0:9b334a45a8ff	1553	#if defined(STM32F101xG) \|\| defined(STM32F103xG)
bogdanm	0:9b334a45a8ff	1554	}
bogdanm	0:9b334a45a8ff	1555	else
bogdanm	0:9b334a45a8ff	1556	{
bogdanm	0:9b334a45a8ff	1557	/* Proceed to program the new data */
bogdanm	0:9b334a45a8ff	1558	SET_BIT(FLASH->CR2, FLASH_CR2_PG);
bogdanm	0:9b334a45a8ff	1559	}
bogdanm	0:9b334a45a8ff	1560	#endif /* STM32F101xG \|\| STM32F103xG */
bogdanm	0:9b334a45a8ff	1561
bogdanm	0:9b334a45a8ff	1562	/* Write data in the address */
bogdanm	0:9b334a45a8ff	1563	(__IO uint16_t)Address = Data;
bogdanm	0:9b334a45a8ff	1564	}
bogdanm	0:9b334a45a8ff	1565
bogdanm	0:9b334a45a8ff	1566	/**
bogdanm	0:9b334a45a8ff	1567	* @brief Set the specific FLASH error flag.
bogdanm	0:9b334a45a8ff	1568	* @retval None
bogdanm	0:9b334a45a8ff	1569	*/
bogdanm	0:9b334a45a8ff	1570	void FLASH_SetErrorCode(void)
bogdanm	0:9b334a45a8ff	1571	{
bogdanm	0:9b334a45a8ff	1572	#if defined(STM32F101xG) \|\| defined(STM32F103xG)
bogdanm	0:9b334a45a8ff	1573	if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) \|\| __HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR_BANK2))
bogdanm	0:9b334a45a8ff	1574	#else
bogdanm	0:9b334a45a8ff	1575	if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR))
bogdanm	0:9b334a45a8ff	1576	#endif /* STM32F101xG \|\| STM32F103xG */
bogdanm	0:9b334a45a8ff	1577	{
bogdanm	0:9b334a45a8ff	1578	pFlash.ErrorCode \|= HAL_FLASH_ERROR_WRP;
bogdanm	0:9b334a45a8ff	1579	}
bogdanm	0:9b334a45a8ff	1580	#if defined(STM32F101xG) \|\| defined(STM32F103xG)
bogdanm	0:9b334a45a8ff	1581	if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR) \|\| __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR_BANK2))
bogdanm	0:9b334a45a8ff	1582	#else
bogdanm	0:9b334a45a8ff	1583	if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR))
bogdanm	0:9b334a45a8ff	1584	#endif /* STM32F101xG \|\| STM32F103xG */
bogdanm	0:9b334a45a8ff	1585	{
bogdanm	0:9b334a45a8ff	1586	pFlash.ErrorCode \|= HAL_FLASH_ERROR_PROG;
bogdanm	0:9b334a45a8ff	1587	}
bogdanm	0:9b334a45a8ff	1588
bogdanm	0:9b334a45a8ff	1589	if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR))
bogdanm	0:9b334a45a8ff	1590	{
bogdanm	0:9b334a45a8ff	1591	pFlash.ErrorCode \|= HAL_FLASH_ERROR_OPTV;
bogdanm	0:9b334a45a8ff	1592	__HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_OPTVERR);
bogdanm	0:9b334a45a8ff	1593	}
bogdanm	0:9b334a45a8ff	1594
bogdanm	0:9b334a45a8ff	1595	/* Clear FLASH error pending bits */
bogdanm	0:9b334a45a8ff	1596	#if defined(STM32F101xG) \|\| defined(STM32F103xG)
bogdanm	0:9b334a45a8ff	1597	__HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_WRPERR \| FLASH_FLAG_WRPERR_BANK2 \| FLASH_FLAG_PGERR \| FLASH_FLAG_PGERR_BANK2);
bogdanm	0:9b334a45a8ff	1598	#else
bogdanm	0:9b334a45a8ff	1599	__HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_WRPERR \| FLASH_FLAG_PGERR);
bogdanm	0:9b334a45a8ff	1600	#endif /* STM32F101xG \|\| STM32F103xG */
bogdanm	0:9b334a45a8ff	1601	}
bogdanm	0:9b334a45a8ff	1602
bogdanm	0:9b334a45a8ff	1603	/**
bogdanm	0:9b334a45a8ff	1604	* @brief Erase the specified FLASH memory page
bogdanm	0:9b334a45a8ff	1605	* @param PageAddress: FLASH page to erase
bogdanm	0:9b334a45a8ff	1606	* The value of this parameter depend on device used within the same series
bogdanm	0:9b334a45a8ff	1607	*
bogdanm	0:9b334a45a8ff	1608	* @retval None
bogdanm	0:9b334a45a8ff	1609	*/
bogdanm	0:9b334a45a8ff	1610	void FLASH_PageErase(uint32_t PageAddress)
bogdanm	0:9b334a45a8ff	1611	{
bogdanm	0:9b334a45a8ff	1612	/* Clean the error context */
bogdanm	0:9b334a45a8ff	1613	pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
bogdanm	0:9b334a45a8ff	1614
bogdanm	0:9b334a45a8ff	1615	#if defined(STM32F101xG) \|\| defined(STM32F103xG)
bogdanm	0:9b334a45a8ff	1616	if(PageAddress > FLASH_BANK1_END)
bogdanm	0:9b334a45a8ff	1617	{
bogdanm	0:9b334a45a8ff	1618	/* Proceed to erase the page */
bogdanm	0:9b334a45a8ff	1619	SET_BIT(FLASH->CR2, FLASH_CR2_PER);
bogdanm	0:9b334a45a8ff	1620	WRITE_REG(FLASH->AR2, PageAddress);
bogdanm	0:9b334a45a8ff	1621	SET_BIT(FLASH->CR2, FLASH_CR2_STRT);
bogdanm	0:9b334a45a8ff	1622	}
bogdanm	0:9b334a45a8ff	1623	else
bogdanm	0:9b334a45a8ff	1624	#endif /* STM32F101xG \|\| STM32F103xG */
bogdanm	0:9b334a45a8ff	1625	{
bogdanm	0:9b334a45a8ff	1626	/* Proceed to erase the page */
bogdanm	0:9b334a45a8ff	1627	SET_BIT(FLASH->CR, FLASH_CR_PER);
bogdanm	0:9b334a45a8ff	1628	WRITE_REG(FLASH->AR, PageAddress);
bogdanm	0:9b334a45a8ff	1629	SET_BIT(FLASH->CR, FLASH_CR_STRT);
bogdanm	0:9b334a45a8ff	1630	}
bogdanm	0:9b334a45a8ff	1631	}
bogdanm	0:9b334a45a8ff	1632
bogdanm	0:9b334a45a8ff	1633	/**
bogdanm	0:9b334a45a8ff	1634	* @}
bogdanm	0:9b334a45a8ff	1635	*/
bogdanm	0:9b334a45a8ff	1636
bogdanm	0:9b334a45a8ff	1637	/**
bogdanm	0:9b334a45a8ff	1638	* @}
bogdanm	0:9b334a45a8ff	1639	*/
bogdanm	0:9b334a45a8ff	1640
bogdanm	0:9b334a45a8ff	1641	/**
bogdanm	0:9b334a45a8ff	1642	* @}
bogdanm	0:9b334a45a8ff	1643	*/
bogdanm	0:9b334a45a8ff	1644
bogdanm	0:9b334a45a8ff	1645	#endif /* HAL_FLASH_MODULE_ENABLED */
bogdanm	0:9b334a45a8ff	1646	/**
bogdanm	0:9b334a45a8ff	1647	* @}
bogdanm	0:9b334a45a8ff	1648	*/
bogdanm	0:9b334a45a8ff	1649
bogdanm	0:9b334a45a8ff	1650	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/

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Type:	Library
Created:	16 May 2016
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targets/cmsis/TARGET_STM/TARGET_STM32F1/stm32f1xx_hal_flash_ex.c@0:9b334a45a8ff, 2015-10-01 (annotated)

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