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fix LPC812 PWM

Dependents:   IR_LED_Send

Fork of mbed-dev by mbed official

targets/cmsis/TARGET_STM/TARGET_STM32F1/stm32f1xx_hal_cec.h@0:9b334a45a8ff, 2015-10-01 (annotated)

Committer:
bogdanm
Date:
Thu Oct 01 15:25:22 2015 +0300
Revision:
0:9b334a45a8ff
Child:
124:6a4a5b7d7324
Initial commit on mbed-dev



Replaces mbed-src (now inactive)

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bogdanm 0:9b334a45a8ff 1 /**
bogdanm 0:9b334a45a8ff 2 ******************************************************************************
bogdanm 0:9b334a45a8ff 3 * @file stm32f1xx_hal_cec.h
bogdanm 0:9b334a45a8ff 4 * @author MCD Application Team
bogdanm 0:9b334a45a8ff 5 * @version V1.0.0
bogdanm 0:9b334a45a8ff 6 * @date 15-December-2014
bogdanm 0:9b334a45a8ff 7 * @brief Header file of CEC HAL module.
bogdanm 0:9b334a45a8ff 8 ******************************************************************************
bogdanm 0:9b334a45a8ff 9 * @attention
bogdanm 0:9b334a45a8ff 10 *
bogdanm 0:9b334a45a8ff 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
bogdanm 0:9b334a45a8ff 12 *
bogdanm 0:9b334a45a8ff 13 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 0:9b334a45a8ff 14 * are permitted provided that the following conditions are met:
bogdanm 0:9b334a45a8ff 15 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 0:9b334a45a8ff 16 * this list of conditions and the following disclaimer.
bogdanm 0:9b334a45a8ff 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 0:9b334a45a8ff 18 * this list of conditions and the following disclaimer in the documentation
bogdanm 0:9b334a45a8ff 19 * and/or other materials provided with the distribution.
bogdanm 0:9b334a45a8ff 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 0:9b334a45a8ff 21 * may be used to endorse or promote products derived from this software
bogdanm 0:9b334a45a8ff 22 * without specific prior written permission.
bogdanm 0:9b334a45a8ff 23 *
bogdanm 0:9b334a45a8ff 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 0:9b334a45a8ff 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 0:9b334a45a8ff 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 0:9b334a45a8ff 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 0:9b334a45a8ff 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 0:9b334a45a8ff 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 0:9b334a45a8ff 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 0:9b334a45a8ff 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 0:9b334a45a8ff 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 0:9b334a45a8ff 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 0:9b334a45a8ff 34 *
bogdanm 0:9b334a45a8ff 35 ******************************************************************************
bogdanm 0:9b334a45a8ff 36 */
bogdanm 0:9b334a45a8ff 37
bogdanm 0:9b334a45a8ff 38 /* Define to prevent recursive inclusion -------------------------------------*/
bogdanm 0:9b334a45a8ff 39 #ifndef __STM32F1xx_HAL_CEC_H
bogdanm 0:9b334a45a8ff 40 #define __STM32F1xx_HAL_CEC_H
bogdanm 0:9b334a45a8ff 41
bogdanm 0:9b334a45a8ff 42 #ifdef __cplusplus
bogdanm 0:9b334a45a8ff 43 extern "C" {
bogdanm 0:9b334a45a8ff 44 #endif
bogdanm 0:9b334a45a8ff 45
bogdanm 0:9b334a45a8ff 46 #if defined(STM32F100xB) || defined(STM32F100xE)
bogdanm 0:9b334a45a8ff 47 /* Includes ------------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 48 #include "stm32f1xx_hal_def.h"
bogdanm 0:9b334a45a8ff 49
bogdanm 0:9b334a45a8ff 50 /** @addtogroup STM32F1xx_HAL_Driver
bogdanm 0:9b334a45a8ff 51 * @{
bogdanm 0:9b334a45a8ff 52 */
bogdanm 0:9b334a45a8ff 53
bogdanm 0:9b334a45a8ff 54 /** @addtogroup CEC
bogdanm 0:9b334a45a8ff 55 * @{
bogdanm 0:9b334a45a8ff 56 */
bogdanm 0:9b334a45a8ff 57
bogdanm 0:9b334a45a8ff 58 /** @addtogroup CEC_Private_Constants
bogdanm 0:9b334a45a8ff 59 * @{
bogdanm 0:9b334a45a8ff 60 */
bogdanm 0:9b334a45a8ff 61 #define IS_CEC_BIT_TIMING_ERROR_MODE(MODE) (((MODE) == CEC_BIT_TIMING_ERROR_MODE_STANDARD) || \
bogdanm 0:9b334a45a8ff 62 ((MODE) == CEC_BIT_TIMING_ERROR_MODE_ERRORFREE))
bogdanm 0:9b334a45a8ff 63 #define IS_CEC_BIT_PERIOD_ERROR_MODE(MODE) (((MODE) == CEC_BIT_PERIOD_ERROR_MODE_STANDARD) || \
bogdanm 0:9b334a45a8ff 64 ((MODE) == CEC_BIT_PERIOD_ERROR_MODE_FLEXIBLE))
bogdanm 0:9b334a45a8ff 65
bogdanm 0:9b334a45a8ff 66 /** @brief Check CEC device Own Address Register (OAR) setting.
bogdanm 0:9b334a45a8ff 67 * @param __ADDRESS__: CEC own address.
bogdanm 0:9b334a45a8ff 68 * @retval Test result (TRUE or FALSE).
bogdanm 0:9b334a45a8ff 69 */
bogdanm 0:9b334a45a8ff 70 #define IS_CEC_OAR_ADDRESS(__ADDRESS__) ((__ADDRESS__) <= 0xF)
bogdanm 0:9b334a45a8ff 71
bogdanm 0:9b334a45a8ff 72 /** @brief Check CEC initiator or destination logical address setting.
bogdanm 0:9b334a45a8ff 73 * Initiator and destination addresses are coded over 4 bits.
bogdanm 0:9b334a45a8ff 74 * @param __ADDRESS__: CEC initiator or logical address.
bogdanm 0:9b334a45a8ff 75 * @retval Test result (TRUE or FALSE).
bogdanm 0:9b334a45a8ff 76 */
bogdanm 0:9b334a45a8ff 77 #define IS_CEC_ADDRESS(__ADDRESS__) ((__ADDRESS__) <= 0xF)
bogdanm 0:9b334a45a8ff 78
bogdanm 0:9b334a45a8ff 79 /** @brief Check CEC message size.
bogdanm 0:9b334a45a8ff 80 * The message size is the payload size: without counting the header,
bogdanm 0:9b334a45a8ff 81 * it varies from 0 byte (ping operation, one header only, no payload) to
bogdanm 0:9b334a45a8ff 82 * 15 bytes (1 opcode and up to 14 operands following the header).
bogdanm 0:9b334a45a8ff 83 * @param __SIZE__: CEC message size.
bogdanm 0:9b334a45a8ff 84 * @retval Test result (TRUE or FALSE).
bogdanm 0:9b334a45a8ff 85 */
bogdanm 0:9b334a45a8ff 86 #define IS_CEC_MSGSIZE(__SIZE__) ((__SIZE__) <= 0xF)
bogdanm 0:9b334a45a8ff 87
bogdanm 0:9b334a45a8ff 88 /**
bogdanm 0:9b334a45a8ff 89 * @}
bogdanm 0:9b334a45a8ff 90 */
bogdanm 0:9b334a45a8ff 91
bogdanm 0:9b334a45a8ff 92 /* Exported types ------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 93 /** @defgroup CEC_Exported_Types CEC Exported Types
bogdanm 0:9b334a45a8ff 94 * @{
bogdanm 0:9b334a45a8ff 95 */
bogdanm 0:9b334a45a8ff 96 /**
bogdanm 0:9b334a45a8ff 97 * @brief CEC Init Structure definition
bogdanm 0:9b334a45a8ff 98 */
bogdanm 0:9b334a45a8ff 99 typedef struct
bogdanm 0:9b334a45a8ff 100 {
bogdanm 0:9b334a45a8ff 101 uint32_t TimingErrorFree; /*!< Configures the CEC Bit Timing Error Mode.
bogdanm 0:9b334a45a8ff 102 This parameter can be a value of @ref CEC_BitTimingErrorMode */
bogdanm 0:9b334a45a8ff 103 uint32_t PeriodErrorFree; /*!< Configures the CEC Bit Period Error Mode.
bogdanm 0:9b334a45a8ff 104 This parameter can be a value of @ref CEC_BitPeriodErrorMode */
bogdanm 0:9b334a45a8ff 105 uint8_t InitiatorAddress; /*!< Initiator address (source logical address, sent in each header)
bogdanm 0:9b334a45a8ff 106 This parameter can be a value <= 0xF */
bogdanm 0:9b334a45a8ff 107 }CEC_InitTypeDef;
bogdanm 0:9b334a45a8ff 108
bogdanm 0:9b334a45a8ff 109 /**
bogdanm 0:9b334a45a8ff 110 * @brief HAL CEC State structures definition
bogdanm 0:9b334a45a8ff 111 */
bogdanm 0:9b334a45a8ff 112 typedef enum
bogdanm 0:9b334a45a8ff 113 {
bogdanm 0:9b334a45a8ff 114 HAL_CEC_STATE_RESET = 0x00, /*!< Peripheral Reset state */
bogdanm 0:9b334a45a8ff 115 HAL_CEC_STATE_READY = 0x01, /*!< Peripheral Initialized and ready for use */
bogdanm 0:9b334a45a8ff 116 HAL_CEC_STATE_BUSY = 0x02, /*!< An internal process is ongoing */
bogdanm 0:9b334a45a8ff 117 HAL_CEC_STATE_BUSY_TX = 0x03, /*!< Data Transmission process is ongoing */
bogdanm 0:9b334a45a8ff 118 HAL_CEC_STATE_BUSY_RX = 0x04, /*!< Data Reception process is ongoing */
bogdanm 0:9b334a45a8ff 119 HAL_CEC_STATE_BUSY_TX_RX = 0x05, /*!< Data Transmission and Reception process is ongoing */
bogdanm 0:9b334a45a8ff 120 HAL_CEC_STATE_TIMEOUT = 0x06, /*!< Timeout state */
bogdanm 0:9b334a45a8ff 121 HAL_CEC_STATE_ERROR = 0x07 /*!< State Error */
bogdanm 0:9b334a45a8ff 122 }HAL_CEC_StateTypeDef;
bogdanm 0:9b334a45a8ff 123
bogdanm 0:9b334a45a8ff 124 /**
bogdanm 0:9b334a45a8ff 125 * @brief HAL Error structures definition
bogdanm 0:9b334a45a8ff 126 */
bogdanm 0:9b334a45a8ff 127 typedef enum
bogdanm 0:9b334a45a8ff 128 {
bogdanm 0:9b334a45a8ff 129 HAL_CEC_ERROR_NONE = (uint32_t) 0x0, /*!< no error */
bogdanm 0:9b334a45a8ff 130 HAL_CEC_ERROR_BTE = CEC_ESR_BTE, /*!< Bit Timing Error */
bogdanm 0:9b334a45a8ff 131 HAL_CEC_ERROR_BPE = CEC_ESR_BPE, /*!< Bit Period Error */
bogdanm 0:9b334a45a8ff 132 HAL_CEC_ERROR_RBTFE = CEC_ESR_RBTFE, /*!< Rx Block Transfer Finished Error */
bogdanm 0:9b334a45a8ff 133 HAL_CEC_ERROR_SBE = CEC_ESR_SBE, /*!< Start Bit Error */
bogdanm 0:9b334a45a8ff 134 HAL_CEC_ERROR_ACKE = CEC_ESR_ACKE, /*!< Block Acknowledge Error */
bogdanm 0:9b334a45a8ff 135 HAL_CEC_ERROR_LINE = CEC_ESR_LINE, /*!< Line Error */
bogdanm 0:9b334a45a8ff 136 HAL_CEC_ERROR_TBTFE = CEC_ESR_TBTFE, /*!< Tx Block Transfer Finished Error */
bogdanm 0:9b334a45a8ff 137 }HAL_CEC_ErrorTypeDef;
bogdanm 0:9b334a45a8ff 138
bogdanm 0:9b334a45a8ff 139 /**
bogdanm 0:9b334a45a8ff 140 * @brief CEC handle Structure definition
bogdanm 0:9b334a45a8ff 141 */
bogdanm 0:9b334a45a8ff 142 typedef struct
bogdanm 0:9b334a45a8ff 143 {
bogdanm 0:9b334a45a8ff 144 CEC_TypeDef *Instance; /*!< CEC registers base address */
bogdanm 0:9b334a45a8ff 145
bogdanm 0:9b334a45a8ff 146 CEC_InitTypeDef Init; /*!< CEC communication parameters */
bogdanm 0:9b334a45a8ff 147
bogdanm 0:9b334a45a8ff 148 uint8_t *pTxBuffPtr; /*!< Pointer to CEC Tx transfer Buffer */
bogdanm 0:9b334a45a8ff 149
bogdanm 0:9b334a45a8ff 150 uint16_t TxXferCount; /*!< CEC Tx Transfer Counter */
bogdanm 0:9b334a45a8ff 151
bogdanm 0:9b334a45a8ff 152 uint8_t *pRxBuffPtr; /*!< Pointer to CEC Rx transfer Buffer */
bogdanm 0:9b334a45a8ff 153
bogdanm 0:9b334a45a8ff 154 uint16_t RxXferSize; /*!< CEC Rx Transfer size, 0: header received only */
bogdanm 0:9b334a45a8ff 155
bogdanm 0:9b334a45a8ff 156 uint32_t ErrorCode; /*!< For errors handling purposes, copy of ESR register in case error is reported */
bogdanm 0:9b334a45a8ff 157
bogdanm 0:9b334a45a8ff 158 HAL_LockTypeDef Lock; /*!< Locking object */
bogdanm 0:9b334a45a8ff 159
bogdanm 0:9b334a45a8ff 160 HAL_CEC_StateTypeDef State; /*!< CEC communication state */
bogdanm 0:9b334a45a8ff 161
bogdanm 0:9b334a45a8ff 162 }CEC_HandleTypeDef;
bogdanm 0:9b334a45a8ff 163
bogdanm 0:9b334a45a8ff 164 /**
bogdanm 0:9b334a45a8ff 165 * @}
bogdanm 0:9b334a45a8ff 166 */
bogdanm 0:9b334a45a8ff 167
bogdanm 0:9b334a45a8ff 168 /* Exported constants --------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 169 /** @defgroup CEC_Exported_Constants CEC Exported Constants
bogdanm 0:9b334a45a8ff 170 * @{
bogdanm 0:9b334a45a8ff 171 */
bogdanm 0:9b334a45a8ff 172
bogdanm 0:9b334a45a8ff 173 /** @defgroup CEC_BitTimingErrorMode Bit Timing Error Mode
bogdanm 0:9b334a45a8ff 174 * @{
bogdanm 0:9b334a45a8ff 175 */
bogdanm 0:9b334a45a8ff 176 #define CEC_BIT_TIMING_ERROR_MODE_STANDARD ((uint32_t)0x00) /*!< Bit timing error Standard Mode */
bogdanm 0:9b334a45a8ff 177 #define CEC_BIT_TIMING_ERROR_MODE_ERRORFREE CEC_CFGR_BTEM /*!< Bit timing error Free Mode */
bogdanm 0:9b334a45a8ff 178 /**
bogdanm 0:9b334a45a8ff 179 * @}
bogdanm 0:9b334a45a8ff 180 */
bogdanm 0:9b334a45a8ff 181
bogdanm 0:9b334a45a8ff 182 /** @defgroup CEC_BitPeriodErrorMode Bit Period Error Mode
bogdanm 0:9b334a45a8ff 183 * @{
bogdanm 0:9b334a45a8ff 184 */
bogdanm 0:9b334a45a8ff 185 #define CEC_BIT_PERIOD_ERROR_MODE_STANDARD ((uint32_t)0x00) /*!< Bit period error Standard Mode */
bogdanm 0:9b334a45a8ff 186 #define CEC_BIT_PERIOD_ERROR_MODE_FLEXIBLE CEC_CFGR_BPEM /*!< Bit period error Flexible Mode */
bogdanm 0:9b334a45a8ff 187 /**
bogdanm 0:9b334a45a8ff 188 * @}
bogdanm 0:9b334a45a8ff 189 */
bogdanm 0:9b334a45a8ff 190
bogdanm 0:9b334a45a8ff 191 /** @defgroup CEC_Initiator_Position Initiator logical address position in message header
bogdanm 0:9b334a45a8ff 192 * @{
bogdanm 0:9b334a45a8ff 193 */
bogdanm 0:9b334a45a8ff 194 #define CEC_INITIATOR_LSB_POS ((uint32_t) 4)
bogdanm 0:9b334a45a8ff 195 /**
bogdanm 0:9b334a45a8ff 196 * @}
bogdanm 0:9b334a45a8ff 197 */
bogdanm 0:9b334a45a8ff 198 /** @defgroup CEC_Interrupts_Definitions Interrupts definition
bogdanm 0:9b334a45a8ff 199 * @{
bogdanm 0:9b334a45a8ff 200 */
bogdanm 0:9b334a45a8ff 201 #define CEC_IT_IE CEC_CFGR_IE
bogdanm 0:9b334a45a8ff 202 /**
bogdanm 0:9b334a45a8ff 203 * @}
bogdanm 0:9b334a45a8ff 204 */
bogdanm 0:9b334a45a8ff 205
bogdanm 0:9b334a45a8ff 206 /** @defgroup CEC_Flags_Definitions Flags definition
bogdanm 0:9b334a45a8ff 207 * @{
bogdanm 0:9b334a45a8ff 208 */
bogdanm 0:9b334a45a8ff 209 #define CEC_FLAG_TSOM CEC_CSR_TSOM
bogdanm 0:9b334a45a8ff 210 #define CEC_FLAG_TEOM CEC_CSR_TEOM
bogdanm 0:9b334a45a8ff 211 #define CEC_FLAG_TERR CEC_CSR_TERR
bogdanm 0:9b334a45a8ff 212 #define CEC_FLAG_TBTRF CEC_CSR_TBTRF
bogdanm 0:9b334a45a8ff 213 #define CEC_FLAG_RSOM CEC_CSR_RSOM
bogdanm 0:9b334a45a8ff 214 #define CEC_FLAG_REOM CEC_CSR_REOM
bogdanm 0:9b334a45a8ff 215 #define CEC_FLAG_RERR CEC_CSR_RERR
bogdanm 0:9b334a45a8ff 216 #define CEC_FLAG_RBTF CEC_CSR_RBTF
bogdanm 0:9b334a45a8ff 217 /**
bogdanm 0:9b334a45a8ff 218 * @}
bogdanm 0:9b334a45a8ff 219 */
bogdanm 0:9b334a45a8ff 220
bogdanm 0:9b334a45a8ff 221 /**
bogdanm 0:9b334a45a8ff 222 * @}
bogdanm 0:9b334a45a8ff 223 */
bogdanm 0:9b334a45a8ff 224
bogdanm 0:9b334a45a8ff 225 /* Exported macros -----------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 226 /** @defgroup CEC_Exported_Macros CEC Exported Macros
bogdanm 0:9b334a45a8ff 227 * @{
bogdanm 0:9b334a45a8ff 228 */
bogdanm 0:9b334a45a8ff 229
bogdanm 0:9b334a45a8ff 230 /** @brief Reset CEC handle state
bogdanm 0:9b334a45a8ff 231 * @param __HANDLE__: CEC handle.
bogdanm 0:9b334a45a8ff 232 * @retval None
bogdanm 0:9b334a45a8ff 233 */
bogdanm 0:9b334a45a8ff 234 #define __HAL_CEC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_CEC_STATE_RESET)
bogdanm 0:9b334a45a8ff 235
bogdanm 0:9b334a45a8ff 236 /** @brief Checks whether or not the specified CEC interrupt flag is set.
bogdanm 0:9b334a45a8ff 237 * @param __HANDLE__: specifies the CEC Handle.
bogdanm 0:9b334a45a8ff 238 * @param __INTERRUPT__: specifies the interrupt to check.
bogdanm 0:9b334a45a8ff 239 * @arg CEC_FLAG_TERR: Tx Error
bogdanm 0:9b334a45a8ff 240 * @arg CEC_FLAG_TBTF: Tx Block Transfer Finished
bogdanm 0:9b334a45a8ff 241 * @arg CEC_FLAG_RERR: Rx Error
bogdanm 0:9b334a45a8ff 242 * @arg CEC_FLAG_RBTF: Rx Block Transfer Finished
bogdanm 0:9b334a45a8ff 243 * @retval ITStatus
bogdanm 0:9b334a45a8ff 244 */
bogdanm 0:9b334a45a8ff 245 #define __HAL_CEC_GET_FLAG(__HANDLE__, __INTERRUPT__) READ_BIT((__HANDLE__)->Instance->CSR,(__INTERRUPT__))
bogdanm 0:9b334a45a8ff 246
bogdanm 0:9b334a45a8ff 247 /** @brief Clears the CEC's pending flags.
bogdanm 0:9b334a45a8ff 248 * @param __HANDLE__: specifies the CEC Handle.
bogdanm 0:9b334a45a8ff 249 * @param __FLAG__: specifies the flag to clear.
bogdanm 0:9b334a45a8ff 250 * This parameter can be any combination of the following values:
bogdanm 0:9b334a45a8ff 251 * @arg CEC_CSR_TERR: Tx Error
bogdanm 0:9b334a45a8ff 252 * @arg CEC_CSR_TBTF: Tx Block Transfer Finished
bogdanm 0:9b334a45a8ff 253 * @arg CEC_CSR_RERR: Rx Error
bogdanm 0:9b334a45a8ff 254 * @arg CEC_CSR_RBTF: Rx Block Transfer Finished
bogdanm 0:9b334a45a8ff 255 * @retval none
bogdanm 0:9b334a45a8ff 256 */
bogdanm 0:9b334a45a8ff 257 #define __HAL_CEC_CLEAR_FLAG(__HANDLE__, __FLAG__) \
bogdanm 0:9b334a45a8ff 258 do { \
bogdanm 0:9b334a45a8ff 259 uint32_t tmp = 0x0; \
bogdanm 0:9b334a45a8ff 260 tmp = (__HANDLE__)->Instance->CSR & 0x2; \
bogdanm 0:9b334a45a8ff 261 (__HANDLE__)->Instance->CSR &= (uint32_t)(((~(uint32_t)(__FLAG__)) & 0xFFFFFFFC) | tmp);\
bogdanm 0:9b334a45a8ff 262 } while(0)
bogdanm 0:9b334a45a8ff 263
bogdanm 0:9b334a45a8ff 264 /** @brief Enables the specified CEC interrupt.
bogdanm 0:9b334a45a8ff 265 * @param __HANDLE__: specifies the CEC Handle.
bogdanm 0:9b334a45a8ff 266 * @param __INTERRUPT__: The CEC interrupt to enable.
bogdanm 0:9b334a45a8ff 267 * This parameter can be:
bogdanm 0:9b334a45a8ff 268 * @arg CEC_IT_IE : Interrupt Enable
bogdanm 0:9b334a45a8ff 269 * @retval none
bogdanm 0:9b334a45a8ff 270 */
bogdanm 0:9b334a45a8ff 271 #define __HAL_CEC_ENABLE_IT(__HANDLE__, __INTERRUPT__) SET_BIT((__HANDLE__)->Instance->CFGR, (__INTERRUPT__))
bogdanm 0:9b334a45a8ff 272
bogdanm 0:9b334a45a8ff 273 /** @brief Disables the specified CEC interrupt.
bogdanm 0:9b334a45a8ff 274 * @param __HANDLE__: specifies the CEC Handle.
bogdanm 0:9b334a45a8ff 275 * @param __INTERRUPT__: The CEC interrupt to enable.
bogdanm 0:9b334a45a8ff 276 * This parameter can be:
bogdanm 0:9b334a45a8ff 277 * @arg CEC_IT_IE : Interrupt Enable
bogdanm 0:9b334a45a8ff 278 * @retval none
bogdanm 0:9b334a45a8ff 279 */
bogdanm 0:9b334a45a8ff 280 #define __HAL_CEC_DISABLE_IT(__HANDLE__, __INTERRUPT__) CLEAR_BIT((__HANDLE__)->Instance->CFGR, (__INTERRUPT__))
bogdanm 0:9b334a45a8ff 281
bogdanm 0:9b334a45a8ff 282 /** @brief Checks whether or not the specified CEC interrupt is enabled.
bogdanm 0:9b334a45a8ff 283 * @param __HANDLE__: specifies the CEC Handle.
bogdanm 0:9b334a45a8ff 284 * @param __INTERRUPT__: The CEC interrupt to enable.
bogdanm 0:9b334a45a8ff 285 * This parameter can be:
bogdanm 0:9b334a45a8ff 286 * @arg CEC_IT_IE : Interrupt Enable
bogdanm 0:9b334a45a8ff 287 * @retval FlagStatus
bogdanm 0:9b334a45a8ff 288 */
bogdanm 0:9b334a45a8ff 289 #define __HAL_CEC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) READ_BIT((__HANDLE__)->Instance->CFGR, (__INTERRUPT__))
bogdanm 0:9b334a45a8ff 290
bogdanm 0:9b334a45a8ff 291 /** @brief Enables the CEC device
bogdanm 0:9b334a45a8ff 292 * @param __HANDLE__: specifies the CEC Handle.
bogdanm 0:9b334a45a8ff 293 * @retval none
bogdanm 0:9b334a45a8ff 294 */
bogdanm 0:9b334a45a8ff 295 #define __HAL_CEC_ENABLE(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CFGR, CEC_CFGR_PE)
bogdanm 0:9b334a45a8ff 296
bogdanm 0:9b334a45a8ff 297 /** @brief Disables the CEC device
bogdanm 0:9b334a45a8ff 298 * @param __HANDLE__: specifies the CEC Handle.
bogdanm 0:9b334a45a8ff 299 * @retval none
bogdanm 0:9b334a45a8ff 300 */
bogdanm 0:9b334a45a8ff 301 #define __HAL_CEC_DISABLE(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CFGR, CEC_CFGR_PE)
bogdanm 0:9b334a45a8ff 302
bogdanm 0:9b334a45a8ff 303 /** @brief Set Transmission Start flag
bogdanm 0:9b334a45a8ff 304 * @param __HANDLE__: specifies the CEC Handle.
bogdanm 0:9b334a45a8ff 305 * @retval none
bogdanm 0:9b334a45a8ff 306 */
bogdanm 0:9b334a45a8ff 307 #define __HAL_CEC_FIRST_BYTE_TX_SET(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CSR, CEC_CSR_TSOM)
bogdanm 0:9b334a45a8ff 308
bogdanm 0:9b334a45a8ff 309 /** @brief Set Transmission End flag
bogdanm 0:9b334a45a8ff 310 * @param __HANDLE__: specifies the CEC Handle.
bogdanm 0:9b334a45a8ff 311 * @retval none
bogdanm 0:9b334a45a8ff 312 */
bogdanm 0:9b334a45a8ff 313 #define __HAL_CEC_LAST_BYTE_TX_SET(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CSR, CEC_CSR_TEOM)
bogdanm 0:9b334a45a8ff 314
bogdanm 0:9b334a45a8ff 315 /** @brief Get Transmission Start flag
bogdanm 0:9b334a45a8ff 316 * @param __HANDLE__: specifies the CEC Handle.
bogdanm 0:9b334a45a8ff 317 * @retval FlagStatus
bogdanm 0:9b334a45a8ff 318 */
bogdanm 0:9b334a45a8ff 319 #define __HAL_CEC_GET_TRANSMISSION_START_FLAG(__HANDLE__) READ_BIT((__HANDLE__)->Instance->CSR, CEC_CSR_TSOM)
bogdanm 0:9b334a45a8ff 320
bogdanm 0:9b334a45a8ff 321 /** @brief Get Transmission End flag
bogdanm 0:9b334a45a8ff 322 * @param __HANDLE__: specifies the CEC Handle.
bogdanm 0:9b334a45a8ff 323 * @retval FlagStatus
bogdanm 0:9b334a45a8ff 324 */
bogdanm 0:9b334a45a8ff 325 #define __HAL_CEC_GET_TRANSMISSION_END_FLAG(__HANDLE__) READ_BIT((__HANDLE__)->Instance->CSR, CEC_CSR_TEOM)
bogdanm 0:9b334a45a8ff 326
bogdanm 0:9b334a45a8ff 327 /** @brief Clear OAR register
bogdanm 0:9b334a45a8ff 328 * @param __HANDLE__: specifies the CEC Handle.
bogdanm 0:9b334a45a8ff 329 * @retval none
bogdanm 0:9b334a45a8ff 330 */
bogdanm 0:9b334a45a8ff 331 #define __HAL_CEC_CLEAR_OAR(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->OAR, CEC_OAR_OA)
bogdanm 0:9b334a45a8ff 332
bogdanm 0:9b334a45a8ff 333 /** @brief Set OAR register
bogdanm 0:9b334a45a8ff 334 * @param __HANDLE__: specifies the CEC Handle.
bogdanm 0:9b334a45a8ff 335 * @param __ADDRESS__: Own Address value.
bogdanm 0:9b334a45a8ff 336 * @retval none
bogdanm 0:9b334a45a8ff 337 */
bogdanm 0:9b334a45a8ff 338 #define __HAL_CEC_SET_OAR(__HANDLE__,__ADDRESS__) MODIFY_REG((__HANDLE__)->Instance->OAR, CEC_OAR_OA, (__ADDRESS__));
bogdanm 0:9b334a45a8ff 339
bogdanm 0:9b334a45a8ff 340 /**
bogdanm 0:9b334a45a8ff 341 * @}
bogdanm 0:9b334a45a8ff 342 */
bogdanm 0:9b334a45a8ff 343
bogdanm 0:9b334a45a8ff 344 /* Exported functions --------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 345 /** @addtogroup CEC_Exported_Functions CEC Exported Functions
bogdanm 0:9b334a45a8ff 346 * @{
bogdanm 0:9b334a45a8ff 347 */
bogdanm 0:9b334a45a8ff 348
bogdanm 0:9b334a45a8ff 349 /** @addtogroup CEC_Exported_Functions_Group1 Initialization and de-initialization functions
bogdanm 0:9b334a45a8ff 350 * @brief Initialization and Configuration functions
bogdanm 0:9b334a45a8ff 351 * @{
bogdanm 0:9b334a45a8ff 352 */
bogdanm 0:9b334a45a8ff 353 /* Initialization and de-initialization functions ****************************/
bogdanm 0:9b334a45a8ff 354 HAL_StatusTypeDef HAL_CEC_Init(CEC_HandleTypeDef *hcec);
bogdanm 0:9b334a45a8ff 355 HAL_StatusTypeDef HAL_CEC_DeInit(CEC_HandleTypeDef *hcec);
bogdanm 0:9b334a45a8ff 356 void HAL_CEC_MspInit(CEC_HandleTypeDef *hcec);
bogdanm 0:9b334a45a8ff 357 void HAL_CEC_MspDeInit(CEC_HandleTypeDef *hcec);
bogdanm 0:9b334a45a8ff 358 /**
bogdanm 0:9b334a45a8ff 359 * @}
bogdanm 0:9b334a45a8ff 360 */
bogdanm 0:9b334a45a8ff 361
bogdanm 0:9b334a45a8ff 362 /** @addtogroup CEC_Exported_Functions_Group2 Input and Output operation functions
bogdanm 0:9b334a45a8ff 363 * @brief CEC Transmit/Receive functions
bogdanm 0:9b334a45a8ff 364 * @{
bogdanm 0:9b334a45a8ff 365 */
bogdanm 0:9b334a45a8ff 366 /* IO operation functions *****************************************************/
bogdanm 0:9b334a45a8ff 367 HAL_StatusTypeDef HAL_CEC_Transmit(CEC_HandleTypeDef *hcec, uint8_t DestinationAddress, uint8_t *pData, uint32_t Size, uint32_t Timeout);
bogdanm 0:9b334a45a8ff 368 HAL_StatusTypeDef HAL_CEC_Receive(CEC_HandleTypeDef *hcec, uint8_t *pData, uint32_t Timeout);
bogdanm 0:9b334a45a8ff 369 HAL_StatusTypeDef HAL_CEC_Transmit_IT(CEC_HandleTypeDef *hcec, uint8_t DestinationAddress, uint8_t *pData, uint32_t Size);
bogdanm 0:9b334a45a8ff 370 HAL_StatusTypeDef HAL_CEC_Receive_IT(CEC_HandleTypeDef *hcec, uint8_t *pData);
bogdanm 0:9b334a45a8ff 371 uint32_t HAL_CEC_GetReceivedFrameSize(CEC_HandleTypeDef *hcec);
bogdanm 0:9b334a45a8ff 372 void HAL_CEC_IRQHandler(CEC_HandleTypeDef *hcec);
bogdanm 0:9b334a45a8ff 373 void HAL_CEC_TxCpltCallback(CEC_HandleTypeDef *hcec);
bogdanm 0:9b334a45a8ff 374 void HAL_CEC_RxCpltCallback(CEC_HandleTypeDef *hcec);
bogdanm 0:9b334a45a8ff 375 void HAL_CEC_ErrorCallback(CEC_HandleTypeDef *hcec);
bogdanm 0:9b334a45a8ff 376 /**
bogdanm 0:9b334a45a8ff 377 * @}
bogdanm 0:9b334a45a8ff 378 */
bogdanm 0:9b334a45a8ff 379
bogdanm 0:9b334a45a8ff 380 /** @defgroup CEC_Exported_Functions_Group3 Peripheral Control functions
bogdanm 0:9b334a45a8ff 381 * @brief CEC control functions
bogdanm 0:9b334a45a8ff 382 * @{
bogdanm 0:9b334a45a8ff 383 */
bogdanm 0:9b334a45a8ff 384 /* Peripheral State and Error functions ***************************************/
bogdanm 0:9b334a45a8ff 385 HAL_CEC_StateTypeDef HAL_CEC_GetState(CEC_HandleTypeDef *hcec);
bogdanm 0:9b334a45a8ff 386 uint32_t HAL_CEC_GetError(CEC_HandleTypeDef *hcec);
bogdanm 0:9b334a45a8ff 387 /**
bogdanm 0:9b334a45a8ff 388 * @}
bogdanm 0:9b334a45a8ff 389 */
bogdanm 0:9b334a45a8ff 390
bogdanm 0:9b334a45a8ff 391 /**
bogdanm 0:9b334a45a8ff 392 * @}
bogdanm 0:9b334a45a8ff 393 */
bogdanm 0:9b334a45a8ff 394
bogdanm 0:9b334a45a8ff 395 /**
bogdanm 0:9b334a45a8ff 396 * @}
bogdanm 0:9b334a45a8ff 397 */
bogdanm 0:9b334a45a8ff 398
bogdanm 0:9b334a45a8ff 399 /**
bogdanm 0:9b334a45a8ff 400 * @}
bogdanm 0:9b334a45a8ff 401 */
bogdanm 0:9b334a45a8ff 402
bogdanm 0:9b334a45a8ff 403 #endif /* defined(STM32F100xB) || defined(STM32F100xE) */
bogdanm 0:9b334a45a8ff 404
bogdanm 0:9b334a45a8ff 405 #ifdef __cplusplus
bogdanm 0:9b334a45a8ff 406 }
bogdanm 0:9b334a45a8ff 407 #endif
bogdanm 0:9b334a45a8ff 408
bogdanm 0:9b334a45a8ff 409 #endif /* __STM32F1xx_HAL_CEC_H */
bogdanm 0:9b334a45a8ff 410
bogdanm 0:9b334a45a8ff 411 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/