fix LPC812 PWM

Dependents:   IR_LED_Send

Fork of mbed-dev by mbed official

Committer:
bogdanm
Date:
Thu Oct 01 15:25:22 2015 +0300
Revision:
0:9b334a45a8ff
Initial commit on mbed-dev

Replaces mbed-src (now inactive)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /**
bogdanm 0:9b334a45a8ff 2 ******************************************************************************
bogdanm 0:9b334a45a8ff 3 * @file stm32f0xx_hal_usart_ex.h
bogdanm 0:9b334a45a8ff 4 * @author MCD Application Team
bogdanm 0:9b334a45a8ff 5 * @version V1.3.0
bogdanm 0:9b334a45a8ff 6 * @date 26-June-2015
bogdanm 0:9b334a45a8ff 7 * @brief Header file of USART HAL Extension module.
bogdanm 0:9b334a45a8ff 8 ******************************************************************************
bogdanm 0:9b334a45a8ff 9 * @attention
bogdanm 0:9b334a45a8ff 10 *
bogdanm 0:9b334a45a8ff 11 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
bogdanm 0:9b334a45a8ff 12 *
bogdanm 0:9b334a45a8ff 13 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 0:9b334a45a8ff 14 * are permitted provided that the following conditions are met:
bogdanm 0:9b334a45a8ff 15 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 0:9b334a45a8ff 16 * this list of conditions and the following disclaimer.
bogdanm 0:9b334a45a8ff 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 0:9b334a45a8ff 18 * this list of conditions and the following disclaimer in the documentation
bogdanm 0:9b334a45a8ff 19 * and/or other materials provided with the distribution.
bogdanm 0:9b334a45a8ff 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 0:9b334a45a8ff 21 * may be used to endorse or promote products derived from this software
bogdanm 0:9b334a45a8ff 22 * without specific prior written permission.
bogdanm 0:9b334a45a8ff 23 *
bogdanm 0:9b334a45a8ff 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 0:9b334a45a8ff 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 0:9b334a45a8ff 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 0:9b334a45a8ff 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 0:9b334a45a8ff 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 0:9b334a45a8ff 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 0:9b334a45a8ff 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 0:9b334a45a8ff 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 0:9b334a45a8ff 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 0:9b334a45a8ff 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 0:9b334a45a8ff 34 *
bogdanm 0:9b334a45a8ff 35 ******************************************************************************
bogdanm 0:9b334a45a8ff 36 */
bogdanm 0:9b334a45a8ff 37
bogdanm 0:9b334a45a8ff 38 /* Define to prevent recursive inclusion -------------------------------------*/
bogdanm 0:9b334a45a8ff 39 #ifndef __STM32F0xx_HAL_USART_EX_H
bogdanm 0:9b334a45a8ff 40 #define __STM32F0xx_HAL_USART_EX_H
bogdanm 0:9b334a45a8ff 41
bogdanm 0:9b334a45a8ff 42 #ifdef __cplusplus
bogdanm 0:9b334a45a8ff 43 extern "C" {
bogdanm 0:9b334a45a8ff 44 #endif
bogdanm 0:9b334a45a8ff 45
bogdanm 0:9b334a45a8ff 46 /* Includes ------------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 47 #include "stm32f0xx_hal_def.h"
bogdanm 0:9b334a45a8ff 48
bogdanm 0:9b334a45a8ff 49 /** @addtogroup STM32F0xx_HAL_Driver
bogdanm 0:9b334a45a8ff 50 * @{
bogdanm 0:9b334a45a8ff 51 */
bogdanm 0:9b334a45a8ff 52
bogdanm 0:9b334a45a8ff 53 /** @defgroup USARTEx USARTEx
bogdanm 0:9b334a45a8ff 54 * @{
bogdanm 0:9b334a45a8ff 55 */
bogdanm 0:9b334a45a8ff 56
bogdanm 0:9b334a45a8ff 57 /* Exported types ------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 58 /* Exported constants --------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 59 /** @defgroup USARTEx_Exported_Constants USARTEx Exported Constants
bogdanm 0:9b334a45a8ff 60 * @{
bogdanm 0:9b334a45a8ff 61 */
bogdanm 0:9b334a45a8ff 62
bogdanm 0:9b334a45a8ff 63 /** @defgroup USARTEx_Word_Length USARTEx Word Length
bogdanm 0:9b334a45a8ff 64 * @{
bogdanm 0:9b334a45a8ff 65 */
bogdanm 0:9b334a45a8ff 66 #if defined (STM32F042x6) || defined (STM32F048xx) || defined (STM32F070x6) || \
bogdanm 0:9b334a45a8ff 67 defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || defined (STM32F070xB) || \
bogdanm 0:9b334a45a8ff 68 defined (STM32F091xC) || defined (STM32F098xx) || defined (STM32F030xC)
bogdanm 0:9b334a45a8ff 69 #define USART_WORDLENGTH_7B ((uint32_t)USART_CR1_M1) /*!< 7-bit long USART frame */
bogdanm 0:9b334a45a8ff 70 #define USART_WORDLENGTH_8B ((uint32_t)0x00000000) /*!< 8-bit long USART frame */
bogdanm 0:9b334a45a8ff 71 #define USART_WORDLENGTH_9B ((uint32_t)USART_CR1_M0) /*!< 9-bit long USART frame */
bogdanm 0:9b334a45a8ff 72 #else
bogdanm 0:9b334a45a8ff 73 #define USART_WORDLENGTH_8B ((uint32_t)0x00000000) /*!< 8-bit long USART frame */
bogdanm 0:9b334a45a8ff 74 #define USART_WORDLENGTH_9B ((uint32_t)USART_CR1_M) /*!< 9-bit long USART frame */
bogdanm 0:9b334a45a8ff 75 #endif /* defined (STM32F042x6) || defined (STM32F048xx) || defined (STM32F070x6) || defined (STM32F070xB) || \
bogdanm 0:9b334a45a8ff 76 defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \
bogdanm 0:9b334a45a8ff 77 defined (STM32F091xC) || defined (STM32F098xx) || defined (STM32F030xC) */
bogdanm 0:9b334a45a8ff 78 /**
bogdanm 0:9b334a45a8ff 79 * @}
bogdanm 0:9b334a45a8ff 80 */
bogdanm 0:9b334a45a8ff 81
bogdanm 0:9b334a45a8ff 82 /** @defgroup USART_Request_Parameters USARTEx Request Parameters
bogdanm 0:9b334a45a8ff 83 * @{
bogdanm 0:9b334a45a8ff 84 */
bogdanm 0:9b334a45a8ff 85 #define USART_RXDATA_FLUSH_REQUEST ((uint32_t)USART_RQR_RXFRQ) /*!< Receive Data flush Request */
bogdanm 0:9b334a45a8ff 86 #if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
bogdanm 0:9b334a45a8ff 87 #define USART_TXDATA_FLUSH_REQUEST ((uint32_t)USART_RQR_TXFRQ) /*!< Transmit data flush Request */
bogdanm 0:9b334a45a8ff 88 #else
bogdanm 0:9b334a45a8ff 89 #endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */
bogdanm 0:9b334a45a8ff 90 /**
bogdanm 0:9b334a45a8ff 91 * @}
bogdanm 0:9b334a45a8ff 92 */
bogdanm 0:9b334a45a8ff 93
bogdanm 0:9b334a45a8ff 94 /** @defgroup USART_Flags USART Flags
bogdanm 0:9b334a45a8ff 95 * Elements values convention: 0xXXXX
bogdanm 0:9b334a45a8ff 96 * - 0xXXXX : Flag mask in the ISR register
bogdanm 0:9b334a45a8ff 97 * @{
bogdanm 0:9b334a45a8ff 98 */
bogdanm 0:9b334a45a8ff 99 #if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
bogdanm 0:9b334a45a8ff 100 #define USART_FLAG_REACK ((uint32_t)0x00400000) /*!< USART receive enable acknowledge flag */
bogdanm 0:9b334a45a8ff 101 #endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */
bogdanm 0:9b334a45a8ff 102 #define USART_FLAG_TEACK ((uint32_t)0x00200000) /*!< USART transmit enable acknowledge flag */
bogdanm 0:9b334a45a8ff 103 #define USART_FLAG_BUSY ((uint32_t)0x00010000) /*!< USART busy flag */
bogdanm 0:9b334a45a8ff 104 #define USART_FLAG_CTS ((uint32_t)0x00000400) /*!< USART clear to send flag */
bogdanm 0:9b334a45a8ff 105 #define USART_FLAG_CTSIF ((uint32_t)0x00000200) /*!< USART clear to send interrupt flag */
bogdanm 0:9b334a45a8ff 106 #define USART_FLAG_TXE ((uint32_t)0x00000080) /*!< USART transmit data register empty */
bogdanm 0:9b334a45a8ff 107 #define USART_FLAG_TC ((uint32_t)0x00000040) /*!< USART transmission complete */
bogdanm 0:9b334a45a8ff 108 #define USART_FLAG_RXNE ((uint32_t)0x00000020) /*!< USART read data register not empty */
bogdanm 0:9b334a45a8ff 109 #define USART_FLAG_IDLE ((uint32_t)0x00000010) /*!< USART idle flag */
bogdanm 0:9b334a45a8ff 110 #define USART_FLAG_ORE ((uint32_t)0x00000008) /*!< USART overrun error */
bogdanm 0:9b334a45a8ff 111 #define USART_FLAG_NE ((uint32_t)0x00000004) /*!< USART noise error */
bogdanm 0:9b334a45a8ff 112 #define USART_FLAG_FE ((uint32_t)0x00000002) /*!< USART frame error */
bogdanm 0:9b334a45a8ff 113 #define USART_FLAG_PE ((uint32_t)0x00000001) /*!< USART parity error */
bogdanm 0:9b334a45a8ff 114 /**
bogdanm 0:9b334a45a8ff 115 * @}
bogdanm 0:9b334a45a8ff 116 */
bogdanm 0:9b334a45a8ff 117
bogdanm 0:9b334a45a8ff 118 /**
bogdanm 0:9b334a45a8ff 119 * @}
bogdanm 0:9b334a45a8ff 120 */
bogdanm 0:9b334a45a8ff 121
bogdanm 0:9b334a45a8ff 122 /* Exported macros ------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 123 /** @defgroup USARTEx_Exported_Macros USARTEx Exported Macros
bogdanm 0:9b334a45a8ff 124 * @{
bogdanm 0:9b334a45a8ff 125 */
bogdanm 0:9b334a45a8ff 126
bogdanm 0:9b334a45a8ff 127 /** @brief Flush the USART Data registers.
bogdanm 0:9b334a45a8ff 128 * @param __HANDLE__: specifies the USART Handle.
bogdanm 0:9b334a45a8ff 129 * @retval None
bogdanm 0:9b334a45a8ff 130 */
bogdanm 0:9b334a45a8ff 131 #if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
bogdanm 0:9b334a45a8ff 132 #define __HAL_USART_FLUSH_DRREGISTER(__HANDLE__) \
bogdanm 0:9b334a45a8ff 133 do{ \
bogdanm 0:9b334a45a8ff 134 SET_BIT((__HANDLE__)->Instance->RQR, USART_RXDATA_FLUSH_REQUEST); \
bogdanm 0:9b334a45a8ff 135 SET_BIT((__HANDLE__)->Instance->RQR, USART_TXDATA_FLUSH_REQUEST); \
bogdanm 0:9b334a45a8ff 136 } while(0)
bogdanm 0:9b334a45a8ff 137 #else
bogdanm 0:9b334a45a8ff 138 #define __HAL_USART_FLUSH_DRREGISTER(__HANDLE__) \
bogdanm 0:9b334a45a8ff 139 do{ \
bogdanm 0:9b334a45a8ff 140 SET_BIT((__HANDLE__)->Instance->RQR, USART_RXDATA_FLUSH_REQUEST); \
bogdanm 0:9b334a45a8ff 141 } while(0)
bogdanm 0:9b334a45a8ff 142 #endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */
bogdanm 0:9b334a45a8ff 143
bogdanm 0:9b334a45a8ff 144 /**
bogdanm 0:9b334a45a8ff 145 * @}
bogdanm 0:9b334a45a8ff 146 */
bogdanm 0:9b334a45a8ff 147
bogdanm 0:9b334a45a8ff 148 /* Private macros ------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 149 /** @defgroup USARTEx_Private_Macros USARTEx Private Macros
bogdanm 0:9b334a45a8ff 150 * @{
bogdanm 0:9b334a45a8ff 151 */
bogdanm 0:9b334a45a8ff 152
bogdanm 0:9b334a45a8ff 153 /** @brief Reports the USART clock source.
bogdanm 0:9b334a45a8ff 154 * @param __HANDLE__: specifies the USART Handle
bogdanm 0:9b334a45a8ff 155 * @param __CLOCKSOURCE__ : output variable
bogdanm 0:9b334a45a8ff 156 * @retval the USART clocking source, written in __CLOCKSOURCE__.
bogdanm 0:9b334a45a8ff 157 */
bogdanm 0:9b334a45a8ff 158 #if defined(STM32F030x6) || defined(STM32F031x6) || defined(STM32F038xx)
bogdanm 0:9b334a45a8ff 159 #define USART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
bogdanm 0:9b334a45a8ff 160 do { \
bogdanm 0:9b334a45a8ff 161 switch(__HAL_RCC_GET_USART1_SOURCE()) \
bogdanm 0:9b334a45a8ff 162 { \
bogdanm 0:9b334a45a8ff 163 case RCC_USART1CLKSOURCE_PCLK1: \
bogdanm 0:9b334a45a8ff 164 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \
bogdanm 0:9b334a45a8ff 165 break; \
bogdanm 0:9b334a45a8ff 166 case RCC_USART1CLKSOURCE_HSI: \
bogdanm 0:9b334a45a8ff 167 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \
bogdanm 0:9b334a45a8ff 168 break; \
bogdanm 0:9b334a45a8ff 169 case RCC_USART1CLKSOURCE_SYSCLK: \
bogdanm 0:9b334a45a8ff 170 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_SYSCLK; \
bogdanm 0:9b334a45a8ff 171 break; \
bogdanm 0:9b334a45a8ff 172 case RCC_USART1CLKSOURCE_LSE: \
bogdanm 0:9b334a45a8ff 173 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \
bogdanm 0:9b334a45a8ff 174 break; \
bogdanm 0:9b334a45a8ff 175 default: \
bogdanm 0:9b334a45a8ff 176 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \
bogdanm 0:9b334a45a8ff 177 break; \
bogdanm 0:9b334a45a8ff 178 } \
bogdanm 0:9b334a45a8ff 179 } while(0)
bogdanm 0:9b334a45a8ff 180 #elif defined (STM32F030x8) || defined (STM32F070x6) || \
bogdanm 0:9b334a45a8ff 181 defined (STM32F042x6) || defined (STM32F048xx) || \
bogdanm 0:9b334a45a8ff 182 defined (STM32F051x8) || defined (STM32F058xx)
bogdanm 0:9b334a45a8ff 183 #define USART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
bogdanm 0:9b334a45a8ff 184 do { \
bogdanm 0:9b334a45a8ff 185 if((__HANDLE__)->Instance == USART1) \
bogdanm 0:9b334a45a8ff 186 { \
bogdanm 0:9b334a45a8ff 187 switch(__HAL_RCC_GET_USART1_SOURCE()) \
bogdanm 0:9b334a45a8ff 188 { \
bogdanm 0:9b334a45a8ff 189 case RCC_USART1CLKSOURCE_PCLK1: \
bogdanm 0:9b334a45a8ff 190 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \
bogdanm 0:9b334a45a8ff 191 break; \
bogdanm 0:9b334a45a8ff 192 case RCC_USART1CLKSOURCE_HSI: \
bogdanm 0:9b334a45a8ff 193 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \
bogdanm 0:9b334a45a8ff 194 break; \
bogdanm 0:9b334a45a8ff 195 case RCC_USART1CLKSOURCE_SYSCLK: \
bogdanm 0:9b334a45a8ff 196 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_SYSCLK; \
bogdanm 0:9b334a45a8ff 197 break; \
bogdanm 0:9b334a45a8ff 198 case RCC_USART1CLKSOURCE_LSE: \
bogdanm 0:9b334a45a8ff 199 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \
bogdanm 0:9b334a45a8ff 200 break; \
bogdanm 0:9b334a45a8ff 201 default: \
bogdanm 0:9b334a45a8ff 202 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \
bogdanm 0:9b334a45a8ff 203 break; \
bogdanm 0:9b334a45a8ff 204 } \
bogdanm 0:9b334a45a8ff 205 } \
bogdanm 0:9b334a45a8ff 206 else if((__HANDLE__)->Instance == USART2) \
bogdanm 0:9b334a45a8ff 207 { \
bogdanm 0:9b334a45a8ff 208 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \
bogdanm 0:9b334a45a8ff 209 } \
bogdanm 0:9b334a45a8ff 210 else \
bogdanm 0:9b334a45a8ff 211 { \
bogdanm 0:9b334a45a8ff 212 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \
bogdanm 0:9b334a45a8ff 213 } \
bogdanm 0:9b334a45a8ff 214 } while(0)
bogdanm 0:9b334a45a8ff 215 #elif defined (STM32F070xB)
bogdanm 0:9b334a45a8ff 216 #define USART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
bogdanm 0:9b334a45a8ff 217 do { \
bogdanm 0:9b334a45a8ff 218 if((__HANDLE__)->Instance == USART1) \
bogdanm 0:9b334a45a8ff 219 { \
bogdanm 0:9b334a45a8ff 220 switch(__HAL_RCC_GET_USART1_SOURCE()) \
bogdanm 0:9b334a45a8ff 221 { \
bogdanm 0:9b334a45a8ff 222 case RCC_USART1CLKSOURCE_PCLK1: \
bogdanm 0:9b334a45a8ff 223 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \
bogdanm 0:9b334a45a8ff 224 break; \
bogdanm 0:9b334a45a8ff 225 case RCC_USART1CLKSOURCE_HSI: \
bogdanm 0:9b334a45a8ff 226 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \
bogdanm 0:9b334a45a8ff 227 break; \
bogdanm 0:9b334a45a8ff 228 case RCC_USART1CLKSOURCE_SYSCLK: \
bogdanm 0:9b334a45a8ff 229 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_SYSCLK; \
bogdanm 0:9b334a45a8ff 230 break; \
bogdanm 0:9b334a45a8ff 231 case RCC_USART1CLKSOURCE_LSE: \
bogdanm 0:9b334a45a8ff 232 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \
bogdanm 0:9b334a45a8ff 233 break; \
bogdanm 0:9b334a45a8ff 234 default: \
bogdanm 0:9b334a45a8ff 235 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \
bogdanm 0:9b334a45a8ff 236 break; \
bogdanm 0:9b334a45a8ff 237 } \
bogdanm 0:9b334a45a8ff 238 } \
bogdanm 0:9b334a45a8ff 239 else if((__HANDLE__)->Instance == USART2) \
bogdanm 0:9b334a45a8ff 240 { \
bogdanm 0:9b334a45a8ff 241 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \
bogdanm 0:9b334a45a8ff 242 } \
bogdanm 0:9b334a45a8ff 243 else if((__HANDLE__)->Instance == USART3) \
bogdanm 0:9b334a45a8ff 244 { \
bogdanm 0:9b334a45a8ff 245 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \
bogdanm 0:9b334a45a8ff 246 } \
bogdanm 0:9b334a45a8ff 247 else if((__HANDLE__)->Instance == USART4) \
bogdanm 0:9b334a45a8ff 248 { \
bogdanm 0:9b334a45a8ff 249 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \
bogdanm 0:9b334a45a8ff 250 } \
bogdanm 0:9b334a45a8ff 251 else \
bogdanm 0:9b334a45a8ff 252 { \
bogdanm 0:9b334a45a8ff 253 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \
bogdanm 0:9b334a45a8ff 254 } \
bogdanm 0:9b334a45a8ff 255 } while(0)
bogdanm 0:9b334a45a8ff 256 #elif defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx)
bogdanm 0:9b334a45a8ff 257 #define USART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
bogdanm 0:9b334a45a8ff 258 do { \
bogdanm 0:9b334a45a8ff 259 if((__HANDLE__)->Instance == USART1) \
bogdanm 0:9b334a45a8ff 260 { \
bogdanm 0:9b334a45a8ff 261 switch(__HAL_RCC_GET_USART1_SOURCE()) \
bogdanm 0:9b334a45a8ff 262 { \
bogdanm 0:9b334a45a8ff 263 case RCC_USART1CLKSOURCE_PCLK1: \
bogdanm 0:9b334a45a8ff 264 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \
bogdanm 0:9b334a45a8ff 265 break; \
bogdanm 0:9b334a45a8ff 266 case RCC_USART1CLKSOURCE_HSI: \
bogdanm 0:9b334a45a8ff 267 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \
bogdanm 0:9b334a45a8ff 268 break; \
bogdanm 0:9b334a45a8ff 269 case RCC_USART1CLKSOURCE_SYSCLK: \
bogdanm 0:9b334a45a8ff 270 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_SYSCLK; \
bogdanm 0:9b334a45a8ff 271 break; \
bogdanm 0:9b334a45a8ff 272 case RCC_USART1CLKSOURCE_LSE: \
bogdanm 0:9b334a45a8ff 273 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \
bogdanm 0:9b334a45a8ff 274 break; \
bogdanm 0:9b334a45a8ff 275 default: \
bogdanm 0:9b334a45a8ff 276 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \
bogdanm 0:9b334a45a8ff 277 break; \
bogdanm 0:9b334a45a8ff 278 } \
bogdanm 0:9b334a45a8ff 279 } \
bogdanm 0:9b334a45a8ff 280 else if((__HANDLE__)->Instance == USART2) \
bogdanm 0:9b334a45a8ff 281 { \
bogdanm 0:9b334a45a8ff 282 switch(__HAL_RCC_GET_USART2_SOURCE()) \
bogdanm 0:9b334a45a8ff 283 { \
bogdanm 0:9b334a45a8ff 284 case RCC_USART2CLKSOURCE_PCLK1: \
bogdanm 0:9b334a45a8ff 285 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \
bogdanm 0:9b334a45a8ff 286 break; \
bogdanm 0:9b334a45a8ff 287 case RCC_USART2CLKSOURCE_HSI: \
bogdanm 0:9b334a45a8ff 288 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \
bogdanm 0:9b334a45a8ff 289 break; \
bogdanm 0:9b334a45a8ff 290 case RCC_USART2CLKSOURCE_SYSCLK: \
bogdanm 0:9b334a45a8ff 291 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_SYSCLK; \
bogdanm 0:9b334a45a8ff 292 break; \
bogdanm 0:9b334a45a8ff 293 case RCC_USART2CLKSOURCE_LSE: \
bogdanm 0:9b334a45a8ff 294 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \
bogdanm 0:9b334a45a8ff 295 break; \
bogdanm 0:9b334a45a8ff 296 default: \
bogdanm 0:9b334a45a8ff 297 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \
bogdanm 0:9b334a45a8ff 298 break; \
bogdanm 0:9b334a45a8ff 299 } \
bogdanm 0:9b334a45a8ff 300 } \
bogdanm 0:9b334a45a8ff 301 else if((__HANDLE__)->Instance == USART3) \
bogdanm 0:9b334a45a8ff 302 { \
bogdanm 0:9b334a45a8ff 303 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \
bogdanm 0:9b334a45a8ff 304 } \
bogdanm 0:9b334a45a8ff 305 else if((__HANDLE__)->Instance == USART4) \
bogdanm 0:9b334a45a8ff 306 { \
bogdanm 0:9b334a45a8ff 307 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \
bogdanm 0:9b334a45a8ff 308 } \
bogdanm 0:9b334a45a8ff 309 else \
bogdanm 0:9b334a45a8ff 310 { \
bogdanm 0:9b334a45a8ff 311 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \
bogdanm 0:9b334a45a8ff 312 } \
bogdanm 0:9b334a45a8ff 313 } while(0)
bogdanm 0:9b334a45a8ff 314 #elif defined(STM32F091xC) || defined (STM32F098xx)
bogdanm 0:9b334a45a8ff 315 #define USART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
bogdanm 0:9b334a45a8ff 316 do { \
bogdanm 0:9b334a45a8ff 317 if((__HANDLE__)->Instance == USART1) \
bogdanm 0:9b334a45a8ff 318 { \
bogdanm 0:9b334a45a8ff 319 switch(__HAL_RCC_GET_USART1_SOURCE()) \
bogdanm 0:9b334a45a8ff 320 { \
bogdanm 0:9b334a45a8ff 321 case RCC_USART1CLKSOURCE_PCLK1: \
bogdanm 0:9b334a45a8ff 322 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \
bogdanm 0:9b334a45a8ff 323 break; \
bogdanm 0:9b334a45a8ff 324 case RCC_USART1CLKSOURCE_HSI: \
bogdanm 0:9b334a45a8ff 325 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \
bogdanm 0:9b334a45a8ff 326 break; \
bogdanm 0:9b334a45a8ff 327 case RCC_USART1CLKSOURCE_SYSCLK: \
bogdanm 0:9b334a45a8ff 328 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_SYSCLK; \
bogdanm 0:9b334a45a8ff 329 break; \
bogdanm 0:9b334a45a8ff 330 case RCC_USART1CLKSOURCE_LSE: \
bogdanm 0:9b334a45a8ff 331 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \
bogdanm 0:9b334a45a8ff 332 break; \
bogdanm 0:9b334a45a8ff 333 default: \
bogdanm 0:9b334a45a8ff 334 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \
bogdanm 0:9b334a45a8ff 335 break; \
bogdanm 0:9b334a45a8ff 336 } \
bogdanm 0:9b334a45a8ff 337 } \
bogdanm 0:9b334a45a8ff 338 else if((__HANDLE__)->Instance == USART2) \
bogdanm 0:9b334a45a8ff 339 { \
bogdanm 0:9b334a45a8ff 340 switch(__HAL_RCC_GET_USART2_SOURCE()) \
bogdanm 0:9b334a45a8ff 341 { \
bogdanm 0:9b334a45a8ff 342 case RCC_USART2CLKSOURCE_PCLK1: \
bogdanm 0:9b334a45a8ff 343 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \
bogdanm 0:9b334a45a8ff 344 break; \
bogdanm 0:9b334a45a8ff 345 case RCC_USART2CLKSOURCE_HSI: \
bogdanm 0:9b334a45a8ff 346 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \
bogdanm 0:9b334a45a8ff 347 break; \
bogdanm 0:9b334a45a8ff 348 case RCC_USART2CLKSOURCE_SYSCLK: \
bogdanm 0:9b334a45a8ff 349 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_SYSCLK; \
bogdanm 0:9b334a45a8ff 350 break; \
bogdanm 0:9b334a45a8ff 351 case RCC_USART2CLKSOURCE_LSE: \
bogdanm 0:9b334a45a8ff 352 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \
bogdanm 0:9b334a45a8ff 353 break; \
bogdanm 0:9b334a45a8ff 354 default: \
bogdanm 0:9b334a45a8ff 355 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \
bogdanm 0:9b334a45a8ff 356 break; \
bogdanm 0:9b334a45a8ff 357 } \
bogdanm 0:9b334a45a8ff 358 } \
bogdanm 0:9b334a45a8ff 359 else if((__HANDLE__)->Instance == USART3) \
bogdanm 0:9b334a45a8ff 360 { \
bogdanm 0:9b334a45a8ff 361 switch(__HAL_RCC_GET_USART3_SOURCE()) \
bogdanm 0:9b334a45a8ff 362 { \
bogdanm 0:9b334a45a8ff 363 case RCC_USART3CLKSOURCE_PCLK1: \
bogdanm 0:9b334a45a8ff 364 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \
bogdanm 0:9b334a45a8ff 365 break; \
bogdanm 0:9b334a45a8ff 366 case RCC_USART3CLKSOURCE_HSI: \
bogdanm 0:9b334a45a8ff 367 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \
bogdanm 0:9b334a45a8ff 368 break; \
bogdanm 0:9b334a45a8ff 369 case RCC_USART3CLKSOURCE_SYSCLK: \
bogdanm 0:9b334a45a8ff 370 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_SYSCLK; \
bogdanm 0:9b334a45a8ff 371 break; \
bogdanm 0:9b334a45a8ff 372 case RCC_USART3CLKSOURCE_LSE: \
bogdanm 0:9b334a45a8ff 373 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \
bogdanm 0:9b334a45a8ff 374 break; \
bogdanm 0:9b334a45a8ff 375 default: \
bogdanm 0:9b334a45a8ff 376 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \
bogdanm 0:9b334a45a8ff 377 break; \
bogdanm 0:9b334a45a8ff 378 } \
bogdanm 0:9b334a45a8ff 379 } \
bogdanm 0:9b334a45a8ff 380 else if((__HANDLE__)->Instance == USART4) \
bogdanm 0:9b334a45a8ff 381 { \
bogdanm 0:9b334a45a8ff 382 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \
bogdanm 0:9b334a45a8ff 383 } \
bogdanm 0:9b334a45a8ff 384 else if((__HANDLE__)->Instance == USART5) \
bogdanm 0:9b334a45a8ff 385 { \
bogdanm 0:9b334a45a8ff 386 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \
bogdanm 0:9b334a45a8ff 387 } \
bogdanm 0:9b334a45a8ff 388 else if((__HANDLE__)->Instance == USART6) \
bogdanm 0:9b334a45a8ff 389 { \
bogdanm 0:9b334a45a8ff 390 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \
bogdanm 0:9b334a45a8ff 391 } \
bogdanm 0:9b334a45a8ff 392 else if((__HANDLE__)->Instance == USART7) \
bogdanm 0:9b334a45a8ff 393 { \
bogdanm 0:9b334a45a8ff 394 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \
bogdanm 0:9b334a45a8ff 395 } \
bogdanm 0:9b334a45a8ff 396 else if((__HANDLE__)->Instance == USART8) \
bogdanm 0:9b334a45a8ff 397 { \
bogdanm 0:9b334a45a8ff 398 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \
bogdanm 0:9b334a45a8ff 399 } \
bogdanm 0:9b334a45a8ff 400 else \
bogdanm 0:9b334a45a8ff 401 { \
bogdanm 0:9b334a45a8ff 402 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \
bogdanm 0:9b334a45a8ff 403 } \
bogdanm 0:9b334a45a8ff 404 } while(0)
bogdanm 0:9b334a45a8ff 405 #elif defined(STM32F030xC)
bogdanm 0:9b334a45a8ff 406 #define USART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
bogdanm 0:9b334a45a8ff 407 do { \
bogdanm 0:9b334a45a8ff 408 if((__HANDLE__)->Instance == USART1) \
bogdanm 0:9b334a45a8ff 409 { \
bogdanm 0:9b334a45a8ff 410 switch(__HAL_RCC_GET_USART1_SOURCE()) \
bogdanm 0:9b334a45a8ff 411 { \
bogdanm 0:9b334a45a8ff 412 case RCC_USART1CLKSOURCE_PCLK1: \
bogdanm 0:9b334a45a8ff 413 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \
bogdanm 0:9b334a45a8ff 414 break; \
bogdanm 0:9b334a45a8ff 415 case RCC_USART1CLKSOURCE_HSI: \
bogdanm 0:9b334a45a8ff 416 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \
bogdanm 0:9b334a45a8ff 417 break; \
bogdanm 0:9b334a45a8ff 418 case RCC_USART1CLKSOURCE_SYSCLK: \
bogdanm 0:9b334a45a8ff 419 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_SYSCLK; \
bogdanm 0:9b334a45a8ff 420 break; \
bogdanm 0:9b334a45a8ff 421 case RCC_USART1CLKSOURCE_LSE: \
bogdanm 0:9b334a45a8ff 422 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \
bogdanm 0:9b334a45a8ff 423 break; \
bogdanm 0:9b334a45a8ff 424 default: \
bogdanm 0:9b334a45a8ff 425 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \
bogdanm 0:9b334a45a8ff 426 break; \
bogdanm 0:9b334a45a8ff 427 } \
bogdanm 0:9b334a45a8ff 428 } \
bogdanm 0:9b334a45a8ff 429 else if((__HANDLE__)->Instance == USART2) \
bogdanm 0:9b334a45a8ff 430 { \
bogdanm 0:9b334a45a8ff 431 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \
bogdanm 0:9b334a45a8ff 432 } \
bogdanm 0:9b334a45a8ff 433 else if((__HANDLE__)->Instance == USART3) \
bogdanm 0:9b334a45a8ff 434 { \
bogdanm 0:9b334a45a8ff 435 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \
bogdanm 0:9b334a45a8ff 436 } \
bogdanm 0:9b334a45a8ff 437 else if((__HANDLE__)->Instance == USART4) \
bogdanm 0:9b334a45a8ff 438 { \
bogdanm 0:9b334a45a8ff 439 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \
bogdanm 0:9b334a45a8ff 440 } \
bogdanm 0:9b334a45a8ff 441 else if((__HANDLE__)->Instance == USART5) \
bogdanm 0:9b334a45a8ff 442 { \
bogdanm 0:9b334a45a8ff 443 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \
bogdanm 0:9b334a45a8ff 444 } \
bogdanm 0:9b334a45a8ff 445 else if((__HANDLE__)->Instance == USART6) \
bogdanm 0:9b334a45a8ff 446 { \
bogdanm 0:9b334a45a8ff 447 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \
bogdanm 0:9b334a45a8ff 448 } \
bogdanm 0:9b334a45a8ff 449 else \
bogdanm 0:9b334a45a8ff 450 { \
bogdanm 0:9b334a45a8ff 451 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \
bogdanm 0:9b334a45a8ff 452 } \
bogdanm 0:9b334a45a8ff 453 } while(0)
bogdanm 0:9b334a45a8ff 454 #endif /* defined(STM32F030x6) || defined(STM32F031x6) || defined(STM32F038xx) */
bogdanm 0:9b334a45a8ff 455
bogdanm 0:9b334a45a8ff 456
bogdanm 0:9b334a45a8ff 457 /** @brief Compute the USART mask to apply to retrieve the received data
bogdanm 0:9b334a45a8ff 458 * according to the word length and to the parity bits activation.
bogdanm 0:9b334a45a8ff 459 * @note If PCE = 1, the parity bit is not included in the data extracted
bogdanm 0:9b334a45a8ff 460 * by the reception API().
bogdanm 0:9b334a45a8ff 461 * This masking operation is not carried out in the case of
bogdanm 0:9b334a45a8ff 462 * DMA transfers.
bogdanm 0:9b334a45a8ff 463 * @param __HANDLE__: specifies the USART Handle.
bogdanm 0:9b334a45a8ff 464 * @retval None, the mask to apply to USART RDR register is stored in (__HANDLE__)->Mask field.
bogdanm 0:9b334a45a8ff 465 */
bogdanm 0:9b334a45a8ff 466 #if defined (STM32F042x6) || defined (STM32F048xx) || defined (STM32F070x6) || \
bogdanm 0:9b334a45a8ff 467 defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || defined (STM32F070xB) || \
bogdanm 0:9b334a45a8ff 468 defined (STM32F091xC) || defined (STM32F098xx) || defined (STM32F030xC)
bogdanm 0:9b334a45a8ff 469 #define USART_MASK_COMPUTATION(__HANDLE__) \
bogdanm 0:9b334a45a8ff 470 do { \
bogdanm 0:9b334a45a8ff 471 if ((__HANDLE__)->Init.WordLength == USART_WORDLENGTH_9B) \
bogdanm 0:9b334a45a8ff 472 { \
bogdanm 0:9b334a45a8ff 473 if ((__HANDLE__)->Init.Parity == USART_PARITY_NONE) \
bogdanm 0:9b334a45a8ff 474 { \
bogdanm 0:9b334a45a8ff 475 (__HANDLE__)->Mask = 0x01FF ; \
bogdanm 0:9b334a45a8ff 476 } \
bogdanm 0:9b334a45a8ff 477 else \
bogdanm 0:9b334a45a8ff 478 { \
bogdanm 0:9b334a45a8ff 479 (__HANDLE__)->Mask = 0x00FF ; \
bogdanm 0:9b334a45a8ff 480 } \
bogdanm 0:9b334a45a8ff 481 } \
bogdanm 0:9b334a45a8ff 482 else if ((__HANDLE__)->Init.WordLength == USART_WORDLENGTH_8B) \
bogdanm 0:9b334a45a8ff 483 { \
bogdanm 0:9b334a45a8ff 484 if ((__HANDLE__)->Init.Parity == USART_PARITY_NONE) \
bogdanm 0:9b334a45a8ff 485 { \
bogdanm 0:9b334a45a8ff 486 (__HANDLE__)->Mask = 0x00FF ; \
bogdanm 0:9b334a45a8ff 487 } \
bogdanm 0:9b334a45a8ff 488 else \
bogdanm 0:9b334a45a8ff 489 { \
bogdanm 0:9b334a45a8ff 490 (__HANDLE__)->Mask = 0x007F ; \
bogdanm 0:9b334a45a8ff 491 } \
bogdanm 0:9b334a45a8ff 492 } \
bogdanm 0:9b334a45a8ff 493 else if ((__HANDLE__)->Init.WordLength == USART_WORDLENGTH_7B) \
bogdanm 0:9b334a45a8ff 494 { \
bogdanm 0:9b334a45a8ff 495 if ((__HANDLE__)->Init.Parity == USART_PARITY_NONE) \
bogdanm 0:9b334a45a8ff 496 { \
bogdanm 0:9b334a45a8ff 497 (__HANDLE__)->Mask = 0x007F ; \
bogdanm 0:9b334a45a8ff 498 } \
bogdanm 0:9b334a45a8ff 499 else \
bogdanm 0:9b334a45a8ff 500 { \
bogdanm 0:9b334a45a8ff 501 (__HANDLE__)->Mask = 0x003F ; \
bogdanm 0:9b334a45a8ff 502 } \
bogdanm 0:9b334a45a8ff 503 } \
bogdanm 0:9b334a45a8ff 504 } while(0)
bogdanm 0:9b334a45a8ff 505 #else
bogdanm 0:9b334a45a8ff 506 #define USART_MASK_COMPUTATION(__HANDLE__) \
bogdanm 0:9b334a45a8ff 507 do { \
bogdanm 0:9b334a45a8ff 508 if ((__HANDLE__)->Init.WordLength == USART_WORDLENGTH_9B) \
bogdanm 0:9b334a45a8ff 509 { \
bogdanm 0:9b334a45a8ff 510 if ((__HANDLE__)->Init.Parity == USART_PARITY_NONE) \
bogdanm 0:9b334a45a8ff 511 { \
bogdanm 0:9b334a45a8ff 512 (__HANDLE__)->Mask = 0x01FF ; \
bogdanm 0:9b334a45a8ff 513 } \
bogdanm 0:9b334a45a8ff 514 else \
bogdanm 0:9b334a45a8ff 515 { \
bogdanm 0:9b334a45a8ff 516 (__HANDLE__)->Mask = 0x00FF ; \
bogdanm 0:9b334a45a8ff 517 } \
bogdanm 0:9b334a45a8ff 518 } \
bogdanm 0:9b334a45a8ff 519 else if ((__HANDLE__)->Init.WordLength == USART_WORDLENGTH_8B) \
bogdanm 0:9b334a45a8ff 520 { \
bogdanm 0:9b334a45a8ff 521 if ((__HANDLE__)->Init.Parity == USART_PARITY_NONE) \
bogdanm 0:9b334a45a8ff 522 { \
bogdanm 0:9b334a45a8ff 523 (__HANDLE__)->Mask = 0x00FF ; \
bogdanm 0:9b334a45a8ff 524 } \
bogdanm 0:9b334a45a8ff 525 else \
bogdanm 0:9b334a45a8ff 526 { \
bogdanm 0:9b334a45a8ff 527 (__HANDLE__)->Mask = 0x007F ; \
bogdanm 0:9b334a45a8ff 528 } \
bogdanm 0:9b334a45a8ff 529 } \
bogdanm 0:9b334a45a8ff 530 } while(0)
bogdanm 0:9b334a45a8ff 531 #endif /* defined (STM32F042x6) || defined (STM32F048xx) || defined (STM32F070x6) || \
bogdanm 0:9b334a45a8ff 532 defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || defined (STM32F070xB) || \
bogdanm 0:9b334a45a8ff 533 defined (STM32F091xC) || defined (STM32F098xx) || defined (STM32F030xC) */
bogdanm 0:9b334a45a8ff 534
bogdanm 0:9b334a45a8ff 535
bogdanm 0:9b334a45a8ff 536 /**
bogdanm 0:9b334a45a8ff 537 * @brief Ensure that USART frame length is valid.
bogdanm 0:9b334a45a8ff 538 * @param __LENGTH__: USART frame length.
bogdanm 0:9b334a45a8ff 539 * @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid)
bogdanm 0:9b334a45a8ff 540 */
bogdanm 0:9b334a45a8ff 541 #if defined (STM32F042x6) || defined (STM32F048xx) || defined (STM32F070x6) || \
bogdanm 0:9b334a45a8ff 542 defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || defined (STM32F070xB) || \
bogdanm 0:9b334a45a8ff 543 defined (STM32F091xC) || defined (STM32F098xx) || defined (STM32F030xC)
bogdanm 0:9b334a45a8ff 544 #define IS_USART_WORD_LENGTH(__LENGTH__) (((__LENGTH__) == USART_WORDLENGTH_7B) || \
bogdanm 0:9b334a45a8ff 545 ((__LENGTH__) == USART_WORDLENGTH_8B) || \
bogdanm 0:9b334a45a8ff 546 ((__LENGTH__) == USART_WORDLENGTH_9B))
bogdanm 0:9b334a45a8ff 547 #else
bogdanm 0:9b334a45a8ff 548 #define IS_USART_WORD_LENGTH(__LENGTH__) (((__LENGTH__) == USART_WORDLENGTH_8B) || \
bogdanm 0:9b334a45a8ff 549 ((__LENGTH__) == USART_WORDLENGTH_9B))
bogdanm 0:9b334a45a8ff 550 #endif /* defined (STM32F042x6) || defined (STM32F048xx) || defined (STM32F070x6) || defined (STM32F070xB) || \
bogdanm 0:9b334a45a8ff 551 defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \
bogdanm 0:9b334a45a8ff 552 defined (STM32F091xC) || defined (STM32F098xx) || defined (STM32F030xC) */
bogdanm 0:9b334a45a8ff 553
bogdanm 0:9b334a45a8ff 554 /**
bogdanm 0:9b334a45a8ff 555 * @brief Ensure that USART request parameter is valid.
bogdanm 0:9b334a45a8ff 556 * @param __PARAM__: USART request parameter.
bogdanm 0:9b334a45a8ff 557 * @retval SET (__PARAM__ is valid) or RESET (__PARAM__ is invalid)
bogdanm 0:9b334a45a8ff 558 */
bogdanm 0:9b334a45a8ff 559 #if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
bogdanm 0:9b334a45a8ff 560 #define IS_USART_REQUEST_PARAMETER(__PARAM__) (((__PARAM__) == USART_RXDATA_FLUSH_REQUEST) || \
bogdanm 0:9b334a45a8ff 561 ((__PARAM__) == USART_TXDATA_FLUSH_REQUEST))
bogdanm 0:9b334a45a8ff 562 #else
bogdanm 0:9b334a45a8ff 563 #define IS_USART_REQUEST_PARAMETER(__PARAM__) ((__PARAM__) == USART_RXDATA_FLUSH_REQUEST)
bogdanm 0:9b334a45a8ff 564 #endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */
bogdanm 0:9b334a45a8ff 565
bogdanm 0:9b334a45a8ff 566 /**
bogdanm 0:9b334a45a8ff 567 * @}
bogdanm 0:9b334a45a8ff 568 */
bogdanm 0:9b334a45a8ff 569
bogdanm 0:9b334a45a8ff 570 /* Exported functions --------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 571
bogdanm 0:9b334a45a8ff 572 /**
bogdanm 0:9b334a45a8ff 573 * @}
bogdanm 0:9b334a45a8ff 574 */
bogdanm 0:9b334a45a8ff 575
bogdanm 0:9b334a45a8ff 576 /**
bogdanm 0:9b334a45a8ff 577 * @}
bogdanm 0:9b334a45a8ff 578 */
bogdanm 0:9b334a45a8ff 579
bogdanm 0:9b334a45a8ff 580 #ifdef __cplusplus
bogdanm 0:9b334a45a8ff 581 }
bogdanm 0:9b334a45a8ff 582 #endif
bogdanm 0:9b334a45a8ff 583
bogdanm 0:9b334a45a8ff 584 #endif /* __STM32F0xx_HAL_USART_EX_H */
bogdanm 0:9b334a45a8ff 585
bogdanm 0:9b334a45a8ff 586 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
bogdanm 0:9b334a45a8ff 587