fix LPC812 PWM

Dependents:   IR_LED_Send

Fork of mbed-dev by mbed official

Committer:
bogdanm
Date:
Thu Oct 01 15:25:22 2015 +0300
Revision:
0:9b334a45a8ff
Initial commit on mbed-dev

Replaces mbed-src (now inactive)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /**
bogdanm 0:9b334a45a8ff 2 ******************************************************************************
bogdanm 0:9b334a45a8ff 3 * @file stm32f0xx_hal_flash_ex.h
bogdanm 0:9b334a45a8ff 4 * @author MCD Application Team
bogdanm 0:9b334a45a8ff 5 * @version V1.3.0
bogdanm 0:9b334a45a8ff 6 * @date 26-June-2015
bogdanm 0:9b334a45a8ff 7 * @brief Header file of Flash HAL Extended module.
bogdanm 0:9b334a45a8ff 8 ******************************************************************************
bogdanm 0:9b334a45a8ff 9 * @attention
bogdanm 0:9b334a45a8ff 10 *
bogdanm 0:9b334a45a8ff 11 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
bogdanm 0:9b334a45a8ff 12 *
bogdanm 0:9b334a45a8ff 13 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 0:9b334a45a8ff 14 * are permitted provided that the following conditions are met:
bogdanm 0:9b334a45a8ff 15 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 0:9b334a45a8ff 16 * this list of conditions and the following disclaimer.
bogdanm 0:9b334a45a8ff 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 0:9b334a45a8ff 18 * this list of conditions and the following disclaimer in the documentation
bogdanm 0:9b334a45a8ff 19 * and/or other materials provided with the distribution.
bogdanm 0:9b334a45a8ff 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 0:9b334a45a8ff 21 * may be used to endorse or promote products derived from this software
bogdanm 0:9b334a45a8ff 22 * without specific prior written permission.
bogdanm 0:9b334a45a8ff 23 *
bogdanm 0:9b334a45a8ff 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 0:9b334a45a8ff 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 0:9b334a45a8ff 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 0:9b334a45a8ff 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 0:9b334a45a8ff 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 0:9b334a45a8ff 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 0:9b334a45a8ff 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 0:9b334a45a8ff 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 0:9b334a45a8ff 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 0:9b334a45a8ff 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 0:9b334a45a8ff 34 *
bogdanm 0:9b334a45a8ff 35 ******************************************************************************
bogdanm 0:9b334a45a8ff 36 */
bogdanm 0:9b334a45a8ff 37
bogdanm 0:9b334a45a8ff 38 /* Define to prevent recursive inclusion -------------------------------------*/
bogdanm 0:9b334a45a8ff 39 #ifndef __STM32F0xx_HAL_FLASH_EX_H
bogdanm 0:9b334a45a8ff 40 #define __STM32F0xx_HAL_FLASH_EX_H
bogdanm 0:9b334a45a8ff 41
bogdanm 0:9b334a45a8ff 42 #ifdef __cplusplus
bogdanm 0:9b334a45a8ff 43 extern "C" {
bogdanm 0:9b334a45a8ff 44 #endif
bogdanm 0:9b334a45a8ff 45
bogdanm 0:9b334a45a8ff 46 /* Includes ------------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 47 #include "stm32f0xx_hal_def.h"
bogdanm 0:9b334a45a8ff 48
bogdanm 0:9b334a45a8ff 49 /** @addtogroup STM32F0xx_HAL_Driver
bogdanm 0:9b334a45a8ff 50 * @{
bogdanm 0:9b334a45a8ff 51 */
bogdanm 0:9b334a45a8ff 52
bogdanm 0:9b334a45a8ff 53 /** @addtogroup FLASHEx
bogdanm 0:9b334a45a8ff 54 * @{
bogdanm 0:9b334a45a8ff 55 */
bogdanm 0:9b334a45a8ff 56
bogdanm 0:9b334a45a8ff 57 /** @addtogroup FLASHEx_Private_Macros
bogdanm 0:9b334a45a8ff 58 * @{
bogdanm 0:9b334a45a8ff 59 */
bogdanm 0:9b334a45a8ff 60 #define IS_FLASH_TYPEERASE(VALUE) (((VALUE) == FLASH_TYPEERASE_PAGES) || \
bogdanm 0:9b334a45a8ff 61 ((VALUE) == FLASH_TYPEERASE_MASSERASE))
bogdanm 0:9b334a45a8ff 62
bogdanm 0:9b334a45a8ff 63 #define IS_OPTIONBYTE(VALUE) ((VALUE) <= (OPTIONBYTE_WRP | OPTIONBYTE_RDP | OPTIONBYTE_USER | OPTIONBYTE_DATA))
bogdanm 0:9b334a45a8ff 64
bogdanm 0:9b334a45a8ff 65 #define IS_WRPSTATE(VALUE) (((VALUE) == OB_WRPSTATE_DISABLE) || \
bogdanm 0:9b334a45a8ff 66 ((VALUE) == OB_WRPSTATE_ENABLE))
bogdanm 0:9b334a45a8ff 67
bogdanm 0:9b334a45a8ff 68 #define IS_OB_DATA_ADDRESS(ADDRESS) (((ADDRESS) == OB_DATA_ADDRESS_DATA0) || ((ADDRESS) == OB_DATA_ADDRESS_DATA1))
bogdanm 0:9b334a45a8ff 69
bogdanm 0:9b334a45a8ff 70 #define IS_OB_RDP_LEVEL(LEVEL) (((LEVEL) == OB_RDP_LEVEL_0) ||\
bogdanm 0:9b334a45a8ff 71 ((LEVEL) == OB_RDP_LEVEL_1))/*||\
bogdanm 0:9b334a45a8ff 72 ((LEVEL) == OB_RDP_LEVEL_2))*/
bogdanm 0:9b334a45a8ff 73
bogdanm 0:9b334a45a8ff 74 #define IS_OB_IWDG_SOURCE(SOURCE) (((SOURCE) == OB_IWDG_SW) || ((SOURCE) == OB_IWDG_HW))
bogdanm 0:9b334a45a8ff 75
bogdanm 0:9b334a45a8ff 76 #define IS_OB_STOP_SOURCE(SOURCE) (((SOURCE) == OB_STOP_NO_RST) || ((SOURCE) == OB_STOP_RST))
bogdanm 0:9b334a45a8ff 77
bogdanm 0:9b334a45a8ff 78 #define IS_OB_STDBY_SOURCE(SOURCE) (((SOURCE) == OB_STDBY_NO_RST) || ((SOURCE) == OB_STDBY_RST))
bogdanm 0:9b334a45a8ff 79
bogdanm 0:9b334a45a8ff 80 #define IS_OB_BOOT1(BOOT1) (((BOOT1) == OB_BOOT1_RESET) || ((BOOT1) == OB_BOOT1_SET))
bogdanm 0:9b334a45a8ff 81
bogdanm 0:9b334a45a8ff 82 #define IS_OB_VDDA_ANALOG(ANALOG) (((ANALOG) == OB_VDDA_ANALOG_ON) || ((ANALOG) == OB_VDDA_ANALOG_OFF))
bogdanm 0:9b334a45a8ff 83
bogdanm 0:9b334a45a8ff 84 #define IS_OB_SRAM_PARITY(PARITY) (((PARITY) == OB_RAM_PARITY_CHECK_SET) || ((PARITY) == OB_RAM_PARITY_CHECK_RESET))
bogdanm 0:9b334a45a8ff 85
bogdanm 0:9b334a45a8ff 86 #if defined(FLASH_OBR_BOOT_SEL)
bogdanm 0:9b334a45a8ff 87 #define IS_OB_BOOT_SEL(BOOT_SEL) (((BOOT_SEL) == OB_BOOT_SEL_RESET) || ((BOOT_SEL) == OB_BOOT_SEL_SET))
bogdanm 0:9b334a45a8ff 88 #define IS_OB_BOOT0(BOOT0) (((BOOT0) == OB_BOOT0_RESET) || ((BOOT0) == OB_BOOT0_SET))
bogdanm 0:9b334a45a8ff 89 #endif /* FLASH_OBR_BOOT_SEL */
bogdanm 0:9b334a45a8ff 90
bogdanm 0:9b334a45a8ff 91 #define IS_FLASH_NB_PAGES(ADDRESS,NBPAGES) ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= FLASH_BANK1_END)
bogdanm 0:9b334a45a8ff 92
bogdanm 0:9b334a45a8ff 93 #define IS_OB_WRP(PAGE) (((PAGE) != 0x0000000))
bogdanm 0:9b334a45a8ff 94
bogdanm 0:9b334a45a8ff 95 #define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && ((ADDRESS) <= FLASH_BANK1_END))
bogdanm 0:9b334a45a8ff 96
bogdanm 0:9b334a45a8ff 97 /**
bogdanm 0:9b334a45a8ff 98 * @}
bogdanm 0:9b334a45a8ff 99 */
bogdanm 0:9b334a45a8ff 100 /* Exported types ------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 101 /** @defgroup FLASHEx_Exported_Types FLASHEx Exported Types
bogdanm 0:9b334a45a8ff 102 * @{
bogdanm 0:9b334a45a8ff 103 */
bogdanm 0:9b334a45a8ff 104 /**
bogdanm 0:9b334a45a8ff 105 * @brief FLASH Erase structure definition
bogdanm 0:9b334a45a8ff 106 */
bogdanm 0:9b334a45a8ff 107 typedef struct
bogdanm 0:9b334a45a8ff 108 {
bogdanm 0:9b334a45a8ff 109 uint32_t TypeErase; /*!< TypeErase: Mass erase or page erase.
bogdanm 0:9b334a45a8ff 110 This parameter can be a value of @ref FLASHEx_Type_Erase */
bogdanm 0:9b334a45a8ff 111
bogdanm 0:9b334a45a8ff 112 uint32_t PageAddress; /*!< PageAdress: Initial FLASH page address to erase when mass erase is disabled
bogdanm 0:9b334a45a8ff 113 This parameter must be a number between Min_Data = FLASH_BASE and Max_Data = FLASH_BANK1_END */
bogdanm 0:9b334a45a8ff 114
bogdanm 0:9b334a45a8ff 115 uint32_t NbPages; /*!< NbPages: Number of pagess to be erased.
bogdanm 0:9b334a45a8ff 116 This parameter must be a value between Min_Data = 1 and Max_Data = (max number of pages - value of initial page)*/
bogdanm 0:9b334a45a8ff 117
bogdanm 0:9b334a45a8ff 118 } FLASH_EraseInitTypeDef;
bogdanm 0:9b334a45a8ff 119
bogdanm 0:9b334a45a8ff 120 /**
bogdanm 0:9b334a45a8ff 121 * @brief FLASH Options bytes program structure definition
bogdanm 0:9b334a45a8ff 122 */
bogdanm 0:9b334a45a8ff 123 typedef struct
bogdanm 0:9b334a45a8ff 124 {
bogdanm 0:9b334a45a8ff 125 uint32_t OptionType; /*!< OptionType: Option byte to be configured.
bogdanm 0:9b334a45a8ff 126 This parameter can be a value of @ref FLASHEx_OB_Type */
bogdanm 0:9b334a45a8ff 127
bogdanm 0:9b334a45a8ff 128 uint32_t WRPState; /*!< WRPState: Write protection activation or deactivation.
bogdanm 0:9b334a45a8ff 129 This parameter can be a value of @ref FLASHEx_OB_WRP_State */
bogdanm 0:9b334a45a8ff 130
bogdanm 0:9b334a45a8ff 131 uint32_t WRPPage; /*!< WRPPage: specifies the page(s) to be write protected
bogdanm 0:9b334a45a8ff 132 This parameter can be a value of @ref FLASHEx_OB_Write_Protection */
bogdanm 0:9b334a45a8ff 133
bogdanm 0:9b334a45a8ff 134 uint8_t RDPLevel; /*!< RDPLevel: Set the read protection level..
bogdanm 0:9b334a45a8ff 135 This parameter can be a value of @ref FLASHEx_OB_Read_Protection */
bogdanm 0:9b334a45a8ff 136
bogdanm 0:9b334a45a8ff 137 uint8_t USERConfig; /*!< USERConfig: Program the FLASH User Option Byte:
bogdanm 0:9b334a45a8ff 138 IWDG / STOP / STDBY / BOOT1 / VDDA_ANALOG / SRAM_PARITY
bogdanm 0:9b334a45a8ff 139 This parameter can be a combination of @ref FLASHEx_OB_Watchdog, @ref FLASHEx_OB_nRST_STOP,
bogdanm 0:9b334a45a8ff 140 @ref FLASHEx_OB_nRST_STDBY, @ref FLASHEx_OB_BOOT1, @ref FLASHEx_OB_VDDA_Analog_Monitoring and
bogdanm 0:9b334a45a8ff 141 @ref FLASHEx_OB_RAM_Parity_Check_Enable */
bogdanm 0:9b334a45a8ff 142
bogdanm 0:9b334a45a8ff 143 uint32_t DATAAddress; /*!< DATAAddress: Address of the option byte DATA to be programmed
bogdanm 0:9b334a45a8ff 144 This parameter can be a value of @ref FLASHEx_OB_Data_Address */
bogdanm 0:9b334a45a8ff 145
bogdanm 0:9b334a45a8ff 146 uint8_t DATAData; /*!< DATAData: Data to be stored in the option byte DATA
bogdanm 0:9b334a45a8ff 147 This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF */
bogdanm 0:9b334a45a8ff 148 } FLASH_OBProgramInitTypeDef;
bogdanm 0:9b334a45a8ff 149 /**
bogdanm 0:9b334a45a8ff 150 * @}
bogdanm 0:9b334a45a8ff 151 */
bogdanm 0:9b334a45a8ff 152
bogdanm 0:9b334a45a8ff 153 /* Exported constants --------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 154 /** @defgroup FLASHEx_Exported_Constants FLASHEx Exported Constants
bogdanm 0:9b334a45a8ff 155 * @{
bogdanm 0:9b334a45a8ff 156 */
bogdanm 0:9b334a45a8ff 157 /** @defgroup FLASHEx_Page_Size FLASHEx Page Size
bogdanm 0:9b334a45a8ff 158 * @{
bogdanm 0:9b334a45a8ff 159 */
bogdanm 0:9b334a45a8ff 160 #if defined(STM32F030x6) || defined(STM32F030x8) || defined(STM32F031x6) || defined(STM32F038xx) \
bogdanm 0:9b334a45a8ff 161 || defined(STM32F051x8) || defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F058xx) || defined(STM32F070x6)
bogdanm 0:9b334a45a8ff 162 #define FLASH_PAGE_SIZE 0x400
bogdanm 0:9b334a45a8ff 163 #endif /* STM32F030x6 || STM32F030x8 || STM32F031x6 || STM32F051x8 || STM32F042x6 || STM32F048xx || STM32F058xx || STM32F070x6 */
bogdanm 0:9b334a45a8ff 164
bogdanm 0:9b334a45a8ff 165 #if defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || defined(STM32F070xB) \
bogdanm 0:9b334a45a8ff 166 || defined(STM32F091xC) || defined(STM32F098xx) || defined(STM32F030xC)
bogdanm 0:9b334a45a8ff 167 #define FLASH_PAGE_SIZE 0x800
bogdanm 0:9b334a45a8ff 168 #endif /* STM32F071xB || STM32F072xB || STM32F078xx || STM32F091xC || STM32F098xx || STM32F030xC */
bogdanm 0:9b334a45a8ff 169
bogdanm 0:9b334a45a8ff 170 /**
bogdanm 0:9b334a45a8ff 171 * @}
bogdanm 0:9b334a45a8ff 172 */
bogdanm 0:9b334a45a8ff 173
bogdanm 0:9b334a45a8ff 174 /** @defgroup FLASHEx_Type_Erase FLASH Type Erase
bogdanm 0:9b334a45a8ff 175 * @{
bogdanm 0:9b334a45a8ff 176 */
bogdanm 0:9b334a45a8ff 177 #define FLASH_TYPEERASE_PAGES ((uint32_t)0x00) /*!<Pages erase only*/
bogdanm 0:9b334a45a8ff 178 #define FLASH_TYPEERASE_MASSERASE ((uint32_t)0x01) /*!<Flash mass erase activation*/
bogdanm 0:9b334a45a8ff 179
bogdanm 0:9b334a45a8ff 180 /**
bogdanm 0:9b334a45a8ff 181 * @}
bogdanm 0:9b334a45a8ff 182 */
bogdanm 0:9b334a45a8ff 183
bogdanm 0:9b334a45a8ff 184 /** @defgroup FLASHEx_OB_Type FLASH Option Bytes Type
bogdanm 0:9b334a45a8ff 185 * @{
bogdanm 0:9b334a45a8ff 186 */
bogdanm 0:9b334a45a8ff 187 #define OPTIONBYTE_WRP ((uint32_t)0x01) /*!<WRP option byte configuration*/
bogdanm 0:9b334a45a8ff 188 #define OPTIONBYTE_RDP ((uint32_t)0x02) /*!<RDP option byte configuration*/
bogdanm 0:9b334a45a8ff 189 #define OPTIONBYTE_USER ((uint32_t)0x04) /*!<USER option byte configuration*/
bogdanm 0:9b334a45a8ff 190 #define OPTIONBYTE_DATA ((uint32_t)0x08) /*!<DATA option byte configuration*/
bogdanm 0:9b334a45a8ff 191
bogdanm 0:9b334a45a8ff 192 /**
bogdanm 0:9b334a45a8ff 193 * @}
bogdanm 0:9b334a45a8ff 194 */
bogdanm 0:9b334a45a8ff 195
bogdanm 0:9b334a45a8ff 196
bogdanm 0:9b334a45a8ff 197 /** @defgroup FLASHEx_OB_WRP_State FLASH WRP State
bogdanm 0:9b334a45a8ff 198 * @{
bogdanm 0:9b334a45a8ff 199 */
bogdanm 0:9b334a45a8ff 200 #define OB_WRPSTATE_DISABLE ((uint32_t)0x00) /*!<Disable the write protection of the desired pages*/
bogdanm 0:9b334a45a8ff 201 #define OB_WRPSTATE_ENABLE ((uint32_t)0x01) /*!<Enable the write protection of the desired pagess*/
bogdanm 0:9b334a45a8ff 202
bogdanm 0:9b334a45a8ff 203 /**
bogdanm 0:9b334a45a8ff 204 * @}
bogdanm 0:9b334a45a8ff 205 */
bogdanm 0:9b334a45a8ff 206
bogdanm 0:9b334a45a8ff 207 /** @defgroup FLASHEx_OB_Write_Protection FLASHEx OB Write Protection
bogdanm 0:9b334a45a8ff 208 * @{
bogdanm 0:9b334a45a8ff 209 */
bogdanm 0:9b334a45a8ff 210 #if defined(STM32F030x6) || defined(STM32F030x8) || defined(STM32F031x6) || defined(STM32F038xx) \
bogdanm 0:9b334a45a8ff 211 || defined(STM32F051x8) || defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F058xx) || defined(STM32F070x6)
bogdanm 0:9b334a45a8ff 212 #define OB_WRP_PAGES0TO3 ((uint32_t)0x00000001) /* Write protection of page 0 to 3 */
bogdanm 0:9b334a45a8ff 213 #define OB_WRP_PAGES4TO7 ((uint32_t)0x00000002) /* Write protection of page 4 to 7 */
bogdanm 0:9b334a45a8ff 214 #define OB_WRP_PAGES8TO11 ((uint32_t)0x00000004) /* Write protection of page 8 to 11 */
bogdanm 0:9b334a45a8ff 215 #define OB_WRP_PAGES12TO15 ((uint32_t)0x00000008) /* Write protection of page 12 to 15 */
bogdanm 0:9b334a45a8ff 216 #define OB_WRP_PAGES16TO19 ((uint32_t)0x00000010) /* Write protection of page 16 to 19 */
bogdanm 0:9b334a45a8ff 217 #define OB_WRP_PAGES20TO23 ((uint32_t)0x00000020) /* Write protection of page 20 to 23 */
bogdanm 0:9b334a45a8ff 218 #define OB_WRP_PAGES24TO27 ((uint32_t)0x00000040) /* Write protection of page 24 to 27 */
bogdanm 0:9b334a45a8ff 219 #define OB_WRP_PAGES28TO31 ((uint32_t)0x00000080) /* Write protection of page 28 to 31 */
bogdanm 0:9b334a45a8ff 220 #if defined(STM32F030x8) || defined(STM32F051x8) || defined(STM32F058xx)
bogdanm 0:9b334a45a8ff 221 #define OB_WRP_PAGES32TO35 ((uint32_t)0x00000100) /* Write protection of page 32 to 35 */
bogdanm 0:9b334a45a8ff 222 #define OB_WRP_PAGES36TO39 ((uint32_t)0x00000200) /* Write protection of page 36 to 39 */
bogdanm 0:9b334a45a8ff 223 #define OB_WRP_PAGES40TO43 ((uint32_t)0x00000400) /* Write protection of page 40 to 43 */
bogdanm 0:9b334a45a8ff 224 #define OB_WRP_PAGES44TO47 ((uint32_t)0x00000800) /* Write protection of page 44 to 47 */
bogdanm 0:9b334a45a8ff 225 #define OB_WRP_PAGES48TO51 ((uint32_t)0x00001000) /* Write protection of page 48 to 51 */
bogdanm 0:9b334a45a8ff 226 #define OB_WRP_PAGES52TO57 ((uint32_t)0x00002000) /* Write protection of page 52 to 57 */
bogdanm 0:9b334a45a8ff 227 #define OB_WRP_PAGES56TO59 ((uint32_t)0x00004000) /* Write protection of page 56 to 59 */
bogdanm 0:9b334a45a8ff 228 #define OB_WRP_PAGES60TO63 ((uint32_t)0x00008000) /* Write protection of page 60 to 63 */
bogdanm 0:9b334a45a8ff 229 #endif /* STM32F030x8 || STM32F051x8 || STM32F058xx */
bogdanm 0:9b334a45a8ff 230
bogdanm 0:9b334a45a8ff 231 #if defined(STM32F030x6) || defined(STM32F030x8) || defined(STM32F031x6) || defined(STM32F038xx) \
bogdanm 0:9b334a45a8ff 232 || defined(STM32F051x8) || defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F058xx) || defined(STM32F070x6)
bogdanm 0:9b334a45a8ff 233 #define OB_WRP_PAGES0TO31MASK ((uint32_t)0x000000FF)
bogdanm 0:9b334a45a8ff 234 #endif /* STM32F030x6 || STM32F030x8 || STM32F031x6 || STM32F051x8 || STM32F042x6 || STM32F048xx || STM32F038xx || STM32F058xx || STM32F070x6 */
bogdanm 0:9b334a45a8ff 235
bogdanm 0:9b334a45a8ff 236 #if defined(STM32F030x8) || defined(STM32F051x8) || defined(STM32F058xx)
bogdanm 0:9b334a45a8ff 237 #define OB_WRP_PAGES32TO63MASK ((uint32_t)0x0000FF00)
bogdanm 0:9b334a45a8ff 238 #endif /* STM32F030x8 || STM32F051x8 || STM32F058xx */
bogdanm 0:9b334a45a8ff 239
bogdanm 0:9b334a45a8ff 240 #if defined(STM32F030x6) || defined(STM32F031x6) || defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F038xx)|| defined(STM32F070x6)
bogdanm 0:9b334a45a8ff 241 #define OB_WRP_ALLPAGES ((uint32_t)0x000000FF) /*!< Write protection of all pages */
bogdanm 0:9b334a45a8ff 242 #endif /* STM32F030x6 || STM32F031x6 || STM32F042x6 || STM32F048xx || STM32F038xx || STM32F070x6 */
bogdanm 0:9b334a45a8ff 243
bogdanm 0:9b334a45a8ff 244 #if defined(STM32F030x8) || defined(STM32F051x8) || defined(STM32F058xx)
bogdanm 0:9b334a45a8ff 245 #define OB_WRP_ALLPAGES ((uint32_t)0x0000FFFF) /*!< Write protection of all pages */
bogdanm 0:9b334a45a8ff 246 #endif /* STM32F030x8 || STM32F051x8 || STM32F058xx */
bogdanm 0:9b334a45a8ff 247 #endif /* STM32F030x6 || STM32F030x8 || STM32F031x6 || STM32F051x8 || STM32F042x6 || STM32F048xx || STM32F038xx || STM32F058xx || STM32F070x6 */
bogdanm 0:9b334a45a8ff 248
bogdanm 0:9b334a45a8ff 249 #if defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || defined(STM32F070xB) \
bogdanm 0:9b334a45a8ff 250 || defined(STM32F091xC) || defined(STM32F098xx) || defined(STM32F030xC)
bogdanm 0:9b334a45a8ff 251 #define OB_WRP_PAGES0TO1 ((uint32_t)0x00000001) /* Write protection of page 0 to 1 */
bogdanm 0:9b334a45a8ff 252 #define OB_WRP_PAGES2TO3 ((uint32_t)0x00000002) /* Write protection of page 2 to 3 */
bogdanm 0:9b334a45a8ff 253 #define OB_WRP_PAGES4TO5 ((uint32_t)0x00000004) /* Write protection of page 4 to 5 */
bogdanm 0:9b334a45a8ff 254 #define OB_WRP_PAGES6TO7 ((uint32_t)0x00000008) /* Write protection of page 6 to 7 */
bogdanm 0:9b334a45a8ff 255 #define OB_WRP_PAGES8TO9 ((uint32_t)0x00000010) /* Write protection of page 8 to 9 */
bogdanm 0:9b334a45a8ff 256 #define OB_WRP_PAGES10TO11 ((uint32_t)0x00000020) /* Write protection of page 10 to 11 */
bogdanm 0:9b334a45a8ff 257 #define OB_WRP_PAGES12TO13 ((uint32_t)0x00000040) /* Write protection of page 12 to 13 */
bogdanm 0:9b334a45a8ff 258 #define OB_WRP_PAGES14TO15 ((uint32_t)0x00000080) /* Write protection of page 14 to 15 */
bogdanm 0:9b334a45a8ff 259 #define OB_WRP_PAGES16TO17 ((uint32_t)0x00000100) /* Write protection of page 16 to 17 */
bogdanm 0:9b334a45a8ff 260 #define OB_WRP_PAGES18TO19 ((uint32_t)0x00000200) /* Write protection of page 18 to 19 */
bogdanm 0:9b334a45a8ff 261 #define OB_WRP_PAGES20TO21 ((uint32_t)0x00000400) /* Write protection of page 20 to 21 */
bogdanm 0:9b334a45a8ff 262 #define OB_WRP_PAGES22TO23 ((uint32_t)0x00000800) /* Write protection of page 22 to 23 */
bogdanm 0:9b334a45a8ff 263 #define OB_WRP_PAGES24TO25 ((uint32_t)0x00001000) /* Write protection of page 24 to 25 */
bogdanm 0:9b334a45a8ff 264 #define OB_WRP_PAGES26TO27 ((uint32_t)0x00002000) /* Write protection of page 26 to 27 */
bogdanm 0:9b334a45a8ff 265 #define OB_WRP_PAGES28TO29 ((uint32_t)0x00004000) /* Write protection of page 28 to 29 */
bogdanm 0:9b334a45a8ff 266 #define OB_WRP_PAGES30TO31 ((uint32_t)0x00008000) /* Write protection of page 30 to 31 */
bogdanm 0:9b334a45a8ff 267 #define OB_WRP_PAGES32TO33 ((uint32_t)0x00010000) /* Write protection of page 32 to 33 */
bogdanm 0:9b334a45a8ff 268 #define OB_WRP_PAGES34TO35 ((uint32_t)0x00020000) /* Write protection of page 34 to 35 */
bogdanm 0:9b334a45a8ff 269 #define OB_WRP_PAGES36TO37 ((uint32_t)0x00040000) /* Write protection of page 36 to 37 */
bogdanm 0:9b334a45a8ff 270 #define OB_WRP_PAGES38TO39 ((uint32_t)0x00080000) /* Write protection of page 38 to 39 */
bogdanm 0:9b334a45a8ff 271 #define OB_WRP_PAGES40TO41 ((uint32_t)0x00100000) /* Write protection of page 40 to 41 */
bogdanm 0:9b334a45a8ff 272 #define OB_WRP_PAGES42TO43 ((uint32_t)0x00200000) /* Write protection of page 42 to 43 */
bogdanm 0:9b334a45a8ff 273 #define OB_WRP_PAGES44TO45 ((uint32_t)0x00400000) /* Write protection of page 44 to 45 */
bogdanm 0:9b334a45a8ff 274 #define OB_WRP_PAGES46TO47 ((uint32_t)0x00800000) /* Write protection of page 46 to 47 */
bogdanm 0:9b334a45a8ff 275 #define OB_WRP_PAGES48TO49 ((uint32_t)0x01000000) /* Write protection of page 48 to 49 */
bogdanm 0:9b334a45a8ff 276 #define OB_WRP_PAGES50TO51 ((uint32_t)0x02000000) /* Write protection of page 50 to 51 */
bogdanm 0:9b334a45a8ff 277 #define OB_WRP_PAGES52TO53 ((uint32_t)0x04000000) /* Write protection of page 52 to 53 */
bogdanm 0:9b334a45a8ff 278 #define OB_WRP_PAGES54TO55 ((uint32_t)0x08000000) /* Write protection of page 54 to 55 */
bogdanm 0:9b334a45a8ff 279 #define OB_WRP_PAGES56TO57 ((uint32_t)0x10000000) /* Write protection of page 56 to 57 */
bogdanm 0:9b334a45a8ff 280 #define OB_WRP_PAGES58TO59 ((uint32_t)0x20000000) /* Write protection of page 58 to 59 */
bogdanm 0:9b334a45a8ff 281 #define OB_WRP_PAGES60TO61 ((uint32_t)0x40000000) /* Write protection of page 60 to 61 */
bogdanm 0:9b334a45a8ff 282 #if defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || defined(STM32F070xB)
bogdanm 0:9b334a45a8ff 283 #define OB_WRP_PAGES62TO63 ((uint32_t)0x80000000) /* Write protection of page 62 to 63 */
bogdanm 0:9b334a45a8ff 284 #endif /* STM32F071xB || STM32F072xB || STM32F078xx || STM32F070xB */
bogdanm 0:9b334a45a8ff 285 #if defined(STM32F091xC) || defined(STM32F098xx) || defined(STM32F030xC)
bogdanm 0:9b334a45a8ff 286 #define OB_WRP_PAGES62TO127 ((uint32_t)0x80000000) /* Write protection of page 62 to 127 */
bogdanm 0:9b334a45a8ff 287 #endif /* STM32F091xC || STM32F098xx || STM32F030xC */
bogdanm 0:9b334a45a8ff 288
bogdanm 0:9b334a45a8ff 289 #if defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || defined(STM32F070xB) \
bogdanm 0:9b334a45a8ff 290 || defined(STM32F091xC) || defined(STM32F098xx)|| defined(STM32F030xC)
bogdanm 0:9b334a45a8ff 291 #define OB_WRP_PAGES0TO15MASK ((uint32_t)0x000000FF)
bogdanm 0:9b334a45a8ff 292 #define OB_WRP_PAGES16TO31MASK ((uint32_t)0x0000FF00)
bogdanm 0:9b334a45a8ff 293 #define OB_WRP_PAGES32TO47MASK ((uint32_t)0x00FF0000)
bogdanm 0:9b334a45a8ff 294 #endif /* STM32F071xB || STM32F072xB || STM32F078xx || STM32F091xC || STM32F098xx || STM32F070xB || STM32F030xC */
bogdanm 0:9b334a45a8ff 295
bogdanm 0:9b334a45a8ff 296 #if defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || defined(STM32F070xB)
bogdanm 0:9b334a45a8ff 297 #define OB_WRP_PAGES48TO63MASK ((uint32_t)0xFF000000)
bogdanm 0:9b334a45a8ff 298 #endif /* STM32F071xB || STM32F072xB || STM32F078xx || STM32F070xB */
bogdanm 0:9b334a45a8ff 299 #if defined(STM32F091xC) || defined(STM32F098xx) || defined(STM32F030xC)
bogdanm 0:9b334a45a8ff 300 #define OB_WRP_PAGES48TO127MASK ((uint32_t)0xFF000000)
bogdanm 0:9b334a45a8ff 301 #endif /* STM32F091xC || STM32F098xx || STM32F030xC */
bogdanm 0:9b334a45a8ff 302
bogdanm 0:9b334a45a8ff 303 #define OB_WRP_ALLPAGES ((uint32_t)0xFFFFFFFF) /*!< Write protection of all pages */
bogdanm 0:9b334a45a8ff 304 #endif /* STM32F071xB || STM32F072xB || STM32F078xx || STM32F091xC || STM32F098xx || STM32F030xC || STM32F070xB */
bogdanm 0:9b334a45a8ff 305
bogdanm 0:9b334a45a8ff 306 /**
bogdanm 0:9b334a45a8ff 307 * @}
bogdanm 0:9b334a45a8ff 308 */
bogdanm 0:9b334a45a8ff 309
bogdanm 0:9b334a45a8ff 310 /** @defgroup FLASHEx_OB_Read_Protection FLASH OB Read Protection
bogdanm 0:9b334a45a8ff 311 * @{
bogdanm 0:9b334a45a8ff 312 */
bogdanm 0:9b334a45a8ff 313 #define OB_RDP_LEVEL_0 ((uint8_t)0xAA)
bogdanm 0:9b334a45a8ff 314 #define OB_RDP_LEVEL_1 ((uint8_t)0xBB)
bogdanm 0:9b334a45a8ff 315 #define OB_RDP_LEVEL_2 ((uint8_t)0xCC) /*!< Warning: When enabling read protection level 2
bogdanm 0:9b334a45a8ff 316 it's no more possible to go back to level 1 or 0 */
bogdanm 0:9b334a45a8ff 317 /**
bogdanm 0:9b334a45a8ff 318 * @}
bogdanm 0:9b334a45a8ff 319 */
bogdanm 0:9b334a45a8ff 320
bogdanm 0:9b334a45a8ff 321 /** @defgroup FLASHEx_OB_Watchdog FLASH OB Watchdog
bogdanm 0:9b334a45a8ff 322 * @{
bogdanm 0:9b334a45a8ff 323 */
bogdanm 0:9b334a45a8ff 324 #define OB_IWDG_SW ((uint8_t)0x01) /*!< Software WDG selected */
bogdanm 0:9b334a45a8ff 325 #define OB_IWDG_HW ((uint8_t)0x00) /*!< Hardware WDG selected */
bogdanm 0:9b334a45a8ff 326 /**
bogdanm 0:9b334a45a8ff 327 * @}
bogdanm 0:9b334a45a8ff 328 */
bogdanm 0:9b334a45a8ff 329
bogdanm 0:9b334a45a8ff 330 /** @defgroup FLASHEx_OB_nRST_STOP FLASH OB nRST STOP
bogdanm 0:9b334a45a8ff 331 * @{
bogdanm 0:9b334a45a8ff 332 */
bogdanm 0:9b334a45a8ff 333 #define OB_STOP_NO_RST ((uint8_t)0x02) /*!< No reset generated when entering in STOP */
bogdanm 0:9b334a45a8ff 334 #define OB_STOP_RST ((uint8_t)0x00) /*!< Reset generated when entering in STOP */
bogdanm 0:9b334a45a8ff 335 /**
bogdanm 0:9b334a45a8ff 336 * @}
bogdanm 0:9b334a45a8ff 337 */
bogdanm 0:9b334a45a8ff 338
bogdanm 0:9b334a45a8ff 339 /** @defgroup FLASHEx_OB_nRST_STDBY FLASH OB nRST STDBY
bogdanm 0:9b334a45a8ff 340 * @{
bogdanm 0:9b334a45a8ff 341 */
bogdanm 0:9b334a45a8ff 342 #define OB_STDBY_NO_RST ((uint8_t)0x04) /*!< No reset generated when entering in STANDBY */
bogdanm 0:9b334a45a8ff 343 #define OB_STDBY_RST ((uint8_t)0x00) /*!< Reset generated when entering in STANDBY */
bogdanm 0:9b334a45a8ff 344 /**
bogdanm 0:9b334a45a8ff 345 * @}
bogdanm 0:9b334a45a8ff 346 */
bogdanm 0:9b334a45a8ff 347
bogdanm 0:9b334a45a8ff 348 /** @defgroup FLASHEx_OB_BOOT1 FLASH OB BOOT1
bogdanm 0:9b334a45a8ff 349 * @{
bogdanm 0:9b334a45a8ff 350 */
bogdanm 0:9b334a45a8ff 351 #define OB_BOOT1_RESET ((uint8_t)0x00) /*!< BOOT1 Reset */
bogdanm 0:9b334a45a8ff 352 #define OB_BOOT1_SET ((uint8_t)0x10) /*!< BOOT1 Set */
bogdanm 0:9b334a45a8ff 353 /**
bogdanm 0:9b334a45a8ff 354 * @}
bogdanm 0:9b334a45a8ff 355 */
bogdanm 0:9b334a45a8ff 356
bogdanm 0:9b334a45a8ff 357 /** @defgroup FLASHEx_OB_VDDA_Analog_Monitoring FLASH OB VDDA Analog Monitoring
bogdanm 0:9b334a45a8ff 358 * @{
bogdanm 0:9b334a45a8ff 359 */
bogdanm 0:9b334a45a8ff 360 #define OB_VDDA_ANALOG_ON ((uint8_t)0x20) /*!< Analog monitoring on VDDA Power source ON */
bogdanm 0:9b334a45a8ff 361 #define OB_VDDA_ANALOG_OFF ((uint8_t)0x00) /*!< Analog monitoring on VDDA Power source OFF */
bogdanm 0:9b334a45a8ff 362 /**
bogdanm 0:9b334a45a8ff 363 * @}
bogdanm 0:9b334a45a8ff 364 */
bogdanm 0:9b334a45a8ff 365
bogdanm 0:9b334a45a8ff 366 /** @defgroup FLASHEx_OB_RAM_Parity_Check_Enable FLASH OB RAM Parity Check Enable
bogdanm 0:9b334a45a8ff 367 * @{
bogdanm 0:9b334a45a8ff 368 */
bogdanm 0:9b334a45a8ff 369 #define OB_RAM_PARITY_CHECK_SET ((uint8_t)0x00) /*!< RAM parity check enable set */
bogdanm 0:9b334a45a8ff 370 #define OB_RAM_PARITY_CHECK_RESET ((uint8_t)0x40) /*!< RAM parity check enable reset */
bogdanm 0:9b334a45a8ff 371 /**
bogdanm 0:9b334a45a8ff 372 * @}
bogdanm 0:9b334a45a8ff 373 */
bogdanm 0:9b334a45a8ff 374 #if defined(FLASH_OBR_BOOT_SEL)
bogdanm 0:9b334a45a8ff 375 /** @defgroup FLASHEx_OB_BOOT_SEL FLASHEx OB BOOT SEL
bogdanm 0:9b334a45a8ff 376 * @{
bogdanm 0:9b334a45a8ff 377 */
bogdanm 0:9b334a45a8ff 378 #define OB_BOOT_SEL_RESET ((uint8_t)0x00) /*!< BOOT_SEL Reset */
bogdanm 0:9b334a45a8ff 379 #define OB_BOOT_SEL_SET ((uint8_t)0x80) /*!< BOOT_SEL Set */
bogdanm 0:9b334a45a8ff 380 /**
bogdanm 0:9b334a45a8ff 381 * @}
bogdanm 0:9b334a45a8ff 382 */
bogdanm 0:9b334a45a8ff 383
bogdanm 0:9b334a45a8ff 384 /** @defgroup FLASHEx_OB_BOOT0 FLASHEx OB BOOT0
bogdanm 0:9b334a45a8ff 385 * @{
bogdanm 0:9b334a45a8ff 386 */
bogdanm 0:9b334a45a8ff 387 #define OB_BOOT0_RESET ((uint8_t)0x00) /*!< BOOT0 Reset */
bogdanm 0:9b334a45a8ff 388 #define OB_BOOT0_SET ((uint8_t)0x08) /*!< BOOT0 Set */
bogdanm 0:9b334a45a8ff 389 /**
bogdanm 0:9b334a45a8ff 390 * @}
bogdanm 0:9b334a45a8ff 391 */
bogdanm 0:9b334a45a8ff 392 #endif /* FLASH_OBR_BOOT_SEL */
bogdanm 0:9b334a45a8ff 393
bogdanm 0:9b334a45a8ff 394 /** @defgroup FLASHEx_OB_Data_Address Option Byte Data Address
bogdanm 0:9b334a45a8ff 395 * @{
bogdanm 0:9b334a45a8ff 396 */
bogdanm 0:9b334a45a8ff 397 #define OB_DATA_ADDRESS_DATA0 ((uint32_t)0x1FFFF804)
bogdanm 0:9b334a45a8ff 398 #define OB_DATA_ADDRESS_DATA1 ((uint32_t)0x1FFFF806)
bogdanm 0:9b334a45a8ff 399 /**
bogdanm 0:9b334a45a8ff 400 * @}
bogdanm 0:9b334a45a8ff 401 */
bogdanm 0:9b334a45a8ff 402
bogdanm 0:9b334a45a8ff 403 /**
bogdanm 0:9b334a45a8ff 404 * @}
bogdanm 0:9b334a45a8ff 405 */
bogdanm 0:9b334a45a8ff 406
bogdanm 0:9b334a45a8ff 407 /* Exported macro ------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 408
bogdanm 0:9b334a45a8ff 409 /* Exported functions --------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 410 /** @addtogroup FLASHEx_Exported_Functions
bogdanm 0:9b334a45a8ff 411 * @{
bogdanm 0:9b334a45a8ff 412 */
bogdanm 0:9b334a45a8ff 413
bogdanm 0:9b334a45a8ff 414 /** @addtogroup FLASHEx_Exported_Functions_Group1
bogdanm 0:9b334a45a8ff 415 * @{
bogdanm 0:9b334a45a8ff 416 */
bogdanm 0:9b334a45a8ff 417 /* IO operation functions *****************************************************/
bogdanm 0:9b334a45a8ff 418 HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *PageError);
bogdanm 0:9b334a45a8ff 419 HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit);
bogdanm 0:9b334a45a8ff 420
bogdanm 0:9b334a45a8ff 421 /**
bogdanm 0:9b334a45a8ff 422 * @}
bogdanm 0:9b334a45a8ff 423 */
bogdanm 0:9b334a45a8ff 424
bogdanm 0:9b334a45a8ff 425 /** @addtogroup FLASHEx_Exported_Functions_Group2
bogdanm 0:9b334a45a8ff 426 * @{
bogdanm 0:9b334a45a8ff 427 */
bogdanm 0:9b334a45a8ff 428 /* Peripheral Control functions ***********************************************/
bogdanm 0:9b334a45a8ff 429 HAL_StatusTypeDef HAL_FLASHEx_OBErase(void);
bogdanm 0:9b334a45a8ff 430 HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit);
bogdanm 0:9b334a45a8ff 431 void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit);
bogdanm 0:9b334a45a8ff 432
bogdanm 0:9b334a45a8ff 433 /**
bogdanm 0:9b334a45a8ff 434 * @}
bogdanm 0:9b334a45a8ff 435 */
bogdanm 0:9b334a45a8ff 436
bogdanm 0:9b334a45a8ff 437 /**
bogdanm 0:9b334a45a8ff 438 * @}
bogdanm 0:9b334a45a8ff 439 */
bogdanm 0:9b334a45a8ff 440
bogdanm 0:9b334a45a8ff 441 /**
bogdanm 0:9b334a45a8ff 442 * @}
bogdanm 0:9b334a45a8ff 443 */
bogdanm 0:9b334a45a8ff 444
bogdanm 0:9b334a45a8ff 445 /**
bogdanm 0:9b334a45a8ff 446 * @}
bogdanm 0:9b334a45a8ff 447 */
bogdanm 0:9b334a45a8ff 448
bogdanm 0:9b334a45a8ff 449 #ifdef __cplusplus
bogdanm 0:9b334a45a8ff 450 }
bogdanm 0:9b334a45a8ff 451 #endif
bogdanm 0:9b334a45a8ff 452
bogdanm 0:9b334a45a8ff 453 #endif /* __STM32F0xx_HAL_FLASH_EX_H */
bogdanm 0:9b334a45a8ff 454
bogdanm 0:9b334a45a8ff 455 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
bogdanm 0:9b334a45a8ff 456