fix LPC812 PWM

Dependents:   IR_LED_Send

Fork of mbed-dev by mbed official

Committer:
bogdanm
Date:
Thu Oct 01 15:25:22 2015 +0300
Revision:
0:9b334a45a8ff
Initial commit on mbed-dev

Replaces mbed-src (now inactive)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 //*****************************************************************************
bogdanm 0:9b334a45a8ff 2 // +--+
bogdanm 0:9b334a45a8ff 3 // | ++----+
bogdanm 0:9b334a45a8ff 4 // +-++ |
bogdanm 0:9b334a45a8ff 5 // | |
bogdanm 0:9b334a45a8ff 6 // +-+--+ |
bogdanm 0:9b334a45a8ff 7 // | +--+--+
bogdanm 0:9b334a45a8ff 8 // +----+ Copyright (c) 2011-12 Code Red Technologies Ltd.
bogdanm 0:9b334a45a8ff 9 //
bogdanm 0:9b334a45a8ff 10 // LPC43xx Microcontroller Startup code for use with Red Suite
bogdanm 0:9b334a45a8ff 11 //
bogdanm 0:9b334a45a8ff 12 // Version : 120430
bogdanm 0:9b334a45a8ff 13 //
bogdanm 0:9b334a45a8ff 14 // Software License Agreement
bogdanm 0:9b334a45a8ff 15 //
bogdanm 0:9b334a45a8ff 16 // The software is owned by Code Red Technologies and/or its suppliers, and is
bogdanm 0:9b334a45a8ff 17 // protected under applicable copyright laws. All rights are reserved. Any
bogdanm 0:9b334a45a8ff 18 // use in violation of the foregoing restrictions may subject the user to criminal
bogdanm 0:9b334a45a8ff 19 // sanctions under applicable laws, as well as to civil liability for the breach
bogdanm 0:9b334a45a8ff 20 // of the terms and conditions of this license.
bogdanm 0:9b334a45a8ff 21 //
bogdanm 0:9b334a45a8ff 22 // THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
bogdanm 0:9b334a45a8ff 23 // OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
bogdanm 0:9b334a45a8ff 24 // MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
bogdanm 0:9b334a45a8ff 25 // USE OF THIS SOFTWARE FOR COMMERCIAL DEVELOPMENT AND/OR EDUCATION IS SUBJECT
bogdanm 0:9b334a45a8ff 26 // TO A CURRENT END USER LICENSE AGREEMENT (COMMERCIAL OR EDUCATIONAL) WITH
bogdanm 0:9b334a45a8ff 27 // CODE RED TECHNOLOGIES LTD.
bogdanm 0:9b334a45a8ff 28 //
bogdanm 0:9b334a45a8ff 29 //*****************************************************************************
bogdanm 0:9b334a45a8ff 30 #if defined (__cplusplus)
bogdanm 0:9b334a45a8ff 31 #ifdef __REDLIB__
bogdanm 0:9b334a45a8ff 32 #error Redlib does not support C++
bogdanm 0:9b334a45a8ff 33 #else
bogdanm 0:9b334a45a8ff 34 //*****************************************************************************
bogdanm 0:9b334a45a8ff 35 //
bogdanm 0:9b334a45a8ff 36 // The entry point for the C++ library startup
bogdanm 0:9b334a45a8ff 37 //
bogdanm 0:9b334a45a8ff 38 //*****************************************************************************
bogdanm 0:9b334a45a8ff 39 extern "C" {
bogdanm 0:9b334a45a8ff 40 extern void __libc_init_array(void);
bogdanm 0:9b334a45a8ff 41 }
bogdanm 0:9b334a45a8ff 42 #endif
bogdanm 0:9b334a45a8ff 43 #endif
bogdanm 0:9b334a45a8ff 44
bogdanm 0:9b334a45a8ff 45 #define WEAK __attribute__ ((weak))
bogdanm 0:9b334a45a8ff 46 #define ALIAS(f) __attribute__ ((weak, alias (#f)))
bogdanm 0:9b334a45a8ff 47
bogdanm 0:9b334a45a8ff 48 // Code Red - if CMSIS is being used, then SystemInit() routine
bogdanm 0:9b334a45a8ff 49 // will be called by startup code rather than in application's main()
bogdanm 0:9b334a45a8ff 50 #if defined (__USE_CMSIS)
bogdanm 0:9b334a45a8ff 51 #include "LPC43xx.h"
bogdanm 0:9b334a45a8ff 52 #endif
bogdanm 0:9b334a45a8ff 53
bogdanm 0:9b334a45a8ff 54 //*****************************************************************************
bogdanm 0:9b334a45a8ff 55 #if defined (__cplusplus)
bogdanm 0:9b334a45a8ff 56 extern "C" {
bogdanm 0:9b334a45a8ff 57 #endif
bogdanm 0:9b334a45a8ff 58
bogdanm 0:9b334a45a8ff 59 //*****************************************************************************
bogdanm 0:9b334a45a8ff 60 //
bogdanm 0:9b334a45a8ff 61 // Forward declaration of the default handlers. These are aliased.
bogdanm 0:9b334a45a8ff 62 // When the application defines a handler (with the same name), this will
bogdanm 0:9b334a45a8ff 63 // automatically take precedence over these weak definitions
bogdanm 0:9b334a45a8ff 64 //
bogdanm 0:9b334a45a8ff 65 //*****************************************************************************
bogdanm 0:9b334a45a8ff 66 void ResetISR(void);
bogdanm 0:9b334a45a8ff 67 WEAK void NMI_Handler(void);
bogdanm 0:9b334a45a8ff 68 WEAK void HardFault_Handler(void);
bogdanm 0:9b334a45a8ff 69 WEAK void MemManage_Handler(void);
bogdanm 0:9b334a45a8ff 70 WEAK void BusFault_Handler(void);
bogdanm 0:9b334a45a8ff 71 WEAK void UsageFault_Handler(void);
bogdanm 0:9b334a45a8ff 72 WEAK void SVC_Handler(void);
bogdanm 0:9b334a45a8ff 73 WEAK void DebugMon_Handler(void);
bogdanm 0:9b334a45a8ff 74 WEAK void PendSV_Handler(void);
bogdanm 0:9b334a45a8ff 75 WEAK void SysTick_Handler(void);
bogdanm 0:9b334a45a8ff 76 WEAK void IntDefaultHandler(void);
bogdanm 0:9b334a45a8ff 77
bogdanm 0:9b334a45a8ff 78 //*****************************************************************************
bogdanm 0:9b334a45a8ff 79 //
bogdanm 0:9b334a45a8ff 80 // Forward declaration of the specific IRQ handlers. These are aliased
bogdanm 0:9b334a45a8ff 81 // to the IntDefaultHandler, which is a 'forever' loop. When the application
bogdanm 0:9b334a45a8ff 82 // defines a handler (with the same name), this will automatically take
bogdanm 0:9b334a45a8ff 83 // precedence over these weak definitions
bogdanm 0:9b334a45a8ff 84 //
bogdanm 0:9b334a45a8ff 85 //*****************************************************************************
bogdanm 0:9b334a45a8ff 86 void DAC_IRQHandler(void) ALIAS(IntDefaultHandler);
bogdanm 0:9b334a45a8ff 87 void M0CORE_IRQHandler(void) ALIAS(IntDefaultHandler);
bogdanm 0:9b334a45a8ff 88 void DMA_IRQHandler(void) ALIAS(IntDefaultHandler);
bogdanm 0:9b334a45a8ff 89 void EZH_IRQHandler(void) ALIAS(IntDefaultHandler);
bogdanm 0:9b334a45a8ff 90 void FLASH_EEPROM_IRQHandler(void) ALIAS(IntDefaultHandler);
bogdanm 0:9b334a45a8ff 91 void ETH_IRQHandler(void) ALIAS(IntDefaultHandler);
bogdanm 0:9b334a45a8ff 92 void SDIO_IRQHandler(void) ALIAS(IntDefaultHandler);
bogdanm 0:9b334a45a8ff 93 void LCD_IRQHandler(void) ALIAS(IntDefaultHandler);
bogdanm 0:9b334a45a8ff 94 void USB0_IRQHandler(void) ALIAS(IntDefaultHandler);
bogdanm 0:9b334a45a8ff 95 void USB1_IRQHandler(void) ALIAS(IntDefaultHandler);
bogdanm 0:9b334a45a8ff 96 void SCT_IRQHandler(void) ALIAS(IntDefaultHandler);
bogdanm 0:9b334a45a8ff 97 void RIT_IRQHandler(void) ALIAS(IntDefaultHandler);
bogdanm 0:9b334a45a8ff 98 void TIMER0_IRQHandler(void) ALIAS(IntDefaultHandler);
bogdanm 0:9b334a45a8ff 99 void TIMER1_IRQHandler(void) ALIAS(IntDefaultHandler);
bogdanm 0:9b334a45a8ff 100 void TIMER2_IRQHandler(void) ALIAS(IntDefaultHandler);
bogdanm 0:9b334a45a8ff 101 void TIMER3_IRQHandler(void) ALIAS(IntDefaultHandler);
bogdanm 0:9b334a45a8ff 102 void MCPWM_IRQHandler(void) ALIAS(IntDefaultHandler);
bogdanm 0:9b334a45a8ff 103 void ADC0_IRQHandler(void) ALIAS(IntDefaultHandler);
bogdanm 0:9b334a45a8ff 104 void I2C0_IRQHandler(void) ALIAS(IntDefaultHandler);
bogdanm 0:9b334a45a8ff 105 void SPI_IRQHandler (void) ALIAS(IntDefaultHandler);
bogdanm 0:9b334a45a8ff 106 void I2C1_IRQHandler(void) ALIAS(IntDefaultHandler);
bogdanm 0:9b334a45a8ff 107 void ADC1_IRQHandler(void) ALIAS(IntDefaultHandler);
bogdanm 0:9b334a45a8ff 108 void SSP0_IRQHandler(void) ALIAS(IntDefaultHandler);
bogdanm 0:9b334a45a8ff 109 void SSP1_IRQHandler(void) ALIAS(IntDefaultHandler);
bogdanm 0:9b334a45a8ff 110 void UART0_IRQHandler(void) ALIAS(IntDefaultHandler);
bogdanm 0:9b334a45a8ff 111 void UART1_IRQHandler(void) ALIAS(IntDefaultHandler);
bogdanm 0:9b334a45a8ff 112 void UART2_IRQHandler(void) ALIAS(IntDefaultHandler);
bogdanm 0:9b334a45a8ff 113 void UART3_IRQHandler(void) ALIAS(IntDefaultHandler);
bogdanm 0:9b334a45a8ff 114 void I2S0_IRQHandler(void) ALIAS(IntDefaultHandler);
bogdanm 0:9b334a45a8ff 115 void I2S1_IRQHandler(void) ALIAS(IntDefaultHandler);
bogdanm 0:9b334a45a8ff 116 void SPIFI_IRQHandler(void) ALIAS(IntDefaultHandler);
bogdanm 0:9b334a45a8ff 117 void SGPIO_IRQHandler(void) ALIAS(IntDefaultHandler);
bogdanm 0:9b334a45a8ff 118 void GPIO0_IRQHandler(void) ALIAS(IntDefaultHandler);
bogdanm 0:9b334a45a8ff 119 void GPIO1_IRQHandler(void) ALIAS(IntDefaultHandler);
bogdanm 0:9b334a45a8ff 120 void GPIO2_IRQHandler(void) ALIAS(IntDefaultHandler);
bogdanm 0:9b334a45a8ff 121 void GPIO3_IRQHandler(void) ALIAS(IntDefaultHandler);
bogdanm 0:9b334a45a8ff 122 void GPIO4_IRQHandler(void) ALIAS(IntDefaultHandler);
bogdanm 0:9b334a45a8ff 123 void GPIO5_IRQHandler(void) ALIAS(IntDefaultHandler);
bogdanm 0:9b334a45a8ff 124 void GPIO6_IRQHandler(void) ALIAS(IntDefaultHandler);
bogdanm 0:9b334a45a8ff 125 void GPIO7_IRQHandler(void) ALIAS(IntDefaultHandler);
bogdanm 0:9b334a45a8ff 126 void GINT0_IRQHandler(void) ALIAS(IntDefaultHandler);
bogdanm 0:9b334a45a8ff 127 void GINT1_IRQHandler(void) ALIAS(IntDefaultHandler);
bogdanm 0:9b334a45a8ff 128 void EVRT_IRQHandler(void) ALIAS(IntDefaultHandler);
bogdanm 0:9b334a45a8ff 129 void CAN1_IRQHandler(void) ALIAS(IntDefaultHandler);
bogdanm 0:9b334a45a8ff 130 void VADC_IRQHandler(void) ALIAS(IntDefaultHandler);
bogdanm 0:9b334a45a8ff 131 void ATIMER_IRQHandler(void) ALIAS(IntDefaultHandler);
bogdanm 0:9b334a45a8ff 132 void RTC_IRQHandler(void) ALIAS(IntDefaultHandler);
bogdanm 0:9b334a45a8ff 133 void WDT_IRQHandler(void) ALIAS(IntDefaultHandler);
bogdanm 0:9b334a45a8ff 134 void M0s_IRQHandler(void) ALIAS(IntDefaultHandler);
bogdanm 0:9b334a45a8ff 135 void CAN0_IRQHandler(void) ALIAS(IntDefaultHandler);
bogdanm 0:9b334a45a8ff 136 void QEI_IRQHandler(void) ALIAS(IntDefaultHandler);
bogdanm 0:9b334a45a8ff 137
bogdanm 0:9b334a45a8ff 138
bogdanm 0:9b334a45a8ff 139 //*****************************************************************************
bogdanm 0:9b334a45a8ff 140 //
bogdanm 0:9b334a45a8ff 141 // The entry point for the application.
bogdanm 0:9b334a45a8ff 142 // __main() is the entry point for Redlib based applications
bogdanm 0:9b334a45a8ff 143 // main() is the entry point for Newlib based applications
bogdanm 0:9b334a45a8ff 144 //
bogdanm 0:9b334a45a8ff 145 //*****************************************************************************
bogdanm 0:9b334a45a8ff 146 #if defined (__REDLIB__)
bogdanm 0:9b334a45a8ff 147 extern void __main(void);
bogdanm 0:9b334a45a8ff 148 #endif
bogdanm 0:9b334a45a8ff 149 extern int main(void);
bogdanm 0:9b334a45a8ff 150 //*****************************************************************************
bogdanm 0:9b334a45a8ff 151 //
bogdanm 0:9b334a45a8ff 152 // External declaration for the pointer to the stack top from the Linker Script
bogdanm 0:9b334a45a8ff 153 //
bogdanm 0:9b334a45a8ff 154 //*****************************************************************************
bogdanm 0:9b334a45a8ff 155 extern void _vStackTop(void);
bogdanm 0:9b334a45a8ff 156
bogdanm 0:9b334a45a8ff 157 //*****************************************************************************
bogdanm 0:9b334a45a8ff 158 #if defined (__cplusplus)
bogdanm 0:9b334a45a8ff 159 } // extern "C"
bogdanm 0:9b334a45a8ff 160 #endif
bogdanm 0:9b334a45a8ff 161 //*****************************************************************************
bogdanm 0:9b334a45a8ff 162 //
bogdanm 0:9b334a45a8ff 163 // The vector table.
bogdanm 0:9b334a45a8ff 164 // This relies on the linker script to place at correct location in memory.
bogdanm 0:9b334a45a8ff 165 //
bogdanm 0:9b334a45a8ff 166 //*****************************************************************************
bogdanm 0:9b334a45a8ff 167 extern void (* const g_pfnVectors[])(void);
bogdanm 0:9b334a45a8ff 168 __attribute__ ((section(".isr_vector")))
bogdanm 0:9b334a45a8ff 169 void (* const g_pfnVectors[])(void) = {
bogdanm 0:9b334a45a8ff 170 // Core Level - CM4
bogdanm 0:9b334a45a8ff 171 &_vStackTop, // The initial stack pointer
bogdanm 0:9b334a45a8ff 172 ResetISR, // The reset handler
bogdanm 0:9b334a45a8ff 173 NMI_Handler, // The NMI handler
bogdanm 0:9b334a45a8ff 174 HardFault_Handler, // The hard fault handler
bogdanm 0:9b334a45a8ff 175 MemManage_Handler, // The MPU fault handler
bogdanm 0:9b334a45a8ff 176 BusFault_Handler, // The bus fault handler
bogdanm 0:9b334a45a8ff 177 UsageFault_Handler, // The usage fault handler
bogdanm 0:9b334a45a8ff 178 0, // Reserved
bogdanm 0:9b334a45a8ff 179 0, // Reserved
bogdanm 0:9b334a45a8ff 180 0, // Reserved
bogdanm 0:9b334a45a8ff 181 0, // Reserved
bogdanm 0:9b334a45a8ff 182 SVC_Handler, // SVCall handler
bogdanm 0:9b334a45a8ff 183 DebugMon_Handler, // Debug monitor handler
bogdanm 0:9b334a45a8ff 184 0, // Reserved
bogdanm 0:9b334a45a8ff 185 PendSV_Handler, // The PendSV handler
bogdanm 0:9b334a45a8ff 186 SysTick_Handler, // The SysTick handler
bogdanm 0:9b334a45a8ff 187
bogdanm 0:9b334a45a8ff 188 // Chip Level - LPC43
bogdanm 0:9b334a45a8ff 189 DAC_IRQHandler, // 16
bogdanm 0:9b334a45a8ff 190 M0CORE_IRQHandler, // 17
bogdanm 0:9b334a45a8ff 191 DMA_IRQHandler, // 18
bogdanm 0:9b334a45a8ff 192 EZH_IRQHandler, // 19
bogdanm 0:9b334a45a8ff 193 FLASH_EEPROM_IRQHandler, // 20
bogdanm 0:9b334a45a8ff 194 ETH_IRQHandler, // 21
bogdanm 0:9b334a45a8ff 195 SDIO_IRQHandler, // 22
bogdanm 0:9b334a45a8ff 196 LCD_IRQHandler, // 23
bogdanm 0:9b334a45a8ff 197 USB0_IRQHandler, // 24
bogdanm 0:9b334a45a8ff 198 USB1_IRQHandler, // 25
bogdanm 0:9b334a45a8ff 199 SCT_IRQHandler, // 26
bogdanm 0:9b334a45a8ff 200 RIT_IRQHandler, // 27
bogdanm 0:9b334a45a8ff 201 TIMER0_IRQHandler, // 28
bogdanm 0:9b334a45a8ff 202 TIMER1_IRQHandler, // 29
bogdanm 0:9b334a45a8ff 203 TIMER2_IRQHandler, // 30
bogdanm 0:9b334a45a8ff 204 TIMER3_IRQHandler, // 31
bogdanm 0:9b334a45a8ff 205 MCPWM_IRQHandler, // 32
bogdanm 0:9b334a45a8ff 206 ADC0_IRQHandler, // 33
bogdanm 0:9b334a45a8ff 207 I2C0_IRQHandler, // 34
bogdanm 0:9b334a45a8ff 208 I2C1_IRQHandler, // 35
bogdanm 0:9b334a45a8ff 209 SPI_IRQHandler, // 36
bogdanm 0:9b334a45a8ff 210 ADC1_IRQHandler, // 37
bogdanm 0:9b334a45a8ff 211 SSP0_IRQHandler, // 38
bogdanm 0:9b334a45a8ff 212 SSP1_IRQHandler, // 39
bogdanm 0:9b334a45a8ff 213 UART0_IRQHandler, // 40
bogdanm 0:9b334a45a8ff 214 UART1_IRQHandler, // 41
bogdanm 0:9b334a45a8ff 215 UART2_IRQHandler, // 42
bogdanm 0:9b334a45a8ff 216 UART3_IRQHandler, // 43
bogdanm 0:9b334a45a8ff 217 I2S0_IRQHandler, // 44
bogdanm 0:9b334a45a8ff 218 I2S1_IRQHandler, // 45
bogdanm 0:9b334a45a8ff 219 SPIFI_IRQHandler, // 46
bogdanm 0:9b334a45a8ff 220 SGPIO_IRQHandler, // 47
bogdanm 0:9b334a45a8ff 221 GPIO0_IRQHandler, // 48
bogdanm 0:9b334a45a8ff 222 GPIO1_IRQHandler, // 49
bogdanm 0:9b334a45a8ff 223 GPIO2_IRQHandler, // 50
bogdanm 0:9b334a45a8ff 224 GPIO3_IRQHandler, // 51
bogdanm 0:9b334a45a8ff 225 GPIO4_IRQHandler, // 52
bogdanm 0:9b334a45a8ff 226 GPIO5_IRQHandler, // 53
bogdanm 0:9b334a45a8ff 227 GPIO6_IRQHandler, // 54
bogdanm 0:9b334a45a8ff 228 GPIO7_IRQHandler, // 55
bogdanm 0:9b334a45a8ff 229 GINT0_IRQHandler, // 56
bogdanm 0:9b334a45a8ff 230 GINT1_IRQHandler, // 57
bogdanm 0:9b334a45a8ff 231 EVRT_IRQHandler, // 58
bogdanm 0:9b334a45a8ff 232 CAN1_IRQHandler, // 59
bogdanm 0:9b334a45a8ff 233 0, // 60
bogdanm 0:9b334a45a8ff 234 VADC_IRQHandler, // 61
bogdanm 0:9b334a45a8ff 235 ATIMER_IRQHandler, // 62
bogdanm 0:9b334a45a8ff 236 RTC_IRQHandler, // 63
bogdanm 0:9b334a45a8ff 237 0, // 64
bogdanm 0:9b334a45a8ff 238 WDT_IRQHandler, // 65
bogdanm 0:9b334a45a8ff 239 M0s_IRQHandler, // 66
bogdanm 0:9b334a45a8ff 240 CAN0_IRQHandler, // 67
bogdanm 0:9b334a45a8ff 241 QEI_IRQHandler, // 68
bogdanm 0:9b334a45a8ff 242 };
bogdanm 0:9b334a45a8ff 243
bogdanm 0:9b334a45a8ff 244 //*****************************************************************************
bogdanm 0:9b334a45a8ff 245 // Functions to carry out the initialization of RW and BSS data sections. These
bogdanm 0:9b334a45a8ff 246 // are written as separate functions rather than being inlined within the
bogdanm 0:9b334a45a8ff 247 // ResetISR() function in order to cope with MCUs with multiple banks of
bogdanm 0:9b334a45a8ff 248 // memory.
bogdanm 0:9b334a45a8ff 249 //*****************************************************************************
bogdanm 0:9b334a45a8ff 250 __attribute__ ((section(".after_vectors")))
bogdanm 0:9b334a45a8ff 251 void data_init(unsigned int romstart, unsigned int start, unsigned int len) {
bogdanm 0:9b334a45a8ff 252 unsigned int *pulDest = (unsigned int*) start;
bogdanm 0:9b334a45a8ff 253 unsigned int *pulSrc = (unsigned int*) romstart;
bogdanm 0:9b334a45a8ff 254 unsigned int loop;
bogdanm 0:9b334a45a8ff 255 for (loop = 0; loop < len; loop = loop + 4)
bogdanm 0:9b334a45a8ff 256 *pulDest++ = *pulSrc++;
bogdanm 0:9b334a45a8ff 257 }
bogdanm 0:9b334a45a8ff 258
bogdanm 0:9b334a45a8ff 259 __attribute__ ((section(".after_vectors")))
bogdanm 0:9b334a45a8ff 260 void bss_init(unsigned int start, unsigned int len) {
bogdanm 0:9b334a45a8ff 261 unsigned int *pulDest = (unsigned int*) start;
bogdanm 0:9b334a45a8ff 262 unsigned int loop;
bogdanm 0:9b334a45a8ff 263 for (loop = 0; loop < len; loop = loop + 4)
bogdanm 0:9b334a45a8ff 264 *pulDest++ = 0;
bogdanm 0:9b334a45a8ff 265 }
bogdanm 0:9b334a45a8ff 266
bogdanm 0:9b334a45a8ff 267 //*****************************************************************************
bogdanm 0:9b334a45a8ff 268 // The following symbols are constructs generated by the linker, indicating
bogdanm 0:9b334a45a8ff 269 // the location of various points in the "Global Section Table". This table is
bogdanm 0:9b334a45a8ff 270 // created by the linker via the Code Red managed linker script mechanism. It
bogdanm 0:9b334a45a8ff 271 // contains the load address, execution address and length of each RW data
bogdanm 0:9b334a45a8ff 272 // section and the execution and length of each BSS (zero initialized) section.
bogdanm 0:9b334a45a8ff 273 //*****************************************************************************
bogdanm 0:9b334a45a8ff 274 extern unsigned int __data_section_table;
bogdanm 0:9b334a45a8ff 275 extern unsigned int __data_section_table_end;
bogdanm 0:9b334a45a8ff 276 extern unsigned int __bss_section_table;
bogdanm 0:9b334a45a8ff 277 extern unsigned int __bss_section_table_end;
bogdanm 0:9b334a45a8ff 278
bogdanm 0:9b334a45a8ff 279 //*****************************************************************************
bogdanm 0:9b334a45a8ff 280 // Reset entry point for your code.
bogdanm 0:9b334a45a8ff 281 // Sets up a simple runtime environment and initializes the C/C++
bogdanm 0:9b334a45a8ff 282 // library.
bogdanm 0:9b334a45a8ff 283 //
bogdanm 0:9b334a45a8ff 284 //*****************************************************************************
bogdanm 0:9b334a45a8ff 285 void
bogdanm 0:9b334a45a8ff 286 ResetISR(void) {
bogdanm 0:9b334a45a8ff 287
bogdanm 0:9b334a45a8ff 288 // *************************************************************
bogdanm 0:9b334a45a8ff 289 // The following conditional block of code manually resets as
bogdanm 0:9b334a45a8ff 290 // much of the peripheral set of the LPC43 as possible. This is
bogdanm 0:9b334a45a8ff 291 // done because the LPC43 does not provide a means of triggering
bogdanm 0:9b334a45a8ff 292 // a full system reset under debugger control, which can cause
bogdanm 0:9b334a45a8ff 293 // problems in certain circumstances when debugging.
bogdanm 0:9b334a45a8ff 294 //
bogdanm 0:9b334a45a8ff 295 // You can prevent this code block being included if you require
bogdanm 0:9b334a45a8ff 296 // (for example when creating a final executable which you will
bogdanm 0:9b334a45a8ff 297 // not debug) by setting the define 'DONT_RESET_ON_RESTART'.
bogdanm 0:9b334a45a8ff 298 //
bogdanm 0:9b334a45a8ff 299 #ifndef DONT_RESET_ON_RESTART
bogdanm 0:9b334a45a8ff 300
bogdanm 0:9b334a45a8ff 301 // Disable interrupts
bogdanm 0:9b334a45a8ff 302 __asm volatile ("cpsid i");
bogdanm 0:9b334a45a8ff 303 // equivalent to CMSIS '__disable_irq()' function
bogdanm 0:9b334a45a8ff 304
bogdanm 0:9b334a45a8ff 305 unsigned int *RESET_CONTROL = (unsigned int *) 0x40053100;
bogdanm 0:9b334a45a8ff 306 // LPC_RGU->RESET_CTRL0 @ 0x40053100
bogdanm 0:9b334a45a8ff 307 // LPC_RGU->RESET_CTRL1 @ 0x40053104
bogdanm 0:9b334a45a8ff 308 // Note that we do not use the CMSIS register access mechanism,
bogdanm 0:9b334a45a8ff 309 // as there is no guarantee that the project has been configured
bogdanm 0:9b334a45a8ff 310 // to use CMSIS.
bogdanm 0:9b334a45a8ff 311
bogdanm 0:9b334a45a8ff 312 // Write to LPC_RGU->RESET_CTRL0
bogdanm 0:9b334a45a8ff 313 *(RESET_CONTROL+0) = 0x10DF0000;
bogdanm 0:9b334a45a8ff 314 // GPIO_RST|AES_RST|ETHERNET_RST|SDIO_RST|DMA_RST|
bogdanm 0:9b334a45a8ff 315 // USB1_RST|USB0_RST|LCD_RST
bogdanm 0:9b334a45a8ff 316
bogdanm 0:9b334a45a8ff 317 // Write to LPC_RGU->RESET_CTRL1
bogdanm 0:9b334a45a8ff 318 *(RESET_CONTROL+1) = 0x01DFF7FF;
bogdanm 0:9b334a45a8ff 319 // M0APP_RST|CAN0_RST|CAN1_RST|I2S_RST|SSP1_RST|SSP0_RST|
bogdanm 0:9b334a45a8ff 320 // I2C1_RST|I2C0_RST|UART3_RST|UART1_RST|UART1_RST|UART0_RST|
bogdanm 0:9b334a45a8ff 321 // DAC_RST|ADC1_RST|ADC0_RST|QEI_RST|MOTOCONPWM_RST|SCT_RST|
bogdanm 0:9b334a45a8ff 322 // RITIMER_RST|TIMER3_RST|TIMER2_RST|TIMER1_RST|TIMER0_RST
bogdanm 0:9b334a45a8ff 323
bogdanm 0:9b334a45a8ff 324 // Clear all pending interrupts in the NVIC
bogdanm 0:9b334a45a8ff 325 volatile unsigned int *NVIC_ICPR = (unsigned int *) 0xE000E280;
bogdanm 0:9b334a45a8ff 326 unsigned int irqpendloop;
bogdanm 0:9b334a45a8ff 327 for (irqpendloop = 0; irqpendloop < 8; irqpendloop++) {
bogdanm 0:9b334a45a8ff 328 *(NVIC_ICPR+irqpendloop)= 0xFFFFFFFF;
bogdanm 0:9b334a45a8ff 329 }
bogdanm 0:9b334a45a8ff 330
bogdanm 0:9b334a45a8ff 331 // Reenable interrupts
bogdanm 0:9b334a45a8ff 332 __asm volatile ("cpsie i");
bogdanm 0:9b334a45a8ff 333 // equivalent to CMSIS '__enable_irq()' function
bogdanm 0:9b334a45a8ff 334
bogdanm 0:9b334a45a8ff 335 #endif // ifndef DONT_RESET_ON_RESTART
bogdanm 0:9b334a45a8ff 336 // *************************************************************
bogdanm 0:9b334a45a8ff 337
bogdanm 0:9b334a45a8ff 338
bogdanm 0:9b334a45a8ff 339 //
bogdanm 0:9b334a45a8ff 340 // Copy the data sections from flash to SRAM.
bogdanm 0:9b334a45a8ff 341 //
bogdanm 0:9b334a45a8ff 342 unsigned int LoadAddr, ExeAddr, SectionLen;
bogdanm 0:9b334a45a8ff 343 unsigned int *SectionTableAddr;
bogdanm 0:9b334a45a8ff 344
bogdanm 0:9b334a45a8ff 345 // Load base address of Global Section Table
bogdanm 0:9b334a45a8ff 346 SectionTableAddr = &__data_section_table;
bogdanm 0:9b334a45a8ff 347
bogdanm 0:9b334a45a8ff 348 // Copy the data sections from flash to SRAM.
bogdanm 0:9b334a45a8ff 349 while (SectionTableAddr < &__data_section_table_end) {
bogdanm 0:9b334a45a8ff 350 LoadAddr = *SectionTableAddr++;
bogdanm 0:9b334a45a8ff 351 ExeAddr = *SectionTableAddr++;
bogdanm 0:9b334a45a8ff 352 SectionLen = *SectionTableAddr++;
bogdanm 0:9b334a45a8ff 353 data_init(LoadAddr, ExeAddr, SectionLen);
bogdanm 0:9b334a45a8ff 354 }
bogdanm 0:9b334a45a8ff 355 // At this point, SectionTableAddr = &__bss_section_table;
bogdanm 0:9b334a45a8ff 356 // Zero fill the bss segment
bogdanm 0:9b334a45a8ff 357 while (SectionTableAddr < &__bss_section_table_end) {
bogdanm 0:9b334a45a8ff 358 ExeAddr = *SectionTableAddr++;
bogdanm 0:9b334a45a8ff 359 SectionLen = *SectionTableAddr++;
bogdanm 0:9b334a45a8ff 360 bss_init(ExeAddr, SectionLen);
bogdanm 0:9b334a45a8ff 361 }
bogdanm 0:9b334a45a8ff 362
bogdanm 0:9b334a45a8ff 363 #if defined (__VFP_FP__) && !defined (__SOFTFP__)
bogdanm 0:9b334a45a8ff 364 /*
bogdanm 0:9b334a45a8ff 365 * Code to enable the Cortex-M4 FPU only included
bogdanm 0:9b334a45a8ff 366 * if appropriate build options have been selected.
bogdanm 0:9b334a45a8ff 367 * Code taken from Section 7.1, Cortex-M4 TRM (DDI0439C)
bogdanm 0:9b334a45a8ff 368 */
bogdanm 0:9b334a45a8ff 369 // CPACR is located at address 0xE000ED88
bogdanm 0:9b334a45a8ff 370 asm("LDR.W R0, =0xE000ED88");
bogdanm 0:9b334a45a8ff 371 // Read CPACR
bogdanm 0:9b334a45a8ff 372 asm("LDR R1, [R0]");
bogdanm 0:9b334a45a8ff 373 // Set bits 20-23 to enable CP10 and CP11 coprocessors
bogdanm 0:9b334a45a8ff 374 asm(" ORR R1, R1, #(0xF << 20)");
bogdanm 0:9b334a45a8ff 375 // Write back the modified value to the CPACR
bogdanm 0:9b334a45a8ff 376 asm("STR R1, [R0]");
bogdanm 0:9b334a45a8ff 377 #endif // (__VFP_FP__) && !(__SOFTFP__)
bogdanm 0:9b334a45a8ff 378
bogdanm 0:9b334a45a8ff 379 // ******************************
bogdanm 0:9b334a45a8ff 380 // Check to see if we are running the code from a non-zero
bogdanm 0:9b334a45a8ff 381 // address (eg RAM, external flash), in which case we need
bogdanm 0:9b334a45a8ff 382 // to modify the VTOR register to tell the CPU that the
bogdanm 0:9b334a45a8ff 383 // vector table is located at a non-0x0 address.
bogdanm 0:9b334a45a8ff 384
bogdanm 0:9b334a45a8ff 385 // Note that we do not use the CMSIS register access mechanism,
bogdanm 0:9b334a45a8ff 386 // as there is no guarantee that the project has been configured
bogdanm 0:9b334a45a8ff 387 // to use CMSIS.
bogdanm 0:9b334a45a8ff 388 unsigned int * pSCB_VTOR = (unsigned int *) 0xE000ED08;
bogdanm 0:9b334a45a8ff 389 if ((unsigned int *)g_pfnVectors!=(unsigned int *) 0x00000000) {
bogdanm 0:9b334a45a8ff 390 // CMSIS : SCB->VTOR = <address of vector table>
bogdanm 0:9b334a45a8ff 391 *pSCB_VTOR = (unsigned int)g_pfnVectors;
bogdanm 0:9b334a45a8ff 392 }
bogdanm 0:9b334a45a8ff 393
bogdanm 0:9b334a45a8ff 394 #ifdef __USE_CMSIS
bogdanm 0:9b334a45a8ff 395 SystemInit();
bogdanm 0:9b334a45a8ff 396 #endif
bogdanm 0:9b334a45a8ff 397
bogdanm 0:9b334a45a8ff 398 #if defined (__cplusplus)
bogdanm 0:9b334a45a8ff 399 //
bogdanm 0:9b334a45a8ff 400 // Call C++ library initialisation
bogdanm 0:9b334a45a8ff 401 //
bogdanm 0:9b334a45a8ff 402 __libc_init_array();
bogdanm 0:9b334a45a8ff 403 #endif
bogdanm 0:9b334a45a8ff 404
bogdanm 0:9b334a45a8ff 405 #if defined (__REDLIB__)
bogdanm 0:9b334a45a8ff 406 // Call the Redlib library, which in turn calls main()
bogdanm 0:9b334a45a8ff 407 __main() ;
bogdanm 0:9b334a45a8ff 408 #else
bogdanm 0:9b334a45a8ff 409 main();
bogdanm 0:9b334a45a8ff 410 #endif
bogdanm 0:9b334a45a8ff 411
bogdanm 0:9b334a45a8ff 412 //
bogdanm 0:9b334a45a8ff 413 // main() shouldn't return, but if it does, we'll just enter an infinite loop
bogdanm 0:9b334a45a8ff 414 //
bogdanm 0:9b334a45a8ff 415 while (1) {
bogdanm 0:9b334a45a8ff 416 ;
bogdanm 0:9b334a45a8ff 417 }
bogdanm 0:9b334a45a8ff 418 }
bogdanm 0:9b334a45a8ff 419
bogdanm 0:9b334a45a8ff 420 //*****************************************************************************
bogdanm 0:9b334a45a8ff 421 // Default exception handlers. Override the ones here by defining your own
bogdanm 0:9b334a45a8ff 422 // handler routines in your application code.
bogdanm 0:9b334a45a8ff 423 //*****************************************************************************
bogdanm 0:9b334a45a8ff 424 __attribute__ ((section(".after_vectors")))
bogdanm 0:9b334a45a8ff 425 void NMI_Handler(void)
bogdanm 0:9b334a45a8ff 426 {
bogdanm 0:9b334a45a8ff 427 while(1)
bogdanm 0:9b334a45a8ff 428 {
bogdanm 0:9b334a45a8ff 429 }
bogdanm 0:9b334a45a8ff 430 }
bogdanm 0:9b334a45a8ff 431 __attribute__ ((section(".after_vectors")))
bogdanm 0:9b334a45a8ff 432 void HardFault_Handler(void)
bogdanm 0:9b334a45a8ff 433 {
bogdanm 0:9b334a45a8ff 434 while(1)
bogdanm 0:9b334a45a8ff 435 {
bogdanm 0:9b334a45a8ff 436 }
bogdanm 0:9b334a45a8ff 437 }
bogdanm 0:9b334a45a8ff 438 __attribute__ ((section(".after_vectors")))
bogdanm 0:9b334a45a8ff 439 void MemManage_Handler(void)
bogdanm 0:9b334a45a8ff 440 {
bogdanm 0:9b334a45a8ff 441 while(1)
bogdanm 0:9b334a45a8ff 442 {
bogdanm 0:9b334a45a8ff 443 }
bogdanm 0:9b334a45a8ff 444 }
bogdanm 0:9b334a45a8ff 445 __attribute__ ((section(".after_vectors")))
bogdanm 0:9b334a45a8ff 446 void BusFault_Handler(void)
bogdanm 0:9b334a45a8ff 447 {
bogdanm 0:9b334a45a8ff 448 while(1)
bogdanm 0:9b334a45a8ff 449 {
bogdanm 0:9b334a45a8ff 450 }
bogdanm 0:9b334a45a8ff 451 }
bogdanm 0:9b334a45a8ff 452 __attribute__ ((section(".after_vectors")))
bogdanm 0:9b334a45a8ff 453 void UsageFault_Handler(void)
bogdanm 0:9b334a45a8ff 454 {
bogdanm 0:9b334a45a8ff 455 while(1)
bogdanm 0:9b334a45a8ff 456 {
bogdanm 0:9b334a45a8ff 457 }
bogdanm 0:9b334a45a8ff 458 }
bogdanm 0:9b334a45a8ff 459 __attribute__ ((section(".after_vectors")))
bogdanm 0:9b334a45a8ff 460 void SVC_Handler(void)
bogdanm 0:9b334a45a8ff 461 {
bogdanm 0:9b334a45a8ff 462 while(1)
bogdanm 0:9b334a45a8ff 463 {
bogdanm 0:9b334a45a8ff 464 }
bogdanm 0:9b334a45a8ff 465 }
bogdanm 0:9b334a45a8ff 466 __attribute__ ((section(".after_vectors")))
bogdanm 0:9b334a45a8ff 467 void DebugMon_Handler(void)
bogdanm 0:9b334a45a8ff 468 {
bogdanm 0:9b334a45a8ff 469 while(1)
bogdanm 0:9b334a45a8ff 470 {
bogdanm 0:9b334a45a8ff 471 }
bogdanm 0:9b334a45a8ff 472 }
bogdanm 0:9b334a45a8ff 473 __attribute__ ((section(".after_vectors")))
bogdanm 0:9b334a45a8ff 474 void PendSV_Handler(void)
bogdanm 0:9b334a45a8ff 475 {
bogdanm 0:9b334a45a8ff 476 while(1)
bogdanm 0:9b334a45a8ff 477 {
bogdanm 0:9b334a45a8ff 478 }
bogdanm 0:9b334a45a8ff 479 }
bogdanm 0:9b334a45a8ff 480 __attribute__ ((section(".after_vectors")))
bogdanm 0:9b334a45a8ff 481 void SysTick_Handler(void)
bogdanm 0:9b334a45a8ff 482 {
bogdanm 0:9b334a45a8ff 483 while(1)
bogdanm 0:9b334a45a8ff 484 {
bogdanm 0:9b334a45a8ff 485 }
bogdanm 0:9b334a45a8ff 486 }
bogdanm 0:9b334a45a8ff 487
bogdanm 0:9b334a45a8ff 488 //*****************************************************************************
bogdanm 0:9b334a45a8ff 489 //
bogdanm 0:9b334a45a8ff 490 // Processor ends up here if an unexpected interrupt occurs or a specific
bogdanm 0:9b334a45a8ff 491 // handler is not present in the application code.
bogdanm 0:9b334a45a8ff 492 //
bogdanm 0:9b334a45a8ff 493 //*****************************************************************************
bogdanm 0:9b334a45a8ff 494 __attribute__ ((section(".after_vectors")))
bogdanm 0:9b334a45a8ff 495 void IntDefaultHandler(void)
bogdanm 0:9b334a45a8ff 496 {
bogdanm 0:9b334a45a8ff 497 while(1)
bogdanm 0:9b334a45a8ff 498 {
bogdanm 0:9b334a45a8ff 499 }
bogdanm 0:9b334a45a8ff 500 }