en 129 / mbed-dev

fix LPC812 PWM

Dependents:   IR_LED_Send

Fork of mbed-dev by mbed official

targets/cmsis/TARGET_STM/TARGET_STM32L4/stm32l4xx_hal_swpmi.h@129:2e517c56bcfb, 2016-05-16 (annotated)

Committer:
nameless129
Date:
Mon May 16 16:50:30 2016 +0000
Revision:
129:2e517c56bcfb
Parent:
0:9b334a45a8ff 
PWM Fix:Duty 0%??H???????????????

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /**
bogdanm 0:9b334a45a8ff 2 ******************************************************************************
bogdanm 0:9b334a45a8ff 3 * @file stm32l4xx_hal_swpmi.h
bogdanm 0:9b334a45a8ff 4 * @author MCD Application Team
bogdanm 0:9b334a45a8ff 5 * @version V1.0.0
bogdanm 0:9b334a45a8ff 6 * @date 26-June-2015
bogdanm 0:9b334a45a8ff 7 * @brief Header file of SWPMI HAL module.
bogdanm 0:9b334a45a8ff 8 ******************************************************************************
bogdanm 0:9b334a45a8ff 9 * @attention
bogdanm 0:9b334a45a8ff 10 *
bogdanm 0:9b334a45a8ff 11 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
bogdanm 0:9b334a45a8ff 12 *
bogdanm 0:9b334a45a8ff 13 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 0:9b334a45a8ff 14 * are permitted provided that the following conditions are met:
bogdanm 0:9b334a45a8ff 15 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 0:9b334a45a8ff 16 * this list of conditions and the following disclaimer.
bogdanm 0:9b334a45a8ff 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 0:9b334a45a8ff 18 * this list of conditions and the following disclaimer in the documentation
bogdanm 0:9b334a45a8ff 19 * and/or other materials provided with the distribution.
bogdanm 0:9b334a45a8ff 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 0:9b334a45a8ff 21 * may be used to endorse or promote products derived from this software
bogdanm 0:9b334a45a8ff 22 * without specific prior written permission.
bogdanm 0:9b334a45a8ff 23 *
bogdanm 0:9b334a45a8ff 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 0:9b334a45a8ff 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 0:9b334a45a8ff 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 0:9b334a45a8ff 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 0:9b334a45a8ff 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 0:9b334a45a8ff 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 0:9b334a45a8ff 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 0:9b334a45a8ff 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 0:9b334a45a8ff 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 0:9b334a45a8ff 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 0:9b334a45a8ff 34 *
bogdanm 0:9b334a45a8ff 35 ******************************************************************************
bogdanm 0:9b334a45a8ff 36 */
bogdanm 0:9b334a45a8ff 37
bogdanm 0:9b334a45a8ff 38 /* Define to prevent recursive inclusion -------------------------------------*/
bogdanm 0:9b334a45a8ff 39 #ifndef __STM32L4xx_HAL_SWPMI_H
bogdanm 0:9b334a45a8ff 40 #define __STM32L4xx_HAL_SWPMI_H
bogdanm 0:9b334a45a8ff 41
bogdanm 0:9b334a45a8ff 42 #ifdef __cplusplus
bogdanm 0:9b334a45a8ff 43 extern "C" {
bogdanm 0:9b334a45a8ff 44 #endif
bogdanm 0:9b334a45a8ff 45
bogdanm 0:9b334a45a8ff 46 /* Includes ------------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 47 #include "stm32l4xx_hal_def.h"
bogdanm 0:9b334a45a8ff 48
bogdanm 0:9b334a45a8ff 49 /** @addtogroup STM32L4xx_HAL_Driver
bogdanm 0:9b334a45a8ff 50 * @{
bogdanm 0:9b334a45a8ff 51 */
bogdanm 0:9b334a45a8ff 52
bogdanm 0:9b334a45a8ff 53 /** @addtogroup SWPMI
bogdanm 0:9b334a45a8ff 54 * @{
bogdanm 0:9b334a45a8ff 55 */
bogdanm 0:9b334a45a8ff 56
bogdanm 0:9b334a45a8ff 57 /* Exported types ------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 58 /** @defgroup SWPMI_Exported_Types SWPMI Exported Types
bogdanm 0:9b334a45a8ff 59 * @{
bogdanm 0:9b334a45a8ff 60 */
bogdanm 0:9b334a45a8ff 61
bogdanm 0:9b334a45a8ff 62 /**
bogdanm 0:9b334a45a8ff 63 * @brief SWPMI Init Structure definition
bogdanm 0:9b334a45a8ff 64 */
bogdanm 0:9b334a45a8ff 65 typedef struct
bogdanm 0:9b334a45a8ff 66 {
bogdanm 0:9b334a45a8ff 67 uint32_t VoltageClass; /*!< Specifies the SWP Voltage Class.
bogdanm 0:9b334a45a8ff 68 This parameter can be a value of @ref SWPMI_Voltage_Class */
bogdanm 0:9b334a45a8ff 69
bogdanm 0:9b334a45a8ff 70 uint32_t BitRate; /*!< Specifies the SWPMI Bitrate.
bogdanm 0:9b334a45a8ff 71 This parameter must be a number between 0 and 63.
bogdanm 0:9b334a45a8ff 72 The Bitrate is computed using the following formula:
bogdanm 0:9b334a45a8ff 73 SWPMI_freq = SWPMI_clk / (((BitRate) + 1) * 4)
bogdanm 0:9b334a45a8ff 74 */
bogdanm 0:9b334a45a8ff 75
bogdanm 0:9b334a45a8ff 76 uint32_t TxBufferingMode; /*!< Specifies the transmission buffering mode.
bogdanm 0:9b334a45a8ff 77 This parameter can be a value of @ref SWPMI_Tx_Buffering_Mode */
bogdanm 0:9b334a45a8ff 78
bogdanm 0:9b334a45a8ff 79 uint32_t RxBufferingMode; /*!< Specifies the reception buffering mode.
bogdanm 0:9b334a45a8ff 80 This parameter can be a value of @ref SWPMI_Rx_Buffering_Mode */
bogdanm 0:9b334a45a8ff 81
bogdanm 0:9b334a45a8ff 82 }SWPMI_InitTypeDef;
bogdanm 0:9b334a45a8ff 83
bogdanm 0:9b334a45a8ff 84
bogdanm 0:9b334a45a8ff 85 /**
bogdanm 0:9b334a45a8ff 86 * @brief HAL SWPMI State structures definition
bogdanm 0:9b334a45a8ff 87 */
bogdanm 0:9b334a45a8ff 88 typedef enum
bogdanm 0:9b334a45a8ff 89 {
bogdanm 0:9b334a45a8ff 90 HAL_SWPMI_STATE_RESET = 0x00, /*!< Peripheral Reset state */
bogdanm 0:9b334a45a8ff 91 HAL_SWPMI_STATE_READY = 0x01, /*!< Peripheral Initialized and ready for use */
bogdanm 0:9b334a45a8ff 92 HAL_SWPMI_STATE_BUSY = 0x02, /*!< an internal process is ongoing */
bogdanm 0:9b334a45a8ff 93 HAL_SWPMI_STATE_BUSY_TX = 0x12, /*!< Data Transmission process is ongoing */
bogdanm 0:9b334a45a8ff 94 HAL_SWPMI_STATE_BUSY_RX = 0x22, /*!< Data Reception process is ongoing */
bogdanm 0:9b334a45a8ff 95 HAL_SWPMI_STATE_BUSY_TX_RX = 0x32, /*!< Data Transmission and Reception process is ongoing */
bogdanm 0:9b334a45a8ff 96 HAL_SWPMI_STATE_TIMEOUT = 0x03, /*!< Timeout state */
bogdanm 0:9b334a45a8ff 97 HAL_SWPMI_STATE_ERROR = 0x04 /*!< Error */
bogdanm 0:9b334a45a8ff 98 }HAL_SWPMI_StateTypeDef;
bogdanm 0:9b334a45a8ff 99
bogdanm 0:9b334a45a8ff 100 /**
bogdanm 0:9b334a45a8ff 101 * @brief SWPMI handle Structure definition
bogdanm 0:9b334a45a8ff 102 */
bogdanm 0:9b334a45a8ff 103 typedef struct
bogdanm 0:9b334a45a8ff 104 {
bogdanm 0:9b334a45a8ff 105 SWPMI_TypeDef *Instance; /* SWPMI registers base address */
bogdanm 0:9b334a45a8ff 106
bogdanm 0:9b334a45a8ff 107 SWPMI_InitTypeDef Init; /* SWMPI communication parameters */
bogdanm 0:9b334a45a8ff 108
bogdanm 0:9b334a45a8ff 109 uint32_t *pTxBuffPtr; /* Pointer to SWPMI Tx transfer Buffer */
bogdanm 0:9b334a45a8ff 110
bogdanm 0:9b334a45a8ff 111 uint32_t TxXferSize; /* SWPMI Tx Transfer size */
bogdanm 0:9b334a45a8ff 112
bogdanm 0:9b334a45a8ff 113 uint32_t TxXferCount; /* SWPMI Tx Transfer Counter */
bogdanm 0:9b334a45a8ff 114
bogdanm 0:9b334a45a8ff 115 uint32_t *pRxBuffPtr; /* Pointer to SWPMI Rx transfer Buffer */
bogdanm 0:9b334a45a8ff 116
bogdanm 0:9b334a45a8ff 117 uint32_t RxXferSize; /* SWPMI Rx Transfer size */
bogdanm 0:9b334a45a8ff 118
bogdanm 0:9b334a45a8ff 119 uint32_t RxXferCount; /* SWPMI Rx Transfer Counter */
bogdanm 0:9b334a45a8ff 120
bogdanm 0:9b334a45a8ff 121 DMA_HandleTypeDef *hdmatx; /* SWPMI Tx DMA Handle parameters */
bogdanm 0:9b334a45a8ff 122
bogdanm 0:9b334a45a8ff 123 DMA_HandleTypeDef *hdmarx; /* SWPMI Rx DMA Handle parameters */
bogdanm 0:9b334a45a8ff 124
bogdanm 0:9b334a45a8ff 125 HAL_LockTypeDef Lock; /* SWPMI object */
bogdanm 0:9b334a45a8ff 126
bogdanm 0:9b334a45a8ff 127 __IO HAL_SWPMI_StateTypeDef State; /* SWPMI communication state */
bogdanm 0:9b334a45a8ff 128
bogdanm 0:9b334a45a8ff 129 __IO uint32_t ErrorCode; /* SWPMI Error code */
bogdanm 0:9b334a45a8ff 130
bogdanm 0:9b334a45a8ff 131 }SWPMI_HandleTypeDef;
bogdanm 0:9b334a45a8ff 132
bogdanm 0:9b334a45a8ff 133 /**
bogdanm 0:9b334a45a8ff 134 * @}
bogdanm 0:9b334a45a8ff 135 */
bogdanm 0:9b334a45a8ff 136
bogdanm 0:9b334a45a8ff 137 /* Exported constants --------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 138 /** @defgroup SWPMI_Exported_Constants SWPMI Exported Constants
bogdanm 0:9b334a45a8ff 139 * @{
bogdanm 0:9b334a45a8ff 140 */
bogdanm 0:9b334a45a8ff 141
bogdanm 0:9b334a45a8ff 142 /**
bogdanm 0:9b334a45a8ff 143 * @defgroup SWPMI_Error_Code SWPMI Error Code Bitmap
bogdanm 0:9b334a45a8ff 144 * @{
bogdanm 0:9b334a45a8ff 145 */
bogdanm 0:9b334a45a8ff 146 #define HAL_SWPMI_ERROR_NONE ((uint32_t)0x00000000) /*!< No error */
bogdanm 0:9b334a45a8ff 147 #define HAL_SWPMI_ERROR_CRC ((uint32_t)0x00000004) /*!< frame error */
bogdanm 0:9b334a45a8ff 148 #define HAL_SWPMI_ERROR_OVR ((uint32_t)0x00000008) /*!< Overrun error */
bogdanm 0:9b334a45a8ff 149 #define HAL_SWPMI_ERROR_UDR ((uint32_t)0x0000000C) /*!< Underrun error */
bogdanm 0:9b334a45a8ff 150 #define HAL_SWPMI_ERROR_DMA ((uint32_t)0x00000010) /*!< DMA transfer error */
bogdanm 0:9b334a45a8ff 151 /**
bogdanm 0:9b334a45a8ff 152 * @}
bogdanm 0:9b334a45a8ff 153 */
bogdanm 0:9b334a45a8ff 154
bogdanm 0:9b334a45a8ff 155 /** @defgroup SWPMI_Voltage_Class SWPMI Voltage Class
bogdanm 0:9b334a45a8ff 156 * @{
bogdanm 0:9b334a45a8ff 157 */
bogdanm 0:9b334a45a8ff 158 #define SWPMI_VOLTAGE_CLASS_C ((uint32_t)0x00000000)
bogdanm 0:9b334a45a8ff 159 #define SWPMI_VOLTAGE_CLASS_B SWPMI_OR_CLASS
bogdanm 0:9b334a45a8ff 160 /**
bogdanm 0:9b334a45a8ff 161 * @}
bogdanm 0:9b334a45a8ff 162 */
bogdanm 0:9b334a45a8ff 163
bogdanm 0:9b334a45a8ff 164 /** @defgroup SWPMI_Tx_Buffering_Mode SWPMI Tx Buffering Mode
bogdanm 0:9b334a45a8ff 165 * @{
bogdanm 0:9b334a45a8ff 166 */
bogdanm 0:9b334a45a8ff 167 #define SWPMI_TX_NO_SOFTWAREBUFFER ((uint32_t)0x00000000)
bogdanm 0:9b334a45a8ff 168 #define SWPMI_TX_SINGLE_SOFTWAREBUFFER ((uint32_t)0x00000000)
bogdanm 0:9b334a45a8ff 169 #define SWPMI_TX_MULTI_SOFTWAREBUFFER SWPMI_CR_TXMODE
bogdanm 0:9b334a45a8ff 170 /**
bogdanm 0:9b334a45a8ff 171 * @}
bogdanm 0:9b334a45a8ff 172 */
bogdanm 0:9b334a45a8ff 173
bogdanm 0:9b334a45a8ff 174 /** @defgroup SWPMI_Rx_Buffering_Mode SWPMI Rx Buffering Mode
bogdanm 0:9b334a45a8ff 175 * @{
bogdanm 0:9b334a45a8ff 176 */
bogdanm 0:9b334a45a8ff 177 #define SWPMI_RX_NO_SOFTWAREBUFFER ((uint32_t)0x00000000)
bogdanm 0:9b334a45a8ff 178 #define SWPMI_RX_SINGLE_SOFTWAREBUFFER ((uint32_t)0x00000000)
bogdanm 0:9b334a45a8ff 179 #define SWPMI_RX_MULTI_SOFTWAREBUFFER SWPMI_CR_RXMODE
bogdanm 0:9b334a45a8ff 180 /**
bogdanm 0:9b334a45a8ff 181 * @}
bogdanm 0:9b334a45a8ff 182 */
bogdanm 0:9b334a45a8ff 183
bogdanm 0:9b334a45a8ff 184 /** @defgroup SWPMI_Flags SWPMI Status Flags
bogdanm 0:9b334a45a8ff 185 * Elements values convention: 0xXXXXXXXX
bogdanm 0:9b334a45a8ff 186 * - 0xXXXXXXXX : Flag mask in the ISR register
bogdanm 0:9b334a45a8ff 187 * @{
bogdanm 0:9b334a45a8ff 188 */
bogdanm 0:9b334a45a8ff 189 #define SWPMI_FLAG_RXBFF SWPMI_ISR_RXBFF
bogdanm 0:9b334a45a8ff 190 #define SWPMI_FLAG_TXBEF SWPMI_ISR_TXBEF
bogdanm 0:9b334a45a8ff 191 #define SWPMI_FLAG_RXBERF SWPMI_ISR_RXBERF
bogdanm 0:9b334a45a8ff 192 #define SWPMI_FLAG_RXOVRF SWPMI_ISR_RXOVRF
bogdanm 0:9b334a45a8ff 193 #define SWPMI_FLAG_TXUNRF SWPMI_ISR_TXUNRF
bogdanm 0:9b334a45a8ff 194 #define SWPMI_FLAG_RXNE SWPMI_ISR_RXNE
bogdanm 0:9b334a45a8ff 195 #define SWPMI_FLAG_TXE SWPMI_ISR_TXE
bogdanm 0:9b334a45a8ff 196 #define SWPMI_FLAG_TCF SWPMI_ISR_TCF
bogdanm 0:9b334a45a8ff 197 #define SWPMI_FLAG_SRF SWPMI_ISR_SRF
bogdanm 0:9b334a45a8ff 198 #define SWPMI_FLAG_SUSP SWPMI_ISR_SUSP
bogdanm 0:9b334a45a8ff 199 #define SWPMI_FLAG_DEACTF SWPMI_ISR_DEACTF
bogdanm 0:9b334a45a8ff 200 /**
bogdanm 0:9b334a45a8ff 201 * @}
bogdanm 0:9b334a45a8ff 202 */
bogdanm 0:9b334a45a8ff 203
bogdanm 0:9b334a45a8ff 204 /** @defgroup SWPMI_Interrupt_definition SWPMI Interrupts Definition
bogdanm 0:9b334a45a8ff 205 * Elements values convention: 0xXXXX
bogdanm 0:9b334a45a8ff 206 * - 0xXXXX : Flag mask in the IER register
bogdanm 0:9b334a45a8ff 207 * @{
bogdanm 0:9b334a45a8ff 208 */
bogdanm 0:9b334a45a8ff 209 #define SWPMI_IT_SRIE SWPMI_IER_SRIE
bogdanm 0:9b334a45a8ff 210 #define SWPMI_IT_TCIE SWPMI_IER_TCIE
bogdanm 0:9b334a45a8ff 211 #define SWPMI_IT_TIE SWPMI_IER_TIE
bogdanm 0:9b334a45a8ff 212 #define SWPMI_IT_RIE SWPMI_IER_RIE
bogdanm 0:9b334a45a8ff 213 #define SWPMI_IT_TXUNRIE SWPMI_IER_TXUNRIE
bogdanm 0:9b334a45a8ff 214 #define SWPMI_IT_RXOVRIE SWPMI_IER_RXOVRIE
bogdanm 0:9b334a45a8ff 215 #define SWPMI_IT_RXBERIE SWPMI_IER_RXBERIE
bogdanm 0:9b334a45a8ff 216 #define SWPMI_IT_TXBEIE SWPMI_IER_TXBEIE
bogdanm 0:9b334a45a8ff 217 #define SWPMI_IT_RXBFIE SWPMI_IER_RXBFIE
bogdanm 0:9b334a45a8ff 218 /**
bogdanm 0:9b334a45a8ff 219 * @}
bogdanm 0:9b334a45a8ff 220 */
bogdanm 0:9b334a45a8ff 221
bogdanm 0:9b334a45a8ff 222 /**
bogdanm 0:9b334a45a8ff 223 * @}
bogdanm 0:9b334a45a8ff 224 */
bogdanm 0:9b334a45a8ff 225
bogdanm 0:9b334a45a8ff 226 /* Exported macros -----------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 227 /** @defgroup SWPMI_Exported_Macros SWPMI Exported Macros
bogdanm 0:9b334a45a8ff 228 * @{
bogdanm 0:9b334a45a8ff 229 */
bogdanm 0:9b334a45a8ff 230
bogdanm 0:9b334a45a8ff 231 /** @brief Reset SWPMI handle state.
bogdanm 0:9b334a45a8ff 232 * @param __HANDLE__: specifies the SWPMI Handle.
bogdanm 0:9b334a45a8ff 233 * @retval None
bogdanm 0:9b334a45a8ff 234 */
bogdanm 0:9b334a45a8ff 235 #define __HAL_SWPMI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SWPMI_STATE_RESET)
bogdanm 0:9b334a45a8ff 236
bogdanm 0:9b334a45a8ff 237 /**
bogdanm 0:9b334a45a8ff 238 * @brief Enable the SWPMI peripheral.
bogdanm 0:9b334a45a8ff 239 * @param __HANDLE__: SWPMI handle
bogdanm 0:9b334a45a8ff 240 * @retval None
bogdanm 0:9b334a45a8ff 241 */
bogdanm 0:9b334a45a8ff 242 #define __HAL_SWPMI_ENABLE(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CR, SWPMI_CR_SWPACT)
bogdanm 0:9b334a45a8ff 243
bogdanm 0:9b334a45a8ff 244 /**
bogdanm 0:9b334a45a8ff 245 * @brief Disable the SWPMI peripheral.
bogdanm 0:9b334a45a8ff 246 * @param __HANDLE__: SWPMI handle
bogdanm 0:9b334a45a8ff 247 * @retval None
bogdanm 0:9b334a45a8ff 248 */
bogdanm 0:9b334a45a8ff 249 #define __HAL_SWPMI_DISABLE(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CR, SWPMI_CR_SWPACT)
bogdanm 0:9b334a45a8ff 250
bogdanm 0:9b334a45a8ff 251 /** @brief Check whether the specified SWPMI flag is set or not.
bogdanm 0:9b334a45a8ff 252 * @param __HANDLE__: specifies the SWPMI Handle.
bogdanm 0:9b334a45a8ff 253 * @param __FLAG__: specifies the flag to check.
bogdanm 0:9b334a45a8ff 254 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 255 * @arg SWPMI_FLAG_RXBFF : Receive buffer full flag.
bogdanm 0:9b334a45a8ff 256 * @arg SWPMI_FLAG_TXBEF : Transmit buffer empty flag.
bogdanm 0:9b334a45a8ff 257 * @arg SWPMI_FLAG_RXBERF : Receive CRC error flag.
bogdanm 0:9b334a45a8ff 258 * @arg SWPMI_FLAG_RXOVRF : Receive overrun error flag.
bogdanm 0:9b334a45a8ff 259 * @arg SWPMI_FLAG_TXUNRF : Transmit underrun error flag.
bogdanm 0:9b334a45a8ff 260 * @arg SWPMI_FLAG_RXNE : Receive data register not empty.
bogdanm 0:9b334a45a8ff 261 * @arg SWPMI_FLAG_TXE : Transmit data register empty.
bogdanm 0:9b334a45a8ff 262 * @arg SWPMI_FLAG_TCF : Transfer complete flag.
bogdanm 0:9b334a45a8ff 263 * @arg SWPMI_FLAG_SRF : Slave resume flag.
bogdanm 0:9b334a45a8ff 264 * @arg SWPMI_FLAG_SUSP : SUSPEND flag.
bogdanm 0:9b334a45a8ff 265 * @arg SWPMI_FLAG_DEACTF : DEACTIVATED flag.
bogdanm 0:9b334a45a8ff 266 * @retval The new state of __FLAG__ (TRUE or FALSE).
bogdanm 0:9b334a45a8ff 267 */
bogdanm 0:9b334a45a8ff 268 #define __HAL_SWPMI_GET_FLAG(__HANDLE__, __FLAG__) (READ_BIT((__HANDLE__)->Instance->ISR, (__FLAG__)) == (__FLAG__))
bogdanm 0:9b334a45a8ff 269
bogdanm 0:9b334a45a8ff 270 /** @brief Clear the specified SWPMI ISR flag.
bogdanm 0:9b334a45a8ff 271 * @param __HANDLE__: specifies the SWPMI Handle.
bogdanm 0:9b334a45a8ff 272 * @param __FLAG__: specifies the flag to clear.
bogdanm 0:9b334a45a8ff 273 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 274 * @arg SWPMI_FLAG_RXBFF : Receive buffer full flag.
bogdanm 0:9b334a45a8ff 275 * @arg SWPMI_FLAG_TXBEF : Transmit buffer empty flag.
bogdanm 0:9b334a45a8ff 276 * @arg SWPMI_FLAG_RXBERF : Receive CRC error flag.
bogdanm 0:9b334a45a8ff 277 * @arg SWPMI_FLAG_RXOVRF : Receive overrun error flag.
bogdanm 0:9b334a45a8ff 278 * @arg SWPMI_FLAG_TXUNRF : Transmit underrun error flag.
bogdanm 0:9b334a45a8ff 279 * @arg SWPMI_FLAG_TCF : Transfer complete flag.
bogdanm 0:9b334a45a8ff 280 * @arg SWPMI_FLAG_SRF : Slave resume flag.
bogdanm 0:9b334a45a8ff 281 * @retval None
bogdanm 0:9b334a45a8ff 282 */
bogdanm 0:9b334a45a8ff 283 #define __HAL_SWPMI_CLEAR_FLAG(__HANDLE__, __FLAG__) WRITE_REG((__HANDLE__)->Instance->ICR, (__FLAG__))
bogdanm 0:9b334a45a8ff 284
bogdanm 0:9b334a45a8ff 285 /** @brief Enable the specified SWPMI interrupt.
bogdanm 0:9b334a45a8ff 286 * @param __HANDLE__: specifies the SWPMI Handle.
bogdanm 0:9b334a45a8ff 287 * @param __INTERRUPT__: specifies the SWPMI interrupt source to enable.
bogdanm 0:9b334a45a8ff 288 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 289 * @arg SWPMI_IT_SRIE : Slave resume interrupt.
bogdanm 0:9b334a45a8ff 290 * @arg SWPMI_IT_TCIE : Transmit complete interrupt.
bogdanm 0:9b334a45a8ff 291 * @arg SWPMI_IT_TIE : Transmit interrupt.
bogdanm 0:9b334a45a8ff 292 * @arg SWPMI_IT_RIE : Receive interrupt.
bogdanm 0:9b334a45a8ff 293 * @arg SWPMI_IT_TXUNRIE : Transmit underrun error interrupt.
bogdanm 0:9b334a45a8ff 294 * @arg SWPMI_IT_RXOVRIE : Receive overrun error interrupt.
bogdanm 0:9b334a45a8ff 295 * @arg SWPMI_IT_RXBEIE : Receive CRC error interrupt.
bogdanm 0:9b334a45a8ff 296 * @arg SWPMI_IT_TXBEIE : Transmit buffer empty interrupt.
bogdanm 0:9b334a45a8ff 297 * @arg SWPMI_IT_RXBFIE : Receive buffer full interrupt.
bogdanm 0:9b334a45a8ff 298 * @retval None
bogdanm 0:9b334a45a8ff 299 */
bogdanm 0:9b334a45a8ff 300 #define __HAL_SWPMI_ENABLE_IT(__HANDLE__, __INTERRUPT__) SET_BIT((__HANDLE__)->Instance->IER, (__INTERRUPT__))
bogdanm 0:9b334a45a8ff 301
bogdanm 0:9b334a45a8ff 302 /** @brief Disable the specified SWPMI interrupt.
bogdanm 0:9b334a45a8ff 303 * @param __HANDLE__: specifies the SWPMI Handle.
bogdanm 0:9b334a45a8ff 304 * @param __INTERRUPT__: specifies the SWPMI interrupt source to disable.
bogdanm 0:9b334a45a8ff 305 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 306 * @arg SWPMI_IT_SRIE : Slave resume interrupt.
bogdanm 0:9b334a45a8ff 307 * @arg SWPMI_IT_TCIE : Transmit complete interrupt.
bogdanm 0:9b334a45a8ff 308 * @arg SWPMI_IT_TIE : Transmit interrupt.
bogdanm 0:9b334a45a8ff 309 * @arg SWPMI_IT_RIE : Receive interrupt.
bogdanm 0:9b334a45a8ff 310 * @arg SWPMI_IT_TXUNRIE : Transmit underrun error interrupt.
bogdanm 0:9b334a45a8ff 311 * @arg SWPMI_IT_RXOVRIE : Receive overrun error interrupt.
bogdanm 0:9b334a45a8ff 312 * @arg SWPMI_IT_RXBEIE : Receive CRC error interrupt.
bogdanm 0:9b334a45a8ff 313 * @arg SWPMI_IT_TXBEIE : Transmit buffer empty interrupt.
bogdanm 0:9b334a45a8ff 314 * @arg SWPMI_IT_RXBFIE : Receive buffer full interrupt.
bogdanm 0:9b334a45a8ff 315 * @retval None
bogdanm 0:9b334a45a8ff 316 */
bogdanm 0:9b334a45a8ff 317 #define __HAL_SWPMI_DISABLE_IT(__HANDLE__, __INTERRUPT__) CLEAR_BIT((__HANDLE__)->Instance->IER, (__INTERRUPT__))
bogdanm 0:9b334a45a8ff 318
bogdanm 0:9b334a45a8ff 319 /** @brief Check whether the specified SWPMI interrupt has occurred or not.
bogdanm 0:9b334a45a8ff 320 * @param __HANDLE__: specifies the SWPMI Handle.
bogdanm 0:9b334a45a8ff 321 * @param __IT__: specifies the SWPMI interrupt to check.
bogdanm 0:9b334a45a8ff 322 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 323 * @arg SWPMI_IT_SRIE : Slave resume interrupt.
bogdanm 0:9b334a45a8ff 324 * @arg SWPMI_IT_TCIE : Transmit complete interrupt.
bogdanm 0:9b334a45a8ff 325 * @arg SWPMI_IT_TIE : Transmit interrupt.
bogdanm 0:9b334a45a8ff 326 * @arg SWPMI_IT_RIE : Receive interrupt.
bogdanm 0:9b334a45a8ff 327 * @arg SWPMI_IT_TXUNRIE : Transmit underrun error interrupt.
bogdanm 0:9b334a45a8ff 328 * @arg SWPMI_IT_RXOVRIE : Receive overrun error interrupt.
bogdanm 0:9b334a45a8ff 329 * @arg SWPMI_IT_RXBERIE : Receive CRC error interrupt.
bogdanm 0:9b334a45a8ff 330 * @arg SWPMI_IT_TXBEIE : Transmit buffer empty interrupt.
bogdanm 0:9b334a45a8ff 331 * @arg SWPMI_IT_RXBFIE : Receive buffer full interrupt.
bogdanm 0:9b334a45a8ff 332 * @retval The new state of __IT__ (TRUE or FALSE).
bogdanm 0:9b334a45a8ff 333 */
bogdanm 0:9b334a45a8ff 334 #define __HAL_SWPMI_GET_IT(__HANDLE__, __IT__) (READ_BIT((__HANDLE__)->Instance->ISR,(__IT__)) == (__IT__))
bogdanm 0:9b334a45a8ff 335
bogdanm 0:9b334a45a8ff 336 /** @brief Check whether the specified SWPMI interrupt source is enabled or not.
bogdanm 0:9b334a45a8ff 337 * @param __HANDLE__: specifies the SWPMI Handle.
bogdanm 0:9b334a45a8ff 338 * @param __IT__: specifies the SWPMI interrupt source to check.
bogdanm 0:9b334a45a8ff 339 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 340 * @arg SWPMI_IT_SRIE : Slave resume interrupt.
bogdanm 0:9b334a45a8ff 341 * @arg SWPMI_IT_TCIE : Transmit complete interrupt.
bogdanm 0:9b334a45a8ff 342 * @arg SWPMI_IT_TIE : Transmit interrupt.
bogdanm 0:9b334a45a8ff 343 * @arg SWPMI_IT_RIE : Receive interrupt.
bogdanm 0:9b334a45a8ff 344 * @arg SWPMI_IT_TXUNRIE : Transmit underrun error interrupt.
bogdanm 0:9b334a45a8ff 345 * @arg SWPMI_IT_RXOVRIE : Receive overrun error interrupt.
bogdanm 0:9b334a45a8ff 346 * @arg SWPMI_IT_RXBERIE : Receive CRC error interrupt.
bogdanm 0:9b334a45a8ff 347 * @arg SWPMI_IT_TXBEIE : Transmit buffer empty interrupt.
bogdanm 0:9b334a45a8ff 348 * @arg SWPMI_IT_RXBFIE : Receive buffer full interrupt.
bogdanm 0:9b334a45a8ff 349 * @retval The new state of __IT__ (TRUE or FALSE).
bogdanm 0:9b334a45a8ff 350 */
bogdanm 0:9b334a45a8ff 351 #define __HAL_SWPMI_GET_IT_SOURCE(__HANDLE__, __IT__) ((READ_BIT((__HANDLE__)->Instance->IER, (__IT__)) == (__IT__)) ? SET : RESET)
bogdanm 0:9b334a45a8ff 352
bogdanm 0:9b334a45a8ff 353 /**
bogdanm 0:9b334a45a8ff 354 * @}
bogdanm 0:9b334a45a8ff 355 */
bogdanm 0:9b334a45a8ff 356
bogdanm 0:9b334a45a8ff 357 /* Exported functions --------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 358 /** @defgroup SWPMI_Exported_Functions SWPMI Exported Functions
bogdanm 0:9b334a45a8ff 359 * @{
bogdanm 0:9b334a45a8ff 360 */
bogdanm 0:9b334a45a8ff 361 /* Initialization/de-initialization functions ********************************/
bogdanm 0:9b334a45a8ff 362 HAL_StatusTypeDef HAL_SWPMI_Init(SWPMI_HandleTypeDef *hswpmi);
bogdanm 0:9b334a45a8ff 363 HAL_StatusTypeDef HAL_SWPMI_DeInit(SWPMI_HandleTypeDef *hswpmi);
bogdanm 0:9b334a45a8ff 364 void HAL_SWPMI_MspInit(SWPMI_HandleTypeDef *hswpmi);
bogdanm 0:9b334a45a8ff 365 void HAL_SWPMI_MspDeInit(SWPMI_HandleTypeDef *hswpmi);
bogdanm 0:9b334a45a8ff 366
bogdanm 0:9b334a45a8ff 367 /* IO operation functions *****************************************************/
bogdanm 0:9b334a45a8ff 368 HAL_StatusTypeDef HAL_SWPMI_Transmit(SWPMI_HandleTypeDef *hswpmi, uint32_t *pData, uint16_t Size, uint32_t Timeout);
bogdanm 0:9b334a45a8ff 369 HAL_StatusTypeDef HAL_SWPMI_Receive(SWPMI_HandleTypeDef *hswpmi, uint32_t *pData, uint16_t Size, uint32_t Timeout);
bogdanm 0:9b334a45a8ff 370 HAL_StatusTypeDef HAL_SWPMI_Transmit_IT(SWPMI_HandleTypeDef *hswpmi, uint32_t *pData, uint16_t Size);
bogdanm 0:9b334a45a8ff 371 HAL_StatusTypeDef HAL_SWPMI_Receive_IT(SWPMI_HandleTypeDef *hswpmi, uint32_t *pData, uint16_t Size);
bogdanm 0:9b334a45a8ff 372 HAL_StatusTypeDef HAL_SWPMI_Transmit_DMA(SWPMI_HandleTypeDef *hswpmi, uint32_t *pData, uint16_t Size);
bogdanm 0:9b334a45a8ff 373 HAL_StatusTypeDef HAL_SWPMI_Receive_DMA(SWPMI_HandleTypeDef *hswpmi, uint32_t *pData, uint16_t Size);
bogdanm 0:9b334a45a8ff 374 HAL_StatusTypeDef HAL_SWPMI_DMAStop(SWPMI_HandleTypeDef *hswpmi);
bogdanm 0:9b334a45a8ff 375 HAL_StatusTypeDef HAL_SWPMI_EnableLoopback(SWPMI_HandleTypeDef *hswpmi);
bogdanm 0:9b334a45a8ff 376 HAL_StatusTypeDef HAL_SWPMI_DisableLoopback(SWPMI_HandleTypeDef *hswpmi);
bogdanm 0:9b334a45a8ff 377 void HAL_SWPMI_IRQHandler(SWPMI_HandleTypeDef *hswpmi);
bogdanm 0:9b334a45a8ff 378 void HAL_SWPMI_TxCpltCallback(SWPMI_HandleTypeDef *hswpmi);
bogdanm 0:9b334a45a8ff 379 void HAL_SWPMI_TxHalfCpltCallback(SWPMI_HandleTypeDef *hswpmi);
bogdanm 0:9b334a45a8ff 380 void HAL_SWPMI_RxCpltCallback(SWPMI_HandleTypeDef *hswpmi);
bogdanm 0:9b334a45a8ff 381 void HAL_SWPMI_RxHalfCpltCallback(SWPMI_HandleTypeDef *hswpmi);
bogdanm 0:9b334a45a8ff 382 void HAL_SWPMI_ErrorCallback(SWPMI_HandleTypeDef *hswpmi);
bogdanm 0:9b334a45a8ff 383
bogdanm 0:9b334a45a8ff 384 /* Peripheral Control and State functions ************************************/
bogdanm 0:9b334a45a8ff 385 HAL_SWPMI_StateTypeDef HAL_SWPMI_GetState(SWPMI_HandleTypeDef *hswpmi);
bogdanm 0:9b334a45a8ff 386 uint32_t HAL_SWPMI_GetError(SWPMI_HandleTypeDef *hswpmi);
bogdanm 0:9b334a45a8ff 387
bogdanm 0:9b334a45a8ff 388 /**
bogdanm 0:9b334a45a8ff 389 * @}
bogdanm 0:9b334a45a8ff 390 */
bogdanm 0:9b334a45a8ff 391
bogdanm 0:9b334a45a8ff 392 /* Private types -------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 393 /** @defgroup SWPMI_Private_Types SWPMI Private Types
bogdanm 0:9b334a45a8ff 394 * @{
bogdanm 0:9b334a45a8ff 395 */
bogdanm 0:9b334a45a8ff 396
bogdanm 0:9b334a45a8ff 397 /**
bogdanm 0:9b334a45a8ff 398 * @}
bogdanm 0:9b334a45a8ff 399 */
bogdanm 0:9b334a45a8ff 400
bogdanm 0:9b334a45a8ff 401 /* Private variables ---------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 402 /** @defgroup SWPMI_Private_Variables SWPMI Private Variables
bogdanm 0:9b334a45a8ff 403 * @{
bogdanm 0:9b334a45a8ff 404 */
bogdanm 0:9b334a45a8ff 405
bogdanm 0:9b334a45a8ff 406 /**
bogdanm 0:9b334a45a8ff 407 * @}
bogdanm 0:9b334a45a8ff 408 */
bogdanm 0:9b334a45a8ff 409
bogdanm 0:9b334a45a8ff 410 /* Private constants ---------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 411 /** @defgroup SWPMI_Private_Constants SWPMI Private Constants
bogdanm 0:9b334a45a8ff 412 * @{
bogdanm 0:9b334a45a8ff 413 */
bogdanm 0:9b334a45a8ff 414
bogdanm 0:9b334a45a8ff 415 /**
bogdanm 0:9b334a45a8ff 416 * @}
bogdanm 0:9b334a45a8ff 417 */
bogdanm 0:9b334a45a8ff 418
bogdanm 0:9b334a45a8ff 419 /* Private macros ------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 420 /** @defgroup SWPMI_Private_Macros SWPMI Private Macros
bogdanm 0:9b334a45a8ff 421 * @{
bogdanm 0:9b334a45a8ff 422 */
bogdanm 0:9b334a45a8ff 423
bogdanm 0:9b334a45a8ff 424
bogdanm 0:9b334a45a8ff 425 #define IS_SWPMI_VOLTAGE_CLASS(__CLASS__) (((__CLASS__) == SWPMI_VOLTAGE_CLASS_C) || \
bogdanm 0:9b334a45a8ff 426 ((__CLASS__) == SWPMI_VOLTAGE_CLASS_B))
bogdanm 0:9b334a45a8ff 427
bogdanm 0:9b334a45a8ff 428 #define IS_SWPMI_BITRATE_VALUE(__VALUE__) (((__VALUE__) <= 63))
bogdanm 0:9b334a45a8ff 429
bogdanm 0:9b334a45a8ff 430
bogdanm 0:9b334a45a8ff 431 #define IS_SWPMI_TX_BUFFERING_MODE(__MODE__) (((__MODE__) == SWPMI_TX_NO_SOFTWAREBUFFER) || \
bogdanm 0:9b334a45a8ff 432 ((__MODE__) == SWPMI_TX_MULTI_SOFTWAREBUFFER))
bogdanm 0:9b334a45a8ff 433
bogdanm 0:9b334a45a8ff 434
bogdanm 0:9b334a45a8ff 435 #define IS_SWPMI_RX_BUFFERING_MODE(__MODE__) (((__MODE__) == SWPMI_RX_NO_SOFTWAREBUFFER) || \
bogdanm 0:9b334a45a8ff 436 ((__MODE__) == SWPMI_RX_MULTI_SOFTWAREBUFFER))
bogdanm 0:9b334a45a8ff 437
bogdanm 0:9b334a45a8ff 438 /**
bogdanm 0:9b334a45a8ff 439 * @}
bogdanm 0:9b334a45a8ff 440 */
bogdanm 0:9b334a45a8ff 441
bogdanm 0:9b334a45a8ff 442 /**
bogdanm 0:9b334a45a8ff 443 * @}
bogdanm 0:9b334a45a8ff 444 */
bogdanm 0:9b334a45a8ff 445
bogdanm 0:9b334a45a8ff 446 /**
bogdanm 0:9b334a45a8ff 447 * @}
bogdanm 0:9b334a45a8ff 448 */
bogdanm 0:9b334a45a8ff 449
bogdanm 0:9b334a45a8ff 450 #ifdef __cplusplus
bogdanm 0:9b334a45a8ff 451 }
bogdanm 0:9b334a45a8ff 452 #endif
bogdanm 0:9b334a45a8ff 453
bogdanm 0:9b334a45a8ff 454 #endif /* __STM32L4xx_HAL_SWPMI_H */
bogdanm 0:9b334a45a8ff 455
bogdanm 0:9b334a45a8ff 456 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/