mbed-dev - fix LPC812 PWM

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fix LPC812 PWM

targets/cmsis/TARGET_STM/TARGET_STM32L4/stm32l4xx_hal_lptim.c@129:2e517c56bcfb, 2016-05-16 (annotated)

Committer:: nameless129
Date:: Mon May 16 16:50:30 2016 +0000
Revision:: 129:2e517c56bcfb
Parent:: 0:9b334a45a8ff

PWM Fix:Duty 0%??H???????????????

Who changed what in which revision?

User	Revision	Line number	New contents of line
bogdanm	0:9b334a45a8ff	1	/**
bogdanm	0:9b334a45a8ff	2	******************************************************************************
bogdanm	0:9b334a45a8ff	3	* @file stm32l4xx_hal_lptim.c
bogdanm	0:9b334a45a8ff	4	* @author MCD Application Team
bogdanm	0:9b334a45a8ff	5	* @version V1.0.0
bogdanm	0:9b334a45a8ff	6	* @date 26-June-2015
bogdanm	0:9b334a45a8ff	7	* @brief LPTIM HAL module driver.
bogdanm	0:9b334a45a8ff	8	* This file provides firmware functions to manage the following
bogdanm	0:9b334a45a8ff	9	* functionalities of the Low Power Timer (LPTIM) peripheral:
bogdanm	0:9b334a45a8ff	10	* + Initialization and de-initialization functions.
bogdanm	0:9b334a45a8ff	11	* + Start/Stop operation functions in polling mode.
bogdanm	0:9b334a45a8ff	12	* + Start/Stop operation functions in interrupt mode.
bogdanm	0:9b334a45a8ff	13	* + Reading operation functions.
bogdanm	0:9b334a45a8ff	14	* + Peripheral State functions.
bogdanm	0:9b334a45a8ff	15	*
bogdanm	0:9b334a45a8ff	16	@verbatim
bogdanm	0:9b334a45a8ff	17	==============================================================================
bogdanm	0:9b334a45a8ff	18	##### How to use this driver #####
bogdanm	0:9b334a45a8ff	19	==============================================================================
bogdanm	0:9b334a45a8ff	20	[..]
bogdanm	0:9b334a45a8ff	21	The LPTIM HAL driver can be used as follows:
bogdanm	0:9b334a45a8ff	22
bogdanm	0:9b334a45a8ff	23	(#)Initialize the LPTIM low level resources by implementing the
bogdanm	0:9b334a45a8ff	24	HAL_LPTIM_MspInit():
bogdanm	0:9b334a45a8ff	25	(++) Enable the LPTIM interface clock using __HAL_RCC_LPTIMx_CLK_ENABLE().
bogdanm	0:9b334a45a8ff	26	(++) In case of using interrupts (e.g. HAL_LPTIM_PWM_Start_IT()):
bogdanm	0:9b334a45a8ff	27	(+++) Configure the LPTIM interrupt priority using HAL_NVIC_SetPriority().
bogdanm	0:9b334a45a8ff	28	(+++) Enable the LPTIM IRQ handler using HAL_NVIC_EnableIRQ().
bogdanm	0:9b334a45a8ff	29	(+++) In LPTIM IRQ handler, call HAL_LPTIM_IRQHandler().
bogdanm	0:9b334a45a8ff	30
bogdanm	0:9b334a45a8ff	31	(#)Initialize the LPTIM HAL using HAL_LPTIM_Init(). This function
bogdanm	0:9b334a45a8ff	32	configures mainly:
bogdanm	0:9b334a45a8ff	33	(++) The instance: LPTIM1 or LPTIM2.
bogdanm	0:9b334a45a8ff	34	(++) Clock: the counter clock.
bogdanm	0:9b334a45a8ff	35	(+++) Source : it can be either the ULPTIM input (IN1) or one of
bogdanm	0:9b334a45a8ff	36	the internal clock; (APB, LSE, LSI or MSI).
bogdanm	0:9b334a45a8ff	37	(+++) Prescaler: select the clock divider.
bogdanm	0:9b334a45a8ff	38	(++) UltraLowPowerClock : To be used only if the ULPTIM is selected
bogdanm	0:9b334a45a8ff	39	as counter clock source.
bogdanm	0:9b334a45a8ff	40	(+++) Polarity: polarity of the active edge for the counter unit
bogdanm	0:9b334a45a8ff	41	if the ULPTIM input is selected.
bogdanm	0:9b334a45a8ff	42	(+++) SampleTime: clock sampling time to configure the clock glitch
bogdanm	0:9b334a45a8ff	43	filter.
bogdanm	0:9b334a45a8ff	44	(++) Trigger: How the counter start.
bogdanm	0:9b334a45a8ff	45	(+++) Source: trigger can be software or one of the hardware triggers.
bogdanm	0:9b334a45a8ff	46	(+++) ActiveEdge : only for hardware trigger.
bogdanm	0:9b334a45a8ff	47	(+++) SampleTime : trigger sampling time to configure the trigger
bogdanm	0:9b334a45a8ff	48	glitch filter.
bogdanm	0:9b334a45a8ff	49	(++) OutputPolarity : 2 opposite polarities are possible.
bogdanm	0:9b334a45a8ff	50	(++) UpdateMode: specifies whether the update of the autoreload and
bogdanm	0:9b334a45a8ff	51	the compare values is done immediately or after the end of current
bogdanm	0:9b334a45a8ff	52	period.
bogdanm	0:9b334a45a8ff	53	(++) Input1Source: Source selected for input1 (GPIO or comparator output).
bogdanm	0:9b334a45a8ff	54	(++) Input2Source: Source selected for input2 (GPIO or comparator output).
bogdanm	0:9b334a45a8ff	55	Input2 is used only for encoder feature so is used only for LPTIM1 instance.
bogdanm	0:9b334a45a8ff	56
bogdanm	0:9b334a45a8ff	57	(#)Six modes are available:
bogdanm	0:9b334a45a8ff	58
bogdanm	0:9b334a45a8ff	59	(++) PWM Mode: To generate a PWM signal with specified period and pulse,
bogdanm	0:9b334a45a8ff	60	call HAL_LPTIM_PWM_Start() or HAL_LPTIM_PWM_Start_IT() for interruption
bogdanm	0:9b334a45a8ff	61	mode.
bogdanm	0:9b334a45a8ff	62
bogdanm	0:9b334a45a8ff	63	(++) One Pulse Mode: To generate pulse with specified width in response
bogdanm	0:9b334a45a8ff	64	to a stimulus, call HAL_LPTIM_OnePulse_Start() or
bogdanm	0:9b334a45a8ff	65	HAL_LPTIM_OnePulse_Start_IT() for interruption mode.
bogdanm	0:9b334a45a8ff	66
bogdanm	0:9b334a45a8ff	67	(++) Set once Mode: In this mode, the output changes the level (from
bogdanm	0:9b334a45a8ff	68	low level to high level if the output polarity is configured high, else
bogdanm	0:9b334a45a8ff	69	the opposite) when a compare match occurs. To start this mode, call
bogdanm	0:9b334a45a8ff	70	HAL_LPTIM_SetOnce_Start() or HAL_LPTIM_SetOnce_Start_IT() for
bogdanm	0:9b334a45a8ff	71	interruption mode.
bogdanm	0:9b334a45a8ff	72
bogdanm	0:9b334a45a8ff	73	(++) Encoder Mode: To use the encoder interface call
bogdanm	0:9b334a45a8ff	74	HAL_LPTIM_Encoder_Start() or HAL_LPTIM_Encoder_Start_IT() for
bogdanm	0:9b334a45a8ff	75	interruption mode. Only available for LPTIM1 instance.
bogdanm	0:9b334a45a8ff	76
bogdanm	0:9b334a45a8ff	77	(++) Time out Mode: an active edge on one selected trigger input rests
bogdanm	0:9b334a45a8ff	78	the counter. The first trigger event will start the timer, any
bogdanm	0:9b334a45a8ff	79	successive trigger event will reset the counter and the timer will
bogdanm	0:9b334a45a8ff	80	restart. To start this mode call HAL_LPTIM_TimeOut_Start_IT() or
bogdanm	0:9b334a45a8ff	81	HAL_LPTIM_TimeOut_Start_IT() for interruption mode.
bogdanm	0:9b334a45a8ff	82
bogdanm	0:9b334a45a8ff	83	(++) Counter Mode: counter can be used to count external events on
bogdanm	0:9b334a45a8ff	84	the LPTIM Input1 or it can be used to count internal clock cycles.
bogdanm	0:9b334a45a8ff	85	To start this mode, call HAL_LPTIM_Counter_Start() or
bogdanm	0:9b334a45a8ff	86	HAL_LPTIM_Counter_Start_IT() for interruption mode.
bogdanm	0:9b334a45a8ff	87
bogdanm	0:9b334a45a8ff	88
bogdanm	0:9b334a45a8ff	89	(#) User can stop any process by calling the corresponding API:
bogdanm	0:9b334a45a8ff	90	HAL_LPTIM_Xxx_Stop() or HAL_LPTIM_Xxx_Stop_IT() if the process is
bogdanm	0:9b334a45a8ff	91	already started in interruption mode.
bogdanm	0:9b334a45a8ff	92
bogdanm	0:9b334a45a8ff	93	(#) De-initialize the LPTIM peripheral using HAL_LPTIM_DeInit().
bogdanm	0:9b334a45a8ff	94
bogdanm	0:9b334a45a8ff	95	@endverbatim
bogdanm	0:9b334a45a8ff	96	******************************************************************************
bogdanm	0:9b334a45a8ff	97	* @attention
bogdanm	0:9b334a45a8ff	98	*
bogdanm	0:9b334a45a8ff	99	* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
bogdanm	0:9b334a45a8ff	100	*
bogdanm	0:9b334a45a8ff	101	* Redistribution and use in source and binary forms, with or without modification,
bogdanm	0:9b334a45a8ff	102	* are permitted provided that the following conditions are met:
bogdanm	0:9b334a45a8ff	103	* 1. Redistributions of source code must retain the above copyright notice,
bogdanm	0:9b334a45a8ff	104	* this list of conditions and the following disclaimer.
bogdanm	0:9b334a45a8ff	105	* 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm	0:9b334a45a8ff	106	* this list of conditions and the following disclaimer in the documentation
bogdanm	0:9b334a45a8ff	107	* and/or other materials provided with the distribution.
bogdanm	0:9b334a45a8ff	108	* 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm	0:9b334a45a8ff	109	* may be used to endorse or promote products derived from this software
bogdanm	0:9b334a45a8ff	110	* without specific prior written permission.
bogdanm	0:9b334a45a8ff	111	*
bogdanm	0:9b334a45a8ff	112	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm	0:9b334a45a8ff	113	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm	0:9b334a45a8ff	114	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm	0:9b334a45a8ff	115	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm	0:9b334a45a8ff	116	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm	0:9b334a45a8ff	117	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm	0:9b334a45a8ff	118	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm	0:9b334a45a8ff	119	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm	0:9b334a45a8ff	120	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm	0:9b334a45a8ff	121	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm	0:9b334a45a8ff	122	*
bogdanm	0:9b334a45a8ff	123	******************************************************************************
bogdanm	0:9b334a45a8ff	124	*/
bogdanm	0:9b334a45a8ff	125
bogdanm	0:9b334a45a8ff	126	/* Includes ------------------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	127	#include "stm32l4xx_hal.h"
bogdanm	0:9b334a45a8ff	128
bogdanm	0:9b334a45a8ff	129	/** @addtogroup STM32L4xx_HAL_Driver
bogdanm	0:9b334a45a8ff	130	* @{
bogdanm	0:9b334a45a8ff	131	*/
bogdanm	0:9b334a45a8ff	132
bogdanm	0:9b334a45a8ff	133	/** @defgroup LPTIM LPTIM
bogdanm	0:9b334a45a8ff	134	* @brief LPTIM HAL module driver.
bogdanm	0:9b334a45a8ff	135	* @{
bogdanm	0:9b334a45a8ff	136	*/
bogdanm	0:9b334a45a8ff	137
bogdanm	0:9b334a45a8ff	138	#ifdef HAL_LPTIM_MODULE_ENABLED
bogdanm	0:9b334a45a8ff	139	/* Private typedef -----------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	140	/* Private define ------------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	141	/* Private macro -------------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	142	/* Private variables ---------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	143	/* Private function prototypes -----------------------------------------------*/
bogdanm	0:9b334a45a8ff	144	/* Exported functions --------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	145
bogdanm	0:9b334a45a8ff	146	/** @defgroup LPTIM_Exported_Functions LPTIM Exported Functions
bogdanm	0:9b334a45a8ff	147	* @{
bogdanm	0:9b334a45a8ff	148	*/
bogdanm	0:9b334a45a8ff	149
bogdanm	0:9b334a45a8ff	150	/** @defgroup LPTIM_Group1 Initialization/de-initialization functions
bogdanm	0:9b334a45a8ff	151	* @brief Initialization and Configuration functions.
bogdanm	0:9b334a45a8ff	152	*
bogdanm	0:9b334a45a8ff	153	@verbatim
bogdanm	0:9b334a45a8ff	154	==============================================================================
bogdanm	0:9b334a45a8ff	155	##### Initialization and de-initialization functions #####
bogdanm	0:9b334a45a8ff	156	==============================================================================
bogdanm	0:9b334a45a8ff	157	[..] This section provides functions allowing to:
bogdanm	0:9b334a45a8ff	158	(+) Initialize the LPTIM according to the specified parameters in the
bogdanm	0:9b334a45a8ff	159	LPTIM_InitTypeDef and initialize the associated handle.
bogdanm	0:9b334a45a8ff	160	(+) DeInitialize the LPTIM peripheral.
bogdanm	0:9b334a45a8ff	161	(+) Initialize the LPTIM MSP.
bogdanm	0:9b334a45a8ff	162	(+) DeInitialize the LPTIM MSP.
bogdanm	0:9b334a45a8ff	163
bogdanm	0:9b334a45a8ff	164	@endverbatim
bogdanm	0:9b334a45a8ff	165	* @{
bogdanm	0:9b334a45a8ff	166	*/
bogdanm	0:9b334a45a8ff	167
bogdanm	0:9b334a45a8ff	168	/**
bogdanm	0:9b334a45a8ff	169	* @brief Initialize the LPTIM according to the specified parameters in the
bogdanm	0:9b334a45a8ff	170	* LPTIM_InitTypeDef and initialize the associated handle.
bogdanm	0:9b334a45a8ff	171	* @param hlptim: LPTIM handle
bogdanm	0:9b334a45a8ff	172	* @retval HAL status
bogdanm	0:9b334a45a8ff	173	*/
bogdanm	0:9b334a45a8ff	174	HAL_StatusTypeDef HAL_LPTIM_Init(LPTIM_HandleTypeDef *hlptim)
bogdanm	0:9b334a45a8ff	175	{
bogdanm	0:9b334a45a8ff	176	uint32_t tmpcfgr = 0;
bogdanm	0:9b334a45a8ff	177
bogdanm	0:9b334a45a8ff	178	/* Check the LPTIM handle allocation */
bogdanm	0:9b334a45a8ff	179	if(hlptim == NULL)
bogdanm	0:9b334a45a8ff	180	{
bogdanm	0:9b334a45a8ff	181	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	182	}
bogdanm	0:9b334a45a8ff	183
bogdanm	0:9b334a45a8ff	184	/* Check the parameters */
bogdanm	0:9b334a45a8ff	185	assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm	0:9b334a45a8ff	186
bogdanm	0:9b334a45a8ff	187	assert_param(IS_LPTIM_CLOCK_SOURCE(hlptim->Init.Clock.Source));
bogdanm	0:9b334a45a8ff	188	assert_param(IS_LPTIM_CLOCK_PRESCALER(hlptim->Init.Clock.Prescaler));
bogdanm	0:9b334a45a8ff	189	if ((hlptim->Init.Clock.Source) == LPTIM_CLOCKSOURCE_ULPTIM)
bogdanm	0:9b334a45a8ff	190	{
bogdanm	0:9b334a45a8ff	191	assert_param(IS_LPTIM_CLOCK_POLARITY(hlptim->Init.UltraLowPowerClock.Polarity));
bogdanm	0:9b334a45a8ff	192	assert_param(IS_LPTIM_CLOCK_SAMPLE_TIME(hlptim->Init.UltraLowPowerClock.SampleTime));
bogdanm	0:9b334a45a8ff	193	}
bogdanm	0:9b334a45a8ff	194	assert_param(IS_LPTIM_TRG_SOURCE(hlptim->Init.Trigger.Source));
bogdanm	0:9b334a45a8ff	195	if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
bogdanm	0:9b334a45a8ff	196	{
bogdanm	0:9b334a45a8ff	197	assert_param(IS_LPTIM_TRIG_SAMPLE_TIME(hlptim->Init.Trigger.SampleTime));
bogdanm	0:9b334a45a8ff	198	assert_param(IS_LPTIM_EXT_TRG_POLARITY(hlptim->Init.Trigger.ActiveEdge));
bogdanm	0:9b334a45a8ff	199	}
bogdanm	0:9b334a45a8ff	200	assert_param(IS_LPTIM_OUTPUT_POLARITY(hlptim->Init.OutputPolarity));
bogdanm	0:9b334a45a8ff	201	assert_param(IS_LPTIM_UPDATE_MODE(hlptim->Init.UpdateMode));
bogdanm	0:9b334a45a8ff	202	assert_param(IS_LPTIM_COUNTER_SOURCE(hlptim->Init.CounterSource));
bogdanm	0:9b334a45a8ff	203
bogdanm	0:9b334a45a8ff	204	if(hlptim->State == HAL_LPTIM_STATE_RESET)
bogdanm	0:9b334a45a8ff	205	{
bogdanm	0:9b334a45a8ff	206	/* Allocate lock resource and initialize it */
bogdanm	0:9b334a45a8ff	207	hlptim->Lock = HAL_UNLOCKED;
bogdanm	0:9b334a45a8ff	208
bogdanm	0:9b334a45a8ff	209	/* Init the low level hardware */
bogdanm	0:9b334a45a8ff	210	HAL_LPTIM_MspInit(hlptim);
bogdanm	0:9b334a45a8ff	211	}
bogdanm	0:9b334a45a8ff	212
bogdanm	0:9b334a45a8ff	213	/* Change the LPTIM state */
bogdanm	0:9b334a45a8ff	214	hlptim->State = HAL_LPTIM_STATE_BUSY;
bogdanm	0:9b334a45a8ff	215
bogdanm	0:9b334a45a8ff	216	/* Get the LPTIMx CFGR value */
bogdanm	0:9b334a45a8ff	217	tmpcfgr = hlptim->Instance->CFGR;
bogdanm	0:9b334a45a8ff	218
bogdanm	0:9b334a45a8ff	219	if ((hlptim->Init.Clock.Source) == LPTIM_CLOCKSOURCE_ULPTIM)
bogdanm	0:9b334a45a8ff	220	{
bogdanm	0:9b334a45a8ff	221	tmpcfgr &= (uint32_t)(~(LPTIM_CFGR_CKPOL \| LPTIM_CFGR_CKFLT));
bogdanm	0:9b334a45a8ff	222	}
bogdanm	0:9b334a45a8ff	223	if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
bogdanm	0:9b334a45a8ff	224	{
bogdanm	0:9b334a45a8ff	225	tmpcfgr &= (uint32_t)(~ (LPTIM_CFGR_TRGFLT \| LPTIM_CFGR_TRIGSEL));
bogdanm	0:9b334a45a8ff	226	}
bogdanm	0:9b334a45a8ff	227
bogdanm	0:9b334a45a8ff	228	/* Clear CKSEL, PRESC, TRIGEN, TRGFLT, WAVPOL, PRELOAD & COUNTMODE bits */
bogdanm	0:9b334a45a8ff	229	tmpcfgr &= (uint32_t)(~(LPTIM_CFGR_CKSEL \| LPTIM_CFGR_TRIGEN \| LPTIM_CFGR_PRELOAD \|
bogdanm	0:9b334a45a8ff	230	LPTIM_CFGR_WAVPOL \| LPTIM_CFGR_PRESC \| LPTIM_CFGR_COUNTMODE ));
bogdanm	0:9b334a45a8ff	231
bogdanm	0:9b334a45a8ff	232	/* Set initialization parameters */
bogdanm	0:9b334a45a8ff	233	tmpcfgr \|= (hlptim->Init.Clock.Source \|
bogdanm	0:9b334a45a8ff	234	hlptim->Init.Clock.Prescaler \|
bogdanm	0:9b334a45a8ff	235	hlptim->Init.OutputPolarity \|
bogdanm	0:9b334a45a8ff	236	hlptim->Init.UpdateMode \|
bogdanm	0:9b334a45a8ff	237	hlptim->Init.CounterSource);
bogdanm	0:9b334a45a8ff	238
bogdanm	0:9b334a45a8ff	239	if ((hlptim->Init.Clock.Source) == LPTIM_CLOCKSOURCE_ULPTIM)
bogdanm	0:9b334a45a8ff	240	{
bogdanm	0:9b334a45a8ff	241	tmpcfgr \|= (hlptim->Init.UltraLowPowerClock.Polarity \|
bogdanm	0:9b334a45a8ff	242	hlptim->Init.UltraLowPowerClock.SampleTime);
bogdanm	0:9b334a45a8ff	243	}
bogdanm	0:9b334a45a8ff	244
bogdanm	0:9b334a45a8ff	245	if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
bogdanm	0:9b334a45a8ff	246	{
bogdanm	0:9b334a45a8ff	247	/* Enable External trigger and set the trigger source */
bogdanm	0:9b334a45a8ff	248	tmpcfgr \|= (hlptim->Init.Trigger.Source \|
bogdanm	0:9b334a45a8ff	249	hlptim->Init.Trigger.ActiveEdge \|
bogdanm	0:9b334a45a8ff	250	hlptim->Init.Trigger.SampleTime);
bogdanm	0:9b334a45a8ff	251	}
bogdanm	0:9b334a45a8ff	252
bogdanm	0:9b334a45a8ff	253	/* Write to LPTIMx CFGR */
bogdanm	0:9b334a45a8ff	254	hlptim->Instance->CFGR = tmpcfgr;
bogdanm	0:9b334a45a8ff	255
bogdanm	0:9b334a45a8ff	256	/* Configure LPTIM input sources */
bogdanm	0:9b334a45a8ff	257	if(hlptim->Instance == LPTIM1)
bogdanm	0:9b334a45a8ff	258	{
bogdanm	0:9b334a45a8ff	259	/* Check LPTIM1 Input1 and Input2 sources */
bogdanm	0:9b334a45a8ff	260	assert_param(IS_LPTIM_INPUT1_SOURCE(hlptim->Instance,hlptim->Init.Input1Source));
bogdanm	0:9b334a45a8ff	261	assert_param(IS_LPTIM_INPUT2_SOURCE(hlptim->Instance,hlptim->Init.Input2Source));
bogdanm	0:9b334a45a8ff	262
bogdanm	0:9b334a45a8ff	263	/* Configure LPTIM1 Input1 and Input2 sources */
bogdanm	0:9b334a45a8ff	264	hlptim->Instance->OR = (hlptim->Init.Input1Source \| hlptim->Init.Input2Source);
bogdanm	0:9b334a45a8ff	265	}
bogdanm	0:9b334a45a8ff	266	else
bogdanm	0:9b334a45a8ff	267	{
bogdanm	0:9b334a45a8ff	268	/* Check LPTIM2 Input1 source */
bogdanm	0:9b334a45a8ff	269	assert_param(IS_LPTIM_INPUT1_SOURCE(hlptim->Instance,hlptim->Init.Input1Source));
bogdanm	0:9b334a45a8ff	270
bogdanm	0:9b334a45a8ff	271	/* Configure LPTIM2 Input1 source */
bogdanm	0:9b334a45a8ff	272	hlptim->Instance->OR = hlptim->Init.Input1Source;
bogdanm	0:9b334a45a8ff	273	}
bogdanm	0:9b334a45a8ff	274
bogdanm	0:9b334a45a8ff	275	/* Change the LPTIM state */
bogdanm	0:9b334a45a8ff	276	hlptim->State = HAL_LPTIM_STATE_READY;
bogdanm	0:9b334a45a8ff	277
bogdanm	0:9b334a45a8ff	278	/* Return function status */
bogdanm	0:9b334a45a8ff	279	return HAL_OK;
bogdanm	0:9b334a45a8ff	280	}
bogdanm	0:9b334a45a8ff	281
bogdanm	0:9b334a45a8ff	282	/**
bogdanm	0:9b334a45a8ff	283	* @brief DeInitialize the LPTIM peripheral.
bogdanm	0:9b334a45a8ff	284	* @param hlptim: LPTIM handle
bogdanm	0:9b334a45a8ff	285	* @retval HAL status
bogdanm	0:9b334a45a8ff	286	*/
bogdanm	0:9b334a45a8ff	287	HAL_StatusTypeDef HAL_LPTIM_DeInit(LPTIM_HandleTypeDef *hlptim)
bogdanm	0:9b334a45a8ff	288	{
bogdanm	0:9b334a45a8ff	289	/* Check the LPTIM handle allocation */
bogdanm	0:9b334a45a8ff	290	if(hlptim == NULL)
bogdanm	0:9b334a45a8ff	291	{
bogdanm	0:9b334a45a8ff	292	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	293	}
bogdanm	0:9b334a45a8ff	294
bogdanm	0:9b334a45a8ff	295	/* Change the LPTIM state */
bogdanm	0:9b334a45a8ff	296	hlptim->State = HAL_LPTIM_STATE_BUSY;
bogdanm	0:9b334a45a8ff	297
bogdanm	0:9b334a45a8ff	298	/* Disable the LPTIM Peripheral Clock */
bogdanm	0:9b334a45a8ff	299	__HAL_LPTIM_DISABLE(hlptim);
bogdanm	0:9b334a45a8ff	300
bogdanm	0:9b334a45a8ff	301	/* DeInit the low level hardware: CLOCK, NVIC.*/
bogdanm	0:9b334a45a8ff	302	HAL_LPTIM_MspDeInit(hlptim);
bogdanm	0:9b334a45a8ff	303
bogdanm	0:9b334a45a8ff	304	/* Change the LPTIM state */
bogdanm	0:9b334a45a8ff	305	hlptim->State = HAL_LPTIM_STATE_RESET;
bogdanm	0:9b334a45a8ff	306
bogdanm	0:9b334a45a8ff	307	/* Release Lock */
bogdanm	0:9b334a45a8ff	308	__HAL_UNLOCK(hlptim);
bogdanm	0:9b334a45a8ff	309
bogdanm	0:9b334a45a8ff	310	/* Return function status */
bogdanm	0:9b334a45a8ff	311	return HAL_OK;
bogdanm	0:9b334a45a8ff	312	}
bogdanm	0:9b334a45a8ff	313
bogdanm	0:9b334a45a8ff	314	/**
bogdanm	0:9b334a45a8ff	315	* @brief Initialize the LPTIM MSP.
bogdanm	0:9b334a45a8ff	316	* @param hlptim: LPTIM handle
bogdanm	0:9b334a45a8ff	317	* @retval None
bogdanm	0:9b334a45a8ff	318	*/
bogdanm	0:9b334a45a8ff	319	__weak void HAL_LPTIM_MspInit(LPTIM_HandleTypeDef *hlptim)
bogdanm	0:9b334a45a8ff	320	{
bogdanm	0:9b334a45a8ff	321	/* NOTE : This function should not be modified, when the callback is needed,
bogdanm	0:9b334a45a8ff	322	the HAL_LPTIM_MspInit could be implemented in the user file
bogdanm	0:9b334a45a8ff	323	*/
bogdanm	0:9b334a45a8ff	324	}
bogdanm	0:9b334a45a8ff	325
bogdanm	0:9b334a45a8ff	326	/**
bogdanm	0:9b334a45a8ff	327	* @brief DeInitialize LPTIM MSP.
bogdanm	0:9b334a45a8ff	328	* @param hlptim: LPTIM handle
bogdanm	0:9b334a45a8ff	329	* @retval None
bogdanm	0:9b334a45a8ff	330	*/
bogdanm	0:9b334a45a8ff	331	__weak void HAL_LPTIM_MspDeInit(LPTIM_HandleTypeDef *hlptim)
bogdanm	0:9b334a45a8ff	332	{
bogdanm	0:9b334a45a8ff	333	/* NOTE : This function should not be modified, when the callback is needed,
bogdanm	0:9b334a45a8ff	334	the HAL_LPTIM_MspDeInit could be implemented in the user file
bogdanm	0:9b334a45a8ff	335	*/
bogdanm	0:9b334a45a8ff	336	}
bogdanm	0:9b334a45a8ff	337
bogdanm	0:9b334a45a8ff	338	/**
bogdanm	0:9b334a45a8ff	339	* @}
bogdanm	0:9b334a45a8ff	340	*/
bogdanm	0:9b334a45a8ff	341
bogdanm	0:9b334a45a8ff	342	/** @defgroup LPTIM_Group2 LPTIM Start-Stop operation functions
bogdanm	0:9b334a45a8ff	343	* @brief Start-Stop operation functions.
bogdanm	0:9b334a45a8ff	344	*
bogdanm	0:9b334a45a8ff	345	@verbatim
bogdanm	0:9b334a45a8ff	346	==============================================================================
bogdanm	0:9b334a45a8ff	347	##### LPTIM Start Stop operation functions #####
bogdanm	0:9b334a45a8ff	348	==============================================================================
bogdanm	0:9b334a45a8ff	349	[..] This section provides functions allowing to:
bogdanm	0:9b334a45a8ff	350	(+) Start the PWM mode.
bogdanm	0:9b334a45a8ff	351	(+) Stop the PWM mode.
bogdanm	0:9b334a45a8ff	352	(+) Start the One pulse mode.
bogdanm	0:9b334a45a8ff	353	(+) Stop the One pulse mode.
bogdanm	0:9b334a45a8ff	354	(+) Start the Set once mode.
bogdanm	0:9b334a45a8ff	355	(+) Stop the Set once mode.
bogdanm	0:9b334a45a8ff	356	(+) Start the Encoder mode.
bogdanm	0:9b334a45a8ff	357	(+) Stop the Encoder mode.
bogdanm	0:9b334a45a8ff	358	(+) Start the Timeout mode.
bogdanm	0:9b334a45a8ff	359	(+) Stop the Timeout mode.
bogdanm	0:9b334a45a8ff	360	(+) Start the Counter mode.
bogdanm	0:9b334a45a8ff	361	(+) Stop the Counter mode.
bogdanm	0:9b334a45a8ff	362
bogdanm	0:9b334a45a8ff	363
bogdanm	0:9b334a45a8ff	364	@endverbatim
bogdanm	0:9b334a45a8ff	365	* @{
bogdanm	0:9b334a45a8ff	366	*/
bogdanm	0:9b334a45a8ff	367
bogdanm	0:9b334a45a8ff	368	/**
bogdanm	0:9b334a45a8ff	369	* @brief Start the LPTIM PWM generation.
bogdanm	0:9b334a45a8ff	370	* @param hlptim : LPTIM handle
bogdanm	0:9b334a45a8ff	371	* @param Period : Specifies the Autoreload value.
bogdanm	0:9b334a45a8ff	372	* This parameter must be a value between 0x0000 and 0xFFFF.
bogdanm	0:9b334a45a8ff	373	* @param Pulse : Specifies the compare value.
bogdanm	0:9b334a45a8ff	374	* This parameter must be a value between 0x0000 and 0xFFFF.
bogdanm	0:9b334a45a8ff	375	* @retval HAL status
bogdanm	0:9b334a45a8ff	376	*/
bogdanm	0:9b334a45a8ff	377	HAL_StatusTypeDef HAL_LPTIM_PWM_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
bogdanm	0:9b334a45a8ff	378	{
bogdanm	0:9b334a45a8ff	379	/* Check the parameters */
bogdanm	0:9b334a45a8ff	380	assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm	0:9b334a45a8ff	381	assert_param(IS_LPTIM_PERIOD(Period));
bogdanm	0:9b334a45a8ff	382	assert_param(IS_LPTIM_PULSE(Pulse));
bogdanm	0:9b334a45a8ff	383
bogdanm	0:9b334a45a8ff	384	/* Set the LPTIM state */
bogdanm	0:9b334a45a8ff	385	hlptim->State= HAL_LPTIM_STATE_BUSY;
bogdanm	0:9b334a45a8ff	386
bogdanm	0:9b334a45a8ff	387	/* Reset WAVE bit to set PWM mode */
bogdanm	0:9b334a45a8ff	388	hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
bogdanm	0:9b334a45a8ff	389
bogdanm	0:9b334a45a8ff	390	/* Enable the Peripheral */
bogdanm	0:9b334a45a8ff	391	__HAL_LPTIM_ENABLE(hlptim);
bogdanm	0:9b334a45a8ff	392
bogdanm	0:9b334a45a8ff	393	/* Load the period value in the autoreload register */
bogdanm	0:9b334a45a8ff	394	__HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
bogdanm	0:9b334a45a8ff	395
bogdanm	0:9b334a45a8ff	396	/* Load the pulse value in the compare register */
bogdanm	0:9b334a45a8ff	397	__HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
bogdanm	0:9b334a45a8ff	398
bogdanm	0:9b334a45a8ff	399	/* Start timer in continuous mode */
bogdanm	0:9b334a45a8ff	400	__HAL_LPTIM_START_CONTINUOUS(hlptim);
bogdanm	0:9b334a45a8ff	401
bogdanm	0:9b334a45a8ff	402	/* Change the TIM state*/
bogdanm	0:9b334a45a8ff	403	hlptim->State= HAL_LPTIM_STATE_READY;
bogdanm	0:9b334a45a8ff	404
bogdanm	0:9b334a45a8ff	405	/* Return function status */
bogdanm	0:9b334a45a8ff	406	return HAL_OK;
bogdanm	0:9b334a45a8ff	407	}
bogdanm	0:9b334a45a8ff	408
bogdanm	0:9b334a45a8ff	409	/**
bogdanm	0:9b334a45a8ff	410	* @brief Stop the LPTIM PWM generation.
bogdanm	0:9b334a45a8ff	411	* @param hlptim : LPTIM handle
bogdanm	0:9b334a45a8ff	412	* @retval HAL status
bogdanm	0:9b334a45a8ff	413	*/
bogdanm	0:9b334a45a8ff	414	HAL_StatusTypeDef HAL_LPTIM_PWM_Stop(LPTIM_HandleTypeDef *hlptim)
bogdanm	0:9b334a45a8ff	415	{
bogdanm	0:9b334a45a8ff	416	/* Check the parameters */
bogdanm	0:9b334a45a8ff	417	assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm	0:9b334a45a8ff	418
bogdanm	0:9b334a45a8ff	419	/* Set the LPTIM state */
bogdanm	0:9b334a45a8ff	420	hlptim->State= HAL_LPTIM_STATE_BUSY;
bogdanm	0:9b334a45a8ff	421
bogdanm	0:9b334a45a8ff	422	/* Disable the Peripheral */
bogdanm	0:9b334a45a8ff	423	__HAL_LPTIM_DISABLE(hlptim);
bogdanm	0:9b334a45a8ff	424
bogdanm	0:9b334a45a8ff	425	/* Change the TIM state*/
bogdanm	0:9b334a45a8ff	426	hlptim->State= HAL_LPTIM_STATE_READY;
bogdanm	0:9b334a45a8ff	427
bogdanm	0:9b334a45a8ff	428	/* Return function status */
bogdanm	0:9b334a45a8ff	429	return HAL_OK;
bogdanm	0:9b334a45a8ff	430	}
bogdanm	0:9b334a45a8ff	431
bogdanm	0:9b334a45a8ff	432	/**
bogdanm	0:9b334a45a8ff	433	* @brief Start the LPTIM PWM generation in interrupt mode.
bogdanm	0:9b334a45a8ff	434	* @param hlptim : LPTIM handle
bogdanm	0:9b334a45a8ff	435	* @param Period : Specifies the Autoreload value.
bogdanm	0:9b334a45a8ff	436	* This parameter must be a value between 0x0000 and 0xFFFF
bogdanm	0:9b334a45a8ff	437	* @param Pulse : Specifies the compare value.
bogdanm	0:9b334a45a8ff	438	* This parameter must be a value between 0x0000 and 0xFFFF
bogdanm	0:9b334a45a8ff	439	* @retval HAL status
bogdanm	0:9b334a45a8ff	440	*/
bogdanm	0:9b334a45a8ff	441	HAL_StatusTypeDef HAL_LPTIM_PWM_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
bogdanm	0:9b334a45a8ff	442	{
bogdanm	0:9b334a45a8ff	443	/* Check the parameters */
bogdanm	0:9b334a45a8ff	444	assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm	0:9b334a45a8ff	445	assert_param(IS_LPTIM_PERIOD(Period));
bogdanm	0:9b334a45a8ff	446	assert_param(IS_LPTIM_PULSE(Pulse));
bogdanm	0:9b334a45a8ff	447
bogdanm	0:9b334a45a8ff	448	/* Set the LPTIM state */
bogdanm	0:9b334a45a8ff	449	hlptim->State= HAL_LPTIM_STATE_BUSY;
bogdanm	0:9b334a45a8ff	450
bogdanm	0:9b334a45a8ff	451	/* Reset WAVE bit to set PWM mode */
bogdanm	0:9b334a45a8ff	452	hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
bogdanm	0:9b334a45a8ff	453
bogdanm	0:9b334a45a8ff	454	/* Enable Autoreload write complete interrupt */
bogdanm	0:9b334a45a8ff	455	__HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK);
bogdanm	0:9b334a45a8ff	456
bogdanm	0:9b334a45a8ff	457	/* Enable Compare write complete interrupt */
bogdanm	0:9b334a45a8ff	458	__HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPOK);
bogdanm	0:9b334a45a8ff	459
bogdanm	0:9b334a45a8ff	460	/* Enable Autoreload match interrupt */
bogdanm	0:9b334a45a8ff	461	__HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM);
bogdanm	0:9b334a45a8ff	462
bogdanm	0:9b334a45a8ff	463	/* Enable Compare match interrupt */
bogdanm	0:9b334a45a8ff	464	__HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM);
bogdanm	0:9b334a45a8ff	465
bogdanm	0:9b334a45a8ff	466	/* If external trigger source is used, then enable external trigger interrupt */
bogdanm	0:9b334a45a8ff	467	if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
bogdanm	0:9b334a45a8ff	468	{
bogdanm	0:9b334a45a8ff	469	/* Enable external trigger interrupt */
bogdanm	0:9b334a45a8ff	470	__HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
bogdanm	0:9b334a45a8ff	471	}
bogdanm	0:9b334a45a8ff	472
bogdanm	0:9b334a45a8ff	473	/* Enable the Peripheral */
bogdanm	0:9b334a45a8ff	474	__HAL_LPTIM_ENABLE(hlptim);
bogdanm	0:9b334a45a8ff	475
bogdanm	0:9b334a45a8ff	476	/* Load the period value in the autoreload register */
bogdanm	0:9b334a45a8ff	477	__HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
bogdanm	0:9b334a45a8ff	478
bogdanm	0:9b334a45a8ff	479	/* Load the pulse value in the compare register */
bogdanm	0:9b334a45a8ff	480	__HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
bogdanm	0:9b334a45a8ff	481
bogdanm	0:9b334a45a8ff	482	/* Start timer in continuous mode */
bogdanm	0:9b334a45a8ff	483	__HAL_LPTIM_START_CONTINUOUS(hlptim);
bogdanm	0:9b334a45a8ff	484
bogdanm	0:9b334a45a8ff	485	/* Change the TIM state*/
bogdanm	0:9b334a45a8ff	486	hlptim->State= HAL_LPTIM_STATE_READY;
bogdanm	0:9b334a45a8ff	487
bogdanm	0:9b334a45a8ff	488	/* Return function status */
bogdanm	0:9b334a45a8ff	489	return HAL_OK;
bogdanm	0:9b334a45a8ff	490	}
bogdanm	0:9b334a45a8ff	491
bogdanm	0:9b334a45a8ff	492	/**
bogdanm	0:9b334a45a8ff	493	* @brief Stop the LPTIM PWM generation in interrupt mode.
bogdanm	0:9b334a45a8ff	494	* @param hlptim : LPTIM handle
bogdanm	0:9b334a45a8ff	495	* @retval HAL status
bogdanm	0:9b334a45a8ff	496	*/
bogdanm	0:9b334a45a8ff	497	HAL_StatusTypeDef HAL_LPTIM_PWM_Stop_IT(LPTIM_HandleTypeDef *hlptim)
bogdanm	0:9b334a45a8ff	498	{
bogdanm	0:9b334a45a8ff	499	/* Check the parameters */
bogdanm	0:9b334a45a8ff	500	assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm	0:9b334a45a8ff	501
bogdanm	0:9b334a45a8ff	502	/* Set the LPTIM state */
bogdanm	0:9b334a45a8ff	503	hlptim->State= HAL_LPTIM_STATE_BUSY;
bogdanm	0:9b334a45a8ff	504
bogdanm	0:9b334a45a8ff	505	/* Disable the Peripheral */
bogdanm	0:9b334a45a8ff	506	__HAL_LPTIM_DISABLE(hlptim);
bogdanm	0:9b334a45a8ff	507
bogdanm	0:9b334a45a8ff	508	/* Disable Autoreload write complete interrupt */
bogdanm	0:9b334a45a8ff	509	__HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK);
bogdanm	0:9b334a45a8ff	510
bogdanm	0:9b334a45a8ff	511	/* Disable Compare write complete interrupt */
bogdanm	0:9b334a45a8ff	512	__HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPOK);
bogdanm	0:9b334a45a8ff	513
bogdanm	0:9b334a45a8ff	514	/* Disable Autoreload match interrupt */
bogdanm	0:9b334a45a8ff	515	__HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM);
bogdanm	0:9b334a45a8ff	516
bogdanm	0:9b334a45a8ff	517	/* Disable Compare match interrupt */
bogdanm	0:9b334a45a8ff	518	__HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM);
bogdanm	0:9b334a45a8ff	519
bogdanm	0:9b334a45a8ff	520	/* If external trigger source is used, then disable external trigger interrupt */
bogdanm	0:9b334a45a8ff	521	if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
bogdanm	0:9b334a45a8ff	522	{
bogdanm	0:9b334a45a8ff	523	/* Disable external trigger interrupt */
bogdanm	0:9b334a45a8ff	524	__HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
bogdanm	0:9b334a45a8ff	525	}
bogdanm	0:9b334a45a8ff	526
bogdanm	0:9b334a45a8ff	527	/* Change the TIM state*/
bogdanm	0:9b334a45a8ff	528	hlptim->State= HAL_LPTIM_STATE_READY;
bogdanm	0:9b334a45a8ff	529
bogdanm	0:9b334a45a8ff	530	/* Return function status */
bogdanm	0:9b334a45a8ff	531	return HAL_OK;
bogdanm	0:9b334a45a8ff	532	}
bogdanm	0:9b334a45a8ff	533
bogdanm	0:9b334a45a8ff	534	/**
bogdanm	0:9b334a45a8ff	535	* @brief Start the LPTIM One pulse generation.
bogdanm	0:9b334a45a8ff	536	* @param hlptim : LPTIM handle
bogdanm	0:9b334a45a8ff	537	* @param Period : Specifies the Autoreload value.
bogdanm	0:9b334a45a8ff	538	* This parameter must be a value between 0x0000 and 0xFFFF.
bogdanm	0:9b334a45a8ff	539	* @param Pulse : Specifies the compare value.
bogdanm	0:9b334a45a8ff	540	* This parameter must be a value between 0x0000 and 0xFFFF.
bogdanm	0:9b334a45a8ff	541	* @retval HAL status
bogdanm	0:9b334a45a8ff	542	*/
bogdanm	0:9b334a45a8ff	543	HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
bogdanm	0:9b334a45a8ff	544	{
bogdanm	0:9b334a45a8ff	545	/* Check the parameters */
bogdanm	0:9b334a45a8ff	546	assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm	0:9b334a45a8ff	547	assert_param(IS_LPTIM_PERIOD(Period));
bogdanm	0:9b334a45a8ff	548	assert_param(IS_LPTIM_PULSE(Pulse));
bogdanm	0:9b334a45a8ff	549
bogdanm	0:9b334a45a8ff	550	/* Set the LPTIM state */
bogdanm	0:9b334a45a8ff	551	hlptim->State= HAL_LPTIM_STATE_BUSY;
bogdanm	0:9b334a45a8ff	552
bogdanm	0:9b334a45a8ff	553	/* Reset WAVE bit to set one pulse mode */
bogdanm	0:9b334a45a8ff	554	hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
bogdanm	0:9b334a45a8ff	555
bogdanm	0:9b334a45a8ff	556	/* Enable the Peripheral */
bogdanm	0:9b334a45a8ff	557	__HAL_LPTIM_ENABLE(hlptim);
bogdanm	0:9b334a45a8ff	558
bogdanm	0:9b334a45a8ff	559	/* Load the period value in the autoreload register */
bogdanm	0:9b334a45a8ff	560	__HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
bogdanm	0:9b334a45a8ff	561
bogdanm	0:9b334a45a8ff	562	/* Load the pulse value in the compare register */
bogdanm	0:9b334a45a8ff	563	__HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
bogdanm	0:9b334a45a8ff	564
bogdanm	0:9b334a45a8ff	565	/* Start timer in continuous mode */
bogdanm	0:9b334a45a8ff	566	__HAL_LPTIM_START_SINGLE(hlptim);
bogdanm	0:9b334a45a8ff	567
bogdanm	0:9b334a45a8ff	568	/* Change the TIM state*/
bogdanm	0:9b334a45a8ff	569	hlptim->State= HAL_LPTIM_STATE_READY;
bogdanm	0:9b334a45a8ff	570
bogdanm	0:9b334a45a8ff	571	/* Return function status */
bogdanm	0:9b334a45a8ff	572	return HAL_OK;
bogdanm	0:9b334a45a8ff	573	}
bogdanm	0:9b334a45a8ff	574
bogdanm	0:9b334a45a8ff	575	/**
bogdanm	0:9b334a45a8ff	576	* @brief Stop the LPTIM One pulse generation.
bogdanm	0:9b334a45a8ff	577	* @param hlptim : LPTIM handle
bogdanm	0:9b334a45a8ff	578	* @retval HAL status
bogdanm	0:9b334a45a8ff	579	*/
bogdanm	0:9b334a45a8ff	580	HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop(LPTIM_HandleTypeDef *hlptim)
bogdanm	0:9b334a45a8ff	581	{
bogdanm	0:9b334a45a8ff	582	/* Check the parameters */
bogdanm	0:9b334a45a8ff	583	assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm	0:9b334a45a8ff	584
bogdanm	0:9b334a45a8ff	585	/* Set the LPTIM state */
bogdanm	0:9b334a45a8ff	586	hlptim->State= HAL_LPTIM_STATE_BUSY;
bogdanm	0:9b334a45a8ff	587
bogdanm	0:9b334a45a8ff	588	/* Disable the Peripheral */
bogdanm	0:9b334a45a8ff	589	__HAL_LPTIM_DISABLE(hlptim);
bogdanm	0:9b334a45a8ff	590
bogdanm	0:9b334a45a8ff	591	/* Change the TIM state*/
bogdanm	0:9b334a45a8ff	592	hlptim->State= HAL_LPTIM_STATE_READY;
bogdanm	0:9b334a45a8ff	593
bogdanm	0:9b334a45a8ff	594	/* Return function status */
bogdanm	0:9b334a45a8ff	595	return HAL_OK;
bogdanm	0:9b334a45a8ff	596	}
bogdanm	0:9b334a45a8ff	597
bogdanm	0:9b334a45a8ff	598	/**
bogdanm	0:9b334a45a8ff	599	* @brief Start the LPTIM One pulse generation in interrupt mode.
bogdanm	0:9b334a45a8ff	600	* @param hlptim : LPTIM handle
bogdanm	0:9b334a45a8ff	601	* @param Period : Specifies the Autoreload value.
bogdanm	0:9b334a45a8ff	602	* This parameter must be a value between 0x0000 and 0xFFFF.
bogdanm	0:9b334a45a8ff	603	* @param Pulse : Specifies the compare value.
bogdanm	0:9b334a45a8ff	604	* This parameter must be a value between 0x0000 and 0xFFFF.
bogdanm	0:9b334a45a8ff	605	* @retval HAL status
bogdanm	0:9b334a45a8ff	606	*/
bogdanm	0:9b334a45a8ff	607	HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
bogdanm	0:9b334a45a8ff	608	{
bogdanm	0:9b334a45a8ff	609	/* Check the parameters */
bogdanm	0:9b334a45a8ff	610	assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm	0:9b334a45a8ff	611	assert_param(IS_LPTIM_PERIOD(Period));
bogdanm	0:9b334a45a8ff	612	assert_param(IS_LPTIM_PULSE(Pulse));
bogdanm	0:9b334a45a8ff	613
bogdanm	0:9b334a45a8ff	614	/* Set the LPTIM state */
bogdanm	0:9b334a45a8ff	615	hlptim->State= HAL_LPTIM_STATE_BUSY;
bogdanm	0:9b334a45a8ff	616
bogdanm	0:9b334a45a8ff	617	/* Reset WAVE bit to set one pulse mode */
bogdanm	0:9b334a45a8ff	618	hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
bogdanm	0:9b334a45a8ff	619
bogdanm	0:9b334a45a8ff	620	/* Enable Autoreload write complete interrupt */
bogdanm	0:9b334a45a8ff	621	__HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK);
bogdanm	0:9b334a45a8ff	622
bogdanm	0:9b334a45a8ff	623	/* Enable Compare write complete interrupt */
bogdanm	0:9b334a45a8ff	624	__HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPOK);
bogdanm	0:9b334a45a8ff	625
bogdanm	0:9b334a45a8ff	626	/* Enable Autoreload match interrupt */
bogdanm	0:9b334a45a8ff	627	__HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM);
bogdanm	0:9b334a45a8ff	628
bogdanm	0:9b334a45a8ff	629	/* Enable Compare match interrupt */
bogdanm	0:9b334a45a8ff	630	__HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM);
bogdanm	0:9b334a45a8ff	631
bogdanm	0:9b334a45a8ff	632	/* If external trigger source is used, then enable external trigger interrupt */
bogdanm	0:9b334a45a8ff	633	if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
bogdanm	0:9b334a45a8ff	634	{
bogdanm	0:9b334a45a8ff	635	/* Enable external trigger interrupt */
bogdanm	0:9b334a45a8ff	636	__HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
bogdanm	0:9b334a45a8ff	637	}
bogdanm	0:9b334a45a8ff	638
bogdanm	0:9b334a45a8ff	639	/* Enable the Peripheral */
bogdanm	0:9b334a45a8ff	640	__HAL_LPTIM_ENABLE(hlptim);
bogdanm	0:9b334a45a8ff	641
bogdanm	0:9b334a45a8ff	642	/* Load the period value in the autoreload register */
bogdanm	0:9b334a45a8ff	643	__HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
bogdanm	0:9b334a45a8ff	644
bogdanm	0:9b334a45a8ff	645	/* Load the pulse value in the compare register */
bogdanm	0:9b334a45a8ff	646	__HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
bogdanm	0:9b334a45a8ff	647
bogdanm	0:9b334a45a8ff	648	/* Start timer in continuous mode */
bogdanm	0:9b334a45a8ff	649	__HAL_LPTIM_START_SINGLE(hlptim);
bogdanm	0:9b334a45a8ff	650
bogdanm	0:9b334a45a8ff	651	/* Change the TIM state*/
bogdanm	0:9b334a45a8ff	652	hlptim->State= HAL_LPTIM_STATE_READY;
bogdanm	0:9b334a45a8ff	653
bogdanm	0:9b334a45a8ff	654	/* Return function status */
bogdanm	0:9b334a45a8ff	655	return HAL_OK;
bogdanm	0:9b334a45a8ff	656	}
bogdanm	0:9b334a45a8ff	657
bogdanm	0:9b334a45a8ff	658	/**
bogdanm	0:9b334a45a8ff	659	* @brief Stop the LPTIM One pulse generation in interrupt mode.
bogdanm	0:9b334a45a8ff	660	* @param hlptim : LPTIM handle
bogdanm	0:9b334a45a8ff	661	* @retval HAL status
bogdanm	0:9b334a45a8ff	662	*/
bogdanm	0:9b334a45a8ff	663	HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop_IT(LPTIM_HandleTypeDef *hlptim)
bogdanm	0:9b334a45a8ff	664	{
bogdanm	0:9b334a45a8ff	665	/* Check the parameters */
bogdanm	0:9b334a45a8ff	666	assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm	0:9b334a45a8ff	667
bogdanm	0:9b334a45a8ff	668	/* Set the LPTIM state */
bogdanm	0:9b334a45a8ff	669	hlptim->State= HAL_LPTIM_STATE_BUSY;
bogdanm	0:9b334a45a8ff	670
bogdanm	0:9b334a45a8ff	671	/* Disable the Peripheral */
bogdanm	0:9b334a45a8ff	672	__HAL_LPTIM_DISABLE(hlptim);
bogdanm	0:9b334a45a8ff	673
bogdanm	0:9b334a45a8ff	674	/* Disable Autoreload write complete interrupt */
bogdanm	0:9b334a45a8ff	675	__HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK);
bogdanm	0:9b334a45a8ff	676
bogdanm	0:9b334a45a8ff	677	/* Disable Compare write complete interrupt */
bogdanm	0:9b334a45a8ff	678	__HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPOK);
bogdanm	0:9b334a45a8ff	679
bogdanm	0:9b334a45a8ff	680	/* Disable Autoreload match interrupt */
bogdanm	0:9b334a45a8ff	681	__HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM);
bogdanm	0:9b334a45a8ff	682
bogdanm	0:9b334a45a8ff	683	/* Disable Compare match interrupt */
bogdanm	0:9b334a45a8ff	684	__HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM);
bogdanm	0:9b334a45a8ff	685
bogdanm	0:9b334a45a8ff	686	/* If external trigger source is used, then disable external trigger interrupt */
bogdanm	0:9b334a45a8ff	687	if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
bogdanm	0:9b334a45a8ff	688	{
bogdanm	0:9b334a45a8ff	689	/* Disable external trigger interrupt */
bogdanm	0:9b334a45a8ff	690	__HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
bogdanm	0:9b334a45a8ff	691	}
bogdanm	0:9b334a45a8ff	692
bogdanm	0:9b334a45a8ff	693	/* Change the TIM state*/
bogdanm	0:9b334a45a8ff	694	hlptim->State= HAL_LPTIM_STATE_READY;
bogdanm	0:9b334a45a8ff	695
bogdanm	0:9b334a45a8ff	696	/* Return function status */
bogdanm	0:9b334a45a8ff	697	return HAL_OK;
bogdanm	0:9b334a45a8ff	698	}
bogdanm	0:9b334a45a8ff	699
bogdanm	0:9b334a45a8ff	700	/**
bogdanm	0:9b334a45a8ff	701	* @brief Start the LPTIM in Set once mode.
bogdanm	0:9b334a45a8ff	702	* @param hlptim : LPTIM handle
bogdanm	0:9b334a45a8ff	703	* @param Period : Specifies the Autoreload value.
bogdanm	0:9b334a45a8ff	704	* This parameter must be a value between 0x0000 and 0xFFFF.
bogdanm	0:9b334a45a8ff	705	* @param Pulse : Specifies the compare value.
bogdanm	0:9b334a45a8ff	706	* This parameter must be a value between 0x0000 and 0xFFFF.
bogdanm	0:9b334a45a8ff	707	* @retval HAL status
bogdanm	0:9b334a45a8ff	708	*/
bogdanm	0:9b334a45a8ff	709	HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
bogdanm	0:9b334a45a8ff	710	{
bogdanm	0:9b334a45a8ff	711	/* Check the parameters */
bogdanm	0:9b334a45a8ff	712	assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm	0:9b334a45a8ff	713	assert_param(IS_LPTIM_PERIOD(Period));
bogdanm	0:9b334a45a8ff	714	assert_param(IS_LPTIM_PULSE(Pulse));
bogdanm	0:9b334a45a8ff	715
bogdanm	0:9b334a45a8ff	716	/* Set the LPTIM state */
bogdanm	0:9b334a45a8ff	717	hlptim->State= HAL_LPTIM_STATE_BUSY;
bogdanm	0:9b334a45a8ff	718
bogdanm	0:9b334a45a8ff	719	/* Set WAVE bit to enable the set once mode */
bogdanm	0:9b334a45a8ff	720	hlptim->Instance->CFGR \|= LPTIM_CFGR_WAVE;
bogdanm	0:9b334a45a8ff	721
bogdanm	0:9b334a45a8ff	722	/* Enable the Peripheral */
bogdanm	0:9b334a45a8ff	723	__HAL_LPTIM_ENABLE(hlptim);
bogdanm	0:9b334a45a8ff	724
bogdanm	0:9b334a45a8ff	725	/* Load the period value in the autoreload register */
bogdanm	0:9b334a45a8ff	726	__HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
bogdanm	0:9b334a45a8ff	727
bogdanm	0:9b334a45a8ff	728	/* Load the pulse value in the compare register */
bogdanm	0:9b334a45a8ff	729	__HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
bogdanm	0:9b334a45a8ff	730
bogdanm	0:9b334a45a8ff	731	/* Start timer in continuous mode */
bogdanm	0:9b334a45a8ff	732	__HAL_LPTIM_START_SINGLE(hlptim);
bogdanm	0:9b334a45a8ff	733
bogdanm	0:9b334a45a8ff	734	/* Change the TIM state*/
bogdanm	0:9b334a45a8ff	735	hlptim->State= HAL_LPTIM_STATE_READY;
bogdanm	0:9b334a45a8ff	736
bogdanm	0:9b334a45a8ff	737	/* Return function status */
bogdanm	0:9b334a45a8ff	738	return HAL_OK;
bogdanm	0:9b334a45a8ff	739	}
bogdanm	0:9b334a45a8ff	740
bogdanm	0:9b334a45a8ff	741	/**
bogdanm	0:9b334a45a8ff	742	* @brief Stop the LPTIM Set once mode.
bogdanm	0:9b334a45a8ff	743	* @param hlptim : LPTIM handle
bogdanm	0:9b334a45a8ff	744	* @retval HAL status
bogdanm	0:9b334a45a8ff	745	*/
bogdanm	0:9b334a45a8ff	746	HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop(LPTIM_HandleTypeDef *hlptim)
bogdanm	0:9b334a45a8ff	747	{
bogdanm	0:9b334a45a8ff	748	/* Check the parameters */
bogdanm	0:9b334a45a8ff	749	assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm	0:9b334a45a8ff	750
bogdanm	0:9b334a45a8ff	751	/* Set the LPTIM state */
bogdanm	0:9b334a45a8ff	752	hlptim->State= HAL_LPTIM_STATE_BUSY;
bogdanm	0:9b334a45a8ff	753
bogdanm	0:9b334a45a8ff	754	/* Disable the Peripheral */
bogdanm	0:9b334a45a8ff	755	__HAL_LPTIM_DISABLE(hlptim);
bogdanm	0:9b334a45a8ff	756
bogdanm	0:9b334a45a8ff	757	/* Change the TIM state*/
bogdanm	0:9b334a45a8ff	758	hlptim->State= HAL_LPTIM_STATE_READY;
bogdanm	0:9b334a45a8ff	759
bogdanm	0:9b334a45a8ff	760	/* Return function status */
bogdanm	0:9b334a45a8ff	761	return HAL_OK;
bogdanm	0:9b334a45a8ff	762	}
bogdanm	0:9b334a45a8ff	763
bogdanm	0:9b334a45a8ff	764	/**
bogdanm	0:9b334a45a8ff	765	* @brief Start the LPTIM Set once mode in interrupt mode.
bogdanm	0:9b334a45a8ff	766	* @param hlptim : LPTIM handle
bogdanm	0:9b334a45a8ff	767	* @param Period : Specifies the Autoreload value.
bogdanm	0:9b334a45a8ff	768	* This parameter must be a value between 0x0000 and 0xFFFF.
bogdanm	0:9b334a45a8ff	769	* @param Pulse : Specifies the compare value.
bogdanm	0:9b334a45a8ff	770	* This parameter must be a value between 0x0000 and 0xFFFF.
bogdanm	0:9b334a45a8ff	771	* @retval HAL status
bogdanm	0:9b334a45a8ff	772	*/
bogdanm	0:9b334a45a8ff	773	HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
bogdanm	0:9b334a45a8ff	774	{
bogdanm	0:9b334a45a8ff	775	/* Check the parameters */
bogdanm	0:9b334a45a8ff	776	assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm	0:9b334a45a8ff	777	assert_param(IS_LPTIM_PERIOD(Period));
bogdanm	0:9b334a45a8ff	778	assert_param(IS_LPTIM_PULSE(Pulse));
bogdanm	0:9b334a45a8ff	779
bogdanm	0:9b334a45a8ff	780	/* Set the LPTIM state */
bogdanm	0:9b334a45a8ff	781	hlptim->State= HAL_LPTIM_STATE_BUSY;
bogdanm	0:9b334a45a8ff	782
bogdanm	0:9b334a45a8ff	783	/* Set WAVE bit to enable the set once mode */
bogdanm	0:9b334a45a8ff	784	hlptim->Instance->CFGR \|= LPTIM_CFGR_WAVE;
bogdanm	0:9b334a45a8ff	785
bogdanm	0:9b334a45a8ff	786	/* Enable Autoreload write complete interrupt */
bogdanm	0:9b334a45a8ff	787	__HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK);
bogdanm	0:9b334a45a8ff	788
bogdanm	0:9b334a45a8ff	789	/* Enable Compare write complete interrupt */
bogdanm	0:9b334a45a8ff	790	__HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPOK);
bogdanm	0:9b334a45a8ff	791
bogdanm	0:9b334a45a8ff	792	/* Enable Autoreload match interrupt */
bogdanm	0:9b334a45a8ff	793	__HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM);
bogdanm	0:9b334a45a8ff	794
bogdanm	0:9b334a45a8ff	795	/* Enable Compare match interrupt */
bogdanm	0:9b334a45a8ff	796	__HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM);
bogdanm	0:9b334a45a8ff	797
bogdanm	0:9b334a45a8ff	798	/* If external trigger source is used, then enable external trigger interrupt */
bogdanm	0:9b334a45a8ff	799	if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
bogdanm	0:9b334a45a8ff	800	{
bogdanm	0:9b334a45a8ff	801	/* Enable external trigger interrupt */
bogdanm	0:9b334a45a8ff	802	__HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
bogdanm	0:9b334a45a8ff	803	}
bogdanm	0:9b334a45a8ff	804
bogdanm	0:9b334a45a8ff	805	/* Enable the Peripheral */
bogdanm	0:9b334a45a8ff	806	__HAL_LPTIM_ENABLE(hlptim);
bogdanm	0:9b334a45a8ff	807
bogdanm	0:9b334a45a8ff	808	/* Load the period value in the autoreload register */
bogdanm	0:9b334a45a8ff	809	__HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
bogdanm	0:9b334a45a8ff	810
bogdanm	0:9b334a45a8ff	811	/* Load the pulse value in the compare register */
bogdanm	0:9b334a45a8ff	812	__HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
bogdanm	0:9b334a45a8ff	813
bogdanm	0:9b334a45a8ff	814	/* Start timer in continuous mode */
bogdanm	0:9b334a45a8ff	815	__HAL_LPTIM_START_SINGLE(hlptim);
bogdanm	0:9b334a45a8ff	816
bogdanm	0:9b334a45a8ff	817	/* Change the TIM state*/
bogdanm	0:9b334a45a8ff	818	hlptim->State= HAL_LPTIM_STATE_READY;
bogdanm	0:9b334a45a8ff	819
bogdanm	0:9b334a45a8ff	820	/* Return function status */
bogdanm	0:9b334a45a8ff	821	return HAL_OK;
bogdanm	0:9b334a45a8ff	822	}
bogdanm	0:9b334a45a8ff	823
bogdanm	0:9b334a45a8ff	824	/**
bogdanm	0:9b334a45a8ff	825	* @brief Stop the LPTIM Set once mode in interrupt mode.
bogdanm	0:9b334a45a8ff	826	* @param hlptim : LPTIM handle
bogdanm	0:9b334a45a8ff	827	* @retval HAL status
bogdanm	0:9b334a45a8ff	828	*/
bogdanm	0:9b334a45a8ff	829	HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop_IT(LPTIM_HandleTypeDef *hlptim)
bogdanm	0:9b334a45a8ff	830	{
bogdanm	0:9b334a45a8ff	831	/* Check the parameters */
bogdanm	0:9b334a45a8ff	832	assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm	0:9b334a45a8ff	833
bogdanm	0:9b334a45a8ff	834	/* Set the LPTIM state */
bogdanm	0:9b334a45a8ff	835	hlptim->State= HAL_LPTIM_STATE_BUSY;
bogdanm	0:9b334a45a8ff	836
bogdanm	0:9b334a45a8ff	837	/* Disable the Peripheral */
bogdanm	0:9b334a45a8ff	838	__HAL_LPTIM_DISABLE(hlptim);
bogdanm	0:9b334a45a8ff	839
bogdanm	0:9b334a45a8ff	840	/* Disable Autoreload write complete interrupt */
bogdanm	0:9b334a45a8ff	841	__HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK);
bogdanm	0:9b334a45a8ff	842
bogdanm	0:9b334a45a8ff	843	/* Disable Compare write complete interrupt */
bogdanm	0:9b334a45a8ff	844	__HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPOK);
bogdanm	0:9b334a45a8ff	845
bogdanm	0:9b334a45a8ff	846	/* Disable Autoreload match interrupt */
bogdanm	0:9b334a45a8ff	847	__HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM);
bogdanm	0:9b334a45a8ff	848
bogdanm	0:9b334a45a8ff	849	/* Disable Compare match interrupt */
bogdanm	0:9b334a45a8ff	850	__HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM);
bogdanm	0:9b334a45a8ff	851
bogdanm	0:9b334a45a8ff	852	/* If external trigger source is used, then disable external trigger interrupt */
bogdanm	0:9b334a45a8ff	853	if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
bogdanm	0:9b334a45a8ff	854	{
bogdanm	0:9b334a45a8ff	855	/* Disable external trigger interrupt */
bogdanm	0:9b334a45a8ff	856	__HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
bogdanm	0:9b334a45a8ff	857	}
bogdanm	0:9b334a45a8ff	858
bogdanm	0:9b334a45a8ff	859	/* Change the TIM state*/
bogdanm	0:9b334a45a8ff	860	hlptim->State= HAL_LPTIM_STATE_READY;
bogdanm	0:9b334a45a8ff	861
bogdanm	0:9b334a45a8ff	862	/* Return function status */
bogdanm	0:9b334a45a8ff	863	return HAL_OK;
bogdanm	0:9b334a45a8ff	864	}
bogdanm	0:9b334a45a8ff	865
bogdanm	0:9b334a45a8ff	866	/**
bogdanm	0:9b334a45a8ff	867	* @brief Start the Encoder interface.
bogdanm	0:9b334a45a8ff	868	* @param hlptim : LPTIM handle
bogdanm	0:9b334a45a8ff	869	* @param Period : Specifies the Autoreload value.
bogdanm	0:9b334a45a8ff	870	* This parameter must be a value between 0x0000 and 0xFFFF.
bogdanm	0:9b334a45a8ff	871	* @retval HAL status
bogdanm	0:9b334a45a8ff	872	*/
bogdanm	0:9b334a45a8ff	873	HAL_StatusTypeDef HAL_LPTIM_Encoder_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
bogdanm	0:9b334a45a8ff	874	{
bogdanm	0:9b334a45a8ff	875	HAL_StatusTypeDef status = HAL_OK;
bogdanm	0:9b334a45a8ff	876	uint32_t tmpcfgr;
bogdanm	0:9b334a45a8ff	877
bogdanm	0:9b334a45a8ff	878	/* Check the parameters */
bogdanm	0:9b334a45a8ff	879	assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm	0:9b334a45a8ff	880	assert_param(IS_LPTIM_PERIOD(Period));
bogdanm	0:9b334a45a8ff	881	assert_param(hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC);
bogdanm	0:9b334a45a8ff	882	assert_param(hlptim->Init.Clock.Prescaler == LPTIM_PRESCALER_DIV1);
bogdanm	0:9b334a45a8ff	883	assert_param(IS_LPTIM_CLOCK_POLARITY(hlptim->Init.UltraLowPowerClock.Polarity));
bogdanm	0:9b334a45a8ff	884
bogdanm	0:9b334a45a8ff	885	/* Encoder feature is only available for LPTIM1 instance */
bogdanm	0:9b334a45a8ff	886	if (hlptim->Instance == LPTIM1)
bogdanm	0:9b334a45a8ff	887	{
bogdanm	0:9b334a45a8ff	888	/* Set the LPTIM state */
bogdanm	0:9b334a45a8ff	889	hlptim->State= HAL_LPTIM_STATE_BUSY;
bogdanm	0:9b334a45a8ff	890
bogdanm	0:9b334a45a8ff	891	/* Get the LPTIMx CFGR value */
bogdanm	0:9b334a45a8ff	892	tmpcfgr = hlptim->Instance->CFGR;
bogdanm	0:9b334a45a8ff	893
bogdanm	0:9b334a45a8ff	894	/* Clear CKPOL bits */
bogdanm	0:9b334a45a8ff	895	tmpcfgr &= (uint32_t)(~LPTIM_CFGR_CKPOL);
bogdanm	0:9b334a45a8ff	896
bogdanm	0:9b334a45a8ff	897	/* Set Input polarity */
bogdanm	0:9b334a45a8ff	898	tmpcfgr \|= hlptim->Init.UltraLowPowerClock.Polarity;
bogdanm	0:9b334a45a8ff	899
bogdanm	0:9b334a45a8ff	900	/* Write to LPTIMx CFGR */
bogdanm	0:9b334a45a8ff	901	hlptim->Instance->CFGR = tmpcfgr;
bogdanm	0:9b334a45a8ff	902
bogdanm	0:9b334a45a8ff	903	/* Set ENC bit to enable the encoder interface */
bogdanm	0:9b334a45a8ff	904	hlptim->Instance->CFGR \|= LPTIM_CFGR_ENC;
bogdanm	0:9b334a45a8ff	905
bogdanm	0:9b334a45a8ff	906	/* Enable the Peripheral */
bogdanm	0:9b334a45a8ff	907	__HAL_LPTIM_ENABLE(hlptim);
bogdanm	0:9b334a45a8ff	908
bogdanm	0:9b334a45a8ff	909	/* Load the period value in the autoreload register */
bogdanm	0:9b334a45a8ff	910	__HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
bogdanm	0:9b334a45a8ff	911
bogdanm	0:9b334a45a8ff	912	/* Start timer in continuous mode */
bogdanm	0:9b334a45a8ff	913	__HAL_LPTIM_START_CONTINUOUS(hlptim);
bogdanm	0:9b334a45a8ff	914
bogdanm	0:9b334a45a8ff	915	/* Change the TIM state*/
bogdanm	0:9b334a45a8ff	916	hlptim->State= HAL_LPTIM_STATE_READY;
bogdanm	0:9b334a45a8ff	917	}
bogdanm	0:9b334a45a8ff	918	else
bogdanm	0:9b334a45a8ff	919	{
bogdanm	0:9b334a45a8ff	920	status = HAL_ERROR;
bogdanm	0:9b334a45a8ff	921	}
bogdanm	0:9b334a45a8ff	922
bogdanm	0:9b334a45a8ff	923	/* Return function status */
bogdanm	0:9b334a45a8ff	924	return status;
bogdanm	0:9b334a45a8ff	925	}
bogdanm	0:9b334a45a8ff	926
bogdanm	0:9b334a45a8ff	927	/**
bogdanm	0:9b334a45a8ff	928	* @brief Stop the Encoder interface.
bogdanm	0:9b334a45a8ff	929	* @param hlptim : LPTIM handle
bogdanm	0:9b334a45a8ff	930	* @retval HAL status
bogdanm	0:9b334a45a8ff	931	*/
bogdanm	0:9b334a45a8ff	932	HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop(LPTIM_HandleTypeDef *hlptim)
bogdanm	0:9b334a45a8ff	933	{
bogdanm	0:9b334a45a8ff	934	/* Check the parameters */
bogdanm	0:9b334a45a8ff	935	assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm	0:9b334a45a8ff	936
bogdanm	0:9b334a45a8ff	937	/* Set the LPTIM state */
bogdanm	0:9b334a45a8ff	938	hlptim->State= HAL_LPTIM_STATE_BUSY;
bogdanm	0:9b334a45a8ff	939
bogdanm	0:9b334a45a8ff	940	/* Disable the Peripheral */
bogdanm	0:9b334a45a8ff	941	__HAL_LPTIM_DISABLE(hlptim);
bogdanm	0:9b334a45a8ff	942
bogdanm	0:9b334a45a8ff	943	/* Reset ENC bit to disable the encoder interface */
bogdanm	0:9b334a45a8ff	944	hlptim->Instance->CFGR &= ~LPTIM_CFGR_ENC;
bogdanm	0:9b334a45a8ff	945
bogdanm	0:9b334a45a8ff	946	/* Change the TIM state*/
bogdanm	0:9b334a45a8ff	947	hlptim->State= HAL_LPTIM_STATE_READY;
bogdanm	0:9b334a45a8ff	948
bogdanm	0:9b334a45a8ff	949	/* Return function status */
bogdanm	0:9b334a45a8ff	950	return HAL_OK;
bogdanm	0:9b334a45a8ff	951	}
bogdanm	0:9b334a45a8ff	952
bogdanm	0:9b334a45a8ff	953	/**
bogdanm	0:9b334a45a8ff	954	* @brief Start the Encoder interface in interrupt mode.
bogdanm	0:9b334a45a8ff	955	* @param hlptim : LPTIM handle
bogdanm	0:9b334a45a8ff	956	* @param Period : Specifies the Autoreload value.
bogdanm	0:9b334a45a8ff	957	* This parameter must be a value between 0x0000 and 0xFFFF.
bogdanm	0:9b334a45a8ff	958	* @retval HAL status
bogdanm	0:9b334a45a8ff	959	*/
bogdanm	0:9b334a45a8ff	960	HAL_StatusTypeDef HAL_LPTIM_Encoder_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
bogdanm	0:9b334a45a8ff	961	{
bogdanm	0:9b334a45a8ff	962	HAL_StatusTypeDef status = HAL_OK;
bogdanm	0:9b334a45a8ff	963	uint32_t tmpcfgr;
bogdanm	0:9b334a45a8ff	964
bogdanm	0:9b334a45a8ff	965	/* Check the parameters */
bogdanm	0:9b334a45a8ff	966	assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm	0:9b334a45a8ff	967	assert_param(IS_LPTIM_PERIOD(Period));
bogdanm	0:9b334a45a8ff	968	assert_param(hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC);
bogdanm	0:9b334a45a8ff	969	assert_param(hlptim->Init.Clock.Prescaler == LPTIM_PRESCALER_DIV1);
bogdanm	0:9b334a45a8ff	970	assert_param(IS_LPTIM_CLOCK_POLARITY(hlptim->Init.UltraLowPowerClock.Polarity));
bogdanm	0:9b334a45a8ff	971
bogdanm	0:9b334a45a8ff	972	/* Encoder feature is only available for LPTIM1 instance */
bogdanm	0:9b334a45a8ff	973	if (hlptim->Instance == LPTIM1)
bogdanm	0:9b334a45a8ff	974	{
bogdanm	0:9b334a45a8ff	975	/* Set the LPTIM state */
bogdanm	0:9b334a45a8ff	976	hlptim->State= HAL_LPTIM_STATE_BUSY;
bogdanm	0:9b334a45a8ff	977
bogdanm	0:9b334a45a8ff	978	/* Configure edge sensitivity for encoder mode */
bogdanm	0:9b334a45a8ff	979	/* Get the LPTIMx CFGR value */
bogdanm	0:9b334a45a8ff	980	tmpcfgr = hlptim->Instance->CFGR;
bogdanm	0:9b334a45a8ff	981
bogdanm	0:9b334a45a8ff	982	/* Clear CKPOL bits */
bogdanm	0:9b334a45a8ff	983	tmpcfgr &= (uint32_t)(~LPTIM_CFGR_CKPOL);
bogdanm	0:9b334a45a8ff	984
bogdanm	0:9b334a45a8ff	985	/* Set Input polarity */
bogdanm	0:9b334a45a8ff	986	tmpcfgr \|= hlptim->Init.UltraLowPowerClock.Polarity;
bogdanm	0:9b334a45a8ff	987
bogdanm	0:9b334a45a8ff	988	/* Write to LPTIMx CFGR */
bogdanm	0:9b334a45a8ff	989	hlptim->Instance->CFGR = tmpcfgr;
bogdanm	0:9b334a45a8ff	990
bogdanm	0:9b334a45a8ff	991	/* Set ENC bit to enable the encoder interface */
bogdanm	0:9b334a45a8ff	992	hlptim->Instance->CFGR \|= LPTIM_CFGR_ENC;
bogdanm	0:9b334a45a8ff	993
bogdanm	0:9b334a45a8ff	994	/* Enable "switch to down direction" interrupt */
bogdanm	0:9b334a45a8ff	995	__HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_DOWN);
bogdanm	0:9b334a45a8ff	996
bogdanm	0:9b334a45a8ff	997	/* Enable "switch to up direction" interrupt */
bogdanm	0:9b334a45a8ff	998	__HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_UP);
bogdanm	0:9b334a45a8ff	999
bogdanm	0:9b334a45a8ff	1000	/* Enable the Peripheral */
bogdanm	0:9b334a45a8ff	1001	__HAL_LPTIM_ENABLE(hlptim);
bogdanm	0:9b334a45a8ff	1002
bogdanm	0:9b334a45a8ff	1003	/* Load the period value in the autoreload register */
bogdanm	0:9b334a45a8ff	1004	__HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
bogdanm	0:9b334a45a8ff	1005
bogdanm	0:9b334a45a8ff	1006	/* Start timer in continuous mode */
bogdanm	0:9b334a45a8ff	1007	__HAL_LPTIM_START_CONTINUOUS(hlptim);
bogdanm	0:9b334a45a8ff	1008
bogdanm	0:9b334a45a8ff	1009	/* Change the TIM state*/
bogdanm	0:9b334a45a8ff	1010	hlptim->State= HAL_LPTIM_STATE_READY;
bogdanm	0:9b334a45a8ff	1011	}
bogdanm	0:9b334a45a8ff	1012	else
bogdanm	0:9b334a45a8ff	1013	{
bogdanm	0:9b334a45a8ff	1014	status = HAL_ERROR;
bogdanm	0:9b334a45a8ff	1015	}
bogdanm	0:9b334a45a8ff	1016
bogdanm	0:9b334a45a8ff	1017	/* Return function status */
bogdanm	0:9b334a45a8ff	1018	return status;
bogdanm	0:9b334a45a8ff	1019	}
bogdanm	0:9b334a45a8ff	1020
bogdanm	0:9b334a45a8ff	1021	/**
bogdanm	0:9b334a45a8ff	1022	* @brief Stop the Encoder interface in interrupt mode.
bogdanm	0:9b334a45a8ff	1023	* @param hlptim : LPTIM handle
bogdanm	0:9b334a45a8ff	1024	* @retval HAL status
bogdanm	0:9b334a45a8ff	1025	*/
bogdanm	0:9b334a45a8ff	1026	HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop_IT(LPTIM_HandleTypeDef *hlptim)
bogdanm	0:9b334a45a8ff	1027	{
bogdanm	0:9b334a45a8ff	1028	/* Check the parameters */
bogdanm	0:9b334a45a8ff	1029	assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm	0:9b334a45a8ff	1030
bogdanm	0:9b334a45a8ff	1031	/* Set the LPTIM state */
bogdanm	0:9b334a45a8ff	1032	hlptim->State= HAL_LPTIM_STATE_BUSY;
bogdanm	0:9b334a45a8ff	1033
bogdanm	0:9b334a45a8ff	1034	/* Disable the Peripheral */
bogdanm	0:9b334a45a8ff	1035	__HAL_LPTIM_DISABLE(hlptim);
bogdanm	0:9b334a45a8ff	1036
bogdanm	0:9b334a45a8ff	1037	/* Reset ENC bit to disable the encoder interface */
bogdanm	0:9b334a45a8ff	1038	hlptim->Instance->CFGR &= ~LPTIM_CFGR_ENC;
bogdanm	0:9b334a45a8ff	1039
bogdanm	0:9b334a45a8ff	1040	/* Disable "switch to down direction" interrupt */
bogdanm	0:9b334a45a8ff	1041	__HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_DOWN);
bogdanm	0:9b334a45a8ff	1042
bogdanm	0:9b334a45a8ff	1043	/* Disable "switch to up direction" interrupt */
bogdanm	0:9b334a45a8ff	1044	__HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_UP);
bogdanm	0:9b334a45a8ff	1045
bogdanm	0:9b334a45a8ff	1046	/* Change the TIM state*/
bogdanm	0:9b334a45a8ff	1047	hlptim->State= HAL_LPTIM_STATE_READY;
bogdanm	0:9b334a45a8ff	1048
bogdanm	0:9b334a45a8ff	1049	/* Return function status */
bogdanm	0:9b334a45a8ff	1050	return HAL_OK;
bogdanm	0:9b334a45a8ff	1051	}
bogdanm	0:9b334a45a8ff	1052
bogdanm	0:9b334a45a8ff	1053	/**
bogdanm	0:9b334a45a8ff	1054	* @brief Start the Timeout function.
bogdanm	0:9b334a45a8ff	1055	* @note The first trigger event will start the timer, any successive
bogdanm	0:9b334a45a8ff	1056	* trigger event will reset the counter and the timer restarts.
bogdanm	0:9b334a45a8ff	1057	* @param hlptim : LPTIM handle
bogdanm	0:9b334a45a8ff	1058	* @param Period : Specifies the Autoreload value.
bogdanm	0:9b334a45a8ff	1059	* This parameter must be a value between 0x0000 and 0xFFFF.
bogdanm	0:9b334a45a8ff	1060	* @param Timeout : Specifies the TimeOut value to rest the counter.
bogdanm	0:9b334a45a8ff	1061	* This parameter must be a value between 0x0000 and 0xFFFF.
bogdanm	0:9b334a45a8ff	1062	* @retval HAL status
bogdanm	0:9b334a45a8ff	1063	*/
bogdanm	0:9b334a45a8ff	1064	HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Timeout)
bogdanm	0:9b334a45a8ff	1065	{
bogdanm	0:9b334a45a8ff	1066	/* Check the parameters */
bogdanm	0:9b334a45a8ff	1067	assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm	0:9b334a45a8ff	1068	assert_param(IS_LPTIM_PERIOD(Period));
bogdanm	0:9b334a45a8ff	1069	assert_param(IS_LPTIM_PULSE(Timeout));
bogdanm	0:9b334a45a8ff	1070
bogdanm	0:9b334a45a8ff	1071	/* Set the LPTIM state */
bogdanm	0:9b334a45a8ff	1072	hlptim->State= HAL_LPTIM_STATE_BUSY;
bogdanm	0:9b334a45a8ff	1073
bogdanm	0:9b334a45a8ff	1074	/* Set TIMOUT bit to enable the timeout function */
bogdanm	0:9b334a45a8ff	1075	hlptim->Instance->CFGR \|= LPTIM_CFGR_TIMOUT;
bogdanm	0:9b334a45a8ff	1076
bogdanm	0:9b334a45a8ff	1077	/* Enable the Peripheral */
bogdanm	0:9b334a45a8ff	1078	__HAL_LPTIM_ENABLE(hlptim);
bogdanm	0:9b334a45a8ff	1079
bogdanm	0:9b334a45a8ff	1080	/* Load the period value in the autoreload register */
bogdanm	0:9b334a45a8ff	1081	__HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
bogdanm	0:9b334a45a8ff	1082
bogdanm	0:9b334a45a8ff	1083	/* Load the Timeout value in the compare register */
bogdanm	0:9b334a45a8ff	1084	__HAL_LPTIM_COMPARE_SET(hlptim, Timeout);
bogdanm	0:9b334a45a8ff	1085
bogdanm	0:9b334a45a8ff	1086	/* Start timer in continuous mode */
bogdanm	0:9b334a45a8ff	1087	__HAL_LPTIM_START_CONTINUOUS(hlptim);
bogdanm	0:9b334a45a8ff	1088
bogdanm	0:9b334a45a8ff	1089	/* Change the TIM state*/
bogdanm	0:9b334a45a8ff	1090	hlptim->State= HAL_LPTIM_STATE_READY;
bogdanm	0:9b334a45a8ff	1091
bogdanm	0:9b334a45a8ff	1092	/* Return function status */
bogdanm	0:9b334a45a8ff	1093	return HAL_OK;
bogdanm	0:9b334a45a8ff	1094	}
bogdanm	0:9b334a45a8ff	1095
bogdanm	0:9b334a45a8ff	1096	/**
bogdanm	0:9b334a45a8ff	1097	* @brief Stop the Timeout function.
bogdanm	0:9b334a45a8ff	1098	* @param hlptim : LPTIM handle
bogdanm	0:9b334a45a8ff	1099	* @retval HAL status
bogdanm	0:9b334a45a8ff	1100	*/
bogdanm	0:9b334a45a8ff	1101	HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop(LPTIM_HandleTypeDef *hlptim)
bogdanm	0:9b334a45a8ff	1102	{
bogdanm	0:9b334a45a8ff	1103	/* Check the parameters */
bogdanm	0:9b334a45a8ff	1104	assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm	0:9b334a45a8ff	1105
bogdanm	0:9b334a45a8ff	1106	/* Set the LPTIM state */
bogdanm	0:9b334a45a8ff	1107	hlptim->State= HAL_LPTIM_STATE_BUSY;
bogdanm	0:9b334a45a8ff	1108
bogdanm	0:9b334a45a8ff	1109	/* Disable the Peripheral */
bogdanm	0:9b334a45a8ff	1110	__HAL_LPTIM_DISABLE(hlptim);
bogdanm	0:9b334a45a8ff	1111
bogdanm	0:9b334a45a8ff	1112	/* Reset TIMOUT bit to enable the timeout function */
bogdanm	0:9b334a45a8ff	1113	hlptim->Instance->CFGR &= ~LPTIM_CFGR_TIMOUT;
bogdanm	0:9b334a45a8ff	1114
bogdanm	0:9b334a45a8ff	1115	/* Change the TIM state*/
bogdanm	0:9b334a45a8ff	1116	hlptim->State= HAL_LPTIM_STATE_READY;
bogdanm	0:9b334a45a8ff	1117
bogdanm	0:9b334a45a8ff	1118	/* Return function status */
bogdanm	0:9b334a45a8ff	1119	return HAL_OK;
bogdanm	0:9b334a45a8ff	1120	}
bogdanm	0:9b334a45a8ff	1121
bogdanm	0:9b334a45a8ff	1122	/**
bogdanm	0:9b334a45a8ff	1123	* @brief Start the Timeout function in interrupt mode.
bogdanm	0:9b334a45a8ff	1124	* @note The first trigger event will start the timer, any successive
bogdanm	0:9b334a45a8ff	1125	* trigger event will reset the counter and the timer restarts.
bogdanm	0:9b334a45a8ff	1126	* @param hlptim : LPTIM handle
bogdanm	0:9b334a45a8ff	1127	* @param Period : Specifies the Autoreload value.
bogdanm	0:9b334a45a8ff	1128	* This parameter must be a value between 0x0000 and 0xFFFF.
bogdanm	0:9b334a45a8ff	1129	* @param Timeout : Specifies the TimeOut value to rest the counter.
bogdanm	0:9b334a45a8ff	1130	* This parameter must be a value between 0x0000 and 0xFFFF.
bogdanm	0:9b334a45a8ff	1131	* @retval HAL status
bogdanm	0:9b334a45a8ff	1132	*/
bogdanm	0:9b334a45a8ff	1133	HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Timeout)
bogdanm	0:9b334a45a8ff	1134	{
bogdanm	0:9b334a45a8ff	1135	/* Check the parameters */
bogdanm	0:9b334a45a8ff	1136	assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm	0:9b334a45a8ff	1137	assert_param(IS_LPTIM_PERIOD(Period));
bogdanm	0:9b334a45a8ff	1138	assert_param(IS_LPTIM_PULSE(Timeout));
bogdanm	0:9b334a45a8ff	1139
bogdanm	0:9b334a45a8ff	1140	/* Set the LPTIM state */
bogdanm	0:9b334a45a8ff	1141	hlptim->State= HAL_LPTIM_STATE_BUSY;
bogdanm	0:9b334a45a8ff	1142
bogdanm	0:9b334a45a8ff	1143	/* Set TIMOUT bit to enable the timeout function */
bogdanm	0:9b334a45a8ff	1144	hlptim->Instance->CFGR \|= LPTIM_CFGR_TIMOUT;
bogdanm	0:9b334a45a8ff	1145
bogdanm	0:9b334a45a8ff	1146	/* Enable Compare match interrupt */
bogdanm	0:9b334a45a8ff	1147	__HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM);
bogdanm	0:9b334a45a8ff	1148
bogdanm	0:9b334a45a8ff	1149	/* Enable the Peripheral */
bogdanm	0:9b334a45a8ff	1150	__HAL_LPTIM_ENABLE(hlptim);
bogdanm	0:9b334a45a8ff	1151
bogdanm	0:9b334a45a8ff	1152	/* Load the period value in the autoreload register */
bogdanm	0:9b334a45a8ff	1153	__HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
bogdanm	0:9b334a45a8ff	1154
bogdanm	0:9b334a45a8ff	1155	/* Load the Timeout value in the compare register */
bogdanm	0:9b334a45a8ff	1156	__HAL_LPTIM_COMPARE_SET(hlptim, Timeout);
bogdanm	0:9b334a45a8ff	1157
bogdanm	0:9b334a45a8ff	1158	/* Start timer in continuous mode */
bogdanm	0:9b334a45a8ff	1159	__HAL_LPTIM_START_CONTINUOUS(hlptim);
bogdanm	0:9b334a45a8ff	1160
bogdanm	0:9b334a45a8ff	1161	/* Change the TIM state*/
bogdanm	0:9b334a45a8ff	1162	hlptim->State= HAL_LPTIM_STATE_READY;
bogdanm	0:9b334a45a8ff	1163
bogdanm	0:9b334a45a8ff	1164	/* Return function status */
bogdanm	0:9b334a45a8ff	1165	return HAL_OK;
bogdanm	0:9b334a45a8ff	1166	}
bogdanm	0:9b334a45a8ff	1167
bogdanm	0:9b334a45a8ff	1168	/**
bogdanm	0:9b334a45a8ff	1169	* @brief Stop the Timeout function in interrupt mode.
bogdanm	0:9b334a45a8ff	1170	* @param hlptim : LPTIM handle
bogdanm	0:9b334a45a8ff	1171	* @retval HAL status
bogdanm	0:9b334a45a8ff	1172	*/
bogdanm	0:9b334a45a8ff	1173	HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop_IT(LPTIM_HandleTypeDef *hlptim)
bogdanm	0:9b334a45a8ff	1174	{
bogdanm	0:9b334a45a8ff	1175	/* Check the parameters */
bogdanm	0:9b334a45a8ff	1176	assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm	0:9b334a45a8ff	1177
bogdanm	0:9b334a45a8ff	1178	/* Set the LPTIM state */
bogdanm	0:9b334a45a8ff	1179	hlptim->State= HAL_LPTIM_STATE_BUSY;
bogdanm	0:9b334a45a8ff	1180
bogdanm	0:9b334a45a8ff	1181	/* Disable the Peripheral */
bogdanm	0:9b334a45a8ff	1182	__HAL_LPTIM_DISABLE(hlptim);
bogdanm	0:9b334a45a8ff	1183
bogdanm	0:9b334a45a8ff	1184	/* Reset TIMOUT bit to enable the timeout function */
bogdanm	0:9b334a45a8ff	1185	hlptim->Instance->CFGR &= ~LPTIM_CFGR_TIMOUT;
bogdanm	0:9b334a45a8ff	1186
bogdanm	0:9b334a45a8ff	1187	/* Disable Compare match interrupt */
bogdanm	0:9b334a45a8ff	1188	__HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM);
bogdanm	0:9b334a45a8ff	1189
bogdanm	0:9b334a45a8ff	1190	/* Change the TIM state*/
bogdanm	0:9b334a45a8ff	1191	hlptim->State= HAL_LPTIM_STATE_READY;
bogdanm	0:9b334a45a8ff	1192
bogdanm	0:9b334a45a8ff	1193	/* Return function status */
bogdanm	0:9b334a45a8ff	1194	return HAL_OK;
bogdanm	0:9b334a45a8ff	1195	}
bogdanm	0:9b334a45a8ff	1196
bogdanm	0:9b334a45a8ff	1197	/**
bogdanm	0:9b334a45a8ff	1198	* @brief Start the Counter mode.
bogdanm	0:9b334a45a8ff	1199	* @param hlptim : LPTIM handle
bogdanm	0:9b334a45a8ff	1200	* @param Period : Specifies the Autoreload value.
bogdanm	0:9b334a45a8ff	1201	* This parameter must be a value between 0x0000 and 0xFFFF.
bogdanm	0:9b334a45a8ff	1202	* @retval HAL status
bogdanm	0:9b334a45a8ff	1203	*/
bogdanm	0:9b334a45a8ff	1204	HAL_StatusTypeDef HAL_LPTIM_Counter_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
bogdanm	0:9b334a45a8ff	1205	{
bogdanm	0:9b334a45a8ff	1206	/* Check the parameters */
bogdanm	0:9b334a45a8ff	1207	assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm	0:9b334a45a8ff	1208	assert_param(IS_LPTIM_PERIOD(Period));
bogdanm	0:9b334a45a8ff	1209
bogdanm	0:9b334a45a8ff	1210	/* Set the LPTIM state */
bogdanm	0:9b334a45a8ff	1211	hlptim->State= HAL_LPTIM_STATE_BUSY;
bogdanm	0:9b334a45a8ff	1212
bogdanm	0:9b334a45a8ff	1213	/* If clock source is not ULPTIM clock and counter source is external, then it must not be prescaled */
bogdanm	0:9b334a45a8ff	1214	if((hlptim->Init.Clock.Source != LPTIM_CLOCKSOURCE_ULPTIM) && (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL))
bogdanm	0:9b334a45a8ff	1215	{
bogdanm	0:9b334a45a8ff	1216	/* Check if clock is prescaled */
bogdanm	0:9b334a45a8ff	1217	assert_param(IS_LPTIM_CLOCK_PRESCALERDIV1(hlptim->Init.Clock.Prescaler));
bogdanm	0:9b334a45a8ff	1218	/* Set clock prescaler to 0 */
bogdanm	0:9b334a45a8ff	1219	hlptim->Instance->CFGR &= ~LPTIM_CFGR_PRESC;
bogdanm	0:9b334a45a8ff	1220	}
bogdanm	0:9b334a45a8ff	1221
bogdanm	0:9b334a45a8ff	1222	/* Enable the Peripheral */
bogdanm	0:9b334a45a8ff	1223	__HAL_LPTIM_ENABLE(hlptim);
bogdanm	0:9b334a45a8ff	1224
bogdanm	0:9b334a45a8ff	1225	/* Load the period value in the autoreload register */
bogdanm	0:9b334a45a8ff	1226	__HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
bogdanm	0:9b334a45a8ff	1227
bogdanm	0:9b334a45a8ff	1228	/* Start timer in continuous mode */
bogdanm	0:9b334a45a8ff	1229	__HAL_LPTIM_START_CONTINUOUS(hlptim);
bogdanm	0:9b334a45a8ff	1230
bogdanm	0:9b334a45a8ff	1231	/* Change the TIM state*/
bogdanm	0:9b334a45a8ff	1232	hlptim->State= HAL_LPTIM_STATE_READY;
bogdanm	0:9b334a45a8ff	1233
bogdanm	0:9b334a45a8ff	1234	/* Return function status */
bogdanm	0:9b334a45a8ff	1235	return HAL_OK;
bogdanm	0:9b334a45a8ff	1236	}
bogdanm	0:9b334a45a8ff	1237
bogdanm	0:9b334a45a8ff	1238	/**
bogdanm	0:9b334a45a8ff	1239	* @brief Stop the Counter mode.
bogdanm	0:9b334a45a8ff	1240	* @param hlptim : LPTIM handle
bogdanm	0:9b334a45a8ff	1241	* @retval HAL status
bogdanm	0:9b334a45a8ff	1242	*/
bogdanm	0:9b334a45a8ff	1243	HAL_StatusTypeDef HAL_LPTIM_Counter_Stop(LPTIM_HandleTypeDef *hlptim)
bogdanm	0:9b334a45a8ff	1244	{
bogdanm	0:9b334a45a8ff	1245	/* Check the parameters */
bogdanm	0:9b334a45a8ff	1246	assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm	0:9b334a45a8ff	1247
bogdanm	0:9b334a45a8ff	1248	/* Set the LPTIM state */
bogdanm	0:9b334a45a8ff	1249	hlptim->State= HAL_LPTIM_STATE_BUSY;
bogdanm	0:9b334a45a8ff	1250
bogdanm	0:9b334a45a8ff	1251	/* Disable the Peripheral */
bogdanm	0:9b334a45a8ff	1252	__HAL_LPTIM_DISABLE(hlptim);
bogdanm	0:9b334a45a8ff	1253
bogdanm	0:9b334a45a8ff	1254	/* Change the TIM state*/
bogdanm	0:9b334a45a8ff	1255	hlptim->State= HAL_LPTIM_STATE_READY;
bogdanm	0:9b334a45a8ff	1256
bogdanm	0:9b334a45a8ff	1257	/* Return function status */
bogdanm	0:9b334a45a8ff	1258	return HAL_OK;
bogdanm	0:9b334a45a8ff	1259	}
bogdanm	0:9b334a45a8ff	1260
bogdanm	0:9b334a45a8ff	1261	/**
bogdanm	0:9b334a45a8ff	1262	* @brief Start the Counter mode in interrupt mode.
bogdanm	0:9b334a45a8ff	1263	* @param hlptim : LPTIM handle
bogdanm	0:9b334a45a8ff	1264	* @param Period : Specifies the Autoreload value.
bogdanm	0:9b334a45a8ff	1265	* This parameter must be a value between 0x0000 and 0xFFFF.
bogdanm	0:9b334a45a8ff	1266	* @retval HAL status
bogdanm	0:9b334a45a8ff	1267	*/
bogdanm	0:9b334a45a8ff	1268	HAL_StatusTypeDef HAL_LPTIM_Counter_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
bogdanm	0:9b334a45a8ff	1269	{
bogdanm	0:9b334a45a8ff	1270	/* Check the parameters */
bogdanm	0:9b334a45a8ff	1271	assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm	0:9b334a45a8ff	1272	assert_param(IS_LPTIM_PERIOD(Period));
bogdanm	0:9b334a45a8ff	1273
bogdanm	0:9b334a45a8ff	1274	/* Set the LPTIM state */
bogdanm	0:9b334a45a8ff	1275	hlptim->State= HAL_LPTIM_STATE_BUSY;
bogdanm	0:9b334a45a8ff	1276
bogdanm	0:9b334a45a8ff	1277	/* If clock source is not ULPTIM clock and counter source is external, then it must not be prescaled */
bogdanm	0:9b334a45a8ff	1278	if((hlptim->Init.Clock.Source != LPTIM_CLOCKSOURCE_ULPTIM) && (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL))
bogdanm	0:9b334a45a8ff	1279	{
bogdanm	0:9b334a45a8ff	1280	/* Check if clock is prescaled */
bogdanm	0:9b334a45a8ff	1281	assert_param(IS_LPTIM_CLOCK_PRESCALERDIV1(hlptim->Init.Clock.Prescaler));
bogdanm	0:9b334a45a8ff	1282	/* Set clock prescaler to 0 */
bogdanm	0:9b334a45a8ff	1283	hlptim->Instance->CFGR &= ~LPTIM_CFGR_PRESC;
bogdanm	0:9b334a45a8ff	1284	}
bogdanm	0:9b334a45a8ff	1285
bogdanm	0:9b334a45a8ff	1286	/* Enable Autoreload write complete interrupt */
bogdanm	0:9b334a45a8ff	1287	__HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK);
bogdanm	0:9b334a45a8ff	1288
bogdanm	0:9b334a45a8ff	1289	/* Enable Autoreload match interrupt */
bogdanm	0:9b334a45a8ff	1290	__HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM);
bogdanm	0:9b334a45a8ff	1291
bogdanm	0:9b334a45a8ff	1292	/* Enable the Peripheral */
bogdanm	0:9b334a45a8ff	1293	__HAL_LPTIM_ENABLE(hlptim);
bogdanm	0:9b334a45a8ff	1294
bogdanm	0:9b334a45a8ff	1295	/* Load the period value in the autoreload register */
bogdanm	0:9b334a45a8ff	1296	__HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
bogdanm	0:9b334a45a8ff	1297
bogdanm	0:9b334a45a8ff	1298	/* Start timer in continuous mode */
bogdanm	0:9b334a45a8ff	1299	__HAL_LPTIM_START_CONTINUOUS(hlptim);
bogdanm	0:9b334a45a8ff	1300
bogdanm	0:9b334a45a8ff	1301	/* Change the TIM state*/
bogdanm	0:9b334a45a8ff	1302	hlptim->State= HAL_LPTIM_STATE_READY;
bogdanm	0:9b334a45a8ff	1303
bogdanm	0:9b334a45a8ff	1304	/* Return function status */
bogdanm	0:9b334a45a8ff	1305	return HAL_OK;
bogdanm	0:9b334a45a8ff	1306	}
bogdanm	0:9b334a45a8ff	1307
bogdanm	0:9b334a45a8ff	1308	/**
bogdanm	0:9b334a45a8ff	1309	* @brief Stop the Counter mode in interrupt mode.
bogdanm	0:9b334a45a8ff	1310	* @param hlptim : LPTIM handle
bogdanm	0:9b334a45a8ff	1311	* @retval HAL status
bogdanm	0:9b334a45a8ff	1312	*/
bogdanm	0:9b334a45a8ff	1313	HAL_StatusTypeDef HAL_LPTIM_Counter_Stop_IT(LPTIM_HandleTypeDef *hlptim)
bogdanm	0:9b334a45a8ff	1314	{
bogdanm	0:9b334a45a8ff	1315	/* Check the parameters */
bogdanm	0:9b334a45a8ff	1316	assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm	0:9b334a45a8ff	1317
bogdanm	0:9b334a45a8ff	1318	/* Set the LPTIM state */
bogdanm	0:9b334a45a8ff	1319	hlptim->State= HAL_LPTIM_STATE_BUSY;
bogdanm	0:9b334a45a8ff	1320
bogdanm	0:9b334a45a8ff	1321	/* Disable the Peripheral */
bogdanm	0:9b334a45a8ff	1322	__HAL_LPTIM_DISABLE(hlptim);
bogdanm	0:9b334a45a8ff	1323
bogdanm	0:9b334a45a8ff	1324	/* Disable Autoreload write complete interrupt */
bogdanm	0:9b334a45a8ff	1325	__HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK);
bogdanm	0:9b334a45a8ff	1326
bogdanm	0:9b334a45a8ff	1327	/* Disable Autoreload match interrupt */
bogdanm	0:9b334a45a8ff	1328	__HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM);
bogdanm	0:9b334a45a8ff	1329
bogdanm	0:9b334a45a8ff	1330	/* Change the TIM state*/
bogdanm	0:9b334a45a8ff	1331	hlptim->State= HAL_LPTIM_STATE_READY;
bogdanm	0:9b334a45a8ff	1332
bogdanm	0:9b334a45a8ff	1333	/* Return function status */
bogdanm	0:9b334a45a8ff	1334	return HAL_OK;
bogdanm	0:9b334a45a8ff	1335	}
bogdanm	0:9b334a45a8ff	1336
bogdanm	0:9b334a45a8ff	1337	/**
bogdanm	0:9b334a45a8ff	1338	* @}
bogdanm	0:9b334a45a8ff	1339	*/
bogdanm	0:9b334a45a8ff	1340
bogdanm	0:9b334a45a8ff	1341	/** @defgroup LPTIM_Group3 LPTIM Read operation functions
bogdanm	0:9b334a45a8ff	1342	* @brief Read operation functions.
bogdanm	0:9b334a45a8ff	1343	*
bogdanm	0:9b334a45a8ff	1344	@verbatim
bogdanm	0:9b334a45a8ff	1345	==============================================================================
bogdanm	0:9b334a45a8ff	1346	##### LPTIM Read operation functions #####
bogdanm	0:9b334a45a8ff	1347	==============================================================================
bogdanm	0:9b334a45a8ff	1348	[..] This section provides LPTIM Reading functions.
bogdanm	0:9b334a45a8ff	1349	(+) Read the counter value.
bogdanm	0:9b334a45a8ff	1350	(+) Read the period (Auto-reload) value.
bogdanm	0:9b334a45a8ff	1351	(+) Read the pulse (Compare)value.
bogdanm	0:9b334a45a8ff	1352	@endverbatim
bogdanm	0:9b334a45a8ff	1353	* @{
bogdanm	0:9b334a45a8ff	1354	*/
bogdanm	0:9b334a45a8ff	1355
bogdanm	0:9b334a45a8ff	1356	/**
bogdanm	0:9b334a45a8ff	1357	* @brief Return the current counter value.
bogdanm	0:9b334a45a8ff	1358	* @param hlptim: LPTIM handle
bogdanm	0:9b334a45a8ff	1359	* @retval Counter value.
bogdanm	0:9b334a45a8ff	1360	*/
bogdanm	0:9b334a45a8ff	1361	uint32_t HAL_LPTIM_ReadCounter(LPTIM_HandleTypeDef *hlptim)
bogdanm	0:9b334a45a8ff	1362	{
bogdanm	0:9b334a45a8ff	1363	/* Check the parameters */
bogdanm	0:9b334a45a8ff	1364	assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm	0:9b334a45a8ff	1365
bogdanm	0:9b334a45a8ff	1366	return (hlptim->Instance->CNT);
bogdanm	0:9b334a45a8ff	1367	}
bogdanm	0:9b334a45a8ff	1368
bogdanm	0:9b334a45a8ff	1369	/**
bogdanm	0:9b334a45a8ff	1370	* @brief Return the current Autoreload (Period) value.
bogdanm	0:9b334a45a8ff	1371	* @param hlptim: LPTIM handle
bogdanm	0:9b334a45a8ff	1372	* @retval Autoreload value.
bogdanm	0:9b334a45a8ff	1373	*/
bogdanm	0:9b334a45a8ff	1374	uint32_t HAL_LPTIM_ReadAutoReload(LPTIM_HandleTypeDef *hlptim)
bogdanm	0:9b334a45a8ff	1375	{
bogdanm	0:9b334a45a8ff	1376	/* Check the parameters */
bogdanm	0:9b334a45a8ff	1377	assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm	0:9b334a45a8ff	1378
bogdanm	0:9b334a45a8ff	1379	return (hlptim->Instance->ARR);
bogdanm	0:9b334a45a8ff	1380	}
bogdanm	0:9b334a45a8ff	1381
bogdanm	0:9b334a45a8ff	1382	/**
bogdanm	0:9b334a45a8ff	1383	* @brief Return the current Compare (Pulse) value.
bogdanm	0:9b334a45a8ff	1384	* @param hlptim: LPTIM handle
bogdanm	0:9b334a45a8ff	1385	* @retval Compare value.
bogdanm	0:9b334a45a8ff	1386	*/
bogdanm	0:9b334a45a8ff	1387	uint32_t HAL_LPTIM_ReadCompare(LPTIM_HandleTypeDef *hlptim)
bogdanm	0:9b334a45a8ff	1388	{
bogdanm	0:9b334a45a8ff	1389	/* Check the parameters */
bogdanm	0:9b334a45a8ff	1390	assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm	0:9b334a45a8ff	1391
bogdanm	0:9b334a45a8ff	1392	return (hlptim->Instance->CMP);
bogdanm	0:9b334a45a8ff	1393	}
bogdanm	0:9b334a45a8ff	1394
bogdanm	0:9b334a45a8ff	1395	/**
bogdanm	0:9b334a45a8ff	1396	* @}
bogdanm	0:9b334a45a8ff	1397	*/
bogdanm	0:9b334a45a8ff	1398
bogdanm	0:9b334a45a8ff	1399
bogdanm	0:9b334a45a8ff	1400
bogdanm	0:9b334a45a8ff	1401	/** @defgroup LPTIM_Group4 LPTIM IRQ handler and callbacks
bogdanm	0:9b334a45a8ff	1402	* @brief LPTIM IRQ handler.
bogdanm	0:9b334a45a8ff	1403	*
bogdanm	0:9b334a45a8ff	1404	@verbatim
bogdanm	0:9b334a45a8ff	1405	==============================================================================
bogdanm	0:9b334a45a8ff	1406	##### LPTIM IRQ handler and callbacks #####
bogdanm	0:9b334a45a8ff	1407	==============================================================================
bogdanm	0:9b334a45a8ff	1408	[..] This section provides LPTIM IRQ handler and callback functions called within
bogdanm	0:9b334a45a8ff	1409	the IRQ handler.
bogdanm	0:9b334a45a8ff	1410
bogdanm	0:9b334a45a8ff	1411	@endverbatim
bogdanm	0:9b334a45a8ff	1412	* @{
bogdanm	0:9b334a45a8ff	1413	*/
bogdanm	0:9b334a45a8ff	1414
bogdanm	0:9b334a45a8ff	1415	/**
bogdanm	0:9b334a45a8ff	1416	* @brief Handle LPTIM interrupt request.
bogdanm	0:9b334a45a8ff	1417	* @param hlptim: LPTIM handle
bogdanm	0:9b334a45a8ff	1418	* @retval None
bogdanm	0:9b334a45a8ff	1419	*/
bogdanm	0:9b334a45a8ff	1420	void HAL_LPTIM_IRQHandler(LPTIM_HandleTypeDef *hlptim)
bogdanm	0:9b334a45a8ff	1421	{
bogdanm	0:9b334a45a8ff	1422	/* Compare match interrupt */
bogdanm	0:9b334a45a8ff	1423	if(__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_CMPM) != RESET)
bogdanm	0:9b334a45a8ff	1424	{
bogdanm	0:9b334a45a8ff	1425	if(__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_CMPM) != RESET)
bogdanm	0:9b334a45a8ff	1426	{
bogdanm	0:9b334a45a8ff	1427	/* Clear Compare match flag */
bogdanm	0:9b334a45a8ff	1428	__HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPM);
bogdanm	0:9b334a45a8ff	1429
bogdanm	0:9b334a45a8ff	1430	/* Compare match Callback */
bogdanm	0:9b334a45a8ff	1431	HAL_LPTIM_CompareMatchCallback(hlptim);
bogdanm	0:9b334a45a8ff	1432	}
bogdanm	0:9b334a45a8ff	1433	}
bogdanm	0:9b334a45a8ff	1434
bogdanm	0:9b334a45a8ff	1435	/* Autoreload match interrupt */
bogdanm	0:9b334a45a8ff	1436	if(__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_ARRM) != RESET)
bogdanm	0:9b334a45a8ff	1437	{
bogdanm	0:9b334a45a8ff	1438	if(__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_ARRM) != RESET)
bogdanm	0:9b334a45a8ff	1439	{
bogdanm	0:9b334a45a8ff	1440	/* Clear Autoreload match flag */
bogdanm	0:9b334a45a8ff	1441	__HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARRM);
bogdanm	0:9b334a45a8ff	1442
bogdanm	0:9b334a45a8ff	1443	/* Autoreload match Callback */
bogdanm	0:9b334a45a8ff	1444	HAL_LPTIM_AutoReloadMatchCallback(hlptim);
bogdanm	0:9b334a45a8ff	1445	}
bogdanm	0:9b334a45a8ff	1446	}
bogdanm	0:9b334a45a8ff	1447
bogdanm	0:9b334a45a8ff	1448	/* Trigger detected interrupt */
bogdanm	0:9b334a45a8ff	1449	if(__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_EXTTRIG) != RESET)
bogdanm	0:9b334a45a8ff	1450	{
bogdanm	0:9b334a45a8ff	1451	if(__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_EXTTRIG) != RESET)
bogdanm	0:9b334a45a8ff	1452	{
bogdanm	0:9b334a45a8ff	1453	/* Clear Trigger detected flag */
bogdanm	0:9b334a45a8ff	1454	__HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_EXTTRIG);
bogdanm	0:9b334a45a8ff	1455
bogdanm	0:9b334a45a8ff	1456	/* Trigger detected callback */
bogdanm	0:9b334a45a8ff	1457	HAL_LPTIM_TriggerCallback(hlptim);
bogdanm	0:9b334a45a8ff	1458	}
bogdanm	0:9b334a45a8ff	1459	}
bogdanm	0:9b334a45a8ff	1460
bogdanm	0:9b334a45a8ff	1461	/* Compare write interrupt */
bogdanm	0:9b334a45a8ff	1462	if(__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_CMPOK) != RESET)
bogdanm	0:9b334a45a8ff	1463	{
bogdanm	0:9b334a45a8ff	1464	if(__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_CMPOK) != RESET)
bogdanm	0:9b334a45a8ff	1465	{
bogdanm	0:9b334a45a8ff	1466	/* Clear Compare write flag */
bogdanm	0:9b334a45a8ff	1467	__HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
bogdanm	0:9b334a45a8ff	1468
bogdanm	0:9b334a45a8ff	1469	/* Compare write Callback */
bogdanm	0:9b334a45a8ff	1470	HAL_LPTIM_CompareWriteCallback(hlptim);
bogdanm	0:9b334a45a8ff	1471	}
bogdanm	0:9b334a45a8ff	1472	}
bogdanm	0:9b334a45a8ff	1473
bogdanm	0:9b334a45a8ff	1474	/* Autoreload write interrupt */
bogdanm	0:9b334a45a8ff	1475	if(__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_ARROK) != RESET)
bogdanm	0:9b334a45a8ff	1476	{
bogdanm	0:9b334a45a8ff	1477	if(__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_ARROK) != RESET)
bogdanm	0:9b334a45a8ff	1478	{
bogdanm	0:9b334a45a8ff	1479	/* Clear Autoreload write flag */
bogdanm	0:9b334a45a8ff	1480	__HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
bogdanm	0:9b334a45a8ff	1481
bogdanm	0:9b334a45a8ff	1482	/* Autoreload write Callback */
bogdanm	0:9b334a45a8ff	1483	HAL_LPTIM_AutoReloadWriteCallback(hlptim);
bogdanm	0:9b334a45a8ff	1484	}
bogdanm	0:9b334a45a8ff	1485	}
bogdanm	0:9b334a45a8ff	1486
bogdanm	0:9b334a45a8ff	1487	/* Direction counter changed from Down to Up interrupt */
bogdanm	0:9b334a45a8ff	1488	if(__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_UP) != RESET)
bogdanm	0:9b334a45a8ff	1489	{
bogdanm	0:9b334a45a8ff	1490	if(__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_UP) != RESET)
bogdanm	0:9b334a45a8ff	1491	{
bogdanm	0:9b334a45a8ff	1492	/* Clear Direction counter changed from Down to Up flag */
bogdanm	0:9b334a45a8ff	1493	__HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_UP);
bogdanm	0:9b334a45a8ff	1494
bogdanm	0:9b334a45a8ff	1495	/* Direction counter changed from Down to Up Callback */
bogdanm	0:9b334a45a8ff	1496	HAL_LPTIM_DirectionUpCallback(hlptim);
bogdanm	0:9b334a45a8ff	1497	}
bogdanm	0:9b334a45a8ff	1498	}
bogdanm	0:9b334a45a8ff	1499
bogdanm	0:9b334a45a8ff	1500	/* Direction counter changed from Up to Down interrupt */
bogdanm	0:9b334a45a8ff	1501	if(__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_DOWN) != RESET)
bogdanm	0:9b334a45a8ff	1502	{
bogdanm	0:9b334a45a8ff	1503	if(__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_DOWN) != RESET)
bogdanm	0:9b334a45a8ff	1504	{
bogdanm	0:9b334a45a8ff	1505	/* Clear Direction counter changed from Up to Down flag */
bogdanm	0:9b334a45a8ff	1506	__HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_DOWN);
bogdanm	0:9b334a45a8ff	1507
bogdanm	0:9b334a45a8ff	1508	/* Direction counter changed from Up to Down Callback */
bogdanm	0:9b334a45a8ff	1509	HAL_LPTIM_DirectionDownCallback(hlptim);
bogdanm	0:9b334a45a8ff	1510	}
bogdanm	0:9b334a45a8ff	1511	}
bogdanm	0:9b334a45a8ff	1512	}
bogdanm	0:9b334a45a8ff	1513
bogdanm	0:9b334a45a8ff	1514	/**
bogdanm	0:9b334a45a8ff	1515	* @brief Compare match callback in non-blocking mode.
bogdanm	0:9b334a45a8ff	1516	* @param hlptim : LPTIM handle
bogdanm	0:9b334a45a8ff	1517	* @retval None
bogdanm	0:9b334a45a8ff	1518	*/
bogdanm	0:9b334a45a8ff	1519	__weak void HAL_LPTIM_CompareMatchCallback(LPTIM_HandleTypeDef *hlptim)
bogdanm	0:9b334a45a8ff	1520	{
bogdanm	0:9b334a45a8ff	1521	/* NOTE : This function should not be modified, when the callback is needed,
bogdanm	0:9b334a45a8ff	1522	the HAL_LPTIM_CompareMatchCallback could be implemented in the user file
bogdanm	0:9b334a45a8ff	1523	*/
bogdanm	0:9b334a45a8ff	1524	}
bogdanm	0:9b334a45a8ff	1525
bogdanm	0:9b334a45a8ff	1526	/**
bogdanm	0:9b334a45a8ff	1527	* @brief Autoreload match callback in non-blocking mode.
bogdanm	0:9b334a45a8ff	1528	* @param hlptim : LPTIM handle
bogdanm	0:9b334a45a8ff	1529	* @retval None
bogdanm	0:9b334a45a8ff	1530	*/
bogdanm	0:9b334a45a8ff	1531	__weak void HAL_LPTIM_AutoReloadMatchCallback(LPTIM_HandleTypeDef *hlptim)
bogdanm	0:9b334a45a8ff	1532	{
bogdanm	0:9b334a45a8ff	1533	/* NOTE : This function should not be modified, when the callback is needed,
bogdanm	0:9b334a45a8ff	1534	the HAL_LPTIM_AutoReloadMatchCallback could be implemented in the user file
bogdanm	0:9b334a45a8ff	1535	*/
bogdanm	0:9b334a45a8ff	1536	}
bogdanm	0:9b334a45a8ff	1537
bogdanm	0:9b334a45a8ff	1538	/**
bogdanm	0:9b334a45a8ff	1539	* @brief Trigger detected callback in non-blocking mode.
bogdanm	0:9b334a45a8ff	1540	* @param hlptim : LPTIM handle
bogdanm	0:9b334a45a8ff	1541	* @retval None
bogdanm	0:9b334a45a8ff	1542	*/
bogdanm	0:9b334a45a8ff	1543	__weak void HAL_LPTIM_TriggerCallback(LPTIM_HandleTypeDef *hlptim)
bogdanm	0:9b334a45a8ff	1544	{
bogdanm	0:9b334a45a8ff	1545	/* NOTE : This function should not be modified, when the callback is needed,
bogdanm	0:9b334a45a8ff	1546	the HAL_LPTIM_TriggerCallback could be implemented in the user file
bogdanm	0:9b334a45a8ff	1547	*/
bogdanm	0:9b334a45a8ff	1548	}
bogdanm	0:9b334a45a8ff	1549
bogdanm	0:9b334a45a8ff	1550	/**
bogdanm	0:9b334a45a8ff	1551	* @brief Compare write callback in non-blocking mode.
bogdanm	0:9b334a45a8ff	1552	* @param hlptim : LPTIM handle
bogdanm	0:9b334a45a8ff	1553	* @retval None
bogdanm	0:9b334a45a8ff	1554	*/
bogdanm	0:9b334a45a8ff	1555	__weak void HAL_LPTIM_CompareWriteCallback(LPTIM_HandleTypeDef *hlptim)
bogdanm	0:9b334a45a8ff	1556	{
bogdanm	0:9b334a45a8ff	1557	/* NOTE : This function should not be modified, when the callback is needed,
bogdanm	0:9b334a45a8ff	1558	the HAL_LPTIM_CompareWriteCallback could be implemented in the user file
bogdanm	0:9b334a45a8ff	1559	*/
bogdanm	0:9b334a45a8ff	1560	}
bogdanm	0:9b334a45a8ff	1561
bogdanm	0:9b334a45a8ff	1562	/**
bogdanm	0:9b334a45a8ff	1563	* @brief Autoreload write callback in non-blocking mode.
bogdanm	0:9b334a45a8ff	1564	* @param hlptim : LPTIM handle
bogdanm	0:9b334a45a8ff	1565	* @retval None
bogdanm	0:9b334a45a8ff	1566	*/
bogdanm	0:9b334a45a8ff	1567	__weak void HAL_LPTIM_AutoReloadWriteCallback(LPTIM_HandleTypeDef *hlptim)
bogdanm	0:9b334a45a8ff	1568	{
bogdanm	0:9b334a45a8ff	1569	/* NOTE : This function should not be modified, when the callback is needed,
bogdanm	0:9b334a45a8ff	1570	the HAL_LPTIM_AutoReloadWriteCallback could be implemented in the user file
bogdanm	0:9b334a45a8ff	1571	*/
bogdanm	0:9b334a45a8ff	1572	}
bogdanm	0:9b334a45a8ff	1573
bogdanm	0:9b334a45a8ff	1574	/**
bogdanm	0:9b334a45a8ff	1575	* @brief Direction counter changed from Down to Up callback in non-blocking mode.
bogdanm	0:9b334a45a8ff	1576	* @param hlptim : LPTIM handle
bogdanm	0:9b334a45a8ff	1577	* @retval None
bogdanm	0:9b334a45a8ff	1578	*/
bogdanm	0:9b334a45a8ff	1579	__weak void HAL_LPTIM_DirectionUpCallback(LPTIM_HandleTypeDef *hlptim)
bogdanm	0:9b334a45a8ff	1580	{
bogdanm	0:9b334a45a8ff	1581	/* NOTE : This function should not be modified, when the callback is needed,
bogdanm	0:9b334a45a8ff	1582	the HAL_LPTIM_DirectionUpCallback could be implemented in the user file
bogdanm	0:9b334a45a8ff	1583	*/
bogdanm	0:9b334a45a8ff	1584	}
bogdanm	0:9b334a45a8ff	1585
bogdanm	0:9b334a45a8ff	1586	/**
bogdanm	0:9b334a45a8ff	1587	* @brief Direction counter changed from Up to Down callback in non-blocking mode.
bogdanm	0:9b334a45a8ff	1588	* @param hlptim : LPTIM handle
bogdanm	0:9b334a45a8ff	1589	* @retval None
bogdanm	0:9b334a45a8ff	1590	*/
bogdanm	0:9b334a45a8ff	1591	__weak void HAL_LPTIM_DirectionDownCallback(LPTIM_HandleTypeDef *hlptim)
bogdanm	0:9b334a45a8ff	1592	{
bogdanm	0:9b334a45a8ff	1593	/* NOTE : This function should not be modified, when the callback is needed,
bogdanm	0:9b334a45a8ff	1594	the HAL_LPTIM_DirectionDownCallback could be implemented in the user file
bogdanm	0:9b334a45a8ff	1595	*/
bogdanm	0:9b334a45a8ff	1596	}
bogdanm	0:9b334a45a8ff	1597
bogdanm	0:9b334a45a8ff	1598	/**
bogdanm	0:9b334a45a8ff	1599	* @}
bogdanm	0:9b334a45a8ff	1600	*/
bogdanm	0:9b334a45a8ff	1601
bogdanm	0:9b334a45a8ff	1602	/** @defgroup LPTIM_Group5 Peripheral State functions
bogdanm	0:9b334a45a8ff	1603	* @brief Peripheral State functions.
bogdanm	0:9b334a45a8ff	1604	*
bogdanm	0:9b334a45a8ff	1605	@verbatim
bogdanm	0:9b334a45a8ff	1606	==============================================================================
bogdanm	0:9b334a45a8ff	1607	##### Peripheral State functions #####
bogdanm	0:9b334a45a8ff	1608	==============================================================================
bogdanm	0:9b334a45a8ff	1609	[..]
bogdanm	0:9b334a45a8ff	1610	This subsection permits to get in run-time the status of the peripheral.
bogdanm	0:9b334a45a8ff	1611
bogdanm	0:9b334a45a8ff	1612	@endverbatim
bogdanm	0:9b334a45a8ff	1613	* @{
bogdanm	0:9b334a45a8ff	1614	*/
bogdanm	0:9b334a45a8ff	1615
bogdanm	0:9b334a45a8ff	1616	/**
bogdanm	0:9b334a45a8ff	1617	* @brief Return the LPTIM handle state.
bogdanm	0:9b334a45a8ff	1618	* @param hlptim: LPTIM handle
bogdanm	0:9b334a45a8ff	1619	* @retval HAL state
bogdanm	0:9b334a45a8ff	1620	*/
bogdanm	0:9b334a45a8ff	1621	HAL_LPTIM_StateTypeDef HAL_LPTIM_GetState(LPTIM_HandleTypeDef *hlptim)
bogdanm	0:9b334a45a8ff	1622	{
bogdanm	0:9b334a45a8ff	1623	/* Return LPTIM handle state */
bogdanm	0:9b334a45a8ff	1624	return hlptim->State;
bogdanm	0:9b334a45a8ff	1625	}
bogdanm	0:9b334a45a8ff	1626
bogdanm	0:9b334a45a8ff	1627	/**
bogdanm	0:9b334a45a8ff	1628	* @}
bogdanm	0:9b334a45a8ff	1629	*/
bogdanm	0:9b334a45a8ff	1630
bogdanm	0:9b334a45a8ff	1631
bogdanm	0:9b334a45a8ff	1632	/**
bogdanm	0:9b334a45a8ff	1633	* @}
bogdanm	0:9b334a45a8ff	1634	*/
bogdanm	0:9b334a45a8ff	1635
bogdanm	0:9b334a45a8ff	1636	#endif /* HAL_LPTIM_MODULE_ENABLED */
bogdanm	0:9b334a45a8ff	1637	/**
bogdanm	0:9b334a45a8ff	1638	* @}
bogdanm	0:9b334a45a8ff	1639	*/
bogdanm	0:9b334a45a8ff	1640
bogdanm	0:9b334a45a8ff	1641	/**
bogdanm	0:9b334a45a8ff	1642	* @}
bogdanm	0:9b334a45a8ff	1643	*/
bogdanm	0:9b334a45a8ff	1644
bogdanm	0:9b334a45a8ff	1645	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/

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Type:	Library
Created:	16 May 2016
Imports:	1
Forks:	0
Commits:	130
Dependents:	1
Dependencies:	0
Followers:	1

targets/cmsis/TARGET_STM/TARGET_STM32L4/stm32l4xx_hal_lptim.c@129:2e517c56bcfb, 2016-05-16 (annotated)

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